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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 13:55:54 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 13:55:54 -0400 |
| commit | 320c679a470b9eb31dd111b7189b07316298c23a (patch) | |
| tree | e81af2c64f8efd21825e7921d501a09c8682a8a2 /kernel/gsp_phys_gpu.c | |
| parent | a58eb29859c55fc38c30bc9433b5dfd16ae9e4d2 (diff) | |
| download | open-iov-320c679a470b9eb31dd111b7189b07316298c23a.tar.gz open-iov-320c679a470b9eb31dd111b7189b07316298c23a.zip | |
vgsp: m96 - gr_pte_kind: set the Turing v2 PTE KIND on the window-0 shadow pool
UVM's Turing PTE maker sets KIND=GENERIC_MEMORY (0x06) in PTE bits 63:56
because PITCH no longer exists on Turing (uvm_turing_mmu.c:32-34,106;
NV_MMU_PTE_KIND_GENERIC_MEMORY=0x06, NV_MMU_VER2_PTE_KIND=63:56). Our
shadow PTEs encode kind=0. The SM I-fetch refuses the kind-0 PTE with
MMU_NACK while the FE tolerates it, so gr_pte_kind (default 0) selects the
KIND for the window-0 pool. Also log the VASPDB root DMA at
SET_PAGE_DIRECTORY time (settles whether the SC PDB the server programs is
our chunk).
Diffstat (limited to 'kernel/gsp_phys_gpu.c')
| -rw-r--r-- | kernel/gsp_phys_gpu.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/kernel/gsp_phys_gpu.c b/kernel/gsp_phys_gpu.c index 3b2feb4..37eff49 100644 --- a/kernel/gsp_phys_gpu.c +++ b/kernel/gsp_phys_gpu.c @@ -994,6 +994,24 @@ int gsp_phys_rmcall_gr_ptr_guest_value(void) EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_ptr_guest_value); /* + * m96: KIND (PTE bits 63:56) for the window-0 shadow pool PTEs. On Turing + * the v2 PTE has no PITCH kind; UVM sets GENERIC_MEMORY (0x06). A kind=0 + * PTE is a candidate for the SM I-fetch MMU_NACK while the FE tolerates it. + * Default 0 = keep the historical kind-0 encoding. + */ +static int gsp_phys_rmcall_gr_pte_kind_param; +module_param_named(gsp_phys_rmcall_gr_pte_kind, + gsp_phys_rmcall_gr_pte_kind_param, int, 0644); +MODULE_PARM_DESC(gsp_phys_rmcall_gr_pte_kind, + "KIND (63:56) for window-0 shadow PTEs; 6 = GENERIC_MEMORY (default 0)"); + +int gsp_phys_rmcall_gr_pte_kind_value(void) +{ + return gsp_phys_rmcall_gr_pte_kind_param; +} +EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_pte_kind_value); + +/* * m95: program each GPC's MMU_CTRL from the hub's PFB MMU_CTRL (the real RM's * grInitGPCMmuPRIRegs matching-fields copy) before a forwarded launch. The * GPC-side walker refuses the SM I-fetch with MMU_NACK while hub-side reads |