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-rw-r--r--kernel/gsp_phys_gpu.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/kernel/gsp_phys_gpu.c b/kernel/gsp_phys_gpu.c
index 3b2feb4..37eff49 100644
--- a/kernel/gsp_phys_gpu.c
+++ b/kernel/gsp_phys_gpu.c
@@ -994,6 +994,24 @@ int gsp_phys_rmcall_gr_ptr_guest_value(void)
EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_ptr_guest_value);
/*
+ * m96: KIND (PTE bits 63:56) for the window-0 shadow pool PTEs. On Turing
+ * the v2 PTE has no PITCH kind; UVM sets GENERIC_MEMORY (0x06). A kind=0
+ * PTE is a candidate for the SM I-fetch MMU_NACK while the FE tolerates it.
+ * Default 0 = keep the historical kind-0 encoding.
+ */
+static int gsp_phys_rmcall_gr_pte_kind_param;
+module_param_named(gsp_phys_rmcall_gr_pte_kind,
+ gsp_phys_rmcall_gr_pte_kind_param, int, 0644);
+MODULE_PARM_DESC(gsp_phys_rmcall_gr_pte_kind,
+ "KIND (63:56) for window-0 shadow PTEs; 6 = GENERIC_MEMORY (default 0)");
+
+int gsp_phys_rmcall_gr_pte_kind_value(void)
+{
+ return gsp_phys_rmcall_gr_pte_kind_param;
+}
+EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_pte_kind_value);
+
+/*
* m95: program each GPC's MMU_CTRL from the hub's PFB MMU_CTRL (the real RM's
* grInitGPCMmuPRIRegs matching-fields copy) before a forwarded launch. The
* GPC-side walker refuses the SM I-fetch with MMU_NACK while hub-side reads