diff options
Diffstat (limited to 'docs/03-architecture/08-physical-gpu-integration.md')
| -rw-r--r-- | docs/03-architecture/08-physical-gpu-integration.md | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/docs/03-architecture/08-physical-gpu-integration.md b/docs/03-architecture/08-physical-gpu-integration.md index c0db8ec..9949227 100644 --- a/docs/03-architecture/08-physical-gpu-integration.md +++ b/docs/03-architecture/08-physical-gpu-integration.md @@ -196,7 +196,12 @@ first server event**: FWSEC raised WPR2 with a zero FRTS error code (`RISCV_STATUS=0x00000035`) with `FALCON_OS=0`, and a host-driven boot sets only the booter-load handoff bit (bit 24) in secure scratch14. Stage 4 has begun: the staged command/status queues linked and the first real GSP-RM -message arrived (event 0x1002, run-CPU-sequencer, `rpc_result=0`). The server +message arrived (event 0x1002, run-CPU-sequencer, `rpc_result=0`). Before the +Booter Load kick the module also queues the two pre-boot asynchronous init +RPCs the production client sends in the same spot: `GSP_SET_SYSTEM_INFO` (72, +the host/GPU address and PCI environment description GSP-RM consumes before it +creates its GPU object) and `SET_REGISTRY` (73; a header-only empty table, +which the server explicitly accepts). The server waits for the host to execute the sequencer command buffer carried in that event before it raises `GSP_INIT_DONE` (0x1001). **A plain release is not yet possible:** the Booter Unload gate requires all four secure scratch14 handoff |