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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-07 11:05:24 -0400
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-07 11:05:24 -0400
commitab6fed7ee35a114541373af90184acde9bd94b6b (patch)
treee06e5ecd04e65f7344211a6ccc87409213e8a5ec /tools
parent2520bdb490398c1190d53fbd700ecba178fe8bb9 (diff)
downloadopen-iov-ab6fed7ee35a114541373af90184acde9bd94b6b.tar.gz
open-iov-ab6fed7ee35a114541373af90184acde9bd94b6b.zip
gr-regs/vgsp: sample PGRAPH_INTR + PGRAPH_INTR_EN at the dispatch window
The m75/m78/m79 launch windows show FECS_CTXSW_STATUS_FE_0.GR_INTR_REQ (bit17) asserted through the SKED CWD ACTIVE state and a following CTXSW_REQ (bit0) that results in the context save/unload. The real driver carries GR_INTR only transiently during its context load and clears it before ACTIVE. The PGRAPH interrupt latch (0x400100) names what the engine is signaling (e.g. ILLEGAL_METHOD bit4, SEMAPHORE bit1, NOTIFY); sampled by the external sampler and dumped in the launch post-mortem.
Diffstat (limited to 'tools')
-rw-r--r--tools/gr-regs/reg_sampler.py2
1 files changed, 2 insertions, 0 deletions
diff --git a/tools/gr-regs/reg_sampler.py b/tools/gr-regs/reg_sampler.py
index 495ace8..af00db7 100644
--- a/tools/gr-regs/reg_sampler.py
+++ b/tools/gr-regs/reg_sampler.py
@@ -31,6 +31,8 @@ import time
DEV = "/sys/bus/pci/devices/0000:01:00.0/resource0"
REGS = [
(0x000200, "PMC_ENABLE"),
+ (0x400100, "PGRAPH_INTR"),
+ (0x40013C, "PGRAPH_INTR_EN"),
(0x400700, "PGRAPH_STATUS"),
(0x400504, "GRFIFO_STATUS"),
(0x400704, "TRAPPED_ADDR"),