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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef GSP_PHYS_FWSEC_H
#define GSP_PHYS_FWSEC_H
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/io.h>
#include "gsp_phys_boot.h"
/*
* Real-GSP boot stage 3c: the FWSEC secure-verification run that carves
* WPR2/FRTS on the claimed physical GPU, plus the teardown path that removes
* WPR2 again before the device is handed back to the distribution driver.
*
* The stage is disabled by default (gsp_phys_fwsec=N); claim must be enabled
* too (gsp_phys_gpu=1 + gsp_phys_hazard_ack=1) and the boot layout (stage 3b)
* must have succeeded. Every step logs its register reads; failures abort and
* the recovery path is attempted immediately.
*/
bool gsp_phys_fwsec_enabled(void);
bool gsp_phys_fwsec_dryrun_enabled(void);
int gsp_phys_fwsec_run(struct gsp_phys_boot *boot, struct pci_dev *pdev,
void __iomem *bar0);
/*
* Read-only subset of stage 3c: VBIOS/PROM read, IFR/expansion-ROM/BIT
* parse, FWSEC ucode extraction, capacity-register reads and the complete
* staging/placement computation, logged under the
* "gsp-phys-fwsec-dryrun:" prefix. No BAR0 writes, no falcon resets, no DMA
* kicks; readl() of state registers is the only device interaction. Mutually
* exclusive with gsp_phys_fwsec=1 (both set is a hard refusal).
*/
int gsp_phys_fwsec_dryrun_run(struct gsp_phys_boot *boot, struct pci_dev *pdev,
void __iomem *bar0);
/*
* Prepare the device for hand-back. If a FWSEC run programmed WPR2, run the
* teardown (FWSEC-SB + booter unload) while the module still owns BAR0.
* Returns nonzero when WPR2 could not be torn down: the caller must then
* refuse to rebind the distribution driver and keep the power-domain locks.
*/
int gsp_phys_fwsec_release(struct gsp_phys_boot *boot, struct pci_dev *pdev,
void __iomem *bar0);
#endif /* GSP_PHYS_FWSEC_H */
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