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#ifndef GSP_PHYS_BOOT_H
#define GSP_PHYS_BOOT_H
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
/*
* Real-GSP boot bring-up stage 3b: boot-argument DMA memory and the computed
* WPR/FB layout. Allocated and filled by gsp_phys_boot.c while the module owns
* the physical GPU. Stage 3b writes no device registers; the only device
* access is a read-only sample of the video-memory-size register in BAR0, and
* the WPR metadata page is filled in host memory only, ready for the later
* FWSEC/booter stages.
*/
struct gsp_phys_boot {
bool initialized;
/* Boot-argument pages (DMA-coherent and GPU-addressable) */
void *wpr_meta_va;
dma_addr_t wpr_meta_dma;
size_t wpr_meta_size;
void *libos_args_va;
dma_addr_t libos_args_dma;
size_t libos_args_size;
void *gsp_args_va;
dma_addr_t gsp_args_dma;
size_t gsp_args_size;
/* Computed layout, FB byte offsets measured from the FB base */
u64 fb_size;
u64 vga_workspace_offset;
u64 vga_workspace_size;
u64 gsp_fw_wpr_end;
u64 frts_offset;
u64 frts_size;
u64 boot_bin_offset;
u64 size_of_bootloader;
u64 gsp_fw_offset;
u64 size_of_radix3_elf;
u64 gsp_fw_heap_offset;
u64 gsp_fw_heap_size;
u64 gsp_fw_wpr_start;
u64 non_wpr_heap_offset;
u64 non_wpr_heap_size;
u64 gsp_fw_rsvd_start;
};
bool gsp_phys_layout_enabled(void);
int gsp_phys_boot_layout_init(struct gsp_phys_boot *boot, struct pci_dev *pdev,
void __iomem *bar0, u64 fw_image_size,
resource_size_t bar1_len);
void gsp_phys_boot_layout_fini(struct gsp_phys_boot *boot, struct pci_dev *pdev);
#endif /* GSP_PHYS_BOOT_H */
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