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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _GSP_CUDA_BRIDGE_H_
#define _GSP_CUDA_BRIDGE_H_
#include <linux/types.h>
struct nv_vgpu_device;
/*
* One decoded GRCE inline-data write: the destination VA and the payload bytes
* carried in the push itself. The sema service records these at decode time
* (the bytes are already in hand); the CUDA bridge uses them to locate a
* launch's argument block without a VA read, which is unavailable for
* UVM-managed VAs (no CPU pagemap, no published page directory, no reliable
* targeted resolve).
*/
#define GSP_BRIDGE_INLINE_MAX 16
/*
* SESSION 153-CONTINUED-88: 256 -> 2048. The GL program delivery needs the
* driver's REAL captured upload payloads (observed: a 1536 B SPH+SASS image
* at 0x4350900 and a 1408 B image at 0x4350f00, w0=0x020a0481) to reach the
* engine-visible page; the 256 B cap truncated them. Every user of this
* record type grows with it (rings, bridge queues - all static storage; the
* only stack user, svc_gl_flush's prs[], was moved to static storage).
*/
#define GSP_BRIDGE_INLINE_BYTES 2048
struct gsp_bridge_inline {
u64 dst_va;
u32 len;
u8 data[GSP_BRIDGE_INLINE_BYTES];
};
bool gsp_cuda_bridge_enabled(void);
void gsp_cuda_bridge_launch(struct nv_vgpu_device *vgpu, u32 h_object,
const u32 qmd[64], u64 qmd_dev_va, u64 push_va,
const struct gsp_bridge_inline *recs, u32 n_recs);
void gsp_cuda_bridge_service(struct nv_vgpu_device *vgpu);
int gsp_cuda_bridge_init(void);
void gsp_cuda_bridge_fini(void);
#endif /* _GSP_CUDA_BRIDGE_H_ */
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