diff options
Diffstat (limited to 'kernel/gsp_phys_booter.c')
| -rw-r--r-- | kernel/gsp_phys_booter.c | 55 |
1 files changed, 35 insertions, 20 deletions
diff --git a/kernel/gsp_phys_booter.c b/kernel/gsp_phys_booter.c index 7254f24..19e6909 100644 --- a/kernel/gsp_phys_booter.c +++ b/kernel/gsp_phys_booter.c @@ -7372,6 +7372,29 @@ static int gsp_phys_rmcall_map_pt_window(void __iomem *bar0) /* the install may zero the PT page; leaves come later */ gsp_phys_chunk_zero(dpt); } + /* + * m108: allocate and fill the mail message page here, where + * dma_alloc_coherent demonstrably works (the pool above); the + * launch-time allocation failed silently in m106/m107. + */ + if (!boot_stage.rmcall_gr_mail.pages) { + static const char mail[] = + "the little gpu man says you've got mail"; + + if (!gsp_phys_chunk_alloc(boot_stage.pdev, + &boot_stage.rmcall_gr_mail, + 1u)) { + gsp_phys_chunk_zero(&boot_stage.rmcall_gr_mail); + memcpy(gsp_phys_chunk_page_va( + &boot_stage.rmcall_gr_mail, 0), + mail, sizeof(mail)); + dma_wmb(); + pr_info("vgsp-boot: rm-call: mail page prepared (%u bytes)\n", + (u32)sizeof(mail)); + } else { + pr_err("vgsp-boot: rm-call: mail page allocation failed\n"); + } + } pr_info("vgsp-boot: rm-call: data PT pool installed: %u windows at pdeIndex %u..%u (VA 0x%llx..0x%llx)\n", GSP_PHYS_RMCALL_GR_DATA_WINS, (u32)(GSP_PHYS_RMCALL_VA_GR_DATA_BASE >> 21), @@ -16638,33 +16661,25 @@ int gsp_phys_backend_guest_gr_submit(const struct gsp_phys_gr_submit *req, boot_stage.rmcall_gr_data_pt [GSP_PHYS_RMCALL_GR_DATA_WINS - 1].pages); { - static const char mail[] = - "the little gpu man says you've got mail"; u64 mva = GSP_PHYS_RMCALL_VA_GR_DATA_BASE + ((u64)GSP_PHYS_RMCALL_GR_DATA_WINS - 1) << 21; - - if (!boot_stage.rmcall_gr_mail.pages && - !gsp_phys_chunk_alloc(boot_stage.pdev, - &boot_stage.rmcall_gr_mail, - 1)) { - gsp_phys_chunk_zero( - &boot_stage.rmcall_gr_mail); - memcpy(gsp_phys_chunk_page_va( - &boot_stage.rmcall_gr_mail, - 0), mail, sizeof(mail)); - dma_wmb(); - } - if (boot_stage.rmcall_gr_mail.pages && - !gsp_phys_rmcall_gr_data_map( - bar0, mva, - (u64)gsp_phys_chunk_page_dma( - &boot_stage.rmcall_gr_mail, 0), - boot_stage.rmcall_gr_submit_epoch)) { + int mret = -EINVAL; + + if (boot_stage.rmcall_gr_mail.pages) + mret = gsp_phys_rmcall_gr_data_map( + bar0, mva, + (u64)gsp_phys_chunk_page_dma( + &boot_stage.rmcall_gr_mail, 0), + boot_stage.rmcall_gr_submit_epoch); + if (!mret) { w[0] = (u32)mva; w[1] = (u32)(mva >> 32); pr_info("vgsp-gr: bank4 mail base injected: c[0x4][0x0]=0x%llx (message page mapped)\n", mva); + } else { + pr_err("vgsp-gr: bank4 mail base NOT injected (mret=%d mail.pages=%u)\n", + mret, boot_stage.rmcall_gr_mail.pages); } } } |