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-rw-r--r--docs/03-architecture/01-system-overview.md25
1 files changed, 20 insertions, 5 deletions
diff --git a/docs/03-architecture/01-system-overview.md b/docs/03-architecture/01-system-overview.md
index ed9b24b..c7a847e 100644
--- a/docs/03-architecture/01-system-overview.md
+++ b/docs/03-architecture/01-system-overview.md
@@ -32,7 +32,8 @@ Everything therefore falls into two buckets:
│ PASS THROUGH (real hardware; for correctness and performance) │
│ • GPU memory: guest VRAM objects backed by real VRAM (goal) │
│ • Page tables / GMMU state used by the GPU (goal) │
-│ • Channel execution: the guest's push buffers run on real channels │
+│ • Channel execution: guest push buffers on real GPU channels (goal; │
+│ today the host software-executes decoded work — a bridge) │
│ • Compute (CUDA) and, later, 3D/video work │
│ • DMA, completion and fault interrupts relayed back to the guest │
└─────────────────────────────────────────────────────────────────────────┘
@@ -59,7 +60,7 @@ HOST MODULE open-iov-vfio.ko
├─ virtual device: config space, BAR0/BAR1/BAR3 windows, MSI-X
├─ emulation core: GSP boot + GSP-RM (RPC msgq, controls, objects, events)
├─ memory model: guest RAM access, VA↔PA maps, VRAM backing
- └─ work path: channel/push forwarding to the physical GPU [in progress]
+ └─ work path: channel/push forwarding to the physical GPU [goal; software bridge today]
│
HOST DRIVER nvidia.ko (unmodified) and/or direct GPU interfaces
│
@@ -161,9 +162,23 @@ decompiled and mapped (see `wiki/GSP-570.144W-Firmware-Analysis.md` and
versions, and performs the resource-manager initialization exchanges.
4. Object creation (clients, devices, subdevices), capability queries,
vaspaces, channels, CE caps, GMMU static info — every control the driver
- probes — is answered with the correct shape and values.
-5. `nvidia-smi` works; CUDA user-space starts; UVM begins channel-manager and
- page-tree initialization.
+ probes — is answered with a well-formed reply. Only a small set (23 control
+ IDs) is special-cased with real values; the rest fall back to generic
+ `SUCCESS` with zeroed params, and `GSP_RM_ALLOC` echoes the request params
+ without server-side object management. Where the driver consumes a reply
+ value, that value is still being corrected (the reply-fidelity ladder).
+5. `nvidia-smi` works; CUDA user-space starts (`cuInit` / `cuDeviceGet`
+ succeed). Context creation is currently blocked: `cuCtxCreate` returns
+ `rc=999` (`CUDA_ERROR_UNKNOWN`) because the emulated engine list lacks the
+ async copy engine (`COPY14`), so UVM's channel-manager and page-tree
+ initialization is as far as the guest gets.
+
+The CUDA-side contract and the reply-fidelity rules are documented in
+[`../../userspace/cuda/docs/03-driver-and-gpu-interface.md` §9](../../userspace/cuda/docs/03-driver-and-gpu-interface.md)
+and
+[`../../userspace/cuda/docs/04-virtualization-and-emulation.md` §6](../../userspace/cuda/docs/04-virtualization-and-emulation.md);
+start at
+[`../../userspace/cuda/READ-ME-FIRST.md`](../../userspace/cuda/READ-ME-FIRST.md).
## 7. What is next (and why)