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Diffstat (limited to 'STATE-CURRENT.md')
| -rw-r--r-- | STATE-CURRENT.md | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/STATE-CURRENT.md b/STATE-CURRENT.md index aacb166..c16b774 100644 --- a/STATE-CURRENT.md +++ b/STATE-CURRENT.md @@ -1,7 +1,7 @@ # Open-IOV Current State > **Snapshot: 2026-10-05 (reorganized; simulator status current 2026-10-04, -> physical/guest campaign data as of 2026-10-06 ~18:15; debugging-options +> physical/guest campaign data as of 2026-10-07 ~01:15; debugging-options > catalogue added 2026-10-05).** This is a dated public > status page, not live state; it is refreshed on every progress check. Live > working notes are maintained outside this repository; the public @@ -123,6 +123,29 @@ isolation, performance, portability). scheduler readback; and a supervised working-channel capture for a function-level diff. Host clean, GPU green, same boot, no reboots (in-session function-level reset recovery only). + **Update 2026-10-07 ~01:15 (major):** the real-client GR lane broke + through twice. (a) The `0xc5c0` compute-object construct is GREEN on the + TSG+share lane: a mapped MAIN promote alone left the server's per-VAS + context-buffer maps unbooked (the construct skips its own mapping once + MAIN is initialized); a 10-entry VA-only booking promote (the real + client's shape) books them and the construct returns success. (b) The + forwarded guest QMD now ENQUEUES AND IS SCHEDULED: the missing real-client + step was the lane-enable tail (context-switch preemption mode = CILP, + timeslice 0x800, device scheduling enable); with it the front-end deposit + and the scheduler's context-work-descriptor entry appear (QMD id = the + relocated QMD page) and the scheduler's context machinery loads the + channel's engine context (VALID) - the same transient class a live CUDA + channel shows. Register ground truth was captured read-only from the + working distribution driver during live CUDA (context-validity bit, + scheduler CWD table, GR FIFO) and the sampler/analyzer are committed + under `tools/gr-regs/`. Remaining wall: the GR engine core does not + execute the scheduled QMD (no release is written anywhere, including a + module semaphore; no fault is visible - the per-TSG fault buffers are + server FBMEM and a sysmem registration is refused). Eliminated along the + way: shadow-window choice, program content and prefetch, instance + aperture. Ranked next: read the server-FBMEM fault buffer via a + copy-engine transfer, per-VEID/compute-context execution requirements, + and the scheduler CWD field semantics. Host clean, GPU green, no reboots. - **Guest frontier: FIRST GREEN END-TO-END GUEST CUDA, NOW UNDER HARDENING (2026-10-04 ~16:20; hardening 2026-10-05 overnight).** The emulation-only ("no-claim") campaign runs an unmodified guest CUDA program to completion |