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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-11-09 19:05:16 -0500 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-11-09 19:05:16 -0500 |
| commit | 21e0d611b5efbdcf6a14520c3294d6a78bb32220 (patch) | |
| tree | 84f36e306b7b1a7b551075f578245765949b42e2 /wiki/Project-Plan.md | |
| parent | e342bd0f6d813d246c698d19a5828e7f8d817183 (diff) | |
| download | open-iov-21e0d611b5efbdcf6a14520c3294d6a78bb32220.tar.gz open-iov-21e0d611b5efbdcf6a14520c3294d6a78bb32220.zip | |
wiki: 2026-11-09 evening refresh - X DDX waits fixed; GZDoom reaches MAP01 on llvmpipe
Refresh Project Status, Graphics Execution, OpenGL, Execution Frontier,
Execution Plane, Physical GPU Backend, Host Module, System Overview,
Project Goals, Project Plan and the FAQ, plus STATE-CURRENT and the Main
Page: the X DDX waits (class-aware display arm, 0x8000->0 notification
completion, decoded GL release) are fixed; GZDoom reaches MAP01 on Mesa
llvmpipe; the NVIDIA renderer path, the DDX get-word/notifier completion,
the DDX 4 GB sysmem footprint and physical dispatch of the GL draws are
the pixel walls. Published to open-iov.org.
Diffstat (limited to 'wiki/Project-Plan.md')
| -rw-r--r-- | wiki/Project-Plan.md | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/wiki/Project-Plan.md b/wiki/Project-Plan.md index 1a10eec..583264a 100644 --- a/wiki/Project-Plan.md +++ b/wiki/Project-Plan.md @@ -15,7 +15,7 @@ > [`../docs/06-portability/03-device-validation-and-porting-sequence.md`](../docs/06-portability/03-device-validation-and-porting-sequence.md); > the docs tree wins on disagreement. -Status: 2026-11-09, tree `master @ 4acc81e8`. Tags: `[done]`, `[active]`, +Status: 2026-11-09, tree `master @ e342bd0f`. Tags: `[done]`, `[active]`, `[ahead]` — the plan's own state vocabulary, distinct from the goal tags. ## 1. How the plan works @@ -44,7 +44,7 @@ itself: |---|---|---|---| | **P0 — Platform** | Emulated vGPU device, GSP boot and GSP-RM emulation, stock guest driver initialisation | Driver-API smoke green (`ALL OK`) = evaluation rung 2 | `[done]` | | **P1 — First execution (compute)** | Guest CUDA kernels executing on the physical GPU, with engine-authored completions; then hardening | Verified clients + engine-authored completion = rung 3 core; hardening: staged-transfer class, every-boot acceptance, per-guest isolation | `[active]` — execution green; hardening in progress | -| **P2 — Graphics execution** | OpenGL/Vulkan draw commands executed by the physical 3D pipeline and delivered as readable pixels | The graphics ladder: M-GL1 client context-init executes; M-GL2 `glxgears` non-black; M-GL3 GZDoom GL non-black through the mdev | `[active]` — between M-GL1 and M-GL2; the display/KMS and direct-GL channel work is live; the X GLX completion and first rendered frame are the walls | +| **P2 — Graphics execution** | OpenGL/Vulkan draw commands executed by the physical 3D pipeline and delivered as readable pixels | The graphics ladder: M-GL1 client context-init executes; M-GL2 `glxgears` non-black; M-GL3 GZDoom GL non-black through the mdev | `[active]` — between M-GL1 and M-GL2; the display/KMS and direct-GL channel work is live; the NVIDIA renderer path, the DDX get-word/notifier completion and physical dispatch of the GL draws are the walls | | **P3 — Sustained and multi-tenant** | Frame rates without assistance; multiple VMs sharing the GPU with measured fairness; soak-stable operation | Graphics M-GL4 (60 fps, no forcing) and M-GL5 (two VMs, two mdevs); CUDA battery + soak; per-guest execution isolation = rungs 4/5 | `[ahead]` | | **P4 — Breadth** | Video (NVENC/NVDEC), Windows/DirectX guests, live migration, non-KVM hypervisor transports | Per-case bring-up gates plus the matrix's evidence expectations | `[ahead]` | | **P5 — Scale and portability** | New GPU generations and driver families carried forward; published performance programme | A profile + measured delta per version, validated on hardware; A/B numbers published per the measurement contract | `[ahead]` | @@ -58,9 +58,11 @@ available (P5 runs across the whole plan). Ranked, in dependency order: 1. **Graphics pixels (P2).** The client and display stacks execute; the - named walls are the X GLX context-creation completion (`_nv018351rm` plus - the X DDX/GLX reply), the client kick-slot word, then non-black frames. - Full detail: [`Graphics-Execution.md`](Graphics-Execution.md) §6. + named walls are the NVIDIA renderer path (Vulkan ICD device creation or + forced GLX), the X DDX push-buffer get-word/notifier completion, the DDX's + 4 GB sysmem allocation (12 GB guest workaround), physical dispatch of the + GL draws (`forwarded=0`), then non-black frames. Full detail: + [`Graphics-Execution.md`](Graphics-Execution.md) §6. 2. **Compute hardening (P1).** The staged-transfer class (failure modes proven, fixes in flight); the every-boot acceptance campaign; per-guest execution isolation. Detail: @@ -73,9 +75,12 @@ Ranked, in dependency order: Recently closed, as evidence the gates work: the boot-poisoning defect and the post-reboot client-stall defect (compute reproducibility); the display/KMS -bring-up (NvKms registers, X settles, GL 4.6 and a real GZDoom GL context); -the UVM channel-pool tracker; the direct-GL GR release and CE ring discovery; -the X DDX kick-channel decode; and the guest Vulkan pipeline running end to +bring-up (NvKms registers, X settles, GL 4.6); the UVM channel-pool tracker; +the direct-GL GR release and CE ring discovery; the X DDX kick-channel decode +and its three wait fixes (class-aware display arm, `0x8000 -> 0` notification +completion, decoded GL release applied); GZDoom reaching renderer startup and +`MAP01` once the DDX push-buffer loop was unblocked (currently on Mesa +llvmpipe, not the emulated vGPU); and the guest Vulkan pipeline running end to end. ## 4. The gates |
