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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-11-09 19:05:16 -0500 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-11-09 19:05:16 -0500 |
| commit | 21e0d611b5efbdcf6a14520c3294d6a78bb32220 (patch) | |
| tree | 84f36e306b7b1a7b551075f578245765949b42e2 /wiki/Physical-GPU-Backend.md | |
| parent | e342bd0f6d813d246c698d19a5828e7f8d817183 (diff) | |
| download | open-iov-21e0d611b5efbdcf6a14520c3294d6a78bb32220.tar.gz open-iov-21e0d611b5efbdcf6a14520c3294d6a78bb32220.zip | |
wiki: 2026-11-09 evening refresh - X DDX waits fixed; GZDoom reaches MAP01 on llvmpipe
Refresh Project Status, Graphics Execution, OpenGL, Execution Frontier,
Execution Plane, Physical GPU Backend, Host Module, System Overview,
Project Goals, Project Plan and the FAQ, plus STATE-CURRENT and the Main
Page: the X DDX waits (class-aware display arm, 0x8000->0 notification
completion, decoded GL release) are fixed; GZDoom reaches MAP01 on Mesa
llvmpipe; the NVIDIA renderer path, the DDX get-word/notifier completion,
the DDX 4 GB sysmem footprint and physical dispatch of the GL draws are
the pixel walls. Published to open-iov.org.
Diffstat (limited to 'wiki/Physical-GPU-Backend.md')
| -rw-r--r-- | wiki/Physical-GPU-Backend.md | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/wiki/Physical-GPU-Backend.md b/wiki/Physical-GPU-Backend.md index 8f1a02b..4c86dc4 100644 --- a/wiki/Physical-GPU-Backend.md +++ b/wiki/Physical-GPU-Backend.md @@ -5,7 +5,7 @@ > guest-facing emulation. Canonical sources: [`../docs/03-architecture/08-physical-gpu-integration.md`](../docs/03-architecture/08-physical-gpu-integration.md) > and [`../docs/03-architecture/11-physical-backend-guest-wiring.md`](../docs/03-architecture/11-physical-backend-guest-wiring.md); the docs tree wins on disagreement. -Status: 2026-11-09, tree `master @ 4acc81e8`. Tags: `[live]` proven with the +Status: 2026-11-09, tree `master @ e342bd0f`. Tags: `[live]` proven with the stock guest driver; `[gated]` implemented default-off; `[wip]` partially built; `[wall]` current blocker; `[target]` planned end state. @@ -120,10 +120,13 @@ dispatches, the engine authors the completion, the host relays it, and the guest's synchronisation wait resolves — verified on fresh boots with the vector-add, matrix-multiply and transformer clients. Graphics work rides the same machinery in three shapes (a verbatim 3D method-stream replay, -synthesized launches, and the direct GL client's own GR/CE channels) and -executes on the engine; the display/KMS stack registers and X settles, so the -remaining graphics gate is the X GLX context-creation completion before -rendered pixels. The remaining compute work is the staged-transfer +synthesized launches, and the direct GL client's own GR/CE channels); the +captured and synthesized streams execute on the engine, and the direct GL +client's channels submit. The display/KMS stack registers, the X DDX waits are +fixed and X settles, so the remaining graphics gates are the NVIDIA renderer +path (Vulkan ICD or forced GLX), the DDX push-buffer get-word/notifier +completion, and physical dispatch of the client's draws (`forwarded=0`) +before rendered pixels. The remaining compute work is the staged-transfer class (under repair), the every-boot acceptance campaign, and per-guest execution isolation — see [`Execution-Frontier.md`](Execution-Frontier.md) and |