docs(wiki): 2026-11-15 status refresh - DS stage image authored+live (st0=st1=020a0481; DS 0x84000420, two boots); draw-issue mac=0x22 and stores remain; STATE-CURRENT snapshot

1 files changed, 12 insertions, 9 deletions

diff --git a/wiki/Execution-Plane.md b/wiki/Execution-Plane.md
index 7f6dd6b..567f41c 100644
--- a/wiki/Execution-Plane.md
+++ b/wiki/Execution-Plane.md
@@ -8,8 +8,7 @@
 > when the two disagree, the docs tree wins. Front door:
 > [`../docs/README.md`](../docs/README.md).
 
-Status: 2026-11-15, tree `master @ 444ae2c1` plus in-flight graphics changes in
-the working tree. Tags: `[live]` proven with the
+Status: 2026-11-15, tree `master @ 692a7eb0`. Tags: `[live]` proven with the
 stock guest driver; `[gated]` implemented, default-off or parameter-gated;
 `[wip]` partial; `[wall]` current blocker; `[target]` named success latch;
 `[planned]` designed, not built.
@@ -166,13 +165,17 @@ guest: push + QMD + GPFIFO entry + doorbell (BAR0 0x88704)
   chain now completes and executes the draw macro: multi-frame keep-windows
   land, the 2799-word pack completes, the first `MME-PACK-REARM` fires, the
   fixed-CB region is aliased, and `DRAW_IAB` (`mac=0x22`) runs with the
-  SPH-BIND prelude intact (84 words) and the DS stage VAs populated. No
-  non-black **window/screen** frame has been produced through the NVIDIA path
-  yet: the remaining gate is the DS stage-0/1 image (the synthesized binds
-  read `family+0x900`, zero in the live family page, while the client's VTG
-  SPH image is at `family+0x600`), so the draw never stores (`wrote=0`,
-  `px0=0`); the window/screen present is unproven, and the per-boot binding
-  plus X first-generation lottery is the throughput limiter. Those are the
+  SPH-BIND prelude intact (84 words) and the DS stage VAs populated. The DS
+  stage-0/1 image is now authored and live: a VTG SPH at `family+0x900`
+  (first word `020a0481`) is fetched by both vertex slots
+  (`DS-IMAGE st0=st1=020a0481`; DS fell `0x86040626 -> 0x84000420`,
+  reproduced on two boots). No non-black **window/screen** frame has been
+  produced through the NVIDIA path yet: the remaining DS bits are stage
+  type/context (SPH5/SPH10/SPH18), the 728-B draw window's released macros
+  (`0x33/0x39/0x1/0x0`) do not include the `DRAW_IAB` call, so the draw never
+  stores (`wrote=0`, `px0=0`); the window/screen present is unproven, and the
+  per-boot binding plus X first-generation lottery is the throughput limiter.
+  Those are the
   named blockers. The lanes and the ladder are on
   [`Graphics-Execution.md`](Graphics-Execution.md).