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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-11-15 14:11:01 -0500
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-11-15 14:11:01 -0500
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parent692a7eb0c5d13a2f4b22c5bdad80b3749c6cf7ef (diff)
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docs(wiki): 2026-11-15 status refresh - DS stage image authored+live (st0=st1=020a0481; DS 0x84000420, two boots); draw-issue mac=0x22 and stores remain; STATE-CURRENT snapshot
Diffstat (limited to 'wiki/Execution-Frontier.md')
-rw-r--r--wiki/Execution-Frontier.md48
1 files changed, 27 insertions, 21 deletions
diff --git a/wiki/Execution-Frontier.md b/wiki/Execution-Frontier.md
index 5f0acfc..1425aaf 100644
--- a/wiki/Execution-Frontier.md
+++ b/wiki/Execution-Frontier.md
@@ -14,8 +14,7 @@
> [`../docs/04-implementation/03-execution-frontier.md`](../docs/04-implementation/03-execution-frontier.md);
> the docs tree wins on disagreement.
-Status: 2026-11-15, tree `master @ 444ae2c1` plus in-flight graphics changes in
-the working tree.
+Status: 2026-11-15, tree `master @ 692a7eb0`.
Tags: `[live]` observed; `[wip]` partial; `[wall]` current blocker; theories
are labelled as such.
@@ -120,16 +119,20 @@ keep-windows land, the part-launch poison is eliminated (the client's own
real fault; they are redirected to a mapped scratch slot), the 2799-word pack
completes (2799/2799), the first `MME-PACK-REARM` fires, the fixed-CB region
is aliased, and `DRAW_IAB` (`mac=0x22`) runs with the SPH-BIND prelude intact
-(84 words) and the DS stage VAs populated. What is missing is
-**window/screen pixels through the NVIDIA path**: the DS stage-0/1 image is
-the last named gate (the synthesized binds read `family+0x900`, which is zero
-in the live family page, while the client's VTG SPH image is at
-`family+0x600`), so the draw never stores (`wrote=0`, `px0=0`); the
-window/screen present path is unproven, glxgears' window is black, and a
-synchronous window draw wedges X on some boots. The per-boot binding and X
-first-generation start lottery are now the dominant throughput limiter. The
-guest Vulkan pipeline's inline-to-memory upload arm is its gap. The full
-picture lives on [`Graphics-Execution.md`](Graphics-Execution.md).
+(84 words) and the DS stage VAs populated. The **DS stage-0/1 image is now
+authored and live**: a VTG SPH at `family+0x900` (`SPH-AUTHOR`, first word
+`020a0481`) is what both vertex slots fetch (`DS-IMAGE st0=st1=020a0481
+code=ff007321`), the window's own later slot-1 bind is rewritten to it, and
+the DS value fell `0x86040626 -> 0x84000420` (reproduced on two boots). What
+is missing is **window/screen pixels through the NVIDIA path**: the remaining
+DS bits are stage type/context (SPH5/SPH10/SPH18), the 728-B draw window's
+released macros (`0x33/0x39/0x1/0x0`) do not include `DRAW_IAB` (`mac=0x22`),
+so the draw still does not store (`wrote=0`, `px0=0`); the window/screen
+present path is unproven, glxgears' window is black, and a synchronous window
+draw wedges X on some boots. The per-boot binding and X first-generation
+start lottery are now the dominant throughput limiter. The guest Vulkan
+pipeline's inline-to-memory upload arm is its gap. The full picture lives on
+[`Graphics-Execution.md`](Graphics-Execution.md).
No breadth beyond these is claimed: Windows guests, migration and performance
numbers remain planned.
@@ -198,10 +201,12 @@ captures and reaches the engine. The MME chain now completes and executes the
draw macro: multi-frame keep-windows land, the 2799-word pack completes, the
first `MME-PACK-REARM` fires, the fixed-CB region is aliased, and `DRAW_IAB`
(`mac=0x22`) runs with the SPH-BIND prelude intact and the DS stage VAs
-populated. The remaining gap is the **DS stage-0/1 image** (the synthesized
-binds read `family+0x900`, which is zero in the live family page, while the
-client's VTG SPH image is at `family+0x600`; the `+0x600` bind is in flight)
-so the draw stores. glxgears' window is black, a window draw wedges X on some
+populated. The **DS stage-0/1 image is now authored and live** (a VTG SPH at
+`family+0x900`, fetched by both vertex slots as `st0=st1=020a0481`; DS fell
+`0x86040626 -> 0x84000420`, reproduced on two boots); the remaining bits are
+stage type/context (SPH5/SPH10/SPH18), and the 728-B window's released macros
+(`0x33/0x39/0x1/0x0`) do not include the `DRAW_IAB` call, so the draws still
+do not store. glxgears' window is black, a window draw wedges X on some
boots, and the per-boot binding plus X first-generation start lottery is the
dominant throughput limiter
([`Graphics-Execution.md`](Graphics-Execution.md)).
@@ -218,11 +223,12 @@ dominant throughput limiter
4. **Hold the acceptance battery** — vector-add, matrix-multiply and the
transformer kernel; each entry is accepted only on its own verification
output (`bad=0` + `STATUS OK`).
-5. **The graphics pixel frontier** — finish the DS stage-0/1 image bind
- (`family+0x600`) so the executed `DRAW_IAB` macro stores (`wrote>0`) at the
- bound render target, then make the window/screen present land, and reduce
- the per-boot binding/X start lottery so the proven off-screen frames become
- window pixels; the lanes, the walls and the milestone ladder are on
+5. **The graphics pixel frontier** — the DS stage image is authored and live
+ for both vertex slots; next get the draw-issue `DRAW_IAB` (`mac=0x22`) call
+ into the window so it stores (`wrote>0`) at the bound render target, then
+ make the window/screen present land, and reduce the per-boot binding/X
+ start lottery so the proven off-screen frames become window pixels; the
+ lanes, the walls and the milestone ladder are on
[`Graphics-Execution.md`](Graphics-Execution.md).
## 7. Theories, resolved