diff options
| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-05 19:34:47 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-05 19:34:47 -0400 |
| commit | b5d3a466bc403fb4b81ed4902572d8be0b807c83 (patch) | |
| tree | 6f0112bb94a7a8f1b8d97ab41327cc79bcd4ac0a /userspace/extern/src/cargs.c | |
| parent | 48544a45fd2258e0b00b1aa498de16fbc20aa9ab (diff) | |
| download | open-iov-b5d3a466bc403fb4b81ed4902572d8be0b807c83.tar.gz open-iov-b5d3a466bc403fb4b81ed4902572d8be0b807c83.zip | |
vgsp: golden9e - all ctx buffers FBMEM and every promoted VA PDB-mapped
The golden9c cycle reached the server context init and then the GR ctxsw
timed out (FECS_A/B TDR) with host-sysmem MAIN/PATCH/FECS/PRIV/UNR and
unmapped promoted VAs; the golden9d FBMEM test ran on a boot left dirty
by golden9c and its 0x1f is not attributable. The real golden wire carried
FBMEM (physAttr=4) for every ctx buffer, so:
- allocate PATCH/FECS/PRIV/UNR as server FBMEM (PATCH sized by the engine
geometry query) in gr_ctx_prepare before the PDB build (mode 25 only);
- map PATCH/FECS/PRIV/UNR at their promoted VAs with VIDMEM PTEs in the
same 2 MB window as MAIN;
- move the FECS/PRIV/UNR and VA-only 3D global VAs into that window and
give the PA-backed entries PHYS_ATTR_FB.
golden9d's FBMEM channel memdescs are kept.
Diffstat (limited to 'userspace/extern/src/cargs.c')
0 files changed, 0 insertions, 0 deletions
