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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-06 23:02:45 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-06 23:02:45 -0400 |
| commit | 8577a4d51ee1854f100b9eac0406efb8dedab5db (patch) | |
| tree | fdd2e78dd602478ac0bcc6ee6f87d06bcc4e56bd /userspace/cuda/tools/ghidra/DecompileAt.java | |
| parent | 3a163f9b65c2d9f50d84f3fb4a738cba09acb567 (diff) | |
| download | open-iov-8577a4d51ee1854f100b9eac0406efb8dedab5db.tar.gz open-iov-8577a4d51ee1854f100b9eac0406efb8dedab5db.zip | |
tools: durable BAR0 GR register sampler + analyzer (gr-regs/)
reg_sampler.py: high-rate read-only MMIO sampler for the physical GPU's
PGRAPH/FECS/SKED/PFIFO registers (FECS current-context valid + pointer,
SKED CWD table occupancy/activity, GRFIFO, FE QMD-virt, PMC_ENABLE) with
analyze_regs.py for value distributions and transition timelines. Recorded
ground truth and register semantics in tools/gr-regs/README.md. Used to
capture the live distro-driver CUDA reference (FECS VALID=1, CWD table
0x3f002000 while running) and to observe the ladder's forwarded launch
(CWD entry + SKED processing after the mode-35 lane enable).
Diffstat (limited to 'userspace/cuda/tools/ghidra/DecompileAt.java')
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