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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-11-01 14:17:09 -0500
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-11-01 14:17:09 -0500
commitf14eccc0cdc92214fb691480737dc0ff36d65afa (patch)
tree4aa57280327cc70b537b7a91add662d277c9b6a6 /tools
parent0c18f09e8aba7d1c4a37e4bddaa6915d8a21b431 (diff)
downloadopen-iov-f14eccc0cdc92214fb691480737dc0ff36d65afa.tar.gz
open-iov-f14eccc0cdc92214fb691480737dc0ff36d65afa.zip
vgsp: CONT-96 - secondary COPY0 lane (own TSG 0xcaf000c8 + V5-shape channel 0xcaf000cc engineType 9 on same ladder VAS, own symem memdescs, GPFIFO/PB small-PT slots 0x10d/0x10e, full COPY0 BIND/schedule/token seq, 0xc5b5 copy submit; gsp_phys_rmcall_ce_lane default 1 best-effort); engine-ctx readback MAIN 307p + PATCH 5p = 1277952 B; gsp-phys-ctx-read 0200 re-arm; rmcall_ctx_valid fix (mode-35 F2 promote; was silently 0) - DECISIVE: engine ctx IS golden-initialized: CTX-READBACK pa=0x1f4000000 copied=1277952 bytes on CE lane, head 00000000 000f2d00 00000006 cafe0000 02340000 02200000 02350000 (54800 nonzero bytes MAIN, PATCH 95 PGRAPH addr<-value golden pairs); CE lane READY token=0x2 runlistId=0 chId=0x2 gpFifoVa=0x10d000 pbVa=0x10e000 valid=1; new negative: no SET_PIPELINE_SHADER for j=9/10/11 anywhere in 8GiB guest RAM yet DS SPH {9,11} fail invariantly; GATE1 black ds=a6000e20 sph=0,01990900,01990200 0/901 pages; next: background cat gsp-phys-ds-spy 15-20s before beef lane's first window (hit path prints esr/esr2 + REGION_A/B + all 6 SPH stage LO/UP + esr_after naming invariant slots 9/11); pgraph-rw A/B (golden PATCH DS writes 0x405830<-0x700 0x40585c<-0x800) - SESSION 153 r1324-r1325
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