STATE-CURRENT: 2026-10-07 ~01:15 snapshot - 0xc5c0 construct GREEN + forwarded QMD enqueues/schedules; engine-core execution is the remaining wall

(a) The TSG+share lane's compute-object construct returns success after a
10-entry VA-only booking promote books the server's per-VAS ctx-buffer maps
(a mapped MAIN promote alone leaves them unbooked because the construct
skips its own mapping once MAIN is initialized).
(b) The forwarded guest QMD now enqueues and is scheduled: the missing
real-client step was the lane-enable tail (CILP preemption mode, timeslice
0x800, device scheduling enable); the front-end deposit, the scheduler CWD
entry (QMD id) and the engine-context load (VALID) all appear.
Register ground truth from the working distribution driver during live CUDA
plus the read-only sampler/analyzer are committed under tools/gr-regs/.
Remaining wall: the GR engine core does not execute the scheduled QMD (no
release written anywhere, no visible fault); ranked next moves in the
local handoff. Host clean, GPU green, no reboots.

0 files changed, 0 insertions, 0 deletions