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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 12:48:02 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 12:48:02 -0400 |
| commit | 1052a4162a7b4440ed7b55cbebccebc5577ba0ee (patch) | |
| tree | f20c7a2f10acdc61a846ede0254ae999b0971fcc /tools | |
| parent | 9200f35a11df0c021c08f55fbc04e08ac7c702a6 (diff) | |
| download | open-iov-1052a4162a7b4440ed7b55cbebccebc5577ba0ee.tar.gz open-iov-1052a4162a7b4440ed7b55cbebccebc5577ba0ee.zip | |
gr-regs: sample the faulting TPCs' SM HWW_WARP_ESR/ESR_INFO registers
GPC0/TPC0 and GPC1/TPC0 raised the exception (GPC_EXCEPTION bit16 = TPC0
bitmap). SM warp ESR registers (TPC aperture = GPC base + 0x4000 +
tpc*0x800; SM stride 0x80; ESR 0x730, INFO 0x76c) at 0x504730.. and 0x50c730..
carry the exact error code (ILLEGAL_INSTR_ENCODING 0x9, INVALID_CONST_ADDR_LDC
0x12, MMU_FAULT 0x17, MISALIGNED_PC 0x5, ...) plus the VEID/warp info.
Diffstat (limited to 'tools')
| -rw-r--r-- | tools/gr-regs/reg_sampler.py | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/tools/gr-regs/reg_sampler.py b/tools/gr-regs/reg_sampler.py index e66a299..bce8c0f 100644 --- a/tools/gr-regs/reg_sampler.py +++ b/tools/gr-regs/reg_sampler.py @@ -38,7 +38,14 @@ REGS = [ (0x40013C, "PGRAPH_INTR_EN"), (0x502C90, "GPC0_EXCEPTION"), (0x502C84, "GPC0_ACTIVITY1"), + (0x504730, "G0T0S0_WARP_ESR"), + (0x50476C, "G0T0S0_ESR_INFO"), + (0x5047B0, "G0T0S1_WARP_ESR"), + (0x504830, "G0T0S2_WARP_ESR"), + (0x5048B0, "G0T0S3_WARP_ESR"), (0x50AC90, "GPC1_EXCEPTION"), + (0x50C730, "G1T0S0_WARP_ESR"), + (0x50C76C, "G1T0S0_ESR_INFO"), (0x512C90, "GPC2_EXCEPTION"), (0x51AC90, "GPC3_EXCEPTION"), (0x522C90, "GPC4_EXCEPTION"), |