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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 11:05:24 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 11:05:24 -0400 |
| commit | ab6fed7ee35a114541373af90184acde9bd94b6b (patch) | |
| tree | e06e5ecd04e65f7344211a6ccc87409213e8a5ec /scripts/debug_guest_init.sh | |
| parent | 2520bdb490398c1190d53fbd700ecba178fe8bb9 (diff) | |
| download | open-iov-ab6fed7ee35a114541373af90184acde9bd94b6b.tar.gz open-iov-ab6fed7ee35a114541373af90184acde9bd94b6b.zip | |
gr-regs/vgsp: sample PGRAPH_INTR + PGRAPH_INTR_EN at the dispatch window
The m75/m78/m79 launch windows show FECS_CTXSW_STATUS_FE_0.GR_INTR_REQ
(bit17) asserted through the SKED CWD ACTIVE state and a following CTXSW_REQ
(bit0) that results in the context save/unload. The real driver carries
GR_INTR only transiently during its context load and clears it before ACTIVE.
The PGRAPH interrupt latch (0x400100) names what the engine is signaling
(e.g. ILLEGAL_METHOD bit4, SEMAPHORE bit1, NOTIFY); sampled by the external
sampler and dumped in the launch post-mortem.
Diffstat (limited to 'scripts/debug_guest_init.sh')
0 files changed, 0 insertions, 0 deletions