vgsp: srv_ctxcommit mode 2 (V6 client combined init+VA entry)

Make gsp_phys_rmcall_srv_ctxcommit an int mode: 1 (default) = map +
INITIALIZE_CTX + UVM-shape VA-only promote; 2 = V6 client variant, no
INITIALIZE_CTX and one combined PA+VA MAIN entry with bInitialize=1 and
bNonmapped=0 so the first ctxsw initializes from the golden image; 0 = pure
server-managed. Lets the next supervised cycle bisect both entry shapes
without a rebuild. Build clean; not hardware-tested (GPU wedged).

3 files changed, 46 insertions, 15 deletions

diff --git a/kernel/gsp_phys_booter.c b/kernel/gsp_phys_booter.c
index 8a27edf..af91968 100644
--- a/kernel/gsp_phys_booter.c
+++ b/kernel/gsp_phys_booter.c
@@ -9183,7 +9183,8 @@ static int gsp_phys_rmcall_srv_ctx_commit(void __iomem *bar0)
 	 * PA-only.
 	 */
 	if (!boot_stage.rmcall_srv_ctxva ||
-	    boot_stage.rmcall_srv_ctxva_client) {
+	    (boot_stage.rmcall_srv_ctxva_client &&
+	     gsp_phys_srv_ctxcommit_mode() != 2)) {
 		ic = kvzalloc(sizeof(*ic), GFP_KERNEL);
 		if (!ic)
 			return -ENOMEM;
@@ -9259,6 +9260,25 @@ static int gsp_phys_rmcall_srv_ctx_commit(void __iomem *bar0)
 	if (boot_stage.rmcall_srv_ctxva) {
 		u32 n = 0;
 
+		if (boot_stage.rmcall_srv_ctxva_client &&
+		    gsp_phys_srv_ctxcommit_mode() == 2) {
+			/*
+			 * V6 client variant: one combined PA+VA MAIN entry with
+			 * bInitialize=1 and bNonmapped=0 (the init half plus the
+			 * promote half of kgrobjPromoteContext) and no separate
+			 * INITIALIZE_CTX, so the first ctxsw initializes the
+			 * context from the golden image instead of restoring the
+			 * zeroed client image.
+			 */
+			gsp_phys_rmcall_promote_entry_fill(p, n++, 0,
+					main_pa, boot_stage.rmcall_ctx_va,
+					main_size, pa_attr, 1, 0);
+			p->entry_count = cpu_to_le32(n);
+			pr_info("vgsp-boot: rm-call: V6 client combined MAIN entry: pa=0x%llx va=0x%llx size=0x%llx attr=0x%x bInitialize=1 bNonmapped=0\n",
+				main_pa, boot_stage.rmcall_ctx_va,
+				main_size, pa_attr);
+			goto gr_promote_send;
+		}
 		if (boot_stage.rmcall_srv_patch_valid)
 			gsp_phys_rmcall_promote_entry_fill(p, n++, 2,
 					0, GSP_PHYS_RMCALL_VA_GR_PATCH,
@@ -9280,6 +9300,7 @@ static int gsp_phys_rmcall_srv_ctx_commit(void __iomem *bar0)
 				main_pa, 0, main_size, pa_attr, 1, 1);
 		p->entry_count = cpu_to_le32(1);
 	}
+gr_promote_send:
 	rpc_result = 0;
 	status = 0;
 	ret = gsp_phys_rmcall_control(bar0, boot_stage.rmcall_subdevice,
diff --git a/kernel/gsp_phys_gpu.c b/kernel/gsp_phys_gpu.c
index 54fa84a..1bb6f1d 100644
--- a/kernel/gsp_phys_gpu.c
+++ b/kernel/gsp_phys_gpu.c
@@ -182,24 +182,32 @@ bool gsp_phys_srv_ctxbuf_value(void)
 EXPORT_SYMBOL_GPL(gsp_phys_srv_ctxbuf_value);
 
 /*
- * Server-managed GR context client commit (default 1). On the
- * gsp_phys_srv_ctxbuf path the ladder sends GPU_INITIALIZE_CTX + a PA-only
- * GPU_PROMOTE_CTX for the server-reported MAIN context buffer. Set 0 to test
- * the pure server-managed shape: the GSP-RM allocated/mapped/committed the
- * context itself and no client control is sent.
+ * Server-managed GR context client-commit mode. 1 (default): map the
+ * server/client MAIN at the ladder ctx VA, GPU_INITIALIZE_CTX installs the
+ * memdesc, then the UVM-shape VA-only promote (bInitialize=0). 2 = client
+ * (V6) variant only: no INITIALIZE_CTX and one combined PA+VA MAIN entry
+ * with bInitialize=1, bNonmapped=0 (the init half plus the promote half), so
+ * the first ctxsw initializes from the golden image. 0 = pure
+ * server-managed, no client controls.
  */
-static bool gsp_phys_srv_ctxcommit_param = true;
+static int gsp_phys_srv_ctxcommit_param = 1;
 module_param_named(gsp_phys_rmcall_srv_ctxcommit, gsp_phys_srv_ctxcommit_param,
-		   bool, 0644);
+		   int, 0644);
 MODULE_PARM_DESC(gsp_phys_rmcall_srv_ctxcommit,
-		 "On the server-managed GR ctx path send GPU_INITIALIZE_CTX + PA-only GPU_PROMOTE_CTX for the server MAIN (default 1); 0 = pure server-managed, no client promote");
+		 "Server-managed GR ctx client commit: 1 = INITIALIZE_CTX + VA-only promote (default), 2 = V6 client combined init+VA entry without INITIALIZE_CTX, 0 = none");
 
 bool gsp_phys_srv_ctxcommit_value(void)
 {
-	return gsp_phys_srv_ctxcommit_param;
+	return gsp_phys_srv_ctxcommit_param != 0;
 }
 EXPORT_SYMBOL_GPL(gsp_phys_srv_ctxcommit_value);
 
+int gsp_phys_srv_ctxcommit_mode(void)
+{
+	return gsp_phys_srv_ctxcommit_param;
+}
+EXPORT_SYMBOL_GPL(gsp_phys_srv_ctxcommit_mode);
+
 /*
  * Force one channel-alloc variant id on the GR ladder (default 0 = the
  * promote-mode-selected default). 5 = V5 (client memdescs, no skip-ctxbuffer;
diff --git a/kernel/gsp_phys_gpu.h b/kernel/gsp_phys_gpu.h
index d3751c5..ad99c7d 100644
--- a/kernel/gsp_phys_gpu.h
+++ b/kernel/gsp_phys_gpu.h
@@ -81,13 +81,15 @@ bool gsp_phys_ctrl_forward_enabled(void);
 bool gsp_phys_srv_ctxbuf_value(void);
 
 /*
- * True when the gsp_phys_rmcall_srv_ctxcommit parameter is set (default 1).
- * On the server-managed ctx-buffer path (gsp_phys_srv_ctxbuf=1) the ladder
- * sends GPU_INITIALIZE_CTX + a PA-only GPU_PROMOTE_CTX for the server-reported
- * MAIN buffer. Set 0 to run the pure server-managed shape (no client promote
- * at all) for bisection.
+ * gsp_phys_rmcall_srv_ctxcommit mode (default 1). On the server-managed
+ * ctx-buffer path (gsp_phys_srv_ctxbuf=1) the ladder maps the MAIN at the
+ * ctx VA and commits it: 1 = GPU_INITIALIZE_CTX + UVM-shape VA-only
+ * GPU_PROMOTE_CTX; 2 = V6 client variant, one combined PA+VA MAIN entry with
+ * bInitialize=1 and no INITIALIZE_CTX; 0 = pure server-managed, no client
+ * controls. gsp_phys_srv_ctxcommit_value() is true for any nonzero mode.
  */
 bool gsp_phys_srv_ctxcommit_value(void);
+int gsp_phys_srv_ctxcommit_mode(void);
 
 /*
  * gsp_phys_rmcall_channel: force one channel-alloc variant id on the GR