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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 11:46:49 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 11:46:49 -0400 |
| commit | 4409247a4fc5cd5c0db6b85f157f85fcd962c51a (patch) | |
| tree | d5a090c540ba87cdf14af9316fbb58ebfac7aa42 /kernel | |
| parent | b6a60cd1c7e188325c7b2e0c1ceb7e86ad5e9e74 (diff) | |
| download | open-iov-4409247a4fc5cd5c0db6b85f157f85fcd962c51a.tar.gz open-iov-4409247a4fc5cd5c0db6b85f157f85fcd962c51a.zip | |
vgsp: m85 ext - fill-map image probe over 12 offsets across the whole context image
The probe now copies the header, VEID0 subctx header and ten pages spread from
0x1000 to 0xf0000, printing a nonzero-word count and first words per page, so
one ladder run shows whether the golden image is actually populated across its
0xf2d00 span (the GPC slices load from it).
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/gsp_phys_booter.c | 52 |
1 files changed, 35 insertions, 17 deletions
diff --git a/kernel/gsp_phys_booter.c b/kernel/gsp_phys_booter.c index bc0156f..d7ba43d 100644 --- a/kernel/gsp_phys_booter.c +++ b/kernel/gsp_phys_booter.c @@ -14429,7 +14429,16 @@ static void gsp_phys_rmcall_ctx_image_probe(void __iomem *bar0) struct gsp_phys_boot_chunk *dst = &boot_stage.rmcall_chunks[GSP_PHYS_RMCALL_BUF_DST]; struct gsp_phys_rmcall_ce_submit sub; - u64 regions[2]; + /* + * m86 fill-map update: the header, the VEID0 subctx header, then pages + * spread across the whole image; each page's nonzero-word count shows + * whether the golden image is actually populated at that offset. + */ + static const u64 offs[] = { + 0x0ULL, 0xf3000ULL, 0x1000ULL, 0x2000ULL, 0x4000ULL, + 0x8000ULL, 0x10000ULL, 0x20000ULL, 0x40000ULL, 0x80000ULL, + 0xc0000ULL, 0xf0000ULL, + }; u32 bind_params; int r; @@ -14449,20 +14458,20 @@ static void gsp_phys_rmcall_ctx_image_probe(void __iomem *bar0) status, rpc_result, r); } - regions[0] = GSP_PHYS_RMCALL_VA_GR_CTX; /* image header */ - regions[1] = GSP_PHYS_RMCALL_VA_GR_CTX + 0xf3000ULL; /* subctx hdr VEID0 */ if (!r) { u32 k; - for (k = 0; k < 2; k++) { + for (k = 0; k < ARRAY_SIZE(offs); k++) { + u64 va = GSP_PHYS_RMCALL_VA_GR_CTX + offs[k]; u32 rpc_result = 0, status = 0, poll = 0; unsigned long deadline; u8 *d; + u32 i, nz = 0; WRITE_ONCE(*(u32 *)gsp_phys_chunk_page_va(sem, 0), 0); wmb(); - r = gsp_phys_rmcall_ce_submit_locked(bar0, - regions[k], GSP_PHYS_RMCALL_VA_DST, + r = gsp_phys_rmcall_ce_submit_locked(bar0, va, + GSP_PHYS_RMCALL_VA_DST, GSP_PHYS_RMCALL_VA_SEM, GSP_PHYS_PAGE_SIZE, GSP_PHYS_RMCALL_SEM_PAYLOAD, false, @@ -14470,8 +14479,8 @@ static void gsp_phys_rmcall_ctx_image_probe(void __iomem *bar0) (void)rpc_result; (void)status; if (r) { - pr_err("vgsp-boot: rm-call: m84 image probe: CE submit for region %u refused (%d)\n", - k, r); + pr_err("vgsp-boot: rm-call: m84 image probe: CE submit for offset 0x%llx refused (%d)\n", + offs[k], r); break; } deadline = jiffies + @@ -14481,8 +14490,8 @@ static void gsp_phys_rmcall_ctx_image_probe(void __iomem *bar0) if (poll == GSP_PHYS_RMCALL_SEM_PAYLOAD) break; if (time_after_eq(jiffies, deadline)) { - pr_err("vgsp-boot: rm-call: m84 image probe: region %u CE copy TIMEOUT (sem=0x%08x) - an engine-side walk of VA 0x%llx failed or the CE did not run\n", - k, poll, regions[k]); + pr_err("vgsp-boot: rm-call: m84 image probe: offset 0x%llx CE copy TIMEOUT (sem=0x%08x)\n", + offs[k], poll); break; } msleep(GSP_PHYS_RMCALL_POLL_MS); @@ -14492,14 +14501,23 @@ static void gsp_phys_rmcall_ctx_image_probe(void __iomem *bar0) d = gsp_phys_chunk_page_va(dst, 0); if (!d) break; - pr_info("vgsp-boot: rm-call: m84 image probe: region %u VA=0x%llx copied OK\n", - k, regions[k]); - { - u32 i; - + for (i = 0; i < GSP_PHYS_PAGE_SIZE / 4; i++) + if (get_unaligned_le32(d + i * 4)) + nz++; + pr_info("vgsp-ctximg: offset 0x%06llx nonzero=%u/%u first=%08x %08x %08x %08x %08x %08x %08x %08x\n", + offs[k], nz, GSP_PHYS_PAGE_SIZE / 4, + get_unaligned_le32(d), + get_unaligned_le32(d + 4), + get_unaligned_le32(d + 8), + get_unaligned_le32(d + 12), + get_unaligned_le32(d + 16), + get_unaligned_le32(d + 20), + get_unaligned_le32(d + 24), + get_unaligned_le32(d + 28)); + if (offs[k] == 0ULL || offs[k] == 0xf3000ULL) { for (i = 0; i < 0x80; i += 8) - pr_info("vgsp-ctximg[%u] [%03x] = %08x %08x %08x %08x %08x %08x %08x %08x\n", - k, i * 4, + pr_info("vgsp-ctximg[%03llx] = %08x %08x %08x %08x %08x %08x %08x %08x\n", + offs[k] + i * 4, get_unaligned_le32(d + i * 4), get_unaligned_le32(d + (i + 1) * 4), get_unaligned_le32(d + (i + 2) * 4), |
