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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-06 23:24:32 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-06 23:24:32 -0400 |
| commit | 1448acfa25b3dcd7884af1c1201afce6229928da (patch) | |
| tree | ee1bf4bc2766bbfc942187d0a01f0b666b7b71b5 /kernel | |
| parent | 4e55a8fab5e274aec72c10c6ca2967d631f934af (diff) | |
| download | open-iov-1448acfa25b3dcd7884af1c1201afce6229928da.tar.gz open-iov-1448acfa25b3dcd7884af1c1201afce6229928da.zip | |
vgsp: m67 diagnostics - post-mortem page table, QMD w16..w31, shadow page contents
m66's forced sysmem fault buffers were refused by the server (ALLOC_MEMORY
0x1f, assert 0x5ab0214), so the engine-fault path stays FBMEM. Instead dump
everything that decides whether the engine can execute the scheduled QMD:
the resolved page table (guest VA -> HPA per QMD pointer), the QMD's
w16..w31 (QMD/SASS version, thread dimensions, register count) and the
first words of every Tier-2 shadow page the QMD's param/program pointers
were rewritten to (proves whether the SASS/params actually landed there).
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/gsp_phys_booter.c | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/kernel/gsp_phys_booter.c b/kernel/gsp_phys_booter.c index 8d865c3..47068c4 100644 --- a/kernel/gsp_phys_booter.c +++ b/kernel/gsp_phys_booter.c @@ -16325,6 +16325,50 @@ gr_page_unmapped: p1[0], p1[1], p1[2], p1[3], p1[4], p1[5], p1[6], p1[7]); } + { + u8 *qp2 = qmd_dst_mem ? qmd_dst_mem : + (req->qmd_hpa ? + (u8 *)__va(req->qmd_hpa) : + NULL); + u32 i; + + if (qp2) + pr_info("vgsp-gr: post-mortem qmd w16..w31 = %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x\n", + get_unaligned_le32(qp2 + 64), + get_unaligned_le32(qp2 + 68), + get_unaligned_le32(qp2 + 72), + get_unaligned_le32(qp2 + 76), + get_unaligned_le32(qp2 + 80), + get_unaligned_le32(qp2 + 84), + get_unaligned_le32(qp2 + 88), + get_unaligned_le32(qp2 + 92), + get_unaligned_le32(qp2 + 96), + get_unaligned_le32(qp2 + 100), + get_unaligned_le32(qp2 + 104), + get_unaligned_le32(qp2 + 108), + get_unaligned_le32(qp2 + 112), + get_unaligned_le32(qp2 + 116), + get_unaligned_le32(qp2 + 120), + get_unaligned_le32(qp2 + 124)); + for (i = 0; i < req->n_pages && i < 16; i++) + pr_info("vgsp-gr: post-mortem page[%u] va=0x%llx hpa=0x%llx qmd_word=%u\n", + i, req->pages[i].guest_va, + req->pages[i].hpa, + req->pages[i].qmd_word); + for (i = 0; i < n_shadow && i < 16; i++) { + const u32 *sp = + gsp_phys_chunk_page_va( + &boot_stage.rmcall_gr_shadow, + i); + + if (sp) + pr_info("vgsp-gr: post-mortem shadow[%u] w0..7 = %08x %08x %08x %08x %08x %08x %08x %08x\n", + i, sp[0], sp[1], + sp[2], sp[3], + sp[4], sp[5], + sp[6], sp[7]); + } + } if (bar0) pr_info("vgsp-gr: FE readback raw 0x40a500..0x40a50c = %08x %08x %08x %08x (subctx-1 control at 0x40a504)\n", ioread32(bar0 + 0x0040a500u), |