vgsp: end-to-end CUDA acceptance in the guest

The no-claim emulation path now runs a stock CUDA program end to end:
device properties, cudaMalloc, a GPU-authored string kernel read back
byte-for-byte, two 4 MB host-to-device copies, a 1 M-element vectorAdd
executed on the physical GPU through the host bridge, and the
device-to-host copy-back verified element by element. Three consecutive
supervised cycles report MAIL + VADD bad=0 checksum=392344090.500000 +
STATUS OK with identical input/output hashes.

Two data-path correctness fixes make the transfers sound:

- Once-only op execution per GPFIFO entry. The pump replays recently
  consumed ring entries when translation batches are injected so missed
  releases can land; re-executing a CE copy is not idempotent because
  its source is a client staging buffer that may have been refilled.
  Slots now record their raw entry words and a replayed entry matching
  that identity suppresses operations while still processing releases.

- Per-page translation of virtual operands. svc_copy resolved only the
  first page of a VA range and walked the PA linearly; client staging
  ranges are frequently split (observed 195 + 61 pages), so the tail of
  alternating chunks was read from unrelated memory. Multi-page copies
  now re-resolve each 4 KB page through the trusted resolver.

Also carries the earlier uncommitted emulation fixes that got the client
to the launch (QMD address-window gate, counter registration
persistence, 512 MiB emulated FB, bridge slot hygiene) and bounded
diagnostics (sema-bigop, sema-bigcopy, bridge-in/out hashes, daemon
INCHECK/OUTCHECK/dumps).

1 files changed, 9 insertions, 9 deletions

diff --git a/kernel/gsp_rm_emulation.c b/kernel/gsp_rm_emulation.c
index 1f636de..f123792 100644
--- a/kernel/gsp_rm_emulation.c
+++ b/kernel/gsp_rm_emulation.c
@@ -1054,11 +1054,12 @@ static void gsp_rm_build_static_info(u8 *buf)
 	/* fbRegionInfoParams (offset 344, 776 bytes) */
 	p = buf + TU104_GSCI_OFF_fbRegionInfoParams;
 	val32 = 1;		memcpy(p, &val32, 4);		/* numFBRegions = 1 */
-	/* Region 0: base=0, limit=256MB-1, reserved=0 */
+	/* Region 0: base=0, limit=512MB-1, reserved=0 */
 	{
 		struct tu104_fb_region *region = (void *)(p + 8); /* 8-aligned */
 		val64 = 0;		memcpy(&region->base, &val64, 8);
-		val64 = 0x0FFFFFFF;	memcpy(&region->limit, &val64, 8);
+		val64 = (NV_VGPU_EMUL_FB_SIZE - 1);
+		memcpy(&region->limit, &val64, 8);
 		val64 = 0;		memcpy(&region->reserved, &val64, 8);
 		val32 = 0;		memcpy(&region->performance, &val32, 4);
 		region->supportCompressed = 0;
@@ -1096,9 +1097,9 @@ static void gsp_rm_build_static_info(u8 *buf)
 	/* poisonFuseEnabled (offset 1216, 1 byte) */
 	buf[TU104_GSCI_OFF_poisonFuseEnabled] = 0;
 
-	/* fb_length (offset 1224, 8 bytes) - 256MB (512MB broke the FWSEC
-	 * WPR2-location check below). */
-	val64 = 0x10000000ULL;
+	/* fb_length (offset 1224, 8 bytes) - 512MB. Kept in lockstep with
+	 * NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE and wpr2_addr_lo. */
+	val64 = NV_VGPU_EMUL_FB_SIZE;
 	memcpy(buf + TU104_GSCI_OFF_fb_length, &val64, 8);
 
 	/* fbio_mask (offset 1232, 8 bytes) - 8 FBIOs for 256-bit bus */
@@ -1166,7 +1167,7 @@ static void gsp_rm_build_static_info(u8 *buf)
 	/* fwWprLayoutOffset (offset 1640, 16 bytes): nonWprHeapOffset, frtsOffset */
 	val64 = 0;
 	memcpy(buf + TU104_GSCI_OFF_fwWprLayoutOffset, &val64, 8);
-	val64 = 0xFE00000;	/* frtsOffset = fbSize - 2MB (256MB) */
+	val64 = NV_VGPU_EMUL_FB_SIZE - 0x200000; /* frtsOffset = fbSize - 2MB */
 	memcpy(buf + TU104_GSCI_OFF_fwWprLayoutOffset + 8, &val64, 8);
 }
 
@@ -1245,7 +1246,7 @@ static void gsp_rm_handle_get_static_info(struct gsp_emu_context *ctx,
 
 	nv_vgpu_info(ctx->vgpu, "vgsp-rm: GET_GSP_STATIC_INFO seq=%u -> %u bytes (fb=%lluMB, engines=0x%x/0x%x)",
 		     sequence, TU104_GSCI_SIZE,
-		     0x10000000ULL >> 20, 0x60003E02, 0x362020);
+		     (unsigned long long)(NV_VGPU_EMUL_FB_SIZE >> 20), 0x60003E02, 0x362020);
 
 	if (gsp_rm_send(ctx, GSPRM_RPC_FUNC_GET_GSP_STATIC_INFO, sequence, 0,
 			reply, TU104_GSCI_SIZE))
@@ -1992,8 +1993,7 @@ static void gsp_rm_handle_kgr_get_context_buffers_info(
  */
 static u32 tu104_fb_info_data(struct gsp_emu_context *ctx, u32 index)
 {
-	struct nv_vgpu_device *vgpu = ctx->vgpu;
-	u64 fb = vgpu->fb_size ? vgpu->fb_size : NV_VGPU_BAR1_SIZE;
+	u64 fb = NV_VGPU_EMUL_FB_SIZE;
 
 	switch (index) {
 	case TU104_FB_INFO_IDX_TILE_REGION_COUNT: