diff options
| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 09:40:24 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 09:40:24 -0400 |
| commit | 60bb3c64d2c8ed3eb9e974c17229c822fe5b1788 (patch) | |
| tree | ada23fe685029b185f21a84111e1e2d248b9da7c /kernel/gsp_phys_gpu.h | |
| parent | 332be5337d49a45317a9b7e0381eb8f1749fbcb7 (diff) | |
| download | open-iov-60bb3c64d2c8ed3eb9e974c17229c822fe5b1788.tar.gz open-iov-60bb3c64d2c8ed3eb9e974c17229c822fe5b1788.zip | |
vgsp: m72/m73 - local-memory context block (SKEDCHECK05 fix), SKED transition recorder, sysmem instance selector
m72: append the vendor turingLocalMemUpdate block (SET_SHADER_LOCAL_MEMORY_A/B
0x790/0x794, NON_THROTTLED_A/B 0x2e4/0x2e8, WINDOW_A/B 0x7b0/0x7b4) to the
forwarded GR launch prelude; without it the channel local-memory state is zero
and the m64-m69 sampler shows SKED_HWW_ESR bit12 = SKEDCHECK05
LOCAL_MEMORY_TOTAL_SIZE latching while the CWD entry is allocated then
deallocated. Base/per-TPC size are module params for A/B.
m72: change-detecting SKED transition recorder in the launch poll (CWD_T0/1/2,
HWW_INFO_1/2, ACTIVITY, HWW_ESR, GRFIFO, FECS current/new/ctxsw status) and
extended post-mortem readbacks (HWW_ESR_EN, INFO_1/2/3, CWD_T2, watermarks).
m72-r2 sampler result: the QMD enters SKED (CWD_T0=0x11300 STATUS=ACTIVE,
CWD_T1=0x1070) and HWW_ESR stays 0 with the lmem block, but the FECS context
load never completes: NEW_CTX=0x001f42b0 (V7 FBMEM instance, VALID=0) then
CURRENT=0; the task frees (CWD_T0=0x12000 DEP=PENDING_TASK_COMPLETE). m63
(sysmem instance) had VALID=1 on the same load. m73 adds the sysmem
instance/RAMFC selector (gsp_phys_rmcall_gr_inst_sys; default 0 = FBMEM
capture shape) for the A/B.
Diffstat (limited to 'kernel/gsp_phys_gpu.h')
| -rw-r--r-- | kernel/gsp_phys_gpu.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/kernel/gsp_phys_gpu.h b/kernel/gsp_phys_gpu.h index 196e844..939cf0f 100644 --- a/kernel/gsp_phys_gpu.h +++ b/kernel/gsp_phys_gpu.h @@ -337,6 +337,19 @@ int gsp_phys_rmcall_faultbuf_sys_value(void); * (proven small-PT line) instead of the window-1 scratch range (default 0). */ int gsp_phys_rmcall_gr_shadow_win0_value(void); +/* m72: append the vendor local-memory context block to the GR prelude so + * SKEDCHECK05 LOCAL_MEMORY_TOTAL_SIZE passes (default 0); base VA and + * per-TPC size are overridable for A/B runs. */ +int gsp_phys_rmcall_gr_lmem_en_value(void); +unsigned int gsp_phys_rmcall_gr_lmem_base_value(void); +unsigned int gsp_phys_rmcall_gr_lmem_tpc_size_value(void); + +/* m72: log SKED CWD/HWW register transitions during the launch poll. */ +int gsp_phys_rmcall_gr_skedrec_value(void); + +/* m73: use host-visible sysmem chunks for V7 instance/RAMFC (m62 shape). */ +int gsp_phys_rmcall_gr_inst_sys_value(void); + /* * Ladder VAS ownership selector (gsp_phys_rmcall_vas_shared; default 0). * 0 = FERMI_VASPACE_A is allocated IS_EXTERNALLY_OWNED (historical ladder |