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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-07 11:16:02 -0400
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-07 11:16:02 -0400
commit4541bae601a330d2a22a21d9e24d0fe879ebf618 (patch)
tree8665b8abb113776a727758653d8207db754505e2 /kernel/gsp_phys_gpu.h
parent26f0006adcb9dc83d41a3bf84f386892f33bde83 (diff)
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open-iov-4541bae601a330d2a22a21d9e24d0fe879ebf618.zip
vgsp: m83 - host-readable sysmem error notifier for the RM's channel-error records
NV_PGRAPH_EXCEPTION reads 0x01000000 (GPC) with EXCEPTION1 GPC1:0=0b11 at the QMD activation; the fault record the engine writes goes to the channel's error notifier, which is server FBMEM today and unreadable. gsp_phys_rmcall_gr_notifier_sys=1 registers a host sysmem chunk as the hObjectError memory object and carries it in the channel's errorNotifierMem with the SYS aperture, so the RM's asynchronous channel-error report is dumped in the launch post-mortem (the m35 lane still uses the captured substitute object shape).
Diffstat (limited to 'kernel/gsp_phys_gpu.h')
-rw-r--r--kernel/gsp_phys_gpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/kernel/gsp_phys_gpu.h b/kernel/gsp_phys_gpu.h
index 216c96e..9bd5624 100644
--- a/kernel/gsp_phys_gpu.h
+++ b/kernel/gsp_phys_gpu.h
@@ -362,6 +362,10 @@ int gsp_phys_rmcall_gr_lane_tail_value(void);
* 4=#1063 device-sched); default 0 = send all. */
int gsp_phys_rmcall_gr_lane_skip_value(void);
+/* m83: mode-35 error notifier as host sysmem so the RM's channel-error
+ * records are readable (default 0 = server FBMEM). */
+int gsp_phys_rmcall_gr_notifier_sys_value(void);
+
/*
* Ladder VAS ownership selector (gsp_phys_rmcall_vas_shared; default 0).
* 0 = FERMI_VASPACE_A is allocated IS_EXTERNALLY_OWNED (historical ladder