vgsp: m72/m73 - local-memory context block (SKEDCHECK05 fix), SKED transition recorder, sysmem instance selector

m72: append the vendor turingLocalMemUpdate block (SET_SHADER_LOCAL_MEMORY_A/B
0x790/0x794, NON_THROTTLED_A/B 0x2e4/0x2e8, WINDOW_A/B 0x7b0/0x7b4) to the
forwarded GR launch prelude; without it the channel local-memory state is zero
and the m64-m69 sampler shows SKED_HWW_ESR bit12 = SKEDCHECK05
LOCAL_MEMORY_TOTAL_SIZE latching while the CWD entry is allocated then
deallocated. Base/per-TPC size are module params for A/B.

m72: change-detecting SKED transition recorder in the launch poll (CWD_T0/1/2,
HWW_INFO_1/2, ACTIVITY, HWW_ESR, GRFIFO, FECS current/new/ctxsw status) and
extended post-mortem readbacks (HWW_ESR_EN, INFO_1/2/3, CWD_T2, watermarks).

m72-r2 sampler result: the QMD enters SKED (CWD_T0=0x11300 STATUS=ACTIVE,
CWD_T1=0x1070) and HWW_ESR stays 0 with the lmem block, but the FECS context
load never completes: NEW_CTX=0x001f42b0 (V7 FBMEM instance, VALID=0) then
CURRENT=0; the task frees (CWD_T0=0x12000 DEP=PENDING_TASK_COMPLETE). m63
(sysmem instance) had VALID=1 on the same load. m73 adds the sysmem
instance/RAMFC selector (gsp_phys_rmcall_gr_inst_sys; default 0 = FBMEM
capture shape) for the A/B.

1 files changed, 87 insertions, 0 deletions

diff --git a/kernel/gsp_phys_gpu.c b/kernel/gsp_phys_gpu.c
index 1029b2e..ceb85ee 100644
--- a/kernel/gsp_phys_gpu.c
+++ b/kernel/gsp_phys_gpu.c
@@ -746,6 +746,93 @@ int gsp_phys_rmcall_faultbuf_sys_value(void)
 EXPORT_SYMBOL_GPL(gsp_phys_rmcall_faultbuf_sys_value);
 
 /*
+ * m72 local-memory context block (gsp_phys_rmcall_gr_lmem_en; default 0).
+ * When set, the forwarded GR launch prelude appends the vendor
+ * turingLocalMemUpdate block (SET_SHADER_LOCAL_MEMORY_A/B 0x790/0x794,
+ * SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A/B 0x2e4/0x2e8,
+ * SET_SHADER_LOCAL_MEMORY_WINDOW_A/B 0x7b0/0x7b4), which the stock CUDA
+ * driver emits at context init. Without it the channel's local-memory
+ * context state is zero and SKED cancels the QMD at validation with
+ * SKEDCHECK05 LOCAL_MEMORY_TOTAL_SIZE (SKED_HWW_ESR bit12) while still
+ * allocating/deallocating a CWD entry (the m64-m71 signature). The base
+ * (default 0x3000000 = CU_TURING_LMEM_WINDOW_BASE) and per-TPC size
+ * (default 0x320000, derived for the TU104 QMD low=0/high=1600 footprint,
+ * 48 SMs / 24 TPCs) are overridable for A/B runs.
+ */
+static int gsp_phys_rmcall_gr_lmem_en_param;
+module_param_named(gsp_phys_rmcall_gr_lmem_en,
+		   gsp_phys_rmcall_gr_lmem_en_param, int, 0644);
+MODULE_PARM_DESC(gsp_phys_rmcall_gr_lmem_en,
+		 "Append the vendor local-memory context block to the GR prelude (default 0; 1 = m72 SKEDCHECK05 fix)");
+
+int gsp_phys_rmcall_gr_lmem_en_value(void)
+{
+	return gsp_phys_rmcall_gr_lmem_en_param;
+}
+EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_lmem_en_value);
+
+static unsigned int gsp_phys_rmcall_gr_lmem_base_param = 0x3000000u;
+module_param_named(gsp_phys_rmcall_gr_lmem_base,
+		   gsp_phys_rmcall_gr_lmem_base_param, uint, 0644);
+MODULE_PARM_DESC(gsp_phys_rmcall_gr_lmem_base,
+		 "Local-memory window/base VAS address for the m72 lmem block (default 0x3000000)");
+
+unsigned int gsp_phys_rmcall_gr_lmem_base_value(void)
+{
+	return gsp_phys_rmcall_gr_lmem_base_param;
+}
+EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_lmem_base_value);
+
+static unsigned int gsp_phys_rmcall_gr_lmem_tpc_size_param = 0x320000u;
+module_param_named(gsp_phys_rmcall_gr_lmem_tpc_size,
+		   gsp_phys_rmcall_gr_lmem_tpc_size_param, uint, 0644);
+MODULE_PARM_DESC(gsp_phys_rmcall_gr_lmem_tpc_size,
+		 "Local-memory size per TPC for the m72 lmem block (default 0x320000)");
+
+unsigned int gsp_phys_rmcall_gr_lmem_tpc_size_value(void)
+{
+	return gsp_phys_rmcall_gr_lmem_tpc_size_param;
+}
+EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_lmem_tpc_size_value);
+
+/*
+ * m73 sysmem instance/RAMFC selector (gsp_phys_rmcall_gr_inst_sys; default 0).
+ * The m70 capture-shape FBMEM instance/ramfc makes the FECS context load
+ * never complete (sampler: NEW_CTX=V7 instance with VALID=0, then unloaded;
+ * no GR execution), while the m62 host-visible sysmem chunks showed the load
+ * completing (VALID=1, TARGET=3). 1 = m62 sysmem chunks for A/B runs.
+ */
+static int gsp_phys_rmcall_gr_inst_sys_param;
+module_param_named(gsp_phys_rmcall_gr_inst_sys,
+		   gsp_phys_rmcall_gr_inst_sys_param, int, 0644);
+MODULE_PARM_DESC(gsp_phys_rmcall_gr_inst_sys,
+		 "Use host-visible sysmem chunks for V7 instance/RAMFC (m62 shape; default 0 = FBMEM capture shape)");
+
+int gsp_phys_rmcall_gr_inst_sys_value(void)
+{
+	return gsp_phys_rmcall_gr_inst_sys_param;
+}
+EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_inst_sys_value);
+
+/*
+ * m72 SKED transition recorder (gsp_phys_rmcall_gr_skedrec; default 0). When
+ * set, the forwarded GR launch poll loop samples the SKED debug/CWD/HWW
+ * registers every ~8 ms and logs a line only when a value changes, recording
+ * the exact CWD allocate/cancel/dispatch sequence of the launch window.
+ */
+static int gsp_phys_rmcall_gr_skedrec_param;
+module_param_named(gsp_phys_rmcall_gr_skedrec,
+		   gsp_phys_rmcall_gr_skedrec_param, int, 0644);
+MODULE_PARM_DESC(gsp_phys_rmcall_gr_skedrec,
+		 "Log SKED CWD/HWW register transitions during the GR launch poll (default 0)");
+
+int gsp_phys_rmcall_gr_skedrec_value(void)
+{
+	return gsp_phys_rmcall_gr_skedrec_param;
+}
+EXPORT_SYMBOL_GPL(gsp_phys_rmcall_gr_skedrec_value);
+
+/*
  * m69 window-0 shadow pool (gsp_phys_rmcall_gr_shadow_win0; default 0). When
  * set, the forwarded GR launch copies the QMD's program/param pages into the
  * window-0 shadow pool (module pages at VAs 0x108000..0x10f000, PTEs planted