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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-07 14:28:39 -0400
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-07 14:28:39 -0400
commite6094ceba6e67343c29976a83fbd64f8d4e0bcd8 (patch)
tree3afa62a7381d618c8810cba185458113ddc12ed8 /kernel/gsp_phys_booter.c
parentbd8ad491365bf0164d7b397564f051b014da92d1 (diff)
downloadopen-iov-e6094ceba6e67343c29976a83fbd64f8d4e0bcd8.tar.gz
open-iov-e6094ceba6e67343c29976a83fbd64f8d4e0bcd8.zip
vgsp: m100 - scan every const-bank page for data VAs; data PTEs kind 0 by default
The +0x880 trap instruction disassembles (nvdisasm on the m98b prologue bytes) to LDG.E.U8.CONSTANT.SYS R5, [R2.64+UR4] with UR4 = c[0x4][0x0] - the first global load's base comes from const bank 4, not the c[0x0] param page the m99 scan covered. svc_gr_data_fill now scans every bank page the launch carries (QMD words 32..47, even LO words: banks 0..7), deduping up to 16 windows. Data PTEs use the gr_pte_kind param (default 0 = the kind proven SM-visible via the const reads) instead of a hardcoded 6.
Diffstat (limited to 'kernel/gsp_phys_booter.c')
-rw-r--r--kernel/gsp_phys_booter.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/kernel/gsp_phys_booter.c b/kernel/gsp_phys_booter.c
index 6db26a4..880299c 100644
--- a/kernel/gsp_phys_booter.c
+++ b/kernel/gsp_phys_booter.c
@@ -16263,7 +16263,9 @@ static int gsp_phys_rmcall_gr_data_map(u64 va, u64 hpa)
pt = gsp_phys_rmcall_gr_data_pt_get(i2, i1, i0);
if (!pt)
return -ENOSPC;
- pte = gsp_phys_rmcall_pte(hpa) | (6ULL << 56);
+ pte = gsp_phys_rmcall_pte(hpa);
+ if (gsp_phys_rmcall_gr_pte_kind_value())
+ pte |= (u64)gsp_phys_rmcall_gr_pte_kind_value() << 56;
put_unaligned_le64(pte, (u8 *)gsp_phys_chunk_page_va(pt, 0) +
(size_t)ip * 8);
dma_wmb();