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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-11-06 17:18:24 -0500
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-11-06 17:18:24 -0500
commit3bb62602ae1c8c453f403b2907ba2b3e94f59876 (patch)
tree68460bfb97b9abc986437964106a299f669c55f9 /kernel/gsp_phys_booter.c
parentc822fa346e2feb1b9f57160beeffc6f69ab0c923 (diff)
downloadopen-iov-3bb62602ae1c8c453f403b2907ba2b3e94f59876.tar.gz
open-iov-3bb62602ae1c8c453f403b2907ba2b3e94f59876.zip
vgsp-gl: bounded setup-push hold for maturity debugging
sema_gr_setup_hold_ms (default 0, clamp 2000 ms) holds/defer the draw window while the 60216-byte setup push pin is landing, replacing the ~50% IMMATURE-SKIP lottery. Measured: 2000 ms stalls the ring behind the unreadable 0x4021004 entry (8 launches then silence), so the default stays 0; the param is a debug gate only. r1557 with hold=0 produced 64 beef launches and the DS A/B baseline 80000000->a0040a06. Evidence: Handoff cont 8.
Diffstat (limited to 'kernel/gsp_phys_booter.c')
-rw-r--r--kernel/gsp_phys_booter.c82
1 files changed, 73 insertions, 9 deletions
diff --git a/kernel/gsp_phys_booter.c b/kernel/gsp_phys_booter.c
index 17925b6..f8208d6 100644
--- a/kernel/gsp_phys_booter.c
+++ b/kernel/gsp_phys_booter.c
@@ -19569,7 +19569,7 @@ static u32 gsp_phys_rmcall_gr_sph_bind_mask; /* bit j = synth slot j */
module_param_named(sema_sph_bind_mask, gsp_phys_rmcall_gr_sph_bind_mask,
uint, 0644);
MODULE_PARM_DESC(sema_sph_bind_mask,
- "Synth SPH-BIND slot mask (bit j = slot j; 0x20 = PS only) used when sema_gl_sph_bind=0");
+ "Synth SPH-BIND slot mask (bit j = slot j; 0x20 = PS only, 0x01/0x10 = VSA/GS VTG image, 0x25 = VSA+PS) used when sema_gl_sph_bind=0");
bool gsp_phys_rmcall_gr_sph_bind_value(void)
{
@@ -29575,11 +29575,11 @@ gr_page_unmapped:
if ((sph_bind_all || sph_bind_mask) &&
(req->h_object & 0xfffff000u) == 0xbeef0000u &&
req->prog_va &&
- win3d_n + 64u <= GSP_PHYS_RMCALL_GR_METHOD_WORDS) {
+ win3d_n + 96u <= GSP_PHYS_RMCALL_GR_METHOD_WORDS) {
static u32 sph_bind_log;
u64 fam = req->prog_va &
~(u64)(GSP_PHYS_PAGE_SIZE - 1);
- u32 in[64], out[64];
+ u32 in[96], out[96];
u32 nfin = 0, nrun = 0, on = 0, odrop = 0, orel;
u32 bi;
bool bind_binding =
@@ -29588,6 +29588,18 @@ gr_page_unmapped:
(sph_bind_mask & 0x04u);
bool emit_j5 = sph_bind_all ||
(sph_bind_mask & 0x20u);
+ /*
+ * SESSION 155 CONT 8: the DS flags the UNBOUND VTG-class
+ * stages (VSA/VSB/TCS/GS) in SPH bits 1/2/6/9/10/11/18.
+ * Mask bits 0x01 and 0x10 add the same synthesized
+ * per-stage record for VSA (j=0) and GS (j=4), binding
+ * the client's own VTG image (family+0x900) with the
+ * GS/VS-CULL types. Default off: bits 0/4 were unused.
+ */
+ bool emit_j0 = sph_bind_all ||
+ (sph_bind_mask & 0x01u);
+ bool emit_j4 = sph_bind_all ||
+ (sph_bind_mask & 0x10u);
/*
* SESSION 153-CONTINUED-89 (2nd half): the client's
@@ -29702,7 +29714,7 @@ gr_page_unmapped:
u64 va = req->prog_bind_va[bi];
u32 sl = req->prog_bind_slot[bi] & 0x1fu;
- if (!va || nfin + 3u > 64u)
+ if (!va || nfin + 3u > 96u)
continue;
in[nfin++] = 0x20000000u | (2u << 16) |
((0x2014u + sl * 0x40u) >> 2);
@@ -29719,8 +29731,22 @@ gr_page_unmapped:
* `20020855 [0,04400000]`).
*/
if (nfin + 3u +
+ (emit_j0 ? (bind_binding ? 8u : 7u) : 0u) +
(emit_j2 ? (bind_binding ? 8u : 7u) : 0u) +
- (emit_j5 ? (bind_binding ? 8u : 7u) : 0u) <= 64u) {
+ (emit_j4 ? (bind_binding ? 8u : 7u) : 0u) +
+ (emit_j5 ? (bind_binding ? 8u : 7u) : 0u) <= 96u) {
+ if (emit_j0) {
+ in[nfin++] = 0x20000000u | (2u << 16) |
+ (0x2014u >> 2);
+ in[nfin++] = (u32)((fam + 0x900u) >> 32) & 0xffu;
+ in[nfin++] = (u32)(fam + 0x900u) & 0xfffffffcu;
+ }
+ if (emit_j4) {
+ in[nfin++] = 0x20000000u | (2u << 16) |
+ (0x2114u >> 2);
+ in[nfin++] = (u32)((fam + 0x900u) >> 32) & 0xffu;
+ in[nfin++] = (u32)(fam + 0x900u) & 0xfffffffcu;
+ }
if (emit_j2) {
in[nfin++] = 0x20000000u | (2u << 16) |
(0x2094u >> 2);
@@ -29747,6 +29773,16 @@ gr_page_unmapped:
* synthesized slots with the known types
* (j=2 TESS_CONTROL -> 2, j=5 PIXEL -> 5).
*/
+ if (emit_j0) {
+ in[nfin++] = 0x20000000u | (1u << 16) |
+ (0x2000u >> 2);
+ in[nfin++] = 1u | (0u << 4);
+ }
+ if (emit_j4) {
+ in[nfin++] = 0x20000000u | (1u << 16) |
+ (0x2100u >> 2);
+ in[nfin++] = 1u | (4u << 4);
+ }
if (emit_j2) {
in[nfin++] = 0x20000000u | (1u << 16) |
(0x2080u >> 2);
@@ -29773,6 +29809,18 @@ gr_page_unmapped:
* restores the legacy CONT-90 2-word runs.
*/
if (bind_binding) {
+ if (emit_j0) {
+ in[nfin++] = 0x20000000u | (2u << 16) |
+ (0x200cu >> 2);
+ in[nfin++] = 0x1au;
+ in[nfin++] = 0x0u;
+ }
+ if (emit_j4) {
+ in[nfin++] = 0x20000000u | (2u << 16) |
+ (0x210cu >> 2);
+ in[nfin++] = 0x1au;
+ in[nfin++] = 0x0u;
+ }
if (emit_j2) {
in[nfin++] = 0x20000000u | (2u << 16) |
(0x208cu >> 2);
@@ -29786,6 +29834,16 @@ gr_page_unmapped:
in[nfin++] = 0x0u;
}
} else {
+ if (emit_j0) {
+ in[nfin++] = 0x20000000u | (1u << 16) |
+ (0x200cu >> 2);
+ in[nfin++] = 0x1au;
+ }
+ if (emit_j4) {
+ in[nfin++] = 0x20000000u | (1u << 16) |
+ (0x210cu >> 2);
+ in[nfin++] = 0x1au;
+ }
if (emit_j2) {
in[nfin++] = 0x20000000u | (1u << 16) |
(0x208cu >> 2);
@@ -29817,8 +29875,12 @@ gr_page_unmapped:
* relocated-pair count, and the constant
* type runs can never be relocated.
*/
+ if (emit_j0)
+ nrun++;
if (emit_j2)
nrun++;
+ if (emit_j4)
+ nrun++;
if (emit_j5)
nrun++;
}
@@ -29832,9 +29894,10 @@ gr_page_unmapped:
win3d_n += nfin;
if (sph_bind_log < 64u) {
sph_bind_log++;
- pr_info("vgsp-gr: SPH-BIND emitted fam=0x%llx win-binds=%u j2=0x%llx j5=0x%llx j1-type=0x11 rc=0x1a initblk=17 win=%u (pre=%u) h=0x%x push=0x%llx\n",
+ pr_info("vgsp-gr: SPH-BIND emitted fam=0x%llx win-binds=%u j0=0x%llx j2=0x%llx j4=0x%llx j5=0x%llx j1-type=0x11 rc=0x1a initblk=17 win=%u (pre=%u) h=0x%x push=0x%llx\n",
fam, req->n_prog_binds,
- fam + 0x200u, fam,
+ fam + 0x900u, fam + 0x200u,
+ fam + 0x900u, fam,
win3d_n, nfin,
req->h_object,
req->push_va);
@@ -29845,9 +29908,10 @@ gr_page_unmapped:
orel, nrun, on, nfin, fam,
req->h_object, req->push_va);
}
- pr_info("vgsp-gr: SPH-BIND-MASK mask=0x%x all=%u j2=%u j5=%u h=0x%x push=0x%llx\n",
+ pr_info("vgsp-gr: SPH-BIND-MASK mask=0x%x all=%u j0=%u j2=%u j4=%u j5=%u h=0x%x push=0x%llx\n",
sph_bind_mask, sph_bind_all ? 1u : 0u,
- emit_j2 ? 1u : 0u, emit_j5 ? 1u : 0u,
+ emit_j0 ? 1u : 0u, emit_j2 ? 1u : 0u,
+ emit_j4 ? 1u : 0u, emit_j5 ? 1u : 0u,
req->h_object, req->push_va);
}
/*