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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-29 09:07:45 -0400
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-29 09:07:45 -0400
commit36130881eac154dbf8f537284b95e157e874b0d0 (patch)
tree5e558ca55b606ce2f7e2e3455b75ee59c2ee61fa /kernel/gsp_phys_booter.c
parentaf37d9766c5fe4e256e07faefa095535ba4c993c (diff)
downloadopen-iov-36130881eac154dbf8f537284b95e157e874b0d0.tar.gz
open-iov-36130881eac154dbf8f537284b95e157e874b0d0.zip
vgsp: sked fe0/fehost/fecsirq lanes + FECS post-mortem readback + sema_gl_win_patch knob (SESSION 153 r959-r961)
Diffstat (limited to 'kernel/gsp_phys_booter.c')
-rw-r--r--kernel/gsp_phys_booter.c135
1 files changed, 131 insertions, 4 deletions
diff --git a/kernel/gsp_phys_booter.c b/kernel/gsp_phys_booter.c
index 42a5186..afe92b6 100644
--- a/kernel/gsp_phys_booter.c
+++ b/kernel/gsp_phys_booter.c
@@ -19530,6 +19530,84 @@ static bool gsp_phys_rmcall_gr_win_drop_match(u32 addr)
return false;
}
+/*
+ * SESSION 153-CONTINUED-14 (FECS residency / draw-stall isolation): patch
+ * the DATA of one method inside a replayed 3D window before it reaches the
+ * engine. Format: comma-separated `addr:data` hex pairs, addr = method
+ * byte-address (e.g. 1618 = BEGIN, 1614 = END), data = the replacement
+ * value. Header-only methods (IMMD) get their 13-bit data field rewritten
+ * in place; count-carrying methods (INC/NON_INC/INC_ONCE) get their FIRST
+ * payload word replaced. Live-tunable via sysfs so one boot can sweep
+ * variants (BEGIN OP=7 QUADS -> TRIANGLES etc.) against the draw-stall.
+ */
+static char *gsp_phys_rmcall_gr_win_patch;
+module_param_named(sema_gl_win_patch, gsp_phys_rmcall_gr_win_patch, charp,
+ 0644);
+MODULE_PARM_DESC(sema_gl_win_patch,
+ "Hex addr:data pairs (comma-separated) patched into a captured 3D window method before replay (default empty)");
+
+static bool gsp_phys_rmcall_gr_win_patch_find(u32 addr, u32 *out_data)
+{
+ const char *p = gsp_phys_rmcall_gr_win_patch;
+ u32 n = 0;
+
+ if (!p || !*p)
+ return false;
+ while (*p && n < 64) {
+ u32 v = 0, d = 0;
+ u32 digits = 0;
+ bool have_data = false;
+
+ while (*p == ' ' || *p == ',' || *p == ':' || *p == ';')
+ p++;
+ for (;;) {
+ char c = *p;
+ u32 h;
+
+ if (c >= '0' && c <= '9')
+ h = c - '0';
+ else if (c >= 'a' && c <= 'f')
+ h = c - 'a' + 10;
+ else if (c >= 'A' && c <= 'F')
+ h = c - 'A' + 10;
+ else
+ break;
+ if (v <= 0xfffffffu)
+ v = (v << 4) | h;
+ p++;
+ digits++;
+ }
+ if (!digits)
+ break;
+ if (*p == ':' || *p == '=') {
+ p++;
+ for (;;) {
+ char c = *p;
+ u32 h;
+
+ if (c >= '0' && c <= '9')
+ h = c - '0';
+ else if (c >= 'a' && c <= 'f')
+ h = c - 'a' + 10;
+ else if (c >= 'A' && c <= 'F')
+ h = c - 'A' + 10;
+ else
+ break;
+ if (d <= 0xfffffffu)
+ d = (d << 4) | h;
+ p++;
+ have_data = true;
+ }
+ }
+ n++;
+ if (have_data && v == addr) {
+ *out_data = d;
+ return true;
+ }
+ }
+ return false;
+}
+
static u32 gsp_phys_rmcall_gr_3d_patch_window(const u32 *in, u32 n, u32 *out,
u32 *out_n, u32 *n_dropped,
const struct gsp_phys_gr_submit *req,
@@ -19555,6 +19633,34 @@ static u32 gsp_phys_rmcall_gr_3d_patch_window(const u32 *in, u32 n, u32 *out,
continue;
}
memcpy(&out[wout], &in[off], (size_t)span * 4);
+ {
+ /*
+ * SESSION 153-CONTINUED-14: live data patch (BEGIN
+ * OP sweep etc.). Header-only forms rewrite the 13-bit
+ * data field; count-carrying forms rewrite the first
+ * payload word.
+ */
+ u32 pv;
+
+ if (gsp_phys_rmcall_gr_win_patch_find(addr, &pv)) {
+ static u32 patch_log;
+ u32 old;
+
+ if (span > 1u) {
+ old = out[wout + 1];
+ out[wout + 1] = pv;
+ } else {
+ old = (out[wout] >> 16) & 0x1fffu;
+ out[wout] = (out[wout] & ~0x1fff0000u) |
+ ((pv & 0x1fffu) << 16);
+ }
+ if (patch_log < 32) {
+ patch_log++;
+ pr_info("vgsp-gr: 3D win-patch addr=0x%x off=%u data 0x%x -> 0x%x\n",
+ addr, off, old, pv);
+ }
+ }
+ }
if ((op == 1 || op == 3 || op == 5) && cnt &&
off + 1u + cnt <= n) {
u32 *d = &out[wout + 1];
@@ -19676,8 +19782,8 @@ int gsp_phys_backend_guest_gr_submit(const struct gsp_phys_gr_submit *req,
u32 qmd_rel_off = 0, ch_rel_off = 0;
u32 poll = 0, w0 = 0, w1 = 0, grpoll_n = 0;
bool sem_gated = false;
- static u32 sked_prev[11];
- static u32 sked_sample[11];
+ static u32 sked_prev[14];
+ static u32 sked_sample[14];
static u32 sked_tick;
static bool sked_first;
/*
@@ -21326,10 +21432,20 @@ gr_page_unmapped:
sked_sample[8] = ioread32(bar0 + 0x00409b00u);
sked_sample[9] = ioread32(bar0 + 0x00409b04u);
sked_sample[10] = ioread32(bar0 + 0x00409400u);
+ /*
+ * SESSION 153-CONTINUED-14: FECS/FE ctxsw handshake
+ * lanes. fe0 = FECS_CTXSW_STATUS_FE_0 (0x409c00),
+ * fehost = FECS_HOST_INT_STATUS (0x409c18), fecsirq
+ * = FECS_IRQSTAT (0x409008). If the FECS dies in a
+ * switch, it should die visibly here first.
+ */
+ sked_sample[11] = ioread32(bar0 + 0x00409c00u);
+ sked_sample[12] = ioread32(bar0 + 0x00409c18u);
+ sked_sample[13] = ioread32(bar0 + 0x00409008u);
if (sked_first ||
memcmp(sked_sample, sked_prev,
sizeof(sked_sample))) {
- pr_info("vgsp-gr: sked rec +%ums cwd0=%08x cwd1=%08x cwd2=%08x info1=%08x info2=%08x act=%08x esr=%08x grfifo=%08x fecs_cur=%08x fecs_new=%08x ctxsw1=%08x\n",
+ pr_info("vgsp-gr: sked rec +%ums cwd0=%08x cwd1=%08x cwd2=%08x info1=%08x info2=%08x act=%08x esr=%08x grfifo=%08x fecs_cur=%08x fecs_new=%08x ctxsw1=%08x fe0=%08x fehost=%08x fecsirq=%08x\n",
sked_tick *
GSP_PHYS_RMCALL_POLL_MS,
sked_sample[0], sked_sample[1],
@@ -21337,7 +21453,8 @@ gr_page_unmapped:
sked_sample[4], sked_sample[5],
sked_sample[6], sked_sample[7],
sked_sample[8], sked_sample[9],
- sked_sample[10]);
+ sked_sample[10], sked_sample[11],
+ sked_sample[12], sked_sample[13]);
memcpy(sked_prev, sked_sample,
sizeof(sked_sample));
sked_first = false;
@@ -21829,6 +21946,16 @@ gr_page_unmapped:
ioread32(bar0 + 0x00405b00u),
ioread32(bar0 + 0x00400100u),
ioread32(bar0 + 0x0040013cu));
+ if (bar0)
+ pr_info("vgsp-gr: FECS readback: CUR=0x%08x NEW=0x%08x ST1=0x%08x FE0=0x%08x HOSTINT=0x%08x IRQSTAT=0x%08x CPUCTL=0x%08x OS=0x%08x\n",
+ ioread32(bar0 + 0x00409b00u),
+ ioread32(bar0 + 0x00409b04u),
+ ioread32(bar0 + 0x00409400u),
+ ioread32(bar0 + 0x00409c00u),
+ ioread32(bar0 + 0x00409c18u),
+ ioread32(bar0 + 0x00409008u),
+ ioread32(bar0 + 0x00409100u),
+ ioread32(bar0 + 0x00409080u));
if (bar0) {
u32 g;