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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-01 15:35:35 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-01 15:35:35 -0400 |
| commit | fe3b01b72cba79d4b14875e6940a87987ad196a9 (patch) | |
| tree | 59fa3342e0f3b32772c3d64be96514a0c6119ba2 /kernel/gsp_phys_boot.h | |
| parent | 69f0c2dbc4cd5f61302ae8d70002e1a1eb96da52 (diff) | |
| download | open-iov-fe3b01b72cba79d4b14875e6940a87987ad196a9.tar.gz open-iov-fe3b01b72cba79d4b14875e6940a87987ad196a9.zip | |
gsp-phys: populate the chipset/CL block of the pre-boot system info
Fill the GspSystemInfo chipset fields the production client syncs before
the GSP boot instead of leaving them zero:
- clPdbProperties (bitmask in the client's clSyncWithGsp order): bit 0
(config space accessible, from the OS MCFG/ECAM availability), bit 7
and bit 21 (Intel Skylake-family upstream-port setup: ASPM POR list,
root-port nosnoop WAR), bit 13 (upstream port ASPM L1 capable), bit 27
(LTR supported+enabled up to the root port) and bit 32 (IO coherent).
PDB_PROP_CL_UNSUPPORTED_CHIPSET is never assigned by the client, so the
faithful unmatched-chipset value is 0.
- Chipset = 0 (CS_UNKNOWN) for a host bridge with no chipsetInfo[] entry,
the reference's no-match fallback.
- FHBBusInfo/chipsetIDInfo: 10-byte BUSINFO blobs of the first host
bridge of the GPU's domain (device, vendor, subdevice, subvendor,
revision), with the subsystem-capability fallback on chipsetIDInfo.
acpiMethodData is intentionally sent all-zero (bValid=0): no ACPI/AML
calls are made and every consumer tolerates the no-data encoding. All
device lookups use refcounted pci_get_device()/pci_dev_put().
Diffstat (limited to 'kernel/gsp_phys_boot.h')
0 files changed, 0 insertions, 0 deletions
