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authorArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-29 06:51:31 -0400
committerArthur Hanson Rasmusson <arthur@vgpu.io>2026-10-29 06:51:31 -0400
commit3a58aea142df62cb5153bb255c1eb7831862998e (patch)
tree22ae434cb141f038bbd99f1134bae546f4f302ad /kernel/gsp_cuda_bridge.h
parent79b1e72fb59d96a85f2f7b86c581cc39be983cdb (diff)
downloadopen-iov-3a58aea142df62cb5153bb255c1eb7831862998e.tar.gz
open-iov-3a58aea142df62cb5153bb255c1eb7831862998e.zip
vgsp: staged program delivery (V3 SPH accepted by engine, 0 SPH faults/40 launches), inline bytes 256, per-VA typed slots (SESSION 153 r947-r950)
Diffstat (limited to 'kernel/gsp_cuda_bridge.h')
-rw-r--r--kernel/gsp_cuda_bridge.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/kernel/gsp_cuda_bridge.h b/kernel/gsp_cuda_bridge.h
index 2fb63d7..243392e 100644
--- a/kernel/gsp_cuda_bridge.h
+++ b/kernel/gsp_cuda_bridge.h
@@ -15,7 +15,7 @@ struct nv_vgpu_device;
* targeted resolve).
*/
#define GSP_BRIDGE_INLINE_MAX 16
-#define GSP_BRIDGE_INLINE_BYTES 64
+#define GSP_BRIDGE_INLINE_BYTES 256
struct gsp_bridge_inline {
u64 dst_va;