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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-26 11:36:47 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-26 11:36:47 -0400 |
| commit | 4d3308475c441df7220bc775b6ede79a04fa7698 (patch) | |
| tree | 60d09a6c97ec01ab27bb553d8a8fe8001b9457b4 /kernel/firmware_analyzer.h | |
| parent | 72de0beddb255c582f4718526af8e9357a9e36f8 (diff) | |
| download | open-iov-4d3308475c441df7220bc775b6ede79a04fa7698.tar.gz open-iov-4d3308475c441df7220bc775b6ede79a04fa7698.zip | |
docs/04-real-render-walls: SESSION 132 section 12 - the live utility ring is PROVEN in guest RAM (walk-confirmed per-run pages 0x11623d000/0x104b55000 with the 14-entry content the sweep decodes; the vidmem 0xa0000 'ring' was a false-positive autopin whose entry0 push reads all-zero and which the pump skipped after 39 rescues); the fixes (dead-entry guard + cross-aperture USERD + per-client util witnesses + op-level copyent) and their verification (r760: ring rc=0 on the live RAM page, live entry reads, VKFRAME_DONE 3 frames); the two LID uploads are the driver's zero buffers by design (256 B zero buffer + 12288 B CE fault buffer) while the GR channel's LID carries the real param bank; the code VA (prog=0xdfd8feb900) maps to a ROTATING code pool (0x62b900 -> 0xc8b000) whose lat entry can go stale and whose pages are empty - the SASS delivery shape (C5C0 0x3800/0x39C8 runs) and the walk-first code-VA resolution are the next two gates
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