docs: engineering-operations playbook and project-wide status accuracy pass

- docs/eng-ops.md gains Part II, live physical-backend engineering
  operations: hard rules, the full module-parameter matrix, the routine
  supervised cycle and clean-release checklist, the debugfs inventory,
  how to read gsp-phys-state, a debugging scenario catalogue
  (CTXNOTVALID/promote wedge, fail-safe WPR2, unload hangs, guest wedges,
  MMU/PTE and PBDMA faults, relay symptoms), a hazard register (crash
  causes and debugging side effects), the physical-backend OODA loop, and
  the work-context map with porting flows
- architecture, implementation, operations, orientation, getting-started,
  portability, ecosystem and reference docs corrected to the current
  state: CUDA driver-API smoke green, CE-class work forwarding and
  engine-authored releases plus fault relay in place (default off), GR
  execution blocked on engine-context validity, the promote wedge and
  designed locked fail-safe, and P5 wave-2 subsumed
- internal-reference cleanup in tracked docs (no analysis-source or
  local-archive references); historical architecture document bannered
- README reading list and STATE-CURRENT frontier refreshed; new pages
  (runbook, green-eye user guide, porting sequence, porting/packaging
  notes) linked from the tree

Link check: scripts/check-docs-links.py passes (56 files, no broken links).

1 files changed, 5 insertions, 3 deletions

diff --git a/docs/04-implementation/02-practical-challenges-and-adversarial-interop.md b/docs/04-implementation/02-practical-challenges-and-adversarial-interop.md
index 3265f47..4b886b3 100644
--- a/docs/04-implementation/02-practical-challenges-and-adversarial-interop.md
+++ b/docs/04-implementation/02-practical-challenges-and-adversarial-interop.md
@@ -53,9 +53,11 @@ without a methodology is not accepted in this project.
   are answered from cached/derived state where the hardware has no side effects
   the guest can observe.
 * **Real work** (grid launches, copies) is meant to be forwarded to the
-  physical GPU (see §3). Today only the work the host decoder understands —
-  memsets, copies and semaphore releases — is executed in software as a
-  correctness bridge; no CUDA kernel is forwarded yet.
+  physical GPU (see §3). CE-class copies and their semaphore releases are now
+  forwarded to the physical copy engine (default off) with a host-side fault
+  relay, and memsets/copies/releases the host decoder understands still run in
+  software as a fail-closed correctness bridge. No CUDA kernel is forwarded
+  yet: GR kernel execution is blocked on GR engine-context validity.
 
 ## 3. Forwarding: the options and the chosen mechanism