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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-06 19:45:12 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-06 19:45:12 -0400 |
| commit | 97bb2f818ec01c40391513f06e145392043898db (patch) | |
| tree | 5e1d0d1fa02848cc3efbac8c020a39697ac50858 /docs/02-getting-started | |
| parent | a5473c91b8869b017385582ea969783b33553ded (diff) | |
| download | open-iov-reg-probe.tar.gz open-iov-reg-probe.zip | |
vgsp: add read-only gsp-phys-reg-probe debugfs register snapshotreg-probe
Add a read-only BAR0 register-liveness probe at
/sys/kernel/debug/vgsp/gsp-phys-reg-probe that prints "name addr value"
for the PMC chip-id/clock gate, PGRAPH status/fault, SKED/HWW and
FECS/GPCCS falcon state, the front-end QMD virtual-window controls and
the GSP context registers, followed by decoded field lines.
Read-only (readl only); additive to gsp_phys_boot_debugfs_init(); no
ladder logic changed. Used to distinguish a clock/power-gated engine
from a halted or running one during a physical cycle.
Diffstat (limited to 'docs/02-getting-started')
0 files changed, 0 insertions, 0 deletions
