diff options
| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-14 12:44:32 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-14 12:44:32 -0400 |
| commit | 074f493c8bf51e487f5cdff30adbcbc65ad7b79b (patch) | |
| tree | ebd9b78e51c1d3b17d22cfb15b05ab4e06285b8d /debug/risc-v-gsp-rm-vm/sim/gsp_boot.py | |
| parent | 80af379d26334970462f7f14713ab2ca39747280 (diff) | |
| download | open-iov-074f493c8bf51e487f5cdff30adbcbc65ad7b79b.tar.gz open-iov-074f493c8bf51e487f5cdff30adbcbc65ad7b79b.zip | |
vgsp: user-lane GPFIFO depth must match the host ring modulus (8)
The host publishes every forwarded launch into the one-page ladder ring
modulo GSP_PHYS_RMCALL_GPFIFO_ENTRIES (8). Commit 3b82047c declared the
mode-35 user-lane channel with 1024 entries for capture fidelity; the
engine's GET/PUT then wrap at 1024 while the host wraps at 8, so at the
host's first wrap (GP_PUT 7 -> 0) the engine desyncs and never fetches
another entry: launches 1..7 green, the 8th and all later ones silent
(qmd_rel=5, ch_rel=0), which is the 'launch lottery'.
Live proof (r138): the failure fires exactly at slot=7 (first wrap) and
every launch after it fails; vecadd_loop (100 launches) dies at the wrap.
M1's two-launch acceptance never wrapped, so the regression was latent.
Set the declared count back to the host ring constant; the wrap-only
fidelity difference against the captured real-client ring is documented at
the define.
Diffstat (limited to 'debug/risc-v-gsp-rm-vm/sim/gsp_boot.py')
0 files changed, 0 insertions, 0 deletions
