greeneye: GMMU/FBIF observability, PTE decoder and oracle, MPU/libos simulator wave

Simulator development wave (docs 42-44): GMMU page-table entry decode with its oracle/workflow harness, FBIF observability, and MPU/LIBOS device surfaces in the device model, plus refreshed boot/machine/profile data (tu104-570.144), the qemu-line results, and the new unit tests. Docs 00/06/35-41 updated to match; harness helpers and .gitignore included.

1 files changed, 17 insertions, 4 deletions

diff --git a/debug/risc-v-gsp-rm-vm/sim/devices/fwsec.py b/debug/risc-v-gsp-rm-vm/sim/devices/fwsec.py
index 8dcf633..b278ec8 100644
--- a/debug/risc-v-gsp-rm-vm/sim/devices/fwsec.py
+++ b/debug/risc-v-gsp-rm-vm/sim/devices/fwsec.py
@@ -25,6 +25,17 @@ WPR2_ADDR_HI = 0x1FA828
 WPR2_ALIGNMENT = 12
 WPR2_BLOCK = 0x20000
 
+#: Block-relative offsets (a profile window that starts at ``+0x1FA000``
+#: reaches the pair at ``0x824``/``0x828``; the device accepts both forms).
+WPR2_ADDR_LO_REL = WPR2_ADDR_LO & 0xFFF
+WPR2_ADDR_HI_REL = WPR2_ADDR_HI & 0xFFF
+_KEYS = {
+    WPR2_ADDR_LO: WPR2_ADDR_LO,
+    WPR2_ADDR_HI: WPR2_ADDR_HI,
+    WPR2_ADDR_LO_REL: WPR2_ADDR_LO,
+    WPR2_ADDR_HI_REL: WPR2_ADDR_HI,
+}
+
 
 class Wpr2Block(Device):
     """WPR2 address pair as seen by the firmware (host/booter-written)."""
@@ -60,13 +71,15 @@ class Wpr2Block(Device):
         self.regs: dict[int, int] = {}
 
     def read(self, offset: int, size: int) -> int | None:
-        if size == 4 and offset in self.regs:
-            return self.regs[offset]
+        key = _KEYS.get(offset)
+        if size == 4 and key is not None and key in self.regs:
+            return self.regs[key]
         return None
 
     def write(self, offset: int, size: int, value: int) -> bool:
-        if size == 4 and offset in (WPR2_ADDR_LO, WPR2_ADDR_HI):
-            self.regs[offset] = value & 0xFFFFFFFF
+        key = _KEYS.get(offset)
+        if size == 4 and key is not None:
+            self.regs[key] = value & 0xFFFFFFFF
             return True
         return False