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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-02 15:13:06 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-02 15:13:06 -0400 |
| commit | 4bb8550a72597ec098c6d62a75006a0aba61972e (patch) | |
| tree | bd0ec74c26ff056251052a5e1ba0b59d14fb1f6a /debug/risc-v-gsp-rm-vm/docs/25-VALUE-VALIDATION.md | |
| parent | 8b491c4e7ebde76c17faddaad47f92898d6c97de (diff) | |
| download | open-iov-4bb8550a72597ec098c6d62a75006a0aba61972e.tar.gz open-iov-4bb8550a72597ec098c6d62a75006a0aba61972e.zip | |
kernel: GR context-promote bisection modes 4-17 and server-managed-ctxbuf registry variant; complete vgsp rename; docs/tooling refresh
- gsp_phys_booter: GR promote bisection modes 4-17 (two-phase zero-field VA,
batched entries, hVirtMemory, bare VA, KMD SKIP_CTXBUFFER_ALLOC channel,
old-interface GPU_INITIALIZE_CTX, FBMEM context buffer, UVM-faithful PA-only,
PATCH/PM auxiliary promotes, server-managed no-promote path); PATCH/PM
geometry queries and buffers; pre-boot SET_REGISTRY profile selection
- gsp_phys_gpu: gsp_phys_rmcall_gr_promote clamp 0..17 and gsp_phys_srv_ctxbuf
parameter; registry image variant with RMSetClientRMAllocatedCtxBuffer=0
- vgsp rename across kernel, scripts, tools and docs (module vgsp.ko,
/sys/kernel/debug/vgsp/, vgsp-<subsystem>: log prefixes)
- risc-v-gsp-rm-debugger user-facing rename and docs/CI refresh; guest-diag
tool updates; README/SBOM/install/Makefile sync
Live status: CE ladder and P6 guest-copy forwarding green; GR engine context
commit still open (all promote shapes accepted or cleanly refused; the channel
stays CTXNOTVALID) - see Handoff-vGPU-IO.md Addendum 21 (local).
Diffstat (limited to 'debug/risc-v-gsp-rm-vm/docs/25-VALUE-VALIDATION.md')
| -rw-r--r-- | debug/risc-v-gsp-rm-vm/docs/25-VALUE-VALIDATION.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/debug/risc-v-gsp-rm-vm/docs/25-VALUE-VALIDATION.md b/debug/risc-v-gsp-rm-vm/docs/25-VALUE-VALIDATION.md index 93d5d17..f7ccacd 100644 --- a/debug/risc-v-gsp-rm-vm/docs/25-VALUE-VALIDATION.md +++ b/debug/risc-v-gsp-rm-vm/docs/25-VALUE-VALIDATION.md @@ -33,7 +33,7 @@ the baseline cost from the handoffs, and measures the risc-v-gsp-rm-debugger pat Fidelity is exactly docs/06: L0 instruction semantics and L1 memory behaviour are exercised; **L2 time/concurrency is not modelled** and **L3 device environment is absent**. A risc-v-gsp-rm-debugger observation is evidence about the -firmware, and anything that would change `open-iov-vfio` is escalated to a +firmware, and anything that would change `vgsp` is escalated to a physical capture before the product changes (docs/06 §6, docs/14 §7). ### 2.2 Run contract |