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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 19:39:36 -0400 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-10-07 19:39:36 -0400 |
| commit | eeac003d4ea2f8666ad1e2ed088f90163d04238d (patch) | |
| tree | bc7be5dcec8b4b214b2a48dbba0fc5148c4585a1 | |
| parent | 8fdd49162dce3abb94d38b20b2df948976cfaf03 (diff) | |
| download | open-iov-eeac003d4ea2f8666ad1e2ed088f90163d04238d.tar.gz open-iov-eeac003d4ea2f8666ad1e2ed088f90163d04238d.zip | |
vgsp: m133 - move the win0 shadow pool to a fresh PTE line (slots 0x190..0x197) + win0 content and PT-slot diagnostics (the slot-0x108 line reads stale to the SM data path)
| -rw-r--r-- | kernel/gsp_phys_booter.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/kernel/gsp_phys_booter.c b/kernel/gsp_phys_booter.c index d7ee3e8..ecf95b6 100644 --- a/kernel/gsp_phys_booter.c +++ b/kernel/gsp_phys_booter.c @@ -1007,7 +1007,7 @@ bool gsp_phys_boot_requested(void) * chain (DMA_UPDATE_PDE_2 pdeIndex=1) has never been proven engine-readable. */ #define GSP_PHYS_RMCALL_VA_GR_SHADOW0_BASE \ - (GSP_PHYS_RMCALL_VA_BASE + 8 * GSP_PHYS_PAGE_SIZE) + (GSP_PHYS_RMCALL_VA_BASE + 0x90000ULL) #define GSP_PHYS_RMCALL_GR_SHADOW0_SLOTS 8u /* * m99: engine-tree branches for identity-mapping the forwarded kernel's @@ -16925,6 +16925,12 @@ int gsp_phys_backend_guest_gr_submit(const struct gsp_phys_gr_submit *req, ret = 0; pr_info("vgsp-gr: qmd_word %u page copied to window-0 shadow VA=0x%llx (proven PT line)\n", pg->qmd_word, sh_va); + if (pg->qmd_word == 32u) + pr_info("vgsp-gr: win0 param slot=%u dma=0x%llx w0x160=0x%llx w0x168=0x%llx\n", + boot_stage.rmcall_gr_shadow_win0_used - 1u, + (u64)gsp_phys_chunk_page_dma(&boot_stage.rmcall_gr_shadow_win0, boot_stage.rmcall_gr_shadow_win0_used - 1u), + (u64)get_unaligned_le64((u8 *)dst + 0x160u), + (u64)get_unaligned_le64((u8 *)dst + 0x168u)); } } else { ret = gsp_phys_rmcall_gr_map_shadow_locked( @@ -17197,6 +17203,13 @@ gr_page_unmapped: le64_to_cpu(pv[s + 2]), le64_to_cpu(pv[s + 3]), le64_to_cpu(pv[s + 4]), le64_to_cpu(pv[s + 5]), le64_to_cpu(pv[s + 6]), le64_to_cpu(pv[s + 7])); + for (s = 0x190; s < 0x1a0; s += 8) + pr_info("vgsp-gr: main PT[%03x..%03x]=%016llx %016llx %016llx %016llx %016llx %016llx %016llx %016llx\n", + s, s + 7, + le64_to_cpu(pv[s]), le64_to_cpu(pv[s + 1]), + le64_to_cpu(pv[s + 2]), le64_to_cpu(pv[s + 3]), + le64_to_cpu(pv[s + 4]), le64_to_cpu(pv[s + 5]), + le64_to_cpu(pv[s + 6]), le64_to_cpu(pv[s + 7])); } } |