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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-11-07 05:01:58 -0500 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-11-07 05:01:58 -0500 |
| commit | 6b3601cc153cbad8ca73fe771b9786e423b4b6a2 (patch) | |
| tree | 30172b3c8f997c4b90f9ab5f91c8442808a8e109 | |
| parent | a4210abc27634294cba528a3e6e450076cb3161e (diff) | |
| download | open-iov-6b3601cc153cbad8ca73fe771b9786e423b4b6a2.tar.gz open-iov-6b3601cc153cbad8ca73fe771b9786e423b4b6a2.zip | |
vgsp: display caps window seed A/B for the guest display subsystem
| -rw-r--r-- | kernel/bar_emulation.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/kernel/bar_emulation.c b/kernel/bar_emulation.c index d1702c8..0590112 100644 --- a/kernel/bar_emulation.c +++ b/kernel/bar_emulation.c @@ -177,6 +177,11 @@ void nv_vgpu_msix_clear_pending(struct nv_vgpu_device *vgpu, int vector) spin_unlock(&ctx->msix_lock); } +static bool nv_vgpu_disp_caps_seed; +module_param_named(disp_caps_seed, nv_vgpu_disp_caps_seed, bool, 0644); +MODULE_PARM_DESC(disp_caps_seed, + "Seed the NVC573 display caps window (BAR0+0x640000: head0|SOR0, windows 0-7) so the guest display subsystem selects the window path (default 0; A/B)"); + int nv_vgpu_bar_emul_init(struct nv_vgpu_device *vgpu) { struct nv_vgpu_bar_emul_ctx *ctx; @@ -228,6 +233,25 @@ int nv_vgpu_bar_emul_init(struct nv_vgpu_device *vgpu) *(u32 *)((u8 *)ctx->bar0_shadow + 0x000) = 0x164000a1; *(u32 *)((u8 *)ctx->bar0_shadow + 0x004) = 0x00000000; *(u32 *)((u8 *)ctx->bar0_shadow + 0xa00) = 0x164a1000; + /* + * SESSION 155 CONT 32: display caps window seed (A/B, default 0). + * The guest NVIDIA display driver's NV_PGRAPH/NV_PDISP SYS_CAP / + * SYS_CAPB reads at BAR0+0x640000/0x640004 return 0 on the + * emulated vGPU, so the display subsystem selection sees + * UsableWindowCount=0, takes the base-channel path and fails the + * class-list check (0x927c) -> "Failed to select a display + * subsystem". Seed the NVC573 caps window (head0|SOR0, + * windows 0-7) so the driver selects the window path. + */ + if (READ_ONCE(nv_vgpu_disp_caps_seed)) { + *(u32 *)((u8 *)ctx->bar0_shadow + 0x640000) = 0x00000101; + *(u32 *)((u8 *)ctx->bar0_shadow + 0x640004) = 0x000000ff; + *(u32 *)((u8 *)ctx->bar0_shadow + 0x6405e8) = 0x00000085; + *(u32 *)((u8 *)ctx->bar0_shadow + 0x640144) = 0x00000100; + *(u32 *)((u8 *)ctx->bar0_shadow + 0x640608) = 0x003c0000; + *(u32 *)((u8 *)ctx->bar0_shadow + 0x640680) = 0x0000021f; + *(u32 *)((u8 *)ctx->bar0_shadow + 0x640780) = 0x0000021f; + } /* * Pre-set the GSP secure-boot (GFW) completion state. |