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| author | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-11-08 05:20:37 -0500 |
|---|---|---|
| committer | Arthur Hanson Rasmusson <arthur@vgpu.io> | 2026-11-08 05:20:37 -0500 |
| commit | 2089f26f66626647c2e952cc1a758ef10930a58a (patch) | |
| tree | 5d907a3bf09fa626431f8c96fe643d8f2e943196 | |
| parent | 7151c84e4deb2115ce89ab73fcddb24022f8daf7 (diff) | |
| download | open-iov-2089f26f66626647c2e952cc1a758ef10930a58a.tar.gz open-iov-2089f26f66626647c2e952cc1a758ef10930a58a.zip | |
vgsp-disp: byte method addresses in the push parser (x4)
The NV DMA METHOD_OFFSET field is a dword index; gsp_disp_method()
compares against byte offsets (UPDATE 0x200, notifier 0x208/0x20c).
The executor compared the raw index (0x82) against 0x200/0x208, so
UPDATE and SET_NOTIFIER could never match and the FINISHED write never
fired (exposed by the r1625 raw push dumps). Shift the decoded offset
to bytes.
| -rw-r--r-- | kernel/gsp_display_engine.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/kernel/gsp_display_engine.c b/kernel/gsp_display_engine.c index ca470f2..73f40c6 100644 --- a/kernel/gsp_display_engine.c +++ b/kernel/gsp_display_engine.c @@ -710,8 +710,14 @@ static void gsp_disp_run(struct nv_vgpu_device *vgpu, struct gsp_disp_chan *ch, hdr = *(u32 *)(disp.pbuf + off); op = hdr >> 29; count = (hdr >> 18) & 0x3ff; - /* NV_UDISP_DMA_METHOD_OFFSET is 15:2 (14 bits). */ - addr = (hdr >> 2) & 0x3fff; + /* + * NV_UDISP_DMA_METHOD_OFFSET is 15:2 and is a DWORD index; + * gsp_disp_method() works in BYTE method addresses (0x200 + * UPDATE, 0x208/0x20c notifier), so shift back to bytes. + * Before this fix the executor compared 0x82 against 0x200 + * and the FINISHED write could never match (r1624/r1625). + */ + addr = ((hdr >> 2) & 0x3fff) << 2; switch (op) { case 0: /* METHOD (incrementing) */ |