1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
|
/*
* SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include <nvtypes.h>
//
// This file was generated with FINN, an NVIDIA coding tool.
// Source file: ctrl/ctrl0100.finn
//
#include "ctrl/ctrlxxxx.h"
#define NV0100_CTRL_CMD(cat,idx) NVXXXX_CTRL_CMD(0x0100, NV0100_CTRL_##cat, idx)
/* Client command categories (6bits) */
#define NV0100_CTRL_RESERVED (0x00U)
#define NV0100_CTRL_LOCK_STRESS (0x01U)
/*
* NV0100_CTRL_CMD_NULL
*
* This command does nothing.
* This command does not take any parameters.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_NULL (0x1000000U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_RESERVED_INTERFACE_ID << 8) | 0x0" */
/*
* NV0100_CTRL_CMD_RESET_LOCK_STRESS_STATE
*
* This command resets RM's lock stress counters to 0, allowing for a new lock stress
* run to start.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_RESET_LOCK_STRESS_STATE (0x1000101U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | 0x1" */
/*
* Bit fields to indicate to the caller whether an action was performed on a counter
* Setting any of these fields to 1 means to increment/decrement the respective counter.
* Setting any of these fields to 0 means to ignore the respective counter.
*/
#define NV0100_CTRL_GLOBAL_RMAPI_LOCK_STRESS_COUNTER_ACTION 0:0
#define NV0100_CTRL_GPU_LOCK_STRESS_COUNTER_ACTION 1:1
#define NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_ACTION 2:2
#define NV0100_CTRL_INTERNAL_CLIENT_LOCK_STRESS_COUNTER_ACTION 3:3
#define NV0100_CTRL_ALL_LOCK_STRESS_COUNTER_ACTION 3:0
/*
* Bit fields to indicate to the caller what type of action was performed on a counter
* Setting any of these fields to 1 means to increment the respective counter.
* Setting any of these fields to 0 means to decrement the respective counter.
*/
#define NV0100_CTRL_GLOBAL_RMAPI_LOCK_STRESS_COUNTER_INCREMENT 4:4
#define NV0100_CTRL_GPU_LOCK_STRESS_COUNTER_INCREMENT 5:5
#define NV0100_CTRL_CLIENT_LOCK_STRESS_COUNTER_INCREMENT 6:6
#define NV0100_CTRL_INTERNAL_CLIENT_LOCK_STRESS_COUNTER_INCREMENT 7:7
#define NV0100_CTRL_ALL_LOCK_STRESS_COUNTER_INCREMENT 7:4
typedef struct NV0100_CTRL_LOCK_STRESS_OUTPUT {
NvU8 action;
} NV0100_CTRL_LOCK_STRESS_OUTPUT;
/*
* NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_ALL_RM_LOCKS
*
* This command does a random increment/decrement on global counters in RM and reports
* the operation performed back to the caller. This is done with all RM locks held.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_ALL_RM_LOCKS (0x1000102U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS_MESSAGE_ID" */
#define NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS_MESSAGE_ID (0x2U)
typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_ALL_RM_LOCKS_PARAMS;
/*
* NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK
*
* This command does a random increment/decrement on global counters in RM and reports
* the operation performed back to the caller. This is done with all RM locks held except
* for the GPU locks.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK (0x1000103U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS_MESSAGE_ID" */
#define NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS_MESSAGE_ID (0x3U)
typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_PARAMS;
/*
* NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE
*
* This command does a random increment/decrement on global counters in RM and reports
* the operation performed back to the caller. This is done with the API lock held in
* read mode and GPU locks held.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE (0x1000104U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID" */
#define NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID (0x4U)
typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_API_LOCK_READ_MODE_PARAMS;
/*
* NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE
*
* This command does a random increment/decrement on global counters in RM and reports
* the operation performed back to the caller. This is done with the API lock held in
* read mode.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE (0x1000105U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID" */
#define NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID (0x5U)
typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS;
/*
* NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS
*
* This command does a random increment/decrement on global counters in RM and reports
* the operation performed back to the caller. This is done with all RM locks held in the
* internal RM API path.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS (0x1000106U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS_MESSAGE_ID" */
#define NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS_MESSAGE_ID (0x6U)
typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_ALL_RM_LOCKS_PARAMS;
/*
* NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK
*
* This command does a random increment/decrement on global counters in RM and reports
* the operation performed back to the caller. This is done with all RM locks held except
* for the GPU locks in the internal RM API path.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK (0x1000107U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS_MESSAGE_ID" */
#define NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS_MESSAGE_ID (0x7U)
typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_PARAMS;
/*
* NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE
*
* This command does a random increment/decrement on global counters in RM and reports
* the operation performed back to the caller. This is done with the API lock taken in
* read mode and GPU locks held in the internal RM API path.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE (0x1000108U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID" */
#define NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID (0x8U)
typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_API_LOCK_READ_MODE_PARAMS;
/*
* NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE
*
* This command does a random increment/decrement on global counters in RM and reports
* the operation performed back to the caller. This is done with the API lock held in read
* mode in the internal RM API path.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE (0x1000109U) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID" */
#define NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS_MESSAGE_ID (0x9U)
typedef NV0100_CTRL_LOCK_STRESS_OUTPUT NV0100_CTRL_PERFORM_LOCK_STRESS_INTERNAL_NO_GPUS_LOCK_API_LOCK_READ_MODE_PARAMS;
/*
* NV0100_CTRL_CMD_GET_LOCK_STRESS_COUNTERS
*
* This command gets the value of the global lock stress counters in RM at the end of
* the lock stress test.
*
* Possible status values returned are:
* NV_OK
*/
#define NV0100_CTRL_CMD_GET_LOCK_STRESS_COUNTERS (0x100010aU) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS_MESSAGE_ID" */
#define NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS_MESSAGE_ID (0xAU)
typedef struct NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS {
NvS32 globalLockStressCounter;
NvS32 gpuLockStressCounter;
NvS32 clientLockStressCounter;
NvS32 internalClientLockStressCounter;
} NV0100_CTRL_GET_LOCK_STRESS_COUNTERS_PARAMS;
/*
* NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST*
*
* @brief Testing the recursive GPU lock acquisition
*
* bLeaf [IN] Indicate that this is a leaf node to check the held lock only,
* insted of running a full test. This parameter is used internally
* to test locking for recursive RMCTRLs.
*
* Possible status values returned are:
* NV_OK
* NV_ERR_NOT_SUPPORTED
* NV_ERR_TEST_ONLY_CODE_NOT_ENABLED
* NV_ERR_INVALID_LOCK_STATE
*/
#define NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST_PARAM_MESSAGE_ID (0xBU)
typedef struct NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST_PARAM {
NvBool bLeaf;
} NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST_PARAM;
#define NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST_NO_LOCK (0x100010bU) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST_PARAM_MESSAGE_ID" */
#define NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST_ALL_LOCK (0x100010cU) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | (NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST_PARAM_MESSAGE_ID + 1)" */
#define NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST_DEVICE_LOCK (0x100010dU) /* finn: Evaluated from "(FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID << 8) | (NV0100_CTRL_CMD_RECURSIVE_GPU_LOCK_TEST_PARAM_MESSAGE_ID + 2)" */
|
