/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _GSP_SEMA_SERVICE_H_
#define _GSP_SEMA_SERVICE_H_

/*
 * Emulated-GPU progress service: discovers the guest's GPU-VA -> guest-PA
 * mapping and applies the copy-engine semaphore releases found in mapped
 * pages, so that the guest's UVM progress waits complete.
 *
 * See gsp_sema_service.c for the full description.
 */

/*
 * A guest channel, registered when the driver allocates it. The service uses
 * the channel's GPFIFO + USERD to notice submissions as they happen (instead
 * of discovering the pushed work by scanning guest RAM) and to run the pushed
 * work promptly.
 *
 * All addresses are guest-physical except gpfifo_va, which is the GPU VA of
 * the channel's GPFIFO ring (translated through the discovered VA->PA map).
 */
struct sema_channel_desc {
	u32 h_object;
	u32 engine_type;
	u32 cid;		/* RM channel id (the doorbell token vector) */
	u64 gpfifo_va;
	u32 gpfifo_entries;
	u64 userd_pa;		/* NvA06FControl: GPGet @0x88, GPPut @0x8c */
	u32 userd_as;		/* NV_ADDR_SYSMEM(1) / NV_ADDR_FBMEM(2) */
	u64 instance_pa;
	u64 notifier_pa;
	u32 notifier_as;	/* NV_ADDR_SYSMEM(1) / NV_ADDR_FBMEM(2) */
};

void gsp_sema_service_channel_add(const struct sema_channel_desc *desc);
void gsp_sema_service_channel_del(u32 h_object);

/*
 * A GPU VA space whose top-level page directory the driver has published (the
 * driver builds its own page tables for the address spaces it owns, then hands
 * the directory's physical address to the GPU through SET_PAGE_DIRECTORY).
 *
 * pdb is the directory base in the aperture selected by b_vidmem (false =
 * guest RAM, true = emulated vidmem); num_entries is the root entry count and
 * fixes the number of VA bits the root covers.
 */
struct sema_vaspace_desc {
	u32 h_vaspace;
	u64 pdb;
	u32 num_entries;
	bool b_vidmem;
};

void gsp_sema_service_vaspace_add(const struct sema_vaspace_desc *desc);
void gsp_sema_service_vaspace_del(u32 h_vaspace);

int  gsp_sema_service_start(void);
void gsp_sema_service_stop(void);
int  gsp_sema_service_probe(u64 gpu_va, u32 count);
int  gsp_sema_service_walk_probe(u64 gpu_va);
int  gsp_sema_service_dump_channels(void);
int  gsp_sema_service_add_map(u64 gpu_va, u64 pa, u64 len, u32 ap);
int  gsp_sema_service_counter_add(u32 h_object, u64 pa);
void gsp_sema_service_doorbell(u32 token);

/*
 * Discover and pin GR (compute) channel rings after the CE region of the
 * channel video-memory allocation. Set false to leave GR rings untranslated
 * (the pump then only runs the CE channels).
 */
extern bool gsp_sema_gr_rings;

/*
 * Acknowledge tracking-semaphore releases from CE pushes the pump could not
 * read: write the expected payload into the channel's pool semaphore so the
 * driver's wait clears immediately instead of after the content sweep.
 */
extern bool gsp_sema_fake_rel;

/*
 * Grace window (ms) an untranslatable GR GPFIFO entry is left pending before
 * the pump consumes it as stale. The GR push pages are pinned from guest
 * truth a moment after the channels appear; the window lets those pins land
 * so the releases inside the pushes are applied.
 */
extern unsigned gsp_sema_gr_grace_ms;

#endif /* _GSP_SEMA_SERVICE_H_ */