/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _GSP_CUDA_BRIDGE_H_ #define _GSP_CUDA_BRIDGE_H_ #include struct nv_vgpu_device; /* * One decoded GRCE inline-data write: the destination VA and the payload bytes * carried in the push itself. The sema service records these at decode time * (the bytes are already in hand); the CUDA bridge uses them to locate a * launch's argument block without a VA read, which is unavailable for * UVM-managed VAs (no CPU pagemap, no published page directory, no reliable * targeted resolve). */ #define GSP_BRIDGE_INLINE_MAX 16 #define GSP_BRIDGE_INLINE_BYTES 64 struct gsp_bridge_inline { u64 dst_va; u32 len; u8 data[GSP_BRIDGE_INLINE_BYTES]; }; bool gsp_cuda_bridge_enabled(void); void gsp_cuda_bridge_launch(struct nv_vgpu_device *vgpu, u32 h_object, const u32 qmd[64], u64 qmd_dev_va, u64 push_va, const struct gsp_bridge_inline *recs, u32 n_recs); void gsp_cuda_bridge_service(struct nv_vgpu_device *vgpu); int gsp_cuda_bridge_init(void); void gsp_cuda_bridge_fini(void); #endif /* _GSP_CUDA_BRIDGE_H_ */