From 00e54c13c7c9030c4d5f7151467f2d85a3730e29 Mon Sep 17 00:00:00 2001 From: Arthur Hanson Rasmusson Date: Sun, 13 Sep 2026 18:36:21 -0400 Subject: Initial commit: Open-IOV vGPU-IO complete stack - Firmware decompilation: GSP 570.144W (28.5MB ELF, RV64IMAC), 132 decompiled C files - Kernel modules: nvidia.ko (34MB, OpenRM), open-iov-vfio.ko (2.8MB, VFIO mdev), gsp-vgpu.ko (1.8MB, guest driver) - Userspace: libiov.so/libvgpu.so (76KB), example_vgpu (28KB), rpc_emulator.c - PCI config space emulation (256B with PM, MSI, MSI-X, PCIe caps) - 12 RPC types fully mapped from firmware decompilation - BAR trap, WPR, scheduling, notification, migration emulation - Helper scripts: load_vgpu_stack, create_mdev, launch_qemu_vgpu, test_vgpu_stack, setup_guest_driver, unload_vgpu_stack - Architecture documentation - Wiki: 10 technical documents - Git LFS for large binaries (.ko, .bin, .iso, .img, .o, ghidra repos) - nvidia-open-gpu-kernel-modules as submodule --- .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbase.h | 71 +++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbif.h | 194 +++++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbus.h | 113 ++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fclk.h | 33 ++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fdma.h | 92 ++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fevent.h | 93 ++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h | 611 +++++++++++++++++++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffbio.h | 249 +++++++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffifo.h | 159 ++++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h | 161 ++++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgr.h | 109 ++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fmmu.h | 128 +++++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpmgr.h | 32 ++ .../nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpower.h | 32 ++ 14 files changed, 2077 insertions(+) create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbase.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbif.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbus.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fclk.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fdma.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fevent.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffbio.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffifo.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgr.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fmmu.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpmgr.h create mode 100644 userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpower.h (limited to 'userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f') diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbase.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbase.h new file mode 100644 index 0000000..eb08864 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbase.h @@ -0,0 +1,71 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2019-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fbase.finn +// + +#include "ctrl/ctrlxxxx.h" +/* NV20_SUBDEVICE_DIAG: diagnostic class control commands and parameters */ + +#define NV208F_CTRL_CMD(cat,idx) NVXXXX_CTRL_CMD(0x208F, NV208F_CTRL_##cat, idx) + +/* Subdevice diag command categories (6bits) */ +#define NV208F_CTRL_RESERVED (0x00) +#define NV208F_CTRL_POWER (0x01) +#define NV208F_CTRL_THERMAL (0x02) +#define NV208F_CTRL_SEQ (0x03) +#define NV208F_CTRL_FIFO (0x04) +#define NV208F_CTRL_FB (0x05) +#define NV208F_CTRL_MC (0x06) +#define NV208F_CTRL_BIF (0x07) +#define NV208F_CTRL_CLK (0x08) +#define NV208F_CTRL_PERF (0x09) +#define NV208F_CTRL_FBIO (0x0A) +#define NV208F_CTRL_MMU (0x0B) +#define NV208F_CTRL_PMU (0x0C) +#define NV208F_CTRL_EVENT (0x10) +#define NV208F_CTRL_GPU (0x11) +#define NV208F_CTRL_GR (0x12) +#define NV208F_CTRL_PMGR (0x13) +#define NV208F_CTRL_DMA (0x14) +// const NV208F_CTRL_TMR = (0x15); // not supported +#define NV208F_CTRL_RMFS (0x16) +#define NV208F_CTRL_GSPMSGTIMING (0x17) +#define NV208F_CTRL_BUS (0x18) + +/* + * NV208F_CTRL_CMD_NULL + * + * This command does nothing. + * This command does not take any parameters. + * + * Possible status values returned are: + * NV_OK + */ +#define NV208F_CTRL_CMD_NULL (0x208f0000) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_RESERVED_INTERFACE_ID << 8) | 0x0" */ + +/* _ctrl208fbase_h_ */ diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbif.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbif.h new file mode 100644 index 0000000..3499ef9 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbif.h @@ -0,0 +1,194 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2009-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fbif.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* +* NV208F_CTRL_CMD_BIF_PBI_WRITE_COMMAND +* +* Control command to send a write command to the Post Box Interface +* +* Parameters: +* +*cmdFuncId +* this specifies the function that needs to be performed on pbi +*data +* the data to be set in the data in register +* status +* this corresponds to pbi status register +* sysNotify +* this corresponds to system notify event, i.e. whether system +* needs to be notified of command completion +* drvNotify +* this corresponds to driver notify event, i.e. whether driver +* needs to be notified of command completion +* +* For the possible values of the above parameters refer rmpbicmdif.h +*/ +#define NV208F_CTRL_CMD_BIF_PBI_WRITE_COMMAND (0x208f0701) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS_MESSAGE_ID (0x1U) + +typedef struct NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS { + NvU8 cmdFuncId; + NvU32 data; + NvU8 status; + NvBool sysNotify; + NvBool drvNotify; +} NV208F_CTRL_BIF_PBI_WRITE_COMMAND_PARAMS; + +/* +* NV208F_CTRL_CMD_BIF_CONFIG_REG_READ +* This command is used to read any of the PBI registers in the config space +* +* Parameters: +* +* RegIndex +* Defines the index of the PBI register +* data +* Data that is read +*/ +#define NV208F_CTRL_CMD_BIF_CONFIG_REG_READ (0x208f0702) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS_MESSAGE_ID (0x2U) + +typedef struct NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS { + NvU8 RegIndex; + NvU32 data; +} NV208F_CTRL_BIF_CONFIG_REG_READ_PARAMS; + +/* +* NV208F_CTRL_CMD_BIF_CONFIG_REG_WRITE +* This command is used to write any of the PBI registers in the config space +* +* Parameters: +* +* RegIndex +* Defines the index of the PBI register +* data +* Data that is to be written +*/ +#define NV208F_CTRL_CMD_BIF_CONFIG_REG_WRITE (0x208f0703) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS_MESSAGE_ID (0x3U) + +typedef struct NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS { + NvU8 RegIndex; + NvU32 data; +} NV208F_CTRL_BIF_CONFIG_REG_WRITE_PARAMS; + +/* +* NV208F_CTRL_CMD_BIF_INFO +* This command is used to read a bif property +* +* Parameters: +* +* index +* Defines the index of the property to read +* data +* Data that is read +*/ +#define NV208F_CTRL_CMD_BIF_INFO (0x208f0704) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_INFO_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_BIF_INFO_PARAMS_MESSAGE_ID (0x4U) + +typedef struct NV208F_CTRL_BIF_INFO_PARAMS { + NvU32 index; + NvU32 data; +} NV208F_CTRL_BIF_INFO_PARAMS; + +/* valid bif info index values */ +#define NV208F_CTRL_BIF_INFO_INDEX_L0S_ENABLED (0x00000000) +#define NV208F_CTRL_BIF_INFO_INDEX_L1_ENABLED (0x00000001) + +/* + * NV208F_CTRL_CMD_BIF_ECC_INJECT_ERROR + * + * This ctrl call injects PCI-E XPL-EP ECC errors. Please see the confluence + * page "ECC" for more information on ECC and ECC injection: + * + * Parameters: + * + * errorUnit + * Specifies the HW unit where the injection will occur. + * + * errorType + * Specifies whether the injected error will be correctable or uncorrectable. + * Correctable errors have no effect on running programs while uncorrectable + * errors will cause all channels to be torn down. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_BIF_ECC_INJECT_ERROR (0x208f0705) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */ + + + +#define NV208F_CTRL_BIF_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x5U) + +typedef struct NV208F_CTRL_BIF_ECC_INJECT_ERROR_PARAMS { + NvU8 errorType; + NvU8 errorUnit; +} NV208F_CTRL_BIF_ECC_INJECT_ERROR_PARAMS; + +/* + * NV208F_CTRL_CMD_BIF_ECC_INJECTION_SUPPORTED + * + * Reports if error injection is supported for XPL-EP + * + * bCorrectableSupported [out]: + * Boolean value that shows if correcatable errors can be injected. + * + * bUncorrectableSupported [out]: + * Boolean value that shows if uncorrecatable errors can be injected. + * + * Return values: + * NV_OK on success + * NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled. + * NV_ERR_NOT_SUPPORTED otherwise + * + * + */ +#define NV208F_CTRL_CMD_BIF_ECC_INJECTION_SUPPORTED (0x208f0706) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BIF_INTERFACE_ID << 8) | NV208F_CTRL_BIF_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_BIF_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x6U) + +typedef struct NV208F_CTRL_BIF_ECC_INJECTION_SUPPORTED_PARAMS { + NvU8 errorUnit; + NvBool bCorrectableSupported; + NvBool bUncorrectableSupported; +} NV208F_CTRL_BIF_ECC_INJECTION_SUPPORTED_PARAMS; + +/* _ctrl208fbif_h_ */ + diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbus.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbus.h new file mode 100644 index 0000000..11fd26e --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fbus.h @@ -0,0 +1,113 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fbus.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* + * NV208F_CTRL_CMD_BUS_IS_BAR1_VIRTUAL + * + * This command checks whether or not BAR1 is in virtual mode. + * This API is intended for internal testing only. + * + * bIsVirtual + * Whether or not Bar1 is in virtual mode. + */ +#define NV208F_CTRL_CMD_BUS_IS_BAR1_VIRTUAL (0x208f1801) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BUS_INTERFACE_ID << 8) | NV208F_CTRL_BUS_IS_BAR1_VIRTUAL_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_BUS_IS_BAR1_VIRTUAL_PARAMS_MESSAGE_ID (0x1U) + +typedef struct NV208F_CTRL_BUS_IS_BAR1_VIRTUAL_PARAMS { + NvBool bIsVirtual; +} NV208F_CTRL_BUS_IS_BAR1_VIRTUAL_PARAMS; + +/* + * NV208F_CTRL_CMD_BUS_ECC_INJECT_ERROR + * + * This ctrl call injects BUS ECC errors. Please see the confluence + * page "ECC" for more information on ECC and ECC injection: + * + * Parameters: + * + * location + * Specifies the BUS HW unit where the injection will occur. + * + * errorType + * Specifies whether the injected error will be correctable or uncorrectable. + * Correctable errors have no effect on running programs while uncorrectable + * errors will cause all channels to be torn down. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_BUS_ECC_INJECT_ERROR (0x208f1802) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BUS_INTERFACE_ID << 8) | NV208F_CTRL_BUS_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */ + + + +#define NV208F_CTRL_BUS_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x2U) + +typedef struct NV208F_CTRL_BUS_ECC_INJECT_ERROR_PARAMS { + NvU8 errorType; + NvU8 errorUnit; +} NV208F_CTRL_BUS_ECC_INJECT_ERROR_PARAMS; + +/* + * NV208F_CTRL_CMD_BUS_ECC_INJECTION_SUPPORTED + * + * Reports if error injection is supported for BUS units + * + * bCorrectableSupported [out]: + * Boolean value that shows if correcatable errors can be injected. + * + * bUncorrectableSupported [out]: + * Boolean value that shows if uncorrecatable errors can be injected. + * + * Return values: + * NV_OK on success + * NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled. + * NV_ERR_NOT_SUPPORTED otherwise + * + * + */ +#define NV208F_CTRL_CMD_BUS_ECC_INJECTION_SUPPORTED (0x208f1803) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_BUS_INTERFACE_ID << 8) | NV208F_CTRL_BUS_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_BUS_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x3U) + +typedef struct NV208F_CTRL_BUS_ECC_INJECTION_SUPPORTED_PARAMS { + NvU8 errorUnit; + NvBool bCorrectableSupported; + NvBool bUncorrectableSupported; +} NV208F_CTRL_BUS_ECC_INJECTION_SUPPORTED_PARAMS; + +/* _ctrl208fbus_h_ */ + diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fclk.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fclk.h new file mode 100644 index 0000000..450d881 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fclk.h @@ -0,0 +1,33 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2005-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fclk.finn +// + diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fdma.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fdma.h new file mode 100644 index 0000000..a302d42 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fdma.h @@ -0,0 +1,92 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2013-2014 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fdma.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* + * NV208F_CTRL_CMD_DMA_IS_SUPPORTED_SPARSE_VIRTUAL + * + * This command checks whether or not "sparse" virtual address ranges are + * supported for a given chip. This API is intended for debug-use only. + * + * bIsSupported + * Whether or not "sparse" virtual address ranges are supported. + */ +#define NV208F_CTRL_CMD_DMA_IS_SUPPORTED_SPARSE_VIRTUAL (0x208f1401) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_DMA_INTERFACE_ID << 8) | NV208F_CTRL_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_PARAMS_MESSAGE_ID (0x1U) + +typedef struct NV208F_CTRL_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_PARAMS { + NvBool bIsSupported; +} NV208F_CTRL_DMA_IS_SUPPORTED_SPARSE_VIRTUAL_PARAMS; + +/* + * NV208F_CTRL_CMD_DMA_GET_VAS_BLOCK_DETAILS + * + * This command retrieves various details of the virtual address space block + * allocated from the virtual address space heap for the given virtual address. + * + * virtualAddress + * Virtual address to get information about. + * + * beginAddress + * Start address of the corresponding virtual address space block. + * + * endAddress + * End address (inclusive) of the corresponding virtual address space + * block. + * + * alignedAddress + * Aligned address of the corresponding virtual address space block. + * + * pageSize + * Page size of the virtual address space block. + * + * hVASpace + * Handle to an allocated VA space. If 0, it is assumed that the device's + * VA space should be used. + */ +#define NV208F_CTRL_CMD_DMA_GET_VAS_BLOCK_DETAILS (0x208f1402) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_DMA_INTERFACE_ID << 8) | NV208F_CTRL_DMA_GET_VAS_BLOCK_DETAILS_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_DMA_GET_VAS_BLOCK_DETAILS_PARAMS_MESSAGE_ID (0x2U) + +typedef struct NV208F_CTRL_DMA_GET_VAS_BLOCK_DETAILS_PARAMS { + NV_DECLARE_ALIGNED(NvU64 virtualAddress, 8); + NV_DECLARE_ALIGNED(NvU64 beginAddress, 8); + NV_DECLARE_ALIGNED(NvU64 endAddress, 8); + NV_DECLARE_ALIGNED(NvU64 alignedAddress, 8); + NvU32 pageSize; + NvHandle hVASpace; +} NV208F_CTRL_DMA_GET_VAS_BLOCK_DETAILS_PARAMS; + +/* _ctrl208fdma_h_ */ + diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fevent.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fevent.h new file mode 100644 index 0000000..3777829 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fevent.h @@ -0,0 +1,93 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2009-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fevent.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* NV20_SUBDEVICE_DIAG event-related control commands and parameters */ + +/* + * NV208F_CTRL_CMD_EVENT_SET_NOTIFICATION + * + * This command sets event notification state for the associated subdevice. + * This command requires that an instance of NV01_EVENT has been previously + * bound to the associated subdevice object. + * + * event + * This parameter specifies the type of event to which the specified + * action is to be applied. This parameter must specify a valid + * NV208F_NOTIFIERS value (see cl208f.h for more details) and should + * not exceed one less NV208F_NOTIFIERS_MAXCOUNT. + * action + * This parameter specifies the desired event notification action. + * Valid notification actions include: + * NV208F_CTRL_SET_EVENT_NOTIFICATION_DISABLE + * This action disables event notification for the specified + * event for the associated subdevice object. + * NV208F_CTRL_SET_EVENT_NOTIFICATION_SINGLE + * This action enables single-shot event notification for the + * specified event for the associated subdevice object. + * NV208F_CTRL_SET_EVENT_NOTIFICATION_REPEAT + * This action enables repeated event notification for the specified + * event for the associated system controller object. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_INVALID_STATE + */ +#define NV208F_CTRL_CMD_EVENT_SET_NOTIFICATION (0x208f1001) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_EVENT_INTERFACE_ID << 8) | NV208F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_EVENT_SET_NOTIFICATION_PARAMS_MESSAGE_ID (0x1U) + +typedef struct NV208F_CTRL_EVENT_SET_NOTIFICATION_PARAMS { + NvU32 event; + NvU32 action; +} NV208F_CTRL_EVENT_SET_NOTIFICATION_PARAMS; + +/* valid action values */ +#define NV208F_CTRL_EVENT_SET_NOTIFICATION_ACTION_DISABLE (0x00000000) +#define NV208F_CTRL_EVENT_SET_NOTIFICATION_ACTION_SINGLE (0x00000001) +#define NV208F_CTRL_EVENT_SET_NOTIFICATION_ACTION_REPEAT (0x00000002) + +/* + * NV208F_CTRL_CMD_EVENT_SET_TRIGGER + * + * This command triggers a software event for the associated subdevice. + * This command accepts no parameters. + * + * Possible status values returned are: + * NV_OK + */ +#define NV208F_CTRL_CMD_EVENT_SET_TRIGGER (0x208f1002) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_EVENT_INTERFACE_ID << 8) | 0x2" */ + +/* _ctrl208fevent_h_ */ diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h new file mode 100644 index 0000000..ec16916 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffb.h @@ -0,0 +1,611 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2009-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208ffb.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* + * NV208F_CTRL_CMD_FB_GET_INFO + * + * This command returns fb engine information for the associated GPU. + * The client specifies what information to query through 'index' param. + * On success, the information is stored in the 'data' param. + * + * index + * Specify what information to query. Please see below for valid values of + * indexes for this command. + * data + * On success, this param will hold the data that the client queried for. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_FB_GET_INFO (0x208f0501) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_GET_INFO_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_GET_INFO_PARAMS_MESSAGE_ID (0x1U) + +typedef struct NV208F_CTRL_FB_GET_INFO_PARAMS { + NvU32 index; + NV_DECLARE_ALIGNED(NvU64 data, 8); +} NV208F_CTRL_FB_GET_INFO_PARAMS; + +/* valid fb info index values */ +#define NV208F_CTRL_FB_INFO_INDEX_FREE_CONTIG_COMPRESSION_SIZE (0x00000001) + +#define NV208F_CTRL_FB_INFO_INDEX_MAX NV208F_CTRL_FB_INFO_INDEX_FREE_CONTIG_COMPRESSION_SIZE + +/* + * NV208F_CTRL_CMD_FB_GET_ZBC_REFCOUNT + * + * This command gets the ZBC reference count associated with a given + * compression tag address. It is not supported on GPUs which support class + * GF100_ZBC_CLEAR as it is specific to a different hardware implementation. + * + * compTagAddress + * The input parameter indicating the compression tag address for which the + * associated ZBC refcount should be looked up. + * zbcRefCount + * An array of reference counts for the ZBC clear values associated with + * compTagAddress. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_FB_GET_ZBC_REFCOUNT (0x208f0505) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | 0x5" */ // Deprecated, removed form RM + +#define NV208F_CTRL_FB_GET_ZBC_REFCOUNT_MAX_REFCOUNTS 2 +typedef struct NV208F_CTRL_FB_GET_ZBC_REFCOUNT_PARAMS { + NvU32 compTagAddress; + NvU32 zbcRefCount[NV208F_CTRL_FB_GET_ZBC_REFCOUNT_MAX_REFCOUNTS]; +} NV208F_CTRL_FB_GET_ZBC_REFCOUNT_PARAMS; + +/* + * NV208F_CTRL_CMD_FB_CTRL_GPU_CACHE + * + * This command controls the state of a cache which all GPU memory accesses go + * through. If supported, it allows changing of the power state and the write + * mode. This is only supported when NV_VERIF_FEATURES is defined. An error + * will be returned if the requested combination of settings is not possible. + * + * writeMode + * Specifies the write mode of the cache. Possible values are defined in + * NV208F_CTRL_FB_CTRL_GPU_CACHE_WRITE_MODE. Passing _DEFAULT means to + * maintain the current write mode. It is illegal to change the write mode + * while the cache is disabled or in the same call as a request to disable + * it. + * powerState + * Specifies the power state of the cache. Possible values are defined in + * NV208F_CTRL_FB_CTRL_GPU_CACHE_POWER_STATE. Passing _DEFAULT means + * to maintain the current power state. + * rcmState + * Specifies the reduced cache mode of the cache. Possible values are + * defined in NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE. Passing _DEFAULT + * means to maintain the current RCM state. + * vgaCacheMode + * Specifies whether or not to enable VGA out-of-cache mode. Possible + * values are defined in NV208F_CTRL_FB_CTRL_GPU_CACHE_VGA_MODE. Passing + * _DEFAULT means to maintain the current VGA caching mode. + * cacheReset + * Triggers a hardware reset of the cache. Possible values are defined in + * NV208F_CTRL_FB_CTRL_GPU_CACHE_CACHE_RESET. Passing _DEFAULT does + * nothing while passing _RESET clears all data in the cache. + * flags + * Contains flags to control the details of how transitions should be + * handled. Possible values are defined in + * NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS. Passing _DEFAULT for any of + * the fields means to use the defaults specified by the Resource Manager. + * Note not all options are available for all transitions. Flags that are + * set but not applicable will be silently ignored. + * bypassMode + * (Fermi only) Specifies the bypass mode of the L2 cache. Normal GPU + * operation is _DISABLE. For TEST ONLY, setting _ENABLE enables a debug + * mode where all transactions miss in L2 and no writes are combined, + * essentially disabling the caching feature of the L2 cache. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + * NV_ERR_INVALID_STATE + * NV_ERR_INVALID_ARGUMENT + */ + +#define NV208F_CTRL_CMD_FB_CTRL_GPU_CACHE (0x208f0506) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS_MESSAGE_ID (0x6U) + +typedef struct NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS { + NvU32 writeMode; + NvU32 powerState; + NvU32 rcmState; + NvU32 vgaCacheMode; + NvU32 cacheReset; + NvU32 flags; + NvU32 bypassMode; +} NV208F_CTRL_FB_CTRL_GPU_CACHE_PARAMS; + +/* valid values for writeMode */ +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_WRITE_MODE_DEFAULT (0x00000000) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_WRITE_MODE_WRITETHROUGH (0x00000001) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_WRITE_MODE_WRITEBACK (0x00000002) + +/* valid values for powerState */ +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_POWER_STATE_DEFAULT (0x00000000) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_POWER_STATE_ENABLED (0x00000001) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_POWER_STATE_DISABLED (0x00000002) + +/* valid values for rcmState */ +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE_DEFAULT (0x00000000) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE_FULL (0x00000001) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE_REDUCED (0x00000002) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_RCM_STATE_ZERO_CACHE (0x00000003) + +/* valid values for vgaCacheMode */ +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_VGA_MODE_DEFAULT (0x00000000) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_VGA_MODE_ENABLED (0x00000001) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_VGA_MODE_DISABLED (0x00000002) + +/* valid values for cacheReset */ +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_CACHE_RESET_DEFAULT (0x00000000) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_CACHE_RESET_RESET (0x00000001) + +/* valid fields and values for flags */ +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS_MODE 1:0 +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS_MODE_DEFAULT (0x00000000) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS_MODE_RM (0x00000001) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_FLAGS_MODE_PMU (0x00000002) + +/* valid values for bypassMode */ +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_BYPASS_MODE_DEFAULT (0x00000000) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_BYPASS_MODE_DISABLED (0x00000001) +#define NV208F_CTRL_FB_CTRL_GPU_CACHE_BYPASS_MODE_ENABLED (0x00000002) + + + +/* + * NV208F_CTRL_CMD_FB_SET_STATE + * + * This command is used to put fb engine in a state requested by the caller. + * + * state + * This parameter specifies the desired engine state: + * NV208F_CTRL_FB_SET_STATE_STOPPED + * This value stops/halts the fb engine. + * NV208F_CTRL_FB_SET_STATE_RESTART + * This value restarts fb from a stopped state. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_STATE + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_FB_SET_STATE (0x208f0508) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_SET_STATE_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_SET_STATE_PARAMS_MESSAGE_ID (0x8U) + +typedef struct NV208F_CTRL_FB_SET_STATE_PARAMS { + NvU32 state; +} NV208F_CTRL_FB_SET_STATE_PARAMS; + +/* valid values for state */ +#define NV208F_CTRL_FB_SET_STATE_STOPPED (0x00000000) +#define NV208F_CTRL_FB_SET_STATE_RESTART (0x00000001) + +/* + * NV208F_CTRL_CMD_GPU_ECC_SCRUB_DIAG + * + * This command reads all the settings internal to scrubbing (both asynchronous + * and synchronous. + * + * Currently implemented: FB offset scrubber has completed, FB offset that scrubber + * is completing to, whether or not asynchronous scrubbing is enabled. + * + * fbOffsetCompleted + * This is the offset into FB that the scrubber has completed up to at the + * time this function is invoked. Note that the scrubber is top-down. Therefore + * the memory that remains unscrubbed is from 0x0 to fbOffsetCompleted. + * + * fbEndOffset + * This is the offset of the base of the last block that ECC asynchronous + * scrubber has been tasked to scrub. + * + * bAsyncScru bDisabled + * This is NV_TRUE if asynchronous scrubbing is disabled and NV_FALSE if + * asynchronous scrubbing is enabled. + * + * Possible status return values are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ +#define NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG (0x208f0509) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG_PARAMS_MESSAGE_ID (0x9U) + +typedef struct NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG_PARAMS { + NV_DECLARE_ALIGNED(NvU64 fbOffsetCompleted, 8); + NV_DECLARE_ALIGNED(NvU64 fbEndOffset, 8); + NvBool bAsyncScrubDisabled; +} NV208F_CTRL_CMD_FB_ECC_SCRUB_DIAG_PARAMS; + +/* + * NV208F_CTRL_CMD_GPU_ECC_ASYNCH_SCRUB_REGION + * + * This command launches the ECC scrubber in asynchronous mode. The scrubber, as + * in normal operation, will continue to operate until all of FB (excluding + * dedicated system memory) has been scrubbed. Like usual operation, scrubbing is + * only done on silicon. + * + * Possible status return values are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ +#define NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION (0x208f050a) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION_PARAMS_MESSAGE_ID (0xAU) + +typedef struct NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION_PARAMS { + NV_DECLARE_ALIGNED(NvU64 startBlock, 8); + NV_DECLARE_ALIGNED(NvU64 endBlock, 8); +} NV208F_CTRL_CMD_FB_ECC_ASYNC_SCRUB_REGION_PARAMS; + +/* + * NV208F_CTRL_CMD_GPU_ECC_ERROR_INFO + * This is a structure that is defined here for diag/debug purposes in mods. + * It is used to return the error information as part of the callback to + * kernel clients registering for SBE/DBE callbacks. + */ + +typedef struct NV208F_CTRL_CMD_FB_ECC_ERROR_INFO { + NvU32 row; + NvU32 bank; + NvU32 col; + NvU32 extBank; + NvU32 xbarAddress; + NV_DECLARE_ALIGNED(NvU64 physAddress, 8); +} NV208F_CTRL_CMD_FB_ECC_ERROR_INFO; + + +#define NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS (0x208f050c) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS_PARAMS_MESSAGE_ID (0xCU) + +typedef struct NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS_PARAMS { + NV_DECLARE_ALIGNED(NvU64 pAddr, 8); + NvU32 row; + NvU32 bank; + NvU32 col; + NvU32 extBank; + NvU32 rank; + NvU32 sublocation; + NvU32 partition; + NvU32 writeKillPtr0; + NvU32 injectionAddr; + NvU32 injectionAddrExt; + NvU32 rbcAddress; + NvU32 rbcAddressExt; + NvU32 rbcAddressExt2; + NvU32 eccCol; +} NV208F_CTRL_CMD_FB_ECC_GET_FORWARD_MAP_ADDRESS_PARAMS; + +/* + * NV208F_CTRL_CMD_FB_ECC_SET_KILL_PTR + * + * This command sets the kill pointer for the specified DRAM address. If + * the kill pointer is set to NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE + * or NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE, accesses to the specified + * address will result in ECC errors until all kill pointers are unset + * using NV208F_CTRL_FB_ERROR_TYPE_NONE. + * + * Only one kill pointer can be set at a time. Setting a kill pointer will + * clear all currently set kill pointers and set the new kill pointer. + * Calling NV208F_CTRL_FB_ERROR_TYPE_NONE simply clears all currently set + * kill pointers. + * + * errorType + * The type of kill pointer to set. NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE + * will set a single kill pointer resulting in a correctable error. + * NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE will set both kill pointers + * resulting in an uncorrectable error. NV208F_CTRL_FB_ERROR_TYPE_NONE + * will clear all kill pointers, which stops the associated addresses + * from generating ECC errors if NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE + * or NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE was previously set. + * Only one kill pointer can be set at a time and setting a new + * kill pointer will clear the previous kill pointer. + * + * address + * The physical DRAM address to be targeted by the kill pointer + * + * bProdInjection + * Whether the kill pointer is set through the production injection flow or not + */ +#define NV208F_CTRL_CMD_FB_ECC_SET_KILL_PTR (0x208f050e) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS_MESSAGE_ID" */ + +typedef enum NV208F_CTRL_FB_ERROR_TYPE { + NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE = 0, + NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE = 1, + NV208F_CTRL_FB_ERROR_TYPE_NONE = 2, +} NV208F_CTRL_FB_ERROR_TYPE; + +#define NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS_MESSAGE_ID (0xEU) + +typedef struct NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS { + NV208F_CTRL_FB_ERROR_TYPE errorType; + NV_DECLARE_ALIGNED(NvU64 address, 8); + NvBool bProdInjection; +} NV208F_CTRL_FB_ECC_SET_KILL_PTR_PARAMS; + + + +/* + * NV208F_CTRL_CMD_FB_INJECT_LTC_ECC_ERROR + * + * This API allows a client to inject ECC errors in the L2. + * + * ltc: + * The physical LTC number to inject the error into. + * slice: + * THe physical slice number within the LTC to inject the error into. + * locationMask + * LTC location subtype(s) where error is to be injected. (Valid on Ampere and later) + * errorType + * Type of error to inject + * NV208F_CTRL_FB_ERROR_TYPE_CORRECTABLE for SBE. + * NV208F_CTRL_FB_ERROR_TYPE_UNCORRECTABLE for DBE. + * + */ +#define NV208F_CTRL_CMD_FB_INJECT_LTC_ECC_ERROR (0x208f050f) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_INJECT_LTC_ECC_ERROR_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_INJECT_LTC_ECC_ERROR_PARAMS_MESSAGE_ID (0xFU) + +typedef struct NV208F_CTRL_FB_INJECT_LTC_ECC_ERROR_PARAMS { + NvU8 ltc; + NvU8 slice; + NvU8 locationMask; + NV208F_CTRL_FB_ERROR_TYPE errorType; +} NV208F_CTRL_FB_INJECT_LTC_ECC_ERROR_PARAMS; + +/* + * NV208F_CTRL_CMD_FB_ECC_INJECTION_SUPPORTED + * + * Reports if error injection is supported for a given HW unit + * + * location [in]: + * The ECC protected unit for which ECC injection support is being checked. + * The location type is defined by NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC. + * + * bCorrectableSupported [out]: + * Boolean value that shows if correcatable errors can be injected. + * + * bUncorrectableSupported [out]: + * Boolean value that shows if uncorrecatable errors can be injected. + * + * Return values: + * NV_OK on success + * NV_ERR_INVALID_ARGUMENT if the requested location is invalid. + * NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled. + * NV_ERR_NOT_SUPPORTED otherwise + * + * + */ +#define NV208F_CTRL_CMD_FB_ECC_INJECTION_SUPPORTED (0x208f0510) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x10U) + +typedef struct NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_PARAMS { + NvU8 location; + NvBool bCorrectableSupported; + NvBool bUncorrectableSupported; +} NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_PARAMS; + +#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC 0:0 +#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC_LTC (0x00000000) +#define NV208F_CTRL_FB_ECC_INJECTION_SUPPORTED_LOC_DRAM (0x00000001) + +/* + * NV208F_CTRL_CMD_FB_ECC_SET_WRITE_KILL + * + * This command sets the write kill for the specified DRAM address. If set, + * writes to the specified address won't update the ECC checkbits. When unset, + * writes the specified address will update the ECC checkbits. + * + * Only one write kill register can be set at a time. Setting a write kill + * will clear all currently set write kills and set the new write kill. + * Calling this ctrl call with setWriteKill = false simply clears all currently + * set write kills. + * + * setWriteKill + * When true, the ECC checkbits for the specified address won't update on + * writes. When false, the ECC checkbits for the specified address will + * revert to normal behavior and update on all writes. + * + * address + * The physical DRAM address to be targeted by the write kill + */ +#define NV208F_CTRL_CMD_FB_ECC_SET_WRITE_KILL (0x208f0511) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS_MESSAGE_ID (0x11U) + +typedef struct NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS { + NvBool setWriteKill; + NV_DECLARE_ALIGNED(NvU64 address, 8); +} NV208F_CTRL_FB_ECC_SET_WRITE_KILL_PARAMS; + +/* + * NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO + * + * physicalAddress + * Physical address to be remapped + * source + * The reason for retirement. Valid values for this parameter are + * from NV2080_CTRL_FB_REMAPPED_ROW_SOURCE_* + * status + * Reason for row remapping failure. Valid values are: + * NV208F_CTRL_FB_REMAP_ROW_STATUS_OK + * No error + * NV208F_CTRL_FB_REMAP_ROW_STATUS_REMAPPING_PENDING + * The remapping is pending + * NV208F_CTRL_FB_REMAP_ROW_STATUS_TABLE_FULL + * Table full + * NV208F_CTRL_FB_REMAP_ROW_STATUS_ALREADY_REMAPPED + * Attempting to remap a reserved row + * NV208F_CTRL_FB_REMAP_ROW_STATUS_INTERNAL_ERROR + * Some other RM failure + */ +typedef struct NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO { + NV_DECLARE_ALIGNED(NvU64 physicalAddress, 8); + NvU8 source; + NvU32 status; +} NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO; + +/* valid values for status */ +#define NV208F_CTRL_FB_REMAP_ROW_STATUS_OK (0x00000000) +#define NV208F_CTRL_FB_REMAP_ROW_STATUS_REMAPPING_PENDING (0x00000001) +#define NV208F_CTRL_FB_REMAP_ROW_STATUS_TABLE_FULL (0x00000002) +#define NV208F_CTRL_FB_REMAP_ROW_STATUS_ALREADY_REMAPPED (0x00000003) +#define NV208F_CTRL_FB_REMAP_ROW_STATUS_INTERNAL_ERROR (0x00000004) + +#define NV208F_CTRL_FB_REMAPPED_ROWS_MAX_ROWS (0x00000200) +/* + * NV208F_CTRL_CMD_FB_REMAP_ROW + * + * This command will write entries to Inforom. During init the entries will be + * read and used to remap a row. + * + * addressList + * This input parameter is an array of NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO + * structures containing information used for row remapping. Valid entries + * are adjacent + * validEntries + * This input parameter specifies the number of valid entries in the + * address array + * numEntriesAdded + * This output parameter specifies how many validEntries were successfully + * added to the Inforom + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_FB_REMAP_ROW (0x208f0512) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_REMAP_ROW_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_REMAP_ROW_PARAMS_MESSAGE_ID (0x12U) + +typedef struct NV208F_CTRL_FB_REMAP_ROW_PARAMS { + NV_DECLARE_ALIGNED(NV208F_CTRL_FB_REMAPPING_ADDRESS_INFO addressList[NV208F_CTRL_FB_REMAPPED_ROWS_MAX_ROWS], 8); + NvU32 validEntries; + NvU32 numEntriesAdded; +} NV208F_CTRL_FB_REMAP_ROW_PARAMS; + + +#define NV208F_CTRL_CMD_FB_REVERSE_MAP_RBC_ADDR_TO_PA (0x208f0513) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_REVERSE_MAP_RBC_ADDR_TO_PA_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_REVERSE_MAP_RBC_ADDR_TO_PA_PARAMS_MESSAGE_ID (0x13U) + +typedef struct NV208F_CTRL_FB_REVERSE_MAP_RBC_ADDR_TO_PA_PARAMS { + NV_DECLARE_ALIGNED(NvU64 address, 8); + NvU32 rbcAddress; + NvU32 rbcAddressExt; + NvU32 rbcAddressExt2; + NvU32 partition; + NvU32 sublocation; +} NV208F_CTRL_FB_REVERSE_MAP_RBC_ADDR_TO_PA_PARAMS; + +/** + * NV208F_CTRL_CMD_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF + * + * This command will convert a physical address when ECC is on to the physical + * address when ECC is off or vice versa + * + * @params[in] NvU64 inputAddress + * Input physical address + * + * @params[in] NvBool eccOn + * Whether or not input physical address is with ECC on or off + * + * @params[out] NvU64 outputAddress + * Output physical address + */ +#define NV208F_CTRL_CMD_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF (0x208f0514) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF_PARAMS_MESSAGE_ID (0x14U) + +typedef struct NV208F_CTRL_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF_PARAMS { + NV_DECLARE_ALIGNED(NvU64 inputAddress, 8); + NvBool eccOn; + NV_DECLARE_ALIGNED(NvU64 outputAddress, 8); +} NV208F_CTRL_FB_TOGGLE_PHYSICAL_ADDRESS_ECC_ON_OFF_PARAMS; + +/* + * NV208F_CTRL_CMD_FB_CLEAR_REMAPPED_ROWS + * + * This command clears remapping entries from the Inforom's row remapping table. + * + * sourceMask + * This is a bit mask of NV2080_CTRL_FB_REMAPPED_ROW_SOURCE. Rows + * remapped from the specified sources will be cleared/removed from the + * Inforom RRL object entries list. + * + * Possbile status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ +#define NV208F_CTRL_CMD_FB_CLEAR_REMAPPED_ROWS (0x208f0515) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS_MESSAGE_ID (0x15U) + +typedef struct NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS { + NvU32 sourceMask; +} NV208F_CTRL_FB_CLEAR_REMAPPED_ROWS_PARAMS; + +/* + * NV208F_CTRL_CMD_FB_GET_FLOORSWEPT_FBPA_MASK + * + * This command calculates the floorswept fbpa mask by taking 1/2 HBM + * floorsweeping into account + * + * fbpaMask + * This value of the mask. + * + * Possbile status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ +#define NV208F_CTRL_CMD_FB_GET_FLOORSWEPT_FBPA_MASK (0x208f0516) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FB_INTERFACE_ID << 8) | NV208F_CTRL_FB_GET_FLOORSWEPT_FBPA_MASK_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FB_GET_FLOORSWEPT_FBPA_MASK_PARAMS_MESSAGE_ID (0x16U) + +typedef struct NV208F_CTRL_FB_GET_FLOORSWEPT_FBPA_MASK_PARAMS { + NvU32 fbpaMask; +} NV208F_CTRL_FB_GET_FLOORSWEPT_FBPA_MASK_PARAMS; + +/* _ctrl208ffb_h_ */ diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffbio.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffbio.h new file mode 100644 index 0000000..a523160 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffbio.h @@ -0,0 +1,249 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2010-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208ffbio.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* + * NV208F_CTRL_CMD_FBIO_SETUP_TRAINING_EXP + * + * This command defines an fbio training experiment for later use. + * + * This command has the form of a 'cmd' operation descriminant + * followed by a union populated with an operand to match the 'cmd'. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_INVALID_COMMAND + * + */ +#define NV208F_CTRL_CMD_FBIO_SETUP_TRAINING_EXP (0x208f0a03) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FBIO_INTERFACE_ID << 8) | NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_PARAMS_MESSAGE_ID" */ + +/* + * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_NULL + * + * This command has no effect when used. + */ +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_NULL 0 + +/* + * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS + * + * This command defines the number of register modification slots to be used + * in the setup phase of the pass/fail training exercise. Using this cmd + * causes any previously defined modification table to be cleared/released. + * The maximum size of the table is defined by + * _SETUP_FBIO_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS__MAX + * Using the value of zero for number of mod slots is valid. "Mod slots" + * are defined below. + * + * Possible status values returned are: + * NV_ERR_INVALID_LIMIT + * if modSlots is > __MAX + * NV_ERR_INSUFFICIENT_RESOURCES + * if we're out of memory setting up the mod slot table + */ +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS 1 +typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS_OPERANDS { + NvU32 modSlots; +} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS_OPERANDS; + +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS__MAX 256 + +/* + * NV208F_CTRL_FBIO_SETUPFBIO_TRAINING_EXP_SET_MOD_SLOT + * + * This command is used to define each individual element of the the sequence + * of operations which will be performed before running the pass/fail training + * exercise. Note that this cmd is multi-cmd (with a null cmd all its own, + * etc). + * + * Possible status values returned are: + * NV_ERR_INVALID_INDEX + * if seq is out of range for previously set SET_NUMBER_OF_MOD_SLOTS + * operation. + * NV_ERR_INVALID_COMMAND + * if cmd isn't recognized + */ +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT 2 + +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_NULL 0 + +/* + * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER + * + * This cmd is used to define a register transaction to be applied in + * sequence before running the pass/fail experiment. This is where + * NV_PFB_TRAINING_ADR, NV_PFB_TRAINING_CMD, NV_PFB_TRAINING_DP(i), + * NV_PFB_TRAINING_THRESHOLD and NV_PFB_TRAINING_MASK, etc. should be + * configured before calling back with cmd + * NV208F_CTRL_CMD_FBIO_RUN_TRAINING_EXP. + * + * reg + * This parameter specifies the BAR0 register offset to affect. + * andMask + * orMask + * These parameter specify the RMW values to be used in the following: + * write32(reg, (read32(reg) & andMask) | orMask) + */ +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER 1 +typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER_OPERANDS { + NvU32 reg; + NvU32 andMask; + NvU32 orMask; +} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER_OPERANDS; + +/* + * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY + * + * This cmd is used to define a delay to be applied in the setup sequence + * before running the pass/fail experiment. + * + * usec + * Specifies delay to be used in microseconds. + */ + +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY 2 +typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY_OPERANDS { + NvU32 usec; +} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY_OPERANDS; + +/* + * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_INIT_LT + * + * This cmd is used to define a point where normal link training initialization + * may be executed in the sequence before running the pass/fail experiment. + * In general, this is not needed since it is done during normal + * initialization, but does allow re-initialization during the sequence. + */ +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_INIT_LT 3 + +/* + * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_RUN_LT + * + * This cmd is used to define a point where normal link training may be + * executed in the sequence before running the pass/fail experiment. + * In general, this is not needed since it is somewhat redundant. + */ +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_RUN_LT 4 + +/* + * NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_STOP_SEQ + * + * This cmd is used to define a point where the sequence stops without + * running the pass/fail experiment. + */ +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_STOP_SEQ 5 + + + +typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_PARAMS { + NvU32 cmd; + /* C form: NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_OPERANDS op; */ + union { + + NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_SET_REGISTER_OPERANDS setRegister; + + NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_DELAY_OPERANDS delay; + } op; + NvU32 seq; +} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_PARAMS; + + + +#define NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_PARAMS_MESSAGE_ID (0x3U) + +typedef struct NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_PARAMS { + NvU32 cmd; + + /* C form: NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_OPERANDS op; */ + union { + + NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_NUMBER_OF_MOD_SLOTS_OPERANDS setNumberOfModSlots; + + NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_SET_MOD_SLOT_PARAMS setModSlot; + } op; +} NV208F_CTRL_FBIO_SETUP_TRAINING_EXP_PARAMS; + +/* + * NV208F_CTRL_CMD_FBIO_RUN_TRAINING_EXP + * + * This command runs the previously defined experiment and returns status on + * pass/fail. NV_OK is returned in the case of both pass + * and fail. + * + * The risingPasses and fallingPasses outputs represents the results across + * all partitions and bytelanes. Each array entry corresponds to a partition + * and the bits within each member represent the bytelane. So e.g.: + * risingPasses[4] represents the rising pass results for all of partition 4's + * byte lanes. + * + * The partitionsValid bitmask represents the partitions for which the results + * in risingPasses and fallingPasses are valid (not floorswept). + * + * The bytelanesValid bitmask represents the bytelanes for which the results + * are valid (available bytelanes). + * + * The failingDebug[] represent debug data for why (if so) a test fails. + * This is basically NV_PFB_TRAINING_DEBUG(i) + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_TIMEOUT + * if hardware doesn't respond to request in a timely manner. + * NV_ERR_INVALID_DATA + * if there was some sort of very weird data corruption issue. + */ +#define NV208F_CTRL_CMD_FBIO_RUN_TRAINING_EXP (0x208f0a04) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FBIO_INTERFACE_ID << 8) | NV208F_CTRL_FBIO_RUN_TRAINING_EXP_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FBIO_RUN_TRAINING_EXP_RESULT__SIZE 8 +#define NV208F_CTRL_FBIO_RUN_TRAINING_EXP_PARAMS_MESSAGE_ID (0x4U) + +typedef struct NV208F_CTRL_FBIO_RUN_TRAINING_EXP_PARAMS {NvU32 risingPasses[NV208F_CTRL_FBIO_RUN_TRAINING_EXP_RESULT__SIZE]; + NvU32 fallingPasses[NV208F_CTRL_FBIO_RUN_TRAINING_EXP_RESULT__SIZE]; + NvU32 failingDebug[NV208F_CTRL_FBIO_RUN_TRAINING_EXP_RESULT__SIZE]; + NvU32 partitionsValid; + NvU32 bytelanesValid; +} NV208F_CTRL_FBIO_RUN_TRAINING_EXP_PARAMS; + +#define NV208F_CTRL_CMD_FBIO_GET_TRAINING_CAPS (0x208f0a05) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FBIO_INTERFACE_ID << 8) | NV208F_CTRL_FBIO_GET_TRAINING_CAPS_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FBIO_GET_TRAINING_CAPS_PARAMS_MESSAGE_ID (0x5U) + +typedef struct NV208F_CTRL_FBIO_GET_TRAINING_CAPS_PARAMS { + NvU32 supported; +} NV208F_CTRL_FBIO_GET_TRAINING_CAPS_PARAMS; + +// _ctrl208ffbio_h_ diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffifo.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffifo.h new file mode 100644 index 0000000..dba64cd --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208ffifo.h @@ -0,0 +1,159 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2006-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208ffifo.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* + * NV208F_CTRL_CMD_FIFO_CHECK_ENGINE_CONTEXT + * + * This command checks whether or not engine context exists for a given + * engine for the channel with a given channel ID. This API is intended + * for testing virtual context. For debug only. + * + * hChannel + * The handle to the channel. + * engine + * The engine ID. + * Valid values are: + * NV2080_ENGINE_TYPE_GRAPHICS + * exists + * The output are TRUE or FALSE. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_DEVICE + * NV_ERR_INVALID_CHANNEL + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_FIFO_CHECK_ENGINE_CONTEXT (0x208f0401) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FIFO_INTERFACE_ID << 8) | NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS_MESSAGE_ID (0x1U) + +typedef struct NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS { + NvHandle hChannel; + NvU32 engine; + NvBool exists; +} NV208F_CTRL_FIFO_CHECK_ENGINE_CONTEXT_PARAMS; + +/* + * NV208F_CTRL_CMD_FIFO_ENABLE_VIRTUAL_CONTEXT + * + * This command enables virtual context for a given channel (for all engines). + * This API is intended for testing virtual context. For debug only. + * + * hChannel + * The handle to the channel. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_DEVICE + * NV_ERR_INVALID_CHANNEL + */ +#define NV208F_CTRL_CMD_FIFO_ENABLE_VIRTUAL_CONTEXT (0x208f0402) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FIFO_INTERFACE_ID << 8) | NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS_MESSAGE_ID (0x2U) + +typedef struct NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS { + NvHandle hChannel; +} NV208F_CTRL_FIFO_ENABLE_VIRTUAL_CONTEXT_PARAMS; + +/* + * NV208F_CTRL_CMD_FIFO_GET_CHANNEL_STATE + * + * This command returns the fifo channel state for the given channel. + * This is for testing channel behavior. For debug only. + * + * hChannel + * The handle to the channel + * hClient + * The handle to the client + * bound + * The channel has been bound to channel RAM + * enabled + * The channel is able to run. + * scheduled + * The channel has been scheduled to run. + * cpuMap + * There is a cpu mapping available to this channel. + * contention + * The virtual channel is under contention + * runlistSet + * A runlist has been chosen for this channel + * deferRC + * An RC error has occurred, but recovery will occur at channel teardown. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_DEVICE + * NV_ERR_INVALID_CHANNEL + */ +#define NV208F_CTRL_CMD_FIFO_GET_CHANNEL_STATE (0x208f0403) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FIFO_INTERFACE_ID << 8) | NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS_MESSAGE_ID (0x3U) + +typedef struct NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS { + NvHandle hChannel; + NvHandle hClient; + NvBool bBound; + NvBool bEnabled; + NvBool bScheduled; + NvBool bCpuMap; + NvBool bContention; + NvBool bRunlistSet; + NvBool bDeferRC; +} NV208F_CTRL_FIFO_GET_CHANNEL_STATE_PARAMS; + +/* + * NV208F_CTRL_CMD_FIFO_GET_CONTIG_RUNLIST_POOL + * + * This command returns the location of the pool runlists are allocated from for + * WPR testing. + * For debug only. + * + * physAddr [out] + * Physical address of the pool + * + * size [out] + * Size in bytes of the pool + * + */ +#define NV208F_CTRL_CMD_FIFO_GET_CONTIG_RUNLIST_POOL (0x208f0404) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_FIFO_INTERFACE_ID << 8) | NV208F_CTRL_FIFO_GET_CONTIG_RUNLIST_POOL_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_FIFO_GET_CONTIG_RUNLIST_POOL_PARAMS_MESSAGE_ID (0x4U) + +typedef struct NV208F_CTRL_FIFO_GET_CONTIG_RUNLIST_POOL_PARAMS { + NV_DECLARE_ALIGNED(NvU64 physAddr, 8); + NV_DECLARE_ALIGNED(NvU64 size, 8); +} NV208F_CTRL_FIFO_GET_CONTIG_RUNLIST_POOL_PARAMS; + +/* _ctrl208ffifo_h_ */ + diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h new file mode 100644 index 0000000..d473f11 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h @@ -0,0 +1,161 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2009-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fgpu.finn +// + +#include "ctrl/ctrl2080/ctrl2080gr.h" /* 208F is partially derivative of 2080 */ +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* + * NV208F_CTRL_CMD_GPU_GET_RAM_SVOP_VALUES + * + * This command can be used to get the RAM SVOP values. + * + * sp + * This field outputs RAM_SVOP_SP + * rg + * This field outputs RAM_SVOP_REG + * pdp + * This field outputs RAM_SVOP_PDP + * dp + * This field outputs RAM_SVOP_DP + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_INVALID_ARGUMENT + */ + +#define NV208F_CTRL_CMD_GPU_GET_RAM_SVOP_VALUES (0x208f1101) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GPU_INTERFACE_ID << 8) | 0x1" */ + +typedef struct NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS { + NvU32 sp; + NvU32 rg; + NvU32 pdp; + NvU32 dp; +} NV208F_CTRL_GPU_RAM_SVOP_VALUES_PARAMS; + +/* + * NV208F_CTRL_CMD_GPU_SET_RAM_SVOP_VALUES + * + * This command can be used to set the RAM SVOP values. + * + * sp + * Input for RAM_SVOP_SP + * rg + * Input for RAM_SVOP_REG + * pdp + * Input for RAM_SVOP_PDP + * dp + * Input for RAM_SVOP_DP + * + * Possible status values returned are: + * NV_OK + * NV_ERR_INVALID_PARAM_STRUCT + * NV_ERR_INVALID_ARGUMENT + */ + +#define NV208F_CTRL_CMD_GPU_SET_RAM_SVOP_VALUES (0x208f1102) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GPU_INTERFACE_ID << 8) | 0x2" */ + + + +/* + * NV208F_CTRL_CMD_GPU_VERIFY_INFOROM + * + * This command can be used by clients to determine if an InfoROM + * with a valid image is present. If the SKU in question does + * not feature an InfoROM, the NV_ERR_NOT_SUPPORTED + * error is returned. Else the RM attempts to read the ROM object + * and any objects listed in the ROM object. The checksum of + * each object read is verified. If all checksums are valid, the + * RM will report the InfoROM as being valid. If image is valid then + * RM will return a checksum for all of the dynamically configurable + * data in InfoROM. This checksum is expected to be same for all the + * boards with an identical InfoROM version and similarly configured. + * + * result + * The result of the InfoROM verification attempt. Possible + * values are: + * NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULTS_NONE + * This value indicates that a validation couldn't be done + * due to some software/OS related error. + * NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULTS_IO_ERROR + * This value indicates that a validation couldn't be done + * due to some IO error. + * NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULTS_VALID + * This value indicates that all InfoROM objects have valid + * checksum. + * NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULTS_INVALID + * This value indicates that some InfoROM objects have invalid + * checksum. + * checksum + * Checksum for all of the dynamically configurable data + * in InfoROM for e.g. PWR and CFG objects. + * + * NOTE: For the result values to be valid, return status should be: + * NV_OK + * + * Possible return status values: + * NV_OK + * NV_ERR_INVALID_ARGUMENT + * NV_ERR_NOT_SUPPORTED + * + */ +#define NV208F_CTRL_CMD_GPU_VERIFY_INFOROM (0x208f1105) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GPU_INTERFACE_ID << 8) | NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS_MESSAGE_ID (0x5U) + +typedef struct NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS { + NvU32 result; + NvU32 checksum; +} NV208F_CTRL_GPU_VERIFY_INFOROM_PARAMS; + +/* valid result values */ +#define NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULT_NONE (0x00000000) +#define NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULT_IO_ERROR (0x00000001) +#define NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULT_VALID (0x00000002) +#define NV208F_CTRL_GPU_INFOROM_VERIFICATION_RESULT_INVALID (0x00000003) + +/* + * NV208F_CTRL_CMD_GPU_DISABLE_ECC_INFOROM_REPORTING + * + * Possible status return values are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ + + + +#define NV208F_CTRL_CMD_GPU_DISABLE_ECC_INFOROM_REPORTING (0x208f1107) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GPU_INTERFACE_ID << 8) | 0x7" */ + + + +/* _ctrl208fgpu_h_ */ + diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgr.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgr.h new file mode 100644 index 0000000..357ac1f --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fgr.h @@ -0,0 +1,109 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2010-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fgr.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +#include "ctrl/ctrl2080/ctrl2080gr.h" + + + +/* + * NV208F_CTRL_CMD_GR_ECC_INJECT_ERROR + * + * Control command to inject a gr ecc error + * + * Parameters: + * + * location + * location index + * sublocation + * sublocation index + * unit + * unit to inject error into + * errorType + * SBE or DBE + * grRouteInfo + * Routing info for SMC + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_GR_ECC_INJECT_ERROR (0x208f1203) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GR_INTERFACE_ID << 8) | NV208F_CTRL_GR_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_GR_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x3U) + +typedef struct NV208F_CTRL_GR_ECC_INJECT_ERROR_PARAMS { + NvU32 location; + NvU32 sublocation; + NvU8 unit; + NvU8 errorType; + NV_DECLARE_ALIGNED(NV2080_CTRL_GR_ROUTE_INFO grRouteInfo, 8); +} NV208F_CTRL_GR_ECC_INJECT_ERROR_PARAMS; + + + +/* + * NV208F_CTRL_CMD_GR_ECC_INJECTION_SUPPORTED + * + * Reports if error injection is supported for a given HW unit + * + * unit [in]: + * The ECC protected unit for which ECC injection support is being checked. + * + * bCorrectableSupported [out]: + * Boolean value that shows if correcatable errors can be injected. + * + * bUncorrectableSupported [out]: + * Boolean value that shows if uncorrecatable errors can be injected. + * + * Return values: + * NV_OK on success + * NV_ERR_INVALID_ARGUMENT if the requested unit is invalid. + * NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled. + * NV_ERR_NOT_SUPPORTED otherwise + * + * + */ +#define NV208F_CTRL_CMD_GR_ECC_INJECTION_SUPPORTED (0x208f1204) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_GR_INTERFACE_ID << 8) | NV208F_CTRL_GR_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_GR_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x4U) + +typedef struct NV208F_CTRL_GR_ECC_INJECTION_SUPPORTED_PARAMS { + NvU8 unit; + NvBool bCorrectableSupported; + NvBool bUncorrectableSupported; + NV_DECLARE_ALIGNED(NV2080_CTRL_GR_ROUTE_INFO grRouteInfo, 8); +} NV208F_CTRL_GR_ECC_INJECTION_SUPPORTED_PARAMS; + +/* _ctrl208fgr_h_ */ diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fmmu.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fmmu.h new file mode 100644 index 0000000..2b298e6 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fmmu.h @@ -0,0 +1,128 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fmmu.finn +// + +#include "ctrl/ctrl208f/ctrl208fbase.h" + +/* + * NV208F_CTRL_CMD_MMU_ECC_INJECT_ERROR + * + * This ctrl call injects MMU ECC errors. Please see the confluence + * page "ECC" for more information on ECC and ECC injection: + * + * Parameters: + * + * location + * Only used for HSHUBMMU. + * + * sublocation + * Only used for HSHUBMMU. + * + * unit + * Specifies the MMU HW unit where the injection will occur. + * + * errorType + * Specifies whether the injected error will be correctable or uncorrectable. + * Correctable errors have no effect on running programs while uncorrectable + * errors will cause all channels to be torn down. + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + * NV_ERR_INVALID_ARGUMENT + */ +#define NV208F_CTRL_CMD_MMU_ECC_INJECT_ERROR (0x208f0b01) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID << 8) | NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS_MESSAGE_ID (0x1U) + +typedef struct NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS { + NvU32 location; + NvU32 sublocation; + NvU8 unit; + NvU8 errorType; +} NV208F_CTRL_MMU_ECC_INJECT_ERROR_PARAMS; + + + +/* + * NV208F_CTRL_CMD_MMU_ECC_INJECTION_SUPPORTED + * + * Reports if error injection is supported for a given HW unit + * + * unit [in]: + * The ECC protected unit for which ECC injection support is being checked. + * + * bCorrectableSupported [out]: + * Boolean value that shows if correcatable errors can be injected. + * + * bUncorrectableSupported [out]: + * Boolean value that shows if uncorrecatable errors can be injected. + * + * Return values: + * NV_OK on success + * NV_ERR_INVALID_ARGUMENT if the requested location is invalid. + * NV_ERR_INSUFFICIENT_PERMISSIONS if priv write not enabled. + * NV_ERR_NOT_SUPPORTED otherwise + * + */ +#define NV208F_CTRL_CMD_MMU_ECC_INJECTION_SUPPORTED (0x208f0b02) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID << 8) | NV208F_CTRL_MMU_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID" */ + + + +#define NV208F_CTRL_MMU_ECC_INJECTION_SUPPORTED_PARAMS_MESSAGE_ID (0x2U) + +typedef struct NV208F_CTRL_MMU_ECC_INJECTION_SUPPORTED_PARAMS { + NvU8 unit; + NvBool bCorrectableSupported; + NvBool bUncorrectableSupported; +} NV208F_CTRL_MMU_ECC_INJECTION_SUPPORTED_PARAMS; + +/* + * NV208F_CTRL_CMD_MMU_GET_NUM_HSHUBMMUS + * + * Returns the number of ECC Capable HSHUBMMUS. + * + * numHshubmmus [out] + * Number of Hshubmmus + * + * Possible status values returned are: + * NV_OK + * NV_ERR_NOT_SUPPORTED + */ +#define NV208F_CTRL_CMD_MMU_GET_NUM_HSHUBMMUS (0x208f0b03) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID << 8) | NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS_MESSAGE_ID" */ + +#define NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS_MESSAGE_ID (0x3U) + +typedef struct NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS { + NvU32 numHshubmmus; +} NV208F_CTRL_MMU_GET_NUM_HSHUBMMUS_PARAMS; + +/* _ctrl208fmmu_h_ */ diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpmgr.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpmgr.h new file mode 100644 index 0000000..d7ea299 --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpmgr.h @@ -0,0 +1,32 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2011-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fpmgr.finn +// + diff --git a/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpower.h b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpower.h new file mode 100644 index 0000000..e225c7b --- /dev/null +++ b/userspace/sdks/nv570/nvidia/inc/ctrl/ctrl208f/ctrl208fpower.h @@ -0,0 +1,32 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2007-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: ctrl/ctrl208f/ctrl208fpower.finn +// + -- cgit v1.2.3