From 00e54c13c7c9030c4d5f7151467f2d85a3730e29 Mon Sep 17 00:00:00 2001 From: Arthur Hanson Rasmusson Date: Sun, 13 Sep 2026 18:36:21 -0400 Subject: Initial commit: Open-IOV vGPU-IO complete stack - Firmware decompilation: GSP 570.144W (28.5MB ELF, RV64IMAC), 132 decompiled C files - Kernel modules: nvidia.ko (34MB, OpenRM), open-iov-vfio.ko (2.8MB, VFIO mdev), gsp-vgpu.ko (1.8MB, guest driver) - Userspace: libiov.so/libvgpu.so (76KB), example_vgpu (28KB), rpc_emulator.c - PCI config space emulation (256B with PM, MSI, MSI-X, PCIe caps) - 12 RPC types fully mapped from firmware decompilation - BAR trap, WPR, scheduling, notification, migration emulation - Helper scripts: load_vgpu_stack, create_mdev, launch_qemu_vgpu, test_vgpu_stack, setup_guest_driver, unload_vgpu_stack - Architecture documentation - Wiki: 10 technical documents - Git LFS for large binaries (.ko, .bin, .iso, .img, .o, ghidra repos) - nvidia-open-gpu-kernel-modules as submodule --- userspace/sdks/nv570/inc/class/cl0000.h | 53 + .../sdks/nv570/inc/class/cl0000_notification.h | 60 + userspace/sdks/nv570/inc/class/cl0001.h | 37 + userspace/sdks/nv570/inc/class/cl0002.h | 51 + userspace/sdks/nv570/inc/class/cl0004.h | 50 + userspace/sdks/nv570/inc/class/cl0005.h | 58 + .../sdks/nv570/inc/class/cl0005_notification.h | 51 + userspace/sdks/nv570/inc/class/cl000f.h | 55 + userspace/sdks/nv570/inc/class/cl0020.h | 31 + userspace/sdks/nv570/inc/class/cl0030.h | 51 + userspace/sdks/nv570/inc/class/cl003e.h | 51 + userspace/sdks/nv570/inc/class/cl003f.h | 58 + userspace/sdks/nv570/inc/class/cl0040.h | 55 + userspace/sdks/nv570/inc/class/cl0041.h | 45 + userspace/sdks/nv570/inc/class/cl0050.h | 81 + userspace/sdks/nv570/inc/class/cl0060.h | 39 + userspace/sdks/nv570/inc/class/cl0070.h | 73 + userspace/sdks/nv570/inc/class/cl0071.h | 38 + userspace/sdks/nv570/inc/class/cl0073.h | 56 + userspace/sdks/nv570/inc/class/cl0076.h | 38 + userspace/sdks/nv570/inc/class/cl007d.h | 64 + userspace/sdks/nv570/inc/class/cl0080.h | 64 + .../sdks/nv570/inc/class/cl0080_notification.h | 45 + userspace/sdks/nv570/inc/class/cl008f.h | 32 + userspace/sdks/nv570/inc/class/cl0090.h | 32 + userspace/sdks/nv570/inc/class/cl0092.h | 72 + userspace/sdks/nv570/inc/class/cl0092_callback.h | 28 + userspace/sdks/nv570/inc/class/cl00b1.h | 28 + userspace/sdks/nv570/inc/class/cl00c1.h | 65 + userspace/sdks/nv570/inc/class/cl00c2.h | 41 + userspace/sdks/nv570/inc/class/cl00c3.h | 43 + userspace/sdks/nv570/inc/class/cl00da.h | 85 + userspace/sdks/nv570/inc/class/cl00db.h | 43 + userspace/sdks/nv570/inc/class/cl00de.h | 511 +++ userspace/sdks/nv570/inc/class/cl00e0.h | 111 + userspace/sdks/nv570/inc/class/cl00f1.h | 64 + userspace/sdks/nv570/inc/class/cl00f2.h | 38 + userspace/sdks/nv570/inc/class/cl00f8.h | 133 + userspace/sdks/nv570/inc/class/cl00f9.h | 82 + userspace/sdks/nv570/inc/class/cl00fb.h | 71 + userspace/sdks/nv570/inc/class/cl00fc.h | 39 + userspace/sdks/nv570/inc/class/cl00fd.h | 99 + userspace/sdks/nv570/inc/class/cl00fe.h | 53 + userspace/sdks/nv570/inc/class/cl0100.h | 50 + userspace/sdks/nv570/inc/class/cl0101.h | 39 + userspace/sdks/nv570/inc/class/cl2080.h | 46 + .../sdks/nv570/inc/class/cl2080_notification.h | 612 +++ userspace/sdks/nv570/inc/class/cl2081.h | 40 + userspace/sdks/nv570/inc/class/cl2082.h | 40 + userspace/sdks/nv570/inc/class/cl208f.h | 39 + userspace/sdks/nv570/inc/class/cl30f1.h | 56 + .../sdks/nv570/inc/class/cl30f1_notification.h | 74 + userspace/sdks/nv570/inc/class/cl402c.h | 47 + userspace/sdks/nv570/inc/class/cl503b.h | 81 + userspace/sdks/nv570/inc/class/cl503c.h | 47 + userspace/sdks/nv570/inc/class/cl506f.h | 157 + userspace/sdks/nv570/inc/class/cl5070.h | 44 + .../sdks/nv570/inc/class/cl5070_notification.h | 45 + userspace/sdks/nv570/inc/class/cl5080.h | 46 + .../sdks/nv570/inc/class/cl5080_notification.h | 43 + userspace/sdks/nv570/inc/class/cl50a0.h | 38 + userspace/sdks/nv570/inc/class/cl83de.h | 56 + userspace/sdks/nv570/inc/class/cl844c.h | 47 + userspace/sdks/nv570/inc/class/cl84a0.h | 110 + userspace/sdks/nv570/inc/class/cl84a0_deprecated.h | 90 + userspace/sdks/nv570/inc/class/cl85b5sw.h | 38 + userspace/sdks/nv570/inc/class/cl900e.h | 39 + userspace/sdks/nv570/inc/class/cl9010.h | 45 + userspace/sdks/nv570/inc/class/cl9010_callback.h | 27 + userspace/sdks/nv570/inc/class/cl902d.h | 1092 +++++ userspace/sdks/nv570/inc/class/cl9067.h | 39 + userspace/sdks/nv570/inc/class/cl906f.h | 242 ++ userspace/sdks/nv570/inc/class/cl906fsw.h | 42 + userspace/sdks/nv570/inc/class/cl9072.h | 46 + .../sdks/nv570/inc/class/cl9072_notification.h | 39 + userspace/sdks/nv570/inc/class/cl9074.h | 51 + userspace/sdks/nv570/inc/class/cl9096.h | 40 + userspace/sdks/nv570/inc/class/cl9097.h | 3815 +++++++++++++++++ userspace/sdks/nv570/inc/class/cl90cc.h | 48 + userspace/sdks/nv570/inc/class/cl90cd.h | 237 ++ userspace/sdks/nv570/inc/class/cl90cdfecs.h | 112 + userspace/sdks/nv570/inc/class/cl90cdtrace.h | 68 + userspace/sdks/nv570/inc/class/cl90cdtypes.h | 49 + userspace/sdks/nv570/inc/class/cl90cdvideo.h | 129 + userspace/sdks/nv570/inc/class/cl90ce.h | 42 + userspace/sdks/nv570/inc/class/cl90e6.h | 43 + userspace/sdks/nv570/inc/class/cl90e7.h | 38 + userspace/sdks/nv570/inc/class/cl90ec.h | 46 + userspace/sdks/nv570/inc/class/cl90f1.h | 39 + userspace/sdks/nv570/inc/class/cl9170.h | 41 + userspace/sdks/nv570/inc/class/cl9171.h | 317 ++ userspace/sdks/nv570/inc/class/cl917d.h | 1551 +++++++ userspace/sdks/nv570/inc/class/cla06c.h | 39 + userspace/sdks/nv570/inc/class/cla06f.h | 240 ++ userspace/sdks/nv570/inc/class/cla06fsubch.h | 33 + userspace/sdks/nv570/inc/class/cla06fsw.h | 41 + userspace/sdks/nv570/inc/class/cla080.h | 32 + userspace/sdks/nv570/inc/class/cla081.h | 44 + userspace/sdks/nv570/inc/class/cla083.h | 36 + userspace/sdks/nv570/inc/class/cla084.h | 82 + .../sdks/nv570/inc/class/cla084_notification.h | 58 + userspace/sdks/nv570/inc/class/cla097.h | 3817 +++++++++++++++++ userspace/sdks/nv570/inc/class/cla0b0.h | 39 + userspace/sdks/nv570/inc/class/cla0b5.h | 262 ++ userspace/sdks/nv570/inc/class/cla0bc.h | 209 + userspace/sdks/nv570/inc/class/cla0bd.h | 81 + userspace/sdks/nv570/inc/class/cla0c0.h | 646 +++ userspace/sdks/nv570/inc/class/cla0c0qmd.h | 658 +++ userspace/sdks/nv570/inc/class/cla140.h | 29 + userspace/sdks/nv570/inc/class/cla16f.h | 254 ++ userspace/sdks/nv570/inc/class/cla16fsw.h | 41 + userspace/sdks/nv570/inc/class/cla197.h | 3826 +++++++++++++++++ userspace/sdks/nv570/inc/class/cla1c0.h | 669 +++ userspace/sdks/nv570/inc/class/clb069.h | 64 + userspace/sdks/nv570/inc/class/clb069sw.h | 38 + userspace/sdks/nv570/inc/class/clb06f.h | 260 ++ userspace/sdks/nv570/inc/class/clb06fsw.h | 42 + userspace/sdks/nv570/inc/class/clb097.h | 3966 +++++++++++++++++ userspace/sdks/nv570/inc/class/clb0b0.h | 39 + userspace/sdks/nv570/inc/class/clb0b5.h | 261 ++ userspace/sdks/nv570/inc/class/clb0b5sw.h | 54 + userspace/sdks/nv570/inc/class/clb0c0.h | 720 ++++ userspace/sdks/nv570/inc/class/clb0cc.h | 46 + userspace/sdks/nv570/inc/class/clb0cd.h | 49 + userspace/sdks/nv570/inc/class/clb0ce.h | 53 + userspace/sdks/nv570/inc/class/clb197.h | 4160 ++++++++++++++++++ userspace/sdks/nv570/inc/class/clb1c0.h | 750 ++++ userspace/sdks/nv570/inc/class/clb1cc.h | 50 + userspace/sdks/nv570/inc/class/clb2cc.h | 60 + userspace/sdks/nv570/inc/class/clb4b7.h | 40 + userspace/sdks/nv570/inc/class/clb6b0.h | 39 + userspace/sdks/nv570/inc/class/clb8b0.h | 27 + userspace/sdks/nv570/inc/class/clb8d1.h | 27 + userspace/sdks/nv570/inc/class/clb8fa.h | 29 + userspace/sdks/nv570/inc/class/clc06f.h | 312 ++ userspace/sdks/nv570/inc/class/clc06fsw.h | 44 + userspace/sdks/nv570/inc/class/clc076.h | 82 + userspace/sdks/nv570/inc/class/clc097.h | 4191 ++++++++++++++++++ userspace/sdks/nv570/inc/class/clc0b5.h | 261 ++ userspace/sdks/nv570/inc/class/clc0b5sw.h | 54 + userspace/sdks/nv570/inc/class/clc0b7.h | 40 + userspace/sdks/nv570/inc/class/clc0c0.h | 777 ++++ userspace/sdks/nv570/inc/class/clc197.h | 4242 ++++++++++++++++++ userspace/sdks/nv570/inc/class/clc1b0.h | 40 + userspace/sdks/nv570/inc/class/clc1b5.h | 273 ++ userspace/sdks/nv570/inc/class/clc1b5sw.h | 54 + userspace/sdks/nv570/inc/class/clc1b7.h | 40 + userspace/sdks/nv570/inc/class/clc1c0.h | 795 ++++ userspace/sdks/nv570/inc/class/clc2b0.h | 39 + userspace/sdks/nv570/inc/class/clc2b7.h | 40 + userspace/sdks/nv570/inc/class/clc361.h | 35 + userspace/sdks/nv570/inc/class/clc365.h | 88 + userspace/sdks/nv570/inc/class/clc369.h | 77 + userspace/sdks/nv570/inc/class/clc36f.h | 366 ++ userspace/sdks/nv570/inc/class/clc36fsw.h | 44 + userspace/sdks/nv570/inc/class/clc370.h | 43 + .../sdks/nv570/inc/class/clc370_notification.h | 44 + userspace/sdks/nv570/inc/class/clc371.h | 109 + userspace/sdks/nv570/inc/class/clc372sw.h | 36 + userspace/sdks/nv570/inc/class/clc373.h | 350 ++ userspace/sdks/nv570/inc/class/clc37b.h | 68 + userspace/sdks/nv570/inc/class/clc37d.h | 953 +++++ userspace/sdks/nv570/inc/class/clc37dcrcnotif.h | 50 + userspace/sdks/nv570/inc/class/clc37dswspare.h | 36 + userspace/sdks/nv570/inc/class/clc37e.h | 498 +++ userspace/sdks/nv570/inc/class/clc397.h | 4219 ++++++++++++++++++ userspace/sdks/nv570/inc/class/clc3b0.h | 39 + userspace/sdks/nv570/inc/class/clc3b5.h | 278 ++ userspace/sdks/nv570/inc/class/clc3b5sw.h | 54 + userspace/sdks/nv570/inc/class/clc3b7.h | 40 + userspace/sdks/nv570/inc/class/clc3c0.h | 703 +++ userspace/sdks/nv570/inc/class/clc461.h | 29 + userspace/sdks/nv570/inc/class/clc46f.h | 365 ++ userspace/sdks/nv570/inc/class/clc46fsw.h | 44 + userspace/sdks/nv570/inc/class/clc4b0.h | 40 + userspace/sdks/nv570/inc/class/clc4b7.h | 40 + userspace/sdks/nv570/inc/class/clc4c0.h | 34 + userspace/sdks/nv570/inc/class/clc4d1.h | 40 + userspace/sdks/nv570/inc/class/clc561.h | 29 + userspace/sdks/nv570/inc/class/clc56f.h | 367 ++ userspace/sdks/nv570/inc/class/clc56fsw.h | 44 + userspace/sdks/nv570/inc/class/clc570.h | 41 + userspace/sdks/nv570/inc/class/clc572.h | 39 + userspace/sdks/nv570/inc/class/clc573.h | 606 +++ userspace/sdks/nv570/inc/class/clc574.h | 41 + userspace/sdks/nv570/inc/class/clc57a.h | 213 + userspace/sdks/nv570/inc/class/clc57b.h | 67 + userspace/sdks/nv570/inc/class/clc57d.h | 1277 ++++++ userspace/sdks/nv570/inc/class/clc57e.h | 657 +++ userspace/sdks/nv570/inc/class/clc57esw.h | 45 + userspace/sdks/nv570/inc/class/clc58b.h | 50 + userspace/sdks/nv570/inc/class/clc597.h | 4352 +++++++++++++++++++ userspace/sdks/nv570/inc/class/clc597tex.h | 1454 +++++++ userspace/sdks/nv570/inc/class/clc5b5.h | 282 ++ userspace/sdks/nv570/inc/class/clc5b5sw.h | 54 + userspace/sdks/nv570/inc/class/clc5c0.h | 732 ++++ userspace/sdks/nv570/inc/class/clc637.h | 62 + userspace/sdks/nv570/inc/class/clc638.h | 50 + userspace/sdks/nv570/inc/class/clc639.h | 48 + userspace/sdks/nv570/inc/class/clc640.h | 48 + userspace/sdks/nv570/inc/class/clc661.h | 27 + userspace/sdks/nv570/inc/class/clc670.h | 41 + userspace/sdks/nv570/inc/class/clc671.h | 124 + userspace/sdks/nv570/inc/class/clc673.h | 505 +++ userspace/sdks/nv570/inc/class/clc67a.h | 213 + userspace/sdks/nv570/inc/class/clc67b.h | 67 + userspace/sdks/nv570/inc/class/clc67d.h | 1337 ++++++ userspace/sdks/nv570/inc/class/clc67e.h | 698 +++ userspace/sdks/nv570/inc/class/clc697.h | 4352 +++++++++++++++++++ userspace/sdks/nv570/inc/class/clc6b0.h | 40 + userspace/sdks/nv570/inc/class/clc6b5.h | 282 ++ userspace/sdks/nv570/inc/class/clc6b5sw.h | 54 + userspace/sdks/nv570/inc/class/clc6c0.h | 697 +++ userspace/sdks/nv570/inc/class/clc6fa.h | 29 + userspace/sdks/nv570/inc/class/clc761.h | 30 + userspace/sdks/nv570/inc/class/clc763.h | 29 + userspace/sdks/nv570/inc/class/clc770.h | 35 + userspace/sdks/nv570/inc/class/clc771.h | 257 ++ userspace/sdks/nv570/inc/class/clc773.h | 667 +++ userspace/sdks/nv570/inc/class/clc77d.h | 1372 ++++++ userspace/sdks/nv570/inc/class/clc77f.h | 34 + userspace/sdks/nv570/inc/class/clc797.h | 4481 ++++++++++++++++++++ userspace/sdks/nv570/inc/class/clc7b0.h | 40 + userspace/sdks/nv570/inc/class/clc7b5.h | 304 ++ userspace/sdks/nv570/inc/class/clc7b7.h | 39 + userspace/sdks/nv570/inc/class/clc7c0.h | 848 ++++ userspace/sdks/nv570/inc/class/clc7fa.h | 40 + userspace/sdks/nv570/inc/class/clc863.h | 31 + userspace/sdks/nv570/inc/class/clc86f.h | 191 + userspace/sdks/nv570/inc/class/clc86fsw.h | 45 + userspace/sdks/nv570/inc/class/clc870.h | 41 + userspace/sdks/nv570/inc/class/clc871.h | 380 ++ userspace/sdks/nv570/inc/class/clc873.h | 399 ++ userspace/sdks/nv570/inc/class/clc87a.h | 180 + userspace/sdks/nv570/inc/class/clc87b.h | 63 + userspace/sdks/nv570/inc/class/clc87d.h | 1341 ++++++ userspace/sdks/nv570/inc/class/clc87e.h | 697 +++ userspace/sdks/nv570/inc/class/clc8b5.h | 137 + userspace/sdks/nv570/inc/class/clc96f.h | 113 + userspace/sdks/nv570/inc/class/clc96fsw.h | 45 + userspace/sdks/nv570/inc/class/clc970.h | 41 + userspace/sdks/nv570/inc/class/clc971.h | 329 ++ userspace/sdks/nv570/inc/class/clc973.h | 379 ++ userspace/sdks/nv570/inc/class/clc97a.h | 168 + userspace/sdks/nv570/inc/class/clc97b.h | 64 + userspace/sdks/nv570/inc/class/clc97d.h | 1377 ++++++ userspace/sdks/nv570/inc/class/clc97dswspare.h | 56 + userspace/sdks/nv570/inc/class/clc97e.h | 751 ++++ userspace/sdks/nv570/inc/class/clc997.h | 4481 ++++++++++++++++++++ userspace/sdks/nv570/inc/class/clc9b0.h | 29 + userspace/sdks/nv570/inc/class/clc9b5.h | 29 + userspace/sdks/nv570/inc/class/clc9b7.h | 29 + userspace/sdks/nv570/inc/class/clc9c0.h | 29 + userspace/sdks/nv570/inc/class/clc9d1.h | 31 + userspace/sdks/nv570/inc/class/clc9fa.h | 32 + userspace/sdks/nv570/inc/class/clca6f.h | 74 + userspace/sdks/nv570/inc/class/clca6fsw.h | 45 + userspace/sdks/nv570/inc/class/clca70.h | 41 + userspace/sdks/nv570/inc/class/clca71.h | 186 + userspace/sdks/nv570/inc/class/clca73.h | 915 ++++ userspace/sdks/nv570/inc/class/clca7a.h | 216 + userspace/sdks/nv570/inc/class/clca7b.h | 70 + userspace/sdks/nv570/inc/class/clca7d.h | 2007 +++++++++ userspace/sdks/nv570/inc/class/clca7e.h | 906 ++++ userspace/sdks/nv570/inc/class/clcab5.h | 44 + userspace/sdks/nv570/inc/class/clcb33.h | 40 + userspace/sdks/nv570/inc/class/clcb70.h | 41 + userspace/sdks/nv570/inc/class/clcb71.h | 186 + userspace/sdks/nv570/inc/class/clcb73.h | 915 ++++ userspace/sdks/nv570/inc/class/clcb7a.h | 216 + userspace/sdks/nv570/inc/class/clcb7b.h | 70 + userspace/sdks/nv570/inc/class/clcb7d.h | 2007 +++++++++ userspace/sdks/nv570/inc/class/clcb7e.h | 906 ++++ userspace/sdks/nv570/inc/class/clcb97.h | 4480 +++++++++++++++++++ userspace/sdks/nv570/inc/class/clcb97tex.h | 2437 +++++++++++ userspace/sdks/nv570/inc/class/clcba2.h | 159 + userspace/sdks/nv570/inc/class/clcbc0.h | 27 + userspace/sdks/nv570/inc/class/clcbca.h | 39 + userspace/sdks/nv570/inc/class/clcc70.h | 41 + userspace/sdks/nv570/inc/class/clcc71.h | 186 + userspace/sdks/nv570/inc/class/clcc73.h | 915 ++++ userspace/sdks/nv570/inc/class/clcc7a.h | 216 + userspace/sdks/nv570/inc/class/clcc7b.h | 70 + userspace/sdks/nv570/inc/class/clcc7d.h | 2007 +++++++++ userspace/sdks/nv570/inc/class/clcc7e.h | 917 ++++ userspace/sdks/nv570/inc/class/clcd40.h | 29 + userspace/sdks/nv570/inc/class/clcd97.h | 29 + userspace/sdks/nv570/inc/class/clcdb0.h | 29 + userspace/sdks/nv570/inc/class/clcdc0.h | 777 ++++ userspace/sdks/nv570/inc/class/clcdcd.h | 47 + userspace/sdks/nv570/inc/class/clcdd1.h | 29 + userspace/sdks/nv570/inc/class/clcdfa.h | 29 + userspace/sdks/nv570/inc/class/clce97.h | 30 + userspace/sdks/nv570/inc/class/clceb0.h | 30 + userspace/sdks/nv570/inc/class/clceb7.h | 30 + userspace/sdks/nv570/inc/class/clcec0.h | 30 + userspace/sdks/nv570/inc/class/clced0.h | 30 + userspace/sdks/nv570/inc/class/clcefa.h | 30 + userspace/sdks/nv570/inc/class/clcfb0.h | 30 + userspace/sdks/nv570/inc/class/clcfb7.h | 30 + userspace/sdks/nv570/inc/class/clcfd1.h | 30 + userspace/sdks/nv570/inc/class/clcffa.h | 30 + userspace/sdks/nv570/inc/class/cld0b7.h | 40 + userspace/sdks/nv570/inc/class/cld1b0.h | 29 + userspace/sdks/nv570/inc/class/cld1b7.h | 26 + userspace/sdks/nv570/inc/class/cld1fa.h | 26 + userspace/sdks/nv570/inc/class/cld2b0.h | 29 + userspace/sdks/nv570/inc/class/cld2d1.h | 30 + userspace/sdks/nv570/inc/class/cld2fa.h | 28 + userspace/sdks/nv570/inc/class/cld5b7.h | 30 + 310 files changed, 115526 insertions(+) create mode 100644 userspace/sdks/nv570/inc/class/cl0000.h create mode 100644 userspace/sdks/nv570/inc/class/cl0000_notification.h create mode 100644 userspace/sdks/nv570/inc/class/cl0001.h create mode 100644 userspace/sdks/nv570/inc/class/cl0002.h create mode 100644 userspace/sdks/nv570/inc/class/cl0004.h create mode 100644 userspace/sdks/nv570/inc/class/cl0005.h create mode 100644 userspace/sdks/nv570/inc/class/cl0005_notification.h create mode 100644 userspace/sdks/nv570/inc/class/cl000f.h create mode 100644 userspace/sdks/nv570/inc/class/cl0020.h create mode 100644 userspace/sdks/nv570/inc/class/cl0030.h create mode 100644 userspace/sdks/nv570/inc/class/cl003e.h create mode 100644 userspace/sdks/nv570/inc/class/cl003f.h create mode 100644 userspace/sdks/nv570/inc/class/cl0040.h create mode 100644 userspace/sdks/nv570/inc/class/cl0041.h create mode 100644 userspace/sdks/nv570/inc/class/cl0050.h create mode 100644 userspace/sdks/nv570/inc/class/cl0060.h create mode 100644 userspace/sdks/nv570/inc/class/cl0070.h create mode 100644 userspace/sdks/nv570/inc/class/cl0071.h create mode 100644 userspace/sdks/nv570/inc/class/cl0073.h create mode 100644 userspace/sdks/nv570/inc/class/cl0076.h create mode 100644 userspace/sdks/nv570/inc/class/cl007d.h create mode 100644 userspace/sdks/nv570/inc/class/cl0080.h create mode 100644 userspace/sdks/nv570/inc/class/cl0080_notification.h create mode 100644 userspace/sdks/nv570/inc/class/cl008f.h create mode 100644 userspace/sdks/nv570/inc/class/cl0090.h create mode 100644 userspace/sdks/nv570/inc/class/cl0092.h create mode 100644 userspace/sdks/nv570/inc/class/cl0092_callback.h create mode 100644 userspace/sdks/nv570/inc/class/cl00b1.h create mode 100644 userspace/sdks/nv570/inc/class/cl00c1.h create mode 100644 userspace/sdks/nv570/inc/class/cl00c2.h create mode 100644 userspace/sdks/nv570/inc/class/cl00c3.h create mode 100644 userspace/sdks/nv570/inc/class/cl00da.h create mode 100644 userspace/sdks/nv570/inc/class/cl00db.h create mode 100644 userspace/sdks/nv570/inc/class/cl00de.h create mode 100644 userspace/sdks/nv570/inc/class/cl00e0.h create mode 100644 userspace/sdks/nv570/inc/class/cl00f1.h create mode 100644 userspace/sdks/nv570/inc/class/cl00f2.h create mode 100644 userspace/sdks/nv570/inc/class/cl00f8.h create mode 100644 userspace/sdks/nv570/inc/class/cl00f9.h create mode 100644 userspace/sdks/nv570/inc/class/cl00fb.h create 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mode 100644 userspace/sdks/nv570/inc/class/cld1b7.h create mode 100644 userspace/sdks/nv570/inc/class/cld1fa.h create mode 100644 userspace/sdks/nv570/inc/class/cld2b0.h create mode 100644 userspace/sdks/nv570/inc/class/cld2d1.h create mode 100644 userspace/sdks/nv570/inc/class/cld2fa.h create mode 100644 userspace/sdks/nv570/inc/class/cld5b7.h (limited to 'userspace/sdks/nv570/inc/class') diff --git a/userspace/sdks/nv570/inc/class/cl0000.h b/userspace/sdks/nv570/inc/class/cl0000.h new file mode 100644 index 0000000..b56b157 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0000.h @@ -0,0 +1,53 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0000.finn +// + +#include "nvlimits.h" +#include "cl0000_notification.h" + +/* object NV01_NULL_OBJECT */ +#define NV01_NULL_OBJECT (0x0) /* finn: Evaluated from "NV0000_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* obsolete alises */ +#define NV1_NULL_OBJECT NV01_NULL_OBJECT + +#define NV01_ROOT (0x0U) /* finn: Evaluated from "NV0000_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* NvAlloc parameteters */ +#define NV0000_ALLOC_PARAMETERS_MESSAGE_ID (0x0000U) + +typedef struct NV0000_ALLOC_PARAMETERS { + NvHandle hClient; /* CORERM-2934: hClient must remain the first member until all allocations use these params */ + NvU32 processID; + char processName[NV_PROC_NAME_MAX_LENGTH]; + NV_DECLARE_ALIGNED(NvP64 pOsPidInfo, 8); +} NV0000_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl0000_notification.h b/userspace/sdks/nv570/inc/class/cl0000_notification.h new file mode 100644 index 0000000..9c91de3 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0000_notification.h @@ -0,0 +1,60 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0000_notification_h_ +#define _cl0000_notification_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +/*Status definitions for NV0000_NOTIFIERS_DISPLAY_CHANGE event*/ + +#define NV0000_NOTIFIERS_STATUS_ACPI_DISPLAY_DEVICE_CYCLE (0) + +//--------------------------------------------------------------------------- + +/* NvNotification[] fields and values */ +#define NV000_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + + +/* pio method data structure */ +typedef volatile struct _cl0000_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv000Typedef, Nv01Root; + +/* obsolete aliases */ +#define NV000_TYPEDEF Nv01Root +#define Nv1Root Nv01Root +#define nv1Root Nv01Root +#define nv01Root Nv01Root + +/*event values*/ +#define NV0000_NOTIFIERS_ENABLE_CPU_UTIL_CTRL (1) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0000_notification_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/cl0001.h b/userspace/sdks/nv570/inc/class/cl0001.h new file mode 100644 index 0000000..10a8af4 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0001.h @@ -0,0 +1,37 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2013 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0001_h_ +#define _cl0001_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NV01_ROOT_NON_PRIV (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0001_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0002.h b/userspace/sdks/nv570/inc/class/cl0002.h new file mode 100644 index 0000000..dd1d6c6 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0002.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2001-2001, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0002_h_ +#define _cl0002_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV01_CONTEXT_DMA_FROM_MEMORY (0x00000002) +/* NvNotification[] fields and values */ +#define NV002_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) +/* pio method data structure */ +typedef volatile struct _cl0002_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv002Typedef, Nv01ContextDmaFromMemory; +#define NV002_TYPEDEF Nv01ContextDmaFromMemory +/* obsolete stuff */ +#define NV1_CONTEXT_DMA_FROM_MEMORY (0x00000002) +#define NV01_CONTEXT_DMA (0x00000002) +#define Nv1ContextDmaFromMemory Nv01ContextDmaFromMemory +#define nv1ContextDmaFromMemory Nv01ContextDmaFromMemory +#define nv01ContextDmaFromMemory Nv01ContextDmaFromMemory + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0002_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0004.h b/userspace/sdks/nv570/inc/class/cl0004.h new file mode 100644 index 0000000..32e25e7 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0004.h @@ -0,0 +1,50 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0004_h_ +#define _cl0004_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV01_TIMER (0x00000004) +/* NvNotification[] elements */ +#define NV004_NOTIFIERS_SET_ALARM_NOTIFY (0) +#define NV004_NOTIFIERS_MAXCOUNT (1) + +/* mapped timer registers */ +typedef volatile struct _Nv01TimerMapTypedef { + NvU32 Reserved00[0x100]; + NvU32 PTimerTime0; /* 0x00009400 */ + NvU32 Reserved01[0x3]; + NvU32 PTimerTime1; /* 0x00009410 */ +} Nv01TimerMap; + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0004_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0005.h b/userspace/sdks/nv570/inc/class/cl0005.h new file mode 100644 index 0000000..f3f5b53 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0005.h @@ -0,0 +1,58 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0005.finn +// + +#include "cl0005_notification.h" + +#define NV01_EVENT (0x5U) /* finn: Evaluated from "NV0005_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* NvRmAlloc() parameters */ +#define NV0005_ALLOC_PARAMETERS_MESSAGE_ID (0x0005U) + +typedef struct NV0005_ALLOC_PARAMETERS { + NvHandle hParentClient; + NvHandle hSrcResource; + + NvV32 hClass; + NvV32 notifyIndex; + NV_DECLARE_ALIGNED(NvP64 data, 8); +} NV0005_ALLOC_PARAMETERS; + + +/* NV0005_ALLOC_PARAMETERS's notifyIndex field is overloaded to contain the + * notifyIndex value itself, plus flags, and optionally a subdevice field if + * flags contains NV01_EVENT_SUBDEVICE_SPECIFIC. Note that NV01_EVENT_* + * contain the full 32-bit flag value that is OR'd into notifyIndex, not the + * contents of the FLAGS field (i.e. NV01_EVENT_* are pre-shifted into place). + */ +#define NV0005_NOTIFY_INDEX_INDEX 15:0 +#define NV0005_NOTIFY_INDEX_SUBDEVICE 23:16 +#define NV0005_NOTIFY_INDEX_FLAGS 31:24 diff --git a/userspace/sdks/nv570/inc/class/cl0005_notification.h b/userspace/sdks/nv570/inc/class/cl0005_notification.h new file mode 100644 index 0000000..5e6b32e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0005_notification.h @@ -0,0 +1,51 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0005_notification_h_ +#define _cl0005_notification_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* NvNotification[] fields and values */ +#define NV003_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +/* pio method data structure */ +typedef volatile struct _cl0005_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv005Typedef, Nv01Event; + +#define NV005_TYPEDEF Nv01Event + +/* obsolete stuff */ +#define NV1_TIMER (0x00000004) +#define Nv1Event Nv01Event +#define nv1Event Nv01Event +#define nv01Event Nv01Event + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0005_notification_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl000f.h b/userspace/sdks/nv570/inc/class/cl000f.h new file mode 100644 index 0000000..3182bec --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl000f.h @@ -0,0 +1,55 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2017-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl000f.finn +// + +#define FABRIC_MANAGER_SESSION (0xfU) /* finn: Evaluated from "NV000F_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NV000F_NOTIFIERS_FABRIC_EVENT (0) + +#define NV000F_FLAGS_CHANNEL_RECOVERY 0:0 +#define NV000F_FLAGS_CHANNEL_RECOVERY_ENABLED 0x0 +#define NV000F_FLAGS_CHANNEL_RECOVERY_DISABLED 0x1 + +#define NV000F_ALLOCATION_PARAMETERS_MESSAGE_ID (0x000fU) + +typedef struct NV000F_ALLOCATION_PARAMETERS { + // + // capDescriptor is a file descriptor for unix RM clients, but a void + // pointer for windows RM clients. + // + // capDescriptor is transparent to RM clients i.e. RM's user-mode shim + // populates this field on behalf of clients. + // + NV_DECLARE_ALIGNED(NvU64 capDescriptor, 8); + + NvU32 flags; +} NV000F_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl0020.h b/userspace/sdks/nv570/inc/class/cl0020.h new file mode 100644 index 0000000..87154a9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0020.h @@ -0,0 +1,31 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0020_h_ +#define _cl0020_h_ + +#include "nvtypes.h" + +#define NV0020_GPU_MANAGEMENT (0x00000020) + +#endif /* _cl0020_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0030.h b/userspace/sdks/nv570/inc/class/cl0030.h new file mode 100644 index 0000000..9a0000e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0030.h @@ -0,0 +1,51 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0030_h_ +#define _cl0030_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV01_NULL (0x00000030) +/* NvNotification[] fields and values */ +#define NV030_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) +/* pio method data structure */ +typedef volatile struct _cl0030_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv030Typedef, Nv01Null; +#define NV030_TYPEDEF Nv01Null +/* obsolete stuff */ +#define NV1_NULL (0x00000030) +#define Nv1Null Nv01Null +#define nv1Null Nv01Null +#define nv01Null Nv01Null + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0030_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl003e.h b/userspace/sdks/nv570/inc/class/cl003e.h new file mode 100644 index 0000000..d23e642 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl003e.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2001-2001, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl003e_h_ +#define _cl003e_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV01_CONTEXT_ERROR_TO_MEMORY (0x0000003E) +#define NV01_MEMORY_SYSTEM (0x0000003E) +/* NvNotification[] fields and values */ +#define NV03E_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) +/* pio method data structure */ +typedef volatile struct _cl003e_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv03eTypedef, Nv01ContextErrorToMemory; +#define NV03E_TYPEDEF Nv01ContextErrorToMemory +/* obsolete stuff */ +#define NV1_CONTEXT_ERROR_TO_MEMORY (0x0000003E) +#define Nv1ContextErrorToMemory Nv01ContextErrorToMemory +#define nv1ContextErrorToMemory Nv01ContextErrorToMemory +#define nv01ContextErrorToMemory Nv01ContextErrorToMemory + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl003e_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl003f.h b/userspace/sdks/nv570/inc/class/cl003f.h new file mode 100644 index 0000000..b124538 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl003f.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2001-2001, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl003f_h_ +#define _cl003f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV01_MEMORY_LOCAL_PRIVILEGED (0x0000003F) +/* NvNotification[] fields and values */ +#define NV03F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) +/* pio method data structure */ +#ifndef AMD64 +typedef volatile struct _cl003f_tag0 { +#else +typedef struct { +#endif + NvV32 Reserved00[0x7c0]; +} Nv01MemoryLocalPrivileged; +#define NV03F_TYPEDEF Nv01MemoryLocalPrivileged +typedef Nv01MemoryLocalPrivileged Nv03fTypedef; +/* obsolete stuff */ +#define NV01_MEMORY_PRIVILEGED (0x0000003F) +#define NV1_MEMORY_PRIVILEGED (0x0000003F) +#define Nv01MemoryPrivileged Nv01MemoryLocalPrivileged +#define nv01MemoryPrivileged Nv01MemoryLocalPrivileged +#define Nv1MemoryPrivileged Nv01MemoryLocalPrivileged +#define nv1MemoryPrivileged Nv01MemoryLocalPrivileged +#define nv01MemoryLocalPrivileged Nv01MemoryLocalPrivileged + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl003f_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0040.h b/userspace/sdks/nv570/inc/class/cl0040.h new file mode 100644 index 0000000..103ec3a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0040.h @@ -0,0 +1,55 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2001 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _cl0040_h_ +#define _cl0040_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV01_MEMORY_LOCAL_USER (0x00000040) +/* NvNotification[] fields and values */ +#define NV040_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) +/* pio method data structure */ +typedef volatile struct _cl0040_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv040Typedef, Nv01MemoryLocalUser; +#define NV040_TYPEDEF Nv01MemoryLocalUser +/* obsolete stuff */ +#define NV01_MEMORY_USER (0x00000040) +#define NV1_MEMORY_USER (0x00000040) +#define Nv01MemoryUser Nv01MemoryLocalUser +#define nv01MemoryUser Nv01MemoryLocalUser +#define Nv1MemoryUser Nv01MemoryLocalUser +#define nv1MemoryUser Nv01MemoryLocalUser +#define nv01MemoryLocalUser Nv01MemoryLocalUser + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0040_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0041.h b/userspace/sdks/nv570/inc/class/cl0041.h new file mode 100644 index 0000000..fa8707a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0041.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2001-2005, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0041_h_ +#define _cl0041_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV04_MEMORY (0x00000041) +/* NvNotification[] fields and values */ +#define NV041_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) +/* pio method data structure */ +typedef volatile struct _cl0041_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv041Typedef, Nv04Memory; +#define NV041_TYPEDEF Nv04Memory; + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0041_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0050.h b/userspace/sdks/nv570/inc/class/cl0050.h new file mode 100644 index 0000000..4181b98 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0050.h @@ -0,0 +1,81 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0050.finn +// + +#include "nvcfg_sdk.h" + +#define NV_CE_UTILS (0x50U) /* finn: Evaluated from "NV0050_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NV0050_ALLOCATION_PARAMETERS_MESSAGE_ID (0x0050U) + +typedef struct NV0050_ALLOCATION_PARAMETERS { + NvHandle hVaspace; + NV_DECLARE_ALIGNED(NvU64 flags, 8); + NvU32 forceCeId; +} NV0050_ALLOCATION_PARAMETERS; + + +// Whether the CeUtils will allocate everything with RM client or external client +#define NV0050_CEUTILS_FLAGS_EXTERNAL 0:0 +#define NV0050_CEUTILS_FLAGS_EXTERNAL_FALSE (0x00000000) +#define NV0050_CEUTILS_FLAGS_EXTERNAL_TRUE (0x00000001) + +// Whether CeUtils will use virtual copy +#define NV0050_CEUTILS_FLAGS_VIRTUAL_MODE 1:1 +#define NV0050_CEUTILS_FLAGS_VIRTUAL_MODE_FALSE (0x00000000) +#define NV0050_CEUTILS_FLAGS_VIRTUAL_MODE_TRUE (0x00000001) + +// Whether the CeUtils is using fifo lite mode. Has to be internal +#define NV0050_CEUTILS_FLAGS_FIFO_LITE 2:2 +#define NV0050_CEUTILS_FLAGS_FIFO_LITE_FALSE (0x00000000) +#define NV0050_CEUTILS_FLAGS_FIFO_LITE_TRUE (0x00000001) + +// Whether the CeUtils will use BAR1 or BAR2 for data copy +#define NV0050_CEUTILS_FLAGS_NO_BAR1_USE 3:3 +#define NV0050_CEUTILS_FLAGS_NO_BAR1_USE_FALSE (0x00000000) +#define NV0050_CEUTILS_FLAGS_NO_BAR1_USE_TRUE (0x00000001) + +// Force a specific CE engine to be used be setting forceCeId +#define NV0050_CEUTILS_FLAGS_FORCE_CE_ID 4:4 +#define NV0050_CEUTILS_FLAGS_FORCE_CE_ID_FALSE (0x00000000) +#define NV0050_CEUTILS_FLAGS_FORCE_CE_ID_TRUE (0x00000001) + +// Use a CC secure channel +#define NV0050_CEUTILS_FLAGS_CC_SECURE 5:5 +#define NV0050_CEUTILS_FLAGS_CC_SECURE_FALSE (0x00000000) +#define NV0050_CEUTILS_FLAGS_CC_SECURE_TRUE (0x00000001) + + + +// Enable callbacks at work completion +#define NV0050_CEUTILS_FLAGS_ENABLE_COMPLETION_CB 6:6 +#define NV0050_CEUTILS_FLAGS_ENABLE_COMPLETION_CB_FALSE (0x00000000) +#define NV0050_CEUTILS_FLAGS_ENABLE_COMPLETION_CB_TRUE (0x00000001) diff --git a/userspace/sdks/nv570/inc/class/cl0060.h b/userspace/sdks/nv570/inc/class/cl0060.h new file mode 100644 index 0000000..cfa88ff --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0060.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0060.finn +// + +#define NV0060_SYNC_GPU_BOOST (0x60U) /* finn: Evaluated from "NV0060_ALLOC_PARAMETERS_MESSAGE_ID" */ + +#define NV0060_ALLOC_PARAMETERS_MESSAGE_ID (0x0060U) + +typedef struct NV0060_ALLOC_PARAMETERS { + NvU32 gpuBoostGroupId; +} NV0060_ALLOC_PARAMETERS; diff --git a/userspace/sdks/nv570/inc/class/cl0070.h b/userspace/sdks/nv570/inc/class/cl0070.h new file mode 100644 index 0000000..95d173e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0070.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2001-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0070.finn +// + +#define NV01_MEMORY_VIRTUAL (0x70U) /* finn: Evaluated from "NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS_MESSAGE_ID" */ +#define NV01_MEMORY_SYSTEM_DYNAMIC (0x70U) /* finn: Evaluated from "NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS_MESSAGE_ID" */ + +/* + * NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS + * + * Allocation params for NV01_MEMORY_VIRTUAL. + * + * NV01_MEMORY_SYSTEM_DYNAMIC is an alias for NV01_MEMORY_VIRTUAL. This + * was traditionally allocated with RmAllocMemory64(). The default GPU + * virtual address space is used, and the limit of this address space is + * returned in limit. The NV01_MEMORY_SYSTEM_DYNAMIC handle can be + * passed to RmAllocContextDma2() with an offset/limit. The context dma + * handle can then be used as the hDma handle for RmMapMemoryDma. + * + * This behavior is maintained in the RM compatibility shim. + * + * NV01_MEMORY_VIRTUAL replaces this behavior with a single object. + * + * hVASpace - if hVASpace is NV01_NULL_OBJECT the default GPU VA space is + * selected. Alternatively a FERMI_VASPACE_A handle may be specified. + * + * The NV_MEMORY_VIRTUAL_SYSMEM_DYNAMIC_HVASPACE is used for by the + * compatibility layer to emulate NV01_MEMORY_SYSTEM_DYNAMIC semantics. + * + * offset - An offset into the virtual address space may be specified. This + * will limit range of the GPU VA returned by RmMapMemoryDma to be + * above offset. + * + * limit - When limit is zero the maximum limit used. If a non-zero limit + * is specified then it will be used. The final limit is returned. + */ +#define NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS_MESSAGE_ID (0x0070U) + +typedef struct NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS { + NV_DECLARE_ALIGNED(NvU64 offset, 8); // [IN] - offset into address space + NV_DECLARE_ALIGNED(NvU64 limit, 8); // [IN/OUT] - limit of address space + NvHandle hVASpace; // [IN] - Address space handle +} NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS; + +#define NV_MEMORY_VIRTUAL_SYSMEM_DYNAMIC_HVASPACE 0xffffffffU + diff --git a/userspace/sdks/nv570/inc/class/cl0071.h b/userspace/sdks/nv570/inc/class/cl0071.h new file mode 100644 index 0000000..be106d3 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0071.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2001-2001, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0071_h_ +#define _cl0071_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV01_MEMORY_SYSTEM_OS_DESCRIPTOR (0x00000071) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0071_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0073.h b/userspace/sdks/nv570/inc/class/cl0073.h new file mode 100644 index 0000000..d6a7ec2 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0073.h @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2001-2021, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0073_h_ +#define _cl0073_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV04_DISPLAY_COMMON (0x00000073) + +/* event values */ +#define NV0073_NOTIFIERS_SW (0) +#define NV0073_NOTIFIERS_LTM_CALC_TIMEOUT (5) +#define NV0073_NOTIFIERS_MAXCOUNT (6) + + +#define NV0073_NOTIFICATION_STATUS_IN_PROGRESS (0x8000) +#define NV0073_NOTIFICATION_STATUS_BAD_ARGUMENT (0x4000) +#define NV0073_NOTIFICATION_STATUS_ERROR_INVALID_STATE (0x2000) +#define NV0073_NOTIFICATION_STATUS_ERROR_STATE_IN_USE (0x1000) +#define NV0073_NOTIFICATION_STATUS_DONE_SUCCESS (0x0000) + +/* pio method data structure */ +typedef volatile struct _cl0073_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv073Typedef, Nv04DisplayCommon; +#define NV073_TYPEDEF Nv04DisplayCommon + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0073_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0076.h b/userspace/sdks/nv570/inc/class/cl0076.h new file mode 100644 index 0000000..50bd0a9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0076.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0076_h_ +#define _cl0076_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV01_MEMORY_FRAMEBUFFER_CONSOLE (0x00000076) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0076_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl007d.h b/userspace/sdks/nv570/inc/class/cl007d.h new file mode 100644 index 0000000..f9d25d9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl007d.h @@ -0,0 +1,64 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2016-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl007d_h_ +#define _cl007d_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV04_SOFTWARE_TEST (0x0000007D) +#define NV07D 0x00001fff:0x00000000 +/* NvNotification[] elements */ +#define NV07D_NOTIFIERS_NOTIFY (0) +#define NV07D_NOTIFIERS_MAXCOUNT (1) +/* NvNotification[] fields and values */ +#define NV07D_NOTIFICATION_STATUS_IN_PROGRESS (0x8000) +#define NV07D_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) +#define NV07D_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NV07D_NOTIFICATION_STATUS_ERROR_INVALID_STATE (0x1000) +#define NV07D_NOTIFICATION_STATUS_ERROR_STATE_IN_USE (0x0800) +#define NV07D_NOTIFICATION_STATUS_DONE_SUCCESS (0x0000) + +/* pio method data structures */ +typedef volatile struct _cl007d_tag0 { + NvV32 NoOperation; /* ignored 0100-0103*/ + NvV32 Notify; /* NV07D_NOTIFY_* 0104-0107*/ + NvV32 Reserved0104[0x78/4]; + NvV32 SetContextDmaNotifies; /* NV01_CONTEXT_DMA 0180-0183*/ + NvV32 Reserved0184[0x1f7c/4]; +} Nv07dTypedef, Nv04SoftwareTest; + +#define NV07D_TYPEDEF Nv04SoftwareTest +/* dma method offsets, fields, and values */ +#define NV07D_SET_OBJECT (0x00000000) +#define NV07D_NO_OPERATION (0x00000100) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl007d_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0080.h b/userspace/sdks/nv570/inc/class/cl0080.h new file mode 100644 index 0000000..9e9aad2 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0080.h @@ -0,0 +1,64 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0080.finn +// + +#include "nvlimits.h" +#include "cl0080_notification.h" + +#define NV01_DEVICE_0 (0x80U) /* finn: Evaluated from "NV0080_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* NvAlloc parameteters */ +#define NV0080_MAX_DEVICES NV_MAX_DEVICES + +/** + * @brief Alloc param + * + * @param vaMode mode for virtual address space allocation + * Three modes: + * NV_DEVICE_ALLOCATION_VAMODE_OPTIONAL_MULTIPLE_VASPACES + * NV_DEVICE_ALLOCATION_VAMODE_SINGLE_VASPACE + * NV_DEVICE_ALLOCATION_VAMODE_MULTIPLE_VASPACES + * Detailed description of these modes is in nvos.h + **/ + +#define NV0080_ALLOC_PARAMETERS_MESSAGE_ID (0x0080U) + +typedef struct NV0080_ALLOC_PARAMETERS { + NvU32 deviceId; + NvHandle hClientShare; + NvHandle hTargetClient; + NvHandle hTargetDevice; + NvV32 flags; + NV_DECLARE_ALIGNED(NvU64 vaSpaceSize, 8); + NV_DECLARE_ALIGNED(NvU64 vaStartInternal, 8); + NV_DECLARE_ALIGNED(NvU64 vaLimitInternal, 8); + NvV32 vaMode; +} NV0080_ALLOC_PARAMETERS; diff --git a/userspace/sdks/nv570/inc/class/cl0080_notification.h b/userspace/sdks/nv570/inc/class/cl0080_notification.h new file mode 100644 index 0000000..a976d3f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0080_notification.h @@ -0,0 +1,45 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl0080_notification_h_ +#define _cl0080_notification_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* NvNotification[] fields and values */ +#define NV080_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +/* pio method data structure */ +typedef volatile struct _cl0080_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv080Typedef, Nv01Device0; + +#define NV080_TYPEDEF Nv01Device0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl0080_notification_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl008f.h b/userspace/sdks/nv570/inc/class/cl008f.h new file mode 100644 index 0000000..63f59e8 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl008f.h @@ -0,0 +1,32 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl008f.finn +// + +#define KERNEL_WATCHDOG 0x008FU + diff --git a/userspace/sdks/nv570/inc/class/cl0090.h b/userspace/sdks/nv570/inc/class/cl0090.h new file mode 100644 index 0000000..1ed7835 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0090.h @@ -0,0 +1,32 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _cl0090_h_ +#define _cl0090_h_ + +#include "nvtypes.h" + +#define KERNEL_GRAPHICS_CONTEXT (0x00000090) + +#endif /* _cl0090_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl0092.h b/userspace/sdks/nv570/inc/class/cl0092.h new file mode 100644 index 0000000..3008277 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0092.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0092.finn +// + +#include "class/cl0092_callback.h" + +/* + * This RgLineCallback class allows RM clients to register/unregister the RG line callback functions. + * + * Must be allocated with kernel access rights. + * + * Allocation params: + * + * subDeviceInstance + * This parameter specifies the subdevice instance within the NV04_DISPLAY_COMMON parent device to which the + * operation should be directed. + * head + * This parameter specifies the head for which the callback is to be egistered/unregistered. This value must be + * less than the maximum number of heads supported by the GPU subdevice. + * rgLineNum + * This indicates the RG scanout line number on which the callback will be executed. + * 1/ Client should set the proper RG line number based on mode in which the display head is running and + * subsequent possible modeset that may affect the line number. + * 2/ Client is expected to clear/set the interrupts around modesets or power-transitions (like s3/hibernation). + * 3/ Client should make sure that this param does not exceed the raster settings. + * pCallbkFn + * Pointer to callback function. Cannot be NULL. + * pCallbkParams + * Pointer to the ctrl call param struct. + */ + +#define NV0092_RG_LINE_CALLBACK (0x92U) /* finn: Evaluated from "NV0092_RG_LINE_CALLBACK_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NV0092_RG_LINE_CALLBACK_ALLOCATION_PARAMETERS_MESSAGE_ID (0x0092U) + +typedef struct NV0092_RG_LINE_CALLBACK_ALLOCATION_PARAMETERS { + NvU32 subDeviceInstance; + NvU32 head; + NvU32 rgLineNum; + + NV_DECLARE_ALIGNED(NvP64 pCallbkFn, 8); /* A function pointer of NV0092_REGISTER_RG_LINE_CALLBACK_FN */ + + NV_DECLARE_ALIGNED(NvP64 pCallbkParams, 8); /* The param1 in NV0092_REGISTER_RG_LINE_CALLBACK_FN */ +} NV0092_RG_LINE_CALLBACK_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl0092_callback.h b/userspace/sdks/nv570/inc/class/cl0092_callback.h new file mode 100644 index 0000000..4cd86ad --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0092_callback.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef SDK_CL0092_CALLBACK_H +#define SDK_CL0092_CALLBACK_H + +typedef void (*NV0092_REGISTER_RG_LINE_CALLBACK_FN)(NvU32 rgIntrLine, NvP64 param1, NvBool bIsIrqlIsr); + +#endif // SDK_CL0092_CALLBACK_H diff --git a/userspace/sdks/nv570/inc/class/cl00b1.h b/userspace/sdks/nv570/inc/class/cl00b1.h new file mode 100644 index 0000000..bc6e69f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00b1.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _CL00B1_H_ +#define _CL00B1_H_ + +#define NV01_MEMORY_HW_RESOURCES 0x00b1 + +#endif // _CL00B1_H_ diff --git a/userspace/sdks/nv570/inc/class/cl00c1.h b/userspace/sdks/nv570/inc/class/cl00c1.h new file mode 100644 index 0000000..d95e4fd --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00c1.h @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00c1.finn +// + +#include "nvlimits.h" +#define NV_FB_SEGMENT (0xc1U) /* finn: Evaluated from "NV_FB_SEGMENT_ALLOCATION_PARAMS_MESSAGE_ID" */ + +/* + * NV_FB_SEGMENT_ALLOCATION_PARAMS - Allocation params to create FB segment through + * NvRmAlloc. + */ +#define NV_FB_SEGMENT_ALLOCATION_PARAMS_MESSAGE_ID (0x00C1U) + +typedef struct NV_FB_SEGMENT_ALLOCATION_PARAMS { + NvHandle hCtxDma; // unused + NvU32 subDeviceIDMask; + NV_DECLARE_ALIGNED(NvU64 dmaOffset, 8); // unused + NV_DECLARE_ALIGNED(NvU64 VidOffset, 8); + NV_DECLARE_ALIGNED(NvU64 Offset, 8); // To be deprecated + NV_DECLARE_ALIGNED(NvU64 pOffset[NV_MAX_SUBDEVICES], 8); + NV_DECLARE_ALIGNED(NvU64 Length, 8); + NV_DECLARE_ALIGNED(NvU64 ValidLength, 8); + NV_DECLARE_ALIGNED(NvP64 pPageArray, 8); + NvU32 startPageIndex; + NvHandle AllocHintHandle; + NvU32 Flags; + NvHandle hMemory; // Not used in NvRmAlloc path; only used in CTRL path + NvHandle hClient; // Not used in NvRmAlloc path; only used in CTRL path + NvHandle hDevice; // Not used in NvRmAlloc path; only used in CTRL path + NV_DECLARE_ALIGNED(NvP64 pCpuAddress, 8); // To be deprecated + NV_DECLARE_ALIGNED(NvP64 ppCpuAddress[NV_MAX_SUBDEVICES], 8); + NV_DECLARE_ALIGNED(NvU64 GpuAddress, 8); // To be deprecated + NV_DECLARE_ALIGNED(NvU64 pGpuAddress[NV_MAX_SUBDEVICES], 8); + NvHandle hAllocHintClient; + NvU32 kind; + NvU32 compTag; +} NV_FB_SEGMENT_ALLOCATION_PARAMS; + diff --git a/userspace/sdks/nv570/inc/class/cl00c2.h b/userspace/sdks/nv570/inc/class/cl00c2.h new file mode 100644 index 0000000..db3ea00 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00c2.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00c2.finn +// + +#define NV01_MEMORY_LOCAL_PHYSICAL (0xc2U) /* finn: Evaluated from "NV_PHYSICAL_MEMORY_ALLOCATION_PARAMS_MESSAGE_ID" */ + +#define NV_PHYSICAL_MEMORY_ALLOCATION_PARAMS_MESSAGE_ID (0x00c2U) + +typedef struct NV_PHYSICAL_MEMORY_ALLOCATION_PARAMS { + NV_DECLARE_ALIGNED(NvU64 memSize, 8); // [OUT] + NvU32 format; // [IN] - PTE format to use + NV_DECLARE_ALIGNED(NvU64 pageSize, 8); // [IN] - Page size to use +} NV_PHYSICAL_MEMORY_ALLOCATION_PARAMS; + diff --git a/userspace/sdks/nv570/inc/class/cl00c3.h b/userspace/sdks/nv570/inc/class/cl00c3.h new file mode 100644 index 0000000..eb9e1cb --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00c3.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00c3.finn +// + +#define NV01_MEMORY_SYNCPOINT (0xc3U) /* finn: Evaluated from "NV_MEMORY_SYNCPOINT_ALLOCATION_PARAMS_MESSAGE_ID" */ + +/* + * NV_MEMORY_SYNCPOINT_ALLOCATION_PARAMS - Allocation params to create syncpoint + * through NvRmAlloc. + */ +#define NV_MEMORY_SYNCPOINT_ALLOCATION_PARAMS_MESSAGE_ID (0x00c3U) + +typedef struct NV_MEMORY_SYNCPOINT_ALLOCATION_PARAMS { + NvU32 syncpointId; +} NV_MEMORY_SYNCPOINT_ALLOCATION_PARAMS; + diff --git a/userspace/sdks/nv570/inc/class/cl00da.h b/userspace/sdks/nv570/inc/class/cl00da.h new file mode 100644 index 0000000..871f913 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00da.h @@ -0,0 +1,85 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00da.finn +// + + + +/* +* NV_SEMAPHORE_SURFACE +* A semaphore surface object contains a GPU-and-CPU-accessible memory region +* containing semaphores, associated monitored fence values, and any other +* related data necessary to implement a circular 32-bit or monotonic 64-bit +* incrementing semaphore primitive and associated event delivery. +*/ +#define NV_SEMAPHORE_SURFACE (0xdaU) /* finn: Evaluated from "NV_SEMAPHORE_SURFACE_ALLOC_PARAMETERS_MESSAGE_ID" */ + + /* + * NV_SEMAPHORE_SURFACE_WAIT_VALUE + * The notification index used when registering events with the RM event + * subsystem. RM clients should not need to use this value, as they don't + * allocate events against this class themselves. Rather, they specify an + * OS event when registering a CPU waiter, and semaphore surface takes care + * of creating event objects internally as necessary, similar to the event + * buffer record notification OS event mechanism. + */ +#define NV_SEMAPHORE_SURFACE_WAIT_VALUE (0x00000000) + +/* +* NV_SEMAPHORE_SURFACE_ALLOC_PARAMETERS +* +* hSemaphoreMem [IN] +* The handle to the memory used for the semaphore value and, when +* supported, the monitored fence/conditional interrupt value. Must be +* accessible by the GPU corresponding to the parent of the semaphore +* surface, as well as the CPU. +* +* hMaxSubmittedMem [IN] +* The handle to the memory used to track the maximum signal value +* submitted to the GPU for processing for a given semaphore slot in +* hSemaphoreMem. This memory is only accessed by the CPU, but must +* support a CPU mapping that allows the use of 64-bit atomic exchange +* operations. This may be the same memory object as hSemaphoreMem if it is +* possible to create one memory object that supports all the requirements +* for a given GPU and CPU. This handle may be omitted/set to zero on GPUs +* that do not require maximum submitted value tracking. +* +* flags [IN] +* Flags affecting the semaphore surface allocation. Currently, there are +* not valid flags, so this value must be set to zero. +*/ +#define NV_SEMAPHORE_SURFACE_ALLOC_PARAMETERS_MESSAGE_ID (0x00DAU) + +typedef struct NV_SEMAPHORE_SURFACE_ALLOC_PARAMETERS { + NvHandle hSemaphoreMem; + NvHandle hMaxSubmittedMem; + NV_DECLARE_ALIGNED(NvU64 flags, 8); +} NV_SEMAPHORE_SURFACE_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl00db.h b/userspace/sdks/nv570/inc/class/cl00db.h new file mode 100644 index 0000000..adb5c4f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00db.h @@ -0,0 +1,43 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2008-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00db.finn +// + +#define NV40_DEBUG_BUFFER (0xdbU) /* finn: Evaluated from "NV00DB_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +/* NvRmAlloc() parameters */ +#define NV00DB_ALLOCATION_PARAMETERS_MESSAGE_ID (0x00dbU) + +typedef struct NV00DB_ALLOCATION_PARAMETERS { + NvU32 size; /* Desired message size / actual size returned */ + NvU32 tag; /* Protobuf tag for message location in dump message */ +} NV00DB_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl00de.h b/userspace/sdks/nv570/inc/class/cl00de.h new file mode 100644 index 0000000..c465c9f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00de.h @@ -0,0 +1,511 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl00de_h_ +#define _cl00de_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvmisc.h" +#include "nvfixedtypes.h" +#include "ctrl/ctrl2080/ctrl2080ecc.h" + +#define RM_USER_SHARED_DATA (0x000000de) + +#define RUSD_TIMESTAMP_WRITE_IN_PROGRESS (NV_U64_MAX) +#define RUSD_TIMESTAMP_INVALID 0 + +#define RUSD_SEQ_START (0xFF00000000000000LLU) + +#define RUSD_SEQ_DATA_VALID(x) \ + ((((x) < RUSD_SEQ_START) && ((x) != RUSD_TIMESTAMP_INVALID)) || \ + (((x) >= RUSD_SEQ_START) && (((x) & 0x1LLU) == 0x0LLU))) + +// +// Helper macros to check seq before reading RUSD. +// No dowhile wrap as it is using continue/break +// +#define RUSD_SEQ_CHECK1(dataField) \ + NvU64 RUSD_SEQ = (dataField)->lastModifiedTimestamp; \ + portAtomicMemoryFenceLoad(); \ + if (!RUSD_SEQ_DATA_VALID(RUSD_SEQ)) \ + continue; + +// Clear lastModifiedTimestamp on failure in case of reaching loop limit +#define RUSD_SEQ_CHECK2(dataField) \ + portAtomicMemoryFenceLoad(); \ + if (RUSD_SEQ == (dataField)->lastModifiedTimestamp) \ + break; \ + +// +// Read RUSD data field `dataField` from NV00DE_SHARED_DATA struct `pSharedData` into destination pointer `pDst` +// `pDst` should be the data struct type matching `dataField` +// Check (pDst)->lastModifiedTimestamp using RUSD_IS_DATA_STALE to verify data validity. +// +#define RUSD_READ_DATA(pSharedData,dataField,pDst) \ +do { \ + portMemSet((pDst), 0, sizeof(*pDst)); \ + for (NvU32 RUSD_READ_DATA_ATTEMPTS = 0; RUSD_READ_DATA_ATTEMPTS < 10; ++RUSD_READ_DATA_ATTEMPTS) \ + { \ + RUSD_SEQ_CHECK1(&((pSharedData)->dataField)); \ + portMemCopy((pDst), sizeof(*pDst), &((pSharedData)->dataField), sizeof(*pDst)); \ + RUSD_SEQ_CHECK2(&((pSharedData)->dataField)); \ + (pDst)->lastModifiedTimestamp = RUSD_TIMESTAMP_INVALID; \ + } \ +} while(0); + +// +// Check if RUSD data timestamp is stale. +// For polled data, returns true if data is older than `staleThreshold` +// For non-polled data, returns true if data was successfully read +// +#define RUSD_IS_DATA_STALE(timestamp,currentTime,staleThreshold) \ + ((((timestamp) < (RUSD_SEQ_START)) && /* Polled Data */ \ + (((timestamp) == (RUSD_TIMESTAMP_INVALID)) || /* Invalid */ \ + (((currentTime) - (timestamp)) > (staleThreshold)))) || \ + (((timestamp) >= (RUSD_SEQ_START)) && /* Non-Polled Data */ \ + (((timestamp) & (0x1LLU)) == 1LLU))) + +enum { + RUSD_CLK_THROTTLE_REASON_GPU_IDLE = NVBIT(0), + RUSD_CLK_THROTTLE_REASON_APPLICATION_CLOCK_SETTING = NVBIT(1), + RUSD_CLK_THROTTLE_REASON_SW_POWER_CAP = NVBIT(2), + RUSD_CLK_THROTTLE_REASON_HW_SLOWDOWN = NVBIT(3), + RUSD_CLK_THROTTLE_REASON_SYNC_BOOST = NVBIT(4), + RUSD_CLK_THROTTLE_REASON_SW_THERMAL_SLOWDOWN = NVBIT(5), + RUSD_CLK_THROTTLE_REASON_HW_THERMAL_SLOWDOWN = NVBIT(6), + RUSD_CLK_THROTTLE_REASON_HW_POWER_BRAKES_SLOWDOWN = NVBIT(7), + RUSD_CLK_THROTTLE_REASON_DISPLAY_CLOCK_SETTING = NVBIT(8), +}; + +typedef struct RUSD_BAR1_MEMORY_INFO { + volatile NvU64 lastModifiedTimestamp; + // + // Non-polled data, not tied to any specific RM API + // Total size and available memory in Bar1 + // + NvU32 bar1Size; + NvU32 bar1AvailSize; +} RUSD_BAR1_MEMORY_INFO; + +typedef struct RUSD_PMA_MEMORY_INFO { + volatile NvU64 lastModifiedTimestamp; + // + // Non-polled data, not tied to any specific RM API + // Total size and available memory in PMA + // + NvU64 totalPmaMemory; + NvU64 freePmaMemory; +} RUSD_PMA_MEMORY_INFO; + +enum { + RUSD_CLK_PUBLIC_DOMAIN_GRAPHICS = 0, + RUSD_CLK_PUBLIC_DOMAIN_MEMORY, + RUSD_CLK_PUBLIC_DOMAIN_VIDEO, + + // Put at the end. See bug 1000230 NVML doesn't report SM frequency on Kepler + RUSD_CLK_PUBLIC_DOMAIN_SM, + RUSD_CLK_PUBLIC_DOMAIN_MAX_TYPE, +}; + +typedef struct RUSD_CLK_PUBLIC_DOMAIN_INFO { + NvU32 targetClkMHz; + NvU32 actualClkKHz; +} RUSD_CLK_PUBLIC_DOMAIN_INFO; + +typedef struct RUSD_CLK_PUBLIC_DOMAIN_INFOS { + volatile NvU64 lastModifiedTimestamp; + RUSD_CLK_PUBLIC_DOMAIN_INFO info[RUSD_CLK_PUBLIC_DOMAIN_MAX_TYPE]; +} RUSD_CLK_PUBLIC_DOMAIN_INFOS; + +typedef struct RUSD_ENG_UTILIZATION { + NvU32 clkPercentBusy; + NvU32 samplingPeriodUs; +} RUSD_ENG_UTILIZATION; + +#define RUSD_ENG_UTILIZATION_VID_ENG_NVENC 0 +#define RUSD_ENG_UTILIZATION_VID_ENG_NVDEC 1 +#define RUSD_ENG_UTILIZATION_VID_ENG_NVJPG 2 +#define RUSD_ENG_UTILIZATION_VID_ENG_NVOFA 3 +#define RUSD_ENG_UTILIZATION_COUNT 4 + +typedef struct RUSD_PERF_DEVICE_UTILIZATION_INFO { + NvU32 gpuPercentBusy; + NvU32 memoryPercentBusy; + RUSD_ENG_UTILIZATION engUtil[RUSD_ENG_UTILIZATION_COUNT]; +} RUSD_PERF_DEVICE_UTILIZATION_INFO; + +typedef struct RUSD_PERF_DEVICE_UTILIZATION { + volatile NvU64 lastModifiedTimestamp; + RUSD_PERF_DEVICE_UTILIZATION_INFO info; +} RUSD_PERF_DEVICE_UTILIZATION; + +typedef struct RUSD_PERF_CURRENT_PSTATE { + volatile NvU64 lastModifiedTimestamp; + // Provided from NV2080_CTRL_CMD_PERF_GET_CURRENT_PSTATE + NvU32 currentPstate; +} RUSD_PERF_CURRENT_PSTATE; + +#define RUSD_CLK_VIOLATION_NUM 32 + +#define RUSD_PERF_POINT_MAX_CLOCK 0 +#define RUSD_PERF_POINT_TURBO_BOOST 1 +#define RUSD_PERF_POINT_3D_BOOST 2 +#define RUSD_PERF_POINT_RATED_TDP 3 +#define RUSD_PERF_POINT_MAX_CUSTOMER_BOOST 4 +#define RUSD_PERF_POINT_DISPLAY_CLOCK_INTERSECT 5 +#define RUSD_PERF_POINT_NUM 6 + +typedef struct RUSD_CLK_VIOLATION_STATUS { + NvU32 perfPointMask; + NvU64 timeNs[RUSD_PERF_POINT_NUM]; +} RUSD_CLK_VIOLATION_STATUS; + +typedef struct RUSD_CLK_THROTTLE_INFO { + volatile NvU64 lastModifiedTimestamp; + NvU32 reasonMask; // Bitmask of RUSD_CLK_THROTTLE_REASON_* + + NvU64 referenceTimeNs; + NvU32 supportedViolationTimeMask; + RUSD_CLK_VIOLATION_STATUS violation[RUSD_CLK_VIOLATION_NUM]; + RUSD_CLK_VIOLATION_STATUS globalViolation; +} RUSD_CLK_THROTTLE_INFO; + +typedef struct RUSD_CLK_THROTTLE_INFO RUSD_CLK_THROTTLE_REASON; + +typedef struct RUSD_MEM_ERROR_COUNTS { + NvU64 correctedVolatile; + NvU64 correctedAggregate; + NvU64 uncorrectedVolatile; + NvU64 uncorrectedAggregate; +} RUSD_MEM_ERROR_COUNTS; + +#define RUSD_MEMORY_ERROR_TYPE_TOTAL 0 +#define RUSD_MEMORY_ERROR_TYPE_DRAM 1 +#define RUSD_MEMORY_ERROR_TYPE_SRAM 2 +#define RUSD_MEMORY_ERROR_TYPE_COUNT 3 + +typedef struct RUSD_ECC_COUNTS { + NV2080_CTRL_ECC_GET_VOLATILE_COUNTS_PARAMS volatileCounts; + NV2080_CTRL_ECC_GET_CLIENT_EXPOSED_COUNTERS_PARAMS clientExposedCounts; +} RUSD_ECC_INFO; + +typedef struct RUSD_MEM_ECC { + volatile NvU64 lastModifiedTimestamp; + RUSD_MEM_ERROR_COUNTS count[RUSD_MEMORY_ERROR_TYPE_COUNT]; + // TODO: Due to incapability of getting voteup for X driver update with + // existing RM APIs, need to resolve bug 5138911 before fully updating + // RUSD_MEM_ECC and removing deprecated RUSD_MEM_ERROR_COUNTS. + RUSD_ECC_INFO info; +} RUSD_MEM_ECC; + +typedef struct RUSD_POWER_LIMIT_INFO { + NvU32 requestedmW; + NvU32 enforcedmW; +} RUSD_POWER_LIMIT_INFO; + +typedef struct RUSD_POWER_LIMITS { + volatile NvU64 lastModifiedTimestamp; + RUSD_POWER_LIMIT_INFO info; +} RUSD_POWER_LIMITS; + +typedef enum RUSD_TEMPERATURE_SENSOR { + RUSD_TEMPERATURE_SENSOR_GPU, + RUSD_TEMPERATURE_SENSOR_MEMORY, + RUSD_TEMPERATURE_SENSOR_BOARD, + RUSD_TEMPERATURE_SENSOR_POWER_SUPPLY, + + // Should always be last entry + RUSD_TEMPERATURE_SENSOR_MAX +} RUSD_TEMPERATURE_SENSOR; + +typedef enum RUSD_TEMPERATURE_TYPE { + RUSD_TEMPERATURE_TYPE_GPU, + RUSD_TEMPERATURE_TYPE_MEMORY, + RUSD_TEMPERATURE_TYPE_BOARD, + RUSD_TEMPERATURE_TYPE_POWER_SUPPLY, + RUSD_TEMPERATURE_TYPE_HBM, + RUSD_TEMPERATURE_TYPE_MAX +} RUSD_TEMPERATURE_TYPE; + +typedef struct RUSD_TEMPERATURE { + volatile NvU64 lastModifiedTimestamp; + NvTemp temperature; +} RUSD_TEMPERATURE; + +typedef struct RUSD_MEM_ROW_REMAP_INFO { + // Provided from NV2080_CTRL_CMD_FB_GET_ROW_REMAPPER_HISTOGRAM + NvU32 histogramMax; // No remapped row is used. + NvU32 histogramHigh; // One remapped row is used. + NvU32 histogramPartial; // More than one remapped rows are used. + NvU32 histogramLow; // One remapped row is available. + NvU32 histogramNone; // All remapped rows are used. + + NvU32 correctableRows; + NvU32 uncorrectableRows; + NvU32 correctableRowsInactive; + NvU32 uncorrectableRowsInactive; + NvBool isPending; + NvBool hasFailureOccurred; +} RUSD_MEM_ROW_REMAP_INFO; + +typedef struct RUSD_MEM_ROW_REMAP { + volatile NvU64 lastModifiedTimestamp; + RUSD_MEM_ROW_REMAP_INFO info; +} RUSD_MEM_ROW_REMAP; + +typedef struct RUSD_AVG_POWER_INFO { + NvU32 averageGpuPower; // mW + NvU32 averageModulePower; // mW + NvU32 averageMemoryPower; // mW +} RUSD_AVG_POWER_INFO; + +typedef struct RUSD_AVG_POWER_USAGE { + volatile NvU64 lastModifiedTimestamp; + RUSD_AVG_POWER_INFO info; +} RUSD_AVG_POWER_USAGE; + +typedef struct RUSD_INST_POWER_INFO { + NvU32 instGpuPower; // mW + NvU32 instModulePower; // mW + NvU32 instCpuPower; // mW +} RUSD_INST_POWER_INFO; + +typedef struct RUSD_INST_POWER_USAGE { + volatile NvU64 lastModifiedTimestamp; + RUSD_INST_POWER_INFO info; +} RUSD_INST_POWER_USAGE; + +typedef struct RUSD_POWER_POLICY_STATUS_INFO { + NvU32 tgpmW; // Total GPU power in mW +} RUSD_POWER_POLICY_STATUS_INFO; + +typedef struct RUSD_POWER_POLICY_STATUS { + volatile NvU64 lastModifiedTimestamp; + RUSD_POWER_POLICY_STATUS_INFO info; +} RUSD_POWER_POLICY_STATUS; + +#define RUSD_FAN_COOLER_MAX_COOLERS 16U + +typedef struct RUSD_FAN_COOLER_INFO { + NvU32 rpmCurr[RUSD_FAN_COOLER_MAX_COOLERS]; +} RUSD_FAN_COOLER_INFO; + +typedef struct RUSD_FAN_COOLER_STATUS { + volatile NvU64 lastModifiedTimestamp; + RUSD_FAN_COOLER_INFO info; +} RUSD_FAN_COOLER_STATUS; + +typedef struct RUSD_SHADOW_ERR_CONT { + volatile NvU64 lastModifiedTimestamp; + // + // Non-polled data, not tied to any specific RM API + // Shadowed ERR_CONT register value + // + NvU32 shadowErrContVal; +} RUSD_SHADOW_ERR_CONT; + +// Each RUSD_BUS_DATA_* define corresponds to the equivalent NV2080_CTRL_BUS_INFO_INDEX_* +#define RUSD_BUS_DATA_PCIE_GEN_INFO 0 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_LINECODE_ERRORS 1 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_CRC_ERRORS 2 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_NAKS_RECEIVED 3 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_FAILED_L0S_EXITS 4 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_CORRECTABLE_ERRORS 5 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_NONFATAL_ERRORS 6 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_FATAL_ERRORS 7 +#define RUSD_BUS_DATA_PCIE_GPU_LINK_UNSUPPORTED_REQUESTS 8 +#define RUSD_BUS_DATA_COUNT 9 + +typedef struct RUSD_PCIE_DATA_INFO { + // Provided from NV2080_CTRL_CMD_BUS_GET_INFO_V2 + NvU32 data[RUSD_BUS_DATA_COUNT]; +} RUSD_PCIE_DATA_INFO; + +typedef struct RUSD_PCIE_DATA { + volatile NvU64 lastModifiedTimestamp; + RUSD_PCIE_DATA_INFO info; +} RUSD_PCIE_DATA; + +typedef struct RUSD_GR_INFO +{ + volatile NvU64 lastModifiedTimestamp; + NvBool bCtxswLoggingEnabled; +} RUSD_GR_INFO; + +#define RUSD_PROC_UTIL_SAMPLE_COUNT 5 + +// +// RUSD_CTRL_PERF_GPUMON_ENGINE_UTIL_SAMPLE is NV2080_CTRL_PERF_GPUMON_ENGINE_UTIL_SAMPLE +// without subProcessName and pOsPidInfo +// +typedef struct { + /*! + * Percentage during the sample that the engine remains busy. This + * is in units of pct*100. + */ + NvU32 util; + /*! + * Scaling factor to convert utilization from full GPU to per vGPU. + */ + NvU32 vgpuScale; + /*! + * Process ID of the process that was active on the engine when the + * sample was taken. If no process is active then NV2080_GPUMON_PID_INVALID + * will be returned. + */ + NvU32 procId; + /*! + * Process ID of the process in the vGPU VM that was active on the engine when + * the sample was taken. If no process is active then NV2080_GPUMON_PID_INVALID + * will be returned. + */ + NvU32 subProcessID; +} RUSD_CTRL_PERF_GPUMON_ENGINE_UTIL_SAMPLE; + +typedef struct { + NvU64 timeStamp; // Original is NV2080_CTRL_GPUMON_SAMPLE + /*! + * FB bandwidth utilization sample. + */ + RUSD_CTRL_PERF_GPUMON_ENGINE_UTIL_SAMPLE fb; + /*! + * GR utilization sample. + */ + RUSD_CTRL_PERF_GPUMON_ENGINE_UTIL_SAMPLE gr; + /*! + * NV ENCODER utilization sample. + */ + RUSD_CTRL_PERF_GPUMON_ENGINE_UTIL_SAMPLE nvenc; + /*! + * NV DECODER utilization sample. + */ + RUSD_CTRL_PERF_GPUMON_ENGINE_UTIL_SAMPLE nvdec; + /*! + * NV JPEG utilization sample. + */ + RUSD_CTRL_PERF_GPUMON_ENGINE_UTIL_SAMPLE nvjpg; + /*! + * NV OFA utilization sample. + */ + RUSD_CTRL_PERF_GPUMON_ENGINE_UTIL_SAMPLE nvofa; +} RUSD_CTRL_PERF_GPUMON_PERFMON_UTIL_SAMPLE; + +typedef struct { + RUSD_CTRL_PERF_GPUMON_PERFMON_UTIL_SAMPLE samples[RUSD_PROC_UTIL_SAMPLE_COUNT]; +} RUSD_PROC_UTIL_INFO; + +typedef struct { + volatile NvU64 lastModifiedTimestamp; + RUSD_PROC_UTIL_INFO info; +} RUSD_PROC_UTIL; + +typedef struct NV00DE_SHARED_DATA { + NV_DECLARE_ALIGNED(RUSD_BAR1_MEMORY_INFO bar1MemoryInfo, 8); + + NV_DECLARE_ALIGNED(RUSD_PMA_MEMORY_INFO pmaMemoryInfo, 8); + + NV_DECLARE_ALIGNED(RUSD_SHADOW_ERR_CONT shadowErrCont, 8); + + NV_DECLARE_ALIGNED(RUSD_GR_INFO grInfo, 8); + + // gpuUpdateUserSharedData is sensitive to these two sections being contiguous + + // + // Polled data section + // All data structs are a volatile NvU64 timestamp followed by data contents. + // Access by reading timestamp, then copying the struct contents, then reading the timestamp again. + // If time0 matches time1, data has not changed during the read, and contents are valid. + // If timestamp is RUSD_TIMESTAMP_WRITE_IN_PROGRESS, data was edited during the read, retry. + // If timestamp is RUSD_TIMESTAMP_INVALID, data is not available or not supported on this platform. + // + + // POLL_CLOCK + NV_DECLARE_ALIGNED(RUSD_CLK_PUBLIC_DOMAIN_INFOS clkPublicDomainInfos, 8); + + // POLL_PERF + NV_DECLARE_ALIGNED(RUSD_CLK_THROTTLE_INFO clkThrottleInfo, 8); + + // POLL_PERF + NV_DECLARE_ALIGNED(RUSD_PERF_DEVICE_UTILIZATION perfDevUtil, 8); + + // POLL_MEMORY + NV_DECLARE_ALIGNED(RUSD_MEM_ECC memEcc, 8); + + // POLL_PERF + NV_DECLARE_ALIGNED(RUSD_PERF_CURRENT_PSTATE perfCurrentPstate, 8); + + // POLL_POWER + // Module Limit is not supported on Ampere/Hopper + NV_DECLARE_ALIGNED(RUSD_POWER_LIMITS powerLimitGpu, 8); + + // POLL_THERMAL + NV_DECLARE_ALIGNED(RUSD_TEMPERATURE temperatures[RUSD_TEMPERATURE_TYPE_MAX], 8); + + // POLL_MEMORY + NV_DECLARE_ALIGNED(RUSD_MEM_ROW_REMAP memRowRemap, 8); + + // POLL_POWER + NV_DECLARE_ALIGNED(RUSD_AVG_POWER_USAGE avgPowerUsage, 8); + + // POLL_POWER + NV_DECLARE_ALIGNED(RUSD_INST_POWER_USAGE instPowerUsage, 8); + + // POLL_POWER + NV_DECLARE_ALIGNED(RUSD_POWER_POLICY_STATUS powerPolicyStatus, 8); + + // POLL_PCI + NV_DECLARE_ALIGNED(RUSD_PCIE_DATA pciBusData, 8); + + // POLL_FAN + NV_DECLARE_ALIGNED(RUSD_FAN_COOLER_STATUS fanCoolerStatus, 8); + + // POLL_PROC_UTIL + NV_DECLARE_ALIGNED(RUSD_PROC_UTIL procUtil, 8); + +} NV00DE_SHARED_DATA; + +// +// Polling mask bits, pass into ALLOC_PARAMETERS or NV00DE_CTRL_REQEUSET_DATA_POLL +// to request above polled data to be provided +// +#define NV00DE_RUSD_POLL_CLOCK 0x1 +#define NV00DE_RUSD_POLL_PERF 0x2 +#define NV00DE_RUSD_POLL_MEMORY 0x4 +#define NV00DE_RUSD_POLL_POWER 0x8 +#define NV00DE_RUSD_POLL_THERMAL 0x10 +#define NV00DE_RUSD_POLL_PCI 0x20 +#define NV00DE_RUSD_POLL_FAN 0x40 +#define NV00DE_RUSD_POLL_PROC_UTIL 0x80 + +typedef struct NV00DE_ALLOC_PARAMETERS { + NvU64 polledDataMask; // Bitmask of data to request polling at alloc time, 0 if not needed +} NV00DE_ALLOC_PARAMETERS; + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl00de_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl00e0.h b/userspace/sdks/nv570/inc/class/cl00e0.h new file mode 100644 index 0000000..8fac1e3 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00e0.h @@ -0,0 +1,111 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00e0.finn +// + +#include "cl0080.h" + +/* + * Class definition for exporting memory handles to a different RM client on the + * same or another node (OS). + * + * No memory is allocated or mapped using this class. + * Parented by hClient. + * NvRmDupObject() is not supported. Use NV_MEM_EXPORT_FLAGS_DUP_BY_UUID instead. + */ + +#define NV_MEMORY_EXPORT (0xe0U) /* finn: Evaluated from "NV00E0_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NV_MEM_EXPORT_UUID_LEN 16 +#define NV_MEM_EXPORT_PACKET_LEN 32 +#define NV_MEM_EXPORT_METADATA_LEN 64 + +typedef struct NV_EXPORT_MEM_PACKET { + NvU8 uuid[NV_MEM_EXPORT_UUID_LEN]; + NvU8 opaque[16]; +} NV_EXPORT_MEM_PACKET; + +#define NV_MEM_EXPORT_FLAGS_DEFAULT 0x00000000 +#define NV_MEM_EXPORT_FLAGS_DUP_BY_UUID 0x00000001 + +/* + * imexChannel [IN] + * Used to associated export object with an IMEX channel. + * When duping, + * - If the caller is not the privileged IMEX daemon, validate the caller + * is subscribed to the channel. + * - Validate that the imexChannel matches with that of the export object being + * duped. + * + * packet [IN/OUT] + * Bag of bits which uniquely identifies this object universally. + * - When a new object is allocated, "packet" is returned as output. + * - If NV_MEM_EXPORT_FLAGS_DUP_BY_UUID is provided, "packet" is used as + * input to duplicate the existing object. + * + * numMaxHandles [IN/OUT] + * Max number of memory handles to be attached to the export object. + * - Input when a new object is allocated. + * - Output When duplicating. + * + * flags [IN/OUT] + * One of NV_MEM_EXPORT_FLAGS_* + * - Input when a new object is allocated or duplicated. + * - Output when duplicating. The flags at the time of allocation are + * returned. + * + * metadata [IN/OUT] + * Private data about the export object (opaque to kernel mode) + * - Input when a new object is allocated. + * - Output When duplicating. + * + * deviceInstanceMask [OUT] + * Attached device instance mask + * + * giIdMasks [OUT] + * Attached GPU instance ID mask (MIG is currently not supported) + * Must be indexed using deviceInstanceMask. + * + * numCurHandles [OUT] + * Number of memory handles currently attached to the export object. + */ + +#define NV00E0_ALLOCATION_PARAMETERS_MESSAGE_ID (0x00e0U) + +typedef struct NV00E0_ALLOCATION_PARAMETERS { + NvU32 imexChannel; + NV_EXPORT_MEM_PACKET packet; + NvU16 numMaxHandles; + NvU32 flags; + NvU8 metadata[NV_MEM_EXPORT_METADATA_LEN]; + NvU32 deviceInstanceMask; + NvU32 giIdMasks[NV_MAX_DEVICES]; + NvU16 numCurHandles; +} NV00E0_ALLOCATION_PARAMETERS; diff --git a/userspace/sdks/nv570/inc/class/cl00f1.h b/userspace/sdks/nv570/inc/class/cl00f1.h new file mode 100644 index 0000000..c2b35ae --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00f1.h @@ -0,0 +1,64 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00f1.finn +// + +#define NV_IMEX_SESSION (0xf1U) /* finn: Evaluated from "NV00F1_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NV00F1_ALLOC_FLAGS_DEFAULT 0 + +// +// Disables channel recovery on IMEX shutdown. This can lead to security +// issues. The flag is intended to be used for testing purpose only. +// +#define NV00F1_ALLOC_DISABLE_CHANNEL_RECOVERY NVBIT(0) + +#define NV00F1_ALLOCATION_PARAMETERS_MESSAGE_ID (0x00f1U) + +typedef struct NV00F1_ALLOCATION_PARAMETERS { + // + // capDescriptor is a file descriptor for UNIX RM clients, but a void + // pointer for windows RM clients. + // + // capDescriptor is transparent to RM clients i.e. RM's user-mode shim + // populates this field on behalf of clients. + // + NV_DECLARE_ALIGNED(NvU64 capDescriptor, 8); + + // See NV00F1_ALLOC_FLAGS_xxx + NvU32 flags; + + // OS event handle created with NvRmAllocOsEvent(). + NV_DECLARE_ALIGNED(NvP64 pOsEvent, 8); + + // Node ID which represent this OS/RM instance + NvU16 nodeId; +} NV00F1_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl00f2.h b/userspace/sdks/nv570/inc/class/cl00f2.h new file mode 100644 index 0000000..13b0624 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00f2.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _cl00f2_h_ +#define _cl00f2_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define IO_VASPACE_A (0x000000f2) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cl00f2_h + diff --git a/userspace/sdks/nv570/inc/class/cl00f8.h b/userspace/sdks/nv570/inc/class/cl00f8.h new file mode 100644 index 0000000..be0b7dc --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00f8.h @@ -0,0 +1,133 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00f8.finn +// + + + +#include "nvcfg_sdk.h" + + +/* + * Class definition for allocating a contiguous or discontiguous FLA. + */ + +#define NV_MEMORY_FABRIC (0xf8U) /* finn: Evaluated from "NV00F8_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +/* + * alignment [IN] + * Alignment for the allocation. + * Should be at least the requested page size. + * + * allocSize [IN] + * Size of the FLA VA. + * + * pageSize [IN] + * Requested page size. Can be any of the NV_MEMORY_FABRIC_PAGE_SIZE_* + * + * allocFlags [IN] + * Can be any of the NV00F8_ALLOC_FLAGS_* + * DEFAULT (sticky) + * The FLA -> PA mappings will be stuck to the object, i.e, once the mapping is created + * there is no way to unmap it explicitly. + * The FLA object must be destroyed to release the mappings. + * The FLA object can't be duped or exported until it has a mapping associated with it. + * Partial FLA->PA mappings will NOT be allowed. + * FLEXIBLE_FLA + * The FLA -> PA mappings can be modified anytime irrespective of the FLA object is duped + * or exported. + * Partial FLA mappings are allowed. + * FORCE_NONCONTIGUOUS + * The allocator may pick contiguous memory whenever possible. This flag forces the + * allocator to always allocate noncontiguous memory. This flag is mainly used for + * testing purpose. So, use with caution. + * FORCE_CONTIGUOUS + * This flag forces the allocator to always allocate contiguous memory. + * READ_ONLY + * The FLA -> PA mappings will be created read-only. This option is only available on + * debug/develop builds due to security concerns. The security concerns are due to the + * fact that FLA access errors (a.k.a PRIV errors) are not aways context attributable. + * FORCE_UC_LOOPBACK + * Sticky FLA allocations fallback to GVA->GPA/SPA mappings as an optimization when + * mapped on the FLA owner GPU. However, if HW/FW supports loopback, this flag can be + * used to force create GVA->FLA loopback mappings. This flag is a NOP for flexible FLA + * allocations. + * + * + * map.offset [IN] + * Offset into the physical memory descriptor. + * Must be physical memory page size aligned. + * + * map.hVidMem [IN] + * - Handle to the physical memory. + * - Must be passed so that the FLA -> GPA mapping can happen during object creation. + * - For sticky allocations, physical memory being mapped should be large enough + * (accounting map.offset) to cover the whole fabric object allocation size. + * - For flexible allocations, physical memory handle should be zero. + * - Phys memory with 2MB and 512MB pages is supported. + * - hVidMem should belong the same device and client which is allocating FLA. + * + * map.flags [IN] + * Reserved for future use. + * Clients should pass 0 as of now. + */ + +#define NV_MEMORY_FABRIC_PAGE_SIZE_2M 0x200000 +#define NV_MEMORY_FABRIC_PAGE_SIZE_512M 0x20000000 +#define NV_MEMORY_FABRIC_PAGE_SIZE_256G 0x4000000000 + +#define NV00F8_ALLOC_FLAGS_DEFAULT 0 +#define NV00F8_ALLOC_FLAGS_FLEXIBLE_FLA NVBIT(0) +#define NV00F8_ALLOC_FLAGS_FORCE_NONCONTIGUOUS NVBIT(1) +#define NV00F8_ALLOC_FLAGS_FORCE_CONTIGUOUS NVBIT(2) +#define NV00F8_ALLOC_FLAGS_READ_ONLY NVBIT(3) +#define NV00F8_ALLOC_FLAGS_FORCE_UC_LOOPBACK NVBIT(4) + + + +#define NV00F8_ALLOCATION_PARAMETERS_MESSAGE_ID (0x00f8U) + +typedef struct NV00F8_ALLOCATION_PARAMETERS { + + NV_DECLARE_ALIGNED(NvU64 alignment, 8); + NV_DECLARE_ALIGNED(NvU64 allocSize, 8); + + NV_DECLARE_ALIGNED(NvU64 pageSize, 8); + NvU32 allocFlags; + + struct { + NV_DECLARE_ALIGNED(NvU64 offset, 8); + + NvHandle hVidMem; + NvU32 flags; + } map; + +} NV00F8_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl00f9.h b/userspace/sdks/nv570/inc/class/cl00f9.h new file mode 100644 index 0000000..8f37e0a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00f9.h @@ -0,0 +1,82 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00f9.finn +// + +#include "cl00e0.h" + +/* + * Class definition for importing memory handles from a different RM client on + * the same or another node (OS). + */ + +#define NV_MEMORY_FABRIC_IMPORT_V2 (0xf9U) /* finn: Evaluated from "NV00F9_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +/* + * imexChannel [IN] + * IMEX channel to be used for import. (Currently ignored, driver picks the + * appropriate channel) + * + * packet [DEPRECATED, use expPacket instead] + * Fabric packet which uniquely identifies this object universally. + * + * expPacket [IN] + * Export object (see cl00e0.h) identifier from which memory will be imported. + * + * index [IN] + * Index into the FLA handle array associated with the export UUID. + * + * flags [IN] + * For future use. + * Set to zero for default behavior. + * + * pOsEvent [IN] + * Optional OS event handle created with NvRmAllocOsEvent(). + * + * id [IN] + * A 48-bit ID for this import call. The caller has freedom to uniqueness + * of the ID. RM would track the object uniquely using + * . + */ + +#define NV00F9_IMPORT_ID_MAX (NVBIT64(48) - 1) +#define NV00F9_IMPORT_ID_SHIFT 16 + +#define NV00F9_ALLOCATION_PARAMETERS_MESSAGE_ID (0x00f9U) + +typedef struct NV00F9_ALLOCATION_PARAMETERS { + NvU32 imexChannel; + NV_EXPORT_MEM_PACKET expPacket; + NvU16 index; + NvU32 flags; + NV_DECLARE_ALIGNED(NvP64 pOsEvent, 8); + NV_DECLARE_ALIGNED(NvU64 id, 8); +} NV00F9_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl00fb.h b/userspace/sdks/nv570/inc/class/cl00fb.h new file mode 100644 index 0000000..181d3e3 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00fb.h @@ -0,0 +1,71 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00fb.finn +// + +#include "cl00e0.h" + +/* + * Class definition for referencing the imported fabric memory, + * NV_MEMORY_FABRIC_IMPORT_V2, using the export object UUID. + * + * A privileged fabric manager only class, parented by client. + * + * No fabric events will be generated during creation or destruction of + * this class. + */ + +#define NV_MEMORY_FABRIC_IMPORTED_REF (0xfbU) /* finn: Evaluated from "NV00FB_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +/* + * exportUuid [IN] + * Universally unique identifier of the export object. This is extracted + * from a fabric packet. + * + * index [IN] + * Index of the export object to which the memory object is attached. + * + * flags [IN] + * Currently unused. Must be zero for now. + * + * id [IN] + * Import ID. An import request is uniquely identified using, + * . + */ + +#define NV00FB_ALLOCATION_PARAMETERS_MESSAGE_ID (0x00fbU) + +typedef struct NV00FB_ALLOCATION_PARAMETERS { + NvU8 exportUuid[NV_MEM_EXPORT_UUID_LEN]; + NvU16 index; + NvU32 flags; + NV_DECLARE_ALIGNED(NvU64 id, 8); +} NV00FB_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl00fc.h b/userspace/sdks/nv570/inc/class/cl00fc.h new file mode 100644 index 0000000..aa50ead --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00fc.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _cl00fc_h_ +#define _cl00fc_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define FABRIC_VASPACE_A (0x000000fc) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cl00fc_h + diff --git a/userspace/sdks/nv570/inc/class/cl00fd.h b/userspace/sdks/nv570/inc/class/cl00fd.h new file mode 100644 index 0000000..bd598c7 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00fd.h @@ -0,0 +1,99 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2010-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* + * Class definition for allocating a contiguous or discontiguous Multicast FLA. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00fd.finn +// + +#include "cl00e0.h" + + + +#define NV_MEMORY_MULTICAST_FABRIC (0xfdU) /* finn: Evaluated from "NV00FD_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +/* + * expPacket [IN] + * Export object (see cl00e0.h) identifier from which memory will be imported. + * + * index [IN] + * Index of the export object to which the memory object is attached. + */ + + +/* + * alignment [IN] + * Alignment for the allocation. + * Should be at least the requested page size. + * + * allocSize [IN] + * Size of the Multicast FLA VA. + * + * pageSize [IN] + * Requested page size. Can be any of the NV_MEMORY_MULTICAST_FABRIC_PAGE_SIZE_* + * + * allocFlags [IN] + * Should be one of NV_MEMORY_MULTICAST_FABRIC_ALLOC_FLAGS_* + * + * numGpus [IN] + * Number of unique GPUs to be attached. + * + * pOsEvent [IN] + * Optional OS event handle created with NvRmAllocOsEvent(). + */ + +#define NV_MEMORY_MULTICAST_FABRIC_PAGE_SIZE_512M 0x20000000 +#define NV_MEMORY_MULTICAST_FABRIC_PAGE_SIZE_256G 0x1000000000000 + +/* + * This flag must be passed if the object is created using export packet. Note + * when this flag is provided, the input params: alignment, allocSize, + * numGpus, pageSize won't be honored. + */ +#define NV_MEMORY_MULTICAST_FABRIC_ALLOC_FLAGS_USE_EXPORT_PACKET 0x00000001 + + + +#define NV00FD_ALLOCATION_PARAMETERS_MESSAGE_ID (0x00fdU) + +typedef struct NV00FD_ALLOCATION_PARAMETERS { + NV_EXPORT_MEM_PACKET expPacket; + NvU16 index; + + + NV_DECLARE_ALIGNED(NvU64 alignment, 8); + NV_DECLARE_ALIGNED(NvU64 allocSize, 8); + NV_DECLARE_ALIGNED(NvU64 pageSize, 8); + NvU32 allocFlags; + NvU32 numGpus; + NV_DECLARE_ALIGNED(NvP64 pOsEvent, 8); +} NV00FD_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl00fe.h b/userspace/sdks/nv570/inc/class/cl00fe.h new file mode 100644 index 0000000..c76d509 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl00fe.h @@ -0,0 +1,53 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl00fe.finn +// + +#define NV_MEMORY_MAPPER (0xfeU) /* finn: Evaluated from "NV_MEMORY_MAPPER_ALLOCATION_PARAMS_MESSAGE_ID" */ + +/* + * NV_MEMORY_MAPPER_ALLOCATION_PARAMS + * + * Allocation params for NV_MEMORY_MAPPER. + * This class provides paging operations channel interface to userspace clients. + */ +#define NV_MEMORY_MAPPER_ALLOCATION_PARAMS_MESSAGE_ID (0x00FEU) + +typedef struct NV_MEMORY_MAPPER_ALLOCATION_PARAMS { + NvHandle hSemaphoreSurface; + NvU32 maxQueueSize; + NvHandle hNotificationMemory; + NV_DECLARE_ALIGNED(NvU64 notificationOffset, 8); +} NV_MEMORY_MAPPER_ALLOCATION_PARAMS; + +typedef struct NV_MEMORY_MAPPER_NOTIFICATION { + NvU32 status; // NV_STATUS error code +} NV_MEMORY_MAPPER_NOTIFICATION; + diff --git a/userspace/sdks/nv570/inc/class/cl0100.h b/userspace/sdks/nv570/inc/class/cl0100.h new file mode 100644 index 0000000..a23f4b9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0100.h @@ -0,0 +1,50 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0100.finn +// + + + +/* + * The lock stress object (LOCK_STRESS_OBJECT) is a test-only object that exports + * multiple RM controls which exercise acquiring different combinations of RM locks in + * order to stress and properly test RM locking specifically. These API's only exercise + * legal combinations of RM locks that are in use elsewhere in RM but they are intended + * to be exhaustive in covering all possible combinations of RM locks. The API's + * themselves, don't do much outside of incrementing/decrementing global integers that + * can be validated later on within a test executable to ensure that all accesses to + * these global integers were synchronous. + * + * The lock stress object is not allocatable without the "EnableRmTestOnlyCode" registry + * key being turned on, which is off by default. The creation/destruction of the object + * has no functional impact to RM. The constructor simply allocate test only resources + * and checks for the regisry enablement. + */ + +#define LOCK_STRESS_OBJECT 0x0100U + diff --git a/userspace/sdks/nv570/inc/class/cl0101.h b/userspace/sdks/nv570/inc/class/cl0101.h new file mode 100644 index 0000000..8aba267 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl0101.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl0101.finn +// + + + +/* + * LOCK_TEST_RELAXED_DUP_OBJECT + * An object used for testing the relaxed GPU lock for RMDUP operation. + * Can be allocated only if PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE is set. + */ +#define LOCK_TEST_RELAXED_DUP_OBJECT 0x0101U + diff --git a/userspace/sdks/nv570/inc/class/cl2080.h b/userspace/sdks/nv570/inc/class/cl2080.h new file mode 100644 index 0000000..a85a662 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl2080.h @@ -0,0 +1,46 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2002-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl2080.finn +// + +#include "nvlimits.h" +#include "cl2080_notification.h" + +#define NV20_SUBDEVICE_0 (0x2080U) /* finn: Evaluated from "NV2080_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* NvAlloc parameteters */ +#define NV2080_MAX_SUBDEVICES NV_MAX_SUBDEVICES + +#define NV2080_ALLOC_PARAMETERS_MESSAGE_ID (0x2080U) + +typedef struct NV2080_ALLOC_PARAMETERS { + NvU32 subDeviceId; +} NV2080_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl2080_notification.h b/userspace/sdks/nv570/inc/class/cl2080_notification.h new file mode 100644 index 0000000..fe39a82 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl2080_notification.h @@ -0,0 +1,612 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl2080_notification_h_ +#define _cl2080_notification_h_ + +#include "nvcfg_sdk.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvcfg_sdk.h" + +/* event values */ +#define NV2080_NOTIFIERS_SW (0) +#define NV2080_NOTIFIERS_HOTPLUG (1) +#define NV2080_NOTIFIERS_POWER_CONNECTOR (2) +#define NV2080_NOTIFIERS_THERMAL_SW (3) +#define NV2080_NOTIFIERS_THERMAL_HW (4) +#define NV2080_NOTIFIERS_FULL_SCREEN_CHANGE (5) +#define NV2080_NOTIFIERS_EVENTBUFFER (6) +#define NV2080_NOTIFIERS_DP_IRQ (7) +#define NV2080_NOTIFIERS_GR_DEBUG_INTR (8) +#define NV2080_NOTIFIERS_PMU_EVENT (9) +#define NV2080_NOTIFIERS_PMU_COMMAND (10) +#define NV2080_NOTIFIERS_TIMER (11) +#define NV2080_NOTIFIERS_GRAPHICS (12) +#define NV2080_NOTIFIERS_PPP (13) +#define NV2080_NOTIFIERS_VLD (14) // also known as BSP +#define NV2080_NOTIFIERS_NVDEC0 NV2080_NOTIFIERS_VLD +#define NV2080_NOTIFIERS_NVDEC1 (15) +#define NV2080_NOTIFIERS_NVDEC2 (16) +#define NV2080_NOTIFIERS_NVDEC3 (17) +#define NV2080_NOTIFIERS_NVDEC4 (18) +#define NV2080_NOTIFIERS_NVDEC5 (19) +#define NV2080_NOTIFIERS_NVDEC6 (20) +#define NV2080_NOTIFIERS_NVDEC7 (21) +#define NV2080_NOTIFIERS_PDEC (22) // also known as VP +#define NV2080_NOTIFIERS_CE0 (23) +#define NV2080_NOTIFIERS_CE1 (24) +#define NV2080_NOTIFIERS_CE2 (25) +#define NV2080_NOTIFIERS_CE3 (26) +#define NV2080_NOTIFIERS_CE4 (27) +#define NV2080_NOTIFIERS_CE5 (28) +#define NV2080_NOTIFIERS_CE6 (29) +#define NV2080_NOTIFIERS_CE7 (30) +#define NV2080_NOTIFIERS_CE8 (31) +#define NV2080_NOTIFIERS_CE9 (32) +#define NV2080_NOTIFIERS_PSTATE_CHANGE (33) +#define NV2080_NOTIFIERS_HDCP_STATUS_CHANGE (34) +#define NV2080_NOTIFIERS_FIFO_EVENT_MTHD (35) +#define NV2080_NOTIFIERS_PRIV_RING_HANG (36) +#define NV2080_NOTIFIERS_RC_ERROR (37) +#define NV2080_NOTIFIERS_MSENC (38) +#define NV2080_NOTIFIERS_NVENC0 NV2080_NOTIFIERS_MSENC +#define NV2080_NOTIFIERS_NVENC1 (39) +#define NV2080_NOTIFIERS_NVENC2 (40) +#define NV2080_NOTIFIERS_UNUSED_0 (41) // Unused +#define NV2080_NOTIFIERS_ACPI_NOTIFY (42) +#define NV2080_NOTIFIERS_COOLER_DIAG_ZONE (43) +#define NV2080_NOTIFIERS_THERMAL_DIAG_ZONE (44) +#define NV2080_NOTIFIERS_AUDIO_HDCP_REQUEST (45) +#define NV2080_NOTIFIERS_WORKLOAD_MODULATION_CHANGE (46) +#define NV2080_NOTIFIERS_GPIO_0_RISING_INTERRUPT (47) +#define NV2080_NOTIFIERS_GPIO_1_RISING_INTERRUPT (48) +#define NV2080_NOTIFIERS_GPIO_2_RISING_INTERRUPT (49) +#define NV2080_NOTIFIERS_GPIO_3_RISING_INTERRUPT (50) +#define NV2080_NOTIFIERS_GPIO_4_RISING_INTERRUPT (51) +#define NV2080_NOTIFIERS_GPIO_5_RISING_INTERRUPT (52) +#define NV2080_NOTIFIERS_GPIO_6_RISING_INTERRUPT (53) +#define NV2080_NOTIFIERS_GPIO_7_RISING_INTERRUPT (54) +#define NV2080_NOTIFIERS_GPIO_8_RISING_INTERRUPT (55) +#define NV2080_NOTIFIERS_GPIO_9_RISING_INTERRUPT (56) +#define NV2080_NOTIFIERS_GPIO_10_RISING_INTERRUPT (57) +#define NV2080_NOTIFIERS_GPIO_11_RISING_INTERRUPT (58) +#define NV2080_NOTIFIERS_GPIO_12_RISING_INTERRUPT (59) +#define NV2080_NOTIFIERS_GPIO_13_RISING_INTERRUPT (60) +#define NV2080_NOTIFIERS_GPIO_14_RISING_INTERRUPT (61) +#define NV2080_NOTIFIERS_GPIO_15_RISING_INTERRUPT (62) +#define NV2080_NOTIFIERS_GPIO_16_RISING_INTERRUPT (63) +#define NV2080_NOTIFIERS_GPIO_17_RISING_INTERRUPT (64) +#define NV2080_NOTIFIERS_GPIO_18_RISING_INTERRUPT (65) +#define NV2080_NOTIFIERS_GPIO_19_RISING_INTERRUPT (66) +#define NV2080_NOTIFIERS_GPIO_20_RISING_INTERRUPT (67) +#define NV2080_NOTIFIERS_GPIO_21_RISING_INTERRUPT (68) +#define NV2080_NOTIFIERS_GPIO_22_RISING_INTERRUPT (69) +#define NV2080_NOTIFIERS_GPIO_23_RISING_INTERRUPT (70) +#define NV2080_NOTIFIERS_GPIO_24_RISING_INTERRUPT (71) +#define NV2080_NOTIFIERS_GPIO_25_RISING_INTERRUPT (72) +#define NV2080_NOTIFIERS_GPIO_26_RISING_INTERRUPT (73) +#define NV2080_NOTIFIERS_GPIO_27_RISING_INTERRUPT (74) +#define NV2080_NOTIFIERS_GPIO_28_RISING_INTERRUPT (75) +#define NV2080_NOTIFIERS_GPIO_29_RISING_INTERRUPT (76) +#define NV2080_NOTIFIERS_GPIO_30_RISING_INTERRUPT (77) +#define NV2080_NOTIFIERS_GPIO_31_RISING_INTERRUPT (78) +#define NV2080_NOTIFIERS_GPIO_0_FALLING_INTERRUPT (79) +#define NV2080_NOTIFIERS_GPIO_1_FALLING_INTERRUPT (80) +#define NV2080_NOTIFIERS_GPIO_2_FALLING_INTERRUPT (81) +#define NV2080_NOTIFIERS_GPIO_3_FALLING_INTERRUPT (82) +#define NV2080_NOTIFIERS_GPIO_4_FALLING_INTERRUPT (83) +#define NV2080_NOTIFIERS_GPIO_5_FALLING_INTERRUPT (84) +#define NV2080_NOTIFIERS_GPIO_6_FALLING_INTERRUPT (85) +#define NV2080_NOTIFIERS_GPIO_7_FALLING_INTERRUPT (86) +#define NV2080_NOTIFIERS_GPIO_8_FALLING_INTERRUPT (87) +#define NV2080_NOTIFIERS_GPIO_9_FALLING_INTERRUPT (88) +#define NV2080_NOTIFIERS_GPIO_10_FALLING_INTERRUPT (89) +#define NV2080_NOTIFIERS_GPIO_11_FALLING_INTERRUPT (90) +#define NV2080_NOTIFIERS_GPIO_12_FALLING_INTERRUPT (91) +#define NV2080_NOTIFIERS_GPIO_13_FALLING_INTERRUPT (92) +#define NV2080_NOTIFIERS_GPIO_14_FALLING_INTERRUPT (93) +#define NV2080_NOTIFIERS_GPIO_15_FALLING_INTERRUPT (94) +#define NV2080_NOTIFIERS_GPIO_16_FALLING_INTERRUPT (95) +#define NV2080_NOTIFIERS_GPIO_17_FALLING_INTERRUPT (96) +#define NV2080_NOTIFIERS_GPIO_18_FALLING_INTERRUPT (97) +#define NV2080_NOTIFIERS_GPIO_19_FALLING_INTERRUPT (98) +#define NV2080_NOTIFIERS_GPIO_20_FALLING_INTERRUPT (99) +#define NV2080_NOTIFIERS_GPIO_21_FALLING_INTERRUPT (100) +#define NV2080_NOTIFIERS_GPIO_22_FALLING_INTERRUPT (101) +#define NV2080_NOTIFIERS_GPIO_23_FALLING_INTERRUPT (102) +#define NV2080_NOTIFIERS_GPIO_24_FALLING_INTERRUPT (103) +#define NV2080_NOTIFIERS_GPIO_25_FALLING_INTERRUPT (104) +#define NV2080_NOTIFIERS_GPIO_26_FALLING_INTERRUPT (105) +#define NV2080_NOTIFIERS_GPIO_27_FALLING_INTERRUPT (106) +#define NV2080_NOTIFIERS_GPIO_28_FALLING_INTERRUPT (107) +#define NV2080_NOTIFIERS_GPIO_29_FALLING_INTERRUPT (108) +#define NV2080_NOTIFIERS_GPIO_30_FALLING_INTERRUPT (109) +#define NV2080_NOTIFIERS_GPIO_31_FALLING_INTERRUPT (110) +#define NV2080_NOTIFIERS_ECC_SBE (111) +#define NV2080_NOTIFIERS_ECC_DBE (112) +#define NV2080_NOTIFIERS_STEREO_EMITTER_DETECTION (113) +#define NV2080_NOTIFIERS_GC5_GPU_READY (114) +#define NV2080_NOTIFIERS_SEC2 (115) +#define NV2080_NOTIFIERS_GC6_REFCOUNT_INC (116) +#define NV2080_NOTIFIERS_GC6_REFCOUNT_DEC (117) +#define NV2080_NOTIFIERS_POWER_EVENT (118) +#define NV2080_NOTIFIERS_CLOCKS_CHANGE (119) +#define NV2080_NOTIFIERS_HOTPLUG_PROCESSING_COMPLETE (120) +#define NV2080_NOTIFIERS_PHYSICAL_PAGE_FAULT (121) +#define NV2080_NOTIFIERS_RESERVED122 (122) +#define NV2080_NOTIFIERS_NVLINK_ERROR_FATAL (123) +#define NV2080_NOTIFIERS_PRIV_REG_ACCESS_FAULT (124) +#define NV2080_NOTIFIERS_NVLINK_ERROR_RECOVERY_REQUIRED (125) +#define NV2080_NOTIFIERS_NVJPG (126) +#define NV2080_NOTIFIERS_NVJPEG0 NV2080_NOTIFIERS_NVJPG +#define NV2080_NOTIFIERS_NVJPEG1 (127) +#define NV2080_NOTIFIERS_NVJPEG2 (128) +#define NV2080_NOTIFIERS_NVJPEG3 (129) +#define NV2080_NOTIFIERS_NVJPEG4 (130) +#define NV2080_NOTIFIERS_NVJPEG5 (131) +#define NV2080_NOTIFIERS_NVJPEG6 (132) +#define NV2080_NOTIFIERS_NVJPEG7 (133) +#define NV2080_NOTIFIERS_RUNLIST_AND_ENG_IDLE (134) +#define NV2080_NOTIFIERS_RUNLIST_ACQUIRE (135) +#define NV2080_NOTIFIERS_RUNLIST_ACQUIRE_AND_ENG_IDLE (136) +#define NV2080_NOTIFIERS_RUNLIST_IDLE (137) +#define NV2080_NOTIFIERS_TSG_PREEMPT_COMPLETE (138) +#define NV2080_NOTIFIERS_RUNLIST_PREEMPT_COMPLETE (139) +#define NV2080_NOTIFIERS_CTXSW_TIMEOUT (140) +#define NV2080_NOTIFIERS_INFOROM_ECC_OBJECT_UPDATED (141) +#define NV2080_NOTIFIERS_NVTELEMETRY_REPORT_EVENT (142) +#define NV2080_NOTIFIERS_DSTATE_XUSB_PPC (143) +#define NV2080_NOTIFIERS_FECS_CTX_SWITCH (144) +#define NV2080_NOTIFIERS_XUSB_PPC_CONNECTED (145) +#define NV2080_NOTIFIERS_GR0 NV2080_NOTIFIERS_GRAPHICS +#define NV2080_NOTIFIERS_GR1 (146) +#define NV2080_NOTIFIERS_GR2 (147) +#define NV2080_NOTIFIERS_GR3 (148) +#define NV2080_NOTIFIERS_GR4 (149) +#define NV2080_NOTIFIERS_GR5 (150) +#define NV2080_NOTIFIERS_GR6 (151) +#define NV2080_NOTIFIERS_GR7 (152) +#define NV2080_NOTIFIERS_OFA (153) +#define NV2080_NOTIFIERS_OFA0 NV2080_NOTIFIERS_OFA +#define NV2080_NOTIFIERS_DSTATE_HDA (154) +#define NV2080_NOTIFIERS_POISON_ERROR_NON_FATAL (155) +#define NV2080_NOTIFIERS_POISON_ERROR_FATAL (156) +#define NV2080_NOTIFIERS_UCODE_RESET (157) +#define NV2080_NOTIFIERS_PLATFORM_POWER_MODE_CHANGE (158) +#define NV2080_NOTIFIERS_SMC_CONFIG_UPDATE (159) +#define NV2080_NOTIFIERS_INFOROM_RRL_OBJECT_UPDATED (160) +#define NV2080_NOTIFIERS_INFOROM_PBL_OBJECT_UPDATED (161) +#define NV2080_NOTIFIERS_LPWR_DIFR_PREFETCH_REQUEST (162) +#define NV2080_NOTIFIERS_SEC_FAULT_ERROR (163) +#define NV2080_NOTIFIERS_UNUSED_1 (164) // Unused +#define NV2080_NOTIFIERS_NVLINK_INFO_LINK_UP (165) +#define NV2080_NOTIFIERS_CE10 (166) +#define NV2080_NOTIFIERS_CE11 (167) +#define NV2080_NOTIFIERS_CE12 (168) +#define NV2080_NOTIFIERS_CE13 (169) +#define NV2080_NOTIFIERS_CE14 (170) +#define NV2080_NOTIFIERS_CE15 (171) +#define NV2080_NOTIFIERS_CE16 (172) +#define NV2080_NOTIFIERS_CE17 (173) +#define NV2080_NOTIFIERS_CE18 (174) +#define NV2080_NOTIFIERS_CE19 (175) +#define NV2080_NOTIFIERS_NVLINK_INFO_LINK_DOWN (176) +#define NV2080_NOTIFIERS_NVPCF_EVENTS (177) +#define NV2080_NOTIFIERS_HDMI_FRL_RETRAINING_REQUEST (178) +// unused (179) +#define NV2080_NOTIFIERS_OFA1 (180) +#define NV2080_NOTIFIERS_AUX_POWER_EVENT (181) +#define NV2080_NOTIFIERS_AUX_POWER_STATE_CHANGE (182) +#define NV2080_NOTIFIERS_NVENC3 (183) +#define NV2080_NOTIFIERS_GSP_PERF_TRACE (184) +#define NV2080_NOTIFIERS_INBAND_RESPONSE (185) +#define NV2080_NOTIFIERS_RESERVED_186 (186) // Unused +#define NV2080_NOTIFIERS_ECC_SBE_STORM (187) +#define NV2080_NOTIFIERS_DRAM_RETIREMENT_EVENT (188) +#define NV2080_NOTIFIERS_DRAM_RETIREMENT_FAILURE (189) +#define NV2080_NOTIFIERS_NVLINK_UNCONTAINED_ERROR (190) +#define NV2080_NOTIFIERS_GPU_UNAVAILABLE (191) +#define NV2080_NOTIFIERS_GPU_RECOVERY_ACTION (192) +#define NV2080_NOTIFIERS_POWER_SUSPEND (193) +#define NV2080_NOTIFIERS_POWER_RESUME (194) +#define NV2080_NOTIFIERS_CTXSW_UCODE_ERROR (195) +#define NV2080_NOTIFIERS_USE_GC6_REDUCED_THRESHOLD (196) +#define NV2080_NOTIFIERS_GPU_RC_RESET (197) +#define NV2080_NOTIFIERS_RESERVED_198 (198) // Unused +#define NV2080_NOTIFIERS_INFOROM_BRL_OBJECT_UPDATED (199) +#define NV2080_NOTIFIERS_MAXCOUNT (200) + +// Indexed GR notifier reference +#define NV2080_NOTIFIERS_GR(x) ((x == 0) ? (NV2080_NOTIFIERS_GR0) : (NV2080_NOTIFIERS_GR1 + (x - 1))) +#define NV2080_NOTIFIERS_GR_IDX(x) ((x) - NV2080_NOTIFIERS_GR0) +#define NV2080_NOTIFIER_TYPE_IS_GR(x) (((x) == NV2080_NOTIFIERS_GR0) || (((x) >= NV2080_NOTIFIERS_GR1) && ((x) <= NV2080_NOTIFIERS_GR7))) + +// Indexed CE notifier reference +#define NV2080_NOTIFIERS_CE(x) (((x) < 10) ? (NV2080_NOTIFIERS_CE0 + (x)) : (NV2080_NOTIFIERS_CE10 + (x) - 10)) +#define NV2080_NOTIFIERS_CE_IDX(x) (((x) <= NV2080_NOTIFIERS_CE9) ? ((x) - NV2080_NOTIFIERS_CE0) : ((x) - NV2080_NOTIFIERS_CE10 + 10)) +#define NV2080_NOTIFIER_TYPE_IS_CE(x) ((((x) >= NV2080_NOTIFIERS_CE0) && ((x) <= NV2080_NOTIFIERS_CE9)) || \ + (((x) >= NV2080_NOTIFIERS_CE10) && ((x) <= NV2080_NOTIFIERS_CE19))) + +// Indexed MSENC notifier reference +#define NV2080_NOTIFIERS_NVENC(x) (((x) < 3) ? (NV2080_NOTIFIERS_NVENC0 + (x)) : (NV2080_NOTIFIERS_NVENC3 + (x) - 3)) +#define NV2080_NOTIFIERS_NVENC_IDX(x) (((x) <= NV2080_NOTIFIERS_NVENC2) ? ((x) - NV2080_NOTIFIERS_NVENC0) : ((x) - NV2080_NOTIFIERS_NVENC3 + 3)) +#define NV2080_NOTIFIER_TYPE_IS_NVENC(x) ((((x) >= NV2080_NOTIFIERS_NVENC0) && ((x) <= NV2080_NOTIFIERS_NVENC2)) || \ + (((x) == NV2080_NOTIFIERS_NVENC3))) +// Indexed NVDEC notifier reference +#define NV2080_NOTIFIERS_NVDEC(x) (NV2080_NOTIFIERS_NVDEC0 + (x)) +#define NV2080_NOTIFIERS_NVDEC_IDX(x) ((x) - NV2080_NOTIFIERS_NVDEC0) +#define NV2080_NOTIFIER_TYPE_IS_NVDEC(x) (((x) >= NV2080_NOTIFIERS_NVDEC0) && ((x) <= NV2080_NOTIFIERS_NVDEC7)) +// Indexed NVJPEG notifier reference +#define NV2080_NOTIFIERS_NVJPEG(x) (NV2080_NOTIFIERS_NVJPEG0 + (x)) +#define NV2080_NOTIFIERS_NVJPEG_IDX(x) ((x) - NV2080_NOTIFIERS_NVJPEG0) +#define NV2080_NOTIFIER_TYPE_IS_NVJPEG(x) (((x) >= NV2080_NOTIFIERS_NVJPEG0) && ((x) <= NV2080_NOTIFIERS_NVJPEG7)) + +// Indexed OFA notifier reference +#define NV2080_NOTIFIERS_OFAn(x) ((x == 0) ? (NV2080_NOTIFIERS_OFA0) : (NV2080_NOTIFIERS_OFA1)) +#define NV2080_NOTIFIERS_OFA_IDX(x) ((x == NV2080_NOTIFIERS_OFA0) ? ((x) - NV2080_NOTIFIERS_OFA0) : ((x) - NV2080_NOTIFIERS_OFA1 + 1)) +#define NV2080_NOTIFIER_TYPE_IS_OFA(x) (((x) == NV2080_NOTIFIERS_OFA0) || ((x) == NV2080_NOTIFIERS_OFA1)) + +#define NV2080_NOTIFIERS_GPIO_RISING_INTERRUPT(pin) (NV2080_NOTIFIERS_GPIO_0_RISING_INTERRUPT + (pin)) +#define NV2080_NOTIFIERS_GPIO_FALLING_INTERRUPT(pin) (NV2080_NOTIFIERS_GPIO_0_FALLING_INTERRUPT + (pin)) + +#define NV2080_SUBDEVICE_NOTIFICATION_STATUS_IN_PROGRESS (0x8000) +#define NV2080_SUBDEVICE_NOTIFICATION_STATUS_BAD_ARGUMENT (0x4000) +#define NV2080_SUBDEVICE_NOTIFICATION_STATUS_ERROR_INVALID_STATE (0x2000) +#define NV2080_SUBDEVICE_NOTIFICATION_STATUS_ERROR_STATE_IN_USE (0x1000) +#define NV2080_SUBDEVICE_NOTIFICATION_STATUS_DONE_SUCCESS (0x0000) + +/* exported engine defines */ +#define NV2080_ENGINE_TYPE_NULL (0x00000000) +#define NV2080_ENGINE_TYPE_GRAPHICS (0x00000001) +#define NV2080_ENGINE_TYPE_GR0 NV2080_ENGINE_TYPE_GRAPHICS +#define NV2080_ENGINE_TYPE_GR1 (0x00000002) +#define NV2080_ENGINE_TYPE_GR2 (0x00000003) +#define NV2080_ENGINE_TYPE_GR3 (0x00000004) +#define NV2080_ENGINE_TYPE_GR4 (0x00000005) +#define NV2080_ENGINE_TYPE_GR5 (0x00000006) +#define NV2080_ENGINE_TYPE_GR6 (0x00000007) +#define NV2080_ENGINE_TYPE_GR7 (0x00000008) +#define NV2080_ENGINE_TYPE_COPY0 (0x00000009) +#define NV2080_ENGINE_TYPE_COPY1 (0x0000000a) +#define NV2080_ENGINE_TYPE_COPY2 (0x0000000b) +#define NV2080_ENGINE_TYPE_COPY3 (0x0000000c) +#define NV2080_ENGINE_TYPE_COPY4 (0x0000000d) +#define NV2080_ENGINE_TYPE_COPY5 (0x0000000e) +#define NV2080_ENGINE_TYPE_COPY6 (0x0000000f) +#define NV2080_ENGINE_TYPE_COPY7 (0x00000010) +#define NV2080_ENGINE_TYPE_COPY8 (0x00000011) +#define NV2080_ENGINE_TYPE_COPY9 (0x00000012) +#define NV2080_ENGINE_TYPE_BSP (0x00000013) +#define NV2080_ENGINE_TYPE_NVDEC0 NV2080_ENGINE_TYPE_BSP +#define NV2080_ENGINE_TYPE_NVDEC1 (0x00000014) +#define NV2080_ENGINE_TYPE_NVDEC2 (0x00000015) +#define NV2080_ENGINE_TYPE_NVDEC3 (0x00000016) +#define NV2080_ENGINE_TYPE_NVDEC4 (0x00000017) +#define NV2080_ENGINE_TYPE_NVDEC5 (0x00000018) +#define NV2080_ENGINE_TYPE_NVDEC6 (0x00000019) +#define NV2080_ENGINE_TYPE_NVDEC7 (0x0000001a) +#define NV2080_ENGINE_TYPE_MSENC (0x0000001b) +#define NV2080_ENGINE_TYPE_NVENC0 NV2080_ENGINE_TYPE_MSENC /* Mutually exclusive alias */ +#define NV2080_ENGINE_TYPE_NVENC1 (0x0000001c) +#define NV2080_ENGINE_TYPE_NVENC2 (0x0000001d) +#define NV2080_ENGINE_TYPE_VP (0x0000001e) +#define NV2080_ENGINE_TYPE_ME (0x0000001f) +#define NV2080_ENGINE_TYPE_PPP (0x00000020) +#define NV2080_ENGINE_TYPE_MPEG (0x00000021) +#define NV2080_ENGINE_TYPE_SW (0x00000022) +#define NV2080_ENGINE_TYPE_CIPHER (0x00000023) +#define NV2080_ENGINE_TYPE_TSEC NV2080_ENGINE_TYPE_CIPHER +#define NV2080_ENGINE_TYPE_VIC (0x00000024) +#define NV2080_ENGINE_TYPE_MP (0x00000025) +#define NV2080_ENGINE_TYPE_SEC2 (0x00000026) +#define NV2080_ENGINE_TYPE_HOST (0x00000027) +#define NV2080_ENGINE_TYPE_DPU (0x00000028) +#define NV2080_ENGINE_TYPE_PMU (0x00000029) +#define NV2080_ENGINE_TYPE_FBFLCN (0x0000002a) +#define NV2080_ENGINE_TYPE_NVJPG (0x0000002b) +#define NV2080_ENGINE_TYPE_NVJPEG0 NV2080_ENGINE_TYPE_NVJPG +#define NV2080_ENGINE_TYPE_NVJPEG1 (0x0000002c) +#define NV2080_ENGINE_TYPE_NVJPEG2 (0x0000002d) +#define NV2080_ENGINE_TYPE_NVJPEG3 (0x0000002e) +#define NV2080_ENGINE_TYPE_NVJPEG4 (0x0000002f) +#define NV2080_ENGINE_TYPE_NVJPEG5 (0x00000030) +#define NV2080_ENGINE_TYPE_NVJPEG6 (0x00000031) +#define NV2080_ENGINE_TYPE_NVJPEG7 (0x00000032) +#define NV2080_ENGINE_TYPE_OFA (0x00000033) +#define NV2080_ENGINE_TYPE_OFA0 NV2080_ENGINE_TYPE_OFA +// Update the TYPE_COMP_DECOMP_COPYN defines as well when you update COPYN defines +#define NV2080_ENGINE_TYPE_COPY10 (0x00000034) +#define NV2080_ENGINE_TYPE_COPY11 (0x00000035) +#define NV2080_ENGINE_TYPE_COPY12 (0x00000036) +#define NV2080_ENGINE_TYPE_COPY13 (0x00000037) +#define NV2080_ENGINE_TYPE_COPY14 (0x00000038) +#define NV2080_ENGINE_TYPE_COPY15 (0x00000039) +#define NV2080_ENGINE_TYPE_COPY16 (0x0000003a) +#define NV2080_ENGINE_TYPE_COPY17 (0x0000003b) +#define NV2080_ENGINE_TYPE_COPY18 (0x0000003c) +#define NV2080_ENGINE_TYPE_COPY19 (0x0000003d) +#define NV2080_ENGINE_TYPE_OFA1 (0x0000003e) +#define NV2080_ENGINE_TYPE_NVENC3 (0x0000003f) +// See TBD documentation for how these defines work with existing ENGINE_TYPE_COPYN defines +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY0 (0x00000040) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY1 (0x00000041) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY2 (0x00000042) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY3 (0x00000043) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY4 (0x00000044) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY5 (0x00000045) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY6 (0x00000046) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY7 (0x00000047) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY8 (0x00000048) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY9 (0x00000049) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY10 (0x0000004a) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY11 (0x0000004b) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY12 (0x0000004c) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY13 (0x0000004d) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY14 (0x0000004e) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY15 (0x0000004f) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY16 (0x00000050) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY17 (0x00000051) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY18 (0x00000052) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY19 (0x00000053) +#define NV2080_ENGINE_TYPE_LAST (0x00000054) +#define NV2080_ENGINE_TYPE_ALLENGINES (0xffffffff) + +// +// NV2080_ENGINE_TYPE_COPY_SIZE is now defined as the maximum possible CE size. +// It does not reflect the max supported NV2080_ENGINE_TYPE_COPY counts. Bug 3713687 #90. +// It needs to use NV2080_ENGINE_TYPE_IS_COPY() to check if a CE is valid when +// the clients try to enumerate all NV2080_ENGINE_TYPE_COPYs. +// +#define NV2080_ENGINE_TYPE_COPY_SIZE 64 + +// Bug 4175886 - Use this new value for all chips once GB20X is released +#define NV2080_ENGINE_TYPE_NVENC_SIZE 4 +#define NV2080_ENGINE_TYPE_NVJPEG_SIZE 8 +#define NV2080_ENGINE_TYPE_NVDEC_SIZE 8 +#define NV2080_ENGINE_TYPE_GR_SIZE 8 +#define NV2080_ENGINE_TYPE_OFA_SIZE 2 + +// Indexed engines +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY(i) (NV2080_ENGINE_TYPE_COMP_DECOMP_COPY0 + (i)) +#define NV2080_ENGINE_TYPE_IS_COMP_DECOMP_COPY(i) (((i) >= NV2080_ENGINE_TYPE_COMP_DECOMP_COPY0) && ((i) <= NV2080_ENGINE_TYPE_COMP_DECOMP_COPY19)) +#define NV2080_ENGINE_TYPE_COMP_DECOMP_COPY_IDX(i) ((i) - NV2080_ENGINE_TYPE_COMP_DECOMP_COPY0) + +#define NV2080_ENGINE_TYPE_COPY(i) (((i) < 10) ? (NV2080_ENGINE_TYPE_COPY0 + (i)) : (NV2080_ENGINE_TYPE_COPY10 + (i) - 10)) +#define NV2080_ENGINE_TYPE_IS_COPY(i) ((((i) >= NV2080_ENGINE_TYPE_COPY0) && ((i) <= NV2080_ENGINE_TYPE_COPY9)) || \ + (((i) >= NV2080_ENGINE_TYPE_COPY10) && ((i) <= NV2080_ENGINE_TYPE_COPY19))) +#define NV2080_ENGINE_TYPE_COPY_IDX(i) (((i) <= NV2080_ENGINE_TYPE_COPY9) ? \ + ((i) - NV2080_ENGINE_TYPE_COPY0) : ((i) - NV2080_ENGINE_TYPE_COPY10 + 10)) + +#define NV2080_ENGINE_TYPE_NVENC(i) (((i) < 3) ? (NV2080_ENGINE_TYPE_NVENC0 + (i)) : (NV2080_ENGINE_TYPE_NVENC3 + (i) - 3)) +#define NV2080_ENGINE_TYPE_IS_NVENC(i) ((((i) >= NV2080_ENGINE_TYPE_NVENC0) && ((i) <= NV2080_ENGINE_TYPE_NVENC2)) || \ + (((i) == NV2080_ENGINE_TYPE_NVENC3))) +#define NV2080_ENGINE_TYPE_NVENC_IDX(i) (((i) <= NV2080_ENGINE_TYPE_NVENC2) ? \ + ((i)-NV2080_ENGINE_TYPE_NVENC0) : ((i)-NV2080_ENGINE_TYPE_NVENC3 + 3)) + +#define NV2080_ENGINE_TYPE_NVDEC(i) (NV2080_ENGINE_TYPE_NVDEC0+(i)) +#define NV2080_ENGINE_TYPE_IS_NVDEC(i) (((i) >= NV2080_ENGINE_TYPE_NVDEC0) && ((i) < NV2080_ENGINE_TYPE_NVDEC(NV2080_ENGINE_TYPE_NVDEC_SIZE))) +#define NV2080_ENGINE_TYPE_NVDEC_IDX(i) ((i) - NV2080_ENGINE_TYPE_NVDEC0) + +#define NV2080_ENGINE_TYPE_NVJPEG(i) (NV2080_ENGINE_TYPE_NVJPEG0+(i)) +#define NV2080_ENGINE_TYPE_IS_NVJPEG(i) (((i) >= NV2080_ENGINE_TYPE_NVJPEG0) && ((i) < NV2080_ENGINE_TYPE_NVJPEG(NV2080_ENGINE_TYPE_NVJPEG_SIZE))) +#define NV2080_ENGINE_TYPE_NVJPEG_IDX(i) ((i) - NV2080_ENGINE_TYPE_NVJPEG0) + +#define NV2080_ENGINE_TYPE_GR(i) (NV2080_ENGINE_TYPE_GR0 + (i)) +#define NV2080_ENGINE_TYPE_IS_GR(i) (((i) >= NV2080_ENGINE_TYPE_GR0) && ((i) < NV2080_ENGINE_TYPE_GR(NV2080_ENGINE_TYPE_GR_SIZE))) +#define NV2080_ENGINE_TYPE_GR_IDX(i) ((i) - NV2080_ENGINE_TYPE_GR0) + +#define NV2080_ENGINE_TYPE_OFAn(i) ((i == 0) ? (NV2080_ENGINE_TYPE_OFA0) : (NV2080_ENGINE_TYPE_OFA1)) +#define NV2080_ENGINE_TYPE_IS_OFA(i) (((i) == NV2080_ENGINE_TYPE_OFA0) || ((i) == NV2080_ENGINE_TYPE_OFA1)) +#define NV2080_ENGINE_TYPE_OFA_IDX(i) ((i == NV2080_ENGINE_TYPE_OFA0) ? ((i) - NV2080_ENGINE_TYPE_OFA0) : ((i) - NV2080_ENGINE_TYPE_OFA1 + 1)) + +#define NV2080_ENGINE_TYPE_IS_VALID(i) (((i) > (NV2080_ENGINE_TYPE_NULL)) && ((i) < (NV2080_ENGINE_TYPE_LAST))) + +/* exported client defines */ +#define NV2080_CLIENT_TYPE_TEX (0x00000001) +#define NV2080_CLIENT_TYPE_COLOR (0x00000002) +#define NV2080_CLIENT_TYPE_DEPTH (0x00000003) +#define NV2080_CLIENT_TYPE_DA (0x00000004) +#define NV2080_CLIENT_TYPE_FE (0x00000005) +#define NV2080_CLIENT_TYPE_SCC (0x00000006) +#define NV2080_CLIENT_TYPE_WID (0x00000007) +#define NV2080_CLIENT_TYPE_MSVLD (0x00000008) +#define NV2080_CLIENT_TYPE_MSPDEC (0x00000009) +#define NV2080_CLIENT_TYPE_MSPPP (0x0000000a) +#define NV2080_CLIENT_TYPE_VIC (0x0000000b) +#define NV2080_CLIENT_TYPE_ALLCLIENTS (0xffffffff) + +/* GC5 Gpu Ready event defines */ +#define NV2080_GC5_EXIT_COMPLETE (0x00000001) +#define NV2080_GC5_ENTRY_ABORTED (0x00000002) + +/* Platform Power Mode event defines */ +#define NV2080_PLATFORM_POWER_MODE_CHANGE_COMPLETION (0x00000000) +#define NV2080_PLATFORM_POWER_MODE_CHANGE_ACPI_NOTIFICATION (0x00000001) + +/* NvNotification[] fields and values */ +#define NV2080_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) +/* pio method data structure */ +typedef volatile struct _cl2080_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv2080Typedef, Nv20Subdevice0; +#define NV2080_TYPEDEF Nv20Subdevice0 + +/* HDCP Status change notification information */ +typedef struct Nv2080HdcpStatusChangeNotificationRec { + NvU32 displayId; + NvU32 hdcpStatusChangeNotif; +} Nv2080HdcpStatusChangeNotification; + +/* Pstate change notification information */ +typedef struct Nv2080PStateChangeNotificationRec { + struct { + NvU32 nanoseconds[2]; /* nanoseconds since Jan. 1, 1970 0- 7*/ + } timeStamp; /* -0007*/ + NvU32 NewPstate; +} Nv2080PStateChangeNotification; + +/* Clocks change notification information */ +typedef struct Nv2080ClocksChangeNotificationRec { + struct { + NvU32 nanoseconds[2]; /* nanoseconds since Jan. 1, 1970 0- 7*/ + } timeStamp; /* -0007*/ +} Nv2080ClocksChangeNotification; + +/* WorkLoad Modulation state change notification information*/ +typedef struct Nv2080WorkloadModulationChangeNotificationRec { + struct { + NvU32 nanoseconds[2]; /* nanoseconds since Jan. 1, 1970 0- 7*/ + } timeStamp; /* -0007*/ + NvBool WorkloadModulationEnabled; +} Nv2080WorkloadModulationChangeNotification; + +/* Hotplug notification information */ +typedef struct { + NvU32 plugDisplayMask; + NvU32 unplugDisplayMask; +} Nv2080HotplugNotification; + +/* Power state changing notification information */ +typedef struct { + NvBool bSwitchToAC; + NvBool bGPUCapabilityChanged; + NvU32 displayMaskAffected; +} Nv2080PowerEventNotification; + +/* DP IRQ notification information */ +typedef struct Nv2080DpIrqNotificationRec { + NvU32 displayId; +} Nv2080DpIrqNotification; + +/* XUSB/PPC D-State change notification information */ +typedef struct Nv2080DstateXusbPpcNotificationRec { + NvU32 dstateXusb; + NvU32 dstatePpc; +} Nv2080DstateXusbPpcNotification; + +/* XUSB/PPC Connection status notification information */ +typedef struct Nv2080XusbPpcConnectStateNotificationRec { + NvBool bConnected; +} Nv2080XusbPpcConnectStateNotification; + +/* ACPI event notification information */ +typedef struct Nv2080ACPIEvent { + NvU32 event; +} Nv2080ACPIEvent; + +/* Cooler Zone notification information */ +typedef struct _NV2080_COOLER_DIAG_ZONE_NOTIFICATION_REC { + NvU32 currentZone; +} NV2080_COOLER_DIAG_ZONE_NOTIFICATION_REC; + +/* Thermal Zone notification information */ +typedef struct _NV2080_THERM_DIAG_ZONE_NOTIFICATION_REC { + NvU32 currentZone; +} NV2080_THERM_DIAG_ZONE_NOTIFICATION_REC; + +/* HDCP ref count change notification information */ +typedef struct Nv2080AudioHdcpRequestRec { + NvU32 displayId; + NvU32 requestedState; +} Nv2080AudioHdcpRequest; + +/* Gpu ready event information */ +typedef struct Nv2080GC5GpuReadyParams { + NvU32 event; + NvU32 sciIntr0; + NvU32 sciIntr1; +} Nv2080GC5GpuReadyParams; + +/* Priv reg access fault notification information */ +typedef struct { + NvU32 errAddr; +} Nv2080PrivRegAccessFaultNotification; + +/* HDA D-State change notification information + * See @HDACODEC_DSTATE for definitions + */ +typedef struct Nv2080DstateHdaCodecNotificationRec { + NvU32 dstateHdaCodec; +} Nv2080DstateHdaCodecNotification; + +/* HDMI FRL retraining request notification information */ +typedef struct Nv2080HdmiFrlRequestNotificationRec { + NvU32 displayId; +} Nv2080HdmiFrlRequestNotification; + +/* + * Platform Power Mode event information + */ +typedef struct _NV2080_PLATFORM_POWER_MODE_CHANGE_STATUS { + NvU8 platformPowerModeIndex; + NvU8 platformPowerModeMask; + NvU8 eventReason; +} NV2080_PLATFORM_POWER_MODE_CHANGE_STATUS; + +/* + * Workload type update event information. Workload type is enumerated as per the + * NV2080_CTRL_PERF_PERF_CF_CONTROLLER_DLCC_WORKLOAD_TYPE_ENUM + */ +typedef struct _NV2080_NOTIFIERS_USE_GC6_REDUCED_THRESHOLD_UPDATE { + NvU8 workloadType; +} NV2080_NOTIFIERS_USE_GC6_REDUCED_THRESHOLD_UPDATE; + +#define NV2080_PLATFORM_POWER_MODE_CHANGE_INFO_INDEX 7:0 +#define NV2080_PLATFORM_POWER_MODE_CHANGE_INFO_MASK 15:8 +#define NV2080_PLATFORM_POWER_MODE_CHANGE_INFO_REASON 23:16 + +/* + * ENGINE_INFO_TYPE_NV2080 of the engine for which the QOS interrupt has been raised + */ +typedef struct { + NvU32 engineType; +} Nv2080QosIntrNotification; + +typedef struct { + NvU64 physAddress NV_ALIGN_BYTES(8); +} Nv2080EccDbeNotification; + +/* + * LPWR DIFR Prefetch Request - Size of L2 Cache + */ +typedef struct { + NvU32 l2CacheSize; +} Nv2080LpwrDifrPrefetchNotification; + +/* + * Nvlink Link status change Notification + */ +typedef struct { + NvU32 GpuId; + NvU32 linkId; +} Nv2080NvlinkLnkChangeNotification; + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl2080_notification_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl2081.h b/userspace/sdks/nv570/inc/class/cl2081.h new file mode 100644 index 0000000..2d1cede --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl2081.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl2081.finn +// + +#define NV2081_BINAPI (0x2081U) /* finn: Evaluated from "NV2081_ALLOC_PARAMETERS_MESSAGE_ID" */ + +#define NV2081_ALLOC_PARAMETERS_MESSAGE_ID (0x2081U) + +typedef struct NV2081_ALLOC_PARAMETERS { + NvU32 reserved; +} NV2081_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl2082.h b/userspace/sdks/nv570/inc/class/cl2082.h new file mode 100644 index 0000000..0846209 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl2082.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl2082.finn +// + +#define NV2082_BINAPI_PRIVILEGED (0x2082U) /* finn: Evaluated from "NV2082_ALLOC_PARAMETERS_MESSAGE_ID" */ + +#define NV2082_ALLOC_PARAMETERS_MESSAGE_ID (0x2082U) + +typedef struct NV2082_ALLOC_PARAMETERS { + NvU32 reserved; +} NV2082_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl208f.h b/userspace/sdks/nv570/inc/class/cl208f.h new file mode 100644 index 0000000..d6dc3f3 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl208f.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2006-2006 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl208f_h_ +#define _cl208f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Class within the subdevice used for diagnostic purpose*/ +#define NV20_SUBDEVICE_DIAG (0x0000208f) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl208f_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/cl30f1.h b/userspace/sdks/nv570/inc/class/cl30f1.h new file mode 100644 index 0000000..ffba5e1 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl30f1.h @@ -0,0 +1,56 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2006-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl30f1.finn +// + +#include "cl30f1_notification.h" + +/* class NV30_GSYNC */ +#define NV30_GSYNC (0x30f1U) /* finn: Evaluated from "NV30F1_ALLOC_PARAMETERS_MESSAGE_ID" */ + +#define NV30F1_GSYNC_CONNECTOR_ONE (0) +#define NV30F1_GSYNC_CONNECTOR_TWO (1) +#define NV30F1_GSYNC_CONNECTOR_THREE (2) +#define NV30F1_GSYNC_CONNECTOR_FOUR (3) + +#define NV30F1_GSYNC_CONNECTOR_PRIMARY NV30F1_GSYNC_CONNECTOR_ONE +#define NV30F1_GSYNC_CONNECTOR_SECONDARY NV30F1_GSYNC_CONNECTOR_TWO + +#define NV30F1_GSYNC_CONNECTOR_COUNT (4) + +/* NvRmAlloc parameters */ +#define NV30F1_MAX_GSYNCS (0x0000004) + +#define NV30F1_ALLOC_PARAMETERS_MESSAGE_ID (0x30f1U) + +typedef struct NV30F1_ALLOC_PARAMETERS { + NvU32 gsyncInstance; +} NV30F1_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl30f1_notification.h b/userspace/sdks/nv570/inc/class/cl30f1_notification.h new file mode 100644 index 0000000..290eb5c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl30f1_notification.h @@ -0,0 +1,74 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl30f1_notification_h_ +#define _cl30f1_notification_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * A client should use NV01_EVENT_OS_EVENT as hClass and NV30F1_GSYNC_NOTIFIERS_* as + * notify index when allocating event, if separate event notifications are needed for + * separate event types. + * + * A client should use NV01_EVENT_KERNEL_CALLBACK as hClass and + * NV30F1_GSYNC_NOTIFIERS_ALL as notify index, if a single event is required. + * In this case RM would set event data equal to a pointer to NvNotification structure. + * The info32 field of NvNotification structure would be equal a bitmask of + * NV30F1_GSYNC_NOTIFIERS_* values. + */ + +/* NvNotification[] fields and values */ + +/* Framelock sync gain and loss events. These are connector specific events. */ +#define NV30F1_GSYNC_NOTIFIERS_SYNC_LOSS(c) (0x00+(c)) +#define NV30F1_GSYNC_NOTIFIERS_SYNC_GAIN(c) (0x04+(c)) + +/* Framelock stereo gain and loss events. These are connector specific events. */ +#define NV30F1_GSYNC_NOTIFIERS_STEREO_LOSS(c) (0x08+(c)) +#define NV30F1_GSYNC_NOTIFIERS_STEREO_GAIN(c) (0x0C+(c)) + +/* House cable gain(plug in) and loss(plug out) events. */ +#define NV30F1_GSYNC_NOTIFIERS_HOUSE_GAIN (0x10) +#define NV30F1_GSYNC_NOTIFIERS_HOUSE_LOSS (0x11) + +/* RJ45 cable gain(plug in) and loss(plug out) events. */ +#define NV30F1_GSYNC_NOTIFIERS_RJ45_GAIN (0x12) +#define NV30F1_GSYNC_NOTIFIERS_RJ45_LOSS (0x13) + +#define NV30F1_GSYNC_NOTIFIERS_MAXCOUNT (0x14) + +/* + * For handling all event types. + * Note for Windows, it only handles NV01_EVENT_KERNEL_CALLBACK_EX; as for NV01_EVENT_OS_EVENT, it can only + * signal an event but not handle over any information. + */ +#define NV30F1_GSYNC_NOTIFIERS_ALL NV30F1_GSYNC_NOTIFIERS_MAXCOUNT + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl30f1_notification_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl402c.h b/userspace/sdks/nv570/inc/class/cl402c.h new file mode 100644 index 0000000..9ba7c3b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl402c.h @@ -0,0 +1,47 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2010-2010 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl402c_h_ +#define _cl402c_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* I2C operations */ +#define NV40_I2C (0x0000402c) + +typedef volatile struct _cl402c_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv402cTypedef, Nv40I2c; +#define NV402C_TYPEDEF Nv40I2c + + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl402c_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/cl503b.h b/userspace/sdks/nv570/inc/class/cl503b.h new file mode 100644 index 0000000..4fd9f61 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl503b.h @@ -0,0 +1,81 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2009-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl503b.finn +// + +#define NV50_P2P (0x503bU) /* finn: Evaluated from "NV503B_ALLOC_PARAMETERS_MESSAGE_ID" */ + +#define NV503B_FLAGS_P2P_TYPE 0:0 +#define NV503B_FLAGS_P2P_TYPE_GPA 0 +#define NV503B_FLAGS_P2P_TYPE_SPA 1 + +/* + * NV503B_BAR1_P2P_DMA_INFO + * + * The DMA information for BAR1 P2P. + * The default value for dma_address is NV_U64_MAX and dma_size is 0. + * This BAR1 P2P DMA information is only valid for the kernel-privileged clients. + * For unprivileged clients, all fields will be the default values. + * + */ +typedef struct NV503B_BAR1_P2P_DMA_INFO { + NV_DECLARE_ALIGNED(NvU64 dma_address, 8); + NV_DECLARE_ALIGNED(NvU64 dma_size, 8); +} NV503B_BAR1_P2P_DMA_INFO; + +typedef struct NV503B_FABRIC_P2P_DMA_INFO { + NV_DECLARE_ALIGNED(NvU64 gpa, 8); +} NV503B_FABRIC_P2P_DMA_INFO; + +/* NvRmAlloc parameters */ +#define NV503B_ALLOC_PARAMETERS_MESSAGE_ID (0x503bU) + +typedef struct NV503B_ALLOC_PARAMETERS { + NvHandle hSubDevice; /* subDevice handle of local GPU */ + NvHandle hPeerSubDevice; /* subDevice handle of peer GPU */ + NvU32 subDevicePeerIdMask; /* Bit mask of peer ID for SubDevice + * A value of 0 defaults to RM selected + * PeerIdMasks must match in loopback */ + NvU32 peerSubDevicePeerIdMask; /* Bit mask of peer ID for PeerSubDevice + * A value of 0 defaults to RM selected + * PeerIdMasks must match in loopback */ + NV_DECLARE_ALIGNED(NvU64 mailboxBar1Addr, 8); /* P2P Mailbox area base offset in BAR1 + * Must have the same value across the GPUs */ + NvU32 mailboxTotalSize; /* Size of the P2P Mailbox area + * Must have the same value across the GPUs */ + NvU32 flags; /* Flag to indicate types/attib of p2p */ + NvU32 subDeviceEgmPeerIdMask; /* Bit mask of EGM peer ID of SubDevice */ + NvU32 peerSubDeviceEgmPeerIdMask; /* Bit mask of EGM peer ID for PeerSubDevice */ + NV_DECLARE_ALIGNED(NV503B_BAR1_P2P_DMA_INFO l2pBar1P2PDmaInfo, 8); /* Bar1 DMA info from local GPU to peer GPU */ + NV_DECLARE_ALIGNED(NV503B_BAR1_P2P_DMA_INFO p2lBar1P2PDmaInfo, 8); /* Bar1 DMA info from peer GPU to local GPU */ + NV_DECLARE_ALIGNED(NV503B_FABRIC_P2P_DMA_INFO l2pFabricP2PInfo, 8); /* NVLink fabric base address of the local GPU. Used in switch systems */ + NV_DECLARE_ALIGNED(NV503B_FABRIC_P2P_DMA_INFO p2lFabricP2PInfo, 8); /* NVLink fabric base address of the remote GPU. Used in switch systems */ +} NV503B_ALLOC_PARAMETERS; diff --git a/userspace/sdks/nv570/inc/class/cl503c.h b/userspace/sdks/nv570/inc/class/cl503c.h new file mode 100644 index 0000000..6cfeabf --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl503c.h @@ -0,0 +1,47 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2009-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl503c.finn +// + +#define NV50_THIRD_PARTY_P2P (0x503cU) /* finn: Evaluated from "NV503C_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* NvRmAlloc parameters */ +#define NV503C_ALLOC_PARAMETERS_MESSAGE_ID (0x503cU) + +typedef struct NV503C_ALLOC_PARAMETERS { + NvU32 flags; +} NV503C_ALLOC_PARAMETERS; + +#define NV503C_ALLOC_PARAMETERS_FLAGS_TYPE 1:0 +#define NV503C_ALLOC_PARAMETERS_FLAGS_TYPE_PROPRIETARY (0x00000000) +#define NV503C_ALLOC_PARAMETERS_FLAGS_TYPE_BAR1 (0x00000001) +#define NV503C_ALLOC_PARAMETERS_FLAGS_TYPE_NVLINK (0x00000002) + diff --git a/userspace/sdks/nv570/inc/class/cl506f.h b/userspace/sdks/nv570/inc/class/cl506f.h new file mode 100644 index 0000000..b086c43 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl506f.h @@ -0,0 +1,157 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl506f_h_ +#define _cl506f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* class NV50_CHANNEL_GPFIFO */ +#define NV50_CHANNEL_GPFIFO (0x0000506F) + +/* NvNotification[] elements */ +#define NV506F_NOTIFIERS_RC (0) +#define NV506F_NOTIFIERS_SW (1) +#define NV506F_NOTIFIERS_GR_DEBUG_INTR (2) +#define NV506F_NOTIFIERS_MAXCOUNT (3) + +/* NvNotification[] fields and values */ +#define NV506f_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NV506f_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) +/* pio method data structure */ +typedef volatile struct _cl506f_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv506fTypedef, Nv50ChannelGPFifo; +#define NV506F_TYPEDEF Nv50ChannelGPFifo +/* pio flow control data structure */ +typedef volatile struct _cl506f_tag1 { + NvU32 Ignored00[0x010]; /* 0000-0039*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 SetReference; /* set reference value 0050-0053*/ + NvU32 Ignored02[0x001]; /* 0054-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored03[0x007]; /* 0064-007f*/ + NvU32 Yield; /* engine yield, write only 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x3dc]; +} Nv506fControl, Nv50ControlGPFifo; +/* fields and values */ +#define NV506F_NUMBER_OF_SUBCHANNELS (8) +#define NV506F_SET_OBJECT (0x00000000) +#define NV506F_SET_REFERENCE (0x00000050) +#define NV506F_SET_CONTEXT_DMA_SEMAPHORE (0x00000060) +#define NV506F_SEMAPHORE_OFFSET (0x00000064) +#define NV506F_SEMAPHORE_ACQUIRE (0x00000068) +#define NV506F_SEMAPHORE_RELEASE (0x0000006c) +#define NV506F_YIELD (0x00000080) + +// +// GPFIFO entry format +// +#define NV506F_GP_ENTRY__SIZE 8 +#define NV506F_GP_ENTRY0_DISABLE 0:0 +#define NV506F_GP_ENTRY0_DISABLE_NOT 0x00000000 +#define NV506F_GP_ENTRY0_DISABLE_SKIP 0x00000001 +#define NV506F_GP_ENTRY0_NO_CONTEXT_SWITCH 1:1 +#define NV506F_GP_ENTRY0_NO_CONTEXT_SWITCH_FALSE 0x00000000 +#define NV506F_GP_ENTRY0_NO_CONTEXT_SWITCH_TRUE 0x00000001 +#define NV506F_GP_ENTRY0_GET 31:2 +#define NV506F_GP_ENTRY1_GET_HI 7:0 +#define NV506F_GP_ENTRY1_PRIV 8:8 +#define NV506F_GP_ENTRY1_PRIV_USER 0x00000000 +#define NV506F_GP_ENTRY1_PRIV_KERNEL 0x00000001 +#define NV506F_GP_ENTRY1_LEVEL 9:9 +#define NV506F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NV506F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NV506F_GP_ENTRY1_LENGTH 31:10 + +/* dma method descriptor formats */ +#define NV506F_DMA_PRIMARY_OPCODE 1:0 +#define NV506F_DMA_PRIMARY_OPCODE_USES_SECONDARY (0x00000000) +#define NV506F_DMA_PRIMARY_OPCODE_RESERVED (0x00000003) +#define NV506F_DMA_METHOD_ADDRESS 12:2 +#define NV506F_DMA_METHOD_SUBCHANNEL 15:13 +#define NV506F_DMA_TERT_OP 17:16 +#define NV506F_DMA_TERT_OP_GRP0_INC_METHOD (0x00000000) +#define NV506F_DMA_TERT_OP_GRP0_SET_SUB_DEV_MASK (0x00000001) +#define NV506F_DMA_TERT_OP_GRP0_DOUBLE_HEADER (0x00000003) +#define NV506F_DMA_TERT_OP_GRP2_NON_INC_METHOD (0x00000000) +#define NV506F_DMA_TERT_OP_GRP2_RESERVED01 (0x00000001) +#define NV506F_DMA_TERT_OP_GRP2_RESERVED10 (0x00000002) +#define NV506F_DMA_TERT_OP_GRP2_RESERVED11 (0x00000003) +#define NV506F_DMA_METHOD_COUNT 28:18 +#define NV506F_DMA_SEC_OP 31:29 +#define NV506F_DMA_SEC_OP_GRP0_USE_TERT (0x00000000) +#define NV506F_DMA_SEC_OP_GRP2_USE_TERT (0x00000002) +#define NV506F_DMA_SEC_OP_GRP3_RESERVED (0x00000003) +#define NV506F_DMA_SEC_OP_GRP4_RESERVED (0x00000004) +#define NV506F_DMA_SEC_OP_GRP5_RESERVED (0x00000005) +#define NV506F_DMA_SEC_OP_GRP6_RESERVED (0x00000006) +#define NV506F_DMA_SEC_OP_GRP7_RESERVED (0x00000007) +#define NV506F_DMA_LONG_COUNT 31:0 +/* dma legacy method descriptor format */ +#define NV506F_DMA_OPCODE2 1:0 +#define NV506F_DMA_OPCODE2_NONE (0x00000000) +#define NV506F_DMA_OPCODE 31:29 +#define NV506F_DMA_OPCODE_METHOD (0x00000000) +#define NV506F_DMA_OPCODE_NONINC_METHOD (0x00000002) +#define NV506F_DMA_OPCODE3_NONE (0x00000000) +/* dma data format */ +#define NV506F_DMA_DATA 31:0 +/* dma double header descriptor format */ +#define NV506F_DMA_DH_OPCODE2 1:0 +#define NV506F_DMA_DH_OPCODE2_NONE (0x00000000) +#define NV506F_DMA_DH_METHOD_ADDRESS 12:2 +#define NV506F_DMA_DH_METHOD_SUBCHANNEL 15:13 +#define NV506F_DMA_DH_OPCODE3 17:16 +#define NV506F_DMA_DH_OPCODE3_DOUBLE_HEADER (0x00000003) +#define NV506F_DMA_DH_OPCODE 31:29 +#define NV506F_DMA_DH_OPCODE_METHOD (0x00000000) +/* dma double header method count format */ +#define NV506F_DMA_DH_METHOD_COUNT 23:0 +/* dma double header data format */ +#define NV506F_DMA_DH_DATA 31:0 +/* dma nop format */ +#define NV506F_DMA_NOP (0x00000000) +/* dma set subdevice mask format */ +#define NV506F_DMA_SET_SUBDEVICE_MASK (0x00010000) +#define NV506F_DMA_SET_SUBDEVICE_MASK_VALUE 15:4 +#define NV506F_DMA_OPCODE3 17:16 +#define NV506F_DMA_OPCODE3_SET_SUBDEVICE_MASK (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl506f_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl5070.h b/userspace/sdks/nv570/inc/class/cl5070.h new file mode 100644 index 0000000..9d16514 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl5070.h @@ -0,0 +1,44 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl5070.finn +// + +#include "cl5070_notification.h" + +#define NV50_DISPLAY (0x5070U) /* finn: Evaluated from "NV5070_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NV5070_ALLOCATION_PARAMETERS_MESSAGE_ID (0x5070U) + +typedef struct NV5070_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numDacs; // Number of DACs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numPiors; // Number of PIORs in this chip/display +} NV5070_ALLOCATION_PARAMETERS; diff --git a/userspace/sdks/nv570/inc/class/cl5070_notification.h b/userspace/sdks/nv570/inc/class/cl5070_notification.h new file mode 100644 index 0000000..a23107d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl5070_notification.h @@ -0,0 +1,45 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl5070_notification_h_ +#define _cl5070_notification_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* event values */ +#define NV5070_NOTIFIERS_SW (0) +#define NV5070_NOTIFIERS_MAXCOUNT (1) + +#define NV5070_NOTIFICATION_STATUS_IN_PROGRESS (0x8000) +#define NV5070_NOTIFICATION_STATUS_BAD_ARGUMENT (0x4000) +#define NV5070_NOTIFICATION_STATUS_ERROR_INVALID_STATE (0x2000) +#define NV5070_NOTIFICATION_STATUS_ERROR_STATE_IN_USE (0x1000) +#define NV5070_NOTIFICATION_STATUS_DONE_SUCCESS (0x0000) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl5070_notification_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl5080.h b/userspace/sdks/nv570/inc/class/cl5080.h new file mode 100644 index 0000000..8411758 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl5080.h @@ -0,0 +1,46 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2002-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl5080.finn +// + +#include "cl5080_notification.h" + +#define NV50_DEFERRED_API_CLASS (0x5080U) /* finn: Evaluated from "NV5080_ALLOC_PARAMS_MESSAGE_ID" */ + +/* NvRmAlloc parameters */ +#define NV5080_ALLOC_PARAMS_MESSAGE_ID (0x5080U) + +typedef struct NV5080_ALLOC_PARAMS { + // Should the deferred api completion trigger an event + NvBool notifyCompletion; +} NV5080_ALLOC_PARAMS; + +// Class-specific allocation capabilities + diff --git a/userspace/sdks/nv570/inc/class/cl5080_notification.h b/userspace/sdks/nv570/inc/class/cl5080_notification.h new file mode 100644 index 0000000..170c8fb --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl5080_notification.h @@ -0,0 +1,43 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _cl5080_notification_h_ +#define _cl5080_notification_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* dma method offsets, fields, and values */ +#define NV5080_SET_OBJECT (0x00000000) +#define NV5080_NO_OPERATION (0x00000100) +#define NV5080_DEFERRED_API (0x00000200) +#define NV5080_DEFERRED_API_HANDLE 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl5080_notification_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/cl50a0.h b/userspace/sdks/nv570/inc/class/cl50a0.h new file mode 100644 index 0000000..5fec57e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl50a0.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2005, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl50a0_h_ +#define _cl50a0_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV50_MEMORY_VIRTUAL (0x000050a0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl50a0_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl83de.h b/userspace/sdks/nv570/inc/class/cl83de.h new file mode 100644 index 0000000..6491622 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl83de.h @@ -0,0 +1,56 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2010-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl83de.finn +// + +#define GT200_DEBUGGER (0x83deU) /* finn: Evaluated from "NV83DE_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* + * Creating the GT200_DEBUGGER object: + * - The debug object is instantiated as a child of either the compute or the + * 3D-class object. + * - The Cuda/GR debugger uses the NV83DE_ALLOC_PARAMETERS to fill in the Client + * and 3D-Class handles of the debuggee and passes this to the NvRmAlloc. + * e.g: + NV83DE_ALLOC_PARAMETERS params; + * memset (¶ms, 0, sizeof (NV83DE_ALLOC_PARAMETERS)); + * params.hAppClient = DebuggeeClient; + * params.hClass3dObject = 3DClassHandle; + * NvRmAlloc(hDebuggerClient, hDebuggerClient, hDebugger, GT200_DEBUGGER, ¶ms); + */ + +#define NV83DE_ALLOC_PARAMETERS_MESSAGE_ID (0x83deU) + +typedef struct NV83DE_ALLOC_PARAMETERS { + NvHandle hDebuggerClient_Obsolete; // No longer supported (must be zero) + NvHandle hAppClient; + NvHandle hClass3dObject; +} NV83DE_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl844c.h b/userspace/sdks/nv570/inc/class/cl844c.h new file mode 100644 index 0000000..c4afe5f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl844c.h @@ -0,0 +1,47 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl844c_h_ +#define _cl844c_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define G84_PERFBUFFER (0x0000844C) + +/* pio method data structure */ +typedef volatile struct _cl844c_tag0 { + NvV32 Reserved00[0x7c0]; +} G844cTypedef, G84PerfBuffer; +#define G844C_TYPEDEF G84PerfBuffer + +#define G844C_PERFBUFFER_MEMORY_HANDLE (0x844C0001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl844c_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl84a0.h b/userspace/sdks/nv570/inc/class/cl84a0.h new file mode 100644 index 0000000..a1f6d90 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl84a0.h @@ -0,0 +1,110 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl84a0.finn +// + +#include "cl84a0_deprecated.h" + +/* + * Class definitions for creating a memory descriptor from a list of page numbers + * in RmAllocMemory. No memory is allocated: only a memory descriptor and + * memory object are created for later use in other calls. These classes + * are used by vGPU to create references to memory assigned to a guest VM. + * In all cases, the list is passed as reference, in the pAddress argument + * of RmAllocMemory, to a Nv01MemoryList structure (cast to a void **). + */ + +/* List of system memory physical page numbers */ +#define NV01_MEMORY_LIST_SYSTEM (0x00000081) +/* List of frame buffer physical page numbers */ +#define NV01_MEMORY_LIST_FBMEM (0x00000082) +/* List of page numbers relative to the start of the specified object */ +#define NV01_MEMORY_LIST_OBJECT (0x00000083) + +/* + * List structure of NV01_MEMORY_LIST_* classes + * + * The pageNumber array is variable in length, with pageCount elements, + * so the allocated size of the structure must reflect that. + * + * FBMEM items apply only to NV01_MEMORY_LIST_FBMEM and to + * NV01_MEMORY_LIST_OBJECT when the underlying object is + * FBMEM (must be zero for other cases) + * + * NV_MEMORY_LIST_ALLOCATION_PARAMS - Allocation params to create memory list + * through NvRmAlloc. + */ +#define NV_MEMORY_LIST_ALLOCATION_PARAMS_MESSAGE_ID (0x84a0U) + +typedef struct NV_MEMORY_LIST_ALLOCATION_PARAMS { + NvHandle hClient; /* client to which object belongs + * (may differ from client creating the mapping). + * May be NV01_NULL_OBJECT, in which case client + * handle is used */ + NvHandle hParent; /* device with which object is associated. + * Must be NV01_NULL_OBJECT if hClient is NV01_NULL_OBJECT. + * Must not be NV01_NULL_OBJECT if hClient is + * not NV01_NULL_OBJECT. */ + NvHandle hObject; /* object to which pages are relative + * (NV01_NULL_OBJECT for NV01_MEMORY_LIST_SYSTEM + * and NV01_MEMORY_LIST_FBMEM) */ + NvHandle hHwResClient; /* client associated with the backdoor vnc surface*/ + NvHandle hHwResDevice; /* device associated to the bacdoor vnc surface*/ + NvHandle hHwResHandle; /* handle to hardware resources allocated to + * backdoor vnc surface*/ + NvU32 pteAdjust; /* offset of data in first page */ + NvU32 reserved_0; /* reserved: must be 0 */ + NvU32 type; /* FBMEM: NVOS32_TYPE_* */ + NvU32 flags; /* FBMEM: NVOS32_ALLOC_FLAGS_* */ + NvU32 attr; /* FBMEM: NVOS32_ATTR_* */ + NvU32 attr2; /* FBMEM: NVOS32_ATTR2_* */ + NvU32 height; /* FBMEM: height in pixels */ + NvU32 width; /* FBMEM: width in pixels */ + NvU32 format; /* FBMEM: memory kind */ + NvU32 comprcovg; /* FBMEM: compression coverage */ + NvU32 zcullcovg; /* FBMEM: Z-cull coverage */ + NvU32 pageCount; /* count of elements in pageNumber array */ + NvU32 heapOwner; /* heap owner information from client */ + + NV_DECLARE_ALIGNED(NvU64 guestId, 8); + /* ID of the guest VM. e.g., domain ID in case of Xen */ + NV_DECLARE_ALIGNED(NvU64 rangeBegin, 8); + /* preferred VA range start address */ + NV_DECLARE_ALIGNED(NvU64 rangeEnd, 8); + /* preferred VA range end address */ + NvU32 pitch; + NvU32 ctagOffset; + NV_DECLARE_ALIGNED(NvU64 size, 8); + NV_DECLARE_ALIGNED(NvU64 align, 8); + NV_DECLARE_ALIGNED(NvP64 pageNumberList, 8); + NV_DECLARE_ALIGNED(NvU64 limit, 8); + NvU32 flagsOs02; +} NV_MEMORY_LIST_ALLOCATION_PARAMS; + diff --git a/userspace/sdks/nv570/inc/class/cl84a0_deprecated.h b/userspace/sdks/nv570/inc/class/cl84a0_deprecated.h new file mode 100644 index 0000000..f1e7f0c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl84a0_deprecated.h @@ -0,0 +1,90 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl84a0_deprecated_h_ +#define _cl84a0_deprecated_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * List structure of NV01_MEMORY_LIST_* classes + * + * The pageNumber array is variable in length, with pageCount elements, + * so the allocated size of the structure must reflect that. + * + * FBMEM items apply only to NV01_MEMORY_LIST_FBMEM and to + * NV01_MEMORY_LIST_OBJECT when the underlying object is + * FBMEM (must be zero for other cases) + * + * Nv01MemoryList is deprecated. NV_MEMORY_LIST_ALLOCATION_PARAMS should be used + * instead. + */ +typedef struct Nv01MemoryListRec { + NvHandle hClient; /* client to which object belongs + * (may differ from client creating the mapping). + * May be NV01_NULL_OBJECT, in which case client + * handle is used */ + NvHandle hParent; /* device with which object is associated. + * Must be NV01_NULL_OBJECT if hClient is NV01_NULL_OBJECT. + * Must not be NV01_NULL_OBJECT if hClient is + * not NV01_NULL_OBJECT. */ + NvHandle hObject; /* object to which pages are relative + * (NV01_NULL_OBJECT for NV01_MEMORY_LIST_SYSTEM + * and NV01_MEMORY_LIST_FBMEM) */ + NvHandle hHwResClient;/* client associated with the backdoor vnc surface*/ + NvHandle hHwResDevice;/* device associated to the bacdoor vnc surface*/ + NvHandle hHwResHandle;/* handle to hardware resources allocated to + * backdoor vnc surface*/ + NvU32 pteAdjust; /* offset of data in first page */ + NvU32 type; /* FBMEM: NVOS32_TYPE_* */ + NvU32 flags; /* FBMEM: NVOS32_ALLOC_FLAGS_* */ + NvU32 attr; /* FBMEM: NVOS32_ATTR_* */ + NvU32 attr2; /* FBMEM: NVOS32_ATTR2_* */ + NvU32 height; /* FBMEM: height in pixels */ + NvU32 width; /* FBMEM: width in pixels */ + NvU32 format; /* FBMEM: memory kind */ + NvU32 comprcovg; /* FBMEM: compression coverage */ + NvU32 zcullcovg; /* FBMEM: Z-cull coverage */ + NvU32 pageCount; /* count of elements in pageNumber array */ + NvU32 heapOwner; /* heap owner information from client */ + NvU32 reserved_1; /* reserved: must be 0 */ + NvU64 NV_DECLARE_ALIGNED(guestId,8); + /* ID of the guest VM. e.g., domain ID in case of Xen */ + NvU64 NV_DECLARE_ALIGNED(rangeBegin,8); + /* preferred VA range start address */ + NvU64 NV_DECLARE_ALIGNED(rangeEnd,8); + /* preferred VA range end address */ + NvU32 pitch; + NvU32 ctagOffset; + NvU64 size; + NvU64 align; + NvU64 pageNumber[1]; /* variable length array of page numbers */ +} Nv01MemoryList; + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl84a0_deprecated_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl85b5sw.h b/userspace/sdks/nv570/inc/class/cl85b5sw.h new file mode 100644 index 0000000..b741d52 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl85b5sw.h @@ -0,0 +1,38 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl85b5sw.finn +// + +#define NV85B5_ALLOCATION_PARAMETERS_MESSAGE_ID (0x85b5U) + +typedef struct NV85B5_ALLOCATION_PARAMETERS { + NvU32 version; // set to 0 + NvU32 engineInstance; // CE instance +} NV85B5_ALLOCATION_PARAMETERS; diff --git a/userspace/sdks/nv570/inc/class/cl900e.h b/userspace/sdks/nv570/inc/class/cl900e.h new file mode 100644 index 0000000..6684889 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl900e.h @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl900e_h_ +#define _cl900e_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define MPS_COMPUTE (0x0000900E) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl900e_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/cl9010.h b/userspace/sdks/nv570/inc/class/cl9010.h new file mode 100644 index 0000000..ad901c7 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9010.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl9010.finn +// + +#include "class/cl9010_callback.h" + +#define NV9010_VBLANK_CALLBACK (0x9010U) /* finn: Evaluated from "NV_VBLANK_CALLBACK_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NV_VBLANK_CALLBACK_ALLOCATION_PARAMETERS_MESSAGE_ID (0x9010U) + +typedef struct NV_VBLANK_CALLBACK_ALLOCATION_PARAMETERS { + NV_DECLARE_ALIGNED(NvP64 pProc, 8); // Routine to call at vblank time + // A function pointer of OSVBLANKCALLBACKPROC + NvV32 LogicalHead; // Logical Head + NV_DECLARE_ALIGNED(NvP64 pParm1, 8); // pParm1 + NV_DECLARE_ALIGNED(NvP64 pParm2, 8); // pParm2 +} NV_VBLANK_CALLBACK_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl9010_callback.h b/userspace/sdks/nv570/inc/class/cl9010_callback.h new file mode 100644 index 0000000..1945b68 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9010_callback.h @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef SDK_CL9010_CALLBACK_H +#define SDK_CL9010_CALLBACK_H + +typedef void (*OSVBLANKCALLBACKPROC)(NvP64 pParm1, NvP64 pParm2); + +#endif // SDK_CL9010_CALLBACK_H diff --git a/userspace/sdks/nv570/inc/class/cl902d.h b/userspace/sdks/nv570/inc/class/cl902d.h new file mode 100644 index 0000000..38bd5cf --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl902d.h @@ -0,0 +1,1092 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_fermi_twod_a_h_ +#define _cl_fermi_twod_a_h_ + +#define FERMI_TWOD_A 0x902D + +typedef volatile struct fermi_twod_a_struct { + NvU32 SetObject; + NvU32 Reserved_0x04[0x3F]; + NvU32 NoOperation; + NvU32 SetNotifyA; + NvU32 SetNotifyB; + NvU32 Notify; + NvU32 WaitForIdle; + NvU32 LoadMmeInstructionRamPointer; + NvU32 LoadMmeInstructionRam; + NvU32 LoadMmeStartAddressRamPointer; + NvU32 LoadMmeStartAddressRam; + NvU32 SetMmeShadowRamControl; + NvU32 Reserved_0x128[0x2]; + NvU32 SetGlobalRenderEnableA; + NvU32 SetGlobalRenderEnableB; + NvU32 SetGlobalRenderEnableC; + NvU32 SendGoIdle; + NvU32 PmTrigger; + NvU32 Reserved_0x144[0x3]; + NvU32 SetInstrumentationMethodHeader; + NvU32 SetInstrumentationMethodData; + NvU32 Reserved_0x158[0x25]; + NvU32 SetMmeSwitchState; + NvU32 Reserved_0x1F0[0x4]; + NvU32 SetDstFormat; + NvU32 SetDstMemoryLayout; + NvU32 SetDstBlockSize; + NvU32 SetDstDepth; + NvU32 SetDstLayer; + NvU32 SetDstPitch; + NvU32 SetDstWidth; + NvU32 SetDstHeight; + NvU32 SetDstOffsetUpper; + NvU32 SetDstOffsetLower; + NvU32 FlushAndInvalidateRopMiniCache; + NvU32 SetSpareNoop06; + NvU32 SetSrcFormat; + NvU32 SetSrcMemoryLayout; + NvU32 SetSrcBlockSize; + NvU32 SetSrcDepth; + NvU32 TwodInvalidateTextureDataCache; + NvU32 SetSrcPitch; + NvU32 SetSrcWidth; + NvU32 SetSrcHeight; + NvU32 SetSrcOffsetUpper; + NvU32 SetSrcOffsetLower; + NvU32 SetPixelsFromMemorySectorPromotion; + NvU32 SetSpareNoop12; + NvU32 SetNumProcessingClusters; + NvU32 SetRenderEnableA; + NvU32 SetRenderEnableB; + NvU32 SetRenderEnableC; + NvU32 SetSpareNoop08; + NvU32 SetSpareNoop01; + NvU32 SetSpareNoop11; + NvU32 SetSpareNoop07; + NvU32 SetClipX0; + NvU32 SetClipY0; + NvU32 SetClipWidth; + NvU32 SetClipHeight; + NvU32 SetClipEnable; + NvU32 SetColorKeyFormat; + NvU32 SetColorKey; + NvU32 SetColorKeyEnable; + NvU32 SetRop; + NvU32 SetBeta1; + NvU32 SetBeta4; + NvU32 SetOperation; + NvU32 SetPatternOffset; + NvU32 SetPatternSelect; + NvU32 SetDstColorRenderToZetaSurface; + NvU32 SetSpareNoop04; + NvU32 SetSpareNoop15; + NvU32 SetSpareNoop13; + NvU32 SetSpareNoop03; + NvU32 SetSpareNoop14; + NvU32 SetSpareNoop02; + NvU32 SetCompression; + NvU32 SetSpareNoop09; + NvU32 SetRenderEnableOverride; + NvU32 SetPixelsFromMemoryDirection; + NvU32 SetSpareNoop10; + NvU32 SetMonochromePatternColorFormat; + NvU32 SetMonochromePatternFormat; + NvU32 SetMonochromePatternColor0; + NvU32 SetMonochromePatternColor1; + NvU32 SetMonochromePattern0; + NvU32 SetMonochromePattern1; + NvU32 ColorPatternX8R8G8B8[0x40]; + NvU32 ColorPatternR5G6B5[0x20]; + NvU32 ColorPatternX1R5G5B5[0x20]; + NvU32 ColorPatternY8[0x10]; + NvU32 SetRenderSolidPrimColor0; + NvU32 SetRenderSolidPrimColor1; + NvU32 SetRenderSolidPrimColor2; + NvU32 SetRenderSolidPrimColor3; + NvU32 SetMmeMemAddressA; + NvU32 SetMmeMemAddressB; + NvU32 SetMmeDataRamAddress; + NvU32 MmeDmaRead; + NvU32 MmeDmaReadFifoed; + NvU32 MmeDmaWrite; + NvU32 MmeDmaReduction; + NvU32 MmeDmaSysmembar; + NvU32 MmeDmaSync; + NvU32 SetMmeDataFifoConfig; + NvU32 Reserved_0x578[0x2]; + NvU32 RenderSolidPrimMode; + NvU32 SetRenderSolidPrimColorFormat; + NvU32 SetRenderSolidPrimColor; + NvU32 SetRenderSolidLineTieBreakBits; + NvU32 Reserved_0x590[0x14]; + NvU32 RenderSolidPrimPointXY; + NvU32 Reserved_0x5E4[0x7]; + struct { + NvU32 SetX; + NvU32 Y; + } RenderSolidPrimPoint[0x40]; + NvU32 SetPixelsFromCpuDataType; + NvU32 SetPixelsFromCpuColorFormat; + NvU32 SetPixelsFromCpuIndexFormat; + NvU32 SetPixelsFromCpuMonoFormat; + NvU32 SetPixelsFromCpuWrap; + NvU32 SetPixelsFromCpuColor0; + NvU32 SetPixelsFromCpuColor1; + NvU32 SetPixelsFromCpuMonoOpacity; + NvU32 Reserved_0x820[0x6]; + NvU32 SetPixelsFromCpuSrcWidth; + NvU32 SetPixelsFromCpuSrcHeight; + NvU32 SetPixelsFromCpuDxDuFrac; + NvU32 SetPixelsFromCpuDxDuInt; + NvU32 SetPixelsFromCpuDyDvFrac; + NvU32 SetPixelsFromCpuDyDvInt; + NvU32 SetPixelsFromCpuDstX0Frac; + NvU32 SetPixelsFromCpuDstX0Int; + NvU32 SetPixelsFromCpuDstY0Frac; + NvU32 SetPixelsFromCpuDstY0Int; + NvU32 PixelsFromCpuData; + NvU32 Reserved_0x864[0x3]; + NvU32 SetBigEndianControl; + NvU32 Reserved_0x874[0x3]; + NvU32 SetPixelsFromMemoryBlockShape; + NvU32 SetPixelsFromMemoryCorralSize; + NvU32 SetPixelsFromMemorySafeOverlap; + NvU32 SetPixelsFromMemorySampleMode; + NvU32 Reserved_0x890[0x8]; + NvU32 SetPixelsFromMemoryDstX0; + NvU32 SetPixelsFromMemoryDstY0; + NvU32 SetPixelsFromMemoryDstWidth; + NvU32 SetPixelsFromMemoryDstHeight; + NvU32 SetPixelsFromMemoryDuDxFrac; + NvU32 SetPixelsFromMemoryDuDxInt; + NvU32 SetPixelsFromMemoryDvDyFrac; + NvU32 SetPixelsFromMemoryDvDyInt; + NvU32 SetPixelsFromMemorySrcX0Frac; + NvU32 SetPixelsFromMemorySrcX0Int; + NvU32 SetPixelsFromMemorySrcY0Frac; + NvU32 PixelsFromMemorySrcY0Int; + NvU32 SetFalcon00; + NvU32 SetFalcon01; + NvU32 SetFalcon02; + NvU32 SetFalcon03; + NvU32 SetFalcon04; + NvU32 SetFalcon05; + NvU32 SetFalcon06; + NvU32 SetFalcon07; + NvU32 SetFalcon08; + NvU32 SetFalcon09; + NvU32 SetFalcon10; + NvU32 SetFalcon11; + NvU32 SetFalcon12; + NvU32 SetFalcon13; + NvU32 SetFalcon14; + NvU32 SetFalcon15; + NvU32 SetFalcon16; + NvU32 SetFalcon17; + NvU32 SetFalcon18; + NvU32 SetFalcon19; + NvU32 SetFalcon20; + NvU32 SetFalcon21; + NvU32 SetFalcon22; + NvU32 SetFalcon23; + NvU32 SetFalcon24; + NvU32 SetFalcon25; + NvU32 SetFalcon26; + NvU32 SetFalcon27; + NvU32 SetFalcon28; + NvU32 SetFalcon29; + NvU32 SetFalcon30; + NvU32 SetFalcon31; + NvU32 Reserved_0x960[0x123]; + NvU32 MmeDmaWriteMethodBarrier; + NvU32 Reserved_0xDF0[0x984]; + NvU32 SetMmeShadowScratch[0x100]; + struct { + NvU32 Macro; + NvU32 Data; + } CallMme[0xE0]; +} fermi_twod_a_t; + + +#define NV902D_SET_OBJECT 0x0000 +#define NV902D_SET_OBJECT_CLASS_ID 15:0 +#define NV902D_SET_OBJECT_ENGINE_ID 20:16 + +#define NV902D_NO_OPERATION 0x0100 +#define NV902D_NO_OPERATION_V 31:0 + +#define NV902D_SET_NOTIFY_A 0x0104 +#define NV902D_SET_NOTIFY_A_ADDRESS_UPPER 24:0 + +#define NV902D_SET_NOTIFY_B 0x0108 +#define NV902D_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NV902D_NOTIFY 0x010c +#define NV902D_NOTIFY_TYPE 31:0 +#define NV902D_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NV902D_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NV902D_WAIT_FOR_IDLE 0x0110 +#define NV902D_WAIT_FOR_IDLE_V 31:0 + +#define NV902D_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NV902D_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NV902D_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NV902D_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NV902D_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NV902D_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NV902D_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NV902D_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NV902D_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NV902D_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NV902D_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NV902D_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NV902D_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NV902D_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NV902D_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NV902D_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NV902D_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NV902D_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NV902D_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NV902D_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NV902D_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NV902D_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NV902D_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NV902D_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NV902D_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NV902D_SEND_GO_IDLE 0x013c +#define NV902D_SEND_GO_IDLE_V 31:0 + +#define NV902D_PM_TRIGGER 0x0140 +#define NV902D_PM_TRIGGER_V 31:0 + +#define NV902D_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NV902D_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NV902D_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NV902D_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NV902D_SET_MME_SWITCH_STATE 0x01ec +#define NV902D_SET_MME_SWITCH_STATE_VALID 0:0 +#define NV902D_SET_MME_SWITCH_STATE_VALID_FALSE 0x00000000 +#define NV902D_SET_MME_SWITCH_STATE_VALID_TRUE 0x00000001 +#define NV902D_SET_MME_SWITCH_STATE_SAVE_MACRO 11:4 +#define NV902D_SET_MME_SWITCH_STATE_RESTORE_MACRO 19:12 + +#define NV902D_SET_DST_FORMAT 0x0200 +#define NV902D_SET_DST_FORMAT_V 7:0 +#define NV902D_SET_DST_FORMAT_V_A8R8G8B8 0x000000CF +#define NV902D_SET_DST_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NV902D_SET_DST_FORMAT_V_A2R10G10B10 0x000000DF +#define NV902D_SET_DST_FORMAT_V_A8B8G8R8 0x000000D5 +#define NV902D_SET_DST_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NV902D_SET_DST_FORMAT_V_A2B10G10R10 0x000000D1 +#define NV902D_SET_DST_FORMAT_V_X8R8G8B8 0x000000E6 +#define NV902D_SET_DST_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NV902D_SET_DST_FORMAT_V_X8B8G8R8 0x000000F9 +#define NV902D_SET_DST_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NV902D_SET_DST_FORMAT_V_R5G6B5 0x000000E8 +#define NV902D_SET_DST_FORMAT_V_A1R5G5B5 0x000000E9 +#define NV902D_SET_DST_FORMAT_V_X1R5G5B5 0x000000F8 +#define NV902D_SET_DST_FORMAT_V_Y8 0x000000F3 +#define NV902D_SET_DST_FORMAT_V_Y16 0x000000EE +#define NV902D_SET_DST_FORMAT_V_Y32 0x000000FF +#define NV902D_SET_DST_FORMAT_V_Z1R5G5B5 0x000000FB +#define NV902D_SET_DST_FORMAT_V_O1R5G5B5 0x000000FC +#define NV902D_SET_DST_FORMAT_V_Z8R8G8B8 0x000000FD +#define NV902D_SET_DST_FORMAT_V_O8R8G8B8 0x000000FE +#define NV902D_SET_DST_FORMAT_V_Y1_8X8 0x0000001C +#define NV902D_SET_DST_FORMAT_V_RF16 0x000000F2 +#define NV902D_SET_DST_FORMAT_V_RF32 0x000000E5 +#define NV902D_SET_DST_FORMAT_V_RF32_GF32 0x000000CB +#define NV902D_SET_DST_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NV902D_SET_DST_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NV902D_SET_DST_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NV902D_SET_DST_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NV902D_SET_DST_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NV902D_SET_DST_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NV902D_SET_DST_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NV902D_SET_DST_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NV902D_SET_DST_FORMAT_V_RF16_GF16 0x000000DE +#define NV902D_SET_DST_FORMAT_V_R16_G16 0x000000DA +#define NV902D_SET_DST_FORMAT_V_RN16_GN16 0x000000DB +#define NV902D_SET_DST_FORMAT_V_G8R8 0x000000EA +#define NV902D_SET_DST_FORMAT_V_GN8RN8 0x000000EB +#define NV902D_SET_DST_FORMAT_V_RN16 0x000000EF +#define NV902D_SET_DST_FORMAT_V_RN8 0x000000F4 +#define NV902D_SET_DST_FORMAT_V_A8 0x000000F7 + +#define NV902D_SET_DST_MEMORY_LAYOUT 0x0204 +#define NV902D_SET_DST_MEMORY_LAYOUT_V 0:0 +#define NV902D_SET_DST_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000 +#define NV902D_SET_DST_MEMORY_LAYOUT_V_PITCH 0x00000001 + +#define NV902D_SET_DST_BLOCK_SIZE 0x0208 +#define NV902D_SET_DST_BLOCK_SIZE_HEIGHT 6:4 +#define NV902D_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NV902D_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NV902D_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NV902D_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NV902D_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NV902D_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NV902D_SET_DST_BLOCK_SIZE_DEPTH 10:8 +#define NV902D_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NV902D_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NV902D_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NV902D_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NV902D_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NV902D_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NV902D_SET_DST_DEPTH 0x020c +#define NV902D_SET_DST_DEPTH_V 31:0 + +#define NV902D_SET_DST_LAYER 0x0210 +#define NV902D_SET_DST_LAYER_V 31:0 + +#define NV902D_SET_DST_PITCH 0x0214 +#define NV902D_SET_DST_PITCH_V 31:0 + +#define NV902D_SET_DST_WIDTH 0x0218 +#define NV902D_SET_DST_WIDTH_V 31:0 + +#define NV902D_SET_DST_HEIGHT 0x021c +#define NV902D_SET_DST_HEIGHT_V 31:0 + +#define NV902D_SET_DST_OFFSET_UPPER 0x0220 +#define NV902D_SET_DST_OFFSET_UPPER_V 7:0 + +#define NV902D_SET_DST_OFFSET_LOWER 0x0224 +#define NV902D_SET_DST_OFFSET_LOWER_V 31:0 + +#define NV902D_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x0228 +#define NV902D_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NV902D_SET_SPARE_NOOP06 0x022c +#define NV902D_SET_SPARE_NOOP06_V 31:0 + +#define NV902D_SET_SRC_FORMAT 0x0230 +#define NV902D_SET_SRC_FORMAT_V 7:0 +#define NV902D_SET_SRC_FORMAT_V_A8R8G8B8 0x000000CF +#define NV902D_SET_SRC_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NV902D_SET_SRC_FORMAT_V_A2R10G10B10 0x000000DF +#define NV902D_SET_SRC_FORMAT_V_A8B8G8R8 0x000000D5 +#define NV902D_SET_SRC_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NV902D_SET_SRC_FORMAT_V_A2B10G10R10 0x000000D1 +#define NV902D_SET_SRC_FORMAT_V_X8R8G8B8 0x000000E6 +#define NV902D_SET_SRC_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NV902D_SET_SRC_FORMAT_V_X8B8G8R8 0x000000F9 +#define NV902D_SET_SRC_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NV902D_SET_SRC_FORMAT_V_R5G6B5 0x000000E8 +#define NV902D_SET_SRC_FORMAT_V_A1R5G5B5 0x000000E9 +#define NV902D_SET_SRC_FORMAT_V_X1R5G5B5 0x000000F8 +#define NV902D_SET_SRC_FORMAT_V_Y8 0x000000F3 +#define NV902D_SET_SRC_FORMAT_V_AY8 0x0000001D +#define NV902D_SET_SRC_FORMAT_V_Y16 0x000000EE +#define NV902D_SET_SRC_FORMAT_V_Y32 0x000000FF +#define NV902D_SET_SRC_FORMAT_V_Z1R5G5B5 0x000000FB +#define NV902D_SET_SRC_FORMAT_V_O1R5G5B5 0x000000FC +#define NV902D_SET_SRC_FORMAT_V_Z8R8G8B8 0x000000FD +#define NV902D_SET_SRC_FORMAT_V_O8R8G8B8 0x000000FE +#define NV902D_SET_SRC_FORMAT_V_Y1_8X8 0x0000001C +#define NV902D_SET_SRC_FORMAT_V_RF16 0x000000F2 +#define NV902D_SET_SRC_FORMAT_V_RF32 0x000000E5 +#define NV902D_SET_SRC_FORMAT_V_RF32_GF32 0x000000CB +#define NV902D_SET_SRC_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NV902D_SET_SRC_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NV902D_SET_SRC_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NV902D_SET_SRC_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NV902D_SET_SRC_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NV902D_SET_SRC_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NV902D_SET_SRC_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NV902D_SET_SRC_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NV902D_SET_SRC_FORMAT_V_RF16_GF16 0x000000DE +#define NV902D_SET_SRC_FORMAT_V_R16_G16 0x000000DA +#define NV902D_SET_SRC_FORMAT_V_RN16_GN16 0x000000DB +#define NV902D_SET_SRC_FORMAT_V_G8R8 0x000000EA +#define NV902D_SET_SRC_FORMAT_V_GN8RN8 0x000000EB +#define NV902D_SET_SRC_FORMAT_V_RN16 0x000000EF +#define NV902D_SET_SRC_FORMAT_V_RN8 0x000000F4 +#define NV902D_SET_SRC_FORMAT_V_A8 0x000000F7 + +#define NV902D_SET_SRC_MEMORY_LAYOUT 0x0234 +#define NV902D_SET_SRC_MEMORY_LAYOUT_V 0:0 +#define NV902D_SET_SRC_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000 +#define NV902D_SET_SRC_MEMORY_LAYOUT_V_PITCH 0x00000001 + +#define NV902D_SET_SRC_BLOCK_SIZE 0x0238 +#define NV902D_SET_SRC_BLOCK_SIZE_HEIGHT 6:4 +#define NV902D_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NV902D_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NV902D_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NV902D_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NV902D_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NV902D_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NV902D_SET_SRC_BLOCK_SIZE_DEPTH 10:8 +#define NV902D_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NV902D_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NV902D_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NV902D_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NV902D_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NV902D_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NV902D_SET_SRC_DEPTH 0x023c +#define NV902D_SET_SRC_DEPTH_V 31:0 + +#define NV902D_TWOD_INVALIDATE_TEXTURE_DATA_CACHE 0x0240 +#define NV902D_TWOD_INVALIDATE_TEXTURE_DATA_CACHE_V 1:0 +#define NV902D_TWOD_INVALIDATE_TEXTURE_DATA_CACHE_V_L1_ONLY 0x00000000 +#define NV902D_TWOD_INVALIDATE_TEXTURE_DATA_CACHE_V_L2_ONLY 0x00000001 +#define NV902D_TWOD_INVALIDATE_TEXTURE_DATA_CACHE_V_L1_AND_L2 0x00000002 + +#define NV902D_SET_SRC_PITCH 0x0244 +#define NV902D_SET_SRC_PITCH_V 31:0 + +#define NV902D_SET_SRC_WIDTH 0x0248 +#define NV902D_SET_SRC_WIDTH_V 31:0 + +#define NV902D_SET_SRC_HEIGHT 0x024c +#define NV902D_SET_SRC_HEIGHT_V 31:0 + +#define NV902D_SET_SRC_OFFSET_UPPER 0x0250 +#define NV902D_SET_SRC_OFFSET_UPPER_V 7:0 + +#define NV902D_SET_SRC_OFFSET_LOWER 0x0254 +#define NV902D_SET_SRC_OFFSET_LOWER_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_SECTOR_PROMOTION 0x0258 +#define NV902D_SET_PIXELS_FROM_MEMORY_SECTOR_PROMOTION_V 1:0 +#define NV902D_SET_PIXELS_FROM_MEMORY_SECTOR_PROMOTION_V_NO_PROMOTION 0x00000000 +#define NV902D_SET_PIXELS_FROM_MEMORY_SECTOR_PROMOTION_V_PROMOTE_TO_2_V 0x00000001 +#define NV902D_SET_PIXELS_FROM_MEMORY_SECTOR_PROMOTION_V_PROMOTE_TO_2_H 0x00000002 +#define NV902D_SET_PIXELS_FROM_MEMORY_SECTOR_PROMOTION_V_PROMOTE_TO_4 0x00000003 + +#define NV902D_SET_SPARE_NOOP12 0x025c +#define NV902D_SET_SPARE_NOOP12_V 31:0 + +#define NV902D_SET_NUM_PROCESSING_CLUSTERS 0x0260 +#define NV902D_SET_NUM_PROCESSING_CLUSTERS_V 0:0 +#define NV902D_SET_NUM_PROCESSING_CLUSTERS_V_ALL 0x00000000 +#define NV902D_SET_NUM_PROCESSING_CLUSTERS_V_ONE 0x00000001 + +#define NV902D_SET_RENDER_ENABLE_A 0x0264 +#define NV902D_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NV902D_SET_RENDER_ENABLE_B 0x0268 +#define NV902D_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NV902D_SET_RENDER_ENABLE_C 0x026c +#define NV902D_SET_RENDER_ENABLE_C_MODE 2:0 +#define NV902D_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NV902D_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NV902D_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NV902D_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NV902D_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NV902D_SET_SPARE_NOOP08 0x0270 +#define NV902D_SET_SPARE_NOOP08_V 31:0 + +#define NV902D_SET_SPARE_NOOP01 0x0274 +#define NV902D_SET_SPARE_NOOP01_V 31:0 + +#define NV902D_SET_SPARE_NOOP11 0x0278 +#define NV902D_SET_SPARE_NOOP11_V 31:0 + +#define NV902D_SET_SPARE_NOOP07 0x027c +#define NV902D_SET_SPARE_NOOP07_V 31:0 + +#define NV902D_SET_CLIP_X0 0x0280 +#define NV902D_SET_CLIP_X0_V 31:0 + +#define NV902D_SET_CLIP_Y0 0x0284 +#define NV902D_SET_CLIP_Y0_V 31:0 + +#define NV902D_SET_CLIP_WIDTH 0x0288 +#define NV902D_SET_CLIP_WIDTH_V 31:0 + +#define NV902D_SET_CLIP_HEIGHT 0x028c +#define NV902D_SET_CLIP_HEIGHT_V 31:0 + +#define NV902D_SET_CLIP_ENABLE 0x0290 +#define NV902D_SET_CLIP_ENABLE_V 0:0 +#define NV902D_SET_CLIP_ENABLE_V_FALSE 0x00000000 +#define NV902D_SET_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NV902D_SET_COLOR_KEY_FORMAT 0x0294 +#define NV902D_SET_COLOR_KEY_FORMAT_V 2:0 +#define NV902D_SET_COLOR_KEY_FORMAT_V_A16R5G6B5 0x00000000 +#define NV902D_SET_COLOR_KEY_FORMAT_V_A1R5G5B5 0x00000001 +#define NV902D_SET_COLOR_KEY_FORMAT_V_A8R8G8B8 0x00000002 +#define NV902D_SET_COLOR_KEY_FORMAT_V_A2R10G10B10 0x00000003 +#define NV902D_SET_COLOR_KEY_FORMAT_V_Y8 0x00000004 +#define NV902D_SET_COLOR_KEY_FORMAT_V_Y16 0x00000005 +#define NV902D_SET_COLOR_KEY_FORMAT_V_Y32 0x00000006 + +#define NV902D_SET_COLOR_KEY 0x0298 +#define NV902D_SET_COLOR_KEY_V 31:0 + +#define NV902D_SET_COLOR_KEY_ENABLE 0x029c +#define NV902D_SET_COLOR_KEY_ENABLE_V 0:0 +#define NV902D_SET_COLOR_KEY_ENABLE_V_FALSE 0x00000000 +#define NV902D_SET_COLOR_KEY_ENABLE_V_TRUE 0x00000001 + +#define NV902D_SET_ROP 0x02a0 +#define NV902D_SET_ROP_V 7:0 + +#define NV902D_SET_BETA1 0x02a4 +#define NV902D_SET_BETA1_V 31:0 + +#define NV902D_SET_BETA4 0x02a8 +#define NV902D_SET_BETA4_B 7:0 +#define NV902D_SET_BETA4_G 15:8 +#define NV902D_SET_BETA4_R 23:16 +#define NV902D_SET_BETA4_A 31:24 + +#define NV902D_SET_OPERATION 0x02ac +#define NV902D_SET_OPERATION_V 2:0 +#define NV902D_SET_OPERATION_V_SRCCOPY_AND 0x00000000 +#define NV902D_SET_OPERATION_V_ROP_AND 0x00000001 +#define NV902D_SET_OPERATION_V_BLEND_AND 0x00000002 +#define NV902D_SET_OPERATION_V_SRCCOPY 0x00000003 +#define NV902D_SET_OPERATION_V_ROP 0x00000004 +#define NV902D_SET_OPERATION_V_SRCCOPY_PREMULT 0x00000005 +#define NV902D_SET_OPERATION_V_BLEND_PREMULT 0x00000006 + +#define NV902D_SET_PATTERN_OFFSET 0x02b0 +#define NV902D_SET_PATTERN_OFFSET_X 5:0 +#define NV902D_SET_PATTERN_OFFSET_Y 13:8 + +#define NV902D_SET_PATTERN_SELECT 0x02b4 +#define NV902D_SET_PATTERN_SELECT_V 1:0 +#define NV902D_SET_PATTERN_SELECT_V_MONOCHROME_8x8 0x00000000 +#define NV902D_SET_PATTERN_SELECT_V_MONOCHROME_64x1 0x00000001 +#define NV902D_SET_PATTERN_SELECT_V_MONOCHROME_1x64 0x00000002 +#define NV902D_SET_PATTERN_SELECT_V_COLOR 0x00000003 + +#define NV902D_SET_DST_COLOR_RENDER_TO_ZETA_SURFACE 0x02b8 +#define NV902D_SET_DST_COLOR_RENDER_TO_ZETA_SURFACE_V 0:0 +#define NV902D_SET_DST_COLOR_RENDER_TO_ZETA_SURFACE_V_FALSE 0x00000000 +#define NV902D_SET_DST_COLOR_RENDER_TO_ZETA_SURFACE_V_TRUE 0x00000001 + +#define NV902D_SET_SPARE_NOOP04 0x02bc +#define NV902D_SET_SPARE_NOOP04_V 31:0 + +#define NV902D_SET_SPARE_NOOP15 0x02c0 +#define NV902D_SET_SPARE_NOOP15_V 31:0 + +#define NV902D_SET_SPARE_NOOP13 0x02c4 +#define NV902D_SET_SPARE_NOOP13_V 31:0 + +#define NV902D_SET_SPARE_NOOP03 0x02c8 +#define NV902D_SET_SPARE_NOOP03_V 31:0 + +#define NV902D_SET_SPARE_NOOP14 0x02cc +#define NV902D_SET_SPARE_NOOP14_V 31:0 + +#define NV902D_SET_SPARE_NOOP02 0x02d0 +#define NV902D_SET_SPARE_NOOP02_V 31:0 + +#define NV902D_SET_COMPRESSION 0x02d4 +#define NV902D_SET_COMPRESSION_ENABLE 0:0 +#define NV902D_SET_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NV902D_SET_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NV902D_SET_SPARE_NOOP09 0x02d8 +#define NV902D_SET_SPARE_NOOP09_V 31:0 + +#define NV902D_SET_RENDER_ENABLE_OVERRIDE 0x02dc +#define NV902D_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NV902D_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NV902D_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NV902D_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NV902D_SET_PIXELS_FROM_MEMORY_DIRECTION 0x02e0 +#define NV902D_SET_PIXELS_FROM_MEMORY_DIRECTION_HORIZONTAL 1:0 +#define NV902D_SET_PIXELS_FROM_MEMORY_DIRECTION_HORIZONTAL_HW_DECIDES 0x00000000 +#define NV902D_SET_PIXELS_FROM_MEMORY_DIRECTION_HORIZONTAL_LEFT_TO_RIGHT 0x00000001 +#define NV902D_SET_PIXELS_FROM_MEMORY_DIRECTION_HORIZONTAL_RIGHT_TO_LEFT 0x00000002 +#define NV902D_SET_PIXELS_FROM_MEMORY_DIRECTION_VERTICAL 5:4 +#define NV902D_SET_PIXELS_FROM_MEMORY_DIRECTION_VERTICAL_HW_DECIDES 0x00000000 +#define NV902D_SET_PIXELS_FROM_MEMORY_DIRECTION_VERTICAL_TOP_TO_BOTTOM 0x00000001 +#define NV902D_SET_PIXELS_FROM_MEMORY_DIRECTION_VERTICAL_BOTTOM_TO_TOP 0x00000002 + +#define NV902D_SET_SPARE_NOOP10 0x02e4 +#define NV902D_SET_SPARE_NOOP10_V 31:0 + +#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT 0x02e8 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V 2:0 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8X8R5G6B5 0x00000000 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A1R5G5B5 0x00000001 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8R8G8B8 0x00000002 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8Y8 0x00000003 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8X8Y16 0x00000004 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_Y32 0x00000005 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_BYTE_EXPAND 0x00000006 + +#define NV902D_SET_MONOCHROME_PATTERN_FORMAT 0x02ec +#define NV902D_SET_MONOCHROME_PATTERN_FORMAT_V 0:0 +#define NV902D_SET_MONOCHROME_PATTERN_FORMAT_V_CGA6_M1 0x00000000 +#define NV902D_SET_MONOCHROME_PATTERN_FORMAT_V_LE_M1 0x00000001 + +#define NV902D_SET_MONOCHROME_PATTERN_COLOR0 0x02f0 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR0_V 31:0 + +#define NV902D_SET_MONOCHROME_PATTERN_COLOR1 0x02f4 +#define NV902D_SET_MONOCHROME_PATTERN_COLOR1_V 31:0 + +#define NV902D_SET_MONOCHROME_PATTERN0 0x02f8 +#define NV902D_SET_MONOCHROME_PATTERN0_V 31:0 + +#define NV902D_SET_MONOCHROME_PATTERN1 0x02fc +#define NV902D_SET_MONOCHROME_PATTERN1_V 31:0 + +#define NV902D_COLOR_PATTERN_X8R8G8B8(i) (0x0300+(i)*4) +#define NV902D_COLOR_PATTERN_X8R8G8B8_B0 7:0 +#define NV902D_COLOR_PATTERN_X8R8G8B8_G0 15:8 +#define NV902D_COLOR_PATTERN_X8R8G8B8_R0 23:16 +#define NV902D_COLOR_PATTERN_X8R8G8B8_IGNORE0 31:24 + +#define NV902D_COLOR_PATTERN_R5G6B5(i) (0x0400+(i)*4) +#define NV902D_COLOR_PATTERN_R5G6B5_B0 4:0 +#define NV902D_COLOR_PATTERN_R5G6B5_G0 10:5 +#define NV902D_COLOR_PATTERN_R5G6B5_R0 15:11 +#define NV902D_COLOR_PATTERN_R5G6B5_B1 20:16 +#define NV902D_COLOR_PATTERN_R5G6B5_G1 26:21 +#define NV902D_COLOR_PATTERN_R5G6B5_R1 31:27 + +#define NV902D_COLOR_PATTERN_X1R5G5B5(i) (0x0480+(i)*4) +#define NV902D_COLOR_PATTERN_X1R5G5B5_B0 4:0 +#define NV902D_COLOR_PATTERN_X1R5G5B5_G0 9:5 +#define NV902D_COLOR_PATTERN_X1R5G5B5_R0 14:10 +#define NV902D_COLOR_PATTERN_X1R5G5B5_IGNORE0 15:15 +#define NV902D_COLOR_PATTERN_X1R5G5B5_B1 20:16 +#define NV902D_COLOR_PATTERN_X1R5G5B5_G1 25:21 +#define NV902D_COLOR_PATTERN_X1R5G5B5_R1 30:26 +#define NV902D_COLOR_PATTERN_X1R5G5B5_IGNORE1 31:31 + +#define NV902D_COLOR_PATTERN_Y8(i) (0x0500+(i)*4) +#define NV902D_COLOR_PATTERN_Y8_Y0 7:0 +#define NV902D_COLOR_PATTERN_Y8_Y1 15:8 +#define NV902D_COLOR_PATTERN_Y8_Y2 23:16 +#define NV902D_COLOR_PATTERN_Y8_Y3 31:24 + +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR0 0x0540 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR0_V 31:0 + +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR1 0x0544 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR1_V 31:0 + +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR2 0x0548 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR2_V 31:0 + +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR3 0x054c +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR3_V 31:0 + +#define NV902D_SET_MME_MEM_ADDRESS_A 0x0550 +#define NV902D_SET_MME_MEM_ADDRESS_A_UPPER 24:0 + +#define NV902D_SET_MME_MEM_ADDRESS_B 0x0554 +#define NV902D_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NV902D_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NV902D_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NV902D_MME_DMA_READ 0x055c +#define NV902D_MME_DMA_READ_LENGTH 31:0 + +#define NV902D_MME_DMA_READ_FIFOED 0x0560 +#define NV902D_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NV902D_MME_DMA_WRITE 0x0564 +#define NV902D_MME_DMA_WRITE_LENGTH 31:0 + +#define NV902D_MME_DMA_REDUCTION 0x0568 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NV902D_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NV902D_MME_DMA_SYSMEMBAR 0x056c +#define NV902D_MME_DMA_SYSMEMBAR_V 0:0 + +#define NV902D_MME_DMA_SYNC 0x0570 +#define NV902D_MME_DMA_SYNC_VALUE 31:0 + +#define NV902D_SET_MME_DATA_FIFO_CONFIG 0x0574 +#define NV902D_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 +#define NV902D_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 +#define NV902D_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 +#define NV902D_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 +#define NV902D_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 +#define NV902D_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 + +#define NV902D_RENDER_SOLID_PRIM_MODE 0x0580 +#define NV902D_RENDER_SOLID_PRIM_MODE_V 2:0 +#define NV902D_RENDER_SOLID_PRIM_MODE_V_POINTS 0x00000000 +#define NV902D_RENDER_SOLID_PRIM_MODE_V_LINES 0x00000001 +#define NV902D_RENDER_SOLID_PRIM_MODE_V_POLYLINE 0x00000002 +#define NV902D_RENDER_SOLID_PRIM_MODE_V_TRIANGLES 0x00000003 +#define NV902D_RENDER_SOLID_PRIM_MODE_V_RECTS 0x00000004 + +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT 0x0584 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V 7:0 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_RF32_GF32 0x000000CB +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A8R8G8B8 0x000000CF +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A2R10G10B10 0x000000DF +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A8B8G8R8 0x000000D5 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A2B10G10R10 0x000000D1 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_X8R8G8B8 0x000000E6 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_X8B8G8R8 0x000000F9 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_R5G6B5 0x000000E8 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A1R5G5B5 0x000000E9 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_X1R5G5B5 0x000000F8 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Y8 0x000000F3 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Y16 0x000000EE +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Y32 0x000000FF +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Z1R5G5B5 0x000000FB +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_O1R5G5B5 0x000000FC +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Z8R8G8B8 0x000000FD +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_O8R8G8B8 0x000000FE + +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR 0x0588 +#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_V 31:0 + +#define NV902D_SET_RENDER_SOLID_LINE_TIE_BREAK_BITS 0x058c +#define NV902D_SET_RENDER_SOLID_LINE_TIE_BREAK_BITS_XMAJ__XINC__YINC 0:0 +#define NV902D_SET_RENDER_SOLID_LINE_TIE_BREAK_BITS_XMAJ__XDEC__YINC 4:4 +#define NV902D_SET_RENDER_SOLID_LINE_TIE_BREAK_BITS_YMAJ__XINC__YINC 8:8 +#define NV902D_SET_RENDER_SOLID_LINE_TIE_BREAK_BITS_YMAJ__XDEC__YINC 12:12 + +#define NV902D_RENDER_SOLID_PRIM_POINT_X_Y 0x05e0 +#define NV902D_RENDER_SOLID_PRIM_POINT_X_Y_X 15:0 +#define NV902D_RENDER_SOLID_PRIM_POINT_X_Y_Y 31:16 + +#define NV902D_RENDER_SOLID_PRIM_POINT_SET_X(j) (0x0600+(j)*8) +#define NV902D_RENDER_SOLID_PRIM_POINT_SET_X_V 31:0 + +#define NV902D_RENDER_SOLID_PRIM_POINT_Y(j) (0x0604+(j)*8) +#define NV902D_RENDER_SOLID_PRIM_POINT_Y_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_DATA_TYPE 0x0800 +#define NV902D_SET_PIXELS_FROM_CPU_DATA_TYPE_V 0:0 +#define NV902D_SET_PIXELS_FROM_CPU_DATA_TYPE_V_COLOR 0x00000000 +#define NV902D_SET_PIXELS_FROM_CPU_DATA_TYPE_V_INDEX 0x00000001 + +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT 0x0804 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V 7:0 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A8R8G8B8 0x000000CF +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A2R10G10B10 0x000000DF +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A8B8G8R8 0x000000D5 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A2B10G10R10 0x000000D1 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_X8R8G8B8 0x000000E6 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_X8B8G8R8 0x000000F9 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_R5G6B5 0x000000E8 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A1R5G5B5 0x000000E9 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_X1R5G5B5 0x000000F8 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Y8 0x000000F3 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Y16 0x000000EE +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Y32 0x000000FF +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Z1R5G5B5 0x000000FB +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_O1R5G5B5 0x000000FC +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Z8R8G8B8 0x000000FD +#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_O8R8G8B8 0x000000FE + +#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT 0x0808 +#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V 1:0 +#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V_I1 0x00000000 +#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V_I4 0x00000001 +#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V_I8 0x00000002 + +#define NV902D_SET_PIXELS_FROM_CPU_MONO_FORMAT 0x080c +#define NV902D_SET_PIXELS_FROM_CPU_MONO_FORMAT_V 0:0 +#define NV902D_SET_PIXELS_FROM_CPU_MONO_FORMAT_V_CGA6_M1 0x00000000 +#define NV902D_SET_PIXELS_FROM_CPU_MONO_FORMAT_V_LE_M1 0x00000001 + +#define NV902D_SET_PIXELS_FROM_CPU_WRAP 0x0810 +#define NV902D_SET_PIXELS_FROM_CPU_WRAP_V 1:0 +#define NV902D_SET_PIXELS_FROM_CPU_WRAP_V_WRAP_PIXEL 0x00000000 +#define NV902D_SET_PIXELS_FROM_CPU_WRAP_V_WRAP_BYTE 0x00000001 +#define NV902D_SET_PIXELS_FROM_CPU_WRAP_V_WRAP_DWORD 0x00000002 + +#define NV902D_SET_PIXELS_FROM_CPU_COLOR0 0x0814 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR0_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_COLOR1 0x0818 +#define NV902D_SET_PIXELS_FROM_CPU_COLOR1_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_MONO_OPACITY 0x081c +#define NV902D_SET_PIXELS_FROM_CPU_MONO_OPACITY_V 0:0 +#define NV902D_SET_PIXELS_FROM_CPU_MONO_OPACITY_V_TRANSPARENT 0x00000000 +#define NV902D_SET_PIXELS_FROM_CPU_MONO_OPACITY_V_OPAQUE 0x00000001 + +#define NV902D_SET_PIXELS_FROM_CPU_SRC_WIDTH 0x0838 +#define NV902D_SET_PIXELS_FROM_CPU_SRC_WIDTH_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_SRC_HEIGHT 0x083c +#define NV902D_SET_PIXELS_FROM_CPU_SRC_HEIGHT_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_DX_DU_FRAC 0x0840 +#define NV902D_SET_PIXELS_FROM_CPU_DX_DU_FRAC_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_DX_DU_INT 0x0844 +#define NV902D_SET_PIXELS_FROM_CPU_DX_DU_INT_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_DY_DV_FRAC 0x0848 +#define NV902D_SET_PIXELS_FROM_CPU_DY_DV_FRAC_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_DY_DV_INT 0x084c +#define NV902D_SET_PIXELS_FROM_CPU_DY_DV_INT_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_DST_X0_FRAC 0x0850 +#define NV902D_SET_PIXELS_FROM_CPU_DST_X0_FRAC_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_DST_X0_INT 0x0854 +#define NV902D_SET_PIXELS_FROM_CPU_DST_X0_INT_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_DST_Y0_FRAC 0x0858 +#define NV902D_SET_PIXELS_FROM_CPU_DST_Y0_FRAC_V 31:0 + +#define NV902D_SET_PIXELS_FROM_CPU_DST_Y0_INT 0x085c +#define NV902D_SET_PIXELS_FROM_CPU_DST_Y0_INT_V 31:0 + +#define NV902D_PIXELS_FROM_CPU_DATA 0x0860 +#define NV902D_PIXELS_FROM_CPU_DATA_V 31:0 + +#define NV902D_SET_BIG_ENDIAN_CONTROL 0x0870 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X32_SWAP_1 0:0 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X32_SWAP_4 1:1 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X32_SWAP_8 2:2 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X32_SWAP_16 3:3 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X16_SWAP_1 4:4 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X16_SWAP_4 5:5 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X16_SWAP_8 6:6 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X16_SWAP_16 7:7 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X8_SWAP_1 8:8 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X8_SWAP_4 9:9 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X8_SWAP_8 10:10 +#define NV902D_SET_BIG_ENDIAN_CONTROL_X8_SWAP_16 11:11 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I1_X8_CGA6_SWAP_1 12:12 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I1_X8_CGA6_SWAP_4 13:13 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I1_X8_CGA6_SWAP_8 14:14 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I1_X8_CGA6_SWAP_16 15:15 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I1_X8_LE_SWAP_1 16:16 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I1_X8_LE_SWAP_4 17:17 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I1_X8_LE_SWAP_8 18:18 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I1_X8_LE_SWAP_16 19:19 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I4_SWAP_1 20:20 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I4_SWAP_4 21:21 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I4_SWAP_8 22:22 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I4_SWAP_16 23:23 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I8_SWAP_1 24:24 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I8_SWAP_4 25:25 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I8_SWAP_8 26:26 +#define NV902D_SET_BIG_ENDIAN_CONTROL_I8_SWAP_16 27:27 +#define NV902D_SET_BIG_ENDIAN_CONTROL_OVERRIDE 28:28 + +#define NV902D_SET_PIXELS_FROM_MEMORY_BLOCK_SHAPE 0x0880 +#define NV902D_SET_PIXELS_FROM_MEMORY_BLOCK_SHAPE_V 2:0 +#define NV902D_SET_PIXELS_FROM_MEMORY_BLOCK_SHAPE_V_AUTO 0x00000000 +#define NV902D_SET_PIXELS_FROM_MEMORY_BLOCK_SHAPE_V_SHAPE_8X8 0x00000001 +#define NV902D_SET_PIXELS_FROM_MEMORY_BLOCK_SHAPE_V_SHAPE_16X4 0x00000002 + +#define NV902D_SET_PIXELS_FROM_MEMORY_CORRAL_SIZE 0x0884 +#define NV902D_SET_PIXELS_FROM_MEMORY_CORRAL_SIZE_V 9:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP 0x0888 +#define NV902D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP_V 0:0 +#define NV902D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP_V_FALSE 0x00000000 +#define NV902D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP_V_TRUE 0x00000001 + +#define NV902D_SET_PIXELS_FROM_MEMORY_SAMPLE_MODE 0x088c +#define NV902D_SET_PIXELS_FROM_MEMORY_SAMPLE_MODE_ORIGIN 0:0 +#define NV902D_SET_PIXELS_FROM_MEMORY_SAMPLE_MODE_ORIGIN_CENTER 0x00000000 +#define NV902D_SET_PIXELS_FROM_MEMORY_SAMPLE_MODE_ORIGIN_CORNER 0x00000001 +#define NV902D_SET_PIXELS_FROM_MEMORY_SAMPLE_MODE_FILTER 4:4 +#define NV902D_SET_PIXELS_FROM_MEMORY_SAMPLE_MODE_FILTER_POINT 0x00000000 +#define NV902D_SET_PIXELS_FROM_MEMORY_SAMPLE_MODE_FILTER_BILINEAR 0x00000001 + +#define NV902D_SET_PIXELS_FROM_MEMORY_DST_X0 0x08b0 +#define NV902D_SET_PIXELS_FROM_MEMORY_DST_X0_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_DST_Y0 0x08b4 +#define NV902D_SET_PIXELS_FROM_MEMORY_DST_Y0_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_DST_WIDTH 0x08b8 +#define NV902D_SET_PIXELS_FROM_MEMORY_DST_WIDTH_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_DST_HEIGHT 0x08bc +#define NV902D_SET_PIXELS_FROM_MEMORY_DST_HEIGHT_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_FRAC 0x08c0 +#define NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_FRAC_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_INT 0x08c4 +#define NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_INT_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_FRAC 0x08c8 +#define NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_FRAC_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_INT 0x08cc +#define NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_INT_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC 0x08d0 +#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_INT 0x08d4 +#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_INT_V 31:0 + +#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC 0x08d8 +#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC_V 31:0 + +#define NV902D_PIXELS_FROM_MEMORY_SRC_Y0_INT 0x08dc +#define NV902D_PIXELS_FROM_MEMORY_SRC_Y0_INT_V 31:0 + +#define NV902D_SET_FALCON00 0x08e0 +#define NV902D_SET_FALCON00_V 31:0 + +#define NV902D_SET_FALCON01 0x08e4 +#define NV902D_SET_FALCON01_V 31:0 + +#define NV902D_SET_FALCON02 0x08e8 +#define NV902D_SET_FALCON02_V 31:0 + +#define NV902D_SET_FALCON03 0x08ec +#define NV902D_SET_FALCON03_V 31:0 + +#define NV902D_SET_FALCON04 0x08f0 +#define NV902D_SET_FALCON04_V 31:0 + +#define NV902D_SET_FALCON05 0x08f4 +#define NV902D_SET_FALCON05_V 31:0 + +#define NV902D_SET_FALCON06 0x08f8 +#define NV902D_SET_FALCON06_V 31:0 + +#define NV902D_SET_FALCON07 0x08fc +#define NV902D_SET_FALCON07_V 31:0 + +#define NV902D_SET_FALCON08 0x0900 +#define NV902D_SET_FALCON08_V 31:0 + +#define NV902D_SET_FALCON09 0x0904 +#define NV902D_SET_FALCON09_V 31:0 + +#define NV902D_SET_FALCON10 0x0908 +#define NV902D_SET_FALCON10_V 31:0 + +#define NV902D_SET_FALCON11 0x090c +#define NV902D_SET_FALCON11_V 31:0 + +#define NV902D_SET_FALCON12 0x0910 +#define NV902D_SET_FALCON12_V 31:0 + +#define NV902D_SET_FALCON13 0x0914 +#define NV902D_SET_FALCON13_V 31:0 + +#define NV902D_SET_FALCON14 0x0918 +#define NV902D_SET_FALCON14_V 31:0 + +#define NV902D_SET_FALCON15 0x091c +#define NV902D_SET_FALCON15_V 31:0 + +#define NV902D_SET_FALCON16 0x0920 +#define NV902D_SET_FALCON16_V 31:0 + +#define NV902D_SET_FALCON17 0x0924 +#define NV902D_SET_FALCON17_V 31:0 + +#define NV902D_SET_FALCON18 0x0928 +#define NV902D_SET_FALCON18_V 31:0 + +#define NV902D_SET_FALCON19 0x092c +#define NV902D_SET_FALCON19_V 31:0 + +#define NV902D_SET_FALCON20 0x0930 +#define NV902D_SET_FALCON20_V 31:0 + +#define NV902D_SET_FALCON21 0x0934 +#define NV902D_SET_FALCON21_V 31:0 + +#define NV902D_SET_FALCON22 0x0938 +#define NV902D_SET_FALCON22_V 31:0 + +#define NV902D_SET_FALCON23 0x093c +#define NV902D_SET_FALCON23_V 31:0 + +#define NV902D_SET_FALCON24 0x0940 +#define NV902D_SET_FALCON24_V 31:0 + +#define NV902D_SET_FALCON25 0x0944 +#define NV902D_SET_FALCON25_V 31:0 + +#define NV902D_SET_FALCON26 0x0948 +#define NV902D_SET_FALCON26_V 31:0 + +#define NV902D_SET_FALCON27 0x094c +#define NV902D_SET_FALCON27_V 31:0 + +#define NV902D_SET_FALCON28 0x0950 +#define NV902D_SET_FALCON28_V 31:0 + +#define NV902D_SET_FALCON29 0x0954 +#define NV902D_SET_FALCON29_V 31:0 + +#define NV902D_SET_FALCON30 0x0958 +#define NV902D_SET_FALCON30_V 31:0 + +#define NV902D_SET_FALCON31 0x095c +#define NV902D_SET_FALCON31_V 31:0 + +#define NV902D_MME_DMA_WRITE_METHOD_BARRIER 0x0dec +#define NV902D_MME_DMA_WRITE_METHOD_BARRIER_V 0:0 + +#define NV902D_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NV902D_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NV902D_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NV902D_CALL_MME_MACRO_V 31:0 + +#define NV902D_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NV902D_CALL_MME_DATA_V 31:0 + +#endif /* _cl_fermi_twod_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl9067.h b/userspace/sdks/nv570/inc/class/cl9067.h new file mode 100644 index 0000000..5355f18 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9067.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2010-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _cl9067_h_ +#define _cl9067_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define FERMI_CONTEXT_SHARE_A (0x00009067) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cl9067_h + diff --git a/userspace/sdks/nv570/inc/class/cl906f.h b/userspace/sdks/nv570/inc/class/cl906f.h new file mode 100644 index 0000000..b20d8ff --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl906f.h @@ -0,0 +1,242 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl906f_h_ +#define _cl906f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* class GF100_CHANNEL_GPFIFO */ +/* + * Documentation for GF100_CHANNEL_GPFIFO can be found in dev_pbdma.ref, + * chapter "User Control Registers". It is documented as device NV_UDMA. + * The GPFIFO format itself is also documented in dev_pbdma.ref, + * NV_PPBDMA_GP_ENTRY_*. The pushbuffer format is documented in dev_ram.ref, + * chapter "FIFO DMA RAM", NV_FIFO_DMA_*. + * + */ +#define GF100_CHANNEL_GPFIFO (0x0000906F) + +/* pio method data structure */ +typedef volatile struct _cl906f_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv906fTypedef, GF100ChannelGPFifo; +#define NV906F_TYPEDEF GF100ChannelGPFifo +/* dma flow control data structure */ +typedef volatile struct _cl906f_tag1 { + NvU32 Ignored00[0x010]; /* 0000-0043*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 SetReferenceThreshold; /* set reference value threshold 0050-0053*/ + NvU32 Ignored01[0x001]; /* 0054-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored02[0x007]; /* 0064-007f*/ + NvU32 Ignored03; /* used to be engine yield 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x3dc]; +} Nv906fControl, GF100ControlGPFifo; +/* fields and values */ +#define NV906F_NUMBER_OF_SUBCHANNELS (8) +#define NV906F_SET_OBJECT (0x00000000) +#define NV906F_SET_OBJECT_NVCLASS 15:0 +#define NV906F_SET_OBJECT_ENGINE 20:16 +#define NV906F_SET_OBJECT_ENGINE_SW 0x0000001f +#define NV906F_ILLEGAL (0x00000004) +#define NV906F_ILLEGAL_HANDLE 31:0 +#define NV906F_NOP (0x00000008) +#define NV906F_NOP_HANDLE 31:0 +#define NV906F_SEMAPHOREA (0x00000010) +#define NV906F_SEMAPHOREA_OFFSET_UPPER 7:0 +#define NV906F_SEMAPHOREB (0x00000014) +#define NV906F_SEMAPHOREB_OFFSET_LOWER 31:2 +#define NV906F_SEMAPHOREC (0x00000018) +#define NV906F_SEMAPHOREC_PAYLOAD 31:0 +#define NV906F_SEMAPHORED (0x0000001C) +#define NV906F_SEMAPHORED_OPERATION 3:0 +#define NV906F_SEMAPHORED_OPERATION_ACQUIRE 0x00000001 +#define NV906F_SEMAPHORED_OPERATION_RELEASE 0x00000002 +#define NV906F_SEMAPHORED_OPERATION_ACQ_GEQ 0x00000004 +#define NV906F_SEMAPHORED_OPERATION_ACQ_AND 0x00000008 +#define NV906F_SEMAPHORED_ACQUIRE_SWITCH 12:12 +#define NV906F_SEMAPHORED_ACQUIRE_SWITCH_DISABLED 0x00000000 +#define NV906F_SEMAPHORED_ACQUIRE_SWITCH_ENABLED 0x00000001 +#define NV906F_SEMAPHORED_RELEASE_WFI 20:20 +#define NV906F_SEMAPHORED_RELEASE_WFI_EN 0x00000000 +#define NV906F_SEMAPHORED_RELEASE_WFI_DIS 0x00000001 +#define NV906F_SEMAPHORED_RELEASE_SIZE 24:24 +#define NV906F_SEMAPHORED_RELEASE_SIZE_16BYTE 0x00000000 +#define NV906F_SEMAPHORED_RELEASE_SIZE_4BYTE 0x00000001 +#define NV906F_NON_STALL_INTERRUPT (0x00000020) +#define NV906F_NON_STALL_INTERRUPT_HANDLE 31:0 +#define NV906F_FB_FLUSH (0x00000024) +#define NV906F_FB_FLUSH_HANDLE 31:0 +#define NV906F_MEM_OP_A (0x00000028) +#define NV906F_MEM_OP_A_OPERAND_LOW 31:2 +#define NV906F_MEM_OP_A_TLB_INVALIDATE_ADDR 29:2 +#define NV906F_MEM_OP_A_TLB_INVALIDATE_TARGET 31:30 +#define NV906F_MEM_OP_A_TLB_INVALIDATE_TARGET_VID_MEM 0x00000000 +#define NV906F_MEM_OP_A_TLB_INVALIDATE_TARGET_SYS_MEM_COHERENT 0x00000002 +#define NV906F_MEM_OP_A_TLB_INVALIDATE_TARGET_SYS_MEM_NONCOHERENT 0x00000003 +#define NV906F_MEM_OP_B (0x0000002c) +#define NV906F_MEM_OP_B_OPERAND_HIGH 7:0 +#define NV906F_MEM_OP_B_OPERATION 31:27 +#define NV906F_MEM_OP_B_OPERATION_SYSMEMBAR_FLUSH 0x00000005 +#define NV906F_MEM_OP_B_OPERATION_SOFT_FLUSH 0x00000006 +#define NV906F_MEM_OP_B_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NV906F_MEM_OP_B_OPERATION_L2_PEERMEM_INVALIDATE 0x0000000d +#define NV906F_MEM_OP_B_OPERATION_L2_SYSMEM_INVALIDATE 0x0000000e +#define NV906F_MEM_OP_B_OPERATION_L2_CLEAN_COMPTAGS 0x0000000f +#define NV906F_MEM_OP_B_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NV906F_MEM_OP_B_MMU_TLB_INVALIDATE_PDB 0:0 +#define NV906F_MEM_OP_B_MMU_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NV906F_MEM_OP_B_MMU_TLB_INVALIDATE_PDB_ALL 0x00000001 +#define NV906F_MEM_OP_B_MMU_TLB_INVALIDATE_GPC 1:1 +#define NV906F_MEM_OP_B_MMU_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NV906F_MEM_OP_B_MMU_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NV906F_SET_REFERENCE (0x00000050) +#define NV906F_SET_REFERENCE_COUNT 31:0 +#define NV906F_CRC_CHECK (0x0000007c) +#define NV906F_CRC_CHECK_VALUE 31:0 +#define NV906F_YIELD (0x00000080) +#define NV906F_YIELD_OP 1:0 +#define NV906F_YIELD_OP_NOP 0x00000000 + +/* GPFIFO entry format */ +#define NV906F_GP_ENTRY__SIZE 8 +#define NV906F_GP_ENTRY0_FETCH 0:0 +#define NV906F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NV906F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NV906F_GP_ENTRY0_NO_CONTEXT_SWITCH 1:1 +#define NV906F_GP_ENTRY0_NO_CONTEXT_SWITCH_FALSE 0x00000000 +#define NV906F_GP_ENTRY0_NO_CONTEXT_SWITCH_TRUE 0x00000001 +#define NV906F_GP_ENTRY0_GET 31:2 +#define NV906F_GP_ENTRY0_OPERAND 31:0 +#define NV906F_GP_ENTRY1_GET_HI 7:0 +#define NV906F_GP_ENTRY1_PRIV 8:8 +#define NV906F_GP_ENTRY1_PRIV_USER 0x00000000 +#define NV906F_GP_ENTRY1_PRIV_KERNEL 0x00000001 +#define NV906F_GP_ENTRY1_LEVEL 9:9 +#define NV906F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NV906F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NV906F_GP_ENTRY1_LENGTH 30:10 +#define NV906F_GP_ENTRY1_SYNC 31:31 +#define NV906F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NV906F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NV906F_GP_ENTRY1_OPCODE 7:0 +#define NV906F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NV906F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NV906F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NV906F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 + +/* dma method formats */ +#define NV906F_DMA_METHOD_ADDRESS_OLD 12:2 +#define NV906F_DMA_METHOD_ADDRESS 11:0 +#define NV906F_DMA_SUBDEVICE_MASK 15:4 +#define NV906F_DMA_METHOD_SUBCHANNEL 15:13 +#define NV906F_DMA_TERT_OP 17:16 +#define NV906F_DMA_TERT_OP_GRP0_INC_METHOD (0x00000000) +#define NV906F_DMA_TERT_OP_GRP0_SET_SUB_DEV_MASK (0x00000001) +#define NV906F_DMA_TERT_OP_GRP0_STORE_SUB_DEV_MASK (0x00000002) +#define NV906F_DMA_TERT_OP_GRP0_USE_SUB_DEV_MASK (0x00000003) +#define NV906F_DMA_TERT_OP_GRP2_NON_INC_METHOD (0x00000000) +#define NV906F_DMA_METHOD_COUNT_OLD 28:18 +#define NV906F_DMA_METHOD_COUNT 28:16 +#define NV906F_DMA_IMMD_DATA 28:16 +#define NV906F_DMA_SEC_OP 31:29 +#define NV906F_DMA_SEC_OP_GRP0_USE_TERT (0x00000000) +#define NV906F_DMA_SEC_OP_INC_METHOD (0x00000001) +#define NV906F_DMA_SEC_OP_GRP2_USE_TERT (0x00000002) +#define NV906F_DMA_SEC_OP_NON_INC_METHOD (0x00000003) +#define NV906F_DMA_SEC_OP_IMMD_DATA_METHOD (0x00000004) +#define NV906F_DMA_SEC_OP_ONE_INC (0x00000005) +#define NV906F_DMA_SEC_OP_RESERVED6 (0x00000006) +#define NV906F_DMA_SEC_OP_END_PB_SEGMENT (0x00000007) +/* dma incrementing method format */ +#define NV906F_DMA_INCR_ADDRESS 11:0 +#define NV906F_DMA_INCR_SUBCHANNEL 15:13 +#define NV906F_DMA_INCR_COUNT 28:16 +#define NV906F_DMA_INCR_OPCODE 31:29 +#define NV906F_DMA_INCR_OPCODE_VALUE (0x00000001) +#define NV906F_DMA_INCR_DATA 31:0 +/* dma non-incrementing method format */ +#define NV906F_DMA_NONINCR_ADDRESS 11:0 +#define NV906F_DMA_NONINCR_SUBCHANNEL 15:13 +#define NV906F_DMA_NONINCR_COUNT 28:16 +#define NV906F_DMA_NONINCR_OPCODE 31:29 +#define NV906F_DMA_NONINCR_OPCODE_VALUE (0x00000003) +#define NV906F_DMA_NONINCR_DATA 31:0 +/* dma increment-once method format */ +#define NV906F_DMA_ONEINCR_ADDRESS 11:0 +#define NV906F_DMA_ONEINCR_SUBCHANNEL 15:13 +#define NV906F_DMA_ONEINCR_COUNT 28:16 +#define NV906F_DMA_ONEINCR_OPCODE 31:29 +#define NV906F_DMA_ONEINCR_OPCODE_VALUE (0x00000005) +#define NV906F_DMA_ONEINCR_DATA 31:0 +/* dma no-operation format */ +#define NV906F_DMA_NOP (0x00000000) +/* dma immediate-data format */ +#define NV906F_DMA_IMMD_ADDRESS 11:0 +#define NV906F_DMA_IMMD_SUBCHANNEL 15:13 +#define NV906F_DMA_IMMD_DATA 28:16 +#define NV906F_DMA_IMMD_OPCODE 31:29 +#define NV906F_DMA_IMMD_OPCODE_VALUE (0x00000004) +/* dma set sub-device mask format */ +#define NV906F_DMA_SET_SUBDEVICE_MASK_VALUE 15:4 +#define NV906F_DMA_SET_SUBDEVICE_MASK_OPCODE 31:16 +#define NV906F_DMA_SET_SUBDEVICE_MASK_OPCODE_VALUE (0x00000001) +/* dma store sub-device mask format */ +#define NV906F_DMA_STORE_SUBDEVICE_MASK_VALUE 15:4 +#define NV906F_DMA_STORE_SUBDEVICE_MASK_OPCODE 31:16 +#define NV906F_DMA_STORE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000002) +/* dma use sub-device mask format */ +#define NV906F_DMA_USE_SUBDEVICE_MASK_OPCODE 31:16 +#define NV906F_DMA_USE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000003) +/* dma end-segment format */ +#define NV906F_DMA_ENDSEG_OPCODE 31:29 +#define NV906F_DMA_ENDSEG_OPCODE_VALUE (0x00000007) +/* dma legacy incrementing/non-incrementing formats */ +#define NV906F_DMA_ADDRESS 12:2 +#define NV906F_DMA_SUBCH 15:13 +#define NV906F_DMA_OPCODE3 17:16 +#define NV906F_DMA_OPCODE3_NONE (0x00000000) +#define NV906F_DMA_COUNT 28:18 +#define NV906F_DMA_OPCODE 31:29 +#define NV906F_DMA_OPCODE_METHOD (0x00000000) +#define NV906F_DMA_OPCODE_NONINC_METHOD (0x00000002) +#define NV906F_DMA_DATA 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl906f_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl906fsw.h b/userspace/sdks/nv570/inc/class/cl906fsw.h new file mode 100644 index 0000000..465a91a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl906fsw.h @@ -0,0 +1,42 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl906f_sw_h_ +#define _cl906f_sw_h_ + +/* NvNotification[] elements */ +#define NV906F_NOTIFIERS_RC (0) +#define NV906F_NOTIFIERS_REFCNT (1) +#define NV906F_NOTIFIERS_NONSTALL (2) +#define NV906F_NOTIFIERS_EVENTBUFFER (3) +#define NV906F_NOTIFIERS_IDLECHANNEL (4) +#define NV906F_NOTIFIERS_ENDCTX (5) +#define NV906F_NOTIFIERS_SW (6) +#define NV906F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NV906F_NOTIFIERS_MAXCOUNT (8) + +/* NvNotification[] fields and values */ +#define NV906f_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NV906f_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _cl906f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl9072.h b/userspace/sdks/nv570/inc/class/cl9072.h new file mode 100644 index 0000000..0d13a8a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9072.h @@ -0,0 +1,46 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2008-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl9072.finn +// + +#include "cl9072_notification.h" + +#define GF100_DISP_SW (0x9072U) /* finn: Evaluated from "NV9072_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NV9072_ALLOCATION_PARAMETERS_MESSAGE_ID (0x9072U) + +typedef struct NV9072_ALLOCATION_PARAMETERS { + NvU32 logicalHeadId; + /* + * 0 implies use Head argument only (i.e. whatever is currently setup on this head) + */ + NvU32 displayMask; + NvU32 caps; +} NV9072_ALLOCATION_PARAMETERS; diff --git a/userspace/sdks/nv570/inc/class/cl9072_notification.h b/userspace/sdks/nv570/inc/class/cl9072_notification.h new file mode 100644 index 0000000..21b48f8 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9072_notification.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _cl9072_notification_h_ +#define _cl9072_notification_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NV9072_NOTIFIERS_NOTIFY_ON_VBLANK (9) +#define NV9072_NOTIFICATION_STATUS_DONE_SUCCESS (0x0000) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl9072_notification_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl9074.h b/userspace/sdks/nv570/inc/class/cl9074.h new file mode 100644 index 0000000..60436ba --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9074.h @@ -0,0 +1,51 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2009-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl9074_h_ +#define _cl9074_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define GF100_TIMED_SEMAPHORE_SW (0x00009074) + +/* NvNotification[] fields and values */ +#define NV9074_NOTIFICATION_STATUS_PENDING (0x8000) +#define NV9074_NOTIFICATION_STATUS_DONE_FLUSHED (0x0001) +#define NV9074_NOTIFICATION_STATUS_DONE (0x0000) + +#define NV9074_SET_NOTIFIER_HI_V 7:0 + +#define NV9074_SET_SEMAPHORE_HI_V 7:0 + +#define NV9074_SCHEDULE_SEMAPHORE_RELEASE_NOTIFY 1:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl9074_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/cl9096.h b/userspace/sdks/nv570/inc/class/cl9096.h new file mode 100644 index 0000000..559216d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9096.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2007-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl9096_h_ +#define _cl9096_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define GF100_ZBC_CLEAR (0x00009096) +#define NV9096_TYPEDEF GF100ZBCClear + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl9096_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl9097.h b/userspace/sdks/nv570/inc/class/cl9097.h new file mode 100644 index 0000000..8bc7792 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9097.h @@ -0,0 +1,3815 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_fermi_a_h_ +#define _cl_fermi_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../class/bin/sw_header.pl fermi_a */ + +#include "nvtypes.h" + +#define FERMI_A 0x9097 + +#define NV9097_SET_OBJECT 0x0000 +#define NV9097_SET_OBJECT_CLASS_ID 15:0 +#define NV9097_SET_OBJECT_ENGINE_ID 20:16 + +#define NV9097_NO_OPERATION 0x0100 +#define NV9097_NO_OPERATION_V 31:0 + +#define NV9097_SET_NOTIFY_A 0x0104 +#define NV9097_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NV9097_SET_NOTIFY_B 0x0108 +#define NV9097_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NV9097_NOTIFY 0x010c +#define NV9097_NOTIFY_TYPE 31:0 +#define NV9097_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NV9097_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NV9097_WAIT_FOR_IDLE 0x0110 +#define NV9097_WAIT_FOR_IDLE_V 31:0 + +#define NV9097_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NV9097_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NV9097_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NV9097_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NV9097_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NV9097_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NV9097_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NV9097_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NV9097_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NV9097_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NV9097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NV9097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NV9097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NV9097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NV9097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NV9097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NV9097_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NV9097_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NV9097_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NV9097_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NV9097_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NV9097_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NV9097_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NV9097_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NV9097_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NV9097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NV9097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NV9097_SEND_GO_IDLE 0x013c +#define NV9097_SEND_GO_IDLE_V 31:0 + +#define NV9097_PM_TRIGGER 0x0140 +#define NV9097_PM_TRIGGER_V 31:0 + +#define NV9097_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NV9097_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NV9097_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NV9097_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NV9097_RUN_DS_NOW 0x0200 +#define NV9097_RUN_DS_NOW_V 31:0 + +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NV9097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NV9097_SET_RASTER_PIPE_SYNC_CONTROL 0x0208 +#define NV9097_SET_RASTER_PIPE_SYNC_CONTROL_PRIM_AREA_THRESHOLD 21:0 +#define NV9097_SET_RASTER_PIPE_SYNC_CONTROL_ENABLE 24:24 +#define NV9097_SET_RASTER_PIPE_SYNC_CONTROL_ENABLE_FALSE 0x00000000 +#define NV9097_SET_RASTER_PIPE_SYNC_CONTROL_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NV9097_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NV9097_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NV9097_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NV9097_SET_API_MANDATED_EARLY_Z 0x0210 +#define NV9097_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NV9097_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NV9097_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_GS_DM_FIFO 0x0214 +#define NV9097_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NV9097_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NV9097_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NV9097_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NV9097_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NV9097_INVALIDATE_SHADER_CACHES 0x021c +#define NV9097_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NV9097_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NV9097_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NV9097_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NV9097_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NV9097_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NV9097_INVALIDATE_SHADER_CACHES_UNIFORM 8:8 +#define NV9097_INVALIDATE_SHADER_CACHES_UNIFORM_FALSE 0x00000000 +#define NV9097_INVALIDATE_SHADER_CACHES_UNIFORM_TRUE 0x00000001 +#define NV9097_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NV9097_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NV9097_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NV9097_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NV9097_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NV9097_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NV9097_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NV9097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NV9097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NV9097_SET_VAB_VERTEX3F(i) (0x0220+(i)*4) +#define NV9097_SET_VAB_VERTEX3F_V 31:0 + +#define NV9097_SET_VAB_VERTEX4F(i) (0x0230+(i)*4) +#define NV9097_SET_VAB_VERTEX4F_V 31:0 + +#define NV9097_SET_VAB_NORMAL3F(i) (0x0240+(i)*4) +#define NV9097_SET_VAB_NORMAL3F_V 31:0 + +#define NV9097_SET_VAB_COLOR3F(i) (0x0250+(i)*4) +#define NV9097_SET_VAB_COLOR3F_V 31:0 + +#define NV9097_SET_VAB_COLOR4F(i) (0x0260+(i)*4) +#define NV9097_SET_VAB_COLOR4F_V 31:0 + +#define NV9097_SET_VAB_COLOR4UB(i) (0x0270+(i)*4) +#define NV9097_SET_VAB_COLOR4UB_V 31:0 + +#define NV9097_SET_VAB_TEX_COORD1F(i) (0x0280+(i)*4) +#define NV9097_SET_VAB_TEX_COORD1F_V 31:0 + +#define NV9097_SET_VAB_TEX_COORD2F(i) (0x0290+(i)*4) +#define NV9097_SET_VAB_TEX_COORD2F_V 31:0 + +#define NV9097_SET_VAB_TEX_COORD3F(i) (0x02a0+(i)*4) +#define NV9097_SET_VAB_TEX_COORD3F_V 31:0 + +#define NV9097_SET_VAB_TEX_COORD4F(i) (0x02b0+(i)*4) +#define NV9097_SET_VAB_TEX_COORD4F_V 31:0 + +#define NV9097_SET_GA_TO_VA_MAPPING_MODE 0x02c4 +#define NV9097_SET_GA_TO_VA_MAPPING_MODE_V 0:0 +#define NV9097_SET_GA_TO_VA_MAPPING_MODE_V_DISABLE 0x00000000 +#define NV9097_SET_GA_TO_VA_MAPPING_MODE_V_ENABLE 0x00000001 + +#define NV9097_LOAD_GA_TO_VA_MAPPING_ENTRY 0x02c8 +#define NV9097_LOAD_GA_TO_VA_MAPPING_ENTRY_VIRTUAL_ADDRESS_UPPER 7:0 +#define NV9097_LOAD_GA_TO_VA_MAPPING_ENTRY_GENERIC_ADDRESS_UPPER 23:16 +#define NV9097_LOAD_GA_TO_VA_MAPPING_ENTRY_READ_ENABLE 30:30 +#define NV9097_LOAD_GA_TO_VA_MAPPING_ENTRY_READ_ENABLE_FALSE 0x00000000 +#define NV9097_LOAD_GA_TO_VA_MAPPING_ENTRY_READ_ENABLE_TRUE 0x00000001 +#define NV9097_LOAD_GA_TO_VA_MAPPING_ENTRY_WRITE_ENABLE 31:31 +#define NV9097_LOAD_GA_TO_VA_MAPPING_ENTRY_WRITE_ENABLE_FALSE 0x00000000 +#define NV9097_LOAD_GA_TO_VA_MAPPING_ENTRY_WRITE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_TASK_CIRCULAR_BUFFER_THROTTLE 0x02cc +#define NV9097_SET_TASK_CIRCULAR_BUFFER_THROTTLE_TASK_COUNT 21:0 + +#define NV9097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE 0x02d0 +#define NV9097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE_PRIM_AREA 21:0 + +#define NV9097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NV9097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NV9097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NV9097_SET_RASTER_BOUNDING_BOX 0x02ec +#define NV9097_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NV9097_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NV9097_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NV9097_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NV9097_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NV9097_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NV9097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NV9097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NV9097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NV9097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NV9097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NV9097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NV9097_DRAW_ZERO_INDEX 0x0304 +#define NV9097_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NV9097_SET_L1_CONFIGURATION 0x0308 +#define NV9097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NV9097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NV9097_SET_RENDER_ENABLE_CONTROL 0x030c +#define NV9097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NV9097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NV9097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NV9097_X_X_X_SET_CT_ENABLE 0x0310 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET0 0:0 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET0_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET0_TRUE 0x00000001 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET1 1:1 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET1_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET1_TRUE 0x00000001 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET2 2:2 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET2_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET2_TRUE 0x00000001 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET3 3:3 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET3_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET3_TRUE 0x00000001 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET4 4:4 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET4_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET4_TRUE 0x00000001 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET5 5:5 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET5_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET5_TRUE 0x00000001 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET6 6:6 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET6_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET6_TRUE 0x00000001 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET7 7:7 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET7_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CT_ENABLE_TARGET7_TRUE 0x00000001 + +#define NV9097_SET_IEEE_CLEAN_UPDATE 0x0314 +#define NV9097_SET_IEEE_CLEAN_UPDATE_ENABLE 0:0 +#define NV9097_SET_IEEE_CLEAN_UPDATE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_IEEE_CLEAN_UPDATE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_SNAP_GRID_LINE 0x0318 +#define NV9097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NV9097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NV9097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NV9097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NV9097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NV9097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NV9097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NV9097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NV9097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NV9097_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NV9097_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NV9097_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NV9097_SET_SNAP_GRID_NON_LINE 0x031c +#define NV9097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NV9097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NV9097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NV9097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NV9097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NV9097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NV9097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NV9097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NV9097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NV9097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NV9097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NV9097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NV9097_SET_TESSELLATION_PARAMETERS 0x0320 +#define NV9097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NV9097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NV9097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NV9097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NV9097_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NV9097_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NV9097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NV9097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NV9097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NV9097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NV9097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NV9097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NV9097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NV9097_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NV9097_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NV9097_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NV9097_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NV9097_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NV9097_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NV9097_SET_TESSELLATION_LOD_V1 0x0330 +#define NV9097_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NV9097_SET_TG_LOD_INTERIOR_U 0x0334 +#define NV9097_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NV9097_SET_TG_LOD_INTERIOR_V 0x0338 +#define NV9097_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NV9097_RESERVED_TG07 0x033c +#define NV9097_RESERVED_TG07_V 0:0 + +#define NV9097_RESERVED_TG08 0x0340 +#define NV9097_RESERVED_TG08_V 0:0 + +#define NV9097_RESERVED_TG09 0x0344 +#define NV9097_RESERVED_TG09_V 0:0 + +#define NV9097_RESERVED_TG10 0x0348 +#define NV9097_RESERVED_TG10_V 0:0 + +#define NV9097_RESERVED_TG11 0x034c +#define NV9097_RESERVED_TG11_V 0:0 + +#define NV9097_RESERVED_TG12 0x0350 +#define NV9097_RESERVED_TG12_V 0:0 + +#define NV9097_RESERVED_TG13 0x0354 +#define NV9097_RESERVED_TG13_V 0:0 + +#define NV9097_RESERVED_TG14 0x0358 +#define NV9097_RESERVED_TG14_V 0:0 + +#define NV9097_RESERVED_TG15 0x035c +#define NV9097_RESERVED_TG15_V 0:0 + +#define NV9097_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NV9097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NV9097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NV9097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NV9097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NV9097_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NV9097_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NV9097_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NV9097_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NV9097_SET_RASTER_ENABLE 0x037c +#define NV9097_SET_RASTER_ENABLE_V 0:0 +#define NV9097_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NV9097_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NV9097_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NV9097_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NV9097_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NV9097_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NV9097_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NV9097_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NV9097_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NV9097_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NV9097_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NV9097_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NV9097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NV9097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NV9097_SET_VAB_DATA_TYPELESS(i) (0x0400+(i)*4) +#define NV9097_SET_VAB_DATA_TYPELESS_V 31:0 + +#define NV9097_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NV9097_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NV9097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NV9097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NV9097_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NV9097_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NV9097_SET_RASTER_INPUT 0x0740 +#define NV9097_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NV9097_SET_STREAM_OUTPUT 0x0744 +#define NV9097_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NV9097_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NV9097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NV9097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_ALPHA_FRACTION 0x074c +#define NV9097_SET_ALPHA_FRACTION_V 7:0 + +#define NV9097_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NV9097_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NV9097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NV9097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NV9097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 + +#define NV9097_SET_MAX_TI_WARPS_PER_BATCH 0x075c +#define NV9097_SET_MAX_TI_WARPS_PER_BATCH_V 5:0 + +#define NV9097_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NV9097_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NV9097_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NV9097_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NV9097_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NV9097_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NV9097_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NV9097_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NV9097_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NV9097_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NV9097_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NV9097_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NV9097_SET_VAB_VERTEX2F(i) (0x07b0+(i)*4) +#define NV9097_SET_VAB_VERTEX2F_V 31:0 + +#define NV9097_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NV9097_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NV9097_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NV9097_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NV9097_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NV9097_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NV9097_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NV9097_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NV9097_SET_CULL_BEFORE_FETCH 0x07dc +#define NV9097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NV9097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NV9097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NV9097_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NV9097_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NV9097_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NV9097_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NV9097_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NV9097_SET_ZCULL_STORAGE_A 0x07e8 +#define NV9097_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NV9097_SET_ZCULL_STORAGE_B 0x07ec +#define NV9097_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NV9097_SET_ZCULL_STORAGE_C 0x07f0 +#define NV9097_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NV9097_SET_ZCULL_STORAGE_D 0x07f4 +#define NV9097_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NV9097_SET_ZT_READ_ONLY 0x07f8 +#define NV9097_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NV9097_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NV9097_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NV9097_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NV9097_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NV9097_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NV9097_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NV9097_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NV9097_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NV9097_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NV9097_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NV9097_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NV9097_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NV9097_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NV9097_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NV9097_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NV9097_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NV9097_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NV9097_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NV9097_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NV9097_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NV9097_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NV9097_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NV9097_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NV9097_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 + +#define NV9097_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NV9097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NV9097_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NV9097_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NV9097_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NV9097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NV9097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NV9097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NV9097_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NV9097_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NV9097_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NV9097_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NV9097_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NV9097_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NV9097_SET_COLOR_TARGET_MARK(j) (0x0824+(j)*64) +#define NV9097_SET_COLOR_TARGET_MARK_IEEE_CLEAN 0:0 +#define NV9097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NV9097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NV9097_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NV9097_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NV9097_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NV9097_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NV9097_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NV9097_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NV9097_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NV9097_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NV9097_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NV9097_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NV9097_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NV9097_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NV9097_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NV9097_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NV9097_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NV9097_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NV9097_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NV9097_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NV9097_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NV9097_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NV9097_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NV9097_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NV9097_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NV9097_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NV9097_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NV9097_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NV9097_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NV9097_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NV9097_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NV9097_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NV9097_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NV9097_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NV9097_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NV9097_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NV9097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NV9097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NV9097_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NV9097_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NV9097_SET_STATISTICS_COUNTER 0x0d68 +#define NV9097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NV9097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NV9097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NV9097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NV9097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NV9097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NV9097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NV9097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NV9097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NV9097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NV9097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NV9097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NV9097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NV9097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NV9097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NV9097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NV9097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NV9097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NV9097_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NV9097_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NV9097_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NV9097_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NV9097_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NV9097_SET_VERTEX_ARRAY_START 0x0d74 +#define NV9097_SET_VERTEX_ARRAY_START_V 31:0 + +#define NV9097_DRAW_VERTEX_ARRAY 0x0d78 +#define NV9097_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NV9097_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NV9097_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NV9097_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NV9097_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NV9097_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NV9097_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NV9097_SET_Z_CLEAR_VALUE 0x0d90 +#define NV9097_SET_Z_CLEAR_VALUE_V 31:0 + +#define NV9097_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NV9097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NV9097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NV9097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NV9097_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NV9097_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NV9097_SET_FRONT_POLYGON_MODE 0x0dac +#define NV9097_SET_FRONT_POLYGON_MODE_V 31:0 +#define NV9097_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NV9097_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NV9097_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NV9097_SET_BACK_POLYGON_MODE 0x0db0 +#define NV9097_SET_BACK_POLYGON_MODE_V 31:0 +#define NV9097_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NV9097_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NV9097_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NV9097_SET_POLY_SMOOTH 0x0db4 +#define NV9097_SET_POLY_SMOOTH_ENABLE 0:0 +#define NV9097_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NV9097_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_ZT_MARK 0x0db8 +#define NV9097_SET_ZT_MARK_IEEE_CLEAN 0:0 +#define NV9097_SET_ZT_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NV9097_SET_ZT_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NV9097_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NV9097_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NV9097_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NV9097_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NV9097_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NV9097_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NV9097_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NV9097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NV9097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NV9097_SET_POLY_OFFSET_POINT 0x0dc0 +#define NV9097_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NV9097_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_POLY_OFFSET_LINE 0x0dc4 +#define NV9097_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NV9097_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_POLY_OFFSET_FILL 0x0dc8 +#define NV9097_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NV9097_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NV9097_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_PATCH 0x0dcc +#define NV9097_SET_PATCH_SIZE 7:0 + +#define NV9097_SET_ZCULL_CRITERION 0x0dd8 +#define NV9097_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NV9097_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NV9097_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NV9097_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NV9097_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NV9097_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NV9097_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NV9097_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NV9097_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NV9097_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NV9097_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NV9097_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NV9097_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NV9097_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NV9097_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NV9097_SET_ZCULL_CRITERION_SREF 23:16 +#define NV9097_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NV9097_X_X_X_SET_DA_ATTRIBUTE_CACHE_LINE 0x0ddc +#define NV9097_X_X_X_SET_DA_ATTRIBUTE_CACHE_LINE_V 1:0 +#define NV9097_X_X_X_SET_DA_ATTRIBUTE_CACHE_LINE_V_SIZE128 0x00000000 +#define NV9097_X_X_X_SET_DA_ATTRIBUTE_CACHE_LINE_V_SIZE64 0x00000001 +#define NV9097_X_X_X_SET_DA_ATTRIBUTE_CACHE_LINE_V_SIZE32 0x00000002 + +#define NV9097_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NV9097_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NV9097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NV9097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NV9097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NV9097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_DRAW_INLINE_VERTEX_VAB_UPDATE 0x0dec +#define NV9097_SET_DRAW_INLINE_VERTEX_VAB_UPDATE_ENABLE 0:0 +#define NV9097_SET_DRAW_INLINE_VERTEX_VAB_UPDATE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_DRAW_INLINE_VERTEX_VAB_UPDATE_ENABLE_TRUE 0x00000001 + +#define NV9097_X_X_X_SET_REDUCE_COLOR 0x0df4 +#define NV9097_X_X_X_SET_REDUCE_COLOR_U8_THRESHOLD 7:0 +#define NV9097_X_X_X_SET_REDUCE_COLOR_FP16_THRESHOLD 23:8 + +#define NV9097_SET_WINDOW_OFFSET_X 0x0df8 +#define NV9097_SET_WINDOW_OFFSET_X_V 16:0 + +#define NV9097_SET_WINDOW_OFFSET_Y 0x0dfc +#define NV9097_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NV9097_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NV9097_SET_SCISSOR_ENABLE_V 0:0 +#define NV9097_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NV9097_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NV9097_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NV9097_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NV9097_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NV9097_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NV9097_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NV9097_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NV9097_SET_VAB_NORMAL3S(i) (0x0f00+(i)*4) +#define NV9097_SET_VAB_NORMAL3S_V 31:0 + +#define NV9097_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NV9097_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NV9097_SET_BACK_STENCIL_MASK 0x0f58 +#define NV9097_SET_BACK_STENCIL_MASK_V 7:0 + +#define NV9097_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NV9097_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NV9097_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NV9097_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NV9097_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NV9097_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NV9097_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NV9097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NV9097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NV9097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NV9097_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NV9097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NV9097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NV9097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NV9097_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NV9097_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NV9097_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NV9097_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NV9097_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NV9097_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NV9097_SET_CT_MRT_ENABLE 0x0fac +#define NV9097_SET_CT_MRT_ENABLE_V 0:0 +#define NV9097_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NV9097_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NV9097_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NV9097_SET_NONMULTISAMPLED_Z_V 0:0 +#define NV9097_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NV9097_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NV9097_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NV9097_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NV9097_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NV9097_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NV9097_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NV9097_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NV9097_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NV9097_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NV9097_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NV9097_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NV9097_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_BLEND_OPT_CONTROL 0x0fdc +#define NV9097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NV9097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NV9097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NV9097_SET_ZT_A 0x0fe0 +#define NV9097_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_ZT_B 0x0fe4 +#define NV9097_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_ZT_FORMAT 0x0fe8 +#define NV9097_SET_ZT_FORMAT_V 4:0 +#define NV9097_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NV9097_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NV9097_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NV9097_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NV9097_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NV9097_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NV9097_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NV9097_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NV9097_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NV9097_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NV9097_SET_ZT_BLOCK_SIZE 0x0fec +#define NV9097_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NV9097_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NV9097_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NV9097_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NV9097_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NV9097_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NV9097_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NV9097_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NV9097_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NV9097_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NV9097_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NV9097_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NV9097_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NV9097_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NV9097_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NV9097_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NV9097_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NV9097_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NV9097_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NV9097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NV9097_SET_FORCE_ONE_TEXTURE_UNIT 0x1004 +#define NV9097_SET_FORCE_ONE_TEXTURE_UNIT_ENABLE 0:0 +#define NV9097_SET_FORCE_ONE_TEXTURE_UNIT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_FORCE_ONE_TEXTURE_UNIT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NV9097_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NV9097_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NV9097_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NV9097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NV9097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NV9097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NV9097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NV9097_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NV9097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NV9097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NV9097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NV9097_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NV9097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NV9097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_SPARE_NOOP00 0x1040 +#define NV9097_SET_SPARE_NOOP00_V 31:0 + +#define NV9097_SET_SPARE_NOOP01 0x1044 +#define NV9097_SET_SPARE_NOOP01_V 31:0 + +#define NV9097_SET_SPARE_NOOP02 0x1048 +#define NV9097_SET_SPARE_NOOP02_V 31:0 + +#define NV9097_SET_SPARE_NOOP03 0x104c +#define NV9097_SET_SPARE_NOOP03_V 31:0 + +#define NV9097_SET_SPARE_NOOP04 0x1050 +#define NV9097_SET_SPARE_NOOP04_V 31:0 + +#define NV9097_SET_SPARE_NOOP05 0x1054 +#define NV9097_SET_SPARE_NOOP05_V 31:0 + +#define NV9097_SET_SPARE_NOOP06 0x1058 +#define NV9097_SET_SPARE_NOOP06_V 31:0 + +#define NV9097_SET_SPARE_NOOP07 0x105c +#define NV9097_SET_SPARE_NOOP07_V 31:0 + +#define NV9097_SET_SPARE_NOOP08 0x1060 +#define NV9097_SET_SPARE_NOOP08_V 31:0 + +#define NV9097_SET_SPARE_NOOP09 0x1064 +#define NV9097_SET_SPARE_NOOP09_V 31:0 + +#define NV9097_SET_SPARE_NOOP10 0x1068 +#define NV9097_SET_SPARE_NOOP10_V 31:0 + +#define NV9097_SET_SPARE_NOOP11 0x106c +#define NV9097_SET_SPARE_NOOP11_V 31:0 + +#define NV9097_SET_SPARE_NOOP12 0x1070 +#define NV9097_SET_SPARE_NOOP12_V 31:0 + +#define NV9097_SET_SPARE_NOOP13 0x1074 +#define NV9097_SET_SPARE_NOOP13_V 31:0 + +#define NV9097_SET_SPARE_NOOP14 0x1078 +#define NV9097_SET_SPARE_NOOP14_V 31:0 + +#define NV9097_SET_SPARE_NOOP15 0x107c +#define NV9097_SET_SPARE_NOOP15_V 31:0 + +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NV9097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NV9097_UNBIND_ALL 0x10f4 +#define NV9097_UNBIND_ALL_TEXTURE_HEADERS 0:0 +#define NV9097_UNBIND_ALL_TEXTURE_HEADERS_FALSE 0x00000000 +#define NV9097_UNBIND_ALL_TEXTURE_HEADERS_TRUE 0x00000001 +#define NV9097_UNBIND_ALL_TEXTURE_SAMPLERS 4:4 +#define NV9097_UNBIND_ALL_TEXTURE_SAMPLERS_FALSE 0x00000000 +#define NV9097_UNBIND_ALL_TEXTURE_SAMPLERS_TRUE 0x00000001 +#define NV9097_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NV9097_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NV9097_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NV9097_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NV9097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NV9097_NO_OPERATION_DATA_HI 0x110c +#define NV9097_NO_OPERATION_DATA_HI_V 31:0 + +#define NV9097_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NV9097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NV9097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NV9097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NV9097_PM_TRIGGER_END 0x1114 +#define NV9097_PM_TRIGGER_END_V 31:0 + +#define NV9097_SET_VERTEX_ID_BASE 0x1118 +#define NV9097_SET_VERTEX_ID_BASE_V 31:0 + +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NV9097_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NV9097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NV9097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NV9097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NV9097_FLUSH_PENDING_WRITES 0x1144 +#define NV9097_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NV9097_SET_VAB_DATA_CONTROL 0x114c +#define NV9097_SET_VAB_DATA_CONTROL_VAB_INDEX 7:0 +#define NV9097_SET_VAB_DATA_CONTROL_COMPONENT_COUNT 10:8 +#define NV9097_SET_VAB_DATA_CONTROL_COMPONENT_BYTE_WIDTH 14:12 +#define NV9097_SET_VAB_DATA_CONTROL_FORMAT 18:16 +#define NV9097_SET_VAB_DATA_CONTROL_FORMAT_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NV9097_SET_VAB_DATA_CONTROL_FORMAT_NUM_SNORM 0x00000001 +#define NV9097_SET_VAB_DATA_CONTROL_FORMAT_NUM_UNORM 0x00000002 +#define NV9097_SET_VAB_DATA_CONTROL_FORMAT_NUM_SINT 0x00000003 +#define NV9097_SET_VAB_DATA_CONTROL_FORMAT_NUM_UINT 0x00000004 +#define NV9097_SET_VAB_DATA_CONTROL_FORMAT_NUM_USCALED 0x00000005 +#define NV9097_SET_VAB_DATA_CONTROL_FORMAT_NUM_SSCALED 0x00000006 +#define NV9097_SET_VAB_DATA_CONTROL_FORMAT_NUM_FLOAT 0x00000007 + +#define NV9097_SET_VAB_DATA(i) (0x1150+(i)*4) +#define NV9097_SET_VAB_DATA_V 31:0 + +#define NV9097_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NV9097_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NV9097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NV9097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NV9097_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NV9097_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NV9097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NV9097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NV9097_SET_CT_SELECT 0x121c +#define NV9097_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NV9097_SET_CT_SELECT_TARGET0 6:4 +#define NV9097_SET_CT_SELECT_TARGET1 9:7 +#define NV9097_SET_CT_SELECT_TARGET2 12:10 +#define NV9097_SET_CT_SELECT_TARGET3 15:13 +#define NV9097_SET_CT_SELECT_TARGET4 18:16 +#define NV9097_SET_CT_SELECT_TARGET5 21:19 +#define NV9097_SET_CT_SELECT_TARGET6 24:22 +#define NV9097_SET_CT_SELECT_TARGET7 27:25 + +#define NV9097_SET_COMPRESSION_THRESHOLD 0x1220 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NV9097_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NV9097_SET_ZT_SIZE_A 0x1228 +#define NV9097_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NV9097_SET_ZT_SIZE_B 0x122c +#define NV9097_SET_ZT_SIZE_B_HEIGHT 16:0 + +#define NV9097_SET_ZT_SIZE_C 0x1230 +#define NV9097_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NV9097_SET_ZT_SIZE_C_CONTROL 16:16 +#define NV9097_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NV9097_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NV9097_SET_SAMPLER_BINDING 0x1234 +#define NV9097_SET_SAMPLER_BINDING_V 0:0 +#define NV9097_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NV9097_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NV9097_DRAW_AUTO 0x123c +#define NV9097_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NV9097_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NV9097_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 9:0 + +#define NV9097_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NV9097_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NV9097_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NV9097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NV9097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NV9097_SET_SHADER_SCHEDULING 0x12ac +#define NV9097_SET_SHADER_SCHEDULING_MODE 0:0 +#define NV9097_SET_SHADER_SCHEDULING_MODE_OLDEST_THREAD_FIRST 0x00000000 +#define NV9097_SET_SHADER_SCHEDULING_MODE_ROUND_ROBIN 0x00000001 + +#define NV9097_CLEAR_ZCULL_REGION 0x12c8 +#define NV9097_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NV9097_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NV9097_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NV9097_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NV9097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NV9097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NV9097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NV9097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NV9097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NV9097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NV9097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NV9097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NV9097_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NV9097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NV9097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NV9097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NV9097_SET_DEPTH_TEST 0x12cc +#define NV9097_SET_DEPTH_TEST_ENABLE 0:0 +#define NV9097_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NV9097_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_FILL_MODE 0x12d0 +#define NV9097_SET_FILL_MODE_V 31:0 +#define NV9097_SET_FILL_MODE_V_POINT 0x00000001 +#define NV9097_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NV9097_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NV9097_SET_SHADE_MODE 0x12d4 +#define NV9097_SET_SHADE_MODE_V 31:0 +#define NV9097_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NV9097_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NV9097_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NV9097_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NV9097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NV9097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NV9097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NV9097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NV9097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NV9097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NV9097_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NV9097_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NV9097_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NV9097_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_DEPTH_WRITE 0x12e8 +#define NV9097_SET_DEPTH_WRITE_ENABLE 0:0 +#define NV9097_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_ALPHA_TEST 0x12ec +#define NV9097_SET_ALPHA_TEST_ENABLE 0:0 +#define NV9097_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NV9097_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NV9097_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NV9097_DRAW_INLINE_INDEX4X8 0x1304 +#define NV9097_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NV9097_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NV9097_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NV9097_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NV9097_D3D_SET_CULL_MODE 0x1308 +#define NV9097_D3D_SET_CULL_MODE_V 31:0 +#define NV9097_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NV9097_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NV9097_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NV9097_SET_DEPTH_FUNC 0x130c +#define NV9097_SET_DEPTH_FUNC_V 31:0 +#define NV9097_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NV9097_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NV9097_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NV9097_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NV9097_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NV9097_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NV9097_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NV9097_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NV9097_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NV9097_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NV9097_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NV9097_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NV9097_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NV9097_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NV9097_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NV9097_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NV9097_SET_ALPHA_REF 0x1310 +#define NV9097_SET_ALPHA_REF_V 31:0 + +#define NV9097_SET_ALPHA_FUNC 0x1314 +#define NV9097_SET_ALPHA_FUNC_V 31:0 +#define NV9097_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NV9097_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NV9097_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NV9097_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NV9097_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NV9097_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NV9097_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NV9097_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NV9097_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NV9097_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NV9097_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NV9097_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NV9097_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NV9097_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NV9097_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NV9097_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NV9097_SET_DRAW_AUTO_STRIDE 0x1318 +#define NV9097_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NV9097_SET_BLEND_CONST_RED 0x131c +#define NV9097_SET_BLEND_CONST_RED_V 31:0 + +#define NV9097_SET_BLEND_CONST_GREEN 0x1320 +#define NV9097_SET_BLEND_CONST_GREEN_V 31:0 + +#define NV9097_SET_BLEND_CONST_BLUE 0x1324 +#define NV9097_SET_BLEND_CONST_BLUE_V 31:0 + +#define NV9097_SET_BLEND_CONST_ALPHA 0x1328 +#define NV9097_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NV9097_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NV9097_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NV9097_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NV9097_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NV9097_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_LEVELS 2:1 +#define NV9097_INVALIDATE_TEXTURE_DATA_CACHE_LEVELS_L1_ONLY 0x00000000 + +#define NV9097_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NV9097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NV9097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NV9097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_BLEND_COLOR_OP 0x1340 +#define NV9097_SET_BLEND_COLOR_OP_V 31:0 +#define NV9097_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NV9097_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NV9097_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NV9097_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NV9097_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NV9097_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NV9097_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NV9097_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NV9097_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NV9097_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NV9097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NV9097_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NV9097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NV9097_SET_BLEND_ALPHA_OP 0x134c +#define NV9097_SET_BLEND_ALPHA_OP_V 31:0 +#define NV9097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NV9097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NV9097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NV9097_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NV9097_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NV9097_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NV9097_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NV9097_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NV9097_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NV9097_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NV9097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NV9097_SET_GLOBAL_COLOR_KEY 0x1354 +#define NV9097_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NV9097_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NV9097_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NV9097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NV9097_SET_SINGLE_ROP_CONTROL 0x135c +#define NV9097_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NV9097_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NV9097_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_BLEND(i) (0x1360+(i)*4) +#define NV9097_SET_BLEND_ENABLE 0:0 +#define NV9097_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NV9097_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_STENCIL_TEST 0x1380 +#define NV9097_SET_STENCIL_TEST_ENABLE 0:0 +#define NV9097_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NV9097_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_STENCIL_OP_FAIL 0x1384 +#define NV9097_SET_STENCIL_OP_FAIL_V 31:0 +#define NV9097_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NV9097_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NV9097_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NV9097_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NV9097_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NV9097_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NV9097_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NV9097_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NV9097_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NV9097_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NV9097_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NV9097_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NV9097_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NV9097_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NV9097_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NV9097_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NV9097_SET_STENCIL_OP_ZFAIL 0x1388 +#define NV9097_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NV9097_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NV9097_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NV9097_SET_STENCIL_OP_ZPASS 0x138c +#define NV9097_SET_STENCIL_OP_ZPASS_V 31:0 +#define NV9097_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NV9097_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NV9097_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NV9097_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NV9097_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NV9097_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NV9097_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NV9097_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NV9097_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NV9097_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NV9097_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NV9097_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NV9097_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NV9097_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NV9097_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NV9097_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NV9097_SET_STENCIL_FUNC 0x1390 +#define NV9097_SET_STENCIL_FUNC_V 31:0 +#define NV9097_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NV9097_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NV9097_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NV9097_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NV9097_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NV9097_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NV9097_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NV9097_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NV9097_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NV9097_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NV9097_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NV9097_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NV9097_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NV9097_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NV9097_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NV9097_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NV9097_SET_STENCIL_FUNC_REF 0x1394 +#define NV9097_SET_STENCIL_FUNC_REF_V 7:0 + +#define NV9097_SET_STENCIL_FUNC_MASK 0x1398 +#define NV9097_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NV9097_SET_STENCIL_MASK 0x139c +#define NV9097_SET_STENCIL_MASK_V 7:0 + +#define NV9097_SET_DRAW_AUTO_START 0x13a4 +#define NV9097_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NV9097_SET_PS_SATURATE 0x13a8 +#define NV9097_SET_PS_SATURATE_OUTPUT0 0:0 +#define NV9097_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NV9097_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NV9097_SET_PS_SATURATE_OUTPUT1 4:4 +#define NV9097_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NV9097_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NV9097_SET_PS_SATURATE_OUTPUT2 8:8 +#define NV9097_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NV9097_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NV9097_SET_PS_SATURATE_OUTPUT3 12:12 +#define NV9097_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NV9097_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NV9097_SET_PS_SATURATE_OUTPUT4 16:16 +#define NV9097_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NV9097_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NV9097_SET_PS_SATURATE_OUTPUT5 20:20 +#define NV9097_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NV9097_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NV9097_SET_PS_SATURATE_OUTPUT6 24:24 +#define NV9097_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NV9097_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NV9097_SET_PS_SATURATE_OUTPUT7 28:28 +#define NV9097_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NV9097_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 + +#define NV9097_SET_WINDOW_ORIGIN 0x13ac +#define NV9097_SET_WINDOW_ORIGIN_MODE 0:0 +#define NV9097_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NV9097_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NV9097_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NV9097_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NV9097_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NV9097_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NV9097_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NV9097_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NV9097_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NV9097_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NV9097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NV9097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_ALPHA_HYSTERESIS 0x1420 +#define NV9097_SET_ALPHA_HYSTERESIS_ROUNDS_OF_ALPHA 7:0 + +#define NV9097_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NV9097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NV9097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NV9097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NV9097_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NV9097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NV9097_INVALIDATE_DA_DMA_CACHE 0x142c +#define NV9097_INVALIDATE_DA_DMA_CACHE_V 0:0 + +#define NV9097_X_X_X_SET_REDUCE_DST_COLOR 0x1430 +#define NV9097_X_X_X_SET_REDUCE_DST_COLOR_UNORM_ENABLE 4:4 +#define NV9097_X_X_X_SET_REDUCE_DST_COLOR_UNORM_ENABLE_FALSE 0x00000000 +#define NV9097_X_X_X_SET_REDUCE_DST_COLOR_UNORM_ENABLE_TRUE 0x00000001 +#define NV9097_X_X_X_SET_REDUCE_DST_COLOR_SRGB_ENABLE 8:8 +#define NV9097_X_X_X_SET_REDUCE_DST_COLOR_SRGB_ENABLE_FALSE 0x00000000 +#define NV9097_X_X_X_SET_REDUCE_DST_COLOR_SRGB_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NV9097_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NV9097_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NV9097_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NV9097_X_X_X_SET_CLEAR_CONTROL 0x143c +#define NV9097_X_X_X_SET_CLEAR_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NV9097_X_X_X_SET_CLEAR_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CLEAR_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NV9097_X_X_X_SET_CLEAR_CONTROL_USE_CLEAR_RECT 4:4 +#define NV9097_X_X_X_SET_CLEAR_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NV9097_X_X_X_SET_CLEAR_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 + +#define NV9097_SET_PS_WARP_WATERMARKS 0x1450 +#define NV9097_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NV9097_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NV9097_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NV9097_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NV9097_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NV9097_STORE_ZCULL 0x1464 +#define NV9097_STORE_ZCULL_V 0:0 + +#define NV9097_LOAD_ZCULL 0x1500 +#define NV9097_LOAD_ZCULL_V 0:0 + +#define NV9097_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NV9097_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NV9097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NV9097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NV9097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NV9097_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NV9097_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NV9097_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NV9097_SET_USER_CLIP_ENABLE 0x1510 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NV9097_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NV9097_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NV9097_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NV9097_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_POINT_SIZE 0x1518 +#define NV9097_SET_POINT_SIZE_V 31:0 + +#define NV9097_SET_ZCULL_STATS 0x151c +#define NV9097_SET_ZCULL_STATS_ENABLE 0:0 +#define NV9097_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_POINT_SPRITE 0x1520 +#define NV9097_SET_POINT_SPRITE_ENABLE 0:0 +#define NV9097_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_SHADER_EXCEPTIONS 0x1528 +#define NV9097_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NV9097_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NV9097_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NV9097_CLEAR_REPORT_VALUE 0x1530 +#define NV9097_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NV9097_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NV9097_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NV9097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NV9097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NV9097_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NV9097_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NV9097_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 + +#define NV9097_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NV9097_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NV9097_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NV9097_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NV9097_SET_ZT_SELECT 0x1538 +#define NV9097_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NV9097_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NV9097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NV9097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NV9097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NV9097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NV9097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NV9097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NV9097_SET_RENDER_ENABLE_A 0x1550 +#define NV9097_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_RENDER_ENABLE_B 0x1554 +#define NV9097_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_RENDER_ENABLE_C 0x1558 +#define NV9097_SET_RENDER_ENABLE_C_MODE 2:0 +#define NV9097_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NV9097_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NV9097_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NV9097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NV9097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NV9097_SET_TEX_SAMPLER_POOL_A 0x155c +#define NV9097_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NV9097_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NV9097_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NV9097_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NV9097_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NV9097_SET_ANTI_ALIASED_LINE 0x1570 +#define NV9097_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NV9097_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_TEX_HEADER_POOL_A 0x1574 +#define NV9097_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_TEX_HEADER_POOL_B 0x1578 +#define NV9097_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_TEX_HEADER_POOL_C 0x157c +#define NV9097_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NV9097_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NV9097_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NV9097_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NV9097_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NV9097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NV9097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NV9097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NV9097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NV9097_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NV9097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NV9097_SET_BACK_STENCIL_FUNC 0x15a4 +#define NV9097_SET_BACK_STENCIL_FUNC_V 31:0 +#define NV9097_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NV9097_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NV9097_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NV9097_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NV9097_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NV9097_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NV9097_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NV9097_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NV9097_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NV9097_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NV9097_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NV9097_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NV9097_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NV9097_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NV9097_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NV9097_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NV9097_SET_SRGB_WRITE 0x15b8 +#define NV9097_SET_SRGB_WRITE_ENABLE 0:0 +#define NV9097_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_DEPTH_BIAS 0x15bc +#define NV9097_SET_DEPTH_BIAS_V 31:0 + +#define NV9097_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NV9097_SET_ZCULL_REGION_FORMAT_TYPE 1:0 +#define NV9097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NV9097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NV9097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NV9097_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 + +#define NV9097_SET_RT_LAYER 0x15cc +#define NV9097_SET_RT_LAYER_V 15:0 +#define NV9097_SET_RT_LAYER_CONTROL 16:16 +#define NV9097_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NV9097_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NV9097_SET_ANTI_ALIAS 0x15d0 +#define NV9097_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NV9097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NV9097_SET_EDGE_FLAG 0x15e4 +#define NV9097_SET_EDGE_FLAG_V 0:0 +#define NV9097_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NV9097_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NV9097_DRAW_INLINE_INDEX 0x15e8 +#define NV9097_DRAW_INLINE_INDEX_V 31:0 + +#define NV9097_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NV9097_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NV9097_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NV9097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NV9097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NV9097_DRAW_INLINE_INDEX2X16 0x15f0 +#define NV9097_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NV9097_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NV9097_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NV9097_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NV9097_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NV9097_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NV9097_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NV9097_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NV9097_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NV9097_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NV9097_SET_POINT_SPRITE_SELECT 0x1604 +#define NV9097_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NV9097_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NV9097_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NV9097_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NV9097_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NV9097_SET_PROGRAM_REGION_A 0x1608 +#define NV9097_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NV9097_SET_PROGRAM_REGION_B 0x160c +#define NV9097_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NV9097_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NV9097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NV9097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NV9097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NV9097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NV9097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NV9097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NV9097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NV9097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NV9097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NV9097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NV9097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NV9097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NV9097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NV9097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NV9097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NV9097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NV9097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NV9097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NV9097_END 0x1614 +#define NV9097_END_V 0:0 + +#define NV9097_BEGIN 0x1618 +#define NV9097_BEGIN_OP 15:0 +#define NV9097_BEGIN_OP_POINTS 0x00000000 +#define NV9097_BEGIN_OP_LINES 0x00000001 +#define NV9097_BEGIN_OP_LINE_LOOP 0x00000002 +#define NV9097_BEGIN_OP_LINE_STRIP 0x00000003 +#define NV9097_BEGIN_OP_TRIANGLES 0x00000004 +#define NV9097_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NV9097_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NV9097_BEGIN_OP_QUADS 0x00000007 +#define NV9097_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NV9097_BEGIN_OP_POLYGON 0x00000009 +#define NV9097_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NV9097_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NV9097_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_BEGIN_OP_PATCH 0x0000000E +#define NV9097_BEGIN_PRIMITIVE_ID 24:24 +#define NV9097_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NV9097_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NV9097_BEGIN_INSTANCE_ID 27:26 +#define NV9097_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NV9097_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NV9097_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NV9097_BEGIN_SPLIT_MODE 30:29 +#define NV9097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NV9097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NV9097_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NV9097_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 + +#define NV9097_SET_VERTEX_ID_COPY 0x161c +#define NV9097_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NV9097_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NV9097_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NV9097_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NV9097_ADD_TO_PRIMITIVE_ID 0x1620 +#define NV9097_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NV9097_LOAD_PRIMITIVE_ID 0x1624 +#define NV9097_LOAD_PRIMITIVE_ID_V 31:0 + +#define NV9097_SET_SHADER_BASED_CULL 0x162c +#define NV9097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NV9097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NV9097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NV9097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NV9097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NV9097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_SHADER_ISA_VERSION 0x1634 +#define NV9097_SET_SHADER_ISA_VERSION_MINOR_SUB 7:0 +#define NV9097_SET_SHADER_ISA_VERSION_MINOR 15:8 +#define NV9097_SET_SHADER_ISA_VERSION_MAJOR 23:16 + +#define NV9097_SET_FERMI_CLASS_VERSION 0x1638 +#define NV9097_SET_FERMI_CLASS_VERSION_CURRENT 15:0 +#define NV9097_SET_FERMI_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NV9097_SET_VAB_PAGE 0x163c +#define NV9097_SET_VAB_PAGE_READ_SELECT 0:0 +#define NV9097_SET_VAB_PAGE_READ_SELECT_PAGES_0_AND_1 0x00000000 +#define NV9097_SET_VAB_PAGE_READ_SELECT_PAGES_0_AND_2 0x00000001 + +#define NV9097_DRAW_INLINE_VERTEX 0x1640 +#define NV9097_DRAW_INLINE_VERTEX_V 31:0 + +#define NV9097_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NV9097_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NV9097_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NV9097_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NV9097_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NV9097_SET_DA_OUTPUT 0x164c +#define NV9097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NV9097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NV9097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NV9097_SET_ANTI_ALIASED_POINT 0x1658 +#define NV9097_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NV9097_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_POINT_CENTER_MODE 0x165c +#define NV9097_SET_POINT_CENTER_MODE_V 31:0 +#define NV9097_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NV9097_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NV9097_SET_CUBEMAP_INTER_FACE_FILTERING 0x1664 +#define NV9097_SET_CUBEMAP_INTER_FACE_FILTERING_MODE 2:1 +#define NV9097_SET_CUBEMAP_INTER_FACE_FILTERING_MODE_USE_WRAP 0x00000000 +#define NV9097_SET_CUBEMAP_INTER_FACE_FILTERING_MODE_OVERRIDE_WRAP 0x00000001 +#define NV9097_SET_CUBEMAP_INTER_FACE_FILTERING_MODE_AUTO_SPAN_SEAM 0x00000002 +#define NV9097_SET_CUBEMAP_INTER_FACE_FILTERING_MODE_AUTO_CROSS_SEAM 0x00000003 + +#define NV9097_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NV9097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NV9097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NV9097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NV9097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NV9097_SET_LINE_STIPPLE 0x166c +#define NV9097_SET_LINE_STIPPLE_ENABLE 0:0 +#define NV9097_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NV9097_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NV9097_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NV9097_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NV9097_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NV9097_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NV9097_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NV9097_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NV9097_SET_PROVOKING_VERTEX 0x1684 +#define NV9097_SET_PROVOKING_VERTEX_V 0:0 +#define NV9097_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NV9097_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NV9097_SET_TWO_SIDED_LIGHT 0x1688 +#define NV9097_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NV9097_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_POLYGON_STIPPLE 0x168c +#define NV9097_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NV9097_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_SHADER_CONTROL 0x1690 +#define NV9097_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NV9097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NV9097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NV9097_SET_SHADER_CONTROL_ZERO_TIMES_ANYTHING_IS_ZERO 16:16 +#define NV9097_SET_SHADER_CONTROL_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NV9097_SET_SHADER_CONTROL_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NV9097_LAUNCH_VERTEX 0x169c +#define NV9097_LAUNCH_VERTEX_V 0:0 + +#define NV9097_CHECK_FERMI_CLASS_VERSION 0x16a0 +#define NV9097_CHECK_FERMI_CLASS_VERSION_CURRENT 15:0 +#define NV9097_CHECK_FERMI_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NV9097_SET_SPH_VERSION 0x16a4 +#define NV9097_SET_SPH_VERSION_CURRENT 15:0 +#define NV9097_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NV9097_CHECK_SPH_VERSION 0x16a8 +#define NV9097_CHECK_SPH_VERSION_CURRENT 15:0 +#define NV9097_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NV9097_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NV9097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NV9097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NV9097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NV9097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NV9097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NV9097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NV9097_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NV9097_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NV9097_SET_AAM_VERSION 0x1790 +#define NV9097_SET_AAM_VERSION_CURRENT 15:0 +#define NV9097_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NV9097_CHECK_AAM_VERSION 0x1794 +#define NV9097_CHECK_AAM_VERSION_CURRENT 15:0 +#define NV9097_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NV9097_SET_ZT_LAYER 0x179c +#define NV9097_SET_ZT_LAYER_OFFSET 15:0 + +#define NV9097_SET_VAB_MEMORY_AREA_A 0x17bc +#define NV9097_SET_VAB_MEMORY_AREA_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_VAB_MEMORY_AREA_B 0x17c0 +#define NV9097_SET_VAB_MEMORY_AREA_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_VAB_MEMORY_AREA_C 0x17c4 +#define NV9097_SET_VAB_MEMORY_AREA_C_SIZE 1:0 +#define NV9097_SET_VAB_MEMORY_AREA_C_SIZE_BYTES_64K 0x00000001 +#define NV9097_SET_VAB_MEMORY_AREA_C_SIZE_BYTES_128K 0x00000002 +#define NV9097_SET_VAB_MEMORY_AREA_C_SIZE_BYTES_256K 0x00000003 + +#define NV9097_SET_INDEX_BUFFER_A 0x17c8 +#define NV9097_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NV9097_SET_INDEX_BUFFER_B 0x17cc +#define NV9097_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NV9097_SET_INDEX_BUFFER_C 0x17d0 +#define NV9097_SET_INDEX_BUFFER_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NV9097_SET_INDEX_BUFFER_D 0x17d4 +#define NV9097_SET_INDEX_BUFFER_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NV9097_SET_INDEX_BUFFER_E 0x17d8 +#define NV9097_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NV9097_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NV9097_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NV9097_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NV9097_SET_INDEX_BUFFER_F 0x17dc +#define NV9097_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NV9097_DRAW_INDEX_BUFFER 0x17e0 +#define NV9097_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NV9097_SET_DEPTH_BIAS_CLAMP 0x187c +#define NV9097_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NV9097_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NV9097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NV9097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NV9097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NV9097_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NV9097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NV9097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NV9097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NV9097_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NV9097_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NV9097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NV9097_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NV9097_OGL_SET_CULL 0x1918 +#define NV9097_OGL_SET_CULL_ENABLE 0:0 +#define NV9097_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NV9097_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NV9097_OGL_SET_FRONT_FACE 0x191c +#define NV9097_OGL_SET_FRONT_FACE_V 31:0 +#define NV9097_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NV9097_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NV9097_OGL_SET_CULL_FACE 0x1920 +#define NV9097_OGL_SET_CULL_FACE_V 31:0 +#define NV9097_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NV9097_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NV9097_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NV9097_SET_VIEWPORT_PIXEL 0x1924 +#define NV9097_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NV9097_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NV9097_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NV9097_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NV9097_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NV9097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NV9097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NV9097_INVALIDATE_CONSTANT_BUFFER_CACHE 0x1930 +#define NV9097_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2 0:0 +#define NV9097_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2_FALSE 0x00000000 +#define NV9097_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2_TRUE 0x00000001 + +#define NV9097_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NV9097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NV9097_SET_USER_CLIP_OP 0x1940 +#define NV9097_SET_USER_CLIP_OP_PLANE0 0:0 +#define NV9097_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NV9097_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NV9097_SET_USER_CLIP_OP_PLANE1 4:4 +#define NV9097_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NV9097_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NV9097_SET_USER_CLIP_OP_PLANE2 8:8 +#define NV9097_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NV9097_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NV9097_SET_USER_CLIP_OP_PLANE3 12:12 +#define NV9097_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NV9097_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NV9097_SET_USER_CLIP_OP_PLANE4 16:16 +#define NV9097_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NV9097_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NV9097_SET_USER_CLIP_OP_PLANE5 20:20 +#define NV9097_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NV9097_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NV9097_SET_USER_CLIP_OP_PLANE6 24:24 +#define NV9097_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NV9097_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NV9097_SET_USER_CLIP_OP_PLANE7 28:28 +#define NV9097_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NV9097_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NV9097_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NV9097_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NV9097_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NV9097_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NV9097_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NV9097_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NV9097_SET_WINDOW_CLIP_ENABLE 0x194c +#define NV9097_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NV9097_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NV9097_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NV9097_SET_WINDOW_CLIP_TYPE 0x1950 +#define NV9097_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NV9097_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NV9097_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NV9097_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NV9097_INVALIDATE_ZCULL 0x1958 +#define NV9097_INVALIDATE_ZCULL_V 31:0 +#define NV9097_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NV9097_SET_ZCULL 0x1968 +#define NV9097_SET_ZCULL_Z_ENABLE 0:0 +#define NV9097_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NV9097_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NV9097_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_ZCULL_BOUNDS 0x196c +#define NV9097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NV9097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NV9097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NV9097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NV9097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NV9097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NV9097_ZCULL_SYNC 0x1978 +#define NV9097_ZCULL_SYNC_V 31:0 + +#define NV9097_SET_CLIP_ID_TEST 0x197c +#define NV9097_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NV9097_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NV9097_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NV9097_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NV9097_SET_CLIP_ID 0x1984 +#define NV9097_SET_CLIP_ID_V 31:0 + +#define NV9097_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NV9097_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NV9097_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NV9097_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NV9097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NV9097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NV9097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NV9097_SET_LOGIC_OP 0x19c4 +#define NV9097_SET_LOGIC_OP_ENABLE 0:0 +#define NV9097_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NV9097_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_LOGIC_OP_FUNC 0x19c8 +#define NV9097_SET_LOGIC_OP_FUNC_V 31:0 +#define NV9097_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NV9097_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NV9097_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NV9097_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NV9097_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NV9097_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NV9097_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NV9097_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NV9097_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NV9097_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NV9097_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NV9097_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NV9097_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NV9097_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NV9097_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NV9097_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NV9097_SET_Z_COMPRESSION 0x19cc +#define NV9097_SET_Z_COMPRESSION_ENABLE 0:0 +#define NV9097_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NV9097_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NV9097_CLEAR_SURFACE 0x19d0 +#define NV9097_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NV9097_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NV9097_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NV9097_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NV9097_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NV9097_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NV9097_CLEAR_SURFACE_R_ENABLE 2:2 +#define NV9097_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NV9097_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NV9097_CLEAR_SURFACE_G_ENABLE 3:3 +#define NV9097_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NV9097_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NV9097_CLEAR_SURFACE_B_ENABLE 4:4 +#define NV9097_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NV9097_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NV9097_CLEAR_SURFACE_A_ENABLE 5:5 +#define NV9097_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NV9097_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NV9097_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NV9097_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NV9097_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NV9097_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NV9097_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NV9097_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NV9097_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NV9097_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NV9097_SET_CT_WRITE_R_ENABLE 0:0 +#define NV9097_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NV9097_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NV9097_SET_CT_WRITE_G_ENABLE 4:4 +#define NV9097_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NV9097_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NV9097_SET_CT_WRITE_B_ENABLE 8:8 +#define NV9097_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NV9097_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NV9097_SET_CT_WRITE_A_ENABLE 12:12 +#define NV9097_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NV9097_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NV9097_PIPE_NOP 0x1a2c +#define NV9097_PIPE_NOP_V 31:0 + +#define NV9097_SET_SPARE00 0x1a30 +#define NV9097_SET_SPARE00_V 31:0 + +#define NV9097_SET_SPARE01 0x1a34 +#define NV9097_SET_SPARE01_V 31:0 + +#define NV9097_SET_SPARE02 0x1a38 +#define NV9097_SET_SPARE02_V 31:0 + +#define NV9097_SET_SPARE03 0x1a3c +#define NV9097_SET_SPARE03_V 31:0 + +#define NV9097_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NV9097_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NV9097_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NV9097_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NV9097_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NV9097_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NV9097_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NV9097_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NV9097_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NV9097_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NV9097_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NV9097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NV9097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NV9097_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NV9097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NV9097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NV9097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NV9097_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NV9097_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NV9097_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NV9097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NV9097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NV9097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NV9097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NV9097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NV9097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NV9097_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NV9097_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NV9097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NV9097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NV9097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 + +#define NV9097_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NV9097_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NV9097_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NV9097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NV9097_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NV9097_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NV9097_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NV9097_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NV9097_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NV9097_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NV9097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NV9097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NV9097_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NV9097_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NV9097_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NV9097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NV9097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NV9097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NV9097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NV9097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NV9097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NV9097_SET_VERTEX_STREAM_LIMIT_A_A(j) (0x1f00+(j)*8) +#define NV9097_SET_VERTEX_STREAM_LIMIT_A_A_UPPER 7:0 + +#define NV9097_SET_VERTEX_STREAM_LIMIT_A_B(j) (0x1f04+(j)*8) +#define NV9097_SET_VERTEX_STREAM_LIMIT_A_B_LOWER 31:0 + +#define NV9097_SET_VERTEX_STREAM_LIMIT_B_A(j) (0x1f80+(j)*8) +#define NV9097_SET_VERTEX_STREAM_LIMIT_B_A_UPPER 7:0 + +#define NV9097_SET_VERTEX_STREAM_LIMIT_B_B(j) (0x1f84+(j)*8) +#define NV9097_SET_VERTEX_STREAM_LIMIT_B_B_LOWER 31:0 + +#define NV9097_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NV9097_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NV9097_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NV9097_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NV9097_SET_PIPELINE_SHADER_TYPE 7:4 +#define NV9097_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NV9097_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NV9097_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NV9097_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NV9097_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NV9097_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NV9097_SET_PIPELINE_PROGRAM(j) (0x2004+(j)*64) +#define NV9097_SET_PIPELINE_PROGRAM_OFFSET 31:0 + +#define NV9097_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NV9097_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NV9097_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NV9097_SET_PIPELINE_REGISTER_COUNT_V 7:0 + +#define NV9097_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NV9097_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NV9097_SET_PIPELINE_RESERVED_B(j) (0x2014+(j)*64) +#define NV9097_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NV9097_SET_PIPELINE_RESERVED_C(j) (0x2018+(j)*64) +#define NV9097_SET_PIPELINE_RESERVED_C_V 0:0 + +#define NV9097_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NV9097_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NV9097_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NV9097_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NV9097_SET_BINDING_CONTROL_TEXTURE(j) (0x2200+(j)*16) +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS 3:0 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__1 0x00000000 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__2 0x00000001 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__4 0x00000002 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__8 0x00000003 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_SAMPLERS__16 0x00000004 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS 7:4 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__1 0x00000000 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__2 0x00000001 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__4 0x00000002 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__8 0x00000003 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__16 0x00000004 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__32 0x00000005 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__64 0x00000006 +#define NV9097_SET_BINDING_CONTROL_TEXTURE_MAX_ACTIVE_HEADERS__128 0x00000007 + +#define NV9097_SET_BINDING_CONTROL_RESERVED_A(j) (0x2204+(j)*16) +#define NV9097_SET_BINDING_CONTROL_RESERVED_A_V 0:0 + +#define NV9097_SET_BINDING_CONTROL_RESERVED_B(j) (0x2208+(j)*16) +#define NV9097_SET_BINDING_CONTROL_RESERVED_B_V 0:0 + +#define NV9097_SET_FALCON00 0x2300 +#define NV9097_SET_FALCON00_V 31:0 + +#define NV9097_SET_FALCON01 0x2304 +#define NV9097_SET_FALCON01_V 31:0 + +#define NV9097_SET_FALCON02 0x2308 +#define NV9097_SET_FALCON02_V 31:0 + +#define NV9097_SET_FALCON03 0x230c +#define NV9097_SET_FALCON03_V 31:0 + +#define NV9097_SET_FALCON04 0x2310 +#define NV9097_SET_FALCON04_V 31:0 + +#define NV9097_SET_FALCON05 0x2314 +#define NV9097_SET_FALCON05_V 31:0 + +#define NV9097_SET_FALCON06 0x2318 +#define NV9097_SET_FALCON06_V 31:0 + +#define NV9097_SET_FALCON07 0x231c +#define NV9097_SET_FALCON07_V 31:0 + +#define NV9097_SET_FALCON08 0x2320 +#define NV9097_SET_FALCON08_V 31:0 + +#define NV9097_SET_FALCON09 0x2324 +#define NV9097_SET_FALCON09_V 31:0 + +#define NV9097_SET_FALCON10 0x2328 +#define NV9097_SET_FALCON10_V 31:0 + +#define NV9097_SET_FALCON11 0x232c +#define NV9097_SET_FALCON11_V 31:0 + +#define NV9097_SET_FALCON12 0x2330 +#define NV9097_SET_FALCON12_V 31:0 + +#define NV9097_SET_FALCON13 0x2334 +#define NV9097_SET_FALCON13_V 31:0 + +#define NV9097_SET_FALCON14 0x2338 +#define NV9097_SET_FALCON14_V 31:0 + +#define NV9097_SET_FALCON15 0x233c +#define NV9097_SET_FALCON15_V 31:0 + +#define NV9097_SET_FALCON16 0x2340 +#define NV9097_SET_FALCON16_V 31:0 + +#define NV9097_SET_FALCON17 0x2344 +#define NV9097_SET_FALCON17_V 31:0 + +#define NV9097_SET_FALCON18 0x2348 +#define NV9097_SET_FALCON18_V 31:0 + +#define NV9097_SET_FALCON19 0x234c +#define NV9097_SET_FALCON19_V 31:0 + +#define NV9097_SET_FALCON20 0x2350 +#define NV9097_SET_FALCON20_V 31:0 + +#define NV9097_SET_FALCON21 0x2354 +#define NV9097_SET_FALCON21_V 31:0 + +#define NV9097_SET_FALCON22 0x2358 +#define NV9097_SET_FALCON22_V 31:0 + +#define NV9097_SET_FALCON23 0x235c +#define NV9097_SET_FALCON23_V 31:0 + +#define NV9097_SET_FALCON24 0x2360 +#define NV9097_SET_FALCON24_V 31:0 + +#define NV9097_SET_FALCON25 0x2364 +#define NV9097_SET_FALCON25_V 31:0 + +#define NV9097_SET_FALCON26 0x2368 +#define NV9097_SET_FALCON26_V 31:0 + +#define NV9097_SET_FALCON27 0x236c +#define NV9097_SET_FALCON27_V 31:0 + +#define NV9097_SET_FALCON28 0x2370 +#define NV9097_SET_FALCON28_V 31:0 + +#define NV9097_SET_FALCON29 0x2374 +#define NV9097_SET_FALCON29_V 31:0 + +#define NV9097_SET_FALCON30 0x2378 +#define NV9097_SET_FALCON30_V 31:0 + +#define NV9097_SET_FALCON31 0x237c +#define NV9097_SET_FALCON31_V 31:0 + +#define NV9097_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NV9097_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NV9097_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NV9097_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NV9097_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NV9097_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NV9097_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NV9097_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NV9097_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NV9097_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NV9097_BIND_GROUP_TEXTURE_SAMPLER(j) (0x2400+(j)*32) +#define NV9097_BIND_GROUP_TEXTURE_SAMPLER_VALID 0:0 +#define NV9097_BIND_GROUP_TEXTURE_SAMPLER_VALID_FALSE 0x00000000 +#define NV9097_BIND_GROUP_TEXTURE_SAMPLER_VALID_TRUE 0x00000001 +#define NV9097_BIND_GROUP_TEXTURE_SAMPLER_SAMPLER_SLOT 11:4 +#define NV9097_BIND_GROUP_TEXTURE_SAMPLER_INDEX 24:12 + +#define NV9097_BIND_GROUP_TEXTURE_HEADER(j) (0x2404+(j)*32) +#define NV9097_BIND_GROUP_TEXTURE_HEADER_VALID 0:0 +#define NV9097_BIND_GROUP_TEXTURE_HEADER_VALID_FALSE 0x00000000 +#define NV9097_BIND_GROUP_TEXTURE_HEADER_VALID_TRUE 0x00000001 +#define NV9097_BIND_GROUP_TEXTURE_HEADER_TEXTURE_SLOT 8:1 +#define NV9097_BIND_GROUP_TEXTURE_HEADER_INDEX 30:9 + +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_SAMPLER(j) (0x2408+(j)*32) +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_SAMPLER_VALID 0:0 +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_SAMPLER_VALID_FALSE 0x00000000 +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_SAMPLER_VALID_TRUE 0x00000001 +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_SAMPLER_SAMPLER_SLOT 11:4 +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_SAMPLER_INDEX 24:12 + +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_HEADER(j) (0x240c+(j)*32) +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_HEADER_VALID 0:0 +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_HEADER_VALID_FALSE 0x00000000 +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_HEADER_VALID_TRUE 0x00000001 +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_HEADER_TEXTURE_SLOT 8:1 +#define NV9097_BIND_GROUP_EXTRA_TEXTURE_HEADER_INDEX 30:9 + +#define NV9097_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NV9097_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NV9097_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NV9097_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NV9097_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NV9097_RESERVED_GROUP_B_RESERVED_A(j) (0x2500+(j)*32) +#define NV9097_RESERVED_GROUP_B_RESERVED_A_V 0:0 + +#define NV9097_RESERVED_GROUP_B_RESERVED_B(j) (0x2504+(j)*32) +#define NV9097_RESERVED_GROUP_B_RESERVED_B_V 0:0 + +#define NV9097_RESERVED_GROUP_B_RESERVED_C(j) (0x2508+(j)*32) +#define NV9097_RESERVED_GROUP_B_RESERVED_C_V 0:0 + +#define NV9097_RESERVED_GROUP_B_RESERVED_D(j) (0x250c+(j)*32) +#define NV9097_RESERVED_GROUP_B_RESERVED_D_V 0:0 + +#define NV9097_RESERVED_GROUP_B_RESERVED_E(j) (0x2510+(j)*32) +#define NV9097_RESERVED_GROUP_B_RESERVED_E_V 0:0 + +#define NV9097_SET_COLOR_CLAMP 0x2600 +#define NV9097_SET_COLOR_CLAMP_ENABLE 0:0 +#define NV9097_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NV9097_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NV9097_SET_SU_LD_ST_TARGET_A(j) (0x2700+(j)*32) +#define NV9097_SET_SU_LD_ST_TARGET_A_OFFSET_UPPER 7:0 + +#define NV9097_SET_SU_LD_ST_TARGET_B(j) (0x2704+(j)*32) +#define NV9097_SET_SU_LD_ST_TARGET_B_OFFSET_LOWER 31:0 + +#define NV9097_SET_SU_LD_ST_TARGET_C(j) (0x2708+(j)*32) +#define NV9097_SET_SU_LD_ST_TARGET_C_WIDTH 31:0 + +#define NV9097_SET_SU_LD_ST_TARGET_D(j) (0x270c+(j)*32) +#define NV9097_SET_SU_LD_ST_TARGET_D_HEIGHT 16:0 +#define NV9097_SET_SU_LD_ST_TARGET_D_LAYOUT_IN_MEMORY 20:20 +#define NV9097_SET_SU_LD_ST_TARGET_D_LAYOUT_IN_MEMORY_BLOCKLINEAR 0x00000000 +#define NV9097_SET_SU_LD_ST_TARGET_D_LAYOUT_IN_MEMORY_PITCH 0x00000001 + +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT(j) (0x2710+(j)*32) +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_TYPE 0:0 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_TYPE_COLOR 0x00000000 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_TYPE_ZETA 0x00000001 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR 11:4 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_DISABLED 0x00000000 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32_GF32_BF32_AF32 0x000000C0 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS32_GS32_BS32_AS32 0x000000C1 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU32_GU32_BU32_AU32 0x000000C2 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32_GF32_BF32_X32 0x000000C3 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS32_GS32_BS32_X32 0x000000C4 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU32_GU32_BU32_X32 0x000000C5 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R16_G16_B16_A16 0x000000C6 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RN16_GN16_BN16_AN16 0x000000C7 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS16_GS16_BS16_AS16 0x000000C8 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU16_GU16_BU16_AU16 0x000000C9 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16_GF16_BF16_AF16 0x000000CA +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32_GF32 0x000000CB +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS32_GS32 0x000000CC +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU32_GU32 0x000000CD +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16_GF16_BF16_X16 0x000000CE +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8R8G8B8 0x000000CF +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8RL8GL8BL8 0x000000D0 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A2B10G10R10 0x000000D1 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AU2BU10GU10RU10 0x000000D2 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8B8G8R8 0x000000D5 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8BL8GL8RL8 0x000000D6 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AN8BN8GN8RN8 0x000000D7 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AS8BS8GS8RS8 0x000000D8 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AU8BU8GU8RU8 0x000000D9 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R16_G16 0x000000DA +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RN16_GN16 0x000000DB +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS16_GS16 0x000000DC +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU16_GU16 0x000000DD +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16_GF16 0x000000DE +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A2R10G10B10 0x000000DF +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_BF10GF11RF11 0x000000E0 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS32 0x000000E3 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU32 0x000000E4 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32 0x000000E5 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X8R8G8B8 0x000000E6 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X8RL8GL8BL8 0x000000E7 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R5G6B5 0x000000E8 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A1R5G5B5 0x000000E9 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_G8R8 0x000000EA +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_GN8RN8 0x000000EB +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_GS8RS8 0x000000EC +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_GU8RU8 0x000000ED +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R16 0x000000EE +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RN16 0x000000EF +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS16 0x000000F0 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU16 0x000000F1 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16 0x000000F2 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R8 0x000000F3 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RN8 0x000000F4 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RS8 0x000000F5 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RU8 0x000000F6 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8 0x000000F7 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X1R5G5B5 0x000000F8 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X8B8G8R8 0x000000F9 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_X8BL8GL8RL8 0x000000FA +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_Z1R5G5B5 0x000000FB +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_O1R5G5B5 0x000000FC +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_Z8R8G8B8 0x000000FD +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_O8R8G8B8 0x000000FE +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R32 0x000000FF +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A16 0x00000040 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AF16 0x00000041 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_AF32 0x00000042 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_A8R8 0x00000043 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_R16_A16 0x00000044 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF16_AF16 0x00000045 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_COLOR_RF32_AF32 0x00000046 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA 16:12 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_Z16 0x00000013 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_Z24S8 0x00000014 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_X8Z24 0x00000015 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_S8Z24 0x00000016 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_V8Z24 0x00000018 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_ZF32 0x0000000A +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_ZF32_X24S8 0x00000019 +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_X8Z24_X16V8S8 0x0000001D +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_ZF32_X16V8X8 0x0000001E +#define NV9097_SET_SU_LD_ST_TARGET_FORMAT_ZETA_ZF32_X16V8S8 0x0000001F + +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE(j) (0x2714+(j)*32) +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE_WIDTH 3:0 +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT 7:4 +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NV9097_SET_SU_LD_ST_TARGET_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 + +#define NV9097_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NV9097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NV9097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NV9097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NV9097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 2:0 +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 6:4 +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 10:8 +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 14:12 +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 18:16 +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 22:20 +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 26:24 +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 30:28 + +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NV9097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NV9097_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NV9097_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NV9097_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NV9097_CALL_MME_MACRO_V 31:0 + +#define NV9097_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NV9097_CALL_MME_DATA_V 31:0 + +#endif /* _cl_fermi_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl90cc.h b/userspace/sdks/nv570/inc/class/cl90cc.h new file mode 100644 index 0000000..25d8570 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90cc.h @@ -0,0 +1,48 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2013-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90cc_h_ +#define _cl90cc_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define GF100_PROFILER (0x000090CC) + +/* + * Creating the GF100_PROFILER object: + * - The profiler object is instantiated as a child of either the subdevice or + * a channel group or channel, depending on whether reservations + * should be global to the subdevice or per-context. When the profiler + * requests a reservation or information about outstanding reservations, the + * scope of the request is determined by the profiler object's parent class. + */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl90cc_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl90cd.h b/userspace/sdks/nv570/inc/class/cl90cd.h new file mode 100644 index 0000000..4c732eb --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90cd.h @@ -0,0 +1,237 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2017-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* + * NV_EVENT_BUFFER + * An event buffer is shared between user (RO) and kernel(RW). + * It holds debug/profile event data provided by the kernel. + * + */ +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl90cd.finn +// + +#define NV_EVENT_BUFFER (0x90cdU) /* finn: Evaluated from "NV_EVENT_BUFFER_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* + * NV_EVENT_BUFFER_HEADER + * This structure holds the get and put values used to index/consume event buffer. + * Along with other RO data shared with the user. + * + * recordGet/Put: These "pointers" work in the traditional sense: + * - when GET==PUT, the fifo is empty + * - when GET==PUT+1, the fifo is full + * This implies a full fifo always has one "wasted" element. + * + * recordCount: This is the total number of records added to the buffer by the kernel + * This information is filled out when the buffer is setup to keep newest records. + * recordCount = number of records currently in the buffer + overflow count. + * + * recordDropcount: This is the number of event records that are dropped because the + * buffer is full. + * This information is filled out when event buffer is setup to keep oldest records. + * + * vardataDropcount: Event buffer provides a dual stream of data, where the record can contain + * an optional offset to a variable length data buffer. + * This is the number of variable data records that are dropped because the + * buffer is full. + * This information is filled out when event buffer is setup to keep oldest records. + */ +typedef struct NV_EVENT_BUFFER_HEADER { + NvU32 recordGet; + NvU32 recordPut; + NV_DECLARE_ALIGNED(NvU64 recordCount, 8); + NV_DECLARE_ALIGNED(NvU64 recordDropcount, 8); + NV_DECLARE_ALIGNED(NvU64 vardataDropcount, 8); +} NV_EVENT_BUFFER_HEADER; + +/* + * NV_EVENT_BUFFER_RECORD_HEADER + * This is the header added to each event record. + * This helps identify the event type and variable length data is associated with it. + */ +typedef struct NV_EVENT_BUFFER_RECORD_HEADER { + NvU16 type; + NvU16 subtype; + NvU32 varData; // [31: 5] = (varDataOffset >> 5); 0 < vardataOffset <= vardataBufferSize + // [ 4: 1] = reserved for future use + // [ 0: 0] = isVardataStartOffsetZero +} NV_EVENT_BUFFER_RECORD_HEADER; + +/* + * NV_EVENT_BUFFER_RECORD + * This structure defines a generic event record. + * The size of this record is fixed for a given event buffer. + * It is configured by the user during allocation. + */ +typedef struct NV_EVENT_BUFFER_RECORD { + NV_EVENT_BUFFER_RECORD_HEADER recordHeader; + NV_DECLARE_ALIGNED(NvU64 inlinePayload[1], 8); // 1st element of the payload/data + // Do not add more elements here, inlinePayload can contain more than one elements +} NV_EVENT_BUFFER_RECORD; + +#define NV_EVENT_VARDATA_GRANULARITY 32 +#define NV_EVENT_VARDATA_OFFSET_MASK (~(NV_EVENT_VARDATA_GRANULARITY - 1)) +#define NV_EVENT_VARDATA_START_OFFSET_ZERO 0x01 + +/* + * NV_EVENT_BUFFER_ALLOC_PARAMETERS + * + * bufferHeader [OUT] + * This is the user VA offset pointing to the base of NV_EVENT_BUFFER_HEADER. + * + * recordBuffer [OUT] + * This is the user VA offset pointing to the base of the event record buffer. + * This buffer will contain NV_EVENT_BUFFER_RECORDs added by the kernel. + * + * recordSize [IN] + * This is the size of NV_EVENT_BUFFER_RECORD used by this buffer + * + * recordCount [IN] + * This is the number of records that recordBuffer can hold. + * + * vardataBuffer [OUT] + * This is the user VA offset pointing to the base of the variable data buffer. + * + * vardataBufferSize [IN] + * Size of the variable data buffer in bytes. + * + * recordsFreeThreshold [IN] + * This is the notification threshold for the event record buffer. + * This felid specifies the number of records that the buffer can + * still hold before it gets full. + * + * vardataFreeThreshold [IN] + * This is the notification threshold for the vardata buffer. + * This felid specifies the number of bytes that the buffer can + * still hold before it gets full. + * + * notificationHandle [IN] + * When recordsFreeThreshold or vardataFreeThreshold is met, kernel will notify + * user on this handle. If notificationHandle = NULL, event notification + * is disabled. This is an OS specific notification handle. + * It is a Windows event handle or a fd pointer on Linux. + * + * hSubDevice [IN] + * An event buffer can either hold sub-device related events or system events. + * This handle specifies the sub-device to associate this buffer with. + * If this parameter is NULL, then the buffer is tied to the client instead. + * + * flags [IN] + * Set to 0 by default. + * This field can hold any future flags to configure the buffer if needed. + * + * hBufferHeader [IN] + * The backing memory object for the buffer header. Must be a NV01_MEMORY_DEVICELESS object. + * On Windows platforms, a buffer will be internally generated if hBufferHeader is 0. + * + * hRecordBuffer [IN] + * The backing memory object for the record buffer. Must be a NV01_MEMORY_DEVICELESS object. + * On Windows platforms, a buffer will be internally generated if hRecordBuffer is 0. + * + * hVardataBuffer [IN] + * The backing memory object for the vardata buffer. Must be a NV01_MEMORY_DEVICELESS object. + * On Windows platforms, a buffer will be internally generated if hVardataBuffer is 0. + * + */ +#define NV_EVENT_BUFFER_ALLOC_PARAMETERS_MESSAGE_ID (0x90cdU) + +typedef struct NV_EVENT_BUFFER_ALLOC_PARAMETERS { + NV_DECLARE_ALIGNED(NvP64 bufferHeader, 8); + NV_DECLARE_ALIGNED(NvP64 recordBuffer, 8); + NvU32 recordSize; + NvU32 recordCount; + NV_DECLARE_ALIGNED(NvP64 vardataBuffer, 8); + NvU32 vardataBufferSize; + NvU32 recordsFreeThreshold; + NV_DECLARE_ALIGNED(NvU64 notificationHandle, 8); + NvU32 vardataFreeThreshold; + NvHandle hSubDevice; + NvU32 flags; + + NvHandle hBufferHeader; + NvHandle hRecordBuffer; + NvHandle hVardataBuffer; +} NV_EVENT_BUFFER_ALLOC_PARAMETERS; + +/* + * NV_EVENT_BUFFER_BIND + * This class is used to allocate an Event Type object bound to a given event buffer. + * This allocation call associates an event type with an event buffer. + * Multiple event types can be associated with the same buffer as long as they belong to + * the same category i.e. either sub-device or system. + * When event buffer is enabled, if an event bound to this buffer occurs, + * some relevant data gets added to it. + * cl2080.h has a list of sub-device events that can be associated with a buffer + * cl0000.h has a list of system events that can be associated with a buffer + * These defines are also used in class NV01_EVENT_OS_EVENT (0x79) to get event notification + * and class NV01_EVENT_KERNEL_CALLBACK_EX (0x7E) to get kernel callbacks. + * This class extends that support to additionally get relevant data in an event buffer + * + */ +#define NV_EVENT_BUFFER_BIND (0x0000007F) + +/* + * NV_EVENT_BUFFER_BIND_PARAMETERS + * + * bufferHandle [IN] + * Event buffer handle used to bind the given event type + * + * eventType [IN] + * This is one of the eventTypeIDs from cl2080.h/cl000.h + * e.g. NV2080_NOTIFIERS_PSTATE_CHANGE + * + * eventSubtype [IN] + * Event subtype for a given type of event. + * This field is optional depending on if an eventtype has a subtype. + * + * hClientTarget [IN] + * Handle of the target client whose events are to be bound to the given buffer + * e.g. context switch events can be tracked for a given client. + * This field is optional depending on the event type. + * e.g. pstate change events are per gpu but do not depend on a client. + * + * hSrcResource [IN] + * source resource handle for the event type + * e.g. channel handle: RC/context switch can be tracked for a given channel + * This field is optional depending on the event type. + * e.g. pstate change events are per gpu and cannot be sub-categorized + * + * KernelCallbackdata [IN] + * This field is reserved for KERNEL ONLY clients. + * + */ +typedef struct NV_EVENT_BUFFER_BIND_PARAMETERS { + NvHandle bufferHandle; + NvU16 eventType; + NvU16 eventSubtype; + NvHandle hClientTarget; + NvHandle hSrcResource; + NV_DECLARE_ALIGNED(NvP64 KernelCallbackdata, 8); +} NV_EVENT_BUFFER_BIND_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/cl90cdfecs.h b/userspace/sdks/nv570/inc/class/cl90cdfecs.h new file mode 100644 index 0000000..5118249 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90cdfecs.h @@ -0,0 +1,112 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2018 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90cdFecs_h_ +#define _cl90cdFecs_h_ + +/* This file defines parameters for FECS context switch events*/ + +#define NV_EVENT_BUFFER_FECS_VERSION 2 + +/* + * These are the types of context switch events + * This field gets added to NV_EVENT_BUFFER_FECS_RECORD to specify the sub type of fecs event + * Do *not* edit these as they are defined to maintain consistency with Tegra tools + */ +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_SO 0x00 +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_CTXSW_REQ_BY_HOST 0x01 +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_FE_ACK 0x02 +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_FE_ACK_WFI 0x0a +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_FE_ACK_GFXP 0x0b +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_FE_ACK_CTAP 0x0c +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_FE_ACK_CILP 0x0d +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_SAVE_END 0x03 +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_RESTORE_START 0x04 +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_CONTEXT_START 0x05 +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_SIMPLE_START 0x06 +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_SIMPLE_END 0x07 +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_ENGINE_RESET 0xfe +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_INVALID_TIMESTAMP 0xff +#define NV_EVENT_BUFFER_FECS_CTXSWTAG_LAST NV_EVENT_BUFFER_FECS_EVENTS_CTXSWTAG_INVALID_TIMESTAMP + +/* + * Bit fields used to enable a particular sub type of event + */ +#define NV_EVENT_BUFFER_FECS_BITMASK_CTXSWTAG_SO NVBIT(NV_EVENT_BUFFER_FECS_CTXSWTAG_SO) +#define NV_EVENT_BUFFER_FECS_BITMASK_CTXSWTAG_CTXSW_REQ_BY_HOST NVBIT(NV_EVENT_BUFFER_FECS_CTXSWTAG_CTXSW_REQ_BY_HOST) +#define NV_EVENT_BUFFER_FECS_BITMASK_CTXSWTAG_FE_ACK NVBIT(NV_EVENT_BUFFER_FECS_CTXSWTAG_FE_ACK) +#define NV_EVENT_BUFFER_FECS_BITMASK_CTXSWTAG_SAVE_END NVBIT(NV_EVENT_BUFFER_FECS_CTXSWTAG_SAVE_END) +#define NV_EVENT_BUFFER_FECS_BITMASK_CTXSWTAG_RESTORE_START NVBIT(NV_EVENT_BUFFER_FECS_CTXSWTAG_RESTORE_START) +#define NV_EVENT_BUFFER_FECS_BITMASK_CTXSWTAG_CONTEXT_START NVBIT(NV_EVENT_BUFFER_FECS_CTXSWTAG_CONTEXT_START) +#define NV_EVENT_BUFFER_FECS_BITMASK_CTXSWTAG_SIMPLE_START NVBIT(NV_EVENT_BUFFER_FECS_CTXSWTAG_SIMPLE_START) +#define NV_EVENT_BUFFER_FECS_BITMASK_CTXSWTAG_SIMPLE_END NVBIT(NV_EVENT_BUFFER_FECS_CTXSWTAG_SIMPLE_END) + +/* context_id is set to this value if fecs info doesn't match a known channel/tsg handle*/ +#define NV_EVENT_BUFFER_INVALID_CONTEXT 0xFFFFFFFF + +/* + * PID/context_id are set to these values if the data is from another user's + * client and the current user is not an administrator + */ +#define NV_EVENT_BUFFER_HIDDEN_PID 0x0 +#define NV_EVENT_BUFFER_HIDDEN_CONTEXT 0x0 + +/* + * PID/context_id are set to these values if the data is from a kernel client + * and the data is being read by a user client + */ +#define NV_EVENT_BUFFER_KERNEL_PID 0xFFFFFFFF +#define NV_EVENT_BUFFER_KERNEL_CONTEXT 0xFFFFFFFF + +// V1 ------------------------------------------------------------------------ +typedef struct +{ + NvU8 tag; ///< NV_EVENT_BUFFER_FECS_CTXSWTAG_* + NvU8 vmid; + NvU16 seqno; ///< used to detect drop + NvU32 context_id; ///< channel/tsg handle + NvU64 pid NV_ALIGN_BYTES(8); ///< process id + NvU64 timestamp NV_ALIGN_BYTES(8); + /* Do *not* edit items above this to maintain consistency with tegra tools + Always add to the end of this structure to retain backward compatibility */ +} NV_EVENT_BUFFER_FECS_RECORD_V1; + +// V2 ------------------------------------------------------------------------ +typedef struct +{ + NvU8 tag; ///< NV_EVENT_BUFFER_FECS_CTXSWTAG_* + NvU8 vmid; + NvU16 seqno; ///< used to detect drop + NvU32 context_id; ///< channel/tsg handle + NvU32 pid; ///< process id + NvU16 reserved0; + NvU8 migGpuInstanceId; + NvU8 migComputeInstanceId; + NvU64 timestamp NV_ALIGN_BYTES(8); + /* Do *not* edit items above this to maintain consistency with tegra tools + Always add to the end of this structure to retain backward compatibility */ +} NV_EVENT_BUFFER_FECS_RECORD_V2; + +typedef NV_EVENT_BUFFER_FECS_RECORD_V1 NV_EVENT_BUFFER_FECS_RECORD_V0; +typedef NV_EVENT_BUFFER_FECS_RECORD_V1 NV_EVENT_BUFFER_FECS_RECORD; +#endif /* _cl90cdFecs_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl90cdtrace.h b/userspace/sdks/nv570/inc/class/cl90cdtrace.h new file mode 100644 index 0000000..f184719 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90cdtrace.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90cdtrace_h_ +#define _cl90cdtrace_h_ + +#include + +/* This file defines parameters for RATS/RM tracing */ + +typedef struct NV_RATS_GSP_TRACE_RECORD_V1 +{ + NvU16 seqNo; + NvU16 gspSeqNo; + NvU8 threadId; + NvU8 partitionId; + NvU16 reserved0; + NvU64 info; + NvU64 timeStamp; + NvU64 recordType; +} NV_RATS_GSP_TRACE_RECORD_V1; + +typedef NV_RATS_GSP_TRACE_RECORD_V1 NV_RATS_GSP_TRACE_RECORD; + +#define VGPU_TRACING_BUFFER_KEEP_OLDEST 0 +#define VGPU_TRACING_BUFFER_KEEP_NEWEST 1 + +typedef struct NV_RATS_VGPU_GSP_TRACING_BUFFER_V1{ + NvU8 policy; + + NvBool bGuestNotifInProgress; + + NvU16 seqNo; + NvU32 bufferSize; + NvU32 bufferWatermark; + NvU32 recordCount; + + NvU64 tracepointMask; + NvU32 read; + NvU32 write; + + NvU64 lastReadTimestamp; + + NV_RATS_GSP_TRACE_RECORD *buffer; +} NV_RATS_VGPU_GSP_TRACING_BUFFER_V1; + +typedef NV_RATS_VGPU_GSP_TRACING_BUFFER_V1 NV_RATS_VGPU_GSP_TRACING_BUFFER; + +#endif diff --git a/userspace/sdks/nv570/inc/class/cl90cdtypes.h b/userspace/sdks/nv570/inc/class/cl90cdtypes.h new file mode 100644 index 0000000..8190645 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90cdtypes.h @@ -0,0 +1,49 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2019-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90cdtypes_h_ +#define _cl90cdtypes_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +// +// Legacy values record type values have been kept for backward +// compatibility. New values should be added sequentially. +// +#define NV_EVENT_BUFFER_RECORD_TYPE_INVALID (0) +#define NV_EVENT_BUFFER_RECORD_TYPE_VIDEO_TRACE (1) +#define NV_EVENT_BUFFER_RECORD_TYPE_FECS_CTX_SWITCH_V2 (2) +#define NV_EVENT_BUFFER_RECORD_TYPE_NVTELEMETRY_REPORT_EVENT_SYSTEM (4) +#define NV_EVENT_BUFFER_RECORD_TYPE_RATS_GSP_TRACE (8) +#define NV_EVENT_BUFFER_RECORD_TYPE_NVTELEMETRY_REPORT_EVENT_SUBDEVICE (132) +#define NV_EVENT_BUFFER_RECORD_TYPE_FECS_CTX_SWITCH (134) +#define NV_EVENT_BUFFER_RECORD_TYPE_NOCAT_NOTIFY (16) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _cl90cdtypes_h_ + diff --git a/userspace/sdks/nv570/inc/class/cl90cdvideo.h b/userspace/sdks/nv570/inc/class/cl90cdvideo.h new file mode 100644 index 0000000..0d6f49f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90cdvideo.h @@ -0,0 +1,129 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90cdvideo_h_ +#define _cl90cdvideo_h_ + +/* This file defines parameters for FECS context switch events*/ + +#define NV_EVENT_BUFFER_VIDEO_VERSION 1 + +#define NV_EVENT_BUFFER_VIDEO_TAG_ENGINE_START 0x00 +#define NV_EVENT_BUFFER_VIDEO_TAG_ENGINE_END 0x01 +#define NV_EVENT_BUFFER_VIDEO_TAG_PSTATE_CHANGE 0x02 +#define NV_EVENT_BUFFER_VIDEO_TAG_LOG_DATA 0x03 +#define NV_EVENT_BUFFER_VIDEO_TAG_LAST NV_EVENT_BUFFER_VIDEO_TAG_LOG_DATA + +#define NV_EVENT_BUFFER_VIDEO_BITMASK_TAG_ENGINE_START NVBIT(NV_EVENT_BUFFER_VIDEO_TAG_ENGINE_START) +#define NV_EVENT_BUFFER_VIDEO_BITMASK_TAG_ENGINE_END NVBIT(NV_EVENT_BUFFER_VIDEO_TAG_ENGINE_END) +#define NV_EVENT_BUFFER_VIDEO_BITMASK_TAG_PSTATE_CHANGE NVBIT(NV_EVENT_BUFFER_VIDEO_TAG_PSTATE_CHANGE) +#define NV_EVENT_BUFFER_VIDEO_BITMASK_TAG_LOG_DATA NVBIT(NV_EVENT_BUFFER_VIDEO_TAG_LOG_DATA) + +/* context_id is set to this value if fecs info doesn't match a known channel/tsg handle*/ +#define NV_EVENT_BUFFER_VIDEO_INVALID_CONTEXT 0xFFFFFFFF + +/* + * PID/context_id are set to these values if the data is from another user's + * client and the current user is not an administrator + */ +#define NV_EVENT_BUFFER_VIDEO_HIDDEN_PID 0x0 +#define NV_EVENT_BUFFER_VIDEO_HIDDEN_CONTEXT 0x0 + +/* + * PID/context_id are set to these values if the data is from a kernel client + * and the data is being read by a user client + */ +#define NV_EVENT_BUFFER_VIDEO_KERNEL_PID 0xFFFFFFFF +#define NV_EVENT_BUFFER_VIDEO_KERNEL_CONTEXT 0xFFFFFFFF + +typedef enum +{ + NV_EVENT_BUFFER_VIDEO_ENGINE_TYPE__NVDEC = 0, + NV_EVENT_BUFFER_VIDEO_ENGINE_TYPE__NVENC, + NV_EVENT_BUFFER_VIDEO_ENGINE_TYPE__NVJPEG, + NV_EVENT_BUFFER_VIDEO_ENGINE_TYPE__OFA, + NV_EVENT_BUFFER_VIDEO_ENGINE_TYPE__LAST = NV_EVENT_BUFFER_VIDEO_ENGINE_TYPE__OFA, +} NV_EVENT_BUFFER_VIDEO_ENGINE_TYPE; + +typedef enum +{ + NV_EVENT_BUFFER_VIDEO_CODEC_ID__MPEG2 = 0, + NV_EVENT_BUFFER_VIDEO_CODEC_ID__VC1, + NV_EVENT_BUFFER_VIDEO_CODEC_ID__H264, + NV_EVENT_BUFFER_VIDEO_CODEC_ID__MPEG4, + NV_EVENT_BUFFER_VIDEO_CODEC_ID__VP8, + NV_EVENT_BUFFER_VIDEO_CODEC_ID__VP9, + NV_EVENT_BUFFER_VIDEO_CODEC_ID__HEVC, + NV_EVENT_BUFFER_VIDEO_CODEC_ID__AVD, + NV_EVENT_BUFFER_VIDEO_CODEC_ID__LAST = NV_EVENT_BUFFER_VIDEO_CODEC_ID__AVD, +} NV_EVENT_BUFFER_VIDEO_ENGINE_CODEC_ID; + +typedef enum +{ + NV_EVENT_BUFFER_VIDEO_ENGINE_LOG_DATA_TYPE__GENERIC = 0, /* Generic opaque data */ + NV_EVENT_BUFFER_VIDEO_ENGINE_LOG_DATA_TYPE__STR, /* Log data can be interpreted as string */ + NV_EVENT_BUFFER_VIDEO_ENGINE_LOG_DATA_TYPE__BIN, /* Log data is binary data */ + NV_EVENT_BUFFER_VIDEO_ENGINE_LOG_DATA_TYPE__NUM +} NV_EVENT_BUFFER_VIDEO_ENGINE_LOG_DATA_TYPE; + +// V1 ------------------------------------------------------------------------ +typedef struct +{ + NvU8 event_id; ///< NV_EVENT_BUFFER_VIDEO_TAG_* + NvU8 vmid; + NvU16 seqno; + NvU32 context_id; ///< channel/tsg handle + NvU64 pid NV_ALIGN_BYTES(8); ///< process id + NvU64 timestamp NV_ALIGN_BYTES(8); + NvU64 api_id NV_ALIGN_BYTES(8); + union + { + NvU64 event_data; + + struct + { + NvU8 engine_type; + NvU8 engine_id; + NvU16 codec_id; + NvU32 status; + } session; + + struct + { + NvU16 from; + NvU16 to; + } stateChange; + + struct + { + NvU8 engine_type; + NvU8 engine_id; + NvU16 type; + NvU32 size; + } logData; + }; +} NV_EVENT_BUFFER_VIDEO_RECORD_V1; + +typedef NV_EVENT_BUFFER_VIDEO_RECORD_V1 NV_EVENT_BUFFER_VIDEO_RECORD; +#endif /* _cl90cdvideo_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/cl90ce.h b/userspace/sdks/nv570/inc/class/cl90ce.h new file mode 100644 index 0000000..b4506df --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90ce.h @@ -0,0 +1,42 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90ce_h_ +#define _cl90ce_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* +* NV_MEMORY_DEVICELESS +* Memory that is not associated with a device +*/ +#define NV01_MEMORY_DEVICELESS (0x000090CE) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _cl90ce_h_ + diff --git a/userspace/sdks/nv570/inc/class/cl90e6.h b/userspace/sdks/nv570/inc/class/cl90e6.h new file mode 100644 index 0000000..63348ea --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90e6.h @@ -0,0 +1,43 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2012-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90e6_h_ +#define _cl90e6_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define GF100_SUBDEVICE_MASTER (0x000090e6) + +typedef struct { + NvU32 Reserved00[0x400]; /* NV_PMC 0x00000FFF:0x00000000 */ +} Nv90e6MapTypedef, GF100MASTERMap; + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl90e6_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl90e7.h b/userspace/sdks/nv570/inc/class/cl90e7.h new file mode 100644 index 0000000..3219f13 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90e7.h @@ -0,0 +1,38 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2013-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90e7_h_ +#define _cl90e7_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define GF100_SUBDEVICE_INFOROM (0x000090e7) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _cl90e7_h + diff --git a/userspace/sdks/nv570/inc/class/cl90ec.h b/userspace/sdks/nv570/inc/class/cl90ec.h new file mode 100644 index 0000000..182640a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90ec.h @@ -0,0 +1,46 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2011-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl90ec_h_ +#define _cl90ec_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* Class within the subdevice used for communicating with HDACODEC*/ +#define GF100_HDACODEC (0x000090EC) + + /* pio method data structure */ +typedef volatile struct _cl90ec_tag0 { + NvV32 Reserved00[0x7c0]; +} Nv90ECTypedef, GF100Hdacodec; +#define NV90EC_TYPEDEF GF100Hdacodec + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cl9071_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cl90f1.h b/userspace/sdks/nv570/inc/class/cl90f1.h new file mode 100644 index 0000000..7523ef1 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl90f1.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2011 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _cl90f1_h_ +#define _cl90f1_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define FERMI_VASPACE_A (0x000090f1) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cl90f1_h + diff --git a/userspace/sdks/nv570/inc/class/cl9170.h b/userspace/sdks/nv570/inc/class/cl9170.h new file mode 100644 index 0000000..64e520c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9170.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 1993-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cl9170.finn +// + +#define NV9170_DISPLAY (0x9170U) /* finn: Evaluated from "NV9170_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NV9170_ALLOCATION_PARAMETERS_MESSAGE_ID (0x9170U) + +typedef struct NV9170_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numDacs; // Number of DACs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numPiors; // Number of PIORs in this chip/display +} NV9170_ALLOCATION_PARAMETERS; diff --git a/userspace/sdks/nv570/inc/class/cl9171.h b/userspace/sdks/nv570/inc/class/cl9171.h new file mode 100644 index 0000000..731157a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl9171.h @@ -0,0 +1,317 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2011 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl9171_h_ +#define _cl9171_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NV9171_DISP_SF_USER 0x9171 + +typedef volatile struct _cl9171_tag0 { + NvU32 dispSfUserOffset[0x400]; /* NV_PDISP_SF_USER 0x00690FFF:0x00690000 */ +} _Nv9171DispSfUser, Nv9171DispSfUserMap; + +#define NV9171_SF_HDMI_INFO_IDX_AVI_INFOFRAME 0x00000000 /* */ +#define NV9171_SF_HDMI_INFO_IDX_GENERIC_INFOFRAME 0x00000001 /* */ +#define NV9171_SF_HDMI_INFO_IDX_GCP 0x00000003 /* */ +#define NV9171_SF_HDMI_INFO_IDX_VSI 0x00000004 /* */ +#define NV9171_SF_HDMI_INFO_CTRL(i,j) (0x00690000-0x00690000+(i)*1024+(j)*64) /* RWX4A */ +#define NV9171_SF_HDMI_INFO_CTRL__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_INFO_CTRL__SIZE_2 5 /* */ +#define NV9171_SF_HDMI_INFO_CTRL_ENABLE 0:0 /* RWIVF */ +#define NV9171_SF_HDMI_INFO_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_INFO_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_OTHER 4:4 /* RWIVF */ +#define NV9171_SF_HDMI_INFO_CTRL_OTHER_DIS 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_INFO_CTRL_OTHER_EN 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_SINGLE 8:8 /* RWIVF */ +#define NV9171_SF_HDMI_INFO_CTRL_SINGLE_DIS 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_INFO_CTRL_SINGLE_EN 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NV9171_SF_HDMI_INFO_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_CHKSUM_HW_EN 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_CHKSUM_HW_DIS 0x00000000 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NV9171_SF_HDMI_INFO_CTRL_HBLANK 12:12 /* RWIVF */ +#define NV9171_SF_HDMI_INFO_CTRL_HBLANK_DIS 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_INFO_CTRL_HBLANK_EN 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_VIDEO_FMT 16:16 /* RWIVF */ +#define NV9171_SF_HDMI_INFO_CTRL_VIDEO_FMT_SW_CONTROLLED 0x00000000 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_VIDEO_FMT_HW_CONTROLLED 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_INFO_CTRL_VIDEO_FMT_INIT 0x00000001 /* RWI-V */ +#define NV9171_SF_HDMI_INFO_STATUS(i,j) (0x00690004-0x00690000+(i)*1024+(j)*64) /* R--4A */ +#define NV9171_SF_HDMI_INFO_STATUS__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_INFO_STATUS__SIZE_2 5 /* */ +#define NV9171_SF_HDMI_INFO_STATUS_SENT 0:0 /* R--VF */ +#define NV9171_SF_HDMI_INFO_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NV9171_SF_HDMI_INFO_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NV9171_SF_HDMI_INFO_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x00690000-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER 4:4 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_DIS 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_EN 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE 8:8 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_DIS 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_EN 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x00690004-0x00690000+(i)*1024) /* R--4A */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R--VF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x00690008-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x0069000C-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x00690010-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x00690014-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x00690018-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_HEADER(i) (0x00690048-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GENERIC_HEADER__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GENERIC_HEADER_HB0 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_HEADER_HB1 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_HEADER_HB2 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW(i) (0x0069004C-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_HIGH(i) (0x00690050-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW(i) (0x00690054-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_HIGH(i) (0x00690058-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW(i) (0x0069005C-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_HIGH(i) (0x00690060-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_HIGH_PB18 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_HIGH_PB18_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_HIGH_PB19 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_HIGH_PB19_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_HIGH_PB20 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK2_HIGH_PB20_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW(i) (0x00690064-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW_PB21 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW_PB21_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW_PB22 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW_PB22_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW_PB23 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW_PB23_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW_PB24 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_LOW_PB24_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_HIGH(i) (0x00690068-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_HIGH_PB25 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_HIGH_PB25_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_HIGH_PB26 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_HIGH_PB26_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_HIGH_PB27 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GENERIC_SUBPACK3_HIGH_PB27_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GCP_SUBPACK(i) (0x006900CC-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_GCP_SUBPACK__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_GCP_SUBPACK_SB0 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_GCP_SUBPACK_SB0_INIT 0x00000001 /* RWI-V */ +#define NV9171_SF_HDMI_GCP_SUBPACK_SB0_SET_AVMUTE 0x00000001 /* RW--V */ +#define NV9171_SF_HDMI_GCP_SUBPACK_SB0_CLR_AVMUTE 0x00000010 /* RW--V */ +#define NV9171_SF_HDMI_GCP_SUBPACK_SB1 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_GCP_SUBPACK_SB1_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_GCP_SUBPACK_SB2 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_GCP_SUBPACK_SB2_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_HEADER(i) (0x00690108-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_VSI_HEADER__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_VSI_HEADER_HB0 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_HEADER_HB1 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_HEADER_HB2 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW(i) (0x0069010C-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_HIGH(i) (0x00690110-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW(i) (0x00690114-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_HIGH(i) (0x00690118-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW(i) (0x0069011C-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_HIGH(i) (0x00690120-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_HIGH_PB18 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_HIGH_PB18_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_HIGH_PB19 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_HIGH_PB19_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_HIGH_PB20 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK2_HIGH_PB20_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW(i) (0x00690124-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW_PB21 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW_PB21_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW_PB22 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW_PB22_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW_PB23 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW_PB23_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW_PB24 31:24 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_LOW_PB24_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_HIGH(i) (0x00690128-0x00690000+(i)*1024) /* RWX4A */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_HIGH__SIZE_1 4 /* */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_HIGH_PB25 7:0 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_HIGH_PB25_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_HIGH_PB26 15:8 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_HIGH_PB26_INIT 0x00000000 /* RWI-V */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_HIGH_PB27 23:16 /* RWIVF */ +#define NV9171_SF_HDMI_VSI_SUBPACK3_HIGH_PB27_INIT 0x00000000 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _cl9171_h_ diff --git a/userspace/sdks/nv570/inc/class/cl917d.h b/userspace/sdks/nv570/inc/class/cl917d.h new file mode 100644 index 0000000..4f70d81 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cl917d.h @@ -0,0 +1,1551 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _cl917d_h_ +#define _cl917d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NV917D_CORE_CHANNEL_DMA (0x0000917D) + +#define NV917D_CORE_NOTIFIER_3 0x00000000 +#define NV917D_CORE_NOTIFIER_3_SIZEOF 0x00000150 +#define NV917D_CORE_NOTIFIER_3_COMPLETION_0 0x00000000 +#define NV917D_CORE_NOTIFIER_3_COMPLETION_0_DONE 0:0 +#define NV917D_CORE_NOTIFIER_3_COMPLETION_0_DONE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_COMPLETION_0_DONE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_COMPLETION_0_R0 15:1 +#define NV917D_CORE_NOTIFIER_3_COMPLETION_0_TIMESTAMP 29:16 +#define NV917D_CORE_NOTIFIER_3__1 0x00000001 +#define NV917D_CORE_NOTIFIER_3__1_R1 31:0 +#define NV917D_CORE_NOTIFIER_3__2 0x00000002 +#define NV917D_CORE_NOTIFIER_3__2_R2 31:0 +#define NV917D_CORE_NOTIFIER_3__3 0x00000003 +#define NV917D_CORE_NOTIFIER_3__3_R3 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_DONE 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_DONE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_DONE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_VM_USABLE4ISO 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_VM_USABLE4ISO_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_VM_USABLE4ISO_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_NVM_USABLE4ISO 2:2 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_NVM_USABLE4ISO_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_NVM_USABLE4ISO_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_R0 19:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_FOS_FETCH_X4AA 20:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_FOS_FETCH_X4AA_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_FOS_FETCH_X4AA_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_R1 29:21 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_INTERNAL_FLIP_LOCK_PIN0USABLE 30:30 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_INTERNAL_FLIP_LOCK_PIN0USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_INTERNAL_FLIP_LOCK_PIN0USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_INTERNAL_FLIP_LOCK_PIN1USABLE 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_INTERNAL_FLIP_LOCK_PIN1USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_4_INTERNAL_FLIP_LOCK_PIN1USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5 0x00000005 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN0USAGE 3:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN0USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN0USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN0USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN0USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN1USAGE 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN1USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN1USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN1USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN1USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN2USAGE 11:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN2USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN2USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN2USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN2USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN3USAGE 15:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN3USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN3USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN3USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN3USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN4USAGE 19:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN4USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN4USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN4USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN4USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN5USAGE 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN5USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN5USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN5USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN5USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN6USAGE 27:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN6USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN6USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN6USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN6USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN7USAGE 31:28 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN7USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN7USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN7USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_5_LOCK_PIN7USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6 0x00000006 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN8USAGE 3:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN8USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN8USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN8USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN8USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN9USAGE 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN9USAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN9USAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN9USAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN9USAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_AUSAGE 11:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_AUSAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_AUSAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_AUSAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_AUSAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_BUSAGE 15:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_BUSAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_BUSAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_BUSAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_BUSAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_CUSAGE 19:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_CUSAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_CUSAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_CUSAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_CUSAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_DUSAGE 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_DUSAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_DUSAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_DUSAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_DUSAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_EUSAGE 27:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_EUSAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_EUSAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_EUSAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_EUSAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_FUSAGE 31:28 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_FUSAGE_UNAVAILABLE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_FUSAGE_SCAN_LOCK 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_FUSAGE_FLIP_LOCK 0x00000002 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_6_LOCK_PIN_FUSAGE_STEREO 0x00000004 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_7 0x00000007 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_7_DISPCLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_7_R4 31:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_8 0x00000008 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_8_R5 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_9 0x00000009 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_9_R6 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_10 0x0000000A +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_10_R7 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_11 0x0000000B +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_11_R8 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12 0x0000000C +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_RGB_USABLE 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_RGB_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_RGB_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_TV_USABLE 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_TV_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_TV_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_SCART_USABLE 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_SCART_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_SCART_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_12_R0 31:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_13 0x0000000D +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_13_CRT_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC0_13_R1 31:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14 0x0000000E +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_RGB_USABLE 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_RGB_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_RGB_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_TV_USABLE 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_TV_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_TV_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_SCART_USABLE 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_SCART_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_SCART_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_14_R0 31:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_15 0x0000000F +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_15_CRT_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC1_15_R1 31:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16 0x00000010 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_RGB_USABLE 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_RGB_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_RGB_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_TV_USABLE 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_TV_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_TV_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_SCART_USABLE 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_SCART_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_SCART_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_16_R0 31:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_17 0x00000011 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_17_CRT_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC2_17_R1 31:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18 0x00000012 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_RGB_USABLE 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_RGB_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_RGB_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_TV_USABLE 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_TV_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_TV_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_SCART_USABLE 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_SCART_USABLE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_SCART_USABLE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_18_R0 31:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_19 0x00000013 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_19_CRT_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_DAC3_19_R1 31:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20 0x00000014 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS18 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS24 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS18 2:2 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS24 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_R0 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_A 8:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_B 9:9 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_TMDS_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_R1 10:10 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_TMDS 11:11 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_TMDS_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DUAL_TMDS_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_R2 12:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_R3 15:14 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_R4 19:17 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_R5 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_A 24:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_B 25:25 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_INTERLACE 26:26 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_INTERLACE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_DP_INTERLACE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_R6 31:27 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_21 0x00000015 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_21_DP_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_21_R7 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_21_TMDS_LVDS_CLK_MAX 23:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_21_R8 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22 0x00000016 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_LVDS18 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_LVDS24 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DUAL_LVDS18 2:2 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DUAL_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DUAL_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DUAL_LVDS24 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DUAL_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DUAL_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_R0 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_TMDS_A 8:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_TMDS_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_TMDS_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_TMDS_B 9:9 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_TMDS_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_SINGLE_TMDS_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_R1 10:10 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DUAL_TMDS 11:11 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DUAL_TMDS_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DUAL_TMDS_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_R2 12:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_R3 15:14 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_R4 19:17 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_R5 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DP_A 24:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DP_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DP_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DP_B 25:25 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DP_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DP_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DP_INTERLACE 26:26 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DP_INTERLACE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_DP_INTERLACE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_22_R6 31:27 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_23 0x00000017 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_23_DP_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_23_R7 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_23_TMDS_LVDS_CLK_MAX 23:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR1_23_R8 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24 0x00000018 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_LVDS18 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_LVDS24 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DUAL_LVDS18 2:2 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DUAL_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DUAL_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DUAL_LVDS24 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DUAL_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DUAL_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_R0 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_TMDS_A 8:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_TMDS_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_TMDS_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_TMDS_B 9:9 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_TMDS_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_SINGLE_TMDS_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_R1 10:10 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DUAL_TMDS 11:11 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DUAL_TMDS_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DUAL_TMDS_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_R2 12:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_R3 15:14 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_R4 19:17 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_R5 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DP_A 24:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DP_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DP_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DP_B 25:25 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DP_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DP_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DP_INTERLACE 26:26 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DP_INTERLACE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_DP_INTERLACE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_24_R6 31:27 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_25 0x00000019 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_25_DP_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_25_R7 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_25_TMDS_LVDS_CLK_MAX 23:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR2_25_R8 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26 0x0000001A +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_LVDS18 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_LVDS24 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DUAL_LVDS18 2:2 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DUAL_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DUAL_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DUAL_LVDS24 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DUAL_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DUAL_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_R0 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_TMDS_A 8:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_TMDS_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_TMDS_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_TMDS_B 9:9 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_TMDS_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_SINGLE_TMDS_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_R1 10:10 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DUAL_TMDS 11:11 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DUAL_TMDS_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DUAL_TMDS_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_R2 12:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_R3 15:14 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_R4 19:17 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_R5 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DP_A 24:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DP_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DP_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DP_B 25:25 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DP_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DP_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DP_INTERLACE 26:26 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DP_INTERLACE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_DP_INTERLACE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_26_R6 31:27 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_27 0x0000001B +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_27_DP_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_27_R7 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_27_TMDS_LVDS_CLK_MAX 23:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR3_27_R8 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28 0x0000001C +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_LVDS18 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_LVDS24 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DUAL_LVDS18 2:2 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DUAL_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DUAL_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DUAL_LVDS24 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DUAL_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DUAL_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_R0 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_TMDS_A 8:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_TMDS_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_TMDS_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_TMDS_B 9:9 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_TMDS_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_SINGLE_TMDS_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_R1 10:10 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DUAL_TMDS 11:11 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DUAL_TMDS_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DUAL_TMDS_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_R2 12:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_R3 15:14 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_R4 19:17 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_R5 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DP_A 24:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DP_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DP_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DP_B 25:25 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DP_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DP_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DP_INTERLACE 26:26 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DP_INTERLACE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_DP_INTERLACE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_28_R6 31:27 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_29 0x0000001D +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_29_DP_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_29_R7 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_29_TMDS_LVDS_CLK_MAX 23:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR4_29_R8 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30 0x0000001E +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_LVDS18 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_LVDS24 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DUAL_LVDS18 2:2 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DUAL_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DUAL_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DUAL_LVDS24 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DUAL_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DUAL_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_R0 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_TMDS_A 8:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_TMDS_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_TMDS_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_TMDS_B 9:9 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_TMDS_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_SINGLE_TMDS_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_R1 10:10 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DUAL_TMDS 11:11 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DUAL_TMDS_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DUAL_TMDS_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_R2 12:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_R3 15:14 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_R4 19:17 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_R5 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DP_A 24:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DP_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DP_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DP_B 25:25 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DP_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DP_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DP_INTERLACE 26:26 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DP_INTERLACE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_DP_INTERLACE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_30_R6 31:27 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_31 0x0000001F +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_31_DP_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_31_R7 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_31_TMDS_LVDS_CLK_MAX 23:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR5_31_R8 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32 0x00000020 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_LVDS18 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_LVDS24 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DUAL_LVDS18 2:2 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DUAL_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DUAL_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DUAL_LVDS24 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DUAL_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DUAL_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_R0 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_TMDS_A 8:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_TMDS_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_TMDS_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_TMDS_B 9:9 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_TMDS_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_SINGLE_TMDS_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_R1 10:10 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DUAL_TMDS 11:11 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DUAL_TMDS_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DUAL_TMDS_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_R2 12:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_R3 15:14 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_R4 19:17 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_R5 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DP_A 24:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DP_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DP_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DP_B 25:25 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DP_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DP_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DP_INTERLACE 26:26 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DP_INTERLACE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_DP_INTERLACE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_32_R6 31:27 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_33 0x00000021 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_33_DP_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_33_R7 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_33_TMDS_LVDS_CLK_MAX 23:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR6_33_R8 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34 0x00000022 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_LVDS18 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_LVDS24 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DUAL_LVDS18 2:2 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DUAL_LVDS18_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DUAL_LVDS18_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DUAL_LVDS24 3:3 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DUAL_LVDS24_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DUAL_LVDS24_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_R0 7:4 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_TMDS_A 8:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_TMDS_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_TMDS_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_TMDS_B 9:9 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_TMDS_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_SINGLE_TMDS_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_R1 10:10 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DUAL_TMDS 11:11 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DUAL_TMDS_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DUAL_TMDS_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_R2 12:12 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_R3 15:14 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_R4 19:17 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_R5 23:20 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DP_A 24:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DP_A_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DP_A_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DP_B 25:25 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DP_B_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DP_B_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DP_INTERLACE 26:26 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DP_INTERLACE_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_DP_INTERLACE_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_34_R6 31:27 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_35 0x00000023 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_35_DP_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_35_R7 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_35_TMDS_LVDS_CLK_MAX 23:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR7_35_R8 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36 0x00000024 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_EXT_TMDS_ENC 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_EXT_TMDS_ENC_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_EXT_TMDS_ENC_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_EXT_TV_ENC 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_EXT_TV_ENC_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_EXT_TV_ENC_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_EXT_TMDS10BPC_ALLOWED 6:6 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_EXT_TMDS10BPC_ALLOWED_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_EXT_TMDS10BPC_ALLOWED_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_36_R0 31:7 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_37 0x00000025 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_37_EXT_ENC_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_37_R1 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR0_37_R2 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38 0x00000026 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_EXT_TMDS_ENC 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_EXT_TMDS_ENC_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_EXT_TMDS_ENC_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_EXT_TV_ENC 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_EXT_TV_ENC_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_EXT_TV_ENC_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_EXT_TMDS10BPC_ALLOWED 6:6 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_EXT_TMDS10BPC_ALLOWED_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_EXT_TMDS10BPC_ALLOWED_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_38_R0 31:7 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_39 0x00000027 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_39_EXT_ENC_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_39_R1 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR1_39_R2 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40 0x00000028 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_EXT_TMDS_ENC 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_EXT_TMDS_ENC_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_EXT_TMDS_ENC_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_EXT_TV_ENC 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_EXT_TV_ENC_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_EXT_TV_ENC_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_EXT_TMDS10BPC_ALLOWED 6:6 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_EXT_TMDS10BPC_ALLOWED_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_EXT_TMDS10BPC_ALLOWED_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_40_R0 31:7 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_41 0x00000029 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_41_EXT_ENC_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_41_R1 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR2_41_R2 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42 0x0000002A +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_EXT_TMDS_ENC 0:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_EXT_TMDS_ENC_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_EXT_TMDS_ENC_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_EXT_TV_ENC 1:1 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_EXT_TV_ENC_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_EXT_TV_ENC_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_EXT_TMDS10BPC_ALLOWED 6:6 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_EXT_TMDS10BPC_ALLOWED_FALSE 0x00000000 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_EXT_TMDS10BPC_ALLOWED_TRUE 0x00000001 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_42_R0 31:7 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_43 0x0000002B +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_43_EXT_ENC_CLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_43_R1 15:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_PIOR3_43_R2 31:24 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR0_44 0x0000002C +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR0_44_R0 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR0_45 0x0000002D +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR0_45_R1 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR1_46 0x0000002E +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR1_46_R0 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR1_47 0x0000002F +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR1_47_R1 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR2_48 0x00000030 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR2_48_R0 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR2_49 0x00000031 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR2_49_R1 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR3_50 0x00000032 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR3_50_R0 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR3_51 0x00000033 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SIR3_51_R1 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_52 0x00000034 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_52_R0 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_53 0x00000035 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_53_MAX_PIXELS5TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_53_R1 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_53_MAX_PIXELS5TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_53_R2 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_54 0x00000036 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_54_MAX_PIXELS3TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_54_R3 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_54_MAX_PIXELS3TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_54_R4 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_55 0x00000037 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_55_MAX_PIXELS2TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_55_R5 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_55_MAX_PIXELS2TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_55_R6 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_56 0x00000038 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_56_PCLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_56_R7 31:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_57 0x00000039 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_57_R8 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_58 0x0000003A +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_58_R9 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_59 0x0000003B +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD0_59_R10 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_60 0x0000003C +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_60_R0 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_61 0x0000003D +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_61_MAX_PIXELS5TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_61_R1 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_61_MAX_PIXELS5TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_61_R2 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_62 0x0000003E +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_62_MAX_PIXELS3TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_62_R3 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_62_MAX_PIXELS3TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_62_R4 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_63 0x0000003F +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_63_MAX_PIXELS2TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_63_R5 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_63_MAX_PIXELS2TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_63_R6 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_64 0x00000040 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_64_PCLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_64_R7 31:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_65 0x00000041 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_65_R8 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_66 0x00000042 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_66_R9 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_67 0x00000043 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD1_67_R10 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_68 0x00000044 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_68_R0 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_69 0x00000045 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_69_MAX_PIXELS5TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_69_R1 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_69_MAX_PIXELS5TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_69_R2 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_70 0x00000046 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_70_MAX_PIXELS3TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_70_R3 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_70_MAX_PIXELS3TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_70_R4 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_71 0x00000047 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_71_MAX_PIXELS2TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_71_R5 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_71_MAX_PIXELS2TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_71_R6 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_72 0x00000048 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_72_PCLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_72_R7 31:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_73 0x00000049 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_73_R8 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_74 0x0000004A +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_74_R9 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_75 0x0000004B +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD2_75_R10 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_76 0x0000004C +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_76_R0 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_77 0x0000004D +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_77_MAX_PIXELS5TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_77_R1 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_77_MAX_PIXELS5TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_77_R2 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_78 0x0000004E +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_78_MAX_PIXELS3TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_78_R3 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_78_MAX_PIXELS3TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_78_R4 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_79 0x0000004F +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_79_MAX_PIXELS2TAP444 14:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_79_R5 15:15 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_79_MAX_PIXELS2TAP422 30:16 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_79_R6 31:31 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_80 0x00000050 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_80_PCLK_MAX 7:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_80_R7 31:8 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_81 0x00000051 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_81_R8 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_82 0x00000052 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_82_R9 31:0 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_83 0x00000053 +#define NV917D_CORE_NOTIFIER_3_CAPABILITIES_CAP_HEAD3_83_R10 31:0 + + +// dma opcode instructions +#define NV917D_DMA 0x00000000 +#define NV917D_DMA_OPCODE 31:29 +#define NV917D_DMA_OPCODE_METHOD 0x00000000 +#define NV917D_DMA_OPCODE_JUMP 0x00000001 +#define NV917D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NV917D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NV917D_DMA_OPCODE 31:29 +#define NV917D_DMA_OPCODE_METHOD 0x00000000 +#define NV917D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NV917D_DMA_METHOD_COUNT 27:18 +#define NV917D_DMA_METHOD_OFFSET 11:2 +#define NV917D_DMA_DATA 31:0 +#define NV917D_DMA_DATA_NOP 0x00000000 +#define NV917D_DMA_OPCODE 31:29 +#define NV917D_DMA_OPCODE_JUMP 0x00000001 +#define NV917D_DMA_JUMP_OFFSET 11:2 +#define NV917D_DMA_OPCODE 31:29 +#define NV917D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NV917D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NV917D_PUT (0x00000000) +#define NV917D_PUT_PTR 11:2 +#define NV917D_GET (0x00000004) +#define NV917D_GET_PTR 11:2 +#define NV917D_UPDATE (0x00000080) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR(i) (0 +(i)*4):(0 +(i)*4) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR__SIZE_1 4 +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR0 0:0 +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR1 4:4 +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR2 8:8 +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR3 12:12 +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE(i) (1 +(i)*4):(1 +(i)*4) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE__SIZE_1 4 +#define NV917D_UPDATE_INTERLOCK_WITH_BASE_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE0 1:1 +#define NV917D_UPDATE_INTERLOCK_WITH_BASE0_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE0_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE1 5:5 +#define NV917D_UPDATE_INTERLOCK_WITH_BASE1_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE1_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE2 9:9 +#define NV917D_UPDATE_INTERLOCK_WITH_BASE2_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE2_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE3 13:13 +#define NV917D_UPDATE_INTERLOCK_WITH_BASE3_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_BASE3_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY(i) (2 +(i)*4):(2 +(i)*4) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY__SIZE_1 4 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY0 2:2 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY0_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY0_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY1 6:6 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY1_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY1_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY2 10:10 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY2_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY2_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY3 14:14 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY3_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY3_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM(i) (3 +(i)*4):(3 +(i)*4) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM__SIZE_1 4 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0 3:3 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1 7:7 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM2 11:11 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM2_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM2_ENABLE (0x00000001) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM3 15:15 +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM3_DISABLE (0x00000000) +#define NV917D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM3_ENABLE (0x00000001) +#define NV917D_UPDATE_SPECIAL_HANDLING 25:24 +#define NV917D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NV917D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NV917D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NV917D_UPDATE_SPECIAL_HANDLING_REASON 23:16 +#define NV917D_UPDATE_NOT_DRIVER_FRIENDLY 31:31 +#define NV917D_UPDATE_NOT_DRIVER_FRIENDLY_FALSE (0x00000000) +#define NV917D_UPDATE_NOT_DRIVER_FRIENDLY_TRUE (0x00000001) +#define NV917D_UPDATE_NOT_DRIVER_UNFRIENDLY 30:30 +#define NV917D_UPDATE_NOT_DRIVER_UNFRIENDLY_FALSE (0x00000000) +#define NV917D_UPDATE_NOT_DRIVER_UNFRIENDLY_TRUE (0x00000001) +#define NV917D_UPDATE_INHIBIT_INTERRUPTS 29:29 +#define NV917D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NV917D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NV917D_SET_NOTIFIER_CONTROL (0x00000084) +#define NV917D_SET_NOTIFIER_CONTROL_MODE 30:30 +#define NV917D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NV917D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NV917D_SET_NOTIFIER_CONTROL_OFFSET 11:2 +#define NV917D_SET_NOTIFIER_CONTROL_NOTIFY 31:31 +#define NV917D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NV917D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NV917D_SET_NOTIFIER_CONTROL_FORMAT 28:28 +#define NV917D_SET_NOTIFIER_CONTROL_FORMAT_LEGACY (0x00000000) +#define NV917D_SET_NOTIFIER_CONTROL_FORMAT_FOUR_WORD (0x00000001) +#define NV917D_SET_CONTEXT_DMA_NOTIFIER (0x00000088) +#define NV917D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NV917D_GET_CAPABILITIES (0x0000008C) +#define NV917D_GET_CAPABILITIES_DUMMY 31:0 +#define NV917D_SET_SPARE (0x0000016C) +#define NV917D_SET_SPARE_UNUSED 31:0 +#define NV917D_SET_SPARE_NOOP(b) (0x00000170 + (b)*0x00000004) +#define NV917D_SET_SPARE_NOOP_UNUSED 31:0 + +#define NV917D_DAC_SET_CONTROL(a) (0x00000180 + (a)*0x00000020) +#define NV917D_DAC_SET_CONTROL_OWNER_MASK 3:0 +#define NV917D_DAC_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NV917D_DAC_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NV917D_DAC_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NV917D_DAC_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NV917D_DAC_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NV917D_DAC_SET_CONTROL_PROTOCOL 12:8 +#define NV917D_DAC_SET_CONTROL_PROTOCOL_RGB_CRT (0x00000000) +#define NV917D_DAC_SET_CONTROL_PROTOCOL_YUV_CRT (0x00000013) +#define NV917D_DAC_SET_SW_SPARE_A(a) (0x00000184 + (a)*0x00000020) +#define NV917D_DAC_SET_SW_SPARE_A_CODE 31:0 +#define NV917D_DAC_SET_SW_SPARE_B(a) (0x00000188 + (a)*0x00000020) +#define NV917D_DAC_SET_SW_SPARE_B_CODE 31:0 +#define NV917D_DAC_SET_CUSTOM_REASON(a) (0x00000190 + (a)*0x00000020) +#define NV917D_DAC_SET_CUSTOM_REASON_CODE 31:0 + +#define NV917D_SOR_SET_CONTROL(a) (0x00000200 + (a)*0x00000020) +#define NV917D_SOR_SET_CONTROL_OWNER_MASK 3:0 +#define NV917D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NV917D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NV917D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NV917D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NV917D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NV917D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NV917D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NV917D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NV917D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NV917D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NV917D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NV917D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NV917D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NV917D_SOR_SET_CONTROL_DE_SYNC_POLARITY 14:14 +#define NV917D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NV917D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NV917D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NV917D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NV917D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NV917D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NV917D_SOR_SET_SW_SPARE_A(a) (0x00000204 + (a)*0x00000020) +#define NV917D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NV917D_SOR_SET_SW_SPARE_B(a) (0x00000208 + (a)*0x00000020) +#define NV917D_SOR_SET_SW_SPARE_B_CODE 31:0 +#define NV917D_SOR_SET_CUSTOM_REASON(a) (0x00000210 + (a)*0x00000020) +#define NV917D_SOR_SET_CUSTOM_REASON_CODE 31:0 + +#define NV917D_PIOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NV917D_PIOR_SET_CONTROL_OWNER_MASK 3:0 +#define NV917D_PIOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NV917D_PIOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NV917D_PIOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NV917D_PIOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NV917D_PIOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NV917D_PIOR_SET_CONTROL_PROTOCOL 11:8 +#define NV917D_PIOR_SET_CONTROL_PROTOCOL_EXT_TMDS_ENC (0x00000000) +#define NV917D_PIOR_SET_CONTROL_PROTOCOL_EXT_TV_ENC (0x00000001) +#define NV917D_PIOR_SET_CONTROL_DE_SYNC_POLARITY 14:14 +#define NV917D_PIOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NV917D_PIOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NV917D_PIOR_SET_SW_SPARE_A(a) (0x00000304 + (a)*0x00000020) +#define NV917D_PIOR_SET_SW_SPARE_A_CODE 31:0 +#define NV917D_PIOR_SET_SW_SPARE_B(a) (0x00000308 + (a)*0x00000020) +#define NV917D_PIOR_SET_SW_SPARE_B_CODE 31:0 +#define NV917D_PIOR_SET_CUSTOM_REASON(a) (0x00000310 + (a)*0x00000020) +#define NV917D_PIOR_SET_CUSTOM_REASON_CODE 31:0 + +#define NV917D_HEAD_SET_PRESENT_CONTROL(a) (0x00000400 + (a)*0x00000300) +#define NV917D_HEAD_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NV917D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 8:8 +#define NV917D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NV917D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NV917D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00000404 + (a)*0x00000300) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 3:3 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 4:4 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 9:6 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_DEFAULT (0x00000000) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000001) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000002) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000003) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000004) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000005) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000006) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000007) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000008) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000009) +#define NV917D_HEAD_SET_CONTROL(a) (0x00000408 + (a)*0x00000300) +#define NV917D_HEAD_SET_CONTROL_STRUCTURE 0:0 +#define NV917D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NV917D_HEAD_SET_CONTROL_STRUCTURE_INTERLACED (0x00000001) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE 3:2 +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_NO_LOCK (0x00000000) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN 19:15 +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN(i) (0x00000000 +(i)) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_0 (0x00000000) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_1 (0x00000001) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_2 (0x00000002) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_3 (0x00000003) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_4 (0x00000004) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_5 (0x00000005) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_6 (0x00000006) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_7 (0x00000007) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_8 (0x00000008) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_9 (0x00000009) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_A (0x0000000A) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_B (0x0000000B) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_C (0x0000000C) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_D (0x0000000D) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_E (0x0000000E) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_F (0x0000000F) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_UNSPECIFIED (0x00000010) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 4 +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK(i) (0x0000001E +(i)) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK__SIZE_1 2 +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x0000001E) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x0000001F) +#define NV917D_HEAD_SET_CONTROL_SLAVE_LOCKOUT_WINDOW 7:4 +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_MODE 9:8 +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_NO_LOCK (0x00000000) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN 14:10 +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN(i) (0x00000000 +(i)) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_0 (0x00000000) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_1 (0x00000001) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_2 (0x00000002) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_3 (0x00000003) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_4 (0x00000004) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_5 (0x00000005) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_6 (0x00000006) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_7 (0x00000007) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_8 (0x00000008) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_9 (0x00000009) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_A (0x0000000A) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_B (0x0000000B) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_C (0x0000000C) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_D (0x0000000D) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_E (0x0000000E) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_F (0x0000000F) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_UNSPECIFIED (0x00000010) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 4 +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK(i) (0x0000001E +(i)) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK__SIZE_1 2 +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x0000001E) +#define NV917D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x0000001F) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK 1:1 +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_DISABLE (0x00000000) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_ENABLE (0x00000001) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN 24:20 +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000000 +(i)) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000000) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000001) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000002) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000003) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000004) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000005) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000006) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000007) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000008) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_9 (0x00000009) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000A) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000B) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000C) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000D) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000E) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_LOCK_PIN_F (0x0000000F) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_UNSPECIFIED (0x00000010) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 4 +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK(i) (0x0000001E +(i)) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK__SIZE_1 2 +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x0000001E) +#define NV917D_HEAD_SET_CONTROL_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x0000001F) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN 29:25 +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000000 +(i)) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000000) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000001) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000002) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000003) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000004) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000005) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000006) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000007) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000008) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x00000009) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000A) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000B) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000C) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000D) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000E) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x0000000F) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_UNSPECIFIED (0x00000010) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 4 +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK(i) (0x0000001E +(i)) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK__SIZE_1 2 +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x0000001E) +#define NV917D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x0000001F) +#define NV917D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE 30:30 +#define NV917D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE 31:31 +#define NV917D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_OVERSCAN_COLOR(a) (0x00000410 + (a)*0x00000300) +#define NV917D_HEAD_SET_OVERSCAN_COLOR_RED 9:0 +#define NV917D_HEAD_SET_OVERSCAN_COLOR_GRN 19:10 +#define NV917D_HEAD_SET_OVERSCAN_COLOR_BLU 29:20 +#define NV917D_HEAD_SET_RASTER_SIZE(a) (0x00000414 + (a)*0x00000300) +#define NV917D_HEAD_SET_RASTER_SIZE_WIDTH 14:0 +#define NV917D_HEAD_SET_RASTER_SIZE_HEIGHT 30:16 +#define NV917D_HEAD_SET_RASTER_SYNC_END(a) (0x00000418 + (a)*0x00000300) +#define NV917D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NV917D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NV917D_HEAD_SET_RASTER_BLANK_END(a) (0x0000041C + (a)*0x00000300) +#define NV917D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NV917D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NV917D_HEAD_SET_RASTER_BLANK_START(a) (0x00000420 + (a)*0x00000300) +#define NV917D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NV917D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NV917D_HEAD_SET_RASTER_VERT_BLANK2(a) (0x00000424 + (a)*0x00000300) +#define NV917D_HEAD_SET_RASTER_VERT_BLANK2_YSTART 14:0 +#define NV917D_HEAD_SET_RASTER_VERT_BLANK2_YEND 30:16 +#define NV917D_HEAD_SET_LOCK_CHAIN(a) (0x00000428 + (a)*0x00000300) +#define NV917D_HEAD_SET_LOCK_CHAIN_POSITION 27:24 +#define NV917D_HEAD_SET_DEFAULT_BASE_COLOR(a) (0x0000042C + (a)*0x00000300) +#define NV917D_HEAD_SET_DEFAULT_BASE_COLOR_RED 9:0 +#define NV917D_HEAD_SET_DEFAULT_BASE_COLOR_GREEN 19:10 +#define NV917D_HEAD_SET_DEFAULT_BASE_COLOR_BLUE 29:20 +#define NV917D_HEAD_SET_CRC_CONTROL(a) (0x00000430 + (a)*0x00000300) +#define NV917D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 1:0 +#define NV917D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000000) +#define NV917D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_BASE (0x00000001) +#define NV917D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_OVERLAY (0x00000002) +#define NV917D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 2:2 +#define NV917D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NV917D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NV917D_HEAD_SET_CRC_CONTROL_TIMESTAMP_MODE 3:3 +#define NV917D_HEAD_SET_CRC_CONTROL_TIMESTAMP_MODE_FALSE (0x00000000) +#define NV917D_HEAD_SET_CRC_CONTROL_TIMESTAMP_MODE_TRUE (0x00000001) +#define NV917D_HEAD_SET_CRC_CONTROL_FLIPLOCK_MODE 4:4 +#define NV917D_HEAD_SET_CRC_CONTROL_FLIPLOCK_MODE_FALSE (0x00000000) +#define NV917D_HEAD_SET_CRC_CONTROL_FLIPLOCK_MODE_TRUE (0x00000001) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT 19:8 +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC(i) (0x00000FF0 +(i)) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC__SIZE_1 4 +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC0 (0x00000FF0) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC1 (0x00000FF1) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC2 (0x00000FF2) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_DAC3 (0x00000FF3) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG(i) (0x00000FF8 +(i)) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG__SIZE_1 4 +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG0 (0x00000FF8) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG1 (0x00000FF9) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG2 (0x00000FFA) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_RG3 (0x00000FFB) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR(i) (0x00000F0F +(i)*16) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR__SIZE_1 8 +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR0 (0x00000F0F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR1 (0x00000F1F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR2 (0x00000F2F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR3 (0x00000F3F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR4 (0x00000F4F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR5 (0x00000F5F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR6 (0x00000F6F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SOR7 (0x00000F7F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF(i) (0x00000F8F +(i)*16) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF__SIZE_1 4 +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF0 (0x00000F8F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF1 (0x00000F9F) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF2 (0x00000FAF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_SF3 (0x00000FBF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR(i) (0x000000FF +(i)*256) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR__SIZE_1 8 +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR0 (0x000000FF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR1 (0x000001FF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR2 (0x000002FF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR3 (0x000003FF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR4 (0x000004FF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR5 (0x000005FF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR6 (0x000006FF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_PIOR7 (0x000007FF) +#define NV917D_HEAD_SET_CRC_CONTROL_PRIMARY_OUTPUT_NONE (0x00000FFF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT 31:20 +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC(i) (0x00000FF0 +(i)) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC__SIZE_1 4 +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC0 (0x00000FF0) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC1 (0x00000FF1) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC2 (0x00000FF2) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_DAC3 (0x00000FF3) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG(i) (0x00000FF8 +(i)) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG__SIZE_1 4 +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG0 (0x00000FF8) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG1 (0x00000FF9) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG2 (0x00000FFA) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_RG3 (0x00000FFB) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR(i) (0x00000F0F +(i)*16) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR__SIZE_1 8 +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR0 (0x00000F0F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR1 (0x00000F1F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR2 (0x00000F2F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR3 (0x00000F3F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR4 (0x00000F4F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR5 (0x00000F5F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR6 (0x00000F6F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SOR7 (0x00000F7F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF(i) (0x00000F8F +(i)*16) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF__SIZE_1 4 +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF0 (0x00000F8F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF1 (0x00000F9F) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF2 (0x00000FAF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_SF3 (0x00000FBF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR(i) (0x000000FF +(i)*256) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR__SIZE_1 8 +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR0 (0x000000FF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR1 (0x000001FF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR2 (0x000002FF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR3 (0x000003FF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR4 (0x000004FF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR5 (0x000005FF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR6 (0x000006FF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_PIOR7 (0x000007FF) +#define NV917D_HEAD_SET_CRC_CONTROL_SECONDARY_OUTPUT_NONE (0x00000FFF) +#define NV917D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 5:5 +#define NV917D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_CRC_CONTROL_WIDE_PIPE_CRC 6:6 +#define NV917D_HEAD_SET_CRC_CONTROL_WIDE_PIPE_CRC_DISABLE (0x00000000) +#define NV917D_HEAD_SET_CRC_CONTROL_WIDE_PIPE_CRC_ENABLE (0x00000001) +#define NV917D_HEAD_SET_CONTEXT_DMA_CRC(a) (0x00000438 + (a)*0x00000300) +#define NV917D_HEAD_SET_CONTEXT_DMA_CRC_HANDLE 31:0 +#define NV917D_HEAD_SET_BASE_LUT_LO(a) (0x00000440 + (a)*0x00000300) +#define NV917D_HEAD_SET_BASE_LUT_LO_ENABLE 31:31 +#define NV917D_HEAD_SET_BASE_LUT_LO_ENABLE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_BASE_LUT_LO_ENABLE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_BASE_LUT_LO_MODE 27:24 +#define NV917D_HEAD_SET_BASE_LUT_LO_MODE_LORES (0x00000000) +#define NV917D_HEAD_SET_BASE_LUT_LO_MODE_HIRES (0x00000001) +#define NV917D_HEAD_SET_BASE_LUT_LO_MODE_INDEX_1025_UNITY_RANGE (0x00000003) +#define NV917D_HEAD_SET_BASE_LUT_LO_MODE_INTERPOLATE_1025_UNITY_RANGE (0x00000004) +#define NV917D_HEAD_SET_BASE_LUT_LO_MODE_INTERPOLATE_1025_XRBIAS_RANGE (0x00000005) +#define NV917D_HEAD_SET_BASE_LUT_LO_MODE_INTERPOLATE_1025_XVYCC_RANGE (0x00000006) +#define NV917D_HEAD_SET_BASE_LUT_LO_MODE_INTERPOLATE_257_UNITY_RANGE (0x00000007) +#define NV917D_HEAD_SET_BASE_LUT_LO_MODE_INTERPOLATE_257_LEGACY_RANGE (0x00000008) +#define NV917D_HEAD_SET_BASE_LUT_LO_NEVER_YIELD_TO_BASE 20:20 +#define NV917D_HEAD_SET_BASE_LUT_LO_NEVER_YIELD_TO_BASE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_BASE_LUT_LO_NEVER_YIELD_TO_BASE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_BASE_LUT_HI(a) (0x00000444 + (a)*0x00000300) +#define NV917D_HEAD_SET_BASE_LUT_HI_ORIGIN 31:0 +#define NV917D_HEAD_SET_OUTPUT_LUT_LO(a) (0x00000448 + (a)*0x00000300) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_ENABLE 31:31 +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_ENABLE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_ENABLE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_MODE 27:24 +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_MODE_LORES (0x00000000) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_MODE_HIRES (0x00000001) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_MODE_INDEX_1025_UNITY_RANGE (0x00000003) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_1025_UNITY_RANGE (0x00000004) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_1025_XRBIAS_RANGE (0x00000005) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_1025_XVYCC_RANGE (0x00000006) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_257_UNITY_RANGE (0x00000007) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_MODE_INTERPOLATE_257_LEGACY_RANGE (0x00000008) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_NEVER_YIELD_TO_BASE 20:20 +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_NEVER_YIELD_TO_BASE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_OUTPUT_LUT_LO_NEVER_YIELD_TO_BASE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_OUTPUT_LUT_HI(a) (0x0000044C + (a)*0x00000300) +#define NV917D_HEAD_SET_OUTPUT_LUT_HI_ORIGIN 31:0 +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x00000450 + (a)*0x00000300) +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x00000454 + (a)*0x00000300) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_MODE 21:20 +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_MODE_CLK_25 (0x00000000) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_MODE_CLK_28 (0x00000001) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_MODE_CLK_CUSTOM (0x00000002) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 24:24 +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_ENABLE_HOPPING 25:25 +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_ENABLE_HOPPING_FALSE (0x00000000) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_ENABLE_HOPPING_TRUE (0x00000001) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 26:26 +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NV917D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00000458 + (a)*0x00000300) +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NV917D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NV917D_HEAD_SET_CONTEXT_DMA_LUT(a) (0x0000045C + (a)*0x00000300) +#define NV917D_HEAD_SET_CONTEXT_DMA_LUT_HANDLE 31:0 +#define NV917D_HEAD_SET_OFFSET(a) (0x00000460 + (a)*0x00000300) +#define NV917D_HEAD_SET_OFFSET_ORIGIN 31:0 +#define NV917D_HEAD_SET_SIZE(a) (0x00000468 + (a)*0x00000300) +#define NV917D_HEAD_SET_SIZE_WIDTH 15:0 +#define NV917D_HEAD_SET_SIZE_HEIGHT 31:16 +#define NV917D_HEAD_SET_STORAGE(a) (0x0000046C + (a)*0x00000300) +#define NV917D_HEAD_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NV917D_HEAD_SET_STORAGE_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NV917D_HEAD_SET_STORAGE_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NV917D_HEAD_SET_STORAGE_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NV917D_HEAD_SET_STORAGE_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NV917D_HEAD_SET_STORAGE_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NV917D_HEAD_SET_STORAGE_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NV917D_HEAD_SET_STORAGE_PITCH 20:8 +#define NV917D_HEAD_SET_STORAGE_MEMORY_LAYOUT 24:24 +#define NV917D_HEAD_SET_STORAGE_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NV917D_HEAD_SET_STORAGE_MEMORY_LAYOUT_PITCH (0x00000001) +#define NV917D_HEAD_SET_PARAMS(a) (0x00000470 + (a)*0x00000300) +#define NV917D_HEAD_SET_PARAMS_FORMAT 15:8 +#define NV917D_HEAD_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NV917D_HEAD_SET_PARAMS_FORMAT_VOID16 (0x0000001F) +#define NV917D_HEAD_SET_PARAMS_FORMAT_VOID32 (0x0000002E) +#define NV917D_HEAD_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NV917D_HEAD_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NV917D_HEAD_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NV917D_HEAD_SET_PARAMS_FORMAT_X2BL10GL10RL10_XRBIAS (0x00000022) +#define NV917D_HEAD_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NV917D_HEAD_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NV917D_HEAD_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NV917D_HEAD_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NV917D_HEAD_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NV917D_HEAD_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NV917D_HEAD_SET_PARAMS_SUPER_SAMPLE 1:0 +#define NV917D_HEAD_SET_PARAMS_SUPER_SAMPLE_X1_AA (0x00000000) +#define NV917D_HEAD_SET_PARAMS_SUPER_SAMPLE_X4_AA (0x00000002) +#define NV917D_HEAD_SET_PARAMS_GAMMA 2:2 +#define NV917D_HEAD_SET_PARAMS_GAMMA_LINEAR (0x00000000) +#define NV917D_HEAD_SET_PARAMS_GAMMA_SRGB (0x00000001) +#define NV917D_HEAD_SET_CONTEXT_DMAS_ISO(a) (0x00000474 + (a)*0x00000300) +#define NV917D_HEAD_SET_CONTEXT_DMAS_ISO_HANDLE 31:0 +#define NV917D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x0000047C + (a)*0x00000300) +#define NV917D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 1:0 +#define NV917D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NV917D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NV917D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_SPEC_FLIP (0x00000002) +#define NV917D_HEAD_SET_CONTROL_CURSOR(a) (0x00000480 + (a)*0x00000300) +#define NV917D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NV917D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_CONTROL_CURSOR_FORMAT 25:24 +#define NV917D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x00000000) +#define NV917D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x00000001) +#define NV917D_HEAD_SET_CONTROL_CURSOR_SIZE 27:26 +#define NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NV917D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 15:8 +#define NV917D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 23:16 +#define NV917D_HEAD_SET_CONTROL_CURSOR_COMPOSITION 29:28 +#define NV917D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_ALPHA_BLEND (0x00000000) +#define NV917D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_PREMULT_ALPHA_BLEND (0x00000001) +#define NV917D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_XOR (0x00000002) +#define NV917D_HEAD_SET_OFFSETS_CURSOR(a,b) (0x00000484 + (a)*0x00000300 + (b)*0x00000004) +#define NV917D_HEAD_SET_OFFSETS_CURSOR_ORIGIN 31:0 +#define NV917D_HEAD_SET_CONTEXT_DMAS_CURSOR(a,b) (0x0000048C + (a)*0x00000300 + (b)*0x00000004) +#define NV917D_HEAD_SET_CONTEXT_DMAS_CURSOR_HANDLE 31:0 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00000494 + (a)*0x00000300) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_1 (0x00000000) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_3 (0x00000002) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_3_ADAPTIVE (0x00000003) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 4:3 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_1 (0x00000000) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_8 (0x00000002) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_HRESPONSE_BIAS 23:16 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_VRESPONSE_BIAS 31:24 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_FORCE422 8:8 +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_FORCE422_DISABLE (0x00000000) +#define NV917D_HEAD_SET_CONTROL_OUTPUT_SCALER_FORCE422_ENABLE (0x00000001) +#define NV917D_HEAD_SET_PROCAMP(a) (0x00000498 + (a)*0x00000300) +#define NV917D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NV917D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NV917D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NV917D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NV917D_HEAD_SET_PROCAMP_CHROMA_LPF 2:2 +#define NV917D_HEAD_SET_PROCAMP_CHROMA_LPF_AUTO (0x00000000) +#define NV917D_HEAD_SET_PROCAMP_CHROMA_LPF_ON (0x00000001) +#define NV917D_HEAD_SET_PROCAMP_SAT_COS 19:8 +#define NV917D_HEAD_SET_PROCAMP_SAT_SINE 31:20 +#define NV917D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 5:5 +#define NV917D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NV917D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NV917D_HEAD_SET_PROCAMP_RANGE_COMPRESSION 6:6 +#define NV917D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_DISABLE (0x00000000) +#define NV917D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_ENABLE (0x00000001) +#define NV917D_HEAD_SET_DITHER_CONTROL(a) (0x000004A0 + (a)*0x00000300) +#define NV917D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NV917D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_DITHER_CONTROL_BITS 2:1 +#define NV917D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_6_BITS (0x00000000) +#define NV917D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_8_BITS (0x00000001) +#define NV917D_HEAD_SET_DITHER_CONTROL_BITS_DITHER_TO_10_BITS (0x00000002) +#define NV917D_HEAD_SET_DITHER_CONTROL_MODE 6:3 +#define NV917D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NV917D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NV917D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NV917D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NV917D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NV917D_HEAD_SET_DITHER_CONTROL_PHASE 8:7 +#define NV917D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x000004B0 + (a)*0x00000300) +#define NV917D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NV917D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NV917D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x000004B8 + (a)*0x00000300) +#define NV917D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NV917D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NV917D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x000004BC + (a)*0x00000300) +#define NV917D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NV917D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NV917D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x000004C0 + (a)*0x00000300) +#define NV917D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NV917D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NV917D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN(a) (0x000004C4 + (a)*0x00000300) +#define NV917D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN_WIDTH 14:0 +#define NV917D_HEAD_SET_VIEWPORT_SIZE_OUT_MIN_HEIGHT 30:16 +#define NV917D_HEAD_SET_VIEWPORT_SIZE_OUT_MAX(a) (0x000004C8 + (a)*0x00000300) +#define NV917D_HEAD_SET_VIEWPORT_SIZE_OUT_MAX_WIDTH 14:0 +#define NV917D_HEAD_SET_VIEWPORT_SIZE_OUT_MAX_HEIGHT 30:16 +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(a) (0x000004D0 + (a)*0x00000300) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE 0:0 +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE_FALSE (0x00000000) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_USABLE_TRUE (0x00000001) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH 11:8 +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_8 (0x00000000) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_16 (0x00000001) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_32 (0x00000003) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_PIXEL_DEPTH_BPP_64 (0x00000005) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE 13:12 +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE_X1_AA (0x00000000) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_SUPER_SAMPLE_X4_AA (0x00000002) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_BASE_LUT 17:16 +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_BASE_LUT_USAGE_NONE (0x00000000) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_BASE_LUT_USAGE_257 (0x00000001) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_BASE_LUT_USAGE_1025 (0x00000002) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_OUTPUT_LUT 21:20 +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_OUTPUT_LUT_USAGE_NONE (0x00000000) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_OUTPUT_LUT_USAGE_257 (0x00000001) +#define NV917D_HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS_OUTPUT_LUT_USAGE_1025 (0x00000002) +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS(a) (0x000004D4 + (a)*0x00000300) +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE 0:0 +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE_FALSE (0x00000000) +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_USABLE_TRUE (0x00000001) +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH 11:8 +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_16 (0x00000001) +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_32 (0x00000003) +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_PIXEL_DEPTH_BPP_64 (0x00000005) +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_OVERLAY_LUT 13:12 +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_OVERLAY_LUT_USAGE_NONE (0x00000000) +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_OVERLAY_LUT_USAGE_257 (0x00000001) +#define NV917D_HEAD_SET_OVERLAY_USAGE_BOUNDS_OVERLAY_LUT_USAGE_1025 (0x00000002) +#define NV917D_HEAD_SET_PROCESSING(a) (0x000004E0 + (a)*0x00000300) +#define NV917D_HEAD_SET_PROCESSING_USE_GAIN_OFS 0:0 +#define NV917D_HEAD_SET_PROCESSING_USE_GAIN_OFS_DISABLE (0x00000000) +#define NV917D_HEAD_SET_PROCESSING_USE_GAIN_OFS_ENABLE (0x00000001) +#define NV917D_HEAD_SET_CONVERSION_RED(a) (0x000004E4 + (a)*0x00000300) +#define NV917D_HEAD_SET_CONVERSION_RED_GAIN 15:0 +#define NV917D_HEAD_SET_CONVERSION_RED_OFS 31:16 +#define NV917D_HEAD_SET_CONVERSION_GRN(a) (0x000004E8 + (a)*0x00000300) +#define NV917D_HEAD_SET_CONVERSION_GRN_GAIN 15:0 +#define NV917D_HEAD_SET_CONVERSION_GRN_OFS 31:16 +#define NV917D_HEAD_SET_CONVERSION_BLU(a) (0x000004EC + (a)*0x00000300) +#define NV917D_HEAD_SET_CONVERSION_BLU_GAIN 15:0 +#define NV917D_HEAD_SET_CONVERSION_BLU_OFS 31:16 +#define NV917D_HEAD_SET_CSC_RED2RED(a) (0x000004F0 + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_RED2RED_NEVER_YIELD_TO_BASE 31:31 +#define NV917D_HEAD_SET_CSC_RED2RED_NEVER_YIELD_TO_BASE_DISABLE (0x00000000) +#define NV917D_HEAD_SET_CSC_RED2RED_NEVER_YIELD_TO_BASE_ENABLE (0x00000001) +#define NV917D_HEAD_SET_CSC_RED2RED_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_GRN2RED(a) (0x000004F4 + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_GRN2RED_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_BLU2RED(a) (0x000004F8 + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_BLU2RED_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_CONSTANT2RED(a) (0x000004FC + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_CONSTANT2RED_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_RED2GRN(a) (0x00000500 + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_RED2GRN_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_GRN2GRN(a) (0x00000504 + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_GRN2GRN_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_BLU2GRN(a) (0x00000508 + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_BLU2GRN_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_CONSTANT2GRN(a) (0x0000050C + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_CONSTANT2GRN_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_RED2BLU(a) (0x00000510 + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_RED2BLU_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_GRN2BLU(a) (0x00000514 + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_GRN2BLU_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_BLU2BLU(a) (0x00000518 + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_BLU2BLU_COEFF 18:0 +#define NV917D_HEAD_SET_CSC_CONSTANT2BLU(a) (0x0000051C + (a)*0x00000300) +#define NV917D_HEAD_SET_CSC_CONSTANT2BLU_COEFF 18:0 +#define NV917D_HEAD_SET_HDMI_CTRL(a) (0x00000520 + (a)*0x00000300) +#define NV917D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NV917D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NV917D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NV917D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NV917D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NV917D_HEAD_SET_HDMI_CTRL_STEREO3D_STRUCTURE 15:12 +#define NV917D_HEAD_SET_HDMI_CTRL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000000) +#define NV917D_HEAD_SET_HDMI_CTRL_STEREO3D_STRUCTURE_FIELD_ALTERNATIVE (0x00000001) +#define NV917D_HEAD_SET_HDMI_CTRL_STEREO3D_STRUCTURE_LINE_ALTERNATIVE (0x00000002) +#define NV917D_HEAD_SET_HDMI_CTRL_STEREO3D_STRUCTURE_SIDE_BY_SIDE_FULL (0x00000003) +#define NV917D_HEAD_SET_HDMI_CTRL_STEREO3D_STRUCTURE_L_DEPTH (0x00000004) +#define NV917D_HEAD_SET_HDMI_CTRL_STEREO3D_STRUCTURE_L_DEPTH_GRAPHICS (0x00000005) +#define NV917D_HEAD_SET_HDMI_CTRL_STEREO3D_STRUCTURE_TOP_AND_BOTTOM (0x00000006) +#define NV917D_HEAD_SET_HDMI_CTRL_STEREO3D_STRUCTURE_SIDE_BY_SIDE_HALF (0x00000008) +#define NV917D_HEAD_SET_VACTIVE_SPACE_COLOR(a) (0x00000524 + (a)*0x00000300) +#define NV917D_HEAD_SET_VACTIVE_SPACE_COLOR_RED_CR 9:0 +#define NV917D_HEAD_SET_VACTIVE_SPACE_COLOR_GRN_Y 19:10 +#define NV917D_HEAD_SET_VACTIVE_SPACE_COLOR_BLU_CB 29:20 +#define NV917D_HEAD_SET_DISPLAY_ID(a,b) (0x0000052C + (a)*0x00000300 + (b)*0x00000004) +#define NV917D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NV917D_HEAD_SET_SW_SPARE_A(a) (0x0000054C + (a)*0x00000300) +#define NV917D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NV917D_HEAD_SET_SW_SPARE_B(a) (0x00000550 + (a)*0x00000300) +#define NV917D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NV917D_HEAD_SET_SW_SPARE_C(a) (0x00000554 + (a)*0x00000300) +#define NV917D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NV917D_HEAD_SET_SW_SPARE_D(a) (0x00000558 + (a)*0x00000300) +#define NV917D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NV917D_HEAD_SET_GET_BLANKING_CTRL(a) (0x0000055C + (a)*0x00000300) +#define NV917D_HEAD_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NV917D_HEAD_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NV917D_HEAD_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NV917D_HEAD_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NV917D_HEAD_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NV917D_HEAD_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) +#define NV917D_HEAD_SET_SW_METHOD_PLACEHOLDER_A(a) (0x000006D0 + (a)*0x00000300) +#define NV917D_HEAD_SET_SW_METHOD_PLACEHOLDER_A_UNUSED 31:0 +#define NV917D_HEAD_SET_SW_METHOD_PLACEHOLDER_B(a) (0x000006D4 + (a)*0x00000300) +#define NV917D_HEAD_SET_SW_METHOD_PLACEHOLDER_B_UNUSED 31:0 +#define NV917D_HEAD_SET_SW_METHOD_PLACEHOLDER_C(a) (0x000006D8 + (a)*0x00000300) +#define NV917D_HEAD_SET_SW_METHOD_PLACEHOLDER_C_UNUSED 31:0 +#define NV917D_HEAD_SET_SW_METHOD_PLACEHOLDER_D(a) (0x000006DC + (a)*0x00000300) +#define NV917D_HEAD_SET_SW_METHOD_PLACEHOLDER_D_UNUSED 31:0 +#define NV917D_HEAD_SET_SPARE(a) (0x000006EC + (a)*0x00000300) +#define NV917D_HEAD_SET_SPARE_UNUSED 31:0 +#define NV917D_HEAD_SET_SPARE_NOOP(a,b) (0x000006F0 + (a)*0x00000300 + (b)*0x00000004) +#define NV917D_HEAD_SET_SPARE_NOOP_UNUSED 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cl917d_h diff --git a/userspace/sdks/nv570/inc/class/cla06c.h b/userspace/sdks/nv570/inc/class/cla06c.h new file mode 100644 index 0000000..0b4f5c9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla06c.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2010-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _cla06c_h_ +#define _cla06c_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define KEPLER_CHANNEL_GROUP_A (0x0000A06C) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cla06c_h + diff --git a/userspace/sdks/nv570/inc/class/cla06f.h b/userspace/sdks/nv570/inc/class/cla06f.h new file mode 100644 index 0000000..336cab5 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla06f.h @@ -0,0 +1,240 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clA06f_h_ +#define _clA06f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* class KEPLER_CHANNEL_GPFIFO */ +/* + * Documentation for KEPLER_CHANNEL_GPFIFO can be found in dev_pbdma.ref, + * chapter "User Control Registers". It is documented as device NV_UDMA. + * The GPFIFO format itself is also documented in dev_pbdma.ref, + * NV_PPBDMA_GP_ENTRY_*. The pushbuffer format is documented in dev_ram.ref, + * chapter "FIFO DMA RAM", NV_FIFO_DMA_*. + * + */ +#define KEPLER_CHANNEL_GPFIFO_A (0x0000A06F) + + +/* pio method data structure */ +typedef volatile struct _cla06f_tag0 { + NvV32 Reserved00[0x7c0]; +} NvA06FTypedef, KEPLER_ChannelGPFifo; +#define NVA06F_TYPEDEF KEPLER_CHANNELChannelGPFifo +/* dma flow control data structure */ +typedef volatile struct _cla06f_tag1 { + NvU32 Ignored00[0x010]; /* 0000-0043*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 Ignored01[0x002]; /* 0050-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored02[0x007]; /* 0064-007f*/ + NvU32 Ignored03; /* used to be engine yield 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x5c]; +} NvA06FControl, KeplerAControlGPFifo; +/* fields and values */ +#define NVA06F_NUMBER_OF_SUBCHANNELS (8) +#define NVA06F_SET_OBJECT (0x00000000) +#define NVA06F_SET_OBJECT_NVCLASS 15:0 +#define NVA06F_SET_OBJECT_ENGINE 20:16 +#define NVA06F_SET_OBJECT_ENGINE_SW 0x0000001f +#define NVA06F_ILLEGAL (0x00000004) +#define NVA06F_ILLEGAL_HANDLE 31:0 +#define NVA06F_NOP (0x00000008) +#define NVA06F_NOP_HANDLE 31:0 +#define NVA06F_SEMAPHOREA (0x00000010) +#define NVA06F_SEMAPHOREA_OFFSET_UPPER 7:0 +#define NVA06F_SEMAPHOREB (0x00000014) +#define NVA06F_SEMAPHOREB_OFFSET_LOWER 31:2 +#define NVA06F_SEMAPHOREC (0x00000018) +#define NVA06F_SEMAPHOREC_PAYLOAD 31:0 +#define NVA06F_SEMAPHORED (0x0000001C) +#define NVA06F_SEMAPHORED_OPERATION 3:0 +#define NVA06F_SEMAPHORED_OPERATION_ACQUIRE 0x00000001 +#define NVA06F_SEMAPHORED_OPERATION_RELEASE 0x00000002 +#define NVA06F_SEMAPHORED_OPERATION_ACQ_GEQ 0x00000004 +#define NVA06F_SEMAPHORED_OPERATION_ACQ_AND 0x00000008 +#define NVA06F_SEMAPHORED_ACQUIRE_SWITCH 12:12 +#define NVA06F_SEMAPHORED_ACQUIRE_SWITCH_DISABLED 0x00000000 +#define NVA06F_SEMAPHORED_ACQUIRE_SWITCH_ENABLED 0x00000001 +#define NVA06F_SEMAPHORED_RELEASE_WFI 20:20 +#define NVA06F_SEMAPHORED_RELEASE_WFI_EN 0x00000000 +#define NVA06F_SEMAPHORED_RELEASE_WFI_DIS 0x00000001 +#define NVA06F_SEMAPHORED_RELEASE_SIZE 24:24 +#define NVA06F_SEMAPHORED_RELEASE_SIZE_16BYTE 0x00000000 +#define NVA06F_SEMAPHORED_RELEASE_SIZE_4BYTE 0x00000001 +#define NVA06F_NON_STALL_INTERRUPT (0x00000020) +#define NVA06F_NON_STALL_INTERRUPT_HANDLE 31:0 +#define NVA06F_FB_FLUSH (0x00000024) +#define NVA06F_FB_FLUSH_HANDLE 31:0 +#define NVA06F_MEM_OP_A (0x00000028) +#define NVA06F_MEM_OP_A_OPERAND_LOW 31:2 +#define NVA06F_MEM_OP_A_TLB_INVALIDATE_ADDR 29:2 +#define NVA06F_MEM_OP_A_TLB_INVALIDATE_TARGET 31:30 +#define NVA06F_MEM_OP_A_TLB_INVALIDATE_TARGET_VID_MEM 0x00000000 +#define NVA06F_MEM_OP_A_TLB_INVALIDATE_TARGET_SYS_MEM_COHERENT 0x00000002 +#define NVA06F_MEM_OP_A_TLB_INVALIDATE_TARGET_SYS_MEM_NONCOHERENT 0x00000003 +#define NVA06F_MEM_OP_B (0x0000002c) +#define NVA06F_MEM_OP_B_OPERAND_HIGH 7:0 +#define NVA06F_MEM_OP_B_OPERATION 31:27 +#define NVA06F_MEM_OP_B_OPERATION_SYSMEMBAR_FLUSH 0x00000005 +#define NVA06F_MEM_OP_B_OPERATION_SOFT_FLUSH 0x00000006 +#define NVA06F_MEM_OP_B_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NVA06F_MEM_OP_B_OPERATION_L2_PEERMEM_INVALIDATE 0x0000000d +#define NVA06F_MEM_OP_B_OPERATION_L2_SYSMEM_INVALIDATE 0x0000000e +#define NVA06F_MEM_OP_B_OPERATION_L2_CLEAN_COMPTAGS 0x0000000f +#define NVA06F_MEM_OP_B_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NVA06F_MEM_OP_B_MMU_TLB_INVALIDATE_PDB 0:0 +#define NVA06F_MEM_OP_B_MMU_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NVA06F_MEM_OP_B_MMU_TLB_INVALIDATE_PDB_ALL 0x00000001 +#define NVA06F_MEM_OP_B_MMU_TLB_INVALIDATE_GPC 1:1 +#define NVA06F_MEM_OP_B_MMU_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NVA06F_MEM_OP_B_MMU_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NVA06F_SET_REFERENCE (0x00000050) +#define NVA06F_SET_REFERENCE_COUNT 31:0 +#define NVA06F_CRC_CHECK (0x0000007c) +#define NVA06F_CRC_CHECK_VALUE 31:0 +#define NVA06F_YIELD (0x00000080) +#define NVA06F_YIELD_OP 1:0 +#define NVA06F_YIELD_OP_NOP 0x00000000 + + +/* GPFIFO entry format */ +#define NVA06F_GP_ENTRY__SIZE 8 +#define NVA06F_GP_ENTRY0_FETCH 0:0 +#define NVA06F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVA06F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVA06F_GP_ENTRY0_GET 31:2 +#define NVA06F_GP_ENTRY0_OPERAND 31:0 +#define NVA06F_GP_ENTRY1_GET_HI 7:0 +#define NVA06F_GP_ENTRY1_PRIV 8:8 +#define NVA06F_GP_ENTRY1_PRIV_USER 0x00000000 +#define NVA06F_GP_ENTRY1_PRIV_KERNEL 0x00000001 +#define NVA06F_GP_ENTRY1_LEVEL 9:9 +#define NVA06F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVA06F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVA06F_GP_ENTRY1_LENGTH 30:10 +#define NVA06F_GP_ENTRY1_SYNC 31:31 +#define NVA06F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVA06F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVA06F_GP_ENTRY1_OPCODE 7:0 +#define NVA06F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVA06F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVA06F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVA06F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 + +/* dma method formats */ +#define NVA06F_DMA_METHOD_ADDRESS_OLD 12:2 +#define NVA06F_DMA_METHOD_ADDRESS 11:0 +#define NVA06F_DMA_SUBDEVICE_MASK 15:4 +#define NVA06F_DMA_METHOD_SUBCHANNEL 15:13 +#define NVA06F_DMA_TERT_OP 17:16 +#define NVA06F_DMA_TERT_OP_GRP0_INC_METHOD (0x00000000) +#define NVA06F_DMA_TERT_OP_GRP0_SET_SUB_DEV_MASK (0x00000001) +#define NVA06F_DMA_TERT_OP_GRP0_STORE_SUB_DEV_MASK (0x00000002) +#define NVA06F_DMA_TERT_OP_GRP0_USE_SUB_DEV_MASK (0x00000003) +#define NVA06F_DMA_TERT_OP_GRP2_NON_INC_METHOD (0x00000000) +#define NVA06F_DMA_METHOD_COUNT_OLD 28:18 +#define NVA06F_DMA_METHOD_COUNT 28:16 +#define NVA06F_DMA_IMMD_DATA 28:16 +#define NVA06F_DMA_SEC_OP 31:29 +#define NVA06F_DMA_SEC_OP_GRP0_USE_TERT (0x00000000) +#define NVA06F_DMA_SEC_OP_INC_METHOD (0x00000001) +#define NVA06F_DMA_SEC_OP_GRP2_USE_TERT (0x00000002) +#define NVA06F_DMA_SEC_OP_NON_INC_METHOD (0x00000003) +#define NVA06F_DMA_SEC_OP_IMMD_DATA_METHOD (0x00000004) +#define NVA06F_DMA_SEC_OP_ONE_INC (0x00000005) +#define NVA06F_DMA_SEC_OP_RESERVED6 (0x00000006) +#define NVA06F_DMA_SEC_OP_END_PB_SEGMENT (0x00000007) +/* dma incrementing method format */ +#define NVA06F_DMA_INCR_ADDRESS 11:0 +#define NVA06F_DMA_INCR_SUBCHANNEL 15:13 +#define NVA06F_DMA_INCR_COUNT 28:16 +#define NVA06F_DMA_INCR_OPCODE 31:29 +#define NVA06F_DMA_INCR_OPCODE_VALUE (0x00000001) +#define NVA06F_DMA_INCR_DATA 31:0 +/* dma non-incrementing method format */ +#define NVA06F_DMA_NONINCR_ADDRESS 11:0 +#define NVA06F_DMA_NONINCR_SUBCHANNEL 15:13 +#define NVA06F_DMA_NONINCR_COUNT 28:16 +#define NVA06F_DMA_NONINCR_OPCODE 31:29 +#define NVA06F_DMA_NONINCR_OPCODE_VALUE (0x00000003) +#define NVA06F_DMA_NONINCR_DATA 31:0 +/* dma increment-once method format */ +#define NVA06F_DMA_ONEINCR_ADDRESS 11:0 +#define NVA06F_DMA_ONEINCR_SUBCHANNEL 15:13 +#define NVA06F_DMA_ONEINCR_COUNT 28:16 +#define NVA06F_DMA_ONEINCR_OPCODE 31:29 +#define NVA06F_DMA_ONEINCR_OPCODE_VALUE (0x00000005) +#define NVA06F_DMA_ONEINCR_DATA 31:0 +/* dma no-operation format */ +#define NVA06F_DMA_NOP (0x00000000) +/* dma immediate-data format */ +#define NVA06F_DMA_IMMD_ADDRESS 11:0 +#define NVA06F_DMA_IMMD_SUBCHANNEL 15:13 +#define NVA06F_DMA_IMMD_DATA 28:16 +#define NVA06F_DMA_IMMD_OPCODE 31:29 +#define NVA06F_DMA_IMMD_OPCODE_VALUE (0x00000004) +/* dma set sub-device mask format */ +#define NVA06F_DMA_SET_SUBDEVICE_MASK_VALUE 15:4 +#define NVA06F_DMA_SET_SUBDEVICE_MASK_OPCODE 31:16 +#define NVA06F_DMA_SET_SUBDEVICE_MASK_OPCODE_VALUE (0x00000001) +/* dma store sub-device mask format */ +#define NVA06F_DMA_STORE_SUBDEVICE_MASK_VALUE 15:4 +#define NVA06F_DMA_STORE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVA06F_DMA_STORE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000002) +/* dma use sub-device mask format */ +#define NVA06F_DMA_USE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVA06F_DMA_USE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000003) +/* dma end-segment format */ +#define NVA06F_DMA_ENDSEG_OPCODE 31:29 +#define NVA06F_DMA_ENDSEG_OPCODE_VALUE (0x00000007) +/* dma legacy incrementing/non-incrementing formats */ +#define NVA06F_DMA_ADDRESS 12:2 +#define NVA06F_DMA_SUBCH 15:13 +#define NVA06F_DMA_OPCODE3 17:16 +#define NVA06F_DMA_OPCODE3_NONE (0x00000000) +#define NVA06F_DMA_COUNT 28:18 +#define NVA06F_DMA_OPCODE 31:29 +#define NVA06F_DMA_OPCODE_METHOD (0x00000000) +#define NVA06F_DMA_OPCODE_NONINC_METHOD (0x00000002) +#define NVA06F_DMA_DATA 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clA06F_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cla06fsubch.h b/userspace/sdks/nv570/inc/class/cla06fsubch.h new file mode 100644 index 0000000..330a681 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla06fsubch.h @@ -0,0 +1,33 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cla06fsubch_h_ +#define _cla06fsubch_h_ + +#define NVA06F_SUBCHANNEL_2D 3 +#define NVA06F_SUBCHANNEL_3D 0 +#define NVA06F_SUBCHANNEL_COMPUTE 1 +#define NVA06F_SUBCHANNEL_COPY_ENGINE 4 +#define NVA06F_SUBCHANNEL_I2M 2 + +#endif // _cla06fsubch_h_ diff --git a/userspace/sdks/nv570/inc/class/cla06fsw.h b/userspace/sdks/nv570/inc/class/cla06fsw.h new file mode 100644 index 0000000..99c3b8a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla06fsw.h @@ -0,0 +1,41 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cla06f_sw_h_ +#define _cla06f_sw_h_ + +#define NVA06F_NOTIFIERS_RC (0) +#define NVA06F_NOTIFIERS_REFCNT (1) +#define NVA06F_NOTIFIERS_NONSTALL (2) +#define NVA06F_NOTIFIERS_EVENTBUFFER (3) +#define NVA06F_NOTIFIERS_IDLECHANNEL (4) +#define NVA06F_NOTIFIERS_ENDCTX (5) +#define NVA06F_NOTIFIERS_SW (6) +#define NVA06F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVA06F_NOTIFIERS_MAXCOUNT (8) + +/* NvNotification[] fields and values */ +#define NVA06F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVA06F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _cla06f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cla080.h b/userspace/sdks/nv570/inc/class/cla080.h new file mode 100644 index 0000000..95bbf1d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla080.h @@ -0,0 +1,32 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2012-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cla080.finn +// + +#define KEPLER_DEVICE_VGPU 0x0000a080U + diff --git a/userspace/sdks/nv570/inc/class/cla081.h b/userspace/sdks/nv570/inc/class/cla081.h new file mode 100644 index 0000000..d17271a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla081.h @@ -0,0 +1,44 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2012 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _cla081_h_ +#define _cla081_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVA081_VGPU_CONFIG (0x0000a081) + +/*event values*/ +#define NVA081_NOTIFIERS_EVENT_VGPU_GUEST_CREATED (0) +#define NVA081_NOTIFIERS_EVENT_VGPU_GUEST_INITIALISING (1) +#define NVA081_NOTIFIERS_EVENT_VGPU_GUEST_DESTROYED (2) +#define NVA081_NOTIFIERS_MAXCOUNT (5) + + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cla081_h diff --git a/userspace/sdks/nv570/inc/class/cla083.h b/userspace/sdks/nv570/inc/class/cla083.h new file mode 100644 index 0000000..4bff2e4 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla083.h @@ -0,0 +1,36 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cla083_h_ +#define _cla083_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVA083_GRID_DISPLAYLESS (0x0000a083) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cla083_h diff --git a/userspace/sdks/nv570/inc/class/cla084.h b/userspace/sdks/nv570/inc/class/cla084.h new file mode 100644 index 0000000..a3c9346 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla084.h @@ -0,0 +1,82 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cla084.finn +// + +#include "nv_vgpu_types.h" +#include "cla084_notification.h" + +#define NVA084_KERNEL_HOST_VGPU_DEVICE (0xa084U) /* finn: Evaluated from "NVA084_ALLOC_PARAMETERS_MESSAGE_ID" */ + +#define NVA084_MAX_VMMU_SEGMENTS 384 + +/* + * NVA084_ALLOC_PARAMETERS + * + * This structure represents vGPU host device KERNEL object allocation parameters. + * dbdf -> domain (31:16), bus (15:8), device (7:3), function (2:0) + * gfid -> Used only when SRIOV is enabled otherwise set to 0. + * swizzId [IN] -> Used only when MIG mode is enabled otherwise set + * to NV2080_CTRL_GPU_PARTITION_ID_INVALID. + * numChannels -> Used only when SRIOV is enabled. Must be a power of 2. + * placementId [IN] -> Used to provide placement ID of with heterogeneous timesliced vGPUs. + * Otherwise set to NVA081_PLACEMENT_ID_INVALID. + * bDisableDefaultSmcExecPartRestore - If set to true, SMC default execution partition + * save/restore will not be done in host-RM + * vgpuDeviceInstanceId -> Specifies the vGPU device instance per VM to be used + * for supporting multiple vGPUs per VM. + * hPluginClient -> handle to the plugin client + * numGuestFbHandles -> number of guest memory handles, the client handle is hPluginClient + * guestFbHandleList -> handle list to guest memory + * hPluginHeapMemory -> plugin heap memory handle, the client handle is hPluginClient + * hMigRmHeapMemory -> MIG-RM heap memory handle + * bDeviceProfilingEnabled -> If set to true, profiling is allowed + * bGpupLiveMigrationEnabled -> True if GPUP LM is supported + */ +#define NVA084_ALLOC_PARAMETERS_MESSAGE_ID (0xa084U) + +typedef struct NVA084_ALLOC_PARAMETERS { + NvU32 dbdf; + NvU32 gfid; + NvU32 swizzId; + NvU32 vgpuType; + NvU32 vmPid; + NvU32 accountingPid; + NvU32 numChannels; + NvU32 numPluginChannels; + NvU16 placementId; + VM_ID_TYPE vmIdType; + NV_DECLARE_ALIGNED(VM_ID guestVmId, 8); + NvBool bDisableDefaultSmcExecPartRestore; + NvU32 vgpuDeviceInstanceId; + NvHandle hPluginClient; + NvU8 vgpuDevName[VM_UUID_SIZE]; + NvBool bGpupLiveMigrationEnabled; +} NVA084_ALLOC_PARAMETERS; diff --git a/userspace/sdks/nv570/inc/class/cla084_notification.h b/userspace/sdks/nv570/inc/class/cla084_notification.h new file mode 100644 index 0000000..d83ea89 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla084_notification.h @@ -0,0 +1,58 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _cla084_notification_h_ +#define _cla084_notification_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +// +// @todo: We will define the actual event values later based on the use case. +// These event values are only for Test purpose. +// +/* event values */ +#define NVA084_NOTIFIERS_EVENT_VGPU_PLUGIN_TASK_BOOTLOADED (0) +#define NVA084_NOTIFIERS_EVENT_VGPU_PLUGIN_TASK_UNLOADED (1) +#define NVA084_NOTIFIERS_EVENT_VGPU_PLUGIN_TASK_CRASHED (2) +#define NVA084_NOTIFIERS_EVENT_GUEST_DRIVER_LOADED (3) +#define NVA084_NOTIFIERS_EVENT_GUEST_DRIVER_UNLOADED (4) +#define NVA084_NOTIFIERS_EVENT_PRINT_ERROR_MESSAGE (5) +#define NVA084_NOTIFIERS_EVENT_GUEST_LICENSE_STATE_CHANGED (6) +#define NVA084_NOTIFIERS_EVENT_UPDATE_GUEST_OS_TYPE (7) +#define NVA084_NOTIFIERS_EVENT_PRINT_GUEST_RPC_TRACE_LOG_MESSAGE (8) +#define NVA084_NOTIFIERS_EVENT_INIT_GR_ENGINE (9) +#define NVA084_NOTIFIERS_MAXCOUNT (10) + +#define NVA084_NOTIFICATION_STATUS_IN_PROGRESS (0x8000) +#define NVA084_NOTIFICATION_STATUS_BAD_ARGUMENT (0x4000) +#define NVA084_NOTIFICATION_STATUS_ERROR_INVALID_STATE (0x2000) +#define NVA084_NOTIFICATION_STATUS_ERROR_STATE_IN_USE (0x1000) +#define NVA084_NOTIFICATION_STATUS_DONE_SUCCESS (0x0000) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cla084_notification_h_ diff --git a/userspace/sdks/nv570/inc/class/cla097.h b/userspace/sdks/nv570/inc/class/cla097.h new file mode 100644 index 0000000..9ebbcfd --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla097.h @@ -0,0 +1,3817 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_kepler_a_h_ +#define _cl_kepler_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../class/bin/sw_header.pl kepler_a */ + +#include "nvtypes.h" + +#define KEPLER_A 0xA097 + +#define NVA097_SET_OBJECT 0x0000 +#define NVA097_SET_OBJECT_CLASS_ID 15:0 +#define NVA097_SET_OBJECT_ENGINE_ID 20:16 + +#define NVA097_NO_OPERATION 0x0100 +#define NVA097_NO_OPERATION_V 31:0 + +#define NVA097_SET_NOTIFY_A 0x0104 +#define NVA097_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVA097_SET_NOTIFY_B 0x0108 +#define NVA097_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVA097_NOTIFY 0x010c +#define NVA097_NOTIFY_TYPE 31:0 +#define NVA097_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVA097_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVA097_WAIT_FOR_IDLE 0x0110 +#define NVA097_WAIT_FOR_IDLE_V 31:0 + +#define NVA097_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVA097_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVA097_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVA097_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVA097_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVA097_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVA097_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVA097_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVA097_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVA097_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVA097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVA097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVA097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVA097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVA097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVA097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVA097_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVA097_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVA097_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVA097_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVA097_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVA097_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVA097_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVA097_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVA097_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVA097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVA097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVA097_SEND_GO_IDLE 0x013c +#define NVA097_SEND_GO_IDLE_V 31:0 + +#define NVA097_PM_TRIGGER 0x0140 +#define NVA097_PM_TRIGGER_V 31:0 + +#define NVA097_PM_TRIGGER_WFI 0x0144 +#define NVA097_PM_TRIGGER_WFI_V 31:0 + +#define NVA097_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVA097_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVA097_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVA097_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVA097_LINE_LENGTH_IN 0x0180 +#define NVA097_LINE_LENGTH_IN_VALUE 31:0 + +#define NVA097_LINE_COUNT 0x0184 +#define NVA097_LINE_COUNT_VALUE 31:0 + +#define NVA097_OFFSET_OUT_UPPER 0x0188 +#define NVA097_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVA097_OFFSET_OUT 0x018c +#define NVA097_OFFSET_OUT_VALUE 31:0 + +#define NVA097_PITCH_OUT 0x0190 +#define NVA097_PITCH_OUT_VALUE 31:0 + +#define NVA097_SET_DST_BLOCK_SIZE 0x0194 +#define NVA097_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVA097_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVA097_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVA097_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVA097_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVA097_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA097_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA097_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA097_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA097_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVA097_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVA097_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVA097_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVA097_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVA097_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVA097_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVA097_SET_DST_WIDTH 0x0198 +#define NVA097_SET_DST_WIDTH_V 31:0 + +#define NVA097_SET_DST_HEIGHT 0x019c +#define NVA097_SET_DST_HEIGHT_V 31:0 + +#define NVA097_SET_DST_DEPTH 0x01a0 +#define NVA097_SET_DST_DEPTH_V 31:0 + +#define NVA097_SET_DST_LAYER 0x01a4 +#define NVA097_SET_DST_LAYER_V 31:0 + +#define NVA097_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVA097_SET_DST_ORIGIN_BYTES_X_V 19:0 + +#define NVA097_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVA097_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 + +#define NVA097_LAUNCH_DMA 0x01b0 +#define NVA097_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVA097_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVA097_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVA097_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVA097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVA097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVA097_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVA097_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVA097_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVA097_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVA097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVA097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVA097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVA097_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVA097_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA097_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA097_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVA097_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA097_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA097_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA097_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVA097_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA097_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVA097_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVA097_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA097_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVA097_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA097_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA097_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVA097_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVA097_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVA097_LOAD_INLINE_DATA 0x01b4 +#define NVA097_LOAD_INLINE_DATA_V 31:0 + +#define NVA097_SET_I2M_SEMAPHORE_A 0x01dc +#define NVA097_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVA097_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVA097_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVA097_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVA097_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVA097_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVA097_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVA097_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVA097_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVA097_SET_I2M_SPARE_NOOP03 0x01fc +#define NVA097_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVA097_RUN_DS_NOW 0x0200 +#define NVA097_RUN_DS_NOW_V 31:0 + +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVA097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVA097_SET_RASTER_PIPE_SYNC_CONTROL 0x0208 +#define NVA097_SET_RASTER_PIPE_SYNC_CONTROL_PRIM_AREA_THRESHOLD 21:0 +#define NVA097_SET_RASTER_PIPE_SYNC_CONTROL_ENABLE 24:24 +#define NVA097_SET_RASTER_PIPE_SYNC_CONTROL_ENABLE_FALSE 0x00000000 +#define NVA097_SET_RASTER_PIPE_SYNC_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVA097_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVA097_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVA097_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVA097_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVA097_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVA097_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVA097_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_GS_DM_FIFO 0x0214 +#define NVA097_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVA097_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVA097_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVA097_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVA097_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA097_INVALIDATE_SHADER_CACHES 0x021c +#define NVA097_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVA097_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVA097_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVA097_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVA097_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVA097_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVA097_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVA097_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVA097_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVA097_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVA097_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVA097_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVA097_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVA097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVA097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVA097_SET_VAB_VERTEX3F(i) (0x0220+(i)*4) +#define NVA097_SET_VAB_VERTEX3F_V 31:0 + +#define NVA097_SET_VAB_VERTEX4F(i) (0x0230+(i)*4) +#define NVA097_SET_VAB_VERTEX4F_V 31:0 + +#define NVA097_SET_VAB_NORMAL3F(i) (0x0240+(i)*4) +#define NVA097_SET_VAB_NORMAL3F_V 31:0 + +#define NVA097_SET_VAB_COLOR3F(i) (0x0250+(i)*4) +#define NVA097_SET_VAB_COLOR3F_V 31:0 + +#define NVA097_SET_VAB_COLOR4F(i) (0x0260+(i)*4) +#define NVA097_SET_VAB_COLOR4F_V 31:0 + +#define NVA097_SET_VAB_COLOR4UB(i) (0x0270+(i)*4) +#define NVA097_SET_VAB_COLOR4UB_V 31:0 + +#define NVA097_SET_VAB_TEX_COORD1F(i) (0x0280+(i)*4) +#define NVA097_SET_VAB_TEX_COORD1F_V 31:0 + +#define NVA097_SET_VAB_TEX_COORD2F(i) (0x0290+(i)*4) +#define NVA097_SET_VAB_TEX_COORD2F_V 31:0 + +#define NVA097_SET_VAB_TEX_COORD3F(i) (0x02a0+(i)*4) +#define NVA097_SET_VAB_TEX_COORD3F_V 31:0 + +#define NVA097_SET_VAB_TEX_COORD4F(i) (0x02b0+(i)*4) +#define NVA097_SET_VAB_TEX_COORD4F_V 31:0 + +#define NVA097_SET_TASK_CIRCULAR_BUFFER_THROTTLE 0x02cc +#define NVA097_SET_TASK_CIRCULAR_BUFFER_THROTTLE_TASK_COUNT 21:0 + +#define NVA097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE 0x02d0 +#define NVA097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE_PRIM_AREA 21:0 + +#define NVA097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVA097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVA097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVA097_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVA097_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 9:0 + +#define NVA097_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVA097_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVA097_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVA097_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVA097_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVA097_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVA097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVA097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVA097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVA097_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVA097_SET_ZCULL_SUBREGION 0x02e8 +#define NVA097_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVA097_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVA097_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVA097_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVA097_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVA097_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVA097_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVA097_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVA097_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVA097_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVA097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVA097_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVA097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVA097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVA097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVA097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVA097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVA097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVA097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVA097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVA097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVA097_DRAW_ZERO_INDEX 0x0304 +#define NVA097_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVA097_SET_L1_CONFIGURATION 0x0308 +#define NVA097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVA097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVA097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVA097_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVA097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVA097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVA097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVA097_SET_SPA_VERSION 0x0310 +#define NVA097_SET_SPA_VERSION_MINOR 7:0 +#define NVA097_SET_SPA_VERSION_MAJOR 15:8 + +#define NVA097_SET_IEEE_CLEAN_UPDATE 0x0314 +#define NVA097_SET_IEEE_CLEAN_UPDATE_ENABLE 0:0 +#define NVA097_SET_IEEE_CLEAN_UPDATE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_IEEE_CLEAN_UPDATE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_SNAP_GRID_LINE 0x0318 +#define NVA097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVA097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVA097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVA097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVA097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVA097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVA097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVA097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVA097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVA097_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVA097_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVA097_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVA097_SET_SNAP_GRID_NON_LINE 0x031c +#define NVA097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVA097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVA097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVA097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVA097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVA097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVA097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVA097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVA097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVA097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVA097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVA097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVA097_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVA097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVA097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVA097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVA097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVA097_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVA097_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVA097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVA097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVA097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVA097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVA097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVA097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVA097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVA097_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVA097_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVA097_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVA097_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVA097_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVA097_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVA097_SET_TESSELLATION_LOD_V1 0x0330 +#define NVA097_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVA097_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVA097_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVA097_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVA097_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVA097_RESERVED_TG07 0x033c +#define NVA097_RESERVED_TG07_V 0:0 + +#define NVA097_RESERVED_TG08 0x0340 +#define NVA097_RESERVED_TG08_V 0:0 + +#define NVA097_RESERVED_TG09 0x0344 +#define NVA097_RESERVED_TG09_V 0:0 + +#define NVA097_RESERVED_TG10 0x0348 +#define NVA097_RESERVED_TG10_V 0:0 + +#define NVA097_RESERVED_TG11 0x034c +#define NVA097_RESERVED_TG11_V 0:0 + +#define NVA097_RESERVED_TG12 0x0350 +#define NVA097_RESERVED_TG12_V 0:0 + +#define NVA097_RESERVED_TG13 0x0354 +#define NVA097_RESERVED_TG13_V 0:0 + +#define NVA097_RESERVED_TG14 0x0358 +#define NVA097_RESERVED_TG14_V 0:0 + +#define NVA097_RESERVED_TG15 0x035c +#define NVA097_RESERVED_TG15_V 0:0 + +#define NVA097_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVA097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVA097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVA097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVA097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVA097_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVA097_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVA097_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVA097_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVA097_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVA097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVA097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVA097_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVA097_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVA097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVA097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVA097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVA097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVA097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVA097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVA097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVA097_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVA097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVA097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVA097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVA097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVA097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVA097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVA097_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVA097_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVA097_SET_RASTER_ENABLE 0x037c +#define NVA097_SET_RASTER_ENABLE_V 0:0 +#define NVA097_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVA097_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVA097_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVA097_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVA097_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVA097_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVA097_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVA097_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVA097_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVA097_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVA097_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVA097_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVA097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVA097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVA097_SET_VAB_DATA_TYPELESS(i) (0x0400+(i)*4) +#define NVA097_SET_VAB_DATA_TYPELESS_V 31:0 + +#define NVA097_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVA097_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVA097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVA097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVA097_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVA097_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVA097_SET_RASTER_INPUT 0x0740 +#define NVA097_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVA097_SET_STREAM_OUTPUT 0x0744 +#define NVA097_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVA097_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVA097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVA097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_ALPHA_FRACTION 0x074c +#define NVA097_SET_ALPHA_FRACTION_V 7:0 + +#define NVA097_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVA097_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVA097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVA097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVA097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 + +#define NVA097_SET_MAX_TI_WARPS_PER_BATCH 0x075c +#define NVA097_SET_MAX_TI_WARPS_PER_BATCH_V 5:0 + +#define NVA097_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVA097_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVA097_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVA097_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVA097_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVA097_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVA097_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVA097_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVA097_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVA097_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVA097_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVA097_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVA097_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVA097_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVA097_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVA097_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVA097_SET_ISBE_SAVE_RESTORE_PROGRAM 0x07ac +#define NVA097_SET_ISBE_SAVE_RESTORE_PROGRAM_OFFSET 31:0 + +#define NVA097_SET_VAB_VERTEX2F(i) (0x07b0+(i)*4) +#define NVA097_SET_VAB_VERTEX2F_V 31:0 + +#define NVA097_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVA097_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVA097_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVA097_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVA097_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVA097_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVA097_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVA097_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVA097_SET_CULL_BEFORE_FETCH 0x07dc +#define NVA097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVA097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVA097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVA097_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVA097_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVA097_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVA097_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVA097_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVA097_SET_ZCULL_STORAGE_A 0x07e8 +#define NVA097_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVA097_SET_ZCULL_STORAGE_B 0x07ec +#define NVA097_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVA097_SET_ZCULL_STORAGE_C 0x07f0 +#define NVA097_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVA097_SET_ZCULL_STORAGE_D 0x07f4 +#define NVA097_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVA097_SET_ZT_READ_ONLY 0x07f8 +#define NVA097_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVA097_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVA097_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVA097_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVA097_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVA097_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVA097_SET_TEXTURE_INSTRUCTION_OPERAND 0x07fc +#define NVA097_SET_TEXTURE_INSTRUCTION_OPERAND_ORDERING 0:0 +#define NVA097_SET_TEXTURE_INSTRUCTION_OPERAND_ORDERING_FERMI_ORDER 0x00000000 +#define NVA097_SET_TEXTURE_INSTRUCTION_OPERAND_ORDERING_KEPLER_ORDER 0x00000001 + +#define NVA097_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVA097_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVA097_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVA097_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVA097_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVA097_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVA097_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVA097_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVA097_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVA097_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVA097_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVA097_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVA097_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVA097_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVA097_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVA097_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVA097_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVA097_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVA097_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVA097_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVA097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVA097_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVA097_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVA097_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVA097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVA097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVA097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVA097_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVA097_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVA097_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVA097_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVA097_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVA097_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVA097_SET_COLOR_TARGET_MARK(j) (0x0824+(j)*64) +#define NVA097_SET_COLOR_TARGET_MARK_IEEE_CLEAN 0:0 +#define NVA097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVA097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVA097_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVA097_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVA097_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVA097_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVA097_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVA097_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVA097_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVA097_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVA097_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVA097_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVA097_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVA097_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVA097_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVA097_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVA097_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVA097_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVA097_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVA097_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVA097_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVA097_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVA097_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVA097_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVA097_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVA097_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVA097_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVA097_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVA097_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVA097_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVA097_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVA097_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVA097_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVA097_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVA097_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVA097_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVA097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVA097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVA097_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVA097_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVA097_SET_STATISTICS_COUNTER 0x0d68 +#define NVA097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVA097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVA097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVA097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVA097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVA097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVA097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVA097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVA097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVA097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVA097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVA097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVA097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVA097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVA097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVA097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVA097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVA097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVA097_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVA097_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVA097_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVA097_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVA097_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVA097_SET_VERTEX_ARRAY_START 0x0d74 +#define NVA097_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVA097_DRAW_VERTEX_ARRAY 0x0d78 +#define NVA097_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVA097_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVA097_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVA097_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVA097_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVA097_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVA097_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVA097_SET_Z_CLEAR_VALUE 0x0d90 +#define NVA097_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVA097_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVA097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVA097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVA097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVA097_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVA097_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVA097_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVA097_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVA097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVA097_SET_FRONT_POLYGON_MODE 0x0dac +#define NVA097_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVA097_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVA097_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVA097_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVA097_SET_BACK_POLYGON_MODE 0x0db0 +#define NVA097_SET_BACK_POLYGON_MODE_V 31:0 +#define NVA097_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVA097_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVA097_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVA097_SET_POLY_SMOOTH 0x0db4 +#define NVA097_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVA097_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVA097_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_ZT_MARK 0x0db8 +#define NVA097_SET_ZT_MARK_IEEE_CLEAN 0:0 +#define NVA097_SET_ZT_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVA097_SET_ZT_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVA097_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVA097_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVA097_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVA097_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVA097_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVA097_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVA097_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVA097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVA097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVA097_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVA097_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVA097_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVA097_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVA097_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVA097_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVA097_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVA097_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_PATCH 0x0dcc +#define NVA097_SET_PATCH_SIZE 7:0 + +#define NVA097_SET_ZCULL_CRITERION 0x0dd8 +#define NVA097_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVA097_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVA097_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVA097_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVA097_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVA097_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVA097_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVA097_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVA097_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVA097_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVA097_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVA097_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVA097_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVA097_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVA097_SET_ZCULL_CRITERION_SREF 23:16 +#define NVA097_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVA097_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVA097_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVA097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVA097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVA097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVA097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_DRAW_INLINE_VERTEX_VAB_UPDATE 0x0dec +#define NVA097_SET_DRAW_INLINE_VERTEX_VAB_UPDATE_ENABLE 0:0 +#define NVA097_SET_DRAW_INLINE_VERTEX_VAB_UPDATE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_DRAW_INLINE_VERTEX_VAB_UPDATE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_WINDOW_OFFSET_X 0x0df8 +#define NVA097_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVA097_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVA097_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVA097_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVA097_SET_SCISSOR_ENABLE_V 0:0 +#define NVA097_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVA097_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVA097_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVA097_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVA097_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVA097_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVA097_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVA097_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVA097_SET_VAB_NORMAL3S(i) (0x0f00+(i)*4) +#define NVA097_SET_VAB_NORMAL3S_V 31:0 + +#define NVA097_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVA097_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVA097_SET_BACK_STENCIL_MASK 0x0f58 +#define NVA097_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVA097_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVA097_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVA097_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVA097_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVA097_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVA097_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVA097_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVA097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVA097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVA097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVA097_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVA097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVA097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVA097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVA097_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVA097_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVA097_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVA097_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVA097_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVA097_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVA097_SET_CT_MRT_ENABLE 0x0fac +#define NVA097_SET_CT_MRT_ENABLE_V 0:0 +#define NVA097_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVA097_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVA097_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVA097_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVA097_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVA097_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVA097_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVA097_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVA097_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVA097_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVA097_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVA097_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVA097_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVA097_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVA097_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVA097_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVA097_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVA097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVA097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVA097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVA097_SET_ZT_A 0x0fe0 +#define NVA097_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_ZT_B 0x0fe4 +#define NVA097_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_ZT_FORMAT 0x0fe8 +#define NVA097_SET_ZT_FORMAT_V 4:0 +#define NVA097_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVA097_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVA097_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVA097_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVA097_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVA097_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVA097_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVA097_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVA097_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVA097_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVA097_SET_ZT_BLOCK_SIZE 0x0fec +#define NVA097_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVA097_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVA097_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVA097_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVA097_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVA097_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA097_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA097_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA097_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA097_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVA097_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVA097_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVA097_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVA097_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVA097_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVA097_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVA097_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVA097_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVA097_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVA097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA097_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVA097_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVA097_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVA097_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVA097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVA097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVA097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVA097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVA097_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVA097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVA097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVA097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVA097_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVA097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVA097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_SPARE_NOOP00 0x1040 +#define NVA097_SET_SPARE_NOOP00_V 31:0 + +#define NVA097_SET_SPARE_NOOP01 0x1044 +#define NVA097_SET_SPARE_NOOP01_V 31:0 + +#define NVA097_SET_SPARE_NOOP02 0x1048 +#define NVA097_SET_SPARE_NOOP02_V 31:0 + +#define NVA097_SET_SPARE_NOOP03 0x104c +#define NVA097_SET_SPARE_NOOP03_V 31:0 + +#define NVA097_SET_SPARE_NOOP04 0x1050 +#define NVA097_SET_SPARE_NOOP04_V 31:0 + +#define NVA097_SET_SPARE_NOOP05 0x1054 +#define NVA097_SET_SPARE_NOOP05_V 31:0 + +#define NVA097_SET_SPARE_NOOP06 0x1058 +#define NVA097_SET_SPARE_NOOP06_V 31:0 + +#define NVA097_SET_SPARE_NOOP07 0x105c +#define NVA097_SET_SPARE_NOOP07_V 31:0 + +#define NVA097_SET_SPARE_NOOP08 0x1060 +#define NVA097_SET_SPARE_NOOP08_V 31:0 + +#define NVA097_SET_SPARE_NOOP09 0x1064 +#define NVA097_SET_SPARE_NOOP09_V 31:0 + +#define NVA097_SET_SPARE_NOOP10 0x1068 +#define NVA097_SET_SPARE_NOOP10_V 31:0 + +#define NVA097_SET_SPARE_NOOP11 0x106c +#define NVA097_SET_SPARE_NOOP11_V 31:0 + +#define NVA097_SET_SPARE_NOOP12 0x1070 +#define NVA097_SET_SPARE_NOOP12_V 31:0 + +#define NVA097_SET_SPARE_NOOP13 0x1074 +#define NVA097_SET_SPARE_NOOP13_V 31:0 + +#define NVA097_SET_SPARE_NOOP14 0x1078 +#define NVA097_SET_SPARE_NOOP14_V 31:0 + +#define NVA097_SET_SPARE_NOOP15 0x107c +#define NVA097_SET_SPARE_NOOP15_V 31:0 + +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVA097_UNBIND_ALL 0x10f4 +#define NVA097_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVA097_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVA097_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVA097_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVA097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA097_NO_OPERATION_DATA_HI 0x110c +#define NVA097_NO_OPERATION_DATA_HI_V 31:0 + +#define NVA097_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVA097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVA097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVA097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVA097_PM_TRIGGER_END 0x1114 +#define NVA097_PM_TRIGGER_END_V 31:0 + +#define NVA097_SET_VERTEX_ID_BASE 0x1118 +#define NVA097_SET_VERTEX_ID_BASE_V 31:0 + +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVA097_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVA097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVA097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVA097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVA097_FLUSH_PENDING_WRITES 0x1144 +#define NVA097_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVA097_SET_VAB_DATA_CONTROL 0x114c +#define NVA097_SET_VAB_DATA_CONTROL_VAB_INDEX 7:0 +#define NVA097_SET_VAB_DATA_CONTROL_COMPONENT_COUNT 10:8 +#define NVA097_SET_VAB_DATA_CONTROL_COMPONENT_BYTE_WIDTH 14:12 +#define NVA097_SET_VAB_DATA_CONTROL_FORMAT 18:16 +#define NVA097_SET_VAB_DATA_CONTROL_FORMAT_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVA097_SET_VAB_DATA_CONTROL_FORMAT_NUM_SNORM 0x00000001 +#define NVA097_SET_VAB_DATA_CONTROL_FORMAT_NUM_UNORM 0x00000002 +#define NVA097_SET_VAB_DATA_CONTROL_FORMAT_NUM_SINT 0x00000003 +#define NVA097_SET_VAB_DATA_CONTROL_FORMAT_NUM_UINT 0x00000004 +#define NVA097_SET_VAB_DATA_CONTROL_FORMAT_NUM_USCALED 0x00000005 +#define NVA097_SET_VAB_DATA_CONTROL_FORMAT_NUM_SSCALED 0x00000006 +#define NVA097_SET_VAB_DATA_CONTROL_FORMAT_NUM_FLOAT 0x00000007 + +#define NVA097_SET_VAB_DATA(i) (0x1150+(i)*4) +#define NVA097_SET_VAB_DATA_V 31:0 + +#define NVA097_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVA097_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVA097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVA097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVA097_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVA097_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVA097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVA097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVA097_SET_CT_SELECT 0x121c +#define NVA097_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVA097_SET_CT_SELECT_TARGET0 6:4 +#define NVA097_SET_CT_SELECT_TARGET1 9:7 +#define NVA097_SET_CT_SELECT_TARGET2 12:10 +#define NVA097_SET_CT_SELECT_TARGET3 15:13 +#define NVA097_SET_CT_SELECT_TARGET4 18:16 +#define NVA097_SET_CT_SELECT_TARGET5 21:19 +#define NVA097_SET_CT_SELECT_TARGET6 24:22 +#define NVA097_SET_CT_SELECT_TARGET7 27:25 + +#define NVA097_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVA097_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVA097_SET_ZT_SIZE_A 0x1228 +#define NVA097_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVA097_SET_ZT_SIZE_B 0x122c +#define NVA097_SET_ZT_SIZE_B_HEIGHT 16:0 + +#define NVA097_SET_ZT_SIZE_C 0x1230 +#define NVA097_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVA097_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVA097_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVA097_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVA097_SET_SAMPLER_BINDING 0x1234 +#define NVA097_SET_SAMPLER_BINDING_V 0:0 +#define NVA097_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVA097_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVA097_DRAW_AUTO 0x123c +#define NVA097_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVA097_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVA097_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 9:0 + +#define NVA097_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVA097_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVA097_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVA097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVA097_SET_SHADER_SCHEDULING 0x12ac +#define NVA097_SET_SHADER_SCHEDULING_MODE 0:0 +#define NVA097_SET_SHADER_SCHEDULING_MODE_OLDEST_THREAD_FIRST 0x00000000 +#define NVA097_SET_SHADER_SCHEDULING_MODE_ROUND_ROBIN 0x00000001 + +#define NVA097_CLEAR_ZCULL_REGION 0x12c8 +#define NVA097_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVA097_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVA097_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVA097_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVA097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVA097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVA097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVA097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVA097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVA097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVA097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVA097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVA097_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVA097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVA097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVA097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVA097_SET_DEPTH_TEST 0x12cc +#define NVA097_SET_DEPTH_TEST_ENABLE 0:0 +#define NVA097_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVA097_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_FILL_MODE 0x12d0 +#define NVA097_SET_FILL_MODE_V 31:0 +#define NVA097_SET_FILL_MODE_V_POINT 0x00000001 +#define NVA097_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVA097_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVA097_SET_SHADE_MODE 0x12d4 +#define NVA097_SET_SHADE_MODE_V 31:0 +#define NVA097_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVA097_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVA097_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVA097_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVA097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVA097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVA097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVA097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVA097_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVA097_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVA097_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVA097_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_DEPTH_WRITE 0x12e8 +#define NVA097_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVA097_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_ALPHA_TEST 0x12ec +#define NVA097_SET_ALPHA_TEST_ENABLE 0:0 +#define NVA097_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVA097_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVA097_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVA097_DRAW_INLINE_INDEX4X8 0x1304 +#define NVA097_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVA097_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVA097_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVA097_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVA097_D3D_SET_CULL_MODE 0x1308 +#define NVA097_D3D_SET_CULL_MODE_V 31:0 +#define NVA097_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVA097_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVA097_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVA097_SET_DEPTH_FUNC 0x130c +#define NVA097_SET_DEPTH_FUNC_V 31:0 +#define NVA097_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVA097_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVA097_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVA097_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVA097_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVA097_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVA097_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVA097_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVA097_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVA097_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVA097_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVA097_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVA097_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVA097_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVA097_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVA097_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVA097_SET_ALPHA_REF 0x1310 +#define NVA097_SET_ALPHA_REF_V 31:0 + +#define NVA097_SET_ALPHA_FUNC 0x1314 +#define NVA097_SET_ALPHA_FUNC_V 31:0 +#define NVA097_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVA097_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVA097_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVA097_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVA097_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVA097_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVA097_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVA097_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVA097_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVA097_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVA097_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVA097_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVA097_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVA097_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVA097_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVA097_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVA097_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVA097_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVA097_SET_BLEND_CONST_RED 0x131c +#define NVA097_SET_BLEND_CONST_RED_V 31:0 + +#define NVA097_SET_BLEND_CONST_GREEN 0x1320 +#define NVA097_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVA097_SET_BLEND_CONST_BLUE 0x1324 +#define NVA097_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVA097_SET_BLEND_CONST_ALPHA 0x1328 +#define NVA097_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVA097_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVA097_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVA097_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVA097_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVA097_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVA097_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVA097_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVA097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVA097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVA097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_BLEND_COLOR_OP 0x1340 +#define NVA097_SET_BLEND_COLOR_OP_V 31:0 +#define NVA097_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVA097_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVA097_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVA097_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVA097_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVA097_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVA097_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVA097_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVA097_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVA097_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA097_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA097_SET_BLEND_ALPHA_OP 0x134c +#define NVA097_SET_BLEND_ALPHA_OP_V 31:0 +#define NVA097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVA097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVA097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVA097_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVA097_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVA097_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVA097_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVA097_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVA097_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVA097_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA097_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVA097_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVA097_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVA097_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA097_SET_SINGLE_ROP_CONTROL 0x135c +#define NVA097_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVA097_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVA097_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_BLEND(i) (0x1360+(i)*4) +#define NVA097_SET_BLEND_ENABLE 0:0 +#define NVA097_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVA097_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_STENCIL_TEST 0x1380 +#define NVA097_SET_STENCIL_TEST_ENABLE 0:0 +#define NVA097_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVA097_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_STENCIL_OP_FAIL 0x1384 +#define NVA097_SET_STENCIL_OP_FAIL_V 31:0 +#define NVA097_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVA097_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVA097_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVA097_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVA097_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVA097_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVA097_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVA097_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVA097_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVA097_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVA097_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVA097_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVA097_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVA097_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVA097_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVA097_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVA097_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVA097_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVA097_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVA097_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVA097_SET_STENCIL_OP_ZPASS 0x138c +#define NVA097_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVA097_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVA097_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVA097_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVA097_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVA097_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVA097_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVA097_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVA097_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVA097_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVA097_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVA097_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVA097_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVA097_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVA097_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVA097_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVA097_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVA097_SET_STENCIL_FUNC 0x1390 +#define NVA097_SET_STENCIL_FUNC_V 31:0 +#define NVA097_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVA097_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVA097_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVA097_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVA097_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVA097_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVA097_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVA097_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVA097_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVA097_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVA097_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVA097_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVA097_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVA097_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVA097_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVA097_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVA097_SET_STENCIL_FUNC_REF 0x1394 +#define NVA097_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVA097_SET_STENCIL_FUNC_MASK 0x1398 +#define NVA097_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVA097_SET_STENCIL_MASK 0x139c +#define NVA097_SET_STENCIL_MASK_V 7:0 + +#define NVA097_SET_DRAW_AUTO_START 0x13a4 +#define NVA097_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVA097_SET_PS_SATURATE 0x13a8 +#define NVA097_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVA097_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVA097_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVA097_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVA097_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVA097_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVA097_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVA097_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVA097_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVA097_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVA097_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVA097_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVA097_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVA097_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVA097_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVA097_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVA097_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVA097_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVA097_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVA097_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVA097_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVA097_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVA097_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVA097_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 + +#define NVA097_SET_WINDOW_ORIGIN 0x13ac +#define NVA097_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVA097_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVA097_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVA097_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVA097_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVA097_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVA097_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVA097_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVA097_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVA097_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVA097_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVA097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVA097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_ALPHA_HYSTERESIS 0x1420 +#define NVA097_SET_ALPHA_HYSTERESIS_ROUNDS_OF_ALPHA 7:0 + +#define NVA097_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVA097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVA097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA097_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVA097_INVALIDATE_DA_DMA_CACHE 0x142c +#define NVA097_INVALIDATE_DA_DMA_CACHE_V 0:0 + +#define NVA097_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVA097_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVA097_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVA097_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVA097_SET_PS_WARP_WATERMARKS 0x1450 +#define NVA097_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVA097_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVA097_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVA097_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVA097_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVA097_STORE_ZCULL 0x1464 +#define NVA097_STORE_ZCULL_V 0:0 + +#define NVA097_LOAD_ZCULL 0x1500 +#define NVA097_LOAD_ZCULL_V 0:0 + +#define NVA097_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVA097_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVA097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVA097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVA097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVA097_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVA097_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVA097_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVA097_SET_USER_CLIP_ENABLE 0x1510 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVA097_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVA097_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVA097_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVA097_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_POINT_SIZE 0x1518 +#define NVA097_SET_POINT_SIZE_V 31:0 + +#define NVA097_SET_ZCULL_STATS 0x151c +#define NVA097_SET_ZCULL_STATS_ENABLE 0:0 +#define NVA097_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_POINT_SPRITE 0x1520 +#define NVA097_SET_POINT_SPRITE_ENABLE 0:0 +#define NVA097_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_SHADER_EXCEPTIONS 0x1528 +#define NVA097_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVA097_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVA097_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVA097_CLEAR_REPORT_VALUE 0x1530 +#define NVA097_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVA097_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVA097_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVA097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVA097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVA097_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVA097_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVA097_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 + +#define NVA097_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVA097_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVA097_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVA097_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVA097_SET_ZT_SELECT 0x1538 +#define NVA097_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVA097_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVA097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVA097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVA097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVA097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVA097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVA097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVA097_SET_RENDER_ENABLE_A 0x1550 +#define NVA097_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_RENDER_ENABLE_B 0x1554 +#define NVA097_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_RENDER_ENABLE_C 0x1558 +#define NVA097_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVA097_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVA097_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVA097_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVA097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVA097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVA097_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVA097_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVA097_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVA097_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVA097_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVA097_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVA097_SET_ANTI_ALIASED_LINE 0x1570 +#define NVA097_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVA097_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_TEX_HEADER_POOL_A 0x1574 +#define NVA097_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_TEX_HEADER_POOL_B 0x1578 +#define NVA097_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_TEX_HEADER_POOL_C 0x157c +#define NVA097_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVA097_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVA097_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVA097_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVA097_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVA097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVA097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVA097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVA097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVA097_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVA097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVA097_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVA097_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVA097_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVA097_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVA097_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVA097_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVA097_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVA097_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVA097_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVA097_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVA097_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVA097_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVA097_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVA097_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVA097_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVA097_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVA097_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVA097_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVA097_SET_SRGB_WRITE 0x15b8 +#define NVA097_SET_SRGB_WRITE_ENABLE 0:0 +#define NVA097_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_DEPTH_BIAS 0x15bc +#define NVA097_SET_DEPTH_BIAS_V 31:0 + +#define NVA097_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVA097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVA097_SET_RT_LAYER 0x15cc +#define NVA097_SET_RT_LAYER_V 15:0 +#define NVA097_SET_RT_LAYER_CONTROL 16:16 +#define NVA097_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVA097_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVA097_SET_ANTI_ALIAS 0x15d0 +#define NVA097_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVA097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVA097_SET_EDGE_FLAG 0x15e4 +#define NVA097_SET_EDGE_FLAG_V 0:0 +#define NVA097_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVA097_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVA097_DRAW_INLINE_INDEX 0x15e8 +#define NVA097_DRAW_INLINE_INDEX_V 31:0 + +#define NVA097_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVA097_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVA097_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVA097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVA097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVA097_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVA097_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVA097_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVA097_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVA097_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVA097_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVA097_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVA097_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVA097_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVA097_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVA097_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVA097_SET_POINT_SPRITE_SELECT 0x1604 +#define NVA097_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVA097_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVA097_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVA097_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVA097_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVA097_SET_PROGRAM_REGION_A 0x1608 +#define NVA097_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVA097_SET_PROGRAM_REGION_B 0x160c +#define NVA097_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVA097_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVA097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVA097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVA097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVA097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVA097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVA097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVA097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVA097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVA097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVA097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVA097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVA097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVA097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVA097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVA097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVA097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVA097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVA097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVA097_END 0x1614 +#define NVA097_END_V 0:0 + +#define NVA097_BEGIN 0x1618 +#define NVA097_BEGIN_OP 15:0 +#define NVA097_BEGIN_OP_POINTS 0x00000000 +#define NVA097_BEGIN_OP_LINES 0x00000001 +#define NVA097_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVA097_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVA097_BEGIN_OP_TRIANGLES 0x00000004 +#define NVA097_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVA097_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVA097_BEGIN_OP_QUADS 0x00000007 +#define NVA097_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVA097_BEGIN_OP_POLYGON 0x00000009 +#define NVA097_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVA097_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVA097_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_BEGIN_OP_PATCH 0x0000000E +#define NVA097_BEGIN_PRIMITIVE_ID 24:24 +#define NVA097_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVA097_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVA097_BEGIN_INSTANCE_ID 27:26 +#define NVA097_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVA097_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVA097_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVA097_BEGIN_SPLIT_MODE 30:29 +#define NVA097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVA097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVA097_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVA097_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 + +#define NVA097_SET_VERTEX_ID_COPY 0x161c +#define NVA097_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVA097_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVA097_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVA097_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVA097_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVA097_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVA097_LOAD_PRIMITIVE_ID 0x1624 +#define NVA097_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVA097_SET_SHADER_BASED_CULL 0x162c +#define NVA097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVA097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVA097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVA097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVA097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVA097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_CLASS_VERSION 0x1638 +#define NVA097_SET_CLASS_VERSION_CURRENT 15:0 +#define NVA097_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA097_SET_VAB_PAGE 0x163c +#define NVA097_SET_VAB_PAGE_READ_SELECT 0:0 +#define NVA097_SET_VAB_PAGE_READ_SELECT_PAGES_0_AND_1 0x00000000 +#define NVA097_SET_VAB_PAGE_READ_SELECT_PAGES_0_AND_2 0x00000001 + +#define NVA097_DRAW_INLINE_VERTEX 0x1640 +#define NVA097_DRAW_INLINE_VERTEX_V 31:0 + +#define NVA097_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVA097_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVA097_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVA097_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVA097_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVA097_SET_DA_OUTPUT 0x164c +#define NVA097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVA097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVA097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVA097_SET_ANTI_ALIASED_POINT 0x1658 +#define NVA097_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVA097_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_POINT_CENTER_MODE 0x165c +#define NVA097_SET_POINT_CENTER_MODE_V 31:0 +#define NVA097_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVA097_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVA097_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVA097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVA097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVA097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVA097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVA097_SET_LINE_STIPPLE 0x166c +#define NVA097_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVA097_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVA097_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVA097_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVA097_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVA097_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVA097_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVA097_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVA097_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVA097_SET_PROVOKING_VERTEX 0x1684 +#define NVA097_SET_PROVOKING_VERTEX_V 0:0 +#define NVA097_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVA097_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVA097_SET_TWO_SIDED_LIGHT 0x1688 +#define NVA097_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVA097_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_POLYGON_STIPPLE 0x168c +#define NVA097_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVA097_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_SHADER_CONTROL 0x1690 +#define NVA097_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVA097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVA097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVA097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVA097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVA097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVA097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVA097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVA097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVA097_LAUNCH_VERTEX 0x169c +#define NVA097_LAUNCH_VERTEX_V 0:0 + +#define NVA097_CHECK_CLASS_VERSION 0x16a0 +#define NVA097_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVA097_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA097_SET_SPH_VERSION 0x16a4 +#define NVA097_SET_SPH_VERSION_CURRENT 15:0 +#define NVA097_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA097_CHECK_SPH_VERSION 0x16a8 +#define NVA097_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVA097_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA097_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVA097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVA097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVA097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVA097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVA097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVA097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVA097_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVA097_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVA097_SET_AAM_VERSION 0x1790 +#define NVA097_SET_AAM_VERSION_CURRENT 15:0 +#define NVA097_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA097_CHECK_AAM_VERSION 0x1794 +#define NVA097_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVA097_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA097_SET_ZT_LAYER 0x179c +#define NVA097_SET_ZT_LAYER_OFFSET 15:0 + +#define NVA097_SET_VAB_MEMORY_AREA_A 0x17bc +#define NVA097_SET_VAB_MEMORY_AREA_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_VAB_MEMORY_AREA_B 0x17c0 +#define NVA097_SET_VAB_MEMORY_AREA_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_VAB_MEMORY_AREA_C 0x17c4 +#define NVA097_SET_VAB_MEMORY_AREA_C_SIZE 1:0 +#define NVA097_SET_VAB_MEMORY_AREA_C_SIZE_BYTES_64K 0x00000001 +#define NVA097_SET_VAB_MEMORY_AREA_C_SIZE_BYTES_128K 0x00000002 +#define NVA097_SET_VAB_MEMORY_AREA_C_SIZE_BYTES_256K 0x00000003 + +#define NVA097_SET_INDEX_BUFFER_A 0x17c8 +#define NVA097_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVA097_SET_INDEX_BUFFER_B 0x17cc +#define NVA097_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVA097_SET_INDEX_BUFFER_C 0x17d0 +#define NVA097_SET_INDEX_BUFFER_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVA097_SET_INDEX_BUFFER_D 0x17d4 +#define NVA097_SET_INDEX_BUFFER_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVA097_SET_INDEX_BUFFER_E 0x17d8 +#define NVA097_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVA097_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVA097_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVA097_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVA097_SET_INDEX_BUFFER_F 0x17dc +#define NVA097_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVA097_DRAW_INDEX_BUFFER 0x17e0 +#define NVA097_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVA097_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVA097_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVA097_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVA097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVA097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVA097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVA097_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVA097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVA097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVA097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVA097_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVA097_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVA097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVA097_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVA097_OGL_SET_CULL 0x1918 +#define NVA097_OGL_SET_CULL_ENABLE 0:0 +#define NVA097_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVA097_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVA097_OGL_SET_FRONT_FACE 0x191c +#define NVA097_OGL_SET_FRONT_FACE_V 31:0 +#define NVA097_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVA097_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVA097_OGL_SET_CULL_FACE 0x1920 +#define NVA097_OGL_SET_CULL_FACE_V 31:0 +#define NVA097_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVA097_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVA097_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVA097_SET_VIEWPORT_PIXEL 0x1924 +#define NVA097_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVA097_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVA097_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVA097_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVA097_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVA097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVA097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVA097_INVALIDATE_CONSTANT_BUFFER_CACHE 0x1930 +#define NVA097_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2 0:0 +#define NVA097_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2_FALSE 0x00000000 +#define NVA097_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2_TRUE 0x00000001 + +#define NVA097_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVA097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVA097_SET_USER_CLIP_OP 0x1940 +#define NVA097_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVA097_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVA097_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVA097_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVA097_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVA097_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVA097_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVA097_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVA097_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVA097_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVA097_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVA097_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVA097_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVA097_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVA097_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVA097_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVA097_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVA097_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVA097_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVA097_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVA097_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVA097_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVA097_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVA097_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVA097_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVA097_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVA097_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVA097_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVA097_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVA097_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVA097_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVA097_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVA097_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVA097_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVA097_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVA097_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVA097_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVA097_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVA097_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVA097_INVALIDATE_ZCULL 0x1958 +#define NVA097_INVALIDATE_ZCULL_V 31:0 +#define NVA097_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVA097_SET_ZCULL 0x1968 +#define NVA097_SET_ZCULL_Z_ENABLE 0:0 +#define NVA097_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVA097_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVA097_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_ZCULL_BOUNDS 0x196c +#define NVA097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVA097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVA097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVA097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVA097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVA097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVA097_ZCULL_SYNC 0x1978 +#define NVA097_ZCULL_SYNC_V 31:0 + +#define NVA097_SET_CLIP_ID_TEST 0x197c +#define NVA097_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVA097_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVA097_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVA097_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVA097_SET_CLIP_ID 0x1984 +#define NVA097_SET_CLIP_ID_V 31:0 + +#define NVA097_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVA097_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVA097_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVA097_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVA097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVA097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVA097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVA097_SET_LOGIC_OP 0x19c4 +#define NVA097_SET_LOGIC_OP_ENABLE 0:0 +#define NVA097_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVA097_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_LOGIC_OP_FUNC 0x19c8 +#define NVA097_SET_LOGIC_OP_FUNC_V 31:0 +#define NVA097_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVA097_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVA097_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVA097_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVA097_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVA097_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVA097_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVA097_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVA097_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVA097_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVA097_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVA097_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVA097_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVA097_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVA097_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVA097_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVA097_SET_Z_COMPRESSION 0x19cc +#define NVA097_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVA097_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVA097_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVA097_CLEAR_SURFACE 0x19d0 +#define NVA097_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVA097_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVA097_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVA097_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVA097_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVA097_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVA097_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVA097_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVA097_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVA097_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVA097_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVA097_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVA097_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVA097_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVA097_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVA097_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVA097_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVA097_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVA097_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVA097_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVA097_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVA097_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVA097_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVA097_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVA097_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVA097_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVA097_SET_CT_WRITE_R_ENABLE 0:0 +#define NVA097_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVA097_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVA097_SET_CT_WRITE_G_ENABLE 4:4 +#define NVA097_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVA097_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVA097_SET_CT_WRITE_B_ENABLE 8:8 +#define NVA097_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVA097_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVA097_SET_CT_WRITE_A_ENABLE 12:12 +#define NVA097_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVA097_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVA097_PIPE_NOP 0x1a2c +#define NVA097_PIPE_NOP_V 31:0 + +#define NVA097_SET_SPARE00 0x1a30 +#define NVA097_SET_SPARE00_V 31:0 + +#define NVA097_SET_SPARE01 0x1a34 +#define NVA097_SET_SPARE01_V 31:0 + +#define NVA097_SET_SPARE02 0x1a38 +#define NVA097_SET_SPARE02_V 31:0 + +#define NVA097_SET_SPARE03 0x1a3c +#define NVA097_SET_SPARE03_V 31:0 + +#define NVA097_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVA097_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVA097_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVA097_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVA097_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVA097_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVA097_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVA097_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVA097_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVA097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVA097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVA097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVA097_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVA097_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVA097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVA097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVA097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVA097_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVA097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVA097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVA097_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVA097_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVA097_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVA097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVA097_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVA097_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVA097_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVA097_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVA097_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVA097_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVA097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVA097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVA097_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVA097_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVA097_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVA097_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVA097_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVA097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVA097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVA097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVA097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA097_SET_VERTEX_STREAM_LIMIT_A_A(j) (0x1f00+(j)*8) +#define NVA097_SET_VERTEX_STREAM_LIMIT_A_A_UPPER 7:0 + +#define NVA097_SET_VERTEX_STREAM_LIMIT_A_B(j) (0x1f04+(j)*8) +#define NVA097_SET_VERTEX_STREAM_LIMIT_A_B_LOWER 31:0 + +#define NVA097_SET_VERTEX_STREAM_LIMIT_B_A(j) (0x1f80+(j)*8) +#define NVA097_SET_VERTEX_STREAM_LIMIT_B_A_UPPER 7:0 + +#define NVA097_SET_VERTEX_STREAM_LIMIT_B_B(j) (0x1f84+(j)*8) +#define NVA097_SET_VERTEX_STREAM_LIMIT_B_B_LOWER 31:0 + +#define NVA097_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVA097_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVA097_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVA097_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVA097_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVA097_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVA097_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVA097_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVA097_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVA097_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVA097_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVA097_SET_PIPELINE_PROGRAM(j) (0x2004+(j)*64) +#define NVA097_SET_PIPELINE_PROGRAM_OFFSET 31:0 + +#define NVA097_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVA097_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVA097_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVA097_SET_PIPELINE_REGISTER_COUNT_V 7:0 + +#define NVA097_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVA097_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVA097_SET_PIPELINE_RESERVED_B(j) (0x2014+(j)*64) +#define NVA097_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVA097_SET_PIPELINE_RESERVED_C(j) (0x2018+(j)*64) +#define NVA097_SET_PIPELINE_RESERVED_C_V 0:0 + +#define NVA097_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NVA097_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NVA097_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVA097_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVA097_SET_FALCON00 0x2300 +#define NVA097_SET_FALCON00_V 31:0 + +#define NVA097_SET_FALCON01 0x2304 +#define NVA097_SET_FALCON01_V 31:0 + +#define NVA097_SET_FALCON02 0x2308 +#define NVA097_SET_FALCON02_V 31:0 + +#define NVA097_SET_FALCON03 0x230c +#define NVA097_SET_FALCON03_V 31:0 + +#define NVA097_SET_FALCON04 0x2310 +#define NVA097_SET_FALCON04_V 31:0 + +#define NVA097_SET_FALCON05 0x2314 +#define NVA097_SET_FALCON05_V 31:0 + +#define NVA097_SET_FALCON06 0x2318 +#define NVA097_SET_FALCON06_V 31:0 + +#define NVA097_SET_FALCON07 0x231c +#define NVA097_SET_FALCON07_V 31:0 + +#define NVA097_SET_FALCON08 0x2320 +#define NVA097_SET_FALCON08_V 31:0 + +#define NVA097_SET_FALCON09 0x2324 +#define NVA097_SET_FALCON09_V 31:0 + +#define NVA097_SET_FALCON10 0x2328 +#define NVA097_SET_FALCON10_V 31:0 + +#define NVA097_SET_FALCON11 0x232c +#define NVA097_SET_FALCON11_V 31:0 + +#define NVA097_SET_FALCON12 0x2330 +#define NVA097_SET_FALCON12_V 31:0 + +#define NVA097_SET_FALCON13 0x2334 +#define NVA097_SET_FALCON13_V 31:0 + +#define NVA097_SET_FALCON14 0x2338 +#define NVA097_SET_FALCON14_V 31:0 + +#define NVA097_SET_FALCON15 0x233c +#define NVA097_SET_FALCON15_V 31:0 + +#define NVA097_SET_FALCON16 0x2340 +#define NVA097_SET_FALCON16_V 31:0 + +#define NVA097_SET_FALCON17 0x2344 +#define NVA097_SET_FALCON17_V 31:0 + +#define NVA097_SET_FALCON18 0x2348 +#define NVA097_SET_FALCON18_V 31:0 + +#define NVA097_SET_FALCON19 0x234c +#define NVA097_SET_FALCON19_V 31:0 + +#define NVA097_SET_FALCON20 0x2350 +#define NVA097_SET_FALCON20_V 31:0 + +#define NVA097_SET_FALCON21 0x2354 +#define NVA097_SET_FALCON21_V 31:0 + +#define NVA097_SET_FALCON22 0x2358 +#define NVA097_SET_FALCON22_V 31:0 + +#define NVA097_SET_FALCON23 0x235c +#define NVA097_SET_FALCON23_V 31:0 + +#define NVA097_SET_FALCON24 0x2360 +#define NVA097_SET_FALCON24_V 31:0 + +#define NVA097_SET_FALCON25 0x2364 +#define NVA097_SET_FALCON25_V 31:0 + +#define NVA097_SET_FALCON26 0x2368 +#define NVA097_SET_FALCON26_V 31:0 + +#define NVA097_SET_FALCON27 0x236c +#define NVA097_SET_FALCON27_V 31:0 + +#define NVA097_SET_FALCON28 0x2370 +#define NVA097_SET_FALCON28_V 31:0 + +#define NVA097_SET_FALCON29 0x2374 +#define NVA097_SET_FALCON29_V 31:0 + +#define NVA097_SET_FALCON30 0x2378 +#define NVA097_SET_FALCON30_V 31:0 + +#define NVA097_SET_FALCON31 0x237c +#define NVA097_SET_FALCON31_V 31:0 + +#define NVA097_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVA097_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVA097_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVA097_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVA097_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVA097_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVA097_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVA097_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVA097_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVA097_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVA097_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVA097_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVA097_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVA097_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVA097_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVA097_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVA097_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVA097_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVA097_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVA097_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVA097_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVA097_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVA097_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVA097_SET_COLOR_CLAMP 0x2600 +#define NVA097_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVA097_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVA097_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVA097_NOOP_X_X_X_SET_VALVE 0x2604 +#define NVA097_NOOP_X_X_X_SET_VALVE_HIGHER_PRIORITY 0:0 +#define NVA097_NOOP_X_X_X_SET_VALVE_HIGHER_PRIORITY_COMPUTE 0x00000000 +#define NVA097_NOOP_X_X_X_SET_VALVE_HIGHER_PRIORITY_GRAPHICS 0x00000001 + +#define NVA097_SET_BINDLESS_TEXTURE 0x2608 +#define NVA097_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 4:0 + +#define NVA097_SET_TRAP_HANDLER 0x260c +#define NVA097_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVA097_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVA097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVA097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVA097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVA097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVA097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVA097_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVA097_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVA097_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVA097_CALL_MME_MACRO_V 31:0 + +#define NVA097_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVA097_CALL_MME_DATA_V 31:0 + +#endif /* _cl_kepler_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cla0b0.h b/userspace/sdks/nv570/inc/class/cla0b0.h new file mode 100644 index 0000000..ef4faa8 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla0b0.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#include "nvtypes.h" + +#ifndef _cla0b0_h_ +#define _cla0b0_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVA0B0_VIDEO_DECODER (0x0000A0B0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cla0b0_h diff --git a/userspace/sdks/nv570/inc/class/cla0b5.h b/userspace/sdks/nv570/inc/class/cla0b5.h new file mode 100644 index 0000000..92076c6 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla0b5.h @@ -0,0 +1,262 @@ +/******************************************************************************* + Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#include "nvtypes.h" + +#ifndef _cla0b5_h_ +#define _cla0b5_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define KEPLER_DMA_COPY_A (0x0000A0B5) + +#define NVA0B5_NOP (0x00000100) +#define NVA0B5_NOP_PARAMETER 31:0 +#define NVA0B5_PM_TRIGGER (0x00000140) +#define NVA0B5_PM_TRIGGER_V 31:0 +#define NVA0B5_SET_SEMAPHORE_A (0x00000240) +#define NVA0B5_SET_SEMAPHORE_A_UPPER 7:0 +#define NVA0B5_SET_SEMAPHORE_B (0x00000244) +#define NVA0B5_SET_SEMAPHORE_B_LOWER 31:0 +#define NVA0B5_SET_SEMAPHORE_PAYLOAD (0x00000248) +#define NVA0B5_SET_SEMAPHORE_PAYLOAD_PAYLOAD 31:0 +#define NVA0B5_SET_RENDER_ENABLE_A (0x00000254) +#define NVA0B5_SET_RENDER_ENABLE_A_UPPER 7:0 +#define NVA0B5_SET_RENDER_ENABLE_B (0x00000258) +#define NVA0B5_SET_RENDER_ENABLE_B_LOWER 31:0 +#define NVA0B5_SET_RENDER_ENABLE_C (0x0000025C) +#define NVA0B5_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVA0B5_SET_RENDER_ENABLE_C_MODE_FALSE (0x00000000) +#define NVA0B5_SET_RENDER_ENABLE_C_MODE_TRUE (0x00000001) +#define NVA0B5_SET_RENDER_ENABLE_C_MODE_CONDITIONAL (0x00000002) +#define NVA0B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL (0x00000003) +#define NVA0B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL (0x00000004) +#define NVA0B5_SET_SRC_PHYS_MODE (0x00000260) +#define NVA0B5_SET_SRC_PHYS_MODE_TARGET 1:0 +#define NVA0B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVA0B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVA0B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVA0B5_SET_DST_PHYS_MODE (0x00000264) +#define NVA0B5_SET_DST_PHYS_MODE_TARGET 1:0 +#define NVA0B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVA0B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVA0B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVA0B5_LAUNCH_DMA (0x00000300) +#define NVA0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVA0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVA0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVA0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVA0B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 +#define NVA0B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) +#define NVA0B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_TYPE_NONE (0x00000000) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_FOUR_WORD_SEMAPHORE (0x00000002) +#define NVA0B5_LAUNCH_DMA_INTERRUPT_TYPE 6:5 +#define NVA0B5_LAUNCH_DMA_INTERRUPT_TYPE_NONE (0x00000000) +#define NVA0B5_LAUNCH_DMA_INTERRUPT_TYPE_BLOCKING (0x00000001) +#define NVA0B5_LAUNCH_DMA_INTERRUPT_TYPE_NON_BLOCKING (0x00000002) +#define NVA0B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 +#define NVA0B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVA0B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVA0B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 +#define NVA0B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVA0B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVA0B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 +#define NVA0B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) +#define NVA0B5_LAUNCH_DMA_MULTI_LINE_ENABLE_TRUE (0x00000001) +#define NVA0B5_LAUNCH_DMA_REMAP_ENABLE 10:10 +#define NVA0B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) +#define NVA0B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) +#define NVA0B5_LAUNCH_DMA_BYPASS_L2 11:11 +#define NVA0B5_LAUNCH_DMA_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVA0B5_LAUNCH_DMA_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVA0B5_LAUNCH_DMA_SRC_TYPE 12:12 +#define NVA0B5_LAUNCH_DMA_SRC_TYPE_VIRTUAL (0x00000000) +#define NVA0B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) +#define NVA0B5_LAUNCH_DMA_DST_TYPE 13:13 +#define NVA0B5_LAUNCH_DMA_DST_TYPE_VIRTUAL (0x00000000) +#define NVA0B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION 17:14 +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMIN (0x00000000) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMAX (0x00000001) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IXOR (0x00000002) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IAND (0x00000003) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IOR (0x00000004) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IADD (0x00000005) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INC (0x00000006) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_DEC (0x00000007) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FADD (0x0000000A) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FMIN (0x0000000B) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FMAX (0x0000000C) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FMUL (0x0000000D) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMUL (0x0000000E) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN 18:18 +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_SIGNED (0x00000000) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_UNSIGNED (0x00000001) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE 19:19 +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_FALSE (0x00000000) +#define NVA0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_TRUE (0x00000001) +#define NVA0B5_OFFSET_IN_UPPER (0x00000400) +#define NVA0B5_OFFSET_IN_UPPER_UPPER 7:0 +#define NVA0B5_OFFSET_IN_LOWER (0x00000404) +#define NVA0B5_OFFSET_IN_LOWER_VALUE 31:0 +#define NVA0B5_OFFSET_OUT_UPPER (0x00000408) +#define NVA0B5_OFFSET_OUT_UPPER_UPPER 7:0 +#define NVA0B5_OFFSET_OUT_LOWER (0x0000040C) +#define NVA0B5_OFFSET_OUT_LOWER_VALUE 31:0 +#define NVA0B5_PITCH_IN (0x00000410) +#define NVA0B5_PITCH_IN_VALUE 31:0 +#define NVA0B5_PITCH_OUT (0x00000414) +#define NVA0B5_PITCH_OUT_VALUE 31:0 +#define NVA0B5_LINE_LENGTH_IN (0x00000418) +#define NVA0B5_LINE_LENGTH_IN_VALUE 31:0 +#define NVA0B5_LINE_COUNT (0x0000041C) +#define NVA0B5_LINE_COUNT_VALUE 31:0 +#define NVA0B5_SET_REMAP_CONST_A (0x00000700) +#define NVA0B5_SET_REMAP_CONST_A_V 31:0 +#define NVA0B5_SET_REMAP_CONST_B (0x00000704) +#define NVA0B5_SET_REMAP_CONST_B_V 31:0 +#define NVA0B5_SET_REMAP_COMPONENTS (0x00000708) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_X 2:0 +#define NVA0B5_SET_REMAP_COMPONENTS_DST_X_SRC_X (0x00000000) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_X_SRC_Y (0x00000001) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_X_SRC_Z (0x00000002) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_X_SRC_W (0x00000003) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_X_NO_WRITE (0x00000006) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Y 6:4 +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_X (0x00000000) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Y (0x00000001) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Z (0x00000002) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_W (0x00000003) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Y_CONST_A (0x00000004) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Y_NO_WRITE (0x00000006) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Z 10:8 +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_X (0x00000000) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Y (0x00000001) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Z (0x00000002) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_W (0x00000003) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Z_CONST_A (0x00000004) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Z_CONST_B (0x00000005) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_Z_NO_WRITE (0x00000006) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_W 14:12 +#define NVA0B5_SET_REMAP_COMPONENTS_DST_W_SRC_X (0x00000000) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_W_SRC_Y (0x00000001) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_W_SRC_Z (0x00000002) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_W_SRC_W (0x00000003) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_W_CONST_A (0x00000004) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_W_CONST_B (0x00000005) +#define NVA0B5_SET_REMAP_COMPONENTS_DST_W_NO_WRITE (0x00000006) +#define NVA0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 +#define NVA0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) +#define NVA0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_TWO (0x00000001) +#define NVA0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_THREE (0x00000002) +#define NVA0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS 21:20 +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_ONE (0x00000000) +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_TWO (0x00000001) +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_THREE (0x00000002) +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_FOUR (0x00000003) +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_THREE (0x00000002) +#define NVA0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_FOUR (0x00000003) +#define NVA0B5_SET_DST_BLOCK_SIZE (0x0000070C) +#define NVA0B5_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVA0B5_SET_DST_BLOCK_SIZE_WIDTH_QUARTER_GOB (0x0000000E) +#define NVA0B5_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVA0B5_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVA0B5_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVA0B5_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVA0B5_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVA0B5_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVA0B5_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVA0B5_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVA0B5_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVA0B5_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVA0B5_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVA0B5_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVA0B5_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVA0B5_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVA0B5_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVA0B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVA0B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_TESLA_4 (0x00000000) +#define NVA0B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVA0B5_SET_DST_WIDTH (0x00000710) +#define NVA0B5_SET_DST_WIDTH_V 31:0 +#define NVA0B5_SET_DST_HEIGHT (0x00000714) +#define NVA0B5_SET_DST_HEIGHT_V 31:0 +#define NVA0B5_SET_DST_DEPTH (0x00000718) +#define NVA0B5_SET_DST_DEPTH_V 31:0 +#define NVA0B5_SET_DST_LAYER (0x0000071C) +#define NVA0B5_SET_DST_LAYER_V 31:0 +#define NVA0B5_SET_DST_ORIGIN (0x00000720) +#define NVA0B5_SET_DST_ORIGIN_X 15:0 +#define NVA0B5_SET_DST_ORIGIN_Y 31:16 +#define NVA0B5_SET_SRC_BLOCK_SIZE (0x00000728) +#define NVA0B5_SET_SRC_BLOCK_SIZE_WIDTH 3:0 +#define NVA0B5_SET_SRC_BLOCK_SIZE_WIDTH_QUARTER_GOB (0x0000000E) +#define NVA0B5_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVA0B5_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 +#define NVA0B5_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVA0B5_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVA0B5_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVA0B5_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVA0B5_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVA0B5_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVA0B5_SET_SRC_BLOCK_SIZE_DEPTH 11:8 +#define NVA0B5_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVA0B5_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVA0B5_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVA0B5_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVA0B5_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVA0B5_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVA0B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVA0B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_TESLA_4 (0x00000000) +#define NVA0B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVA0B5_SET_SRC_WIDTH (0x0000072C) +#define NVA0B5_SET_SRC_WIDTH_V 31:0 +#define NVA0B5_SET_SRC_HEIGHT (0x00000730) +#define NVA0B5_SET_SRC_HEIGHT_V 31:0 +#define NVA0B5_SET_SRC_DEPTH (0x00000734) +#define NVA0B5_SET_SRC_DEPTH_V 31:0 +#define NVA0B5_SET_SRC_LAYER (0x00000738) +#define NVA0B5_SET_SRC_LAYER_V 31:0 +#define NVA0B5_SET_SRC_ORIGIN (0x0000073C) +#define NVA0B5_SET_SRC_ORIGIN_X 15:0 +#define NVA0B5_SET_SRC_ORIGIN_Y 31:16 +#define NVA0B5_PM_TRIGGER_END (0x00001114) +#define NVA0B5_PM_TRIGGER_END_V 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _cla0b5_h + diff --git a/userspace/sdks/nv570/inc/class/cla0bc.h b/userspace/sdks/nv570/inc/class/cla0bc.h new file mode 100644 index 0000000..bc26819 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla0bc.h @@ -0,0 +1,209 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2012-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cla0bc.finn +// + +#define NVENC_SW_SESSION (0xa0bcU) /* finn: Evaluated from "NVA0BC_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* + * NVENC_SESSION_INFO_REGION_MAX_COUNT_V1 + * Number of regions. + * Currently we have two regions. + * +---------+ <== Region 1 Start + * | Entry 1 | + * | Entry 2 | + * | ... | + * | Entry N | + * +---------+ <== Region 1 End, Region 2 Start. + * | Entry 1 | + * | Entry 2 | + * | ... | + * | Entry N | + * +---------+ <== Region 2 End + * Region 1 : Contains GPU timestamp of each frame when frame was submitted + * to encode by UMD. + * Region 2 : Two entries in this region for each frame. Start and end GPU + * timestamps of when GPU started and ended encoding a frame. + */ +#define NVENC_SESSION_INFO_REGION_MAX_COUNT_V1 2 + +/* + * NVENC_SESSION_INFO_ENTRY_V1 + * This structure represents a single timestamp entry for a frame. + * frameId + * Frame id of the frame being submitted for encoding by UMD. + * reserved + * This is a reserved field. Unused. + * timestamp + * GPU timestamp. + */ + +typedef struct NVENC_SESSION_INFO_ENTRY_V1 { + NvU32 frameId; + NvU32 reserved; + NV_DECLARE_ALIGNED(NvU64 timestamp, 8); +} NVENC_SESSION_INFO_ENTRY_V1; + +/* + * NVENC_SESSION_INFO_REGION_1_ENTRY_V1 + * This structure represents an entry in Region 1. + * submissionTSEntry + * Frame id and GPU timestamp of the time when the frame was submitted to + * encode by UMD. + * + * NVENC_SESSION_INFO_REGION_1_ENTRY_SIZE_V1 + * Size of each entry in region 1. + * + * NVENC_SESSION_INFO_REGION_1_MAX_ENTRIES_COUNT_V1 + * No of entries in region 1. + * + * NVENC_SESSION_INFO_REGION_1_V1 + * This structure represents Region 1. + * + * NVENC_SESSION_INFO_REGION_1_SIZE_V1 + * Size of region 1. + * + * NVENC_SESSION_INFO_REGION_1_OFFSET_V1 + * First region, so offset is 0. + */ + +typedef struct NVENC_SESSION_INFO_REGION_1_ENTRY_V1 { + NV_DECLARE_ALIGNED(NVENC_SESSION_INFO_ENTRY_V1 submissionTSEntry, 8); +} NVENC_SESSION_INFO_REGION_1_ENTRY_V1; + +#define NVENC_SESSION_INFO_REGION_1_ENTRY_SIZE_V1 sizeof(NVENC_SESSION_INFO_REGION_1_ENTRY_V1) + +#define NVENC_SESSION_INFO_REGION_1_MAX_ENTRIES_COUNT_V1 256 + +typedef struct NVENC_SESSION_INFO_REGION_1_V1 { + NV_DECLARE_ALIGNED(NVENC_SESSION_INFO_REGION_1_ENTRY_V1 frameInfo[NVENC_SESSION_INFO_REGION_1_MAX_ENTRIES_COUNT_V1], 8); +} NVENC_SESSION_INFO_REGION_1_V1; + +#define NVENC_SESSION_INFO_REGION_1_SIZE_V1 sizeof(NVENC_SESSION_INFO_REGION_1_V1) + +#define NVENC_SESSION_INFO_REGION_1_OFFSET_V1 0 + +/* + * NVENC_SESSION_INFO_REGION_2_ENTRY_V1 + * This structure represents a complete entry in Region 2. + * startTSEntry + * Frame id and GPU timestamp of the time when frame encoding started. + * endTSEntry + * Frame id and GPU timestamp of the time when frame encoding ended. + * + * NVENC_SESSION_INFO_REGION_2_ENTRY_SIZE_V1 + * Size of each entry in region 2. + * + * NVENC_SESSION_INFO_REGION_2_MAX_ENTRIES_COUNT_V1 + * No of entries in region 2. + * + * NVENC_SESSION_INFO_REGION_2_V1 + * This structure represents Region 2. + * + * NVENC_SESSION_INFO_REGION_2_SIZE_V1 + * Size of region 2. + * + * NVENC_SESSION_INFO_REGION_2_OFFSET_V1 + * Offset of region 2 from base. + */ + +typedef struct NVENC_SESSION_INFO_REGION_2_ENTRY_V1 { + NV_DECLARE_ALIGNED(NVENC_SESSION_INFO_ENTRY_V1 startTSEntry, 8); + NV_DECLARE_ALIGNED(NVENC_SESSION_INFO_ENTRY_V1 endTSEntry, 8); +} NVENC_SESSION_INFO_REGION_2_ENTRY_V1; + +#define NVENC_SESSION_INFO_REGION_2_ENTRY_SIZE_V1 sizeof(NVENC_SESSION_INFO_REGION_2_ENTRY_V1) + +#define NVENC_SESSION_INFO_REGION_2_MAX_ENTRIES_COUNT_V1 NVENC_SESSION_INFO_REGION_1_MAX_ENTRIES_COUNT_V1 + +typedef struct NVENC_SESSION_INFO_REGION_2_V1 { + NV_DECLARE_ALIGNED(NVENC_SESSION_INFO_REGION_2_ENTRY_V1 frameInfo[NVENC_SESSION_INFO_REGION_2_MAX_ENTRIES_COUNT_V1], 8); +} NVENC_SESSION_INFO_REGION_2_V1; + +#define NVENC_SESSION_INFO_REGION_2_SIZE_V1 sizeof(NVENC_SESSION_INFO_REGION_2_V1) + +#define NVENC_SESSION_INFO_REGION_2_OFFSET_V1 (NVENC_SESSION_INFO_REGION_1_OFFSET_V1 + \ + NVENC_SESSION_INFO_REGION_1_SIZE_V1) + +/* + * NVENC_SESSION_INFO_V1 + * This structure represents the complete memory allocated to store the per + * frame submission-start-end timestamps data. + * + * NVENC_SESSION_INFO_SIZE_V1 + * Size of complete memory. + */ + +typedef struct NVENC_SESSION_INFO_V1 { + NV_DECLARE_ALIGNED(NVENC_SESSION_INFO_REGION_1_V1 region1, 8); + NV_DECLARE_ALIGNED(NVENC_SESSION_INFO_REGION_2_V1 region2, 8); +} NVENC_SESSION_INFO_V1; + +#define NVENC_SESSION_INFO_SIZE_V1 sizeof(NVENC_SESSION_INFO_V1) + +/* + * NVA0BC_ALLOC_PARAMETERS + * + * This structure represents NVENC SW session allocation parameters. + * + * codecType + * Codec type to be used to do the encoding. + * hResolution + * Width of frames to be encoded. + * vResolution + * Height of frames to be encoded. + * version + * Adding version to handle any future changes to struct. + * In future we can extend this struct to notify RM that UMD needs to send + * other data. Versioning will help in identifying the difference in structs. + * Values are defined by NVA0BC_ALLOC_PARAMS_VER_xxx. + * hMem + * Handle to the system memory allocated by UMD. + * RM needs to access the memory to get the raw timestamp data and process it. + */ + +#define NVA0BC_ALLOC_PARAMETERS_MESSAGE_ID (0xa0bcU) + +typedef struct NVA0BC_ALLOC_PARAMETERS { + NvU32 codecType; + NvU32 hResolution; + NvU32 vResolution; + + NvU32 version; + NvHandle hMem; +} NVA0BC_ALLOC_PARAMETERS; + +#define NVA0BC_ALLOC_PARAMS_VER_0 0x00000000 +#define NVA0BC_ALLOC_PARAMS_VER_1 0x00000001 + +#define NVA0BC_NVENC_SESSION_CODEC_TYPE_H264 0x000000 +#define NVA0BC_NVENC_SESSION_CODEC_TYPE_HEVC 0x000001 +#define NVA0BC_NVENC_SESSION_CODEC_TYPE_AV1 0x000002 +#define NVA0BC_NVENC_SESSION_CODEC_TYPE_UNKNOWN 0x0000FF diff --git a/userspace/sdks/nv570/inc/class/cla0bd.h b/userspace/sdks/nv570/inc/class/cla0bd.h new file mode 100644 index 0000000..fb91d2d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla0bd.h @@ -0,0 +1,81 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2012-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/cla0bd.finn +// + +#define NVFBC_SW_SESSION (0xa0bdU) /* finn: Evaluated from "NVA0BD_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* + * NVA0BD_ALLOC_PARAMETERS + * + * displayOrdinal + * This parameter specifies the display identifier. + * sessionType + * This parameter NVFBC session type. Possible values are specified + * by NVA0BD_NVFBC_SESSION_TYPE_* macros. + * sessionFlags + * This parameter returns various flags values of the NVFBC session. + * Valid flag values include: + * NVA0BD_NVFBC_SESSION_FLAG_DIFFMAP_ENABLED + * When true this flag indicates there are user has enabled + * diff map feature for the session. + * NVA0BD_NVFBC_SESSION_FLAG_CLASSIFICATIONMAP_ENABLED + * When true this flag indicates there are user has enabled + * diff map feature for the session. + * hMaxResolution + * This parameter returns the max horizontal resolution supported by + * the NvFBC session. + * vMaxResolution + * This parameter returns the max vertical resolution supported by + * the NvFBC session. + */ + +#define NVA0BD_ALLOC_PARAMETERS_MESSAGE_ID (0xa0bdU) + +typedef struct NVA0BD_ALLOC_PARAMETERS { + NvU32 displayOrdinal; + NvU32 sessionType; + NvU32 sessionFlags; + NvU32 hMaxResolution; + NvU32 vMaxResolution; +} NVA0BD_ALLOC_PARAMETERS; + +#define NVA0BD_NVFBC_SESSION_TYPE_UNKNOWN 0x000000 +#define NVA0BD_NVFBC_SESSION_TYPE_TOSYS 0x000001 +#define NVA0BD_NVFBC_SESSION_TYPE_CUDA 0x000002 +#define NVA0BD_NVFBC_SESSION_TYPE_VID 0x000003 +#define NVA0BD_NVFBC_SESSION_TYPE_HWENC 0x000004 + +#define NVA0BD_NVFBC_SESSION_FLAG_DIFFMAP_ENABLED 0:0 +#define NVA0BD_NVFBC_SESSION_FLAG_DIFFMAP_ENABLED_FALSE (0x00000000) +#define NVA0BD_NVFBC_SESSION_FLAG_DIFFMAP_ENABLED_TRUE (0x00000001) +#define NVA0BD_NVFBC_SESSION_FLAG_CLASSIFICATIONMAP_ENABLED 1:1 +#define NVA0BD_NVFBC_SESSION_FLAG_CLASSIFICATIONMAP_ENABLED_FALSE (0x00000000) +#define NVA0BD_NVFBC_SESSION_FLAG_CLASSIFICATIONMAP_ENABLED_TRUE (0x00000001) + diff --git a/userspace/sdks/nv570/inc/class/cla0c0.h b/userspace/sdks/nv570/inc/class/cla0c0.h new file mode 100644 index 0000000..bc73e40 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla0c0.h @@ -0,0 +1,646 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_kepler_compute_a_h_ +#define _cl_kepler_compute_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../class/bin/sw_header.pl kepler_compute_a */ + +#include "nvtypes.h" + +#define KEPLER_COMPUTE_A 0xA0C0 + +#define NVA0C0_SET_OBJECT 0x0000 +#define NVA0C0_SET_OBJECT_CLASS_ID 15:0 +#define NVA0C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVA0C0_NO_OPERATION 0x0100 +#define NVA0C0_NO_OPERATION_V 31:0 + +#define NVA0C0_SET_NOTIFY_A 0x0104 +#define NVA0C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVA0C0_SET_NOTIFY_B 0x0108 +#define NVA0C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVA0C0_NOTIFY 0x010c +#define NVA0C0_NOTIFY_TYPE 31:0 +#define NVA0C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVA0C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVA0C0_WAIT_FOR_IDLE 0x0110 +#define NVA0C0_WAIT_FOR_IDLE_V 31:0 + +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVA0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVA0C0_SEND_GO_IDLE 0x013c +#define NVA0C0_SEND_GO_IDLE_V 31:0 + +#define NVA0C0_PM_TRIGGER 0x0140 +#define NVA0C0_PM_TRIGGER_V 31:0 + +#define NVA0C0_PM_TRIGGER_WFI 0x0144 +#define NVA0C0_PM_TRIGGER_WFI_V 31:0 + +#define NVA0C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVA0C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVA0C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVA0C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVA0C0_LINE_LENGTH_IN 0x0180 +#define NVA0C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVA0C0_LINE_COUNT 0x0184 +#define NVA0C0_LINE_COUNT_VALUE 31:0 + +#define NVA0C0_OFFSET_OUT_UPPER 0x0188 +#define NVA0C0_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVA0C0_OFFSET_OUT 0x018c +#define NVA0C0_OFFSET_OUT_VALUE 31:0 + +#define NVA0C0_PITCH_OUT 0x0190 +#define NVA0C0_PITCH_OUT_VALUE 31:0 + +#define NVA0C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVA0C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVA0C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVA0C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVA0C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVA0C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVA0C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA0C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA0C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA0C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA0C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVA0C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVA0C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVA0C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVA0C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVA0C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVA0C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVA0C0_SET_DST_WIDTH 0x0198 +#define NVA0C0_SET_DST_WIDTH_V 31:0 + +#define NVA0C0_SET_DST_HEIGHT 0x019c +#define NVA0C0_SET_DST_HEIGHT_V 31:0 + +#define NVA0C0_SET_DST_DEPTH 0x01a0 +#define NVA0C0_SET_DST_DEPTH_V 31:0 + +#define NVA0C0_SET_DST_LAYER 0x01a4 +#define NVA0C0_SET_DST_LAYER_V 31:0 + +#define NVA0C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVA0C0_SET_DST_ORIGIN_BYTES_X_V 19:0 + +#define NVA0C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVA0C0_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 + +#define NVA0C0_LAUNCH_DMA 0x01b0 +#define NVA0C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVA0C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVA0C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVA0C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVA0C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVA0C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVA0C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVA0C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVA0C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVA0C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVA0C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVA0C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVA0C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVA0C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVA0C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA0C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA0C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVA0C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA0C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA0C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA0C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVA0C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA0C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVA0C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVA0C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA0C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVA0C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA0C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA0C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVA0C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVA0C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVA0C0_LOAD_INLINE_DATA 0x01b4 +#define NVA0C0_LOAD_INLINE_DATA_V 31:0 + +#define NVA0C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVA0C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVA0C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVA0C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVA0C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVA0C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVA0C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVA0C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVA0C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVA0C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVA0C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVA0C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVA0C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVA0C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVA0C0_PERFMON_TRANSFER 0x0210 +#define NVA0C0_PERFMON_TRANSFER_V 31:0 + +#define NVA0C0_SET_SHADER_SHARED_MEMORY_WINDOW 0x0214 +#define NVA0C0_SET_SHADER_SHARED_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVA0C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVA0C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVA0C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVA0C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVA0C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVA0C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVA0C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVA0C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVA0C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVA0C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVA0C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVA0C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVA0C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVA0C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVA0C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVA0C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVA0C0_SET_CWD_CONTROL 0x0240 +#define NVA0C0_SET_CWD_CONTROL_SM_SELECTION 0:0 +#define NVA0C0_SET_CWD_CONTROL_SM_SELECTION_LOAD_BALANCED 0x00000000 +#define NVA0C0_SET_CWD_CONTROL_SM_SELECTION_ROUND_ROBIN 0x00000001 + +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVA0C0_SET_CWD_REF_COUNTER 0x0248 +#define NVA0C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVA0C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVA0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A 0x0274 +#define NVA0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A_ADDRESS_UPPER 7:0 + +#define NVA0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B 0x0278 +#define NVA0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B_ADDRESS_LOWER 31:0 + +#define NVA0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C 0x027c +#define NVA0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_BYTE_COUNT 16:0 +#define NVA0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2 31:31 +#define NVA0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_FALSE 0x00000000 +#define NVA0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_TRUE 0x00000001 + +#define NVA0C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVA0C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVA0C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA0C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVA0C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVA0C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA0C0_SET_QMD_VERSION 0x0288 +#define NVA0C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVA0C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA0C0_CHECK_QMD_VERSION 0x0290 +#define NVA0C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVA0C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA0C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVA0C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVA0C0_SEND_PCAS_A 0x02b4 +#define NVA0C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVA0C0_SEND_PCAS_B 0x02b8 +#define NVA0C0_SEND_PCAS_B_FROM 23:0 +#define NVA0C0_SEND_PCAS_B_DELTA 31:24 + +#define NVA0C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVA0C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVA0C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVA0C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVA0C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVA0C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVA0C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A 0x02f0 +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B 0x02f4 +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C 0x02f8 +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVA0C0_SET_SPA_VERSION 0x0310 +#define NVA0C0_SET_SPA_VERSION_MINOR 7:0 +#define NVA0C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVA0C0_SET_FALCON00 0x0500 +#define NVA0C0_SET_FALCON00_V 31:0 + +#define NVA0C0_SET_FALCON01 0x0504 +#define NVA0C0_SET_FALCON01_V 31:0 + +#define NVA0C0_SET_FALCON02 0x0508 +#define NVA0C0_SET_FALCON02_V 31:0 + +#define NVA0C0_SET_FALCON03 0x050c +#define NVA0C0_SET_FALCON03_V 31:0 + +#define NVA0C0_SET_FALCON04 0x0510 +#define NVA0C0_SET_FALCON04_V 31:0 + +#define NVA0C0_SET_FALCON05 0x0514 +#define NVA0C0_SET_FALCON05_V 31:0 + +#define NVA0C0_SET_FALCON06 0x0518 +#define NVA0C0_SET_FALCON06_V 31:0 + +#define NVA0C0_SET_FALCON07 0x051c +#define NVA0C0_SET_FALCON07_V 31:0 + +#define NVA0C0_SET_FALCON08 0x0520 +#define NVA0C0_SET_FALCON08_V 31:0 + +#define NVA0C0_SET_FALCON09 0x0524 +#define NVA0C0_SET_FALCON09_V 31:0 + +#define NVA0C0_SET_FALCON10 0x0528 +#define NVA0C0_SET_FALCON10_V 31:0 + +#define NVA0C0_SET_FALCON11 0x052c +#define NVA0C0_SET_FALCON11_V 31:0 + +#define NVA0C0_SET_FALCON12 0x0530 +#define NVA0C0_SET_FALCON12_V 31:0 + +#define NVA0C0_SET_FALCON13 0x0534 +#define NVA0C0_SET_FALCON13_V 31:0 + +#define NVA0C0_SET_FALCON14 0x0538 +#define NVA0C0_SET_FALCON14_V 31:0 + +#define NVA0C0_SET_FALCON15 0x053c +#define NVA0C0_SET_FALCON15_V 31:0 + +#define NVA0C0_SET_FALCON16 0x0540 +#define NVA0C0_SET_FALCON16_V 31:0 + +#define NVA0C0_SET_FALCON17 0x0544 +#define NVA0C0_SET_FALCON17_V 31:0 + +#define NVA0C0_SET_FALCON18 0x0548 +#define NVA0C0_SET_FALCON18_V 31:0 + +#define NVA0C0_SET_FALCON19 0x054c +#define NVA0C0_SET_FALCON19_V 31:0 + +#define NVA0C0_SET_FALCON20 0x0550 +#define NVA0C0_SET_FALCON20_V 31:0 + +#define NVA0C0_SET_FALCON21 0x0554 +#define NVA0C0_SET_FALCON21_V 31:0 + +#define NVA0C0_SET_FALCON22 0x0558 +#define NVA0C0_SET_FALCON22_V 31:0 + +#define NVA0C0_SET_FALCON23 0x055c +#define NVA0C0_SET_FALCON23_V 31:0 + +#define NVA0C0_SET_FALCON24 0x0560 +#define NVA0C0_SET_FALCON24_V 31:0 + +#define NVA0C0_SET_FALCON25 0x0564 +#define NVA0C0_SET_FALCON25_V 31:0 + +#define NVA0C0_SET_FALCON26 0x0568 +#define NVA0C0_SET_FALCON26_V 31:0 + +#define NVA0C0_SET_FALCON27 0x056c +#define NVA0C0_SET_FALCON27_V 31:0 + +#define NVA0C0_SET_FALCON28 0x0570 +#define NVA0C0_SET_FALCON28_V 31:0 + +#define NVA0C0_SET_FALCON29 0x0574 +#define NVA0C0_SET_FALCON29_V 31:0 + +#define NVA0C0_SET_FALCON30 0x0578 +#define NVA0C0_SET_FALCON30_V 31:0 + +#define NVA0C0_SET_FALCON31 0x057c +#define NVA0C0_SET_FALCON31_V 31:0 + +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVA0C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVA0C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVA0C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVA0C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVA0C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVA0C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVA0C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVA0C0_SET_SPARE_NOOP12 0x0f44 +#define NVA0C0_SET_SPARE_NOOP12_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP13 0x0f48 +#define NVA0C0_SET_SPARE_NOOP13_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP14 0x0f4c +#define NVA0C0_SET_SPARE_NOOP14_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP15 0x0f50 +#define NVA0C0_SET_SPARE_NOOP15_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP00 0x1040 +#define NVA0C0_SET_SPARE_NOOP00_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP01 0x1044 +#define NVA0C0_SET_SPARE_NOOP01_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP02 0x1048 +#define NVA0C0_SET_SPARE_NOOP02_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP03 0x104c +#define NVA0C0_SET_SPARE_NOOP03_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP04 0x1050 +#define NVA0C0_SET_SPARE_NOOP04_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP05 0x1054 +#define NVA0C0_SET_SPARE_NOOP05_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP06 0x1058 +#define NVA0C0_SET_SPARE_NOOP06_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP07 0x105c +#define NVA0C0_SET_SPARE_NOOP07_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP08 0x1060 +#define NVA0C0_SET_SPARE_NOOP08_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP09 0x1064 +#define NVA0C0_SET_SPARE_NOOP09_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP10 0x1068 +#define NVA0C0_SET_SPARE_NOOP10_V 31:0 + +#define NVA0C0_SET_SPARE_NOOP11 0x106c +#define NVA0C0_SET_SPARE_NOOP11_V 31:0 + +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVA0C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVA0C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVA0C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVA0C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVA0C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVA0C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVA0C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVA0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVA0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVA0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVA0C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVA0C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVA0C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVA0C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVA0C0_SET_RENDER_ENABLE_A 0x1550 +#define NVA0C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVA0C0_SET_RENDER_ENABLE_B 0x1554 +#define NVA0C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVA0C0_SET_RENDER_ENABLE_C 0x1558 +#define NVA0C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVA0C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVA0C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVA0C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVA0C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVA0C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVA0C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVA0C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVA0C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVA0C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVA0C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVA0C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVA0C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVA0C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVA0C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVA0C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVA0C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVA0C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVA0C0_SET_PROGRAM_REGION_A 0x1608 +#define NVA0C0_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVA0C0_SET_PROGRAM_REGION_B 0x160c +#define NVA0C0_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVA0C0_SET_SHADER_CONTROL 0x1690 +#define NVA0C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVA0C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVA0C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 + +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVA0C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVA0C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVA0C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVA0C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVA0C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVA0C0_PIPE_NOP 0x1a2c +#define NVA0C0_PIPE_NOP_V 31:0 + +#define NVA0C0_SET_SPARE00 0x1a30 +#define NVA0C0_SET_SPARE00_V 31:0 + +#define NVA0C0_SET_SPARE01 0x1a34 +#define NVA0C0_SET_SPARE01_V 31:0 + +#define NVA0C0_SET_SPARE02 0x1a38 +#define NVA0C0_SET_SPARE02_V 31:0 + +#define NVA0C0_SET_SPARE03 0x1a3c +#define NVA0C0_SET_SPARE03_V 31:0 + +#define NVA0C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVA0C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVA0C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVA0C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVA0C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVA0C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVA0C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVA0C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVA0C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVA0C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVA0C0_SET_TRAP_HANDLER 0x260c +#define NVA0C0_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVA0C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVA0C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVA0C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#endif /* _cl_kepler_compute_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cla0c0qmd.h b/userspace/sdks/nv570/inc/class/cla0c0qmd.h new file mode 100644 index 0000000..b04ce5b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla0c0qmd.h @@ -0,0 +1,658 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2016-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __CLA0C0QMD_H__ +#define __CLA0C0QMD_H__ + +/* +** Queue Meta Data, Version 00_06 + */ + +// The below C preprocessor definitions describe "multi-word" structures, where +// fields may have bit numbers beyond 32. For example, MW(127:96) means +// the field is in bits 0-31 of word number 3 of the structure. The "MW(X:Y)" +// syntax is to distinguish from similar "X:Y" single-word definitions: the +// macros historically used for single-word definitions would fail with +// multi-word definitions. +// +// See nvmisc.h:DRF_VAL_MW() in the source code of the kernel +// interface layer of nvidia.ko for an example of how to manipulate +// these MW(X:Y) definitions. + +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_A MW(30:0) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_B MW(31:31) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_C MW(62:32) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_D MW(63:63) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_E MW(94:64) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_F MW(95:95) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_G MW(126:96) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_H MW(127:127) +#define NVA0C0_QMDV00_06_QMD_RESERVED_A_A MW(159:128) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_I MW(191:160) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_J MW(196:192) +#define NVA0C0_QMDV00_06_QMD_RESERVED_A MW(199:197) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_K MW(200:200) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_K_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_K_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_L MW(201:201) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_L_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_L_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_SEMAPHORE_RELEASE_ENABLE0 MW(202:202) +#define NVA0C0_QMDV00_06_SEMAPHORE_RELEASE_ENABLE0_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_SEMAPHORE_RELEASE_ENABLE0_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_SEMAPHORE_RELEASE_ENABLE1 MW(203:203) +#define NVA0C0_QMDV00_06_SEMAPHORE_RELEASE_ENABLE1_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_SEMAPHORE_RELEASE_ENABLE1_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_QMD_RESERVED_B MW(207:204) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_M MW(222:208) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_N MW(223:223) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_N_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_N_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_O MW(248:224) +#define NVA0C0_QMDV00_06_QMD_RESERVED_C MW(249:249) +#define NVA0C0_QMDV00_06_INVALIDATE_TEXTURE_HEADER_CACHE MW(250:250) +#define NVA0C0_QMDV00_06_INVALIDATE_TEXTURE_HEADER_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_INVALIDATE_TEXTURE_HEADER_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_INVALIDATE_TEXTURE_SAMPLER_CACHE MW(251:251) +#define NVA0C0_QMDV00_06_INVALIDATE_TEXTURE_SAMPLER_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_INVALIDATE_TEXTURE_SAMPLER_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_INVALIDATE_TEXTURE_DATA_CACHE MW(252:252) +#define NVA0C0_QMDV00_06_INVALIDATE_TEXTURE_DATA_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_INVALIDATE_TEXTURE_DATA_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_INVALIDATE_SHADER_DATA_CACHE MW(253:253) +#define NVA0C0_QMDV00_06_INVALIDATE_SHADER_DATA_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_INVALIDATE_SHADER_DATA_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_INVALIDATE_INSTRUCTION_CACHE MW(254:254) +#define NVA0C0_QMDV00_06_INVALIDATE_INSTRUCTION_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_INVALIDATE_INSTRUCTION_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_INVALIDATE_SHADER_CONSTANT_CACHE MW(255:255) +#define NVA0C0_QMDV00_06_INVALIDATE_SHADER_CONSTANT_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_INVALIDATE_SHADER_CONSTANT_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_PROGRAM_OFFSET MW(287:256) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_P MW(319:288) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_Q MW(327:320) +#define NVA0C0_QMDV00_06_QMD_RESERVED_D MW(335:328) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_R MW(351:336) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_S MW(357:352) +#define NVA0C0_QMDV00_06_QMD_RESERVED_E MW(365:358) +#define NVA0C0_QMDV00_06_RELEASE_MEMBAR_TYPE MW(366:366) +#define NVA0C0_QMDV00_06_RELEASE_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVA0C0_QMDV00_06_RELEASE_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVA0C0_QMDV00_06_CWD_MEMBAR_TYPE MW(369:368) +#define NVA0C0_QMDV00_06_CWD_MEMBAR_TYPE_L1_NONE 0x00000000 +#define NVA0C0_QMDV00_06_CWD_MEMBAR_TYPE_L1_SYSMEMBAR 0x00000001 +#define NVA0C0_QMDV00_06_CWD_MEMBAR_TYPE_L1_MEMBAR 0x00000003 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_T MW(370:370) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_T_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_T_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_U MW(371:371) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_U_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_U_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_THROTTLED MW(372:372) +#define NVA0C0_QMDV00_06_THROTTLED_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_THROTTLED_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_QMD_RESERVED_E2_A MW(376:376) +#define NVA0C0_QMDV00_06_QMD_RESERVED_E2_B MW(377:377) +#define NVA0C0_QMDV00_06_API_VISIBLE_CALL_LIMIT MW(378:378) +#define NVA0C0_QMDV00_06_API_VISIBLE_CALL_LIMIT__32 0x00000000 +#define NVA0C0_QMDV00_06_API_VISIBLE_CALL_LIMIT_NO_CHECK 0x00000001 +#define NVA0C0_QMDV00_06_SHARED_MEMORY_BANK_MAPPING MW(379:379) +#define NVA0C0_QMDV00_06_SHARED_MEMORY_BANK_MAPPING_FOUR_BYTES_PER_BANK 0x00000000 +#define NVA0C0_QMDV00_06_SHARED_MEMORY_BANK_MAPPING_EIGHT_BYTES_PER_BANK 0x00000001 +#define NVA0C0_QMDV00_06_SAMPLER_INDEX MW(382:382) +#define NVA0C0_QMDV00_06_SAMPLER_INDEX_INDEPENDENTLY 0x00000000 +#define NVA0C0_QMDV00_06_SAMPLER_INDEX_VIA_HEADER_INDEX 0x00000001 +#define NVA0C0_QMDV00_06_QMD_RESERVED_E3_A MW(383:383) +#define NVA0C0_QMDV00_06_CTA_RASTER_WIDTH MW(415:384) +#define NVA0C0_QMDV00_06_CTA_RASTER_HEIGHT MW(431:416) +#define NVA0C0_QMDV00_06_CTA_RASTER_DEPTH MW(447:432) +#define NVA0C0_QMDV00_06_CTA_RASTER_WIDTH_RESUME MW(479:448) +#define NVA0C0_QMDV00_06_CTA_RASTER_HEIGHT_RESUME MW(495:480) +#define NVA0C0_QMDV00_06_CTA_RASTER_DEPTH_RESUME MW(511:496) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_V MW(535:512) +#define NVA0C0_QMDV00_06_QMD_RESERVED_F MW(542:536) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_W MW(543:543) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_W_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_W_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_SHARED_MEMORY_SIZE MW(561:544) +#define NVA0C0_QMDV00_06_QMD_RESERVED_G MW(575:562) +#define NVA0C0_QMDV00_06_QMD_VERSION MW(579:576) +#define NVA0C0_QMDV00_06_QMD_MAJOR_VERSION MW(583:580) +#define NVA0C0_QMDV00_06_QMD_RESERVED_H MW(591:584) +#define NVA0C0_QMDV00_06_CTA_THREAD_DIMENSION0 MW(607:592) +#define NVA0C0_QMDV00_06_CTA_THREAD_DIMENSION1 MW(623:608) +#define NVA0C0_QMDV00_06_CTA_THREAD_DIMENSION2 MW(639:624) +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_VALID(i) MW((640+(i)*1):(640+(i)*1)) +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_QMD_RESERVED_I MW(668:648) +#define NVA0C0_QMDV00_06_L1_CONFIGURATION MW(671:669) +#define NVA0C0_QMDV00_06_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVA0C0_QMDV00_06_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_32KB 0x00000002 +#define NVA0C0_QMDV00_06_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_X MW(703:672) +#define NVA0C0_QMDV00_06_QMD_RESERVED_V1_Y MW(735:704) +#define NVA0C0_QMDV00_06_RELEASE0_ADDRESS_LOWER MW(767:736) +#define NVA0C0_QMDV00_06_RELEASE0_ADDRESS_UPPER MW(775:768) +#define NVA0C0_QMDV00_06_QMD_RESERVED_J MW(783:776) +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_OP MW(790:788) +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_OP_RED_INC 0x00000003 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_OP_RED_AND 0x00000005 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_OP_RED_OR 0x00000006 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA0C0_QMDV00_06_QMD_RESERVED_K MW(791:791) +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_FORMAT MW(793:792) +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_ENABLE MW(794:794) +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_RELEASE0_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_RELEASE0_STRUCTURE_SIZE MW(799:799) +#define NVA0C0_QMDV00_06_RELEASE0_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA0C0_QMDV00_06_RELEASE0_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA0C0_QMDV00_06_RELEASE0_PAYLOAD MW(831:800) +#define NVA0C0_QMDV00_06_RELEASE1_ADDRESS_LOWER MW(863:832) +#define NVA0C0_QMDV00_06_RELEASE1_ADDRESS_UPPER MW(871:864) +#define NVA0C0_QMDV00_06_QMD_RESERVED_L MW(879:872) +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_OP MW(886:884) +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_OP_RED_INC 0x00000003 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_OP_RED_AND 0x00000005 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_OP_RED_OR 0x00000006 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA0C0_QMDV00_06_QMD_RESERVED_M MW(887:887) +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_FORMAT MW(889:888) +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_ENABLE MW(890:890) +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_RELEASE1_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_RELEASE1_STRUCTURE_SIZE MW(895:895) +#define NVA0C0_QMDV00_06_RELEASE1_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA0C0_QMDV00_06_RELEASE1_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA0C0_QMDV00_06_RELEASE1_PAYLOAD MW(927:896) +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_ADDR_LOWER(i) MW((959+(i)*64):(928+(i)*64)) +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_ADDR_UPPER(i) MW((967+(i)*64):(960+(i)*64)) +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_RESERVED_ADDR(i) MW((973+(i)*64):(968+(i)*64)) +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_INVALIDATE(i) MW((974+(i)*64):(974+(i)*64)) +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_INVALIDATE_FALSE 0x00000000 +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_INVALIDATE_TRUE 0x00000001 +#define NVA0C0_QMDV00_06_CONSTANT_BUFFER_SIZE(i) MW((991+(i)*64):(975+(i)*64)) +#define NVA0C0_QMDV00_06_SHADER_LOCAL_MEMORY_LOW_SIZE MW(1463:1440) +#define NVA0C0_QMDV00_06_QMD_RESERVED_N MW(1466:1464) +#define NVA0C0_QMDV00_06_BARRIER_COUNT MW(1471:1467) +#define NVA0C0_QMDV00_06_SHADER_LOCAL_MEMORY_HIGH_SIZE MW(1495:1472) +#define NVA0C0_QMDV00_06_REGISTER_COUNT MW(1503:1496) +#define NVA0C0_QMDV00_06_SHADER_LOCAL_MEMORY_CRS_SIZE MW(1527:1504) +#define NVA0C0_QMDV00_06_SASS_VERSION MW(1535:1528) +#define NVA0C0_QMDV00_06_QMD_SPARE_A MW(1567:1536) +#define NVA0C0_QMDV00_06_QMD_SPARE_B MW(1599:1568) +#define NVA0C0_QMDV00_06_QMD_SPARE_C MW(1631:1600) +#define NVA0C0_QMDV00_06_QMD_SPARE_D MW(1663:1632) +#define NVA0C0_QMDV00_06_QMD_SPARE_E MW(1695:1664) +#define NVA0C0_QMDV00_06_QMD_SPARE_F MW(1727:1696) +#define NVA0C0_QMDV00_06_QMD_SPARE_G MW(1759:1728) +#define NVA0C0_QMDV00_06_QMD_SPARE_H MW(1791:1760) +#define NVA0C0_QMDV00_06_QMD_SPARE_I MW(1823:1792) +#define NVA0C0_QMDV00_06_QMD_SPARE_J MW(1855:1824) +#define NVA0C0_QMDV00_06_QMD_SPARE_K MW(1887:1856) +#define NVA0C0_QMDV00_06_QMD_SPARE_L MW(1919:1888) +#define NVA0C0_QMDV00_06_QMD_SPARE_M MW(1951:1920) +#define NVA0C0_QMDV00_06_QMD_SPARE_N MW(1983:1952) +#define NVA0C0_QMDV00_06_DEBUG_ID_UPPER MW(2015:1984) +#define NVA0C0_QMDV00_06_DEBUG_ID_LOWER MW(2047:2016) + + +/* +** Queue Meta Data, Version 01_06 + */ + +#define NVA0C0_QMDV01_06_OUTER_PUT MW(30:0) +#define NVA0C0_QMDV01_06_OUTER_OVERFLOW MW(31:31) +#define NVA0C0_QMDV01_06_OUTER_GET MW(62:32) +#define NVA0C0_QMDV01_06_OUTER_STICKY_OVERFLOW MW(63:63) +#define NVA0C0_QMDV01_06_INNER_GET MW(94:64) +#define NVA0C0_QMDV01_06_INNER_OVERFLOW MW(95:95) +#define NVA0C0_QMDV01_06_INNER_PUT MW(126:96) +#define NVA0C0_QMDV01_06_INNER_STICKY_OVERFLOW MW(127:127) +#define NVA0C0_QMDV01_06_QMD_RESERVED_A_A MW(159:128) +#define NVA0C0_QMDV01_06_SCHEDULER_NEXT_QMD_POINTER MW(191:160) +#define NVA0C0_QMDV01_06_QMD_GROUP_ID MW(197:192) +#define NVA0C0_QMDV01_06_QMD_RESERVED_A MW(199:198) +#define NVA0C0_QMDV01_06_SCHEDULE_ON_PUT_UPDATE_ENABLE MW(200:200) +#define NVA0C0_QMDV01_06_SCHEDULE_ON_PUT_UPDATE_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_SCHEDULE_ON_PUT_UPDATE_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST MW(201:201) +#define NVA0C0_QMDV01_06_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_SEMAPHORE_RELEASE_ENABLE0 MW(202:202) +#define NVA0C0_QMDV01_06_SEMAPHORE_RELEASE_ENABLE0_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_SEMAPHORE_RELEASE_ENABLE0_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_SEMAPHORE_RELEASE_ENABLE1 MW(203:203) +#define NVA0C0_QMDV01_06_SEMAPHORE_RELEASE_ENABLE1_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_SEMAPHORE_RELEASE_ENABLE1_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_REQUIRE_SCHEDULING_PCAS MW(204:204) +#define NVA0C0_QMDV01_06_REQUIRE_SCHEDULING_PCAS_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_REQUIRE_SCHEDULING_PCAS_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_QMD_RESERVED_B MW(207:205) +#define NVA0C0_QMDV01_06_SKED_PRIVATE_LIST_ADDR MW(222:208) +#define NVA0C0_QMDV01_06_SKED_PRIVATE_LIST_VALID MW(223:223) +#define NVA0C0_QMDV01_06_SKED_PRIVATE_LIST_VALID_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_SKED_PRIVATE_LIST_VALID_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_CIRCULAR_QUEUE_SIZE MW(248:224) +#define NVA0C0_QMDV01_06_QMD_RESERVED_C MW(249:249) +#define NVA0C0_QMDV01_06_INVALIDATE_TEXTURE_HEADER_CACHE MW(250:250) +#define NVA0C0_QMDV01_06_INVALIDATE_TEXTURE_HEADER_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_INVALIDATE_TEXTURE_HEADER_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_INVALIDATE_TEXTURE_SAMPLER_CACHE MW(251:251) +#define NVA0C0_QMDV01_06_INVALIDATE_TEXTURE_SAMPLER_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_INVALIDATE_TEXTURE_SAMPLER_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_INVALIDATE_TEXTURE_DATA_CACHE MW(252:252) +#define NVA0C0_QMDV01_06_INVALIDATE_TEXTURE_DATA_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_INVALIDATE_TEXTURE_DATA_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_INVALIDATE_SHADER_DATA_CACHE MW(253:253) +#define NVA0C0_QMDV01_06_INVALIDATE_SHADER_DATA_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_INVALIDATE_SHADER_DATA_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_INVALIDATE_INSTRUCTION_CACHE MW(254:254) +#define NVA0C0_QMDV01_06_INVALIDATE_INSTRUCTION_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_INVALIDATE_INSTRUCTION_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_INVALIDATE_SHADER_CONSTANT_CACHE MW(255:255) +#define NVA0C0_QMDV01_06_INVALIDATE_SHADER_CONSTANT_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_INVALIDATE_SHADER_CONSTANT_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_PROGRAM_OFFSET MW(287:256) +#define NVA0C0_QMDV01_06_CIRCULAR_QUEUE_ADDR_LOWER MW(319:288) +#define NVA0C0_QMDV01_06_CIRCULAR_QUEUE_ADDR_UPPER MW(327:320) +#define NVA0C0_QMDV01_06_QMD_RESERVED_D MW(335:328) +#define NVA0C0_QMDV01_06_CIRCULAR_QUEUE_ENTRY_SIZE MW(351:336) +#define NVA0C0_QMDV01_06_CWD_REFERENCE_COUNT_ID MW(357:352) +#define NVA0C0_QMDV01_06_CWD_REFERENCE_COUNT_DELTA_MINUS_ONE MW(365:358) +#define NVA0C0_QMDV01_06_RELEASE_MEMBAR_TYPE MW(366:366) +#define NVA0C0_QMDV01_06_RELEASE_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVA0C0_QMDV01_06_RELEASE_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVA0C0_QMDV01_06_CWD_REFERENCE_COUNT_INCR_ENABLE MW(367:367) +#define NVA0C0_QMDV01_06_CWD_REFERENCE_COUNT_INCR_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_CWD_REFERENCE_COUNT_INCR_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_CWD_MEMBAR_TYPE MW(369:368) +#define NVA0C0_QMDV01_06_CWD_MEMBAR_TYPE_L1_NONE 0x00000000 +#define NVA0C0_QMDV01_06_CWD_MEMBAR_TYPE_L1_SYSMEMBAR 0x00000001 +#define NVA0C0_QMDV01_06_CWD_MEMBAR_TYPE_L1_MEMBAR 0x00000003 +#define NVA0C0_QMDV01_06_SEQUENTIALLY_RUN_CTAS MW(370:370) +#define NVA0C0_QMDV01_06_SEQUENTIALLY_RUN_CTAS_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_SEQUENTIALLY_RUN_CTAS_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_CWD_REFERENCE_COUNT_DECR_ENABLE MW(371:371) +#define NVA0C0_QMDV01_06_CWD_REFERENCE_COUNT_DECR_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_CWD_REFERENCE_COUNT_DECR_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_THROTTLED MW(372:372) +#define NVA0C0_QMDV01_06_THROTTLED_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_THROTTLED_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_FP32_NAN_BEHAVIOR MW(376:376) +#define NVA0C0_QMDV01_06_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVA0C0_QMDV01_06_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVA0C0_QMDV01_06_FP32_F2I_NAN_BEHAVIOR MW(377:377) +#define NVA0C0_QMDV01_06_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVA0C0_QMDV01_06_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 +#define NVA0C0_QMDV01_06_API_VISIBLE_CALL_LIMIT MW(378:378) +#define NVA0C0_QMDV01_06_API_VISIBLE_CALL_LIMIT__32 0x00000000 +#define NVA0C0_QMDV01_06_API_VISIBLE_CALL_LIMIT_NO_CHECK 0x00000001 +#define NVA0C0_QMDV01_06_SHARED_MEMORY_BANK_MAPPING MW(379:379) +#define NVA0C0_QMDV01_06_SHARED_MEMORY_BANK_MAPPING_FOUR_BYTES_PER_BANK 0x00000000 +#define NVA0C0_QMDV01_06_SHARED_MEMORY_BANK_MAPPING_EIGHT_BYTES_PER_BANK 0x00000001 +#define NVA0C0_QMDV01_06_SAMPLER_INDEX MW(382:382) +#define NVA0C0_QMDV01_06_SAMPLER_INDEX_INDEPENDENTLY 0x00000000 +#define NVA0C0_QMDV01_06_SAMPLER_INDEX_VIA_HEADER_INDEX 0x00000001 +#define NVA0C0_QMDV01_06_FP32_NARROW_INSTRUCTION MW(383:383) +#define NVA0C0_QMDV01_06_FP32_NARROW_INSTRUCTION_KEEP_DENORMS 0x00000000 +#define NVA0C0_QMDV01_06_FP32_NARROW_INSTRUCTION_FLUSH_DENORMS 0x00000001 +#define NVA0C0_QMDV01_06_CTA_RASTER_WIDTH MW(415:384) +#define NVA0C0_QMDV01_06_CTA_RASTER_HEIGHT MW(431:416) +#define NVA0C0_QMDV01_06_CTA_RASTER_DEPTH MW(447:432) +#define NVA0C0_QMDV01_06_CTA_RASTER_WIDTH_RESUME MW(479:448) +#define NVA0C0_QMDV01_06_CTA_RASTER_HEIGHT_RESUME MW(495:480) +#define NVA0C0_QMDV01_06_CTA_RASTER_DEPTH_RESUME MW(511:496) +#define NVA0C0_QMDV01_06_LAUNCH_QUOTA MW(535:512) +#define NVA0C0_QMDV01_06_QMD_RESERVED_F MW(542:536) +#define NVA0C0_QMDV01_06_LAUNCH_QUOTA_ENABLE MW(543:543) +#define NVA0C0_QMDV01_06_LAUNCH_QUOTA_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_LAUNCH_QUOTA_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_SHARED_MEMORY_SIZE MW(561:544) +#define NVA0C0_QMDV01_06_QMD_RESERVED_G MW(575:562) +#define NVA0C0_QMDV01_06_QMD_VERSION MW(579:576) +#define NVA0C0_QMDV01_06_QMD_MAJOR_VERSION MW(583:580) +#define NVA0C0_QMDV01_06_QMD_RESERVED_H MW(591:584) +#define NVA0C0_QMDV01_06_CTA_THREAD_DIMENSION0 MW(607:592) +#define NVA0C0_QMDV01_06_CTA_THREAD_DIMENSION1 MW(623:608) +#define NVA0C0_QMDV01_06_CTA_THREAD_DIMENSION2 MW(639:624) +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_VALID(i) MW((640+(i)*1):(640+(i)*1)) +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_QMD_RESERVED_I MW(668:648) +#define NVA0C0_QMDV01_06_L1_CONFIGURATION MW(671:669) +#define NVA0C0_QMDV01_06_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVA0C0_QMDV01_06_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_32KB 0x00000002 +#define NVA0C0_QMDV01_06_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 +#define NVA0C0_QMDV01_06_SM_DISABLE_MASK_LOWER MW(703:672) +#define NVA0C0_QMDV01_06_SM_DISABLE_MASK_UPPER MW(735:704) +#define NVA0C0_QMDV01_06_RELEASE0_ADDRESS_LOWER MW(767:736) +#define NVA0C0_QMDV01_06_RELEASE0_ADDRESS_UPPER MW(775:768) +#define NVA0C0_QMDV01_06_QMD_RESERVED_J MW(783:776) +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_OP MW(790:788) +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_OP_RED_INC 0x00000003 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_OP_RED_AND 0x00000005 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_OP_RED_OR 0x00000006 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA0C0_QMDV01_06_QMD_RESERVED_K MW(791:791) +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_FORMAT MW(793:792) +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_ENABLE MW(794:794) +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_RELEASE0_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_RELEASE0_STRUCTURE_SIZE MW(799:799) +#define NVA0C0_QMDV01_06_RELEASE0_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA0C0_QMDV01_06_RELEASE0_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA0C0_QMDV01_06_RELEASE0_PAYLOAD MW(831:800) +#define NVA0C0_QMDV01_06_RELEASE1_ADDRESS_LOWER MW(863:832) +#define NVA0C0_QMDV01_06_RELEASE1_ADDRESS_UPPER MW(871:864) +#define NVA0C0_QMDV01_06_QMD_RESERVED_L MW(879:872) +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_OP MW(886:884) +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_OP_RED_INC 0x00000003 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_OP_RED_AND 0x00000005 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_OP_RED_OR 0x00000006 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA0C0_QMDV01_06_QMD_RESERVED_M MW(887:887) +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_FORMAT MW(889:888) +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_ENABLE MW(890:890) +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_RELEASE1_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_RELEASE1_STRUCTURE_SIZE MW(895:895) +#define NVA0C0_QMDV01_06_RELEASE1_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA0C0_QMDV01_06_RELEASE1_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA0C0_QMDV01_06_RELEASE1_PAYLOAD MW(927:896) +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_ADDR_LOWER(i) MW((959+(i)*64):(928+(i)*64)) +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_ADDR_UPPER(i) MW((967+(i)*64):(960+(i)*64)) +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_RESERVED_ADDR(i) MW((973+(i)*64):(968+(i)*64)) +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_INVALIDATE(i) MW((974+(i)*64):(974+(i)*64)) +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_INVALIDATE_FALSE 0x00000000 +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_INVALIDATE_TRUE 0x00000001 +#define NVA0C0_QMDV01_06_CONSTANT_BUFFER_SIZE(i) MW((991+(i)*64):(975+(i)*64)) +#define NVA0C0_QMDV01_06_SHADER_LOCAL_MEMORY_LOW_SIZE MW(1463:1440) +#define NVA0C0_QMDV01_06_QMD_RESERVED_N MW(1466:1464) +#define NVA0C0_QMDV01_06_BARRIER_COUNT MW(1471:1467) +#define NVA0C0_QMDV01_06_SHADER_LOCAL_MEMORY_HIGH_SIZE MW(1495:1472) +#define NVA0C0_QMDV01_06_REGISTER_COUNT MW(1503:1496) +#define NVA0C0_QMDV01_06_SHADER_LOCAL_MEMORY_CRS_SIZE MW(1527:1504) +#define NVA0C0_QMDV01_06_SASS_VERSION MW(1535:1528) +#define NVA0C0_QMDV01_06_HW_ONLY_INNER_GET MW(1566:1536) +#define NVA0C0_QMDV01_06_HW_ONLY_REQUIRE_SCHEDULING_PCAS MW(1567:1567) +#define NVA0C0_QMDV01_06_HW_ONLY_INNER_PUT MW(1598:1568) +#define NVA0C0_QMDV01_06_HW_ONLY_SCHEDULE_ON_PUT_UPDATE_ENABLE MW(1599:1599) +#define NVA0C0_QMDV01_06_QUEUE_ENTRIES_PER_CTA_MINUS_ONE MW(1606:1600) +#define NVA0C0_QMDV01_06_QMD_RESERVED_Q MW(1609:1607) +#define NVA0C0_QMDV01_06_COALESCE_WAITING_PERIOD MW(1617:1610) +#define NVA0C0_QMDV01_06_QMD_RESERVED_R MW(1631:1618) +#define NVA0C0_QMDV01_06_QMD_SPARE_D MW(1663:1632) +#define NVA0C0_QMDV01_06_QMD_SPARE_E MW(1695:1664) +#define NVA0C0_QMDV01_06_QMD_SPARE_F MW(1727:1696) +#define NVA0C0_QMDV01_06_QMD_SPARE_G MW(1759:1728) +#define NVA0C0_QMDV01_06_QMD_SPARE_H MW(1791:1760) +#define NVA0C0_QMDV01_06_QMD_SPARE_I MW(1823:1792) +#define NVA0C0_QMDV01_06_QMD_SPARE_J MW(1855:1824) +#define NVA0C0_QMDV01_06_QMD_SPARE_K MW(1887:1856) +#define NVA0C0_QMDV01_06_QMD_SPARE_L MW(1919:1888) +#define NVA0C0_QMDV01_06_QMD_SPARE_M MW(1951:1920) +#define NVA0C0_QMDV01_06_QMD_SPARE_N MW(1983:1952) +#define NVA0C0_QMDV01_06_DEBUG_ID_UPPER MW(2015:1984) +#define NVA0C0_QMDV01_06_DEBUG_ID_LOWER MW(2047:2016) + + +/* +** Queue Meta Data, Version 01_07 + */ + +#define NVA0C0_QMDV01_07_OUTER_PUT MW(30:0) +#define NVA0C0_QMDV01_07_OUTER_OVERFLOW MW(31:31) +#define NVA0C0_QMDV01_07_OUTER_GET MW(62:32) +#define NVA0C0_QMDV01_07_OUTER_STICKY_OVERFLOW MW(63:63) +#define NVA0C0_QMDV01_07_INNER_GET MW(94:64) +#define NVA0C0_QMDV01_07_INNER_OVERFLOW MW(95:95) +#define NVA0C0_QMDV01_07_INNER_PUT MW(126:96) +#define NVA0C0_QMDV01_07_INNER_STICKY_OVERFLOW MW(127:127) +#define NVA0C0_QMDV01_07_QMD_RESERVED_A_A MW(159:128) +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_POINTER MW(191:160) +#define NVA0C0_QMDV01_07_QMD_GROUP_ID MW(197:192) +#define NVA0C0_QMDV01_07_QMD_RESERVED_A MW(200:198) +#define NVA0C0_QMDV01_07_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST MW(201:201) +#define NVA0C0_QMDV01_07_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_ADD_TO_HEAD_OF_QMD_GROUP_LINKED_LIST_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_SEMAPHORE_RELEASE_ENABLE0 MW(202:202) +#define NVA0C0_QMDV01_07_SEMAPHORE_RELEASE_ENABLE0_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_SEMAPHORE_RELEASE_ENABLE0_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_SEMAPHORE_RELEASE_ENABLE1 MW(203:203) +#define NVA0C0_QMDV01_07_SEMAPHORE_RELEASE_ENABLE1_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_SEMAPHORE_RELEASE_ENABLE1_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_REQUIRE_SCHEDULING_PCAS MW(204:204) +#define NVA0C0_QMDV01_07_REQUIRE_SCHEDULING_PCAS_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_REQUIRE_SCHEDULING_PCAS_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_SCHEDULE_ENABLE MW(205:205) +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_SCHEDULE_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_SCHEDULE_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_TYPE MW(206:206) +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_TYPE_QUEUE 0x00000000 +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_TYPE_GRID 0x00000001 +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_FIELD_COPY MW(207:207) +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_FIELD_COPY_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_DEPENDENT_QMD_FIELD_COPY_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_QMD_RESERVED_B MW(223:208) +#define NVA0C0_QMDV01_07_CIRCULAR_QUEUE_SIZE MW(248:224) +#define NVA0C0_QMDV01_07_QMD_RESERVED_C MW(249:249) +#define NVA0C0_QMDV01_07_INVALIDATE_TEXTURE_HEADER_CACHE MW(250:250) +#define NVA0C0_QMDV01_07_INVALIDATE_TEXTURE_HEADER_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_INVALIDATE_TEXTURE_HEADER_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_INVALIDATE_TEXTURE_SAMPLER_CACHE MW(251:251) +#define NVA0C0_QMDV01_07_INVALIDATE_TEXTURE_SAMPLER_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_INVALIDATE_TEXTURE_SAMPLER_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_INVALIDATE_TEXTURE_DATA_CACHE MW(252:252) +#define NVA0C0_QMDV01_07_INVALIDATE_TEXTURE_DATA_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_INVALIDATE_TEXTURE_DATA_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_INVALIDATE_SHADER_DATA_CACHE MW(253:253) +#define NVA0C0_QMDV01_07_INVALIDATE_SHADER_DATA_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_INVALIDATE_SHADER_DATA_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_INVALIDATE_INSTRUCTION_CACHE MW(254:254) +#define NVA0C0_QMDV01_07_INVALIDATE_INSTRUCTION_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_INVALIDATE_INSTRUCTION_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_INVALIDATE_SHADER_CONSTANT_CACHE MW(255:255) +#define NVA0C0_QMDV01_07_INVALIDATE_SHADER_CONSTANT_CACHE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_INVALIDATE_SHADER_CONSTANT_CACHE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_PROGRAM_OFFSET MW(287:256) +#define NVA0C0_QMDV01_07_CIRCULAR_QUEUE_ADDR_LOWER MW(319:288) +#define NVA0C0_QMDV01_07_CIRCULAR_QUEUE_ADDR_UPPER MW(327:320) +#define NVA0C0_QMDV01_07_QMD_RESERVED_D MW(335:328) +#define NVA0C0_QMDV01_07_CIRCULAR_QUEUE_ENTRY_SIZE MW(351:336) +#define NVA0C0_QMDV01_07_CWD_REFERENCE_COUNT_ID MW(357:352) +#define NVA0C0_QMDV01_07_CWD_REFERENCE_COUNT_DELTA_MINUS_ONE MW(365:358) +#define NVA0C0_QMDV01_07_RELEASE_MEMBAR_TYPE MW(366:366) +#define NVA0C0_QMDV01_07_RELEASE_MEMBAR_TYPE_FE_NONE 0x00000000 +#define NVA0C0_QMDV01_07_RELEASE_MEMBAR_TYPE_FE_SYSMEMBAR 0x00000001 +#define NVA0C0_QMDV01_07_CWD_REFERENCE_COUNT_INCR_ENABLE MW(367:367) +#define NVA0C0_QMDV01_07_CWD_REFERENCE_COUNT_INCR_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_CWD_REFERENCE_COUNT_INCR_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_CWD_MEMBAR_TYPE MW(369:368) +#define NVA0C0_QMDV01_07_CWD_MEMBAR_TYPE_L1_NONE 0x00000000 +#define NVA0C0_QMDV01_07_CWD_MEMBAR_TYPE_L1_SYSMEMBAR 0x00000001 +#define NVA0C0_QMDV01_07_CWD_MEMBAR_TYPE_L1_MEMBAR 0x00000003 +#define NVA0C0_QMDV01_07_SEQUENTIALLY_RUN_CTAS MW(370:370) +#define NVA0C0_QMDV01_07_SEQUENTIALLY_RUN_CTAS_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_SEQUENTIALLY_RUN_CTAS_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_CWD_REFERENCE_COUNT_DECR_ENABLE MW(371:371) +#define NVA0C0_QMDV01_07_CWD_REFERENCE_COUNT_DECR_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_CWD_REFERENCE_COUNT_DECR_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_THROTTLED MW(372:372) +#define NVA0C0_QMDV01_07_THROTTLED_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_THROTTLED_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_FP32_NAN_BEHAVIOR MW(376:376) +#define NVA0C0_QMDV01_07_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVA0C0_QMDV01_07_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVA0C0_QMDV01_07_FP32_F2I_NAN_BEHAVIOR MW(377:377) +#define NVA0C0_QMDV01_07_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVA0C0_QMDV01_07_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 +#define NVA0C0_QMDV01_07_API_VISIBLE_CALL_LIMIT MW(378:378) +#define NVA0C0_QMDV01_07_API_VISIBLE_CALL_LIMIT__32 0x00000000 +#define NVA0C0_QMDV01_07_API_VISIBLE_CALL_LIMIT_NO_CHECK 0x00000001 +#define NVA0C0_QMDV01_07_SHARED_MEMORY_BANK_MAPPING MW(379:379) +#define NVA0C0_QMDV01_07_SHARED_MEMORY_BANK_MAPPING_FOUR_BYTES_PER_BANK 0x00000000 +#define NVA0C0_QMDV01_07_SHARED_MEMORY_BANK_MAPPING_EIGHT_BYTES_PER_BANK 0x00000001 +#define NVA0C0_QMDV01_07_SAMPLER_INDEX MW(382:382) +#define NVA0C0_QMDV01_07_SAMPLER_INDEX_INDEPENDENTLY 0x00000000 +#define NVA0C0_QMDV01_07_SAMPLER_INDEX_VIA_HEADER_INDEX 0x00000001 +#define NVA0C0_QMDV01_07_FP32_NARROW_INSTRUCTION MW(383:383) +#define NVA0C0_QMDV01_07_FP32_NARROW_INSTRUCTION_KEEP_DENORMS 0x00000000 +#define NVA0C0_QMDV01_07_FP32_NARROW_INSTRUCTION_FLUSH_DENORMS 0x00000001 +#define NVA0C0_QMDV01_07_CTA_RASTER_WIDTH MW(415:384) +#define NVA0C0_QMDV01_07_CTA_RASTER_HEIGHT MW(431:416) +#define NVA0C0_QMDV01_07_CTA_RASTER_DEPTH MW(447:432) +#define NVA0C0_QMDV01_07_CTA_RASTER_WIDTH_RESUME MW(479:448) +#define NVA0C0_QMDV01_07_CTA_RASTER_HEIGHT_RESUME MW(495:480) +#define NVA0C0_QMDV01_07_CTA_RASTER_DEPTH_RESUME MW(511:496) +#define NVA0C0_QMDV01_07_QUEUE_ENTRIES_PER_CTA_MINUS_ONE MW(518:512) +#define NVA0C0_QMDV01_07_COALESCE_WAITING_PERIOD MW(529:522) +#define NVA0C0_QMDV01_07_SHARED_MEMORY_SIZE MW(561:544) +#define NVA0C0_QMDV01_07_QMD_RESERVED_G MW(575:562) +#define NVA0C0_QMDV01_07_QMD_VERSION MW(579:576) +#define NVA0C0_QMDV01_07_QMD_MAJOR_VERSION MW(583:580) +#define NVA0C0_QMDV01_07_QMD_RESERVED_H MW(591:584) +#define NVA0C0_QMDV01_07_CTA_THREAD_DIMENSION0 MW(607:592) +#define NVA0C0_QMDV01_07_CTA_THREAD_DIMENSION1 MW(623:608) +#define NVA0C0_QMDV01_07_CTA_THREAD_DIMENSION2 MW(639:624) +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_VALID(i) MW((640+(i)*1):(640+(i)*1)) +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_QMD_RESERVED_I MW(668:648) +#define NVA0C0_QMDV01_07_L1_CONFIGURATION MW(671:669) +#define NVA0C0_QMDV01_07_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVA0C0_QMDV01_07_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_32KB 0x00000002 +#define NVA0C0_QMDV01_07_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 +#define NVA0C0_QMDV01_07_SM_DISABLE_MASK_LOWER MW(703:672) +#define NVA0C0_QMDV01_07_SM_DISABLE_MASK_UPPER MW(735:704) +#define NVA0C0_QMDV01_07_RELEASE0_ADDRESS_LOWER MW(767:736) +#define NVA0C0_QMDV01_07_RELEASE0_ADDRESS_UPPER MW(775:768) +#define NVA0C0_QMDV01_07_QMD_RESERVED_J MW(783:776) +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_OP MW(790:788) +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_OP_RED_INC 0x00000003 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_OP_RED_AND 0x00000005 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_OP_RED_OR 0x00000006 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA0C0_QMDV01_07_QMD_RESERVED_K MW(791:791) +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_FORMAT MW(793:792) +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_ENABLE MW(794:794) +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_RELEASE0_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_RELEASE0_STRUCTURE_SIZE MW(799:799) +#define NVA0C0_QMDV01_07_RELEASE0_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA0C0_QMDV01_07_RELEASE0_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA0C0_QMDV01_07_RELEASE0_PAYLOAD MW(831:800) +#define NVA0C0_QMDV01_07_RELEASE1_ADDRESS_LOWER MW(863:832) +#define NVA0C0_QMDV01_07_RELEASE1_ADDRESS_UPPER MW(871:864) +#define NVA0C0_QMDV01_07_QMD_RESERVED_L MW(879:872) +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_OP MW(886:884) +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_OP_RED_INC 0x00000003 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_OP_RED_AND 0x00000005 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_OP_RED_OR 0x00000006 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA0C0_QMDV01_07_QMD_RESERVED_M MW(887:887) +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_FORMAT MW(889:888) +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_ENABLE MW(890:890) +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_RELEASE1_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_RELEASE1_STRUCTURE_SIZE MW(895:895) +#define NVA0C0_QMDV01_07_RELEASE1_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA0C0_QMDV01_07_RELEASE1_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA0C0_QMDV01_07_RELEASE1_PAYLOAD MW(927:896) +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_ADDR_LOWER(i) MW((959+(i)*64):(928+(i)*64)) +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_ADDR_UPPER(i) MW((967+(i)*64):(960+(i)*64)) +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_RESERVED_ADDR(i) MW((973+(i)*64):(968+(i)*64)) +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_INVALIDATE(i) MW((974+(i)*64):(974+(i)*64)) +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_INVALIDATE_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_INVALIDATE_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_CONSTANT_BUFFER_SIZE(i) MW((991+(i)*64):(975+(i)*64)) +#define NVA0C0_QMDV01_07_SHADER_LOCAL_MEMORY_LOW_SIZE MW(1463:1440) +#define NVA0C0_QMDV01_07_QMD_RESERVED_N MW(1466:1464) +#define NVA0C0_QMDV01_07_BARRIER_COUNT MW(1471:1467) +#define NVA0C0_QMDV01_07_SHADER_LOCAL_MEMORY_HIGH_SIZE MW(1495:1472) +#define NVA0C0_QMDV01_07_REGISTER_COUNT MW(1503:1496) +#define NVA0C0_QMDV01_07_SHADER_LOCAL_MEMORY_CRS_SIZE MW(1527:1504) +#define NVA0C0_QMDV01_07_SASS_VERSION MW(1535:1528) +#define NVA0C0_QMDV01_07_HW_ONLY_INNER_GET MW(1566:1536) +#define NVA0C0_QMDV01_07_HW_ONLY_REQUIRE_SCHEDULING_PCAS MW(1567:1567) +#define NVA0C0_QMDV01_07_HW_ONLY_INNER_PUT MW(1598:1568) +#define NVA0C0_QMDV01_07_QMD_RESERVED_P MW(1599:1599) +#define NVA0C0_QMDV01_07_HW_ONLY_SPAN_LIST_HEAD_INDEX MW(1629:1600) +#define NVA0C0_QMDV01_07_QMD_RESERVED_Q MW(1630:1630) +#define NVA0C0_QMDV01_07_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID MW(1631:1631) +#define NVA0C0_QMDV01_07_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_FALSE 0x00000000 +#define NVA0C0_QMDV01_07_HW_ONLY_SPAN_LIST_HEAD_INDEX_VALID_TRUE 0x00000001 +#define NVA0C0_QMDV01_07_HW_ONLY_SKED_NEXT_QMD_POINTER MW(1663:1632) +#define NVA0C0_QMDV01_07_QMD_SPARE_E MW(1695:1664) +#define NVA0C0_QMDV01_07_QMD_SPARE_F MW(1727:1696) +#define NVA0C0_QMDV01_07_QMD_SPARE_G MW(1759:1728) +#define NVA0C0_QMDV01_07_QMD_SPARE_H MW(1791:1760) +#define NVA0C0_QMDV01_07_QMD_SPARE_I MW(1823:1792) +#define NVA0C0_QMDV01_07_QMD_SPARE_J MW(1855:1824) +#define NVA0C0_QMDV01_07_QMD_SPARE_K MW(1887:1856) +#define NVA0C0_QMDV01_07_QMD_SPARE_L MW(1919:1888) +#define NVA0C0_QMDV01_07_QMD_SPARE_M MW(1951:1920) +#define NVA0C0_QMDV01_07_QMD_SPARE_N MW(1983:1952) +#define NVA0C0_QMDV01_07_DEBUG_ID_UPPER MW(2015:1984) +#define NVA0C0_QMDV01_07_DEBUG_ID_LOWER MW(2047:2016) + + + +#endif // #ifndef __CLA0C0QMD_H__ diff --git a/userspace/sdks/nv570/inc/class/cla140.h b/userspace/sdks/nv570/inc/class/cla140.h new file mode 100644 index 0000000..08b8fc1 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla140.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cla140_h_ +#define _cla140_h_ + +#define KEPLER_INLINE_TO_MEMORY_B 0xA140 + +#endif // _cla140_h_ diff --git a/userspace/sdks/nv570/inc/class/cla16f.h b/userspace/sdks/nv570/inc/class/cla16f.h new file mode 100644 index 0000000..66e7594 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla16f.h @@ -0,0 +1,254 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cla16f_h_ +#define _cla16f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* class KEPLER_CHANNEL_GPFIFO */ +/* + * Documentation for KEPLER_CHANNEL_GPFIFO can be found in dev_pbdma.ref, + * chapter "User Control Registers". It is documented as device NV_UDMA. + * The GPFIFO format itself is also documented in dev_pbdma.ref, + * NV_PPBDMA_GP_ENTRY_*. The pushbuffer format is documented in dev_ram.ref, + * chapter "FIFO DMA RAM", NV_FIFO_DMA_*. + * + */ +#define KEPLER_CHANNEL_GPFIFO_B (0x0000A16F) + +/* pio method data structure */ +typedef volatile struct _cla16f_tag0 { + NvV32 Reserved00[0x7c0]; +} NvA16FTypedef, KEPLER_ChannelGPFifoB; +#define NVA16F_TYPEDEF KEPLER_CHANNELChannelGPFifo +/* dma flow control data structure */ +typedef volatile struct _cla16f_tag1 { + NvU32 Ignored00[0x010]; /* 0000-003f*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 Ignored01[0x002]; /* 0050-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored02[0x007]; /* 0064-007f*/ + NvU32 Ignored03; /* used to be engine yield 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x5c]; +} NvA16FControl, KeplerBControlGPFifo; +/* fields and values */ +#define NVA16F_NUMBER_OF_SUBCHANNELS (8) +#define NVA16F_SET_OBJECT (0x00000000) +#define NVA16F_SET_OBJECT_NVCLASS 15:0 +#define NVA16F_SET_OBJECT_ENGINE 20:16 +#define NVA16F_SET_OBJECT_ENGINE_SW 0x0000001f +#define NVA16F_ILLEGAL (0x00000004) +#define NVA16F_ILLEGAL_HANDLE 31:0 +#define NVA16F_NOP (0x00000008) +#define NVA16F_NOP_HANDLE 31:0 +#define NVA16F_SEMAPHOREA (0x00000010) +#define NVA16F_SEMAPHOREA_OFFSET_UPPER 7:0 +#define NVA16F_SEMAPHOREB (0x00000014) +#define NVA16F_SEMAPHOREB_OFFSET_LOWER 31:2 +#define NVA16F_SEMAPHOREC (0x00000018) +#define NVA16F_SEMAPHOREC_PAYLOAD 31:0 +#define NVA16F_SEMAPHORED (0x0000001C) +#define NVA16F_SEMAPHORED_OPERATION 4:0 +#define NVA16F_SEMAPHORED_OPERATION_ACQUIRE 0x00000001 +#define NVA16F_SEMAPHORED_OPERATION_RELEASE 0x00000002 +#define NVA16F_SEMAPHORED_OPERATION_ACQ_GEQ 0x00000004 +#define NVA16F_SEMAPHORED_OPERATION_ACQ_AND 0x00000008 +#define NVA16F_SEMAPHORED_OPERATION_REDUCTION 0x00000010 +#define NVA16F_SEMAPHORED_ACQUIRE_SWITCH 12:12 +#define NVA16F_SEMAPHORED_ACQUIRE_SWITCH_DISABLED 0x00000000 +#define NVA16F_SEMAPHORED_ACQUIRE_SWITCH_ENABLED 0x00000001 +#define NVA16F_SEMAPHORED_RELEASE_WFI 20:20 +#define NVA16F_SEMAPHORED_RELEASE_WFI_EN 0x00000000 +#define NVA16F_SEMAPHORED_RELEASE_WFI_DIS 0x00000001 +#define NVA16F_SEMAPHORED_RELEASE_SIZE 24:24 +#define NVA16F_SEMAPHORED_RELEASE_SIZE_16BYTE 0x00000000 +#define NVA16F_SEMAPHORED_RELEASE_SIZE_4BYTE 0x00000001 +#define NVA16F_SEMAPHORED_REDUCTION 30:27 +#define NVA16F_SEMAPHORED_REDUCTION_MIN 0x00000000 +#define NVA16F_SEMAPHORED_REDUCTION_MAX 0x00000001 +#define NVA16F_SEMAPHORED_REDUCTION_XOR 0x00000002 +#define NVA16F_SEMAPHORED_REDUCTION_AND 0x00000003 +#define NVA16F_SEMAPHORED_REDUCTION_OR 0x00000004 +#define NVA16F_SEMAPHORED_REDUCTION_ADD 0x00000005 +#define NVA16F_SEMAPHORED_REDUCTION_INC 0x00000006 +#define NVA16F_SEMAPHORED_REDUCTION_DEC 0x00000007 +#define NVA16F_SEMAPHORED_FORMAT 31:31 +#define NVA16F_SEMAPHORED_FORMAT_SIGNED 0x00000000 +#define NVA16F_SEMAPHORED_FORMAT_UNSIGNED 0x00000001 +#define NVA16F_NON_STALL_INTERRUPT (0x00000020) +#define NVA16F_NON_STALL_INTERRUPT_HANDLE 31:0 +#define NVA16F_FB_FLUSH (0x00000024) +#define NVA16F_FB_FLUSH_HANDLE 31:0 +#define NVA16F_MEM_OP_A (0x00000028) +#define NVA16F_MEM_OP_A_OPERAND_LOW 31:2 +#define NVA16F_MEM_OP_A_TLB_INVALIDATE_ADDR 29:2 +#define NVA16F_MEM_OP_A_TLB_INVALIDATE_TARGET 31:30 +#define NVA16F_MEM_OP_A_TLB_INVALIDATE_TARGET_VID_MEM 0x00000000 +#define NVA16F_MEM_OP_A_TLB_INVALIDATE_TARGET_SYS_MEM_COHERENT 0x00000002 +#define NVA16F_MEM_OP_A_TLB_INVALIDATE_TARGET_SYS_MEM_NONCOHERENT 0x00000003 +#define NVA16F_MEM_OP_B (0x0000002c) +#define NVA16F_MEM_OP_B_OPERAND_HIGH 7:0 +#define NVA16F_MEM_OP_B_OPERATION 31:27 +#define NVA16F_MEM_OP_B_OPERATION_SYSMEMBAR_FLUSH 0x00000005 +#define NVA16F_MEM_OP_B_OPERATION_SOFT_FLUSH 0x00000006 +#define NVA16F_MEM_OP_B_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NVA16F_MEM_OP_B_OPERATION_L2_PEERMEM_INVALIDATE 0x0000000d +#define NVA16F_MEM_OP_B_OPERATION_L2_SYSMEM_INVALIDATE 0x0000000e +#define NVA16F_MEM_OP_B_OPERATION_L2_CLEAN_COMPTAGS 0x0000000f +#define NVA16F_MEM_OP_B_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NVA16F_MEM_OP_B_MMU_TLB_INVALIDATE_PDB 0:0 +#define NVA16F_MEM_OP_B_MMU_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NVA16F_MEM_OP_B_MMU_TLB_INVALIDATE_PDB_ALL 0x00000001 +#define NVA16F_MEM_OP_B_MMU_TLB_INVALIDATE_GPC 1:1 +#define NVA16F_MEM_OP_B_MMU_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NVA16F_MEM_OP_B_MMU_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NVA16F_SET_REFERENCE (0x00000050) +#define NVA16F_SET_REFERENCE_COUNT 31:0 +#define NVA16F_WFI (0x00000078) +#define NVA16F_WFI_HANDLE 31:0 +#define NVA16F_CRC_CHECK (0x0000007c) +#define NVA16F_CRC_CHECK_VALUE 31:0 +#define NVA16F_YIELD (0x00000080) +#define NVA16F_YIELD_OP 1:0 +#define NVA16F_YIELD_OP_NOP 0x00000000 + + +/* GPFIFO entry format */ +#define NVA16F_GP_ENTRY__SIZE 8 +#define NVA16F_GP_ENTRY0_FETCH 0:0 +#define NVA16F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVA16F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVA16F_GP_ENTRY0_GET 31:2 +#define NVA16F_GP_ENTRY0_OPERAND 31:0 +#define NVA16F_GP_ENTRY1_GET_HI 7:0 +#define NVA16F_GP_ENTRY1_PRIV 8:8 +#define NVA16F_GP_ENTRY1_PRIV_USER 0x00000000 +#define NVA16F_GP_ENTRY1_PRIV_KERNEL 0x00000001 +#define NVA16F_GP_ENTRY1_LEVEL 9:9 +#define NVA16F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVA16F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVA16F_GP_ENTRY1_LENGTH 30:10 +#define NVA16F_GP_ENTRY1_SYNC 31:31 +#define NVA16F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVA16F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVA16F_GP_ENTRY1_OPCODE 7:0 +#define NVA16F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVA16F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVA16F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVA16F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 + +/* dma method formats */ +#define NVA16F_DMA_METHOD_ADDRESS_OLD 12:2 +#define NVA16F_DMA_METHOD_ADDRESS 11:0 +#define NVA16F_DMA_SUBDEVICE_MASK 15:4 +#define NVA16F_DMA_METHOD_SUBCHANNEL 15:13 +#define NVA16F_DMA_TERT_OP 17:16 +#define NVA16F_DMA_TERT_OP_GRP0_INC_METHOD (0x00000000) +#define NVA16F_DMA_TERT_OP_GRP0_SET_SUB_DEV_MASK (0x00000001) +#define NVA16F_DMA_TERT_OP_GRP0_STORE_SUB_DEV_MASK (0x00000002) +#define NVA16F_DMA_TERT_OP_GRP0_USE_SUB_DEV_MASK (0x00000003) +#define NVA16F_DMA_TERT_OP_GRP2_NON_INC_METHOD (0x00000000) +#define NVA16F_DMA_METHOD_COUNT_OLD 28:18 +#define NVA16F_DMA_METHOD_COUNT 28:16 +#define NVA16F_DMA_IMMD_DATA 28:16 +#define NVA16F_DMA_SEC_OP 31:29 +#define NVA16F_DMA_SEC_OP_GRP0_USE_TERT (0x00000000) +#define NVA16F_DMA_SEC_OP_INC_METHOD (0x00000001) +#define NVA16F_DMA_SEC_OP_GRP2_USE_TERT (0x00000002) +#define NVA16F_DMA_SEC_OP_NON_INC_METHOD (0x00000003) +#define NVA16F_DMA_SEC_OP_IMMD_DATA_METHOD (0x00000004) +#define NVA16F_DMA_SEC_OP_ONE_INC (0x00000005) +#define NVA16F_DMA_SEC_OP_RESERVED6 (0x00000006) +#define NVA16F_DMA_SEC_OP_END_PB_SEGMENT (0x00000007) +/* dma incrementing method format */ +#define NVA16F_DMA_INCR_ADDRESS 11:0 +#define NVA16F_DMA_INCR_SUBCHANNEL 15:13 +#define NVA16F_DMA_INCR_COUNT 28:16 +#define NVA16F_DMA_INCR_OPCODE 31:29 +#define NVA16F_DMA_INCR_OPCODE_VALUE (0x00000001) +#define NVA16F_DMA_INCR_DATA 31:0 +/* dma non-incrementing method format */ +#define NVA16F_DMA_NONINCR_ADDRESS 11:0 +#define NVA16F_DMA_NONINCR_SUBCHANNEL 15:13 +#define NVA16F_DMA_NONINCR_COUNT 28:16 +#define NVA16F_DMA_NONINCR_OPCODE 31:29 +#define NVA16F_DMA_NONINCR_OPCODE_VALUE (0x00000003) +#define NVA16F_DMA_NONINCR_DATA 31:0 +/* dma increment-once method format */ +#define NVA16F_DMA_ONEINCR_ADDRESS 11:0 +#define NVA16F_DMA_ONEINCR_SUBCHANNEL 15:13 +#define NVA16F_DMA_ONEINCR_COUNT 28:16 +#define NVA16F_DMA_ONEINCR_OPCODE 31:29 +#define NVA16F_DMA_ONEINCR_OPCODE_VALUE (0x00000005) +#define NVA16F_DMA_ONEINCR_DATA 31:0 +/* dma no-operation format */ +#define NVA16F_DMA_NOP (0x00000000) +/* dma immediate-data format */ +#define NVA16F_DMA_IMMD_ADDRESS 11:0 +#define NVA16F_DMA_IMMD_SUBCHANNEL 15:13 +#define NVA16F_DMA_IMMD_DATA 28:16 +#define NVA16F_DMA_IMMD_OPCODE 31:29 +#define NVA16F_DMA_IMMD_OPCODE_VALUE (0x00000004) +/* dma set sub-device mask format */ +#define NVA16F_DMA_SET_SUBDEVICE_MASK_VALUE 15:4 +#define NVA16F_DMA_SET_SUBDEVICE_MASK_OPCODE 31:16 +#define NVA16F_DMA_SET_SUBDEVICE_MASK_OPCODE_VALUE (0x00000001) +/* dma store sub-device mask format */ +#define NVA16F_DMA_STORE_SUBDEVICE_MASK_VALUE 15:4 +#define NVA16F_DMA_STORE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVA16F_DMA_STORE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000002) +/* dma use sub-device mask format */ +#define NVA16F_DMA_USE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVA16F_DMA_USE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000003) +/* dma end-segment format */ +#define NVA16F_DMA_ENDSEG_OPCODE 31:29 +#define NVA16F_DMA_ENDSEG_OPCODE_VALUE (0x00000007) +/* dma legacy incrementing/non-incrementing formats */ +#define NVA16F_DMA_ADDRESS 12:2 +#define NVA16F_DMA_SUBCH 15:13 +#define NVA16F_DMA_OPCODE3 17:16 +#define NVA16F_DMA_OPCODE3_NONE (0x00000000) +#define NVA16F_DMA_COUNT 28:18 +#define NVA16F_DMA_OPCODE 31:29 +#define NVA16F_DMA_OPCODE_METHOD (0x00000000) +#define NVA16F_DMA_OPCODE_NONINC_METHOD (0x00000002) +#define NVA16F_DMA_DATA 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _cla16F_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cla16fsw.h b/userspace/sdks/nv570/inc/class/cla16fsw.h new file mode 100644 index 0000000..cea256f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla16fsw.h @@ -0,0 +1,41 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cla16f_sw_h_ +#define _cla16f_sw_h_ + +#define NVA16F_NOTIFIERS_RC (0) +#define NVA16F_NOTIFIERS_REFCNT (1) +#define NVA16F_NOTIFIERS_NONSTALL (2) +#define NVA16F_NOTIFIERS_EVENTBUFFER (3) +#define NVA16F_NOTIFIERS_IDLECHANNEL (4) +#define NVA16F_NOTIFIERS_ENDCTX (5) +#define NVA16F_NOTIFIERS_SW (6) +#define NVA16F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVA16F_NOTIFIERS_MAXCOUNT (8) + +/* NvNotification[] fields and values */ +#define NVA16F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVA16F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _cla16f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cla197.h b/userspace/sdks/nv570/inc/class/cla197.h new file mode 100644 index 0000000..deae603 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla197.h @@ -0,0 +1,3826 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_kepler_b_h_ +#define _cl_kepler_b_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../class/bin/sw_header.pl kepler_b */ + +#include "nvtypes.h" + +#define KEPLER_B 0xA197 + +#define NVA197_SET_OBJECT 0x0000 +#define NVA197_SET_OBJECT_CLASS_ID 15:0 +#define NVA197_SET_OBJECT_ENGINE_ID 20:16 + +#define NVA197_NO_OPERATION 0x0100 +#define NVA197_NO_OPERATION_V 31:0 + +#define NVA197_SET_NOTIFY_A 0x0104 +#define NVA197_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVA197_SET_NOTIFY_B 0x0108 +#define NVA197_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVA197_NOTIFY 0x010c +#define NVA197_NOTIFY_TYPE 31:0 +#define NVA197_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVA197_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVA197_WAIT_FOR_IDLE 0x0110 +#define NVA197_WAIT_FOR_IDLE_V 31:0 + +#define NVA197_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVA197_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVA197_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVA197_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVA197_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVA197_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVA197_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVA197_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVA197_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVA197_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVA197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVA197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVA197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVA197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVA197_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVA197_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVA197_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVA197_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVA197_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVA197_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVA197_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVA197_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVA197_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVA197_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVA197_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVA197_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVA197_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVA197_SEND_GO_IDLE 0x013c +#define NVA197_SEND_GO_IDLE_V 31:0 + +#define NVA197_PM_TRIGGER 0x0140 +#define NVA197_PM_TRIGGER_V 31:0 + +#define NVA197_PM_TRIGGER_WFI 0x0144 +#define NVA197_PM_TRIGGER_WFI_V 31:0 + +#define NVA197_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVA197_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVA197_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVA197_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVA197_LINE_LENGTH_IN 0x0180 +#define NVA197_LINE_LENGTH_IN_VALUE 31:0 + +#define NVA197_LINE_COUNT 0x0184 +#define NVA197_LINE_COUNT_VALUE 31:0 + +#define NVA197_OFFSET_OUT_UPPER 0x0188 +#define NVA197_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVA197_OFFSET_OUT 0x018c +#define NVA197_OFFSET_OUT_VALUE 31:0 + +#define NVA197_PITCH_OUT 0x0190 +#define NVA197_PITCH_OUT_VALUE 31:0 + +#define NVA197_SET_DST_BLOCK_SIZE 0x0194 +#define NVA197_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVA197_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVA197_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVA197_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVA197_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVA197_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA197_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA197_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA197_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA197_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVA197_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVA197_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVA197_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVA197_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVA197_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVA197_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVA197_SET_DST_WIDTH 0x0198 +#define NVA197_SET_DST_WIDTH_V 31:0 + +#define NVA197_SET_DST_HEIGHT 0x019c +#define NVA197_SET_DST_HEIGHT_V 31:0 + +#define NVA197_SET_DST_DEPTH 0x01a0 +#define NVA197_SET_DST_DEPTH_V 31:0 + +#define NVA197_SET_DST_LAYER 0x01a4 +#define NVA197_SET_DST_LAYER_V 31:0 + +#define NVA197_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVA197_SET_DST_ORIGIN_BYTES_X_V 19:0 + +#define NVA197_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVA197_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 + +#define NVA197_LAUNCH_DMA 0x01b0 +#define NVA197_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVA197_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVA197_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVA197_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVA197_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVA197_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVA197_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVA197_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVA197_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVA197_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVA197_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVA197_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVA197_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVA197_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVA197_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA197_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA197_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVA197_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA197_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA197_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA197_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVA197_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA197_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVA197_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVA197_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA197_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVA197_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA197_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA197_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVA197_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVA197_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVA197_LOAD_INLINE_DATA 0x01b4 +#define NVA197_LOAD_INLINE_DATA_V 31:0 + +#define NVA197_SET_I2M_SEMAPHORE_A 0x01dc +#define NVA197_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVA197_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVA197_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVA197_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVA197_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVA197_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVA197_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVA197_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVA197_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVA197_SET_I2M_SPARE_NOOP03 0x01fc +#define NVA197_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVA197_RUN_DS_NOW 0x0200 +#define NVA197_RUN_DS_NOW_V 31:0 + +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVA197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVA197_SET_RASTER_PIPE_SYNC_CONTROL 0x0208 +#define NVA197_SET_RASTER_PIPE_SYNC_CONTROL_PRIM_AREA_THRESHOLD 21:0 +#define NVA197_SET_RASTER_PIPE_SYNC_CONTROL_ENABLE 24:24 +#define NVA197_SET_RASTER_PIPE_SYNC_CONTROL_ENABLE_FALSE 0x00000000 +#define NVA197_SET_RASTER_PIPE_SYNC_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVA197_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVA197_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVA197_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVA197_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVA197_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVA197_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVA197_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_GS_DM_FIFO 0x0214 +#define NVA197_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVA197_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVA197_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVA197_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVA197_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA197_INVALIDATE_SHADER_CACHES 0x021c +#define NVA197_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVA197_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVA197_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVA197_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVA197_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVA197_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVA197_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVA197_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVA197_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVA197_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVA197_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVA197_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVA197_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVA197_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVA197_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVA197_SET_VAB_VERTEX3F(i) (0x0220+(i)*4) +#define NVA197_SET_VAB_VERTEX3F_V 31:0 + +#define NVA197_SET_VAB_VERTEX4F(i) (0x0230+(i)*4) +#define NVA197_SET_VAB_VERTEX4F_V 31:0 + +#define NVA197_SET_VAB_NORMAL3F(i) (0x0240+(i)*4) +#define NVA197_SET_VAB_NORMAL3F_V 31:0 + +#define NVA197_SET_VAB_COLOR3F(i) (0x0250+(i)*4) +#define NVA197_SET_VAB_COLOR3F_V 31:0 + +#define NVA197_SET_VAB_COLOR4F(i) (0x0260+(i)*4) +#define NVA197_SET_VAB_COLOR4F_V 31:0 + +#define NVA197_SET_VAB_COLOR4UB(i) (0x0270+(i)*4) +#define NVA197_SET_VAB_COLOR4UB_V 31:0 + +#define NVA197_SET_VAB_TEX_COORD1F(i) (0x0280+(i)*4) +#define NVA197_SET_VAB_TEX_COORD1F_V 31:0 + +#define NVA197_SET_VAB_TEX_COORD2F(i) (0x0290+(i)*4) +#define NVA197_SET_VAB_TEX_COORD2F_V 31:0 + +#define NVA197_SET_VAB_TEX_COORD3F(i) (0x02a0+(i)*4) +#define NVA197_SET_VAB_TEX_COORD3F_V 31:0 + +#define NVA197_SET_VAB_TEX_COORD4F(i) (0x02b0+(i)*4) +#define NVA197_SET_VAB_TEX_COORD4F_V 31:0 + +#define NVA197_SET_GLOBAL_LOAD_VIA_TEXTURE 0x02c4 +#define NVA197_SET_GLOBAL_LOAD_VIA_TEXTURE_ENABLE 0:0 +#define NVA197_SET_GLOBAL_LOAD_VIA_TEXTURE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_GLOBAL_LOAD_VIA_TEXTURE_ENABLE_TRUE 0x00000001 +#define NVA197_SET_GLOBAL_LOAD_VIA_TEXTURE_HEADER_INDEX 23:4 + +#define NVA197_SET_TASK_CIRCULAR_BUFFER_THROTTLE 0x02cc +#define NVA197_SET_TASK_CIRCULAR_BUFFER_THROTTLE_TASK_COUNT 21:0 + +#define NVA197_SET_PRIM_CIRCULAR_BUFFER_THROTTLE 0x02d0 +#define NVA197_SET_PRIM_CIRCULAR_BUFFER_THROTTLE_PRIM_AREA 21:0 + +#define NVA197_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVA197_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVA197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVA197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVA197_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 9:0 + +#define NVA197_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVA197_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVA197_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVA197_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVA197_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVA197_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVA197_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVA197_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVA197_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVA197_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVA197_SET_ZCULL_SUBREGION 0x02e8 +#define NVA197_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVA197_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVA197_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVA197_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVA197_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVA197_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVA197_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVA197_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVA197_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVA197_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVA197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVA197_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVA197_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVA197_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVA197_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVA197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVA197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVA197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVA197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVA197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVA197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVA197_DRAW_ZERO_INDEX 0x0304 +#define NVA197_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVA197_SET_L1_CONFIGURATION 0x0308 +#define NVA197_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVA197_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVA197_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVA197_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVA197_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVA197_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVA197_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVA197_SET_SPA_VERSION 0x0310 +#define NVA197_SET_SPA_VERSION_MINOR 7:0 +#define NVA197_SET_SPA_VERSION_MAJOR 15:8 + +#define NVA197_SET_IEEE_CLEAN_UPDATE 0x0314 +#define NVA197_SET_IEEE_CLEAN_UPDATE_ENABLE 0:0 +#define NVA197_SET_IEEE_CLEAN_UPDATE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_IEEE_CLEAN_UPDATE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_SNAP_GRID_LINE 0x0318 +#define NVA197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVA197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVA197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVA197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVA197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVA197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVA197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVA197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVA197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVA197_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVA197_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVA197_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVA197_SET_SNAP_GRID_NON_LINE 0x031c +#define NVA197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVA197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVA197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVA197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVA197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVA197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVA197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVA197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVA197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVA197_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVA197_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVA197_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVA197_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVA197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVA197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVA197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVA197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVA197_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVA197_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVA197_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVA197_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVA197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVA197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVA197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVA197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVA197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVA197_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVA197_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVA197_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVA197_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVA197_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVA197_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVA197_SET_TESSELLATION_LOD_V1 0x0330 +#define NVA197_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVA197_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVA197_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVA197_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVA197_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVA197_RESERVED_TG07 0x033c +#define NVA197_RESERVED_TG07_V 0:0 + +#define NVA197_RESERVED_TG08 0x0340 +#define NVA197_RESERVED_TG08_V 0:0 + +#define NVA197_RESERVED_TG09 0x0344 +#define NVA197_RESERVED_TG09_V 0:0 + +#define NVA197_RESERVED_TG10 0x0348 +#define NVA197_RESERVED_TG10_V 0:0 + +#define NVA197_RESERVED_TG11 0x034c +#define NVA197_RESERVED_TG11_V 0:0 + +#define NVA197_RESERVED_TG12 0x0350 +#define NVA197_RESERVED_TG12_V 0:0 + +#define NVA197_RESERVED_TG13 0x0354 +#define NVA197_RESERVED_TG13_V 0:0 + +#define NVA197_RESERVED_TG14 0x0358 +#define NVA197_RESERVED_TG14_V 0:0 + +#define NVA197_RESERVED_TG15 0x035c +#define NVA197_RESERVED_TG15_V 0:0 + +#define NVA197_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVA197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVA197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVA197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVA197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVA197_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVA197_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVA197_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVA197_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVA197_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVA197_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVA197_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVA197_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVA197_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVA197_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVA197_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVA197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVA197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVA197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVA197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVA197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVA197_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVA197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVA197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVA197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVA197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVA197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVA197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVA197_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVA197_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVA197_SET_RASTER_ENABLE 0x037c +#define NVA197_SET_RASTER_ENABLE_V 0:0 +#define NVA197_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVA197_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVA197_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVA197_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVA197_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVA197_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVA197_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVA197_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVA197_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVA197_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVA197_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVA197_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVA197_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVA197_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVA197_SET_VAB_DATA_TYPELESS(i) (0x0400+(i)*4) +#define NVA197_SET_VAB_DATA_TYPELESS_V 31:0 + +#define NVA197_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVA197_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVA197_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVA197_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVA197_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVA197_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVA197_SET_RASTER_INPUT 0x0740 +#define NVA197_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVA197_SET_STREAM_OUTPUT 0x0744 +#define NVA197_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVA197_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVA197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVA197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_ALPHA_FRACTION 0x074c +#define NVA197_SET_ALPHA_FRACTION_V 7:0 + +#define NVA197_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVA197_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVA197_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVA197_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVA197_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 + +#define NVA197_SET_MAX_TI_WARPS_PER_BATCH 0x075c +#define NVA197_SET_MAX_TI_WARPS_PER_BATCH_V 5:0 + +#define NVA197_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVA197_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVA197_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVA197_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVA197_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVA197_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVA197_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVA197_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVA197_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVA197_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVA197_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVA197_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVA197_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVA197_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVA197_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVA197_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVA197_SET_ISBE_SAVE_RESTORE_PROGRAM 0x07ac +#define NVA197_SET_ISBE_SAVE_RESTORE_PROGRAM_OFFSET 31:0 + +#define NVA197_SET_VAB_VERTEX2F(i) (0x07b0+(i)*4) +#define NVA197_SET_VAB_VERTEX2F_V 31:0 + +#define NVA197_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVA197_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVA197_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVA197_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVA197_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVA197_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVA197_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVA197_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVA197_SET_CULL_BEFORE_FETCH 0x07dc +#define NVA197_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVA197_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVA197_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVA197_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVA197_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVA197_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVA197_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVA197_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVA197_SET_ZCULL_STORAGE_A 0x07e8 +#define NVA197_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVA197_SET_ZCULL_STORAGE_B 0x07ec +#define NVA197_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVA197_SET_ZCULL_STORAGE_C 0x07f0 +#define NVA197_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVA197_SET_ZCULL_STORAGE_D 0x07f4 +#define NVA197_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVA197_SET_ZT_READ_ONLY 0x07f8 +#define NVA197_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVA197_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVA197_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVA197_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVA197_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVA197_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVA197_SET_TEXTURE_INSTRUCTION_OPERAND 0x07fc +#define NVA197_SET_TEXTURE_INSTRUCTION_OPERAND_ORDERING 0:0 +#define NVA197_SET_TEXTURE_INSTRUCTION_OPERAND_ORDERING_FERMI_ORDER 0x00000000 +#define NVA197_SET_TEXTURE_INSTRUCTION_OPERAND_ORDERING_KEPLER_ORDER 0x00000001 + +#define NVA197_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVA197_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVA197_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVA197_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVA197_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVA197_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVA197_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVA197_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVA197_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVA197_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVA197_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVA197_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVA197_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVA197_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVA197_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVA197_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVA197_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVA197_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVA197_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVA197_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVA197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVA197_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVA197_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVA197_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVA197_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVA197_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVA197_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVA197_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVA197_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVA197_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVA197_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVA197_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVA197_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVA197_SET_COLOR_TARGET_MARK(j) (0x0824+(j)*64) +#define NVA197_SET_COLOR_TARGET_MARK_IEEE_CLEAN 0:0 +#define NVA197_SET_COLOR_TARGET_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVA197_SET_COLOR_TARGET_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVA197_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVA197_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVA197_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVA197_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVA197_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVA197_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVA197_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVA197_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVA197_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVA197_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVA197_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVA197_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVA197_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVA197_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVA197_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVA197_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVA197_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVA197_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVA197_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVA197_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVA197_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVA197_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVA197_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVA197_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVA197_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVA197_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVA197_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVA197_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVA197_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVA197_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVA197_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVA197_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVA197_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVA197_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVA197_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVA197_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVA197_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVA197_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVA197_SET_STATISTICS_COUNTER 0x0d68 +#define NVA197_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVA197_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVA197_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVA197_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVA197_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVA197_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVA197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVA197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVA197_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVA197_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVA197_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVA197_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVA197_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVA197_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVA197_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVA197_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVA197_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVA197_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVA197_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVA197_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVA197_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVA197_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVA197_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVA197_SET_VERTEX_ARRAY_START 0x0d74 +#define NVA197_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVA197_DRAW_VERTEX_ARRAY 0x0d78 +#define NVA197_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVA197_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVA197_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVA197_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVA197_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVA197_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVA197_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVA197_SET_Z_CLEAR_VALUE 0x0d90 +#define NVA197_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVA197_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVA197_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVA197_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVA197_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVA197_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVA197_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVA197_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVA197_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVA197_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVA197_SET_FRONT_POLYGON_MODE 0x0dac +#define NVA197_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVA197_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVA197_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVA197_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVA197_SET_BACK_POLYGON_MODE 0x0db0 +#define NVA197_SET_BACK_POLYGON_MODE_V 31:0 +#define NVA197_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVA197_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVA197_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVA197_SET_POLY_SMOOTH 0x0db4 +#define NVA197_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVA197_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVA197_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_ZT_MARK 0x0db8 +#define NVA197_SET_ZT_MARK_IEEE_CLEAN 0:0 +#define NVA197_SET_ZT_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVA197_SET_ZT_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVA197_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVA197_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVA197_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVA197_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVA197_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVA197_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVA197_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVA197_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVA197_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVA197_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVA197_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVA197_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVA197_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVA197_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVA197_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVA197_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVA197_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_PATCH 0x0dcc +#define NVA197_SET_PATCH_SIZE 7:0 + +#define NVA197_SET_ZCULL_CRITERION 0x0dd8 +#define NVA197_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVA197_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVA197_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVA197_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVA197_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVA197_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVA197_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVA197_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVA197_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVA197_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVA197_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVA197_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVA197_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVA197_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVA197_SET_ZCULL_CRITERION_SREF 23:16 +#define NVA197_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVA197_SET_SM_QUADRANT_SELECTION_CONTROL 0x0ddc +#define NVA197_SET_SM_QUADRANT_SELECTION_CONTROL_MAX_PIXEL_WARPS 7:0 + +#define NVA197_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVA197_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVA197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVA197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVA197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVA197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_DRAW_INLINE_VERTEX_VAB_UPDATE 0x0dec +#define NVA197_SET_DRAW_INLINE_VERTEX_VAB_UPDATE_ENABLE 0:0 +#define NVA197_SET_DRAW_INLINE_VERTEX_VAB_UPDATE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_DRAW_INLINE_VERTEX_VAB_UPDATE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_WINDOW_OFFSET_X 0x0df8 +#define NVA197_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVA197_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVA197_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVA197_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVA197_SET_SCISSOR_ENABLE_V 0:0 +#define NVA197_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVA197_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVA197_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVA197_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVA197_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVA197_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVA197_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVA197_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVA197_SET_VAB_NORMAL3S(i) (0x0f00+(i)*4) +#define NVA197_SET_VAB_NORMAL3S_V 31:0 + +#define NVA197_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVA197_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVA197_SET_BACK_STENCIL_MASK 0x0f58 +#define NVA197_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVA197_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVA197_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVA197_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVA197_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVA197_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVA197_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVA197_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVA197_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVA197_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVA197_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVA197_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVA197_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVA197_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVA197_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVA197_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVA197_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVA197_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVA197_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVA197_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVA197_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVA197_SET_CT_MRT_ENABLE 0x0fac +#define NVA197_SET_CT_MRT_ENABLE_V 0:0 +#define NVA197_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVA197_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVA197_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVA197_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVA197_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVA197_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVA197_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVA197_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVA197_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVA197_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVA197_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVA197_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVA197_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVA197_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVA197_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVA197_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVA197_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVA197_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVA197_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVA197_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVA197_SET_ZT_A 0x0fe0 +#define NVA197_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_ZT_B 0x0fe4 +#define NVA197_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_ZT_FORMAT 0x0fe8 +#define NVA197_SET_ZT_FORMAT_V 4:0 +#define NVA197_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVA197_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVA197_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVA197_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVA197_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVA197_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVA197_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVA197_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVA197_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVA197_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVA197_SET_ZT_BLOCK_SIZE 0x0fec +#define NVA197_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVA197_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVA197_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVA197_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVA197_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVA197_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA197_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA197_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA197_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA197_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVA197_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVA197_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVA197_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVA197_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVA197_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVA197_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVA197_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVA197_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVA197_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVA197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA197_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVA197_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVA197_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVA197_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVA197_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVA197_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVA197_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVA197_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVA197_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVA197_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVA197_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVA197_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVA197_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVA197_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVA197_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_SPARE_NOOP00 0x1040 +#define NVA197_SET_SPARE_NOOP00_V 31:0 + +#define NVA197_SET_SPARE_NOOP01 0x1044 +#define NVA197_SET_SPARE_NOOP01_V 31:0 + +#define NVA197_SET_SPARE_NOOP02 0x1048 +#define NVA197_SET_SPARE_NOOP02_V 31:0 + +#define NVA197_SET_SPARE_NOOP03 0x104c +#define NVA197_SET_SPARE_NOOP03_V 31:0 + +#define NVA197_SET_SPARE_NOOP04 0x1050 +#define NVA197_SET_SPARE_NOOP04_V 31:0 + +#define NVA197_SET_SPARE_NOOP05 0x1054 +#define NVA197_SET_SPARE_NOOP05_V 31:0 + +#define NVA197_SET_SPARE_NOOP06 0x1058 +#define NVA197_SET_SPARE_NOOP06_V 31:0 + +#define NVA197_SET_SPARE_NOOP07 0x105c +#define NVA197_SET_SPARE_NOOP07_V 31:0 + +#define NVA197_SET_SPARE_NOOP08 0x1060 +#define NVA197_SET_SPARE_NOOP08_V 31:0 + +#define NVA197_SET_SPARE_NOOP09 0x1064 +#define NVA197_SET_SPARE_NOOP09_V 31:0 + +#define NVA197_SET_SPARE_NOOP10 0x1068 +#define NVA197_SET_SPARE_NOOP10_V 31:0 + +#define NVA197_SET_SPARE_NOOP11 0x106c +#define NVA197_SET_SPARE_NOOP11_V 31:0 + +#define NVA197_SET_SPARE_NOOP12 0x1070 +#define NVA197_SET_SPARE_NOOP12_V 31:0 + +#define NVA197_SET_SPARE_NOOP13 0x1074 +#define NVA197_SET_SPARE_NOOP13_V 31:0 + +#define NVA197_SET_SPARE_NOOP14 0x1078 +#define NVA197_SET_SPARE_NOOP14_V 31:0 + +#define NVA197_SET_SPARE_NOOP15 0x107c +#define NVA197_SET_SPARE_NOOP15_V 31:0 + +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVA197_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVA197_UNBIND_ALL 0x10f4 +#define NVA197_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVA197_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVA197_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVA197_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVA197_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA197_NO_OPERATION_DATA_HI 0x110c +#define NVA197_NO_OPERATION_DATA_HI_V 31:0 + +#define NVA197_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVA197_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVA197_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVA197_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVA197_PM_TRIGGER_END 0x1114 +#define NVA197_PM_TRIGGER_END_V 31:0 + +#define NVA197_SET_VERTEX_ID_BASE 0x1118 +#define NVA197_SET_VERTEX_ID_BASE_V 31:0 + +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVA197_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVA197_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVA197_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVA197_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVA197_FLUSH_PENDING_WRITES 0x1144 +#define NVA197_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVA197_SET_VAB_DATA_CONTROL 0x114c +#define NVA197_SET_VAB_DATA_CONTROL_VAB_INDEX 7:0 +#define NVA197_SET_VAB_DATA_CONTROL_COMPONENT_COUNT 10:8 +#define NVA197_SET_VAB_DATA_CONTROL_COMPONENT_BYTE_WIDTH 14:12 +#define NVA197_SET_VAB_DATA_CONTROL_FORMAT 18:16 +#define NVA197_SET_VAB_DATA_CONTROL_FORMAT_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVA197_SET_VAB_DATA_CONTROL_FORMAT_NUM_SNORM 0x00000001 +#define NVA197_SET_VAB_DATA_CONTROL_FORMAT_NUM_UNORM 0x00000002 +#define NVA197_SET_VAB_DATA_CONTROL_FORMAT_NUM_SINT 0x00000003 +#define NVA197_SET_VAB_DATA_CONTROL_FORMAT_NUM_UINT 0x00000004 +#define NVA197_SET_VAB_DATA_CONTROL_FORMAT_NUM_USCALED 0x00000005 +#define NVA197_SET_VAB_DATA_CONTROL_FORMAT_NUM_SSCALED 0x00000006 +#define NVA197_SET_VAB_DATA_CONTROL_FORMAT_NUM_FLOAT 0x00000007 + +#define NVA197_SET_VAB_DATA(i) (0x1150+(i)*4) +#define NVA197_SET_VAB_DATA_V 31:0 + +#define NVA197_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVA197_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVA197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVA197_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVA197_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVA197_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVA197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVA197_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVA197_SET_CT_SELECT 0x121c +#define NVA197_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVA197_SET_CT_SELECT_TARGET0 6:4 +#define NVA197_SET_CT_SELECT_TARGET1 9:7 +#define NVA197_SET_CT_SELECT_TARGET2 12:10 +#define NVA197_SET_CT_SELECT_TARGET3 15:13 +#define NVA197_SET_CT_SELECT_TARGET4 18:16 +#define NVA197_SET_CT_SELECT_TARGET5 21:19 +#define NVA197_SET_CT_SELECT_TARGET6 24:22 +#define NVA197_SET_CT_SELECT_TARGET7 27:25 + +#define NVA197_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVA197_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVA197_SET_ZT_SIZE_A 0x1228 +#define NVA197_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVA197_SET_ZT_SIZE_B 0x122c +#define NVA197_SET_ZT_SIZE_B_HEIGHT 16:0 + +#define NVA197_SET_ZT_SIZE_C 0x1230 +#define NVA197_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVA197_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVA197_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVA197_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVA197_SET_SAMPLER_BINDING 0x1234 +#define NVA197_SET_SAMPLER_BINDING_V 0:0 +#define NVA197_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVA197_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVA197_DRAW_AUTO 0x123c +#define NVA197_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVA197_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVA197_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 9:0 + +#define NVA197_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVA197_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVA197_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA197_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVA197_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVA197_SET_SHADER_SCHEDULING 0x12ac +#define NVA197_SET_SHADER_SCHEDULING_MODE 0:0 +#define NVA197_SET_SHADER_SCHEDULING_MODE_OLDEST_THREAD_FIRST 0x00000000 +#define NVA197_SET_SHADER_SCHEDULING_MODE_ROUND_ROBIN 0x00000001 + +#define NVA197_CLEAR_ZCULL_REGION 0x12c8 +#define NVA197_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVA197_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVA197_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVA197_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVA197_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVA197_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVA197_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVA197_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVA197_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVA197_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVA197_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVA197_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVA197_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVA197_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVA197_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVA197_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVA197_SET_DEPTH_TEST 0x12cc +#define NVA197_SET_DEPTH_TEST_ENABLE 0:0 +#define NVA197_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVA197_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_FILL_MODE 0x12d0 +#define NVA197_SET_FILL_MODE_V 31:0 +#define NVA197_SET_FILL_MODE_V_POINT 0x00000001 +#define NVA197_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVA197_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVA197_SET_SHADE_MODE 0x12d4 +#define NVA197_SET_SHADE_MODE_V 31:0 +#define NVA197_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVA197_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVA197_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVA197_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVA197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVA197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVA197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVA197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVA197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVA197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVA197_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVA197_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVA197_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVA197_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_DEPTH_WRITE 0x12e8 +#define NVA197_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVA197_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_ALPHA_TEST 0x12ec +#define NVA197_SET_ALPHA_TEST_ENABLE 0:0 +#define NVA197_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVA197_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVA197_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVA197_DRAW_INLINE_INDEX4X8 0x1304 +#define NVA197_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVA197_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVA197_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVA197_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVA197_D3D_SET_CULL_MODE 0x1308 +#define NVA197_D3D_SET_CULL_MODE_V 31:0 +#define NVA197_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVA197_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVA197_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVA197_SET_DEPTH_FUNC 0x130c +#define NVA197_SET_DEPTH_FUNC_V 31:0 +#define NVA197_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVA197_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVA197_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVA197_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVA197_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVA197_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVA197_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVA197_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVA197_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVA197_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVA197_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVA197_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVA197_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVA197_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVA197_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVA197_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVA197_SET_ALPHA_REF 0x1310 +#define NVA197_SET_ALPHA_REF_V 31:0 + +#define NVA197_SET_ALPHA_FUNC 0x1314 +#define NVA197_SET_ALPHA_FUNC_V 31:0 +#define NVA197_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVA197_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVA197_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVA197_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVA197_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVA197_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVA197_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVA197_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVA197_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVA197_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVA197_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVA197_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVA197_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVA197_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVA197_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVA197_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVA197_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVA197_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVA197_SET_BLEND_CONST_RED 0x131c +#define NVA197_SET_BLEND_CONST_RED_V 31:0 + +#define NVA197_SET_BLEND_CONST_GREEN 0x1320 +#define NVA197_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVA197_SET_BLEND_CONST_BLUE 0x1324 +#define NVA197_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVA197_SET_BLEND_CONST_ALPHA 0x1328 +#define NVA197_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVA197_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVA197_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVA197_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVA197_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVA197_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVA197_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVA197_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVA197_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVA197_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVA197_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_BLEND_COLOR_OP 0x1340 +#define NVA197_SET_BLEND_COLOR_OP_V 31:0 +#define NVA197_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVA197_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVA197_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVA197_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVA197_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVA197_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVA197_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVA197_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVA197_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVA197_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA197_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA197_SET_BLEND_ALPHA_OP 0x134c +#define NVA197_SET_BLEND_ALPHA_OP_V 31:0 +#define NVA197_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVA197_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVA197_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVA197_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVA197_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVA197_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVA197_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVA197_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVA197_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVA197_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA197_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVA197_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVA197_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVA197_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA197_SET_SINGLE_ROP_CONTROL 0x135c +#define NVA197_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVA197_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVA197_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_BLEND(i) (0x1360+(i)*4) +#define NVA197_SET_BLEND_ENABLE 0:0 +#define NVA197_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVA197_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_STENCIL_TEST 0x1380 +#define NVA197_SET_STENCIL_TEST_ENABLE 0:0 +#define NVA197_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVA197_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_STENCIL_OP_FAIL 0x1384 +#define NVA197_SET_STENCIL_OP_FAIL_V 31:0 +#define NVA197_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVA197_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVA197_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVA197_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVA197_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVA197_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVA197_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVA197_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVA197_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVA197_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVA197_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVA197_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVA197_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVA197_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVA197_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVA197_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVA197_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVA197_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVA197_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVA197_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVA197_SET_STENCIL_OP_ZPASS 0x138c +#define NVA197_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVA197_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVA197_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVA197_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVA197_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVA197_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVA197_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVA197_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVA197_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVA197_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVA197_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVA197_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVA197_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVA197_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVA197_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVA197_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVA197_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVA197_SET_STENCIL_FUNC 0x1390 +#define NVA197_SET_STENCIL_FUNC_V 31:0 +#define NVA197_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVA197_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVA197_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVA197_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVA197_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVA197_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVA197_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVA197_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVA197_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVA197_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVA197_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVA197_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVA197_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVA197_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVA197_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVA197_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVA197_SET_STENCIL_FUNC_REF 0x1394 +#define NVA197_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVA197_SET_STENCIL_FUNC_MASK 0x1398 +#define NVA197_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVA197_SET_STENCIL_MASK 0x139c +#define NVA197_SET_STENCIL_MASK_V 7:0 + +#define NVA197_SET_DRAW_AUTO_START 0x13a4 +#define NVA197_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVA197_SET_PS_SATURATE 0x13a8 +#define NVA197_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVA197_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVA197_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVA197_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVA197_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVA197_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVA197_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVA197_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVA197_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVA197_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVA197_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVA197_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVA197_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVA197_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVA197_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVA197_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVA197_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVA197_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVA197_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVA197_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVA197_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVA197_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVA197_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVA197_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 + +#define NVA197_SET_WINDOW_ORIGIN 0x13ac +#define NVA197_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVA197_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVA197_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVA197_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVA197_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVA197_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVA197_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVA197_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVA197_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVA197_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVA197_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVA197_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVA197_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_ALPHA_HYSTERESIS 0x1420 +#define NVA197_SET_ALPHA_HYSTERESIS_ROUNDS_OF_ALPHA 7:0 + +#define NVA197_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVA197_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVA197_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA197_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA197_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVA197_INVALIDATE_DA_DMA_CACHE 0x142c +#define NVA197_INVALIDATE_DA_DMA_CACHE_V 0:0 + +#define NVA197_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVA197_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVA197_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVA197_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVA197_SET_PS_WARP_WATERMARKS 0x1450 +#define NVA197_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVA197_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVA197_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVA197_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVA197_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVA197_STORE_ZCULL 0x1464 +#define NVA197_STORE_ZCULL_V 0:0 + +#define NVA197_LOAD_ZCULL 0x1500 +#define NVA197_LOAD_ZCULL_V 0:0 + +#define NVA197_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVA197_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVA197_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVA197_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVA197_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVA197_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVA197_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVA197_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVA197_SET_USER_CLIP_ENABLE 0x1510 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVA197_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVA197_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVA197_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVA197_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_POINT_SIZE 0x1518 +#define NVA197_SET_POINT_SIZE_V 31:0 + +#define NVA197_SET_ZCULL_STATS 0x151c +#define NVA197_SET_ZCULL_STATS_ENABLE 0:0 +#define NVA197_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_POINT_SPRITE 0x1520 +#define NVA197_SET_POINT_SPRITE_ENABLE 0:0 +#define NVA197_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_SHADER_EXCEPTIONS 0x1528 +#define NVA197_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVA197_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVA197_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVA197_CLEAR_REPORT_VALUE 0x1530 +#define NVA197_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVA197_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVA197_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVA197_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVA197_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVA197_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVA197_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVA197_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 + +#define NVA197_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVA197_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVA197_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVA197_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVA197_SET_ZT_SELECT 0x1538 +#define NVA197_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVA197_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVA197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVA197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVA197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVA197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVA197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVA197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVA197_SET_RENDER_ENABLE_A 0x1550 +#define NVA197_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_RENDER_ENABLE_B 0x1554 +#define NVA197_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_RENDER_ENABLE_C 0x1558 +#define NVA197_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVA197_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVA197_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVA197_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVA197_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVA197_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVA197_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVA197_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVA197_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVA197_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVA197_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVA197_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVA197_SET_ANTI_ALIASED_LINE 0x1570 +#define NVA197_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVA197_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_TEX_HEADER_POOL_A 0x1574 +#define NVA197_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_TEX_HEADER_POOL_B 0x1578 +#define NVA197_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_TEX_HEADER_POOL_C 0x157c +#define NVA197_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVA197_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVA197_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVA197_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVA197_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVA197_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVA197_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVA197_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVA197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVA197_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVA197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVA197_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVA197_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVA197_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVA197_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVA197_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVA197_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVA197_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVA197_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVA197_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVA197_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVA197_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVA197_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVA197_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVA197_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVA197_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVA197_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVA197_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVA197_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVA197_SET_SRGB_WRITE 0x15b8 +#define NVA197_SET_SRGB_WRITE_ENABLE 0:0 +#define NVA197_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_DEPTH_BIAS 0x15bc +#define NVA197_SET_DEPTH_BIAS_V 31:0 + +#define NVA197_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVA197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVA197_SET_RT_LAYER 0x15cc +#define NVA197_SET_RT_LAYER_V 15:0 +#define NVA197_SET_RT_LAYER_CONTROL 16:16 +#define NVA197_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVA197_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVA197_SET_ANTI_ALIAS 0x15d0 +#define NVA197_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVA197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVA197_SET_EDGE_FLAG 0x15e4 +#define NVA197_SET_EDGE_FLAG_V 0:0 +#define NVA197_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVA197_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVA197_DRAW_INLINE_INDEX 0x15e8 +#define NVA197_DRAW_INLINE_INDEX_V 31:0 + +#define NVA197_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVA197_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVA197_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVA197_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVA197_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVA197_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVA197_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVA197_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVA197_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVA197_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVA197_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVA197_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVA197_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVA197_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVA197_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVA197_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVA197_SET_POINT_SPRITE_SELECT 0x1604 +#define NVA197_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVA197_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVA197_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVA197_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVA197_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVA197_SET_PROGRAM_REGION_A 0x1608 +#define NVA197_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVA197_SET_PROGRAM_REGION_B 0x160c +#define NVA197_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVA197_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVA197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVA197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVA197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVA197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVA197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVA197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVA197_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVA197_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVA197_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVA197_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVA197_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVA197_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVA197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVA197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVA197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVA197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVA197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVA197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVA197_END 0x1614 +#define NVA197_END_V 0:0 + +#define NVA197_BEGIN 0x1618 +#define NVA197_BEGIN_OP 15:0 +#define NVA197_BEGIN_OP_POINTS 0x00000000 +#define NVA197_BEGIN_OP_LINES 0x00000001 +#define NVA197_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVA197_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVA197_BEGIN_OP_TRIANGLES 0x00000004 +#define NVA197_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVA197_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVA197_BEGIN_OP_QUADS 0x00000007 +#define NVA197_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVA197_BEGIN_OP_POLYGON 0x00000009 +#define NVA197_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVA197_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVA197_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_BEGIN_OP_PATCH 0x0000000E +#define NVA197_BEGIN_PRIMITIVE_ID 24:24 +#define NVA197_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVA197_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVA197_BEGIN_INSTANCE_ID 27:26 +#define NVA197_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVA197_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVA197_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVA197_BEGIN_SPLIT_MODE 30:29 +#define NVA197_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVA197_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVA197_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVA197_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 + +#define NVA197_SET_VERTEX_ID_COPY 0x161c +#define NVA197_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVA197_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVA197_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVA197_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVA197_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVA197_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVA197_LOAD_PRIMITIVE_ID 0x1624 +#define NVA197_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVA197_SET_SHADER_BASED_CULL 0x162c +#define NVA197_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVA197_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVA197_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVA197_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVA197_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVA197_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_CLASS_VERSION 0x1638 +#define NVA197_SET_CLASS_VERSION_CURRENT 15:0 +#define NVA197_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA197_SET_VAB_PAGE 0x163c +#define NVA197_SET_VAB_PAGE_READ_SELECT 0:0 +#define NVA197_SET_VAB_PAGE_READ_SELECT_PAGES_0_AND_1 0x00000000 +#define NVA197_SET_VAB_PAGE_READ_SELECT_PAGES_0_AND_2 0x00000001 + +#define NVA197_DRAW_INLINE_VERTEX 0x1640 +#define NVA197_DRAW_INLINE_VERTEX_V 31:0 + +#define NVA197_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVA197_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVA197_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVA197_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVA197_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVA197_SET_DA_OUTPUT 0x164c +#define NVA197_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVA197_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVA197_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVA197_SET_ANTI_ALIASED_POINT 0x1658 +#define NVA197_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVA197_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_POINT_CENTER_MODE 0x165c +#define NVA197_SET_POINT_CENTER_MODE_V 31:0 +#define NVA197_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVA197_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVA197_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVA197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVA197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVA197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVA197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVA197_SET_LINE_STIPPLE 0x166c +#define NVA197_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVA197_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVA197_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVA197_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVA197_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVA197_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVA197_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVA197_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVA197_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVA197_SET_PROVOKING_VERTEX 0x1684 +#define NVA197_SET_PROVOKING_VERTEX_V 0:0 +#define NVA197_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVA197_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVA197_SET_TWO_SIDED_LIGHT 0x1688 +#define NVA197_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVA197_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_POLYGON_STIPPLE 0x168c +#define NVA197_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVA197_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_SHADER_CONTROL 0x1690 +#define NVA197_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVA197_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVA197_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVA197_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVA197_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVA197_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVA197_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVA197_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVA197_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVA197_LAUNCH_VERTEX 0x169c +#define NVA197_LAUNCH_VERTEX_V 0:0 + +#define NVA197_CHECK_CLASS_VERSION 0x16a0 +#define NVA197_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVA197_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA197_SET_SPH_VERSION 0x16a4 +#define NVA197_SET_SPH_VERSION_CURRENT 15:0 +#define NVA197_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA197_CHECK_SPH_VERSION 0x16a8 +#define NVA197_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVA197_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA197_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVA197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVA197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVA197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVA197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVA197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVA197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVA197_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVA197_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVA197_SET_AAM_VERSION 0x1790 +#define NVA197_SET_AAM_VERSION_CURRENT 15:0 +#define NVA197_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA197_CHECK_AAM_VERSION 0x1794 +#define NVA197_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVA197_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA197_SET_ZT_LAYER 0x179c +#define NVA197_SET_ZT_LAYER_OFFSET 15:0 + +#define NVA197_SET_VAB_MEMORY_AREA_A 0x17bc +#define NVA197_SET_VAB_MEMORY_AREA_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_VAB_MEMORY_AREA_B 0x17c0 +#define NVA197_SET_VAB_MEMORY_AREA_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_VAB_MEMORY_AREA_C 0x17c4 +#define NVA197_SET_VAB_MEMORY_AREA_C_SIZE 1:0 +#define NVA197_SET_VAB_MEMORY_AREA_C_SIZE_BYTES_64K 0x00000001 +#define NVA197_SET_VAB_MEMORY_AREA_C_SIZE_BYTES_128K 0x00000002 +#define NVA197_SET_VAB_MEMORY_AREA_C_SIZE_BYTES_256K 0x00000003 + +#define NVA197_SET_INDEX_BUFFER_A 0x17c8 +#define NVA197_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVA197_SET_INDEX_BUFFER_B 0x17cc +#define NVA197_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVA197_SET_INDEX_BUFFER_C 0x17d0 +#define NVA197_SET_INDEX_BUFFER_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVA197_SET_INDEX_BUFFER_D 0x17d4 +#define NVA197_SET_INDEX_BUFFER_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVA197_SET_INDEX_BUFFER_E 0x17d8 +#define NVA197_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVA197_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVA197_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVA197_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVA197_SET_INDEX_BUFFER_F 0x17dc +#define NVA197_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVA197_DRAW_INDEX_BUFFER 0x17e0 +#define NVA197_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVA197_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVA197_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVA197_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVA197_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVA197_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVA197_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVA197_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVA197_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVA197_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVA197_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVA197_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVA197_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVA197_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVA197_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVA197_OGL_SET_CULL 0x1918 +#define NVA197_OGL_SET_CULL_ENABLE 0:0 +#define NVA197_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVA197_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVA197_OGL_SET_FRONT_FACE 0x191c +#define NVA197_OGL_SET_FRONT_FACE_V 31:0 +#define NVA197_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVA197_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVA197_OGL_SET_CULL_FACE 0x1920 +#define NVA197_OGL_SET_CULL_FACE_V 31:0 +#define NVA197_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVA197_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVA197_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVA197_SET_VIEWPORT_PIXEL 0x1924 +#define NVA197_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVA197_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVA197_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVA197_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVA197_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVA197_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVA197_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVA197_INVALIDATE_CONSTANT_BUFFER_CACHE 0x1930 +#define NVA197_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2 0:0 +#define NVA197_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2_FALSE 0x00000000 +#define NVA197_INVALIDATE_CONSTANT_BUFFER_CACHE_THRU_L2_TRUE 0x00000001 + +#define NVA197_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVA197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVA197_SET_USER_CLIP_OP 0x1940 +#define NVA197_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVA197_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVA197_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVA197_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVA197_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVA197_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVA197_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVA197_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVA197_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVA197_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVA197_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVA197_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVA197_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVA197_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVA197_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVA197_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVA197_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVA197_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVA197_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVA197_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVA197_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVA197_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVA197_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVA197_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVA197_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVA197_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVA197_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVA197_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVA197_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVA197_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVA197_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVA197_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVA197_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVA197_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVA197_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVA197_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVA197_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVA197_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVA197_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVA197_INVALIDATE_ZCULL 0x1958 +#define NVA197_INVALIDATE_ZCULL_V 31:0 +#define NVA197_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVA197_SET_ZCULL 0x1968 +#define NVA197_SET_ZCULL_Z_ENABLE 0:0 +#define NVA197_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVA197_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVA197_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_ZCULL_BOUNDS 0x196c +#define NVA197_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVA197_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVA197_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVA197_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVA197_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVA197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVA197_ZCULL_SYNC 0x1978 +#define NVA197_ZCULL_SYNC_V 31:0 + +#define NVA197_SET_CLIP_ID_TEST 0x197c +#define NVA197_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVA197_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVA197_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVA197_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVA197_SET_CLIP_ID 0x1984 +#define NVA197_SET_CLIP_ID_V 31:0 + +#define NVA197_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVA197_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVA197_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVA197_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVA197_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVA197_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVA197_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVA197_SET_LOGIC_OP 0x19c4 +#define NVA197_SET_LOGIC_OP_ENABLE 0:0 +#define NVA197_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVA197_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_LOGIC_OP_FUNC 0x19c8 +#define NVA197_SET_LOGIC_OP_FUNC_V 31:0 +#define NVA197_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVA197_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVA197_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVA197_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVA197_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVA197_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVA197_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVA197_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVA197_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVA197_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVA197_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVA197_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVA197_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVA197_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVA197_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVA197_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVA197_SET_Z_COMPRESSION 0x19cc +#define NVA197_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVA197_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVA197_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVA197_CLEAR_SURFACE 0x19d0 +#define NVA197_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVA197_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVA197_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVA197_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVA197_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVA197_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVA197_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVA197_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVA197_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVA197_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVA197_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVA197_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVA197_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVA197_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVA197_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVA197_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVA197_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVA197_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVA197_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVA197_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVA197_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVA197_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVA197_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVA197_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVA197_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVA197_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVA197_SET_CT_WRITE_R_ENABLE 0:0 +#define NVA197_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVA197_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVA197_SET_CT_WRITE_G_ENABLE 4:4 +#define NVA197_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVA197_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVA197_SET_CT_WRITE_B_ENABLE 8:8 +#define NVA197_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVA197_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVA197_SET_CT_WRITE_A_ENABLE 12:12 +#define NVA197_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVA197_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVA197_PIPE_NOP 0x1a2c +#define NVA197_PIPE_NOP_V 31:0 + +#define NVA197_SET_SPARE00 0x1a30 +#define NVA197_SET_SPARE00_V 31:0 + +#define NVA197_SET_SPARE01 0x1a34 +#define NVA197_SET_SPARE01_V 31:0 + +#define NVA197_SET_SPARE02 0x1a38 +#define NVA197_SET_SPARE02_V 31:0 + +#define NVA197_SET_SPARE03 0x1a3c +#define NVA197_SET_SPARE03_V 31:0 + +#define NVA197_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVA197_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVA197_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVA197_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVA197_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVA197_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVA197_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVA197_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVA197_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVA197_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVA197_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVA197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVA197_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVA197_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVA197_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVA197_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVA197_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVA197_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVA197_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVA197_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA197_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVA197_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVA197_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVA197_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVA197_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVA197_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVA197_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVA197_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVA197_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVA197_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVA197_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVA197_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVA197_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVA197_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVA197_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVA197_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVA197_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVA197_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVA197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVA197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVA197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVA197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVA197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVA197_SET_VERTEX_STREAM_LIMIT_A_A(j) (0x1f00+(j)*8) +#define NVA197_SET_VERTEX_STREAM_LIMIT_A_A_UPPER 7:0 + +#define NVA197_SET_VERTEX_STREAM_LIMIT_A_B(j) (0x1f04+(j)*8) +#define NVA197_SET_VERTEX_STREAM_LIMIT_A_B_LOWER 31:0 + +#define NVA197_SET_VERTEX_STREAM_LIMIT_B_A(j) (0x1f80+(j)*8) +#define NVA197_SET_VERTEX_STREAM_LIMIT_B_A_UPPER 7:0 + +#define NVA197_SET_VERTEX_STREAM_LIMIT_B_B(j) (0x1f84+(j)*8) +#define NVA197_SET_VERTEX_STREAM_LIMIT_B_B_LOWER 31:0 + +#define NVA197_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVA197_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVA197_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVA197_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVA197_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVA197_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVA197_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVA197_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVA197_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVA197_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVA197_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVA197_SET_PIPELINE_PROGRAM(j) (0x2004+(j)*64) +#define NVA197_SET_PIPELINE_PROGRAM_OFFSET 31:0 + +#define NVA197_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVA197_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVA197_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVA197_SET_PIPELINE_REGISTER_COUNT_V 7:0 + +#define NVA197_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVA197_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVA197_SET_PIPELINE_RESERVED_B(j) (0x2014+(j)*64) +#define NVA197_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVA197_SET_PIPELINE_RESERVED_C(j) (0x2018+(j)*64) +#define NVA197_SET_PIPELINE_RESERVED_C_V 0:0 + +#define NVA197_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NVA197_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NVA197_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVA197_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVA197_SET_FALCON00 0x2300 +#define NVA197_SET_FALCON00_V 31:0 + +#define NVA197_SET_FALCON01 0x2304 +#define NVA197_SET_FALCON01_V 31:0 + +#define NVA197_SET_FALCON02 0x2308 +#define NVA197_SET_FALCON02_V 31:0 + +#define NVA197_SET_FALCON03 0x230c +#define NVA197_SET_FALCON03_V 31:0 + +#define NVA197_SET_FALCON04 0x2310 +#define NVA197_SET_FALCON04_V 31:0 + +#define NVA197_SET_FALCON05 0x2314 +#define NVA197_SET_FALCON05_V 31:0 + +#define NVA197_SET_FALCON06 0x2318 +#define NVA197_SET_FALCON06_V 31:0 + +#define NVA197_SET_FALCON07 0x231c +#define NVA197_SET_FALCON07_V 31:0 + +#define NVA197_SET_FALCON08 0x2320 +#define NVA197_SET_FALCON08_V 31:0 + +#define NVA197_SET_FALCON09 0x2324 +#define NVA197_SET_FALCON09_V 31:0 + +#define NVA197_SET_FALCON10 0x2328 +#define NVA197_SET_FALCON10_V 31:0 + +#define NVA197_SET_FALCON11 0x232c +#define NVA197_SET_FALCON11_V 31:0 + +#define NVA197_SET_FALCON12 0x2330 +#define NVA197_SET_FALCON12_V 31:0 + +#define NVA197_SET_FALCON13 0x2334 +#define NVA197_SET_FALCON13_V 31:0 + +#define NVA197_SET_FALCON14 0x2338 +#define NVA197_SET_FALCON14_V 31:0 + +#define NVA197_SET_FALCON15 0x233c +#define NVA197_SET_FALCON15_V 31:0 + +#define NVA197_SET_FALCON16 0x2340 +#define NVA197_SET_FALCON16_V 31:0 + +#define NVA197_SET_FALCON17 0x2344 +#define NVA197_SET_FALCON17_V 31:0 + +#define NVA197_SET_FALCON18 0x2348 +#define NVA197_SET_FALCON18_V 31:0 + +#define NVA197_SET_FALCON19 0x234c +#define NVA197_SET_FALCON19_V 31:0 + +#define NVA197_SET_FALCON20 0x2350 +#define NVA197_SET_FALCON20_V 31:0 + +#define NVA197_SET_FALCON21 0x2354 +#define NVA197_SET_FALCON21_V 31:0 + +#define NVA197_SET_FALCON22 0x2358 +#define NVA197_SET_FALCON22_V 31:0 + +#define NVA197_SET_FALCON23 0x235c +#define NVA197_SET_FALCON23_V 31:0 + +#define NVA197_SET_FALCON24 0x2360 +#define NVA197_SET_FALCON24_V 31:0 + +#define NVA197_SET_FALCON25 0x2364 +#define NVA197_SET_FALCON25_V 31:0 + +#define NVA197_SET_FALCON26 0x2368 +#define NVA197_SET_FALCON26_V 31:0 + +#define NVA197_SET_FALCON27 0x236c +#define NVA197_SET_FALCON27_V 31:0 + +#define NVA197_SET_FALCON28 0x2370 +#define NVA197_SET_FALCON28_V 31:0 + +#define NVA197_SET_FALCON29 0x2374 +#define NVA197_SET_FALCON29_V 31:0 + +#define NVA197_SET_FALCON30 0x2378 +#define NVA197_SET_FALCON30_V 31:0 + +#define NVA197_SET_FALCON31 0x237c +#define NVA197_SET_FALCON31_V 31:0 + +#define NVA197_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVA197_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVA197_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVA197_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVA197_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVA197_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVA197_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVA197_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVA197_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVA197_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVA197_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVA197_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVA197_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVA197_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVA197_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVA197_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVA197_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVA197_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVA197_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVA197_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVA197_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVA197_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVA197_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVA197_SET_COLOR_CLAMP 0x2600 +#define NVA197_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVA197_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVA197_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVA197_NOOP_X_X_X_SET_VALVE 0x2604 +#define NVA197_NOOP_X_X_X_SET_VALVE_HIGHER_PRIORITY 0:0 +#define NVA197_NOOP_X_X_X_SET_VALVE_HIGHER_PRIORITY_COMPUTE 0x00000000 +#define NVA197_NOOP_X_X_X_SET_VALVE_HIGHER_PRIORITY_GRAPHICS 0x00000001 + +#define NVA197_SET_BINDLESS_TEXTURE 0x2608 +#define NVA197_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 4:0 + +#define NVA197_SET_TRAP_HANDLER 0x260c +#define NVA197_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVA197_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVA197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVA197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVA197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVA197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVA197_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVA197_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVA197_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVA197_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVA197_CALL_MME_MACRO_V 31:0 + +#define NVA197_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVA197_CALL_MME_DATA_V 31:0 + +#endif /* _cl_kepler_b_h_ */ diff --git a/userspace/sdks/nv570/inc/class/cla1c0.h b/userspace/sdks/nv570/inc/class/cla1c0.h new file mode 100644 index 0000000..2b904c0 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cla1c0.h @@ -0,0 +1,669 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_kepler_compute_b_h_ +#define _cl_kepler_compute_b_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../class/bin/sw_header.pl kepler_compute_b */ + +#include "nvtypes.h" + +#define KEPLER_COMPUTE_B 0xA1C0 + +#define NVA1C0_SET_OBJECT 0x0000 +#define NVA1C0_SET_OBJECT_CLASS_ID 15:0 +#define NVA1C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVA1C0_NO_OPERATION 0x0100 +#define NVA1C0_NO_OPERATION_V 31:0 + +#define NVA1C0_SET_NOTIFY_A 0x0104 +#define NVA1C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVA1C0_SET_NOTIFY_B 0x0108 +#define NVA1C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVA1C0_NOTIFY 0x010c +#define NVA1C0_NOTIFY_TYPE 31:0 +#define NVA1C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVA1C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVA1C0_WAIT_FOR_IDLE 0x0110 +#define NVA1C0_WAIT_FOR_IDLE_V 31:0 + +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVA1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVA1C0_SEND_GO_IDLE 0x013c +#define NVA1C0_SEND_GO_IDLE_V 31:0 + +#define NVA1C0_PM_TRIGGER 0x0140 +#define NVA1C0_PM_TRIGGER_V 31:0 + +#define NVA1C0_PM_TRIGGER_WFI 0x0144 +#define NVA1C0_PM_TRIGGER_WFI_V 31:0 + +#define NVA1C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVA1C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVA1C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVA1C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVA1C0_LINE_LENGTH_IN 0x0180 +#define NVA1C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVA1C0_LINE_COUNT 0x0184 +#define NVA1C0_LINE_COUNT_VALUE 31:0 + +#define NVA1C0_OFFSET_OUT_UPPER 0x0188 +#define NVA1C0_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVA1C0_OFFSET_OUT 0x018c +#define NVA1C0_OFFSET_OUT_VALUE 31:0 + +#define NVA1C0_PITCH_OUT 0x0190 +#define NVA1C0_PITCH_OUT_VALUE 31:0 + +#define NVA1C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVA1C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVA1C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVA1C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVA1C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVA1C0_SET_DST_WIDTH 0x0198 +#define NVA1C0_SET_DST_WIDTH_V 31:0 + +#define NVA1C0_SET_DST_HEIGHT 0x019c +#define NVA1C0_SET_DST_HEIGHT_V 31:0 + +#define NVA1C0_SET_DST_DEPTH 0x01a0 +#define NVA1C0_SET_DST_DEPTH_V 31:0 + +#define NVA1C0_SET_DST_LAYER 0x01a4 +#define NVA1C0_SET_DST_LAYER_V 31:0 + +#define NVA1C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVA1C0_SET_DST_ORIGIN_BYTES_X_V 19:0 + +#define NVA1C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVA1C0_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 + +#define NVA1C0_LAUNCH_DMA 0x01b0 +#define NVA1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVA1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVA1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVA1C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVA1C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVA1C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVA1C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVA1C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVA1C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVA1C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVA1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVA1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVA1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVA1C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVA1C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA1C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA1C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVA1C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA1C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVA1C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA1C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVA1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVA1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVA1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVA1C0_LOAD_INLINE_DATA 0x01b4 +#define NVA1C0_LOAD_INLINE_DATA_V 31:0 + +#define NVA1C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVA1C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVA1C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVA1C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVA1C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVA1C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVA1C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVA1C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVA1C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVA1C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVA1C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVA1C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVA1C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVA1C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVA1C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVA1C0_SET_COALESCE_WAITING_PERIOD_UNIT 0x020c +#define NVA1C0_SET_COALESCE_WAITING_PERIOD_UNIT_CLOCKS 31:0 + +#define NVA1C0_PERFMON_TRANSFER 0x0210 +#define NVA1C0_PERFMON_TRANSFER_V 31:0 + +#define NVA1C0_SET_SHADER_SHARED_MEMORY_WINDOW 0x0214 +#define NVA1C0_SET_SHADER_SHARED_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVA1C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVA1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVA1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVA1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVA1C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVA1C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVA1C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVA1C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVA1C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVA1C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVA1C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVA1C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVA1C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVA1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVA1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVA1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVA1C0_SET_CWD_CONTROL 0x0240 +#define NVA1C0_SET_CWD_CONTROL_SM_SELECTION 0:0 +#define NVA1C0_SET_CWD_CONTROL_SM_SELECTION_LOAD_BALANCED 0x00000000 +#define NVA1C0_SET_CWD_CONTROL_SM_SELECTION_ROUND_ROBIN 0x00000001 + +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVA1C0_SET_CWD_REF_COUNTER 0x0248 +#define NVA1C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVA1C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A 0x0274 +#define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A_ADDRESS_UPPER 7:0 + +#define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B 0x0278 +#define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B_ADDRESS_LOWER 31:0 + +#define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C 0x027c +#define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_BYTE_COUNT 16:0 +#define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2 31:31 +#define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_FALSE 0x00000000 +#define NVA1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_TRUE 0x00000001 + +#define NVA1C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVA1C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVA1C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA1C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVA1C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVA1C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA1C0_SET_QMD_VERSION 0x0288 +#define NVA1C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVA1C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA1C0_CHECK_QMD_VERSION 0x0290 +#define NVA1C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVA1C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVA1C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVA1C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVA1C0_SEND_PCAS_A 0x02b4 +#define NVA1C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVA1C0_SEND_PCAS_B 0x02b8 +#define NVA1C0_SEND_PCAS_B_FROM 23:0 +#define NVA1C0_SEND_PCAS_B_DELTA 31:24 + +#define NVA1C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVA1C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVA1C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVA1C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVA1C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVA1C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVA1C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE 0x02c4 +#define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE_ENABLE 0:0 +#define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE_ENABLE_FALSE 0x00000000 +#define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE_ENABLE_TRUE 0x00000001 +#define NVA1C0_SET_GLOBAL_LOAD_VIA_TEXTURE_HEADER_INDEX 23:4 + +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A 0x02f0 +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B 0x02f4 +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C 0x02f8 +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVA1C0_SET_SPA_VERSION 0x0310 +#define NVA1C0_SET_SPA_VERSION_MINOR 7:0 +#define NVA1C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVA1C0_SET_FALCON00 0x0500 +#define NVA1C0_SET_FALCON00_V 31:0 + +#define NVA1C0_SET_FALCON01 0x0504 +#define NVA1C0_SET_FALCON01_V 31:0 + +#define NVA1C0_SET_FALCON02 0x0508 +#define NVA1C0_SET_FALCON02_V 31:0 + +#define NVA1C0_SET_FALCON03 0x050c +#define NVA1C0_SET_FALCON03_V 31:0 + +#define NVA1C0_SET_FALCON04 0x0510 +#define NVA1C0_SET_FALCON04_V 31:0 + +#define NVA1C0_SET_FALCON05 0x0514 +#define NVA1C0_SET_FALCON05_V 31:0 + +#define NVA1C0_SET_FALCON06 0x0518 +#define NVA1C0_SET_FALCON06_V 31:0 + +#define NVA1C0_SET_FALCON07 0x051c +#define NVA1C0_SET_FALCON07_V 31:0 + +#define NVA1C0_SET_FALCON08 0x0520 +#define NVA1C0_SET_FALCON08_V 31:0 + +#define NVA1C0_SET_FALCON09 0x0524 +#define NVA1C0_SET_FALCON09_V 31:0 + +#define NVA1C0_SET_FALCON10 0x0528 +#define NVA1C0_SET_FALCON10_V 31:0 + +#define NVA1C0_SET_FALCON11 0x052c +#define NVA1C0_SET_FALCON11_V 31:0 + +#define NVA1C0_SET_FALCON12 0x0530 +#define NVA1C0_SET_FALCON12_V 31:0 + +#define NVA1C0_SET_FALCON13 0x0534 +#define NVA1C0_SET_FALCON13_V 31:0 + +#define NVA1C0_SET_FALCON14 0x0538 +#define NVA1C0_SET_FALCON14_V 31:0 + +#define NVA1C0_SET_FALCON15 0x053c +#define NVA1C0_SET_FALCON15_V 31:0 + +#define NVA1C0_SET_FALCON16 0x0540 +#define NVA1C0_SET_FALCON16_V 31:0 + +#define NVA1C0_SET_FALCON17 0x0544 +#define NVA1C0_SET_FALCON17_V 31:0 + +#define NVA1C0_SET_FALCON18 0x0548 +#define NVA1C0_SET_FALCON18_V 31:0 + +#define NVA1C0_SET_FALCON19 0x054c +#define NVA1C0_SET_FALCON19_V 31:0 + +#define NVA1C0_SET_FALCON20 0x0550 +#define NVA1C0_SET_FALCON20_V 31:0 + +#define NVA1C0_SET_FALCON21 0x0554 +#define NVA1C0_SET_FALCON21_V 31:0 + +#define NVA1C0_SET_FALCON22 0x0558 +#define NVA1C0_SET_FALCON22_V 31:0 + +#define NVA1C0_SET_FALCON23 0x055c +#define NVA1C0_SET_FALCON23_V 31:0 + +#define NVA1C0_SET_FALCON24 0x0560 +#define NVA1C0_SET_FALCON24_V 31:0 + +#define NVA1C0_SET_FALCON25 0x0564 +#define NVA1C0_SET_FALCON25_V 31:0 + +#define NVA1C0_SET_FALCON26 0x0568 +#define NVA1C0_SET_FALCON26_V 31:0 + +#define NVA1C0_SET_FALCON27 0x056c +#define NVA1C0_SET_FALCON27_V 31:0 + +#define NVA1C0_SET_FALCON28 0x0570 +#define NVA1C0_SET_FALCON28_V 31:0 + +#define NVA1C0_SET_FALCON29 0x0574 +#define NVA1C0_SET_FALCON29_V 31:0 + +#define NVA1C0_SET_FALCON30 0x0578 +#define NVA1C0_SET_FALCON30_V 31:0 + +#define NVA1C0_SET_FALCON31 0x057c +#define NVA1C0_SET_FALCON31_V 31:0 + +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVA1C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVA1C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVA1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVA1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVA1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVA1C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVA1C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVA1C0_SET_SPARE_NOOP12 0x0f44 +#define NVA1C0_SET_SPARE_NOOP12_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP13 0x0f48 +#define NVA1C0_SET_SPARE_NOOP13_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP14 0x0f4c +#define NVA1C0_SET_SPARE_NOOP14_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP15 0x0f50 +#define NVA1C0_SET_SPARE_NOOP15_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP00 0x1040 +#define NVA1C0_SET_SPARE_NOOP00_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP01 0x1044 +#define NVA1C0_SET_SPARE_NOOP01_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP02 0x1048 +#define NVA1C0_SET_SPARE_NOOP02_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP03 0x104c +#define NVA1C0_SET_SPARE_NOOP03_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP04 0x1050 +#define NVA1C0_SET_SPARE_NOOP04_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP05 0x1054 +#define NVA1C0_SET_SPARE_NOOP05_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP06 0x1058 +#define NVA1C0_SET_SPARE_NOOP06_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP07 0x105c +#define NVA1C0_SET_SPARE_NOOP07_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP08 0x1060 +#define NVA1C0_SET_SPARE_NOOP08_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP09 0x1064 +#define NVA1C0_SET_SPARE_NOOP09_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP10 0x1068 +#define NVA1C0_SET_SPARE_NOOP10_V 31:0 + +#define NVA1C0_SET_SPARE_NOOP11 0x106c +#define NVA1C0_SET_SPARE_NOOP11_V 31:0 + +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVA1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVA1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVA1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVA1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVA1C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVA1C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVA1C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVA1C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVA1C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVA1C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVA1C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVA1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVA1C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVA1C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVA1C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVA1C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVA1C0_SET_RENDER_ENABLE_A 0x1550 +#define NVA1C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVA1C0_SET_RENDER_ENABLE_B 0x1554 +#define NVA1C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVA1C0_SET_RENDER_ENABLE_C 0x1558 +#define NVA1C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVA1C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVA1C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVA1C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVA1C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVA1C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVA1C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVA1C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVA1C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVA1C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVA1C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVA1C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVA1C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVA1C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVA1C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVA1C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVA1C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVA1C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVA1C0_SET_PROGRAM_REGION_A 0x1608 +#define NVA1C0_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVA1C0_SET_PROGRAM_REGION_B 0x160c +#define NVA1C0_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVA1C0_SET_SHADER_CONTROL 0x1690 +#define NVA1C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVA1C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVA1C0_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 + +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVA1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVA1C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVA1C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVA1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVA1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVA1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVA1C0_PIPE_NOP 0x1a2c +#define NVA1C0_PIPE_NOP_V 31:0 + +#define NVA1C0_SET_SPARE00 0x1a30 +#define NVA1C0_SET_SPARE00_V 31:0 + +#define NVA1C0_SET_SPARE01 0x1a34 +#define NVA1C0_SET_SPARE01_V 31:0 + +#define NVA1C0_SET_SPARE02 0x1a38 +#define NVA1C0_SET_SPARE02_V 31:0 + +#define NVA1C0_SET_SPARE03 0x1a3c +#define NVA1C0_SET_SPARE03_V 31:0 + +#define NVA1C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVA1C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVA1C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVA1C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVA1C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVA1C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVA1C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVA1C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVA1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVA1C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVA1C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVA1C0_SET_TRAP_HANDLER 0x260c +#define NVA1C0_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVA1C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVA1C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVA1C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#endif /* _cl_kepler_compute_b_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clb069.h b/userspace/sdks/nv570/inc/class/clb069.h new file mode 100644 index 0000000..94140dd --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb069.h @@ -0,0 +1,64 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clb069_h_ +#define _clb069_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define MAXWELL_FAULT_BUFFER_A (0xb069) + +#define NVB069_FAULT_BUF_ENTRY 0x0000001f:0x00000000 +#define NVB069_FAULT_BUF_SIZE 32 +#define NVB069_FAULT_BUF_ENTRY_INST_APERTURE MW((9+0*32):(0*32+8)) +#define NVB069_FAULT_BUF_ENTRY_INST_APERTURE_VID_MEM 0x00000000 +#define NVB069_FAULT_BUF_ENTRY_INST_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVB069_FAULT_BUF_ENTRY_INST_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 +#define NVB069_FAULT_BUF_ENTRY_INST_LO MW((31+0*32):(0*32+12)) +#define NVB069_FAULT_BUF_ENTRY_INST_HI MW((31+1*32):(1*32+0)) +#define NVB069_FAULT_BUF_ENTRY_INST MW((31+1*32):(0*32+12)) +#define NVB069_FAULT_BUF_ENTRY_ADDR_LO MW((31+2*32):(2*32+0)) +#define NVB069_FAULT_BUF_ENTRY_ADDR_HI MW((31+3*32):(3*32+0)) +#define NVB069_FAULT_BUF_ENTRY_ADDR MW((31+3*32):(2*32+0)) +#define NVB069_FAULT_BUF_ENTRY_TIMESTAMP_LO MW((31+4*32):(4*32+0)) +#define NVB069_FAULT_BUF_ENTRY_TIMESTAMP_HI MW((31+5*32):(5*32+0)) +#define NVB069_FAULT_BUF_ENTRY_TIMESTAMP MW((31+5*32):(4*32+0)) +#define NVB069_FAULT_BUF_ENTRY_RESERVED MW((31+6*32):(6*32+0)) +#define NVB069_FAULT_BUF_ENTRY_FAULT_TYPE MW((4+7*32):(7*32+0)) +#define NVB069_FAULT_BUF_ENTRY_CLIENT MW((14+7*32):(7*32+8)) +#define NVB069_FAULT_BUF_ENTRY_ACCESS_TYPE MW((18+7*32):(7*32+16)) +#define NVB069_FAULT_BUF_ENTRY_MMU_CLIENT_TYPE MW((20+7*32):(7*32+20)) +#define NVB069_FAULT_BUF_ENTRY_GPC_ID MW((28+7*32):(7*32+24)) +#define NVB069_FAULT_BUF_ENTRY_VALID MW((31+7*32):(7*32+31)) +#define NVB069_FAULT_BUF_ENTRY_VALID_FALSE 0x00000000 +#define NVB069_FAULT_BUF_ENTRY_VALID_TRUE 0x00000001 +#define NVB069_NOTIFIERS_REPLAYABLE_FAULT (0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clb069_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/clb069sw.h b/userspace/sdks/nv570/inc/class/clb069sw.h new file mode 100644 index 0000000..37e8ad4 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb069sw.h @@ -0,0 +1,38 @@ +/******************************************************************************* + Copyright (c) 2008-2022 NVIDIA Corporation + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to + deal in the Software without restriction, including without limitation the + rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + sell copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be + included in all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clb069sw.finn +// + +#define NVB069_ALLOCATION_PARAMETERS_MESSAGE_ID (0xb069U) + +typedef struct NVB069_ALLOCATION_PARAMETERS { + NvU32 flags; // set to 0 +} NVB069_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clb06f.h b/userspace/sdks/nv570/inc/class/clb06f.h new file mode 100644 index 0000000..b2b51e0 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb06f.h @@ -0,0 +1,260 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clb06f_h_ +#define _clb06f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* class MAXWELL_CHANNEL_GPFIFO */ +/* + * Documentation for MAXWELL_CHANNEL_GPFIFO can be found in dev_pbdma.ref, + * chapter "User Control Registers". It is documented as device NV_UDMA. + * The GPFIFO format itself is also documented in dev_pbdma.ref, + * NV_PPBDMA_GP_ENTRY_*. The pushbuffer format is documented in dev_ram.ref, + * chapter "FIFO DMA RAM", NV_FIFO_DMA_*. + * + */ +#define MAXWELL_CHANNEL_GPFIFO_A (0x0000B06F) + +#define NVB06F_TYPEDEF MAXWELL_CHANNELChannelGPFifoA + +/* dma flow control data structure */ +typedef volatile struct _clb06f_tag0 { + NvU32 Ignored00[0x010]; /* 0000-003f*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 Ignored01[0x002]; /* 0050-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored02[0x007]; /* 0064-007f*/ + NvU32 Ignored03; /* used to be engine yield 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x5c]; +} Nvb06FControl, MaxwellAControlGPFifo; + +/* fields and values */ +#define NVB06F_NUMBER_OF_SUBCHANNELS (8) +#define NVB06F_SET_OBJECT (0x00000000) +#define NVB06F_SET_OBJECT_NVCLASS 15:0 +#define NVB06F_SET_OBJECT_ENGINE 20:16 +#define NVB06F_SET_OBJECT_ENGINE_SW 0x0000001f +#define NVB06F_ILLEGAL (0x00000004) +#define NVB06F_ILLEGAL_HANDLE 31:0 +#define NVB06F_NOP (0x00000008) +#define NVB06F_NOP_HANDLE 31:0 +#define NVB06F_SEMAPHOREA (0x00000010) +#define NVB06F_SEMAPHOREA_OFFSET_UPPER 7:0 +#define NVB06F_SEMAPHOREB (0x00000014) +#define NVB06F_SEMAPHOREB_OFFSET_LOWER 31:2 +#define NVB06F_SEMAPHOREC (0x00000018) +#define NVB06F_SEMAPHOREC_PAYLOAD 31:0 +#define NVB06F_SEMAPHORED (0x0000001C) +#define NVB06F_SEMAPHORED_OPERATION 4:0 +#define NVB06F_SEMAPHORED_OPERATION_ACQUIRE 0x00000001 +#define NVB06F_SEMAPHORED_OPERATION_RELEASE 0x00000002 +#define NVB06F_SEMAPHORED_OPERATION_ACQ_GEQ 0x00000004 +#define NVB06F_SEMAPHORED_OPERATION_ACQ_AND 0x00000008 +#define NVB06F_SEMAPHORED_OPERATION_REDUCTION 0x00000010 +#define NVB06F_SEMAPHORED_ACQUIRE_SWITCH 12:12 +#define NVB06F_SEMAPHORED_ACQUIRE_SWITCH_DISABLED 0x00000000 +#define NVB06F_SEMAPHORED_ACQUIRE_SWITCH_ENABLED 0x00000001 +#define NVB06F_SEMAPHORED_RELEASE_WFI 20:20 +#define NVB06F_SEMAPHORED_RELEASE_WFI_EN 0x00000000 +#define NVB06F_SEMAPHORED_RELEASE_WFI_DIS 0x00000001 +#define NVB06F_SEMAPHORED_RELEASE_SIZE 24:24 +#define NVB06F_SEMAPHORED_RELEASE_SIZE_16BYTE 0x00000000 +#define NVB06F_SEMAPHORED_RELEASE_SIZE_4BYTE 0x00000001 +#define NVB06F_SEMAPHORED_REDUCTION 30:27 +#define NVB06F_SEMAPHORED_REDUCTION_MIN 0x00000000 +#define NVB06F_SEMAPHORED_REDUCTION_MAX 0x00000001 +#define NVB06F_SEMAPHORED_REDUCTION_XOR 0x00000002 +#define NVB06F_SEMAPHORED_REDUCTION_AND 0x00000003 +#define NVB06F_SEMAPHORED_REDUCTION_OR 0x00000004 +#define NVB06F_SEMAPHORED_REDUCTION_ADD 0x00000005 +#define NVB06F_SEMAPHORED_REDUCTION_INC 0x00000006 +#define NVB06F_SEMAPHORED_REDUCTION_DEC 0x00000007 +#define NVB06F_SEMAPHORED_FORMAT 31:31 +#define NVB06F_SEMAPHORED_FORMAT_SIGNED 0x00000000 +#define NVB06F_SEMAPHORED_FORMAT_UNSIGNED 0x00000001 +#define NVB06F_NON_STALL_INTERRUPT (0x00000020) +#define NVB06F_NON_STALL_INTERRUPT_HANDLE 31:0 +#define NVB06F_FB_FLUSH (0x00000024) +#define NVB06F_FB_FLUSH_HANDLE 31:0 +// NOTE - MEM_OP_A and MEM_OP_B have been removed for gm20x to make room for +// possible future MEM_OP features. MEM_OP_C/D have identical functionality +// to the previous MEM_OP_A/B methods. +#define NVB06F_MEM_OP_C (0x00000030) +#define NVB06F_MEM_OP_C_OPERAND_LOW 31:2 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_PDB 0:0 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_PDB_ALL 0x00000001 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_GPC 1:1 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_TARGET 11:10 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_TARGET_VID_MEM 0x00000000 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_TARGET_SYS_MEM_COHERENT 0x00000002 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_TARGET_SYS_MEM_NONCOHERENT 0x00000003 +#define NVB06F_MEM_OP_C_TLB_INVALIDATE_ADDR_LO 31:12 +#define NVB06F_MEM_OP_D (0x00000034) +#define NVB06F_MEM_OP_D_OPERAND_HIGH 7:0 +#define NVB06F_MEM_OP_D_OPERATION 31:27 +#define NVB06F_MEM_OP_D_OPERATION_MEMBAR 0x00000005 +#define NVB06F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NVB06F_MEM_OP_D_OPERATION_L2_PEERMEM_INVALIDATE 0x0000000d +#define NVB06F_MEM_OP_D_OPERATION_L2_SYSMEM_INVALIDATE 0x0000000e +#define NVB06F_MEM_OP_D_OPERATION_L2_CLEAN_COMPTAGS 0x0000000f +#define NVB06F_MEM_OP_D_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NVB06F_MEM_OP_D_TLB_INVALIDATE_ADDR_HI 7:0 +#define NVB06F_SET_REFERENCE (0x00000050) +#define NVB06F_SET_REFERENCE_COUNT 31:0 +#define NVB06F_WFI (0x00000078) +#define NVB06F_WFI_SCOPE 0:0 +#define NVB06F_WFI_SCOPE_CURRENT_SCG_TYPE 0x00000000 +#define NVB06F_WFI_SCOPE_ALL 0x00000001 +#define NVB06F_CRC_CHECK (0x0000007c) +#define NVB06F_CRC_CHECK_VALUE 31:0 +#define NVB06F_YIELD (0x00000080) +#define NVB06F_YIELD_OP 1:0 +#define NVB06F_YIELD_OP_NOP 0x00000000 +#define NVB06F_YIELD_OP_PBDMA_TIMESLICE 0x00000001 +#define NVB06F_YIELD_OP_RUNLIST_TIMESLICE 0x00000002 +#define NVB06F_YIELD_OP_TSG 0x00000003 + + +/* GPFIFO entry format */ +#define NVB06F_GP_ENTRY__SIZE 8 +#define NVB06F_GP_ENTRY0_FETCH 0:0 +#define NVB06F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVB06F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVB06F_GP_ENTRY0_GET 31:2 +#define NVB06F_GP_ENTRY0_OPERAND 31:0 +#define NVB06F_GP_ENTRY1_GET_HI 7:0 +#define NVB06F_GP_ENTRY1_PRIV 8:8 +#define NVB06F_GP_ENTRY1_PRIV_USER 0x00000000 +#define NVB06F_GP_ENTRY1_PRIV_KERNEL 0x00000001 +#define NVB06F_GP_ENTRY1_LEVEL 9:9 +#define NVB06F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVB06F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVB06F_GP_ENTRY1_LENGTH 30:10 +#define NVB06F_GP_ENTRY1_SYNC 31:31 +#define NVB06F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVB06F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVB06F_GP_ENTRY1_OPCODE 7:0 +#define NVB06F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVB06F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVB06F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVB06F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 + +/* dma method formats */ +#define NVB06F_DMA_METHOD_ADDRESS_OLD 12:2 +#define NVB06F_DMA_METHOD_ADDRESS 11:0 +#define NVB06F_DMA_SUBDEVICE_MASK 15:4 +#define NVB06F_DMA_METHOD_SUBCHANNEL 15:13 +#define NVB06F_DMA_TERT_OP 17:16 +#define NVB06F_DMA_TERT_OP_GRP0_INC_METHOD (0x00000000) +#define NVB06F_DMA_TERT_OP_GRP0_SET_SUB_DEV_MASK (0x00000001) +#define NVB06F_DMA_TERT_OP_GRP0_STORE_SUB_DEV_MASK (0x00000002) +#define NVB06F_DMA_TERT_OP_GRP0_USE_SUB_DEV_MASK (0x00000003) +#define NVB06F_DMA_TERT_OP_GRP2_NON_INC_METHOD (0x00000000) +#define NVB06F_DMA_METHOD_COUNT_OLD 28:18 +#define NVB06F_DMA_METHOD_COUNT 28:16 +#define NVB06F_DMA_IMMD_DATA 28:16 +#define NVB06F_DMA_SEC_OP 31:29 +#define NVB06F_DMA_SEC_OP_GRP0_USE_TERT (0x00000000) +#define NVB06F_DMA_SEC_OP_INC_METHOD (0x00000001) +#define NVB06F_DMA_SEC_OP_GRP2_USE_TERT (0x00000002) +#define NVB06F_DMA_SEC_OP_NON_INC_METHOD (0x00000003) +#define NVB06F_DMA_SEC_OP_IMMD_DATA_METHOD (0x00000004) +#define NVB06F_DMA_SEC_OP_ONE_INC (0x00000005) +#define NVB06F_DMA_SEC_OP_RESERVED6 (0x00000006) +#define NVB06F_DMA_SEC_OP_END_PB_SEGMENT (0x00000007) +/* dma incrementing method format */ +#define NVB06F_DMA_INCR_ADDRESS 11:0 +#define NVB06F_DMA_INCR_SUBCHANNEL 15:13 +#define NVB06F_DMA_INCR_COUNT 28:16 +#define NVB06F_DMA_INCR_OPCODE 31:29 +#define NVB06F_DMA_INCR_OPCODE_VALUE (0x00000001) +#define NVB06F_DMA_INCR_DATA 31:0 +/* dma non-incrementing method format */ +#define NVB06F_DMA_NONINCR_ADDRESS 11:0 +#define NVB06F_DMA_NONINCR_SUBCHANNEL 15:13 +#define NVB06F_DMA_NONINCR_COUNT 28:16 +#define NVB06F_DMA_NONINCR_OPCODE 31:29 +#define NVB06F_DMA_NONINCR_OPCODE_VALUE (0x00000003) +#define NVB06F_DMA_NONINCR_DATA 31:0 +/* dma increment-once method format */ +#define NVB06F_DMA_ONEINCR_ADDRESS 11:0 +#define NVB06F_DMA_ONEINCR_SUBCHANNEL 15:13 +#define NVB06F_DMA_ONEINCR_COUNT 28:16 +#define NVB06F_DMA_ONEINCR_OPCODE 31:29 +#define NVB06F_DMA_ONEINCR_OPCODE_VALUE (0x00000005) +#define NVB06F_DMA_ONEINCR_DATA 31:0 +/* dma no-operation format */ +#define NVB06F_DMA_NOP (0x00000000) +/* dma immediate-data format */ +#define NVB06F_DMA_IMMD_ADDRESS 11:0 +#define NVB06F_DMA_IMMD_SUBCHANNEL 15:13 +#define NVB06F_DMA_IMMD_DATA 28:16 +#define NVB06F_DMA_IMMD_OPCODE 31:29 +#define NVB06F_DMA_IMMD_OPCODE_VALUE (0x00000004) +/* dma set sub-device mask format */ +#define NVB06F_DMA_SET_SUBDEVICE_MASK_VALUE 15:4 +#define NVB06F_DMA_SET_SUBDEVICE_MASK_OPCODE 31:16 +#define NVB06F_DMA_SET_SUBDEVICE_MASK_OPCODE_VALUE (0x00000001) +/* dma store sub-device mask format */ +#define NVB06F_DMA_STORE_SUBDEVICE_MASK_VALUE 15:4 +#define NVB06F_DMA_STORE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVB06F_DMA_STORE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000002) +/* dma use sub-device mask format */ +#define NVB06F_DMA_USE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVB06F_DMA_USE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000003) +/* dma end-segment format */ +#define NVB06F_DMA_ENDSEG_OPCODE 31:29 +#define NVB06F_DMA_ENDSEG_OPCODE_VALUE (0x00000007) +/* dma legacy incrementing/non-incrementing formats */ +#define NVB06F_DMA_ADDRESS 12:2 +#define NVB06F_DMA_SUBCH 15:13 +#define NVB06F_DMA_OPCODE3 17:16 +#define NVB06F_DMA_OPCODE3_NONE (0x00000000) +#define NVB06F_DMA_COUNT 28:18 +#define NVB06F_DMA_OPCODE 31:29 +#define NVB06F_DMA_OPCODE_METHOD (0x00000000) +#define NVB06F_DMA_OPCODE_NONINC_METHOD (0x00000002) +#define NVB06F_DMA_DATA 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clb06f_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clb06fsw.h b/userspace/sdks/nv570/inc/class/clb06fsw.h new file mode 100644 index 0000000..3e1c74b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb06fsw.h @@ -0,0 +1,42 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clb06f_sw_h_ +#define _clb06f_sw_h_ + +#define NVB06F_NOTIFIERS_RC (0) +#define NVB06F_NOTIFIERS_REFCNT (1) +#define NVB06F_NOTIFIERS_NONSTALL (2) +#define NVB06F_NOTIFIERS_EVENTBUFFER (3) +#define NVB06F_NOTIFIERS_IDLECHANNEL (4) +#define NVB06F_NOTIFIERS_ENDCTX (5) +#define NVB06F_NOTIFIERS_SW (6) +#define NVB06F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVB06F_NOTIFIERS_REPLAYABLE_FAULT (8) +#define NVB06F_NOTIFIERS_MAXCOUNT (9) + +/* NvNotification[] fields and values */ +#define NVB06F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVB06F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _clb06f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clb097.h b/userspace/sdks/nv570/inc/class/clb097.h new file mode 100644 index 0000000..52ee310 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb097.h @@ -0,0 +1,3966 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_maxwell_a_h_ +#define _cl_maxwell_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl maxwell_a */ + +#include "nvtypes.h" + +#define MAXWELL_A 0xB097 + +#define NVB097_SET_OBJECT 0x0000 +#define NVB097_SET_OBJECT_CLASS_ID 15:0 +#define NVB097_SET_OBJECT_ENGINE_ID 20:16 + +#define NVB097_NO_OPERATION 0x0100 +#define NVB097_NO_OPERATION_V 31:0 + +#define NVB097_SET_NOTIFY_A 0x0104 +#define NVB097_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVB097_SET_NOTIFY_B 0x0108 +#define NVB097_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVB097_NOTIFY 0x010c +#define NVB097_NOTIFY_TYPE 31:0 +#define NVB097_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVB097_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVB097_WAIT_FOR_IDLE 0x0110 +#define NVB097_WAIT_FOR_IDLE_V 31:0 + +#define NVB097_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVB097_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVB097_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVB097_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVB097_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVB097_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVB097_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVB097_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVB097_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVB097_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVB097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVB097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVB097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVB097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVB097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVB097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVB097_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVB097_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVB097_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVB097_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVB097_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVB097_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVB097_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVB097_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVB097_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVB097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVB097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVB097_SEND_GO_IDLE 0x013c +#define NVB097_SEND_GO_IDLE_V 31:0 + +#define NVB097_PM_TRIGGER 0x0140 +#define NVB097_PM_TRIGGER_V 31:0 + +#define NVB097_PM_TRIGGER_WFI 0x0144 +#define NVB097_PM_TRIGGER_WFI_V 31:0 + +#define NVB097_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVB097_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVB097_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVB097_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVB097_LINE_LENGTH_IN 0x0180 +#define NVB097_LINE_LENGTH_IN_VALUE 31:0 + +#define NVB097_LINE_COUNT 0x0184 +#define NVB097_LINE_COUNT_VALUE 31:0 + +#define NVB097_OFFSET_OUT_UPPER 0x0188 +#define NVB097_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVB097_OFFSET_OUT 0x018c +#define NVB097_OFFSET_OUT_VALUE 31:0 + +#define NVB097_PITCH_OUT 0x0190 +#define NVB097_PITCH_OUT_VALUE 31:0 + +#define NVB097_SET_DST_BLOCK_SIZE 0x0194 +#define NVB097_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVB097_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVB097_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVB097_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVB097_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVB097_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB097_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB097_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB097_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB097_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVB097_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVB097_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVB097_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVB097_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVB097_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVB097_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVB097_SET_DST_WIDTH 0x0198 +#define NVB097_SET_DST_WIDTH_V 31:0 + +#define NVB097_SET_DST_HEIGHT 0x019c +#define NVB097_SET_DST_HEIGHT_V 31:0 + +#define NVB097_SET_DST_DEPTH 0x01a0 +#define NVB097_SET_DST_DEPTH_V 31:0 + +#define NVB097_SET_DST_LAYER 0x01a4 +#define NVB097_SET_DST_LAYER_V 31:0 + +#define NVB097_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVB097_SET_DST_ORIGIN_BYTES_X_V 19:0 + +#define NVB097_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVB097_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 + +#define NVB097_LAUNCH_DMA 0x01b0 +#define NVB097_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVB097_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVB097_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVB097_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVB097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVB097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVB097_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVB097_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVB097_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVB097_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVB097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVB097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVB097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVB097_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVB097_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVB097_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVB097_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVB097_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVB097_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVB097_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVB097_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVB097_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVB097_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVB097_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVB097_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVB097_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVB097_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVB097_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVB097_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVB097_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVB097_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVB097_LOAD_INLINE_DATA 0x01b4 +#define NVB097_LOAD_INLINE_DATA_V 31:0 + +#define NVB097_SET_I2M_SEMAPHORE_A 0x01dc +#define NVB097_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVB097_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVB097_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVB097_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVB097_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVB097_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVB097_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVB097_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVB097_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVB097_SET_I2M_SPARE_NOOP03 0x01fc +#define NVB097_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVB097_RUN_DS_NOW 0x0200 +#define NVB097_RUN_DS_NOW_V 31:0 + +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVB097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVB097_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVB097_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVB097_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVB097_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVB097_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVB097_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVB097_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVB097_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_GS_DM_FIFO 0x0214 +#define NVB097_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVB097_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVB097_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVB097_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVB097_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB097_INVALIDATE_SHADER_CACHES 0x021c +#define NVB097_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVB097_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVB097_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVB097_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVB097_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVB097_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVB097_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVB097_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVB097_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVB097_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVB097_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVB097_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVB097_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVB097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVB097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVB097_INCREMENT_SYNC_POINT 0x02c8 +#define NVB097_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVB097_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVB097_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVB097_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVB097_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVB097_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVB097_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVB097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE 0x02d0 +#define NVB097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE_PRIM_AREA 21:0 + +#define NVB097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVB097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVB097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVB097_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVB097_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVB097_DECOMPRESS_SURFACE 0x02e0 +#define NVB097_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVB097_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVB097_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVB097_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVB097_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVB097_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVB097_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVB097_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVB097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVB097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVB097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVB097_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVB097_SET_ZCULL_SUBREGION 0x02e8 +#define NVB097_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVB097_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVB097_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVB097_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVB097_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVB097_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVB097_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVB097_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVB097_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVB097_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVB097_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVB097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVB097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVB097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVB097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVB097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVB097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVB097_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVB097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVB097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVB097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVB097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVB097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVB097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVB097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVB097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVB097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVB097_DRAW_ZERO_INDEX 0x0304 +#define NVB097_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVB097_SET_L1_CONFIGURATION 0x0308 +#define NVB097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVB097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVB097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVB097_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVB097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVB097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVB097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVB097_SET_SPA_VERSION 0x0310 +#define NVB097_SET_SPA_VERSION_MINOR 7:0 +#define NVB097_SET_SPA_VERSION_MAJOR 15:8 + +#define NVB097_SET_IEEE_CLEAN_UPDATE 0x0314 +#define NVB097_SET_IEEE_CLEAN_UPDATE_ENABLE 0:0 +#define NVB097_SET_IEEE_CLEAN_UPDATE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_IEEE_CLEAN_UPDATE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_SNAP_GRID_LINE 0x0318 +#define NVB097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVB097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVB097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVB097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVB097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVB097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVB097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVB097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVB097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVB097_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVB097_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVB097_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVB097_SET_SNAP_GRID_NON_LINE 0x031c +#define NVB097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVB097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVB097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVB097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVB097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVB097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVB097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVB097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVB097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVB097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVB097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVB097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVB097_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVB097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVB097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVB097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVB097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVB097_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVB097_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVB097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVB097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVB097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVB097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVB097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVB097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVB097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVB097_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVB097_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVB097_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVB097_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVB097_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVB097_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVB097_SET_TESSELLATION_LOD_V1 0x0330 +#define NVB097_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVB097_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVB097_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVB097_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVB097_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVB097_RESERVED_TG07 0x033c +#define NVB097_RESERVED_TG07_V 0:0 + +#define NVB097_RESERVED_TG08 0x0340 +#define NVB097_RESERVED_TG08_V 0:0 + +#define NVB097_RESERVED_TG09 0x0344 +#define NVB097_RESERVED_TG09_V 0:0 + +#define NVB097_RESERVED_TG10 0x0348 +#define NVB097_RESERVED_TG10_V 0:0 + +#define NVB097_RESERVED_TG11 0x034c +#define NVB097_RESERVED_TG11_V 0:0 + +#define NVB097_RESERVED_TG12 0x0350 +#define NVB097_RESERVED_TG12_V 0:0 + +#define NVB097_RESERVED_TG13 0x0354 +#define NVB097_RESERVED_TG13_V 0:0 + +#define NVB097_RESERVED_TG14 0x0358 +#define NVB097_RESERVED_TG14_V 0:0 + +#define NVB097_RESERVED_TG15 0x035c +#define NVB097_RESERVED_TG15_V 0:0 + +#define NVB097_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVB097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVB097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVB097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVB097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVB097_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVB097_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVB097_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVB097_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVB097_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVB097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVB097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVB097_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVB097_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVB097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVB097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVB097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVB097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVB097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVB097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVB097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVB097_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVB097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVB097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVB097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVB097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVB097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVB097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVB097_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVB097_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVB097_SET_RASTER_ENABLE 0x037c +#define NVB097_SET_RASTER_ENABLE_V 0:0 +#define NVB097_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVB097_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVB097_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVB097_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVB097_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVB097_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVB097_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVB097_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVB097_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVB097_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVB097_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVB097_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVB097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVB097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVB097_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVB097_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVB097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVB097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVB097_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVB097_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVB097_SET_RASTER_INPUT 0x0740 +#define NVB097_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVB097_SET_STREAM_OUTPUT 0x0744 +#define NVB097_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVB097_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVB097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVB097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_ALPHA_FRACTION 0x074c +#define NVB097_SET_ALPHA_FRACTION_V 7:0 + +#define NVB097_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVB097_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVB097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVB097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVB097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 + +#define NVB097_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVB097_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVB097_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVB097_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVB097_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVB097_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVB097_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVB097_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVB097_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVB097_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVB097_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVB097_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVB097_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVB097_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVB097_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVB097_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVB097_SET_ISBE_SAVE_RESTORE_PROGRAM 0x07ac +#define NVB097_SET_ISBE_SAVE_RESTORE_PROGRAM_OFFSET 31:0 + +#define NVB097_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVB097_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVB097_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVB097_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVB097_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVB097_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVB097_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVB097_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVB097_SET_CULL_BEFORE_FETCH 0x07dc +#define NVB097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVB097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVB097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVB097_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVB097_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVB097_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVB097_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVB097_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVB097_SET_ZCULL_STORAGE_A 0x07e8 +#define NVB097_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVB097_SET_ZCULL_STORAGE_B 0x07ec +#define NVB097_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVB097_SET_ZCULL_STORAGE_C 0x07f0 +#define NVB097_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVB097_SET_ZCULL_STORAGE_D 0x07f4 +#define NVB097_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVB097_SET_ZT_READ_ONLY 0x07f8 +#define NVB097_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVB097_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVB097_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVB097_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVB097_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVB097_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVB097_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVB097_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVB097_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVB097_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVB097_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVB097_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVB097_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVB097_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVB097_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVB097_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVB097_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVB097_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVB097_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVB097_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVB097_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVB097_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVB097_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVB097_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVB097_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVB097_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVB097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVB097_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVB097_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVB097_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVB097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVB097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVB097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVB097_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVB097_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVB097_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVB097_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVB097_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVB097_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVB097_SET_COLOR_TARGET_MARK(j) (0x0824+(j)*64) +#define NVB097_SET_COLOR_TARGET_MARK_IEEE_CLEAN 0:0 +#define NVB097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVB097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVB097_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVB097_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVB097_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVB097_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVB097_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVB097_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVB097_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVB097_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVB097_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVB097_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVB097_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVB097_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVB097_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVB097_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVB097_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVB097_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVB097_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVB097_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVB097_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVB097_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVB097_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVB097_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVB097_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVB097_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVB097_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVB097_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVB097_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVB097_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVB097_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVB097_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVB097_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVB097_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVB097_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVB097_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVB097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVB097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVB097_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVB097_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVB097_SET_STATISTICS_COUNTER 0x0d68 +#define NVB097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVB097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVB097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVB097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVB097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVB097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVB097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVB097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVB097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVB097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVB097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVB097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVB097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVB097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVB097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVB097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVB097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVB097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVB097_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVB097_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVB097_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVB097_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVB097_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVB097_SET_VERTEX_ARRAY_START 0x0d74 +#define NVB097_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVB097_DRAW_VERTEX_ARRAY 0x0d78 +#define NVB097_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVB097_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVB097_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVB097_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVB097_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVB097_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVB097_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVB097_SET_Z_CLEAR_VALUE 0x0d90 +#define NVB097_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVB097_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVB097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVB097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVB097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVB097_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVB097_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVB097_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVB097_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVB097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVB097_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVB097_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVB097_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVB097_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVB097_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVB097_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVB097_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVB097_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVB097_SET_FRONT_POLYGON_MODE 0x0dac +#define NVB097_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVB097_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVB097_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVB097_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVB097_SET_BACK_POLYGON_MODE 0x0db0 +#define NVB097_SET_BACK_POLYGON_MODE_V 31:0 +#define NVB097_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVB097_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVB097_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVB097_SET_POLY_SMOOTH 0x0db4 +#define NVB097_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVB097_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVB097_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_ZT_MARK 0x0db8 +#define NVB097_SET_ZT_MARK_IEEE_CLEAN 0:0 +#define NVB097_SET_ZT_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVB097_SET_ZT_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVB097_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVB097_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVB097_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVB097_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVB097_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVB097_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVB097_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVB097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVB097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVB097_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVB097_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVB097_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVB097_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVB097_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVB097_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVB097_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVB097_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_PATCH 0x0dcc +#define NVB097_SET_PATCH_SIZE 7:0 + +#define NVB097_SET_ITERATED_BLEND 0x0dd0 +#define NVB097_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVB097_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVB097_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVB097_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVB097_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVB097_SET_ZCULL_CRITERION 0x0dd8 +#define NVB097_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVB097_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVB097_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVB097_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVB097_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVB097_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVB097_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVB097_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVB097_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVB097_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVB097_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVB097_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVB097_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVB097_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVB097_SET_ZCULL_CRITERION_SREF 23:16 +#define NVB097_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVB097_PIXEL_SHADER_BARRIER 0x0de0 +#define NVB097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVB097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVB097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVB097_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVB097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVB097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVB097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVB097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVB097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVB097_SET_WINDOW_OFFSET_X 0x0df8 +#define NVB097_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVB097_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVB097_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVB097_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVB097_SET_SCISSOR_ENABLE_V 0:0 +#define NVB097_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVB097_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVB097_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVB097_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVB097_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVB097_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVB097_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVB097_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVB097_SET_SELECT_MAXWELL_TEXTURE_HEADERS 0x0f10 +#define NVB097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V 0:0 +#define NVB097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE 0x00000000 +#define NVB097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE 0x00000001 + +#define NVB097_SET_VPC_PERF_KNOB 0x0f14 +#define NVB097_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVB097_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVB097_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVB097_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVB097_PM_LOCAL_TRIGGER 0x0f18 +#define NVB097_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVB097_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVB097_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVB097_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVB097_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVB097_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVB097_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVB097_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVB097_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVB097_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVB097_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVB097_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVB097_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVB097_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVB097_SET_BACK_STENCIL_MASK 0x0f58 +#define NVB097_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVB097_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVB097_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVB097_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVB097_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVB097_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVB097_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVB097_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVB097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVB097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVB097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVB097_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVB097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVB097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVB097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVB097_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVB097_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVB097_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVB097_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVB097_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVB097_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVB097_SET_CT_MRT_ENABLE 0x0fac +#define NVB097_SET_CT_MRT_ENABLE_V 0:0 +#define NVB097_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVB097_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVB097_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVB097_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVB097_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVB097_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVB097_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVB097_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVB097_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVB097_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVB097_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVB097_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVB097_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVB097_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVB097_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVB097_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVB097_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVB097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVB097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVB097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVB097_SET_ZT_A 0x0fe0 +#define NVB097_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_ZT_B 0x0fe4 +#define NVB097_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_ZT_FORMAT 0x0fe8 +#define NVB097_SET_ZT_FORMAT_V 4:0 +#define NVB097_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVB097_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVB097_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVB097_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVB097_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVB097_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVB097_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVB097_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVB097_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVB097_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVB097_SET_ZT_BLOCK_SIZE 0x0fec +#define NVB097_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVB097_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVB097_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVB097_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVB097_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVB097_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB097_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB097_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB097_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB097_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVB097_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVB097_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVB097_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVB097_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVB097_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVB097_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVB097_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVB097_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVB097_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVB097_SET_TILED_CACHE_BUNDLE_CONTROL 0x0ffc +#define NVB097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT 0:0 +#define NVB097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_FALSE 0x00000000 +#define NVB097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_TRUE 0x00000001 + +#define NVB097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB097_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVB097_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVB097_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVB097_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVB097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVB097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVB097_SET_RESERVED_SW_METHOD00 0x1014 +#define NVB097_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVB097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVB097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVB097_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVB097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVB097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVB097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVB097_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVB097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVB097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_RESERVED_SW_METHOD01 0x1028 +#define NVB097_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD02 0x102c +#define NVB097_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVB097_SET_SPARE_NOOP01 0x1044 +#define NVB097_SET_SPARE_NOOP01_V 31:0 + +#define NVB097_SET_SPARE_NOOP02 0x1048 +#define NVB097_SET_SPARE_NOOP02_V 31:0 + +#define NVB097_SET_SPARE_NOOP03 0x104c +#define NVB097_SET_SPARE_NOOP03_V 31:0 + +#define NVB097_SET_SPARE_NOOP04 0x1050 +#define NVB097_SET_SPARE_NOOP04_V 31:0 + +#define NVB097_SET_SPARE_NOOP05 0x1054 +#define NVB097_SET_SPARE_NOOP05_V 31:0 + +#define NVB097_SET_SPARE_NOOP06 0x1058 +#define NVB097_SET_SPARE_NOOP06_V 31:0 + +#define NVB097_SET_SPARE_NOOP07 0x105c +#define NVB097_SET_SPARE_NOOP07_V 31:0 + +#define NVB097_SET_SPARE_NOOP08 0x1060 +#define NVB097_SET_SPARE_NOOP08_V 31:0 + +#define NVB097_SET_SPARE_NOOP09 0x1064 +#define NVB097_SET_SPARE_NOOP09_V 31:0 + +#define NVB097_SET_SPARE_NOOP10 0x1068 +#define NVB097_SET_SPARE_NOOP10_V 31:0 + +#define NVB097_SET_SPARE_NOOP11 0x106c +#define NVB097_SET_SPARE_NOOP11_V 31:0 + +#define NVB097_SET_SPARE_NOOP12 0x1070 +#define NVB097_SET_SPARE_NOOP12_V 31:0 + +#define NVB097_SET_SPARE_NOOP13 0x1074 +#define NVB097_SET_SPARE_NOOP13_V 31:0 + +#define NVB097_SET_SPARE_NOOP14 0x1078 +#define NVB097_SET_SPARE_NOOP14_V 31:0 + +#define NVB097_SET_SPARE_NOOP15 0x107c +#define NVB097_SET_SPARE_NOOP15_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVB097_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVB097_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVB097_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD06 0x10bc +#define NVB097_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVB097_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVB097_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVB097_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVB097_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVB097_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVB097_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVB097_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD13 0x10dc +#define NVB097_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVB097_UNBIND_ALL 0x10f4 +#define NVB097_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVB097_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVB097_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVB097_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVB097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB097_SET_RESERVED_SW_METHOD14 0x1100 +#define NVB097_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVB097_SET_RESERVED_SW_METHOD15 0x1104 +#define NVB097_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVB097_NO_OPERATION_DATA_HI 0x110c +#define NVB097_NO_OPERATION_DATA_HI_V 31:0 + +#define NVB097_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVB097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVB097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVB097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVB097_PM_TRIGGER_END 0x1114 +#define NVB097_PM_TRIGGER_END_V 31:0 + +#define NVB097_SET_VERTEX_ID_BASE 0x1118 +#define NVB097_SET_VERTEX_ID_BASE_V 31:0 + +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVB097_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVB097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVB097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVB097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVB097_FLUSH_PENDING_WRITES 0x1144 +#define NVB097_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVB097_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVB097_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVB097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVB097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVB097_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVB097_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVB097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVB097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVB097_SET_CT_SELECT 0x121c +#define NVB097_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVB097_SET_CT_SELECT_TARGET0 6:4 +#define NVB097_SET_CT_SELECT_TARGET1 9:7 +#define NVB097_SET_CT_SELECT_TARGET2 12:10 +#define NVB097_SET_CT_SELECT_TARGET3 15:13 +#define NVB097_SET_CT_SELECT_TARGET4 18:16 +#define NVB097_SET_CT_SELECT_TARGET5 21:19 +#define NVB097_SET_CT_SELECT_TARGET6 24:22 +#define NVB097_SET_CT_SELECT_TARGET7 27:25 + +#define NVB097_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVB097_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVB097_SET_ZT_SIZE_A 0x1228 +#define NVB097_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVB097_SET_ZT_SIZE_B 0x122c +#define NVB097_SET_ZT_SIZE_B_HEIGHT 16:0 + +#define NVB097_SET_ZT_SIZE_C 0x1230 +#define NVB097_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVB097_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVB097_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVB097_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVB097_SET_SAMPLER_BINDING 0x1234 +#define NVB097_SET_SAMPLER_BINDING_V 0:0 +#define NVB097_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVB097_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVB097_DRAW_AUTO 0x123c +#define NVB097_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVB097_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVB097_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVB097_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVB097_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVB097_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVB097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVB097_CLEAR_ZCULL_REGION 0x12c8 +#define NVB097_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVB097_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVB097_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVB097_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVB097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVB097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVB097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVB097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVB097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVB097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVB097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVB097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVB097_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVB097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVB097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVB097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVB097_SET_DEPTH_TEST 0x12cc +#define NVB097_SET_DEPTH_TEST_ENABLE 0:0 +#define NVB097_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVB097_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_FILL_MODE 0x12d0 +#define NVB097_SET_FILL_MODE_V 31:0 +#define NVB097_SET_FILL_MODE_V_POINT 0x00000001 +#define NVB097_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVB097_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVB097_SET_SHADE_MODE 0x12d4 +#define NVB097_SET_SHADE_MODE_V 31:0 +#define NVB097_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVB097_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVB097_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVB097_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVB097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVB097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVB097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVB097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVB097_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVB097_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVB097_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVB097_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_DEPTH_WRITE 0x12e8 +#define NVB097_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVB097_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_ALPHA_TEST 0x12ec +#define NVB097_SET_ALPHA_TEST_ENABLE 0:0 +#define NVB097_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVB097_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVB097_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVB097_DRAW_INLINE_INDEX4X8 0x1304 +#define NVB097_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVB097_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVB097_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVB097_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVB097_D3D_SET_CULL_MODE 0x1308 +#define NVB097_D3D_SET_CULL_MODE_V 31:0 +#define NVB097_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVB097_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVB097_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVB097_SET_DEPTH_FUNC 0x130c +#define NVB097_SET_DEPTH_FUNC_V 31:0 +#define NVB097_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVB097_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVB097_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVB097_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVB097_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVB097_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVB097_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVB097_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVB097_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVB097_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVB097_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVB097_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVB097_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVB097_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVB097_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVB097_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVB097_SET_ALPHA_REF 0x1310 +#define NVB097_SET_ALPHA_REF_V 31:0 + +#define NVB097_SET_ALPHA_FUNC 0x1314 +#define NVB097_SET_ALPHA_FUNC_V 31:0 +#define NVB097_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVB097_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVB097_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVB097_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVB097_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVB097_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVB097_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVB097_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVB097_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVB097_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVB097_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVB097_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVB097_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVB097_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVB097_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVB097_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVB097_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVB097_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVB097_SET_BLEND_CONST_RED 0x131c +#define NVB097_SET_BLEND_CONST_RED_V 31:0 + +#define NVB097_SET_BLEND_CONST_GREEN 0x1320 +#define NVB097_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVB097_SET_BLEND_CONST_BLUE 0x1324 +#define NVB097_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVB097_SET_BLEND_CONST_ALPHA 0x1328 +#define NVB097_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVB097_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVB097_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVB097_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVB097_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVB097_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVB097_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVB097_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVB097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVB097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVB097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_BLEND_COLOR_OP 0x1340 +#define NVB097_SET_BLEND_COLOR_OP_V 31:0 +#define NVB097_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVB097_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVB097_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVB097_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVB097_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVB097_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVB097_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVB097_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVB097_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVB097_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB097_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB097_SET_BLEND_ALPHA_OP 0x134c +#define NVB097_SET_BLEND_ALPHA_OP_V 31:0 +#define NVB097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVB097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVB097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVB097_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVB097_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVB097_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVB097_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVB097_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVB097_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVB097_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB097_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVB097_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVB097_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVB097_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB097_SET_SINGLE_ROP_CONTROL 0x135c +#define NVB097_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVB097_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVB097_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_BLEND(i) (0x1360+(i)*4) +#define NVB097_SET_BLEND_ENABLE 0:0 +#define NVB097_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVB097_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_STENCIL_TEST 0x1380 +#define NVB097_SET_STENCIL_TEST_ENABLE 0:0 +#define NVB097_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVB097_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_STENCIL_OP_FAIL 0x1384 +#define NVB097_SET_STENCIL_OP_FAIL_V 31:0 +#define NVB097_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVB097_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVB097_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVB097_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVB097_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVB097_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVB097_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVB097_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVB097_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVB097_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVB097_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVB097_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVB097_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVB097_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVB097_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVB097_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVB097_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVB097_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVB097_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVB097_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVB097_SET_STENCIL_OP_ZPASS 0x138c +#define NVB097_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVB097_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVB097_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVB097_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVB097_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVB097_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVB097_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVB097_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVB097_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVB097_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVB097_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVB097_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVB097_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVB097_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVB097_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVB097_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVB097_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVB097_SET_STENCIL_FUNC 0x1390 +#define NVB097_SET_STENCIL_FUNC_V 31:0 +#define NVB097_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVB097_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVB097_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVB097_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVB097_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVB097_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVB097_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVB097_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVB097_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVB097_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVB097_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVB097_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVB097_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVB097_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVB097_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVB097_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVB097_SET_STENCIL_FUNC_REF 0x1394 +#define NVB097_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVB097_SET_STENCIL_FUNC_MASK 0x1398 +#define NVB097_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVB097_SET_STENCIL_MASK 0x139c +#define NVB097_SET_STENCIL_MASK_V 7:0 + +#define NVB097_SET_DRAW_AUTO_START 0x13a4 +#define NVB097_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVB097_SET_PS_SATURATE 0x13a8 +#define NVB097_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVB097_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVB097_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB097_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVB097_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVB097_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB097_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVB097_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVB097_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB097_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVB097_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVB097_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB097_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVB097_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVB097_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB097_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVB097_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVB097_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB097_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVB097_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVB097_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB097_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVB097_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVB097_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB097_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVB097_SET_WINDOW_ORIGIN 0x13ac +#define NVB097_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVB097_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVB097_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVB097_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVB097_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVB097_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVB097_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVB097_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVB097_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVB097_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVB097_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVB097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVB097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_ALPHA_HYSTERESIS 0x1420 +#define NVB097_SET_ALPHA_HYSTERESIS_ROUNDS_OF_ALPHA 7:0 + +#define NVB097_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVB097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVB097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB097_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVB097_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVB097_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVB097_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVB097_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVB097_SET_PS_WARP_WATERMARKS 0x1450 +#define NVB097_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVB097_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVB097_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVB097_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVB097_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVB097_STORE_ZCULL 0x1464 +#define NVB097_STORE_ZCULL_V 0:0 + +#define NVB097_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVB097_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVB097_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVB097_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVB097_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVB097_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVB097_LOAD_ZCULL 0x1500 +#define NVB097_LOAD_ZCULL_V 0:0 + +#define NVB097_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVB097_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVB097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVB097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVB097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVB097_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVB097_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVB097_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVB097_SET_USER_CLIP_ENABLE 0x1510 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVB097_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVB097_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVB097_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVB097_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_POINT_SIZE 0x1518 +#define NVB097_SET_POINT_SIZE_V 31:0 + +#define NVB097_SET_ZCULL_STATS 0x151c +#define NVB097_SET_ZCULL_STATS_ENABLE 0:0 +#define NVB097_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_POINT_SPRITE 0x1520 +#define NVB097_SET_POINT_SPRITE_ENABLE 0:0 +#define NVB097_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_SHADER_EXCEPTIONS 0x1528 +#define NVB097_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVB097_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVB097_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVB097_CLEAR_REPORT_VALUE 0x1530 +#define NVB097_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVB097_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVB097_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVB097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVB097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVB097_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVB097_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVB097_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 + +#define NVB097_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVB097_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVB097_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVB097_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVB097_SET_ZT_SELECT 0x1538 +#define NVB097_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVB097_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVB097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVB097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVB097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVB097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVB097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVB097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVB097_SET_RENDER_ENABLE_A 0x1550 +#define NVB097_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_RENDER_ENABLE_B 0x1554 +#define NVB097_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_RENDER_ENABLE_C 0x1558 +#define NVB097_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVB097_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVB097_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVB097_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVB097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVB097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVB097_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVB097_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVB097_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVB097_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVB097_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVB097_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVB097_SET_ANTI_ALIASED_LINE 0x1570 +#define NVB097_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVB097_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_TEX_HEADER_POOL_A 0x1574 +#define NVB097_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_TEX_HEADER_POOL_B 0x1578 +#define NVB097_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_TEX_HEADER_POOL_C 0x157c +#define NVB097_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVB097_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVB097_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVB097_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVB097_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVB097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVB097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVB097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVB097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVB097_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVB097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVB097_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVB097_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVB097_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVB097_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVB097_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVB097_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVB097_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVB097_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVB097_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVB097_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVB097_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVB097_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVB097_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVB097_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVB097_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVB097_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVB097_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVB097_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVB097_SET_SRGB_WRITE 0x15b8 +#define NVB097_SET_SRGB_WRITE_ENABLE 0:0 +#define NVB097_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_DEPTH_BIAS 0x15bc +#define NVB097_SET_DEPTH_BIAS_V 31:0 + +#define NVB097_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVB097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVB097_SET_RT_LAYER 0x15cc +#define NVB097_SET_RT_LAYER_V 15:0 +#define NVB097_SET_RT_LAYER_CONTROL 16:16 +#define NVB097_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVB097_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVB097_SET_ANTI_ALIAS 0x15d0 +#define NVB097_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVB097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVB097_SET_EDGE_FLAG 0x15e4 +#define NVB097_SET_EDGE_FLAG_V 0:0 +#define NVB097_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVB097_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVB097_DRAW_INLINE_INDEX 0x15e8 +#define NVB097_DRAW_INLINE_INDEX_V 31:0 + +#define NVB097_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVB097_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVB097_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVB097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVB097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVB097_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVB097_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVB097_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVB097_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVB097_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVB097_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVB097_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVB097_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVB097_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVB097_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVB097_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVB097_SET_POINT_SPRITE_SELECT 0x1604 +#define NVB097_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVB097_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVB097_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVB097_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVB097_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVB097_SET_PROGRAM_REGION_A 0x1608 +#define NVB097_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVB097_SET_PROGRAM_REGION_B 0x160c +#define NVB097_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVB097_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVB097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVB097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVB097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVB097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVB097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVB097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVB097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVB097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVB097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVB097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVB097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVB097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVB097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVB097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVB097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVB097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVB097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVB097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVB097_END 0x1614 +#define NVB097_END_V 0:0 + +#define NVB097_BEGIN 0x1618 +#define NVB097_BEGIN_OP 15:0 +#define NVB097_BEGIN_OP_POINTS 0x00000000 +#define NVB097_BEGIN_OP_LINES 0x00000001 +#define NVB097_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVB097_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVB097_BEGIN_OP_TRIANGLES 0x00000004 +#define NVB097_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVB097_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVB097_BEGIN_OP_QUADS 0x00000007 +#define NVB097_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVB097_BEGIN_OP_POLYGON 0x00000009 +#define NVB097_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVB097_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVB097_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_BEGIN_OP_PATCH 0x0000000E +#define NVB097_BEGIN_PRIMITIVE_ID 24:24 +#define NVB097_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVB097_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVB097_BEGIN_INSTANCE_ID 27:26 +#define NVB097_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVB097_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVB097_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVB097_BEGIN_SPLIT_MODE 30:29 +#define NVB097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVB097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVB097_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVB097_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 + +#define NVB097_SET_VERTEX_ID_COPY 0x161c +#define NVB097_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVB097_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVB097_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVB097_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVB097_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVB097_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVB097_LOAD_PRIMITIVE_ID 0x1624 +#define NVB097_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVB097_SET_SHADER_BASED_CULL 0x162c +#define NVB097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVB097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVB097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVB097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVB097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVB097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_CLASS_VERSION 0x1638 +#define NVB097_SET_CLASS_VERSION_CURRENT 15:0 +#define NVB097_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB097_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVB097_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVB097_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVB097_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVB097_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVB097_SET_DA_OUTPUT 0x164c +#define NVB097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVB097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVB097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVB097_SET_ANTI_ALIASED_POINT 0x1658 +#define NVB097_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVB097_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_POINT_CENTER_MODE 0x165c +#define NVB097_SET_POINT_CENTER_MODE_V 31:0 +#define NVB097_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVB097_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVB097_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVB097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVB097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVB097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVB097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVB097_SET_LINE_STIPPLE 0x166c +#define NVB097_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVB097_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVB097_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVB097_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVB097_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVB097_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVB097_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVB097_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVB097_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVB097_SET_PROVOKING_VERTEX 0x1684 +#define NVB097_SET_PROVOKING_VERTEX_V 0:0 +#define NVB097_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVB097_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVB097_SET_TWO_SIDED_LIGHT 0x1688 +#define NVB097_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVB097_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_POLYGON_STIPPLE 0x168c +#define NVB097_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVB097_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_SHADER_CONTROL 0x1690 +#define NVB097_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVB097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVB097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVB097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVB097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVB097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVB097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVB097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVB097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVB097_CHECK_CLASS_VERSION 0x16a0 +#define NVB097_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVB097_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB097_SET_SPH_VERSION 0x16a4 +#define NVB097_SET_SPH_VERSION_CURRENT 15:0 +#define NVB097_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB097_CHECK_SPH_VERSION 0x16a8 +#define NVB097_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVB097_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB097_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVB097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVB097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVB097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVB097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVB097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVB097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVB097_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVB097_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVB097_SET_AAM_VERSION 0x1790 +#define NVB097_SET_AAM_VERSION_CURRENT 15:0 +#define NVB097_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB097_CHECK_AAM_VERSION 0x1794 +#define NVB097_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVB097_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB097_SET_ZT_LAYER 0x179c +#define NVB097_SET_ZT_LAYER_OFFSET 15:0 + +#define NVB097_SET_INDEX_BUFFER_A 0x17c8 +#define NVB097_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVB097_SET_INDEX_BUFFER_B 0x17cc +#define NVB097_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVB097_SET_INDEX_BUFFER_C 0x17d0 +#define NVB097_SET_INDEX_BUFFER_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVB097_SET_INDEX_BUFFER_D 0x17d4 +#define NVB097_SET_INDEX_BUFFER_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVB097_SET_INDEX_BUFFER_E 0x17d8 +#define NVB097_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVB097_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVB097_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVB097_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVB097_SET_INDEX_BUFFER_F 0x17dc +#define NVB097_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVB097_DRAW_INDEX_BUFFER 0x17e0 +#define NVB097_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVB097_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVB097_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVB097_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVB097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVB097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVB097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVB097_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVB097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVB097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVB097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVB097_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVB097_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVB097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVB097_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVB097_OGL_SET_CULL 0x1918 +#define NVB097_OGL_SET_CULL_ENABLE 0:0 +#define NVB097_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVB097_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVB097_OGL_SET_FRONT_FACE 0x191c +#define NVB097_OGL_SET_FRONT_FACE_V 31:0 +#define NVB097_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVB097_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVB097_OGL_SET_CULL_FACE 0x1920 +#define NVB097_OGL_SET_CULL_FACE_V 31:0 +#define NVB097_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVB097_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVB097_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVB097_SET_VIEWPORT_PIXEL 0x1924 +#define NVB097_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVB097_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVB097_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVB097_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVB097_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVB097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVB097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVB097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVB097_SET_USER_CLIP_OP 0x1940 +#define NVB097_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVB097_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVB097_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVB097_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVB097_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVB097_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVB097_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVB097_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVB097_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVB097_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVB097_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVB097_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVB097_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVB097_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVB097_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVB097_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVB097_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVB097_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVB097_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVB097_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVB097_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVB097_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVB097_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVB097_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVB097_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVB097_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVB097_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVB097_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVB097_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVB097_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVB097_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVB097_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVB097_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVB097_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVB097_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVB097_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVB097_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVB097_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVB097_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVB097_INVALIDATE_ZCULL 0x1958 +#define NVB097_INVALIDATE_ZCULL_V 31:0 +#define NVB097_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVB097_SET_ZCULL 0x1968 +#define NVB097_SET_ZCULL_Z_ENABLE 0:0 +#define NVB097_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVB097_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVB097_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_ZCULL_BOUNDS 0x196c +#define NVB097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVB097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVB097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVB097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVB097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVB097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVB097_ZCULL_SYNC 0x1978 +#define NVB097_ZCULL_SYNC_V 31:0 + +#define NVB097_SET_CLIP_ID_TEST 0x197c +#define NVB097_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVB097_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVB097_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVB097_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVB097_SET_CLIP_ID 0x1984 +#define NVB097_SET_CLIP_ID_V 31:0 + +#define NVB097_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVB097_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVB097_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVB097_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVB097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVB097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVB097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVB097_SET_LOGIC_OP 0x19c4 +#define NVB097_SET_LOGIC_OP_ENABLE 0:0 +#define NVB097_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVB097_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_LOGIC_OP_FUNC 0x19c8 +#define NVB097_SET_LOGIC_OP_FUNC_V 31:0 +#define NVB097_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVB097_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVB097_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVB097_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVB097_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVB097_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVB097_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVB097_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVB097_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVB097_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVB097_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVB097_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVB097_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVB097_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVB097_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVB097_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVB097_SET_Z_COMPRESSION 0x19cc +#define NVB097_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVB097_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVB097_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVB097_CLEAR_SURFACE 0x19d0 +#define NVB097_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVB097_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVB097_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVB097_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVB097_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVB097_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVB097_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVB097_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVB097_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVB097_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVB097_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVB097_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVB097_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVB097_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVB097_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVB097_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVB097_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVB097_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVB097_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVB097_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVB097_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVB097_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVB097_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVB097_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVB097_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVB097_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVB097_SET_CT_WRITE_R_ENABLE 0:0 +#define NVB097_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVB097_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVB097_SET_CT_WRITE_G_ENABLE 4:4 +#define NVB097_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVB097_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVB097_SET_CT_WRITE_B_ENABLE 8:8 +#define NVB097_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVB097_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVB097_SET_CT_WRITE_A_ENABLE 12:12 +#define NVB097_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVB097_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVB097_PIPE_NOP 0x1a2c +#define NVB097_PIPE_NOP_V 31:0 + +#define NVB097_SET_SPARE00 0x1a30 +#define NVB097_SET_SPARE00_V 31:0 + +#define NVB097_SET_SPARE01 0x1a34 +#define NVB097_SET_SPARE01_V 31:0 + +#define NVB097_SET_SPARE02 0x1a38 +#define NVB097_SET_SPARE02_V 31:0 + +#define NVB097_SET_SPARE03 0x1a3c +#define NVB097_SET_SPARE03_V 31:0 + +#define NVB097_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVB097_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVB097_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVB097_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVB097_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVB097_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVB097_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVB097_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVB097_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVB097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVB097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVB097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVB097_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVB097_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVB097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVB097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVB097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVB097_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVB097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVB097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVB097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVB097_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVB097_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVB097_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVB097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVB097_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVB097_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVB097_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVB097_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVB097_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVB097_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVB097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVB097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVB097_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVB097_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVB097_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVB097_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVB097_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVB097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVB097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVB097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVB097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB097_SET_VERTEX_STREAM_LIMIT_A_A(j) (0x1f00+(j)*8) +#define NVB097_SET_VERTEX_STREAM_LIMIT_A_A_UPPER 7:0 + +#define NVB097_SET_VERTEX_STREAM_LIMIT_A_B(j) (0x1f04+(j)*8) +#define NVB097_SET_VERTEX_STREAM_LIMIT_A_B_LOWER 31:0 + +#define NVB097_SET_VERTEX_STREAM_LIMIT_B_A(j) (0x1f80+(j)*8) +#define NVB097_SET_VERTEX_STREAM_LIMIT_B_A_UPPER 7:0 + +#define NVB097_SET_VERTEX_STREAM_LIMIT_B_B(j) (0x1f84+(j)*8) +#define NVB097_SET_VERTEX_STREAM_LIMIT_B_B_LOWER 31:0 + +#define NVB097_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVB097_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVB097_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVB097_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVB097_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVB097_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVB097_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVB097_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVB097_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVB097_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVB097_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVB097_SET_PIPELINE_PROGRAM(j) (0x2004+(j)*64) +#define NVB097_SET_PIPELINE_PROGRAM_OFFSET 31:0 + +#define NVB097_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVB097_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVB097_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVB097_SET_PIPELINE_REGISTER_COUNT_V 7:0 + +#define NVB097_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVB097_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVB097_SET_PIPELINE_RESERVED_B(j) (0x2014+(j)*64) +#define NVB097_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVB097_SET_PIPELINE_RESERVED_C(j) (0x2018+(j)*64) +#define NVB097_SET_PIPELINE_RESERVED_C_V 0:0 + +#define NVB097_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NVB097_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NVB097_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVB097_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVB097_SET_FALCON00 0x2300 +#define NVB097_SET_FALCON00_V 31:0 + +#define NVB097_SET_FALCON01 0x2304 +#define NVB097_SET_FALCON01_V 31:0 + +#define NVB097_SET_FALCON02 0x2308 +#define NVB097_SET_FALCON02_V 31:0 + +#define NVB097_SET_FALCON03 0x230c +#define NVB097_SET_FALCON03_V 31:0 + +#define NVB097_SET_FALCON04 0x2310 +#define NVB097_SET_FALCON04_V 31:0 + +#define NVB097_SET_FALCON05 0x2314 +#define NVB097_SET_FALCON05_V 31:0 + +#define NVB097_SET_FALCON06 0x2318 +#define NVB097_SET_FALCON06_V 31:0 + +#define NVB097_SET_FALCON07 0x231c +#define NVB097_SET_FALCON07_V 31:0 + +#define NVB097_SET_FALCON08 0x2320 +#define NVB097_SET_FALCON08_V 31:0 + +#define NVB097_SET_FALCON09 0x2324 +#define NVB097_SET_FALCON09_V 31:0 + +#define NVB097_SET_FALCON10 0x2328 +#define NVB097_SET_FALCON10_V 31:0 + +#define NVB097_SET_FALCON11 0x232c +#define NVB097_SET_FALCON11_V 31:0 + +#define NVB097_SET_FALCON12 0x2330 +#define NVB097_SET_FALCON12_V 31:0 + +#define NVB097_SET_FALCON13 0x2334 +#define NVB097_SET_FALCON13_V 31:0 + +#define NVB097_SET_FALCON14 0x2338 +#define NVB097_SET_FALCON14_V 31:0 + +#define NVB097_SET_FALCON15 0x233c +#define NVB097_SET_FALCON15_V 31:0 + +#define NVB097_SET_FALCON16 0x2340 +#define NVB097_SET_FALCON16_V 31:0 + +#define NVB097_SET_FALCON17 0x2344 +#define NVB097_SET_FALCON17_V 31:0 + +#define NVB097_SET_FALCON18 0x2348 +#define NVB097_SET_FALCON18_V 31:0 + +#define NVB097_SET_FALCON19 0x234c +#define NVB097_SET_FALCON19_V 31:0 + +#define NVB097_SET_FALCON20 0x2350 +#define NVB097_SET_FALCON20_V 31:0 + +#define NVB097_SET_FALCON21 0x2354 +#define NVB097_SET_FALCON21_V 31:0 + +#define NVB097_SET_FALCON22 0x2358 +#define NVB097_SET_FALCON22_V 31:0 + +#define NVB097_SET_FALCON23 0x235c +#define NVB097_SET_FALCON23_V 31:0 + +#define NVB097_SET_FALCON24 0x2360 +#define NVB097_SET_FALCON24_V 31:0 + +#define NVB097_SET_FALCON25 0x2364 +#define NVB097_SET_FALCON25_V 31:0 + +#define NVB097_SET_FALCON26 0x2368 +#define NVB097_SET_FALCON26_V 31:0 + +#define NVB097_SET_FALCON27 0x236c +#define NVB097_SET_FALCON27_V 31:0 + +#define NVB097_SET_FALCON28 0x2370 +#define NVB097_SET_FALCON28_V 31:0 + +#define NVB097_SET_FALCON29 0x2374 +#define NVB097_SET_FALCON29_V 31:0 + +#define NVB097_SET_FALCON30 0x2378 +#define NVB097_SET_FALCON30_V 31:0 + +#define NVB097_SET_FALCON31 0x237c +#define NVB097_SET_FALCON31_V 31:0 + +#define NVB097_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVB097_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVB097_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVB097_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVB097_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVB097_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVB097_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVB097_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVB097_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVB097_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVB097_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVB097_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVB097_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVB097_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVB097_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVB097_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVB097_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVB097_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVB097_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVB097_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVB097_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVB097_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVB097_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVB097_SET_COLOR_CLAMP 0x2600 +#define NVB097_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVB097_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVB097_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVB097_SET_BINDLESS_TEXTURE 0x2608 +#define NVB097_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 4:0 + +#define NVB097_SET_TRAP_HANDLER 0x260c +#define NVB097_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVB097_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVB097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVB097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVB097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVB097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVB097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVB097_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVB097_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVB097_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVB097_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVB097_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVB097_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVB097_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVB097_CALL_MME_MACRO_V 31:0 + +#define NVB097_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVB097_CALL_MME_DATA_V 31:0 + +#endif /* _cl_maxwell_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clb0b0.h b/userspace/sdks/nv570/inc/class/clb0b0.h new file mode 100644 index 0000000..030040c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb0b0.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#include "nvtypes.h" + +#ifndef _clb0b0_h_ +#define _clb0b0_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVB0B0_VIDEO_DECODER (0x0000B0B0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clb0b0_h diff --git a/userspace/sdks/nv570/inc/class/clb0b5.h b/userspace/sdks/nv570/inc/class/clb0b5.h new file mode 100644 index 0000000..63fe695 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb0b5.h @@ -0,0 +1,261 @@ +/******************************************************************************* + Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#include "nvtypes.h" + +#ifndef _clb0b5_h_ +#define _clb0b5_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define MAXWELL_DMA_COPY_A (0x0000B0B5) + +#define NVB0B5_NOP (0x00000100) +#define NVB0B5_NOP_PARAMETER 31:0 +#define NVB0B5_PM_TRIGGER (0x00000140) +#define NVB0B5_PM_TRIGGER_V 31:0 +#define NVB0B5_SET_SEMAPHORE_A (0x00000240) +#define NVB0B5_SET_SEMAPHORE_A_UPPER 7:0 +#define NVB0B5_SET_SEMAPHORE_B (0x00000244) +#define NVB0B5_SET_SEMAPHORE_B_LOWER 31:0 +#define NVB0B5_SET_SEMAPHORE_PAYLOAD (0x00000248) +#define NVB0B5_SET_SEMAPHORE_PAYLOAD_PAYLOAD 31:0 +#define NVB0B5_SET_RENDER_ENABLE_A (0x00000254) +#define NVB0B5_SET_RENDER_ENABLE_A_UPPER 7:0 +#define NVB0B5_SET_RENDER_ENABLE_B (0x00000258) +#define NVB0B5_SET_RENDER_ENABLE_B_LOWER 31:0 +#define NVB0B5_SET_RENDER_ENABLE_C (0x0000025C) +#define NVB0B5_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVB0B5_SET_RENDER_ENABLE_C_MODE_FALSE (0x00000000) +#define NVB0B5_SET_RENDER_ENABLE_C_MODE_TRUE (0x00000001) +#define NVB0B5_SET_RENDER_ENABLE_C_MODE_CONDITIONAL (0x00000002) +#define NVB0B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL (0x00000003) +#define NVB0B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL (0x00000004) +#define NVB0B5_SET_SRC_PHYS_MODE (0x00000260) +#define NVB0B5_SET_SRC_PHYS_MODE_TARGET 1:0 +#define NVB0B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVB0B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVB0B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVB0B5_SET_DST_PHYS_MODE (0x00000264) +#define NVB0B5_SET_DST_PHYS_MODE_TARGET 1:0 +#define NVB0B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVB0B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVB0B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVB0B5_LAUNCH_DMA (0x00000300) +#define NVB0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVB0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVB0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVB0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVB0B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 +#define NVB0B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) +#define NVB0B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_TYPE_NONE (0x00000000) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_FOUR_WORD_SEMAPHORE (0x00000002) +#define NVB0B5_LAUNCH_DMA_INTERRUPT_TYPE 6:5 +#define NVB0B5_LAUNCH_DMA_INTERRUPT_TYPE_NONE (0x00000000) +#define NVB0B5_LAUNCH_DMA_INTERRUPT_TYPE_BLOCKING (0x00000001) +#define NVB0B5_LAUNCH_DMA_INTERRUPT_TYPE_NON_BLOCKING (0x00000002) +#define NVB0B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 +#define NVB0B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVB0B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVB0B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 +#define NVB0B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVB0B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVB0B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 +#define NVB0B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) +#define NVB0B5_LAUNCH_DMA_MULTI_LINE_ENABLE_TRUE (0x00000001) +#define NVB0B5_LAUNCH_DMA_REMAP_ENABLE 10:10 +#define NVB0B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) +#define NVB0B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) +#define NVB0B5_LAUNCH_DMA_FORCE_RMWDISABLE 11:11 +#define NVB0B5_LAUNCH_DMA_FORCE_RMWDISABLE_FALSE (0x00000000) +#define NVB0B5_LAUNCH_DMA_FORCE_RMWDISABLE_TRUE (0x00000001) +#define NVB0B5_LAUNCH_DMA_SRC_TYPE 12:12 +#define NVB0B5_LAUNCH_DMA_SRC_TYPE_VIRTUAL (0x00000000) +#define NVB0B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) +#define NVB0B5_LAUNCH_DMA_DST_TYPE 13:13 +#define NVB0B5_LAUNCH_DMA_DST_TYPE_VIRTUAL (0x00000000) +#define NVB0B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION 17:14 +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMIN (0x00000000) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMAX (0x00000001) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IXOR (0x00000002) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IAND (0x00000003) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IOR (0x00000004) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IADD (0x00000005) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INC (0x00000006) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_DEC (0x00000007) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FADD (0x0000000A) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN 18:18 +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_SIGNED (0x00000000) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_UNSIGNED (0x00000001) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE 19:19 +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_FALSE (0x00000000) +#define NVB0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_TRUE (0x00000001) +#define NVB0B5_LAUNCH_DMA_BYPASS_L2 20:20 +#define NVB0B5_LAUNCH_DMA_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVB0B5_LAUNCH_DMA_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVB0B5_OFFSET_IN_UPPER (0x00000400) +#define NVB0B5_OFFSET_IN_UPPER_UPPER 7:0 +#define NVB0B5_OFFSET_IN_LOWER (0x00000404) +#define NVB0B5_OFFSET_IN_LOWER_VALUE 31:0 +#define NVB0B5_OFFSET_OUT_UPPER (0x00000408) +#define NVB0B5_OFFSET_OUT_UPPER_UPPER 7:0 +#define NVB0B5_OFFSET_OUT_LOWER (0x0000040C) +#define NVB0B5_OFFSET_OUT_LOWER_VALUE 31:0 +#define NVB0B5_PITCH_IN (0x00000410) +#define NVB0B5_PITCH_IN_VALUE 31:0 +#define NVB0B5_PITCH_OUT (0x00000414) +#define NVB0B5_PITCH_OUT_VALUE 31:0 +#define NVB0B5_LINE_LENGTH_IN (0x00000418) +#define NVB0B5_LINE_LENGTH_IN_VALUE 31:0 +#define NVB0B5_LINE_COUNT (0x0000041C) +#define NVB0B5_LINE_COUNT_VALUE 31:0 +#define NVB0B5_SET_REMAP_CONST_A (0x00000700) +#define NVB0B5_SET_REMAP_CONST_A_V 31:0 +#define NVB0B5_SET_REMAP_CONST_B (0x00000704) +#define NVB0B5_SET_REMAP_CONST_B_V 31:0 +#define NVB0B5_SET_REMAP_COMPONENTS (0x00000708) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_X 2:0 +#define NVB0B5_SET_REMAP_COMPONENTS_DST_X_SRC_X (0x00000000) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_X_SRC_Y (0x00000001) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_X_SRC_Z (0x00000002) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_X_SRC_W (0x00000003) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_X_NO_WRITE (0x00000006) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Y 6:4 +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_X (0x00000000) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Y (0x00000001) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Z (0x00000002) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_W (0x00000003) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Y_CONST_A (0x00000004) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Y_NO_WRITE (0x00000006) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Z 10:8 +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_X (0x00000000) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Y (0x00000001) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Z (0x00000002) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_W (0x00000003) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Z_CONST_A (0x00000004) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Z_CONST_B (0x00000005) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_Z_NO_WRITE (0x00000006) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_W 14:12 +#define NVB0B5_SET_REMAP_COMPONENTS_DST_W_SRC_X (0x00000000) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_W_SRC_Y (0x00000001) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_W_SRC_Z (0x00000002) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_W_SRC_W (0x00000003) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_W_CONST_A (0x00000004) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_W_CONST_B (0x00000005) +#define NVB0B5_SET_REMAP_COMPONENTS_DST_W_NO_WRITE (0x00000006) +#define NVB0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 +#define NVB0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) +#define NVB0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_TWO (0x00000001) +#define NVB0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_THREE (0x00000002) +#define NVB0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS 21:20 +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_ONE (0x00000000) +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_TWO (0x00000001) +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_THREE (0x00000002) +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_FOUR (0x00000003) +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_THREE (0x00000002) +#define NVB0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_FOUR (0x00000003) +#define NVB0B5_SET_DST_BLOCK_SIZE (0x0000070C) +#define NVB0B5_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVB0B5_SET_DST_BLOCK_SIZE_WIDTH_QUARTER_GOB (0x0000000E) +#define NVB0B5_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVB0B5_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVB0B5_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVB0B5_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVB0B5_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVB0B5_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVB0B5_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVB0B5_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVB0B5_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVB0B5_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVB0B5_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVB0B5_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVB0B5_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVB0B5_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVB0B5_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVB0B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVB0B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_TESLA_4 (0x00000000) +#define NVB0B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVB0B5_SET_DST_WIDTH (0x00000710) +#define NVB0B5_SET_DST_WIDTH_V 31:0 +#define NVB0B5_SET_DST_HEIGHT (0x00000714) +#define NVB0B5_SET_DST_HEIGHT_V 31:0 +#define NVB0B5_SET_DST_DEPTH (0x00000718) +#define NVB0B5_SET_DST_DEPTH_V 31:0 +#define NVB0B5_SET_DST_LAYER (0x0000071C) +#define NVB0B5_SET_DST_LAYER_V 31:0 +#define NVB0B5_SET_DST_ORIGIN (0x00000720) +#define NVB0B5_SET_DST_ORIGIN_X 15:0 +#define NVB0B5_SET_DST_ORIGIN_Y 31:16 +#define NVB0B5_SET_SRC_BLOCK_SIZE (0x00000728) +#define NVB0B5_SET_SRC_BLOCK_SIZE_WIDTH 3:0 +#define NVB0B5_SET_SRC_BLOCK_SIZE_WIDTH_QUARTER_GOB (0x0000000E) +#define NVB0B5_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVB0B5_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 +#define NVB0B5_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVB0B5_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVB0B5_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVB0B5_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVB0B5_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVB0B5_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVB0B5_SET_SRC_BLOCK_SIZE_DEPTH 11:8 +#define NVB0B5_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVB0B5_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVB0B5_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVB0B5_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVB0B5_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVB0B5_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVB0B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVB0B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_TESLA_4 (0x00000000) +#define NVB0B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVB0B5_SET_SRC_WIDTH (0x0000072C) +#define NVB0B5_SET_SRC_WIDTH_V 31:0 +#define NVB0B5_SET_SRC_HEIGHT (0x00000730) +#define NVB0B5_SET_SRC_HEIGHT_V 31:0 +#define NVB0B5_SET_SRC_DEPTH (0x00000734) +#define NVB0B5_SET_SRC_DEPTH_V 31:0 +#define NVB0B5_SET_SRC_LAYER (0x00000738) +#define NVB0B5_SET_SRC_LAYER_V 31:0 +#define NVB0B5_SET_SRC_ORIGIN (0x0000073C) +#define NVB0B5_SET_SRC_ORIGIN_X 15:0 +#define NVB0B5_SET_SRC_ORIGIN_Y 31:16 +#define NVB0B5_PM_TRIGGER_END (0x00001114) +#define NVB0B5_PM_TRIGGER_END_V 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clb0b5_h + diff --git a/userspace/sdks/nv570/inc/class/clb0b5sw.h b/userspace/sdks/nv570/inc/class/clb0b5sw.h new file mode 100644 index 0000000..06fba11 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb0b5sw.h @@ -0,0 +1,54 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2012-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clb0b5sw.finn +// + + + +// +// Using VERSION_0 will cause the API to interpret +// engineType as a CE engine instance. This allows +// for backward compatibility with 85B5sw and 90B5sw. +// +#define NVB0B5_ALLOCATION_PARAMETERS_VERSION_0 0 + +// +// Using VERSION_1 will cause the API to interpret +// engineType as an NV2080_ENGINE_TYPE ordinal. +// +#define NVB0B5_ALLOCATION_PARAMETERS_VERSION_1 1 + +#define NVB0B5_ALLOCATION_PARAMETERS_MESSAGE_ID (0xb0b5U) + +typedef struct NVB0B5_ALLOCATION_PARAMETERS { + NvU32 version; + NvU32 engineType; +} NVB0B5_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clb0c0.h b/userspace/sdks/nv570/inc/class/clb0c0.h new file mode 100644 index 0000000..c343c51 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb0c0.h @@ -0,0 +1,720 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_maxwell_compute_a_h_ +#define _cl_maxwell_compute_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl maxwell_compute_a */ + +#include "nvtypes.h" + +#define MAXWELL_COMPUTE_A 0xB0C0 + +#define NVB0C0_SET_OBJECT 0x0000 +#define NVB0C0_SET_OBJECT_CLASS_ID 15:0 +#define NVB0C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVB0C0_NO_OPERATION 0x0100 +#define NVB0C0_NO_OPERATION_V 31:0 + +#define NVB0C0_SET_NOTIFY_A 0x0104 +#define NVB0C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVB0C0_SET_NOTIFY_B 0x0108 +#define NVB0C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVB0C0_NOTIFY 0x010c +#define NVB0C0_NOTIFY_TYPE 31:0 +#define NVB0C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVB0C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVB0C0_WAIT_FOR_IDLE 0x0110 +#define NVB0C0_WAIT_FOR_IDLE_V 31:0 + +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVB0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVB0C0_SEND_GO_IDLE 0x013c +#define NVB0C0_SEND_GO_IDLE_V 31:0 + +#define NVB0C0_PM_TRIGGER 0x0140 +#define NVB0C0_PM_TRIGGER_V 31:0 + +#define NVB0C0_PM_TRIGGER_WFI 0x0144 +#define NVB0C0_PM_TRIGGER_WFI_V 31:0 + +#define NVB0C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVB0C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVB0C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVB0C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVB0C0_LINE_LENGTH_IN 0x0180 +#define NVB0C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVB0C0_LINE_COUNT 0x0184 +#define NVB0C0_LINE_COUNT_VALUE 31:0 + +#define NVB0C0_OFFSET_OUT_UPPER 0x0188 +#define NVB0C0_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVB0C0_OFFSET_OUT 0x018c +#define NVB0C0_OFFSET_OUT_VALUE 31:0 + +#define NVB0C0_PITCH_OUT 0x0190 +#define NVB0C0_PITCH_OUT_VALUE 31:0 + +#define NVB0C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVB0C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVB0C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVB0C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVB0C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVB0C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVB0C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB0C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB0C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB0C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB0C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVB0C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVB0C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVB0C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVB0C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVB0C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVB0C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVB0C0_SET_DST_WIDTH 0x0198 +#define NVB0C0_SET_DST_WIDTH_V 31:0 + +#define NVB0C0_SET_DST_HEIGHT 0x019c +#define NVB0C0_SET_DST_HEIGHT_V 31:0 + +#define NVB0C0_SET_DST_DEPTH 0x01a0 +#define NVB0C0_SET_DST_DEPTH_V 31:0 + +#define NVB0C0_SET_DST_LAYER 0x01a4 +#define NVB0C0_SET_DST_LAYER_V 31:0 + +#define NVB0C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVB0C0_SET_DST_ORIGIN_BYTES_X_V 19:0 + +#define NVB0C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVB0C0_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 + +#define NVB0C0_LAUNCH_DMA 0x01b0 +#define NVB0C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVB0C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVB0C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVB0C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVB0C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVB0C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVB0C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVB0C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVB0C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVB0C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVB0C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVB0C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVB0C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVB0C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVB0C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVB0C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVB0C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVB0C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVB0C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVB0C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVB0C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVB0C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVB0C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVB0C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVB0C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVB0C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVB0C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVB0C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVB0C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVB0C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVB0C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVB0C0_LOAD_INLINE_DATA 0x01b4 +#define NVB0C0_LOAD_INLINE_DATA_V 31:0 + +#define NVB0C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVB0C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVB0C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVB0C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVB0C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVB0C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVB0C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVB0C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVB0C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVB0C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVB0C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVB0C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVB0C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVB0C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVB0C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVB0C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVB0C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVB0C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVB0C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVB0C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVB0C0_SET_COALESCE_WAITING_PERIOD_UNIT 0x020c +#define NVB0C0_SET_COALESCE_WAITING_PERIOD_UNIT_CLOCKS 31:0 + +#define NVB0C0_PERFMON_TRANSFER 0x0210 +#define NVB0C0_PERFMON_TRANSFER_V 31:0 + +#define NVB0C0_SET_SHADER_SHARED_MEMORY_WINDOW 0x0214 +#define NVB0C0_SET_SHADER_SHARED_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVB0C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS 0x0218 +#define NVB0C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V 0:0 +#define NVB0C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE 0x00000000 +#define NVB0C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE 0x00000001 + +#define NVB0C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVB0C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVB0C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVB0C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVB0C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVB0C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVB0C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVB0C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVB0C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVB0C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVB0C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVB0C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVB0C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVB0C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVB0C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVB0C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVB0C0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVB0C0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVB0C0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVB0C0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD03 0x022c +#define NVB0C0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVB0C0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVB0C0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVB0C0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD07 0x023c +#define NVB0C0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVB0C0_SET_CWD_CONTROL 0x0240 +#define NVB0C0_SET_CWD_CONTROL_SM_SELECTION 0:0 +#define NVB0C0_SET_CWD_CONTROL_SM_SELECTION_LOAD_BALANCED 0x00000000 +#define NVB0C0_SET_CWD_CONTROL_SM_SELECTION_ROUND_ROBIN 0x00000001 + +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVB0C0_SET_CWD_REF_COUNTER 0x0248 +#define NVB0C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVB0C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVB0C0_SET_RESERVED_SW_METHOD08 0x024c +#define NVB0C0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVB0C0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVB0C0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVB0C0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD12 0x025c +#define NVB0C0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVB0C0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVB0C0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVB0C0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVB0C0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVB0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A 0x0274 +#define NVB0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A_ADDRESS_UPPER 7:0 + +#define NVB0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B 0x0278 +#define NVB0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B_ADDRESS_LOWER 31:0 + +#define NVB0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C 0x027c +#define NVB0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_BYTE_COUNT 16:0 +#define NVB0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2 31:31 +#define NVB0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_FALSE 0x00000000 +#define NVB0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_TRUE 0x00000001 + +#define NVB0C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVB0C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVB0C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB0C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVB0C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVB0C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB0C0_SET_QMD_VERSION 0x0288 +#define NVB0C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVB0C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB0C0_CHECK_QMD_VERSION 0x0290 +#define NVB0C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVB0C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB0C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVB0C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVB0C0_SEND_PCAS_A 0x02b4 +#define NVB0C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVB0C0_SEND_PCAS_B 0x02b8 +#define NVB0C0_SEND_PCAS_B_FROM 23:0 +#define NVB0C0_SEND_PCAS_B_DELTA 31:24 + +#define NVB0C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVB0C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVB0C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVB0C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVB0C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVB0C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVB0C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A 0x02f0 +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B 0x02f4 +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C 0x02f8 +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVB0C0_SET_SPA_VERSION 0x0310 +#define NVB0C0_SET_SPA_VERSION_MINOR 7:0 +#define NVB0C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVB0C0_SET_FALCON00 0x0500 +#define NVB0C0_SET_FALCON00_V 31:0 + +#define NVB0C0_SET_FALCON01 0x0504 +#define NVB0C0_SET_FALCON01_V 31:0 + +#define NVB0C0_SET_FALCON02 0x0508 +#define NVB0C0_SET_FALCON02_V 31:0 + +#define NVB0C0_SET_FALCON03 0x050c +#define NVB0C0_SET_FALCON03_V 31:0 + +#define NVB0C0_SET_FALCON04 0x0510 +#define NVB0C0_SET_FALCON04_V 31:0 + +#define NVB0C0_SET_FALCON05 0x0514 +#define NVB0C0_SET_FALCON05_V 31:0 + +#define NVB0C0_SET_FALCON06 0x0518 +#define NVB0C0_SET_FALCON06_V 31:0 + +#define NVB0C0_SET_FALCON07 0x051c +#define NVB0C0_SET_FALCON07_V 31:0 + +#define NVB0C0_SET_FALCON08 0x0520 +#define NVB0C0_SET_FALCON08_V 31:0 + +#define NVB0C0_SET_FALCON09 0x0524 +#define NVB0C0_SET_FALCON09_V 31:0 + +#define NVB0C0_SET_FALCON10 0x0528 +#define NVB0C0_SET_FALCON10_V 31:0 + +#define NVB0C0_SET_FALCON11 0x052c +#define NVB0C0_SET_FALCON11_V 31:0 + +#define NVB0C0_SET_FALCON12 0x0530 +#define NVB0C0_SET_FALCON12_V 31:0 + +#define NVB0C0_SET_FALCON13 0x0534 +#define NVB0C0_SET_FALCON13_V 31:0 + +#define NVB0C0_SET_FALCON14 0x0538 +#define NVB0C0_SET_FALCON14_V 31:0 + +#define NVB0C0_SET_FALCON15 0x053c +#define NVB0C0_SET_FALCON15_V 31:0 + +#define NVB0C0_SET_FALCON16 0x0540 +#define NVB0C0_SET_FALCON16_V 31:0 + +#define NVB0C0_SET_FALCON17 0x0544 +#define NVB0C0_SET_FALCON17_V 31:0 + +#define NVB0C0_SET_FALCON18 0x0548 +#define NVB0C0_SET_FALCON18_V 31:0 + +#define NVB0C0_SET_FALCON19 0x054c +#define NVB0C0_SET_FALCON19_V 31:0 + +#define NVB0C0_SET_FALCON20 0x0550 +#define NVB0C0_SET_FALCON20_V 31:0 + +#define NVB0C0_SET_FALCON21 0x0554 +#define NVB0C0_SET_FALCON21_V 31:0 + +#define NVB0C0_SET_FALCON22 0x0558 +#define NVB0C0_SET_FALCON22_V 31:0 + +#define NVB0C0_SET_FALCON23 0x055c +#define NVB0C0_SET_FALCON23_V 31:0 + +#define NVB0C0_SET_FALCON24 0x0560 +#define NVB0C0_SET_FALCON24_V 31:0 + +#define NVB0C0_SET_FALCON25 0x0564 +#define NVB0C0_SET_FALCON25_V 31:0 + +#define NVB0C0_SET_FALCON26 0x0568 +#define NVB0C0_SET_FALCON26_V 31:0 + +#define NVB0C0_SET_FALCON27 0x056c +#define NVB0C0_SET_FALCON27_V 31:0 + +#define NVB0C0_SET_FALCON28 0x0570 +#define NVB0C0_SET_FALCON28_V 31:0 + +#define NVB0C0_SET_FALCON29 0x0574 +#define NVB0C0_SET_FALCON29_V 31:0 + +#define NVB0C0_SET_FALCON30 0x0578 +#define NVB0C0_SET_FALCON30_V 31:0 + +#define NVB0C0_SET_FALCON31 0x057c +#define NVB0C0_SET_FALCON31_V 31:0 + +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVB0C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVB0C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVB0C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVB0C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVB0C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVB0C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVB0C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVB0C0_SET_SPARE_NOOP12 0x0f44 +#define NVB0C0_SET_SPARE_NOOP12_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP13 0x0f48 +#define NVB0C0_SET_SPARE_NOOP13_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP14 0x0f4c +#define NVB0C0_SET_SPARE_NOOP14_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP15 0x0f50 +#define NVB0C0_SET_SPARE_NOOP15_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP00 0x1040 +#define NVB0C0_SET_SPARE_NOOP00_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP01 0x1044 +#define NVB0C0_SET_SPARE_NOOP01_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP02 0x1048 +#define NVB0C0_SET_SPARE_NOOP02_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP03 0x104c +#define NVB0C0_SET_SPARE_NOOP03_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP04 0x1050 +#define NVB0C0_SET_SPARE_NOOP04_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP05 0x1054 +#define NVB0C0_SET_SPARE_NOOP05_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP06 0x1058 +#define NVB0C0_SET_SPARE_NOOP06_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP07 0x105c +#define NVB0C0_SET_SPARE_NOOP07_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP08 0x1060 +#define NVB0C0_SET_SPARE_NOOP08_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP09 0x1064 +#define NVB0C0_SET_SPARE_NOOP09_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP10 0x1068 +#define NVB0C0_SET_SPARE_NOOP10_V 31:0 + +#define NVB0C0_SET_SPARE_NOOP11 0x106c +#define NVB0C0_SET_SPARE_NOOP11_V 31:0 + +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVB0C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVB0C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVB0C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVB0C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVB0C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVB0C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVB0C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVB0C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVB0C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVB0C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVB0C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVB0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVB0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVB0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVB0C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVB0C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVB0C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVB0C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVB0C0_SET_RENDER_ENABLE_A 0x1550 +#define NVB0C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVB0C0_SET_RENDER_ENABLE_B 0x1554 +#define NVB0C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVB0C0_SET_RENDER_ENABLE_C 0x1558 +#define NVB0C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVB0C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVB0C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVB0C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVB0C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVB0C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVB0C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVB0C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVB0C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVB0C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVB0C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVB0C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVB0C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVB0C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVB0C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVB0C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVB0C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVB0C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVB0C0_SET_PROGRAM_REGION_A 0x1608 +#define NVB0C0_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVB0C0_SET_PROGRAM_REGION_B 0x160c +#define NVB0C0_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVB0C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVB0C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVB0C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVB0C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVB0C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVB0C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVB0C0_PIPE_NOP 0x1a2c +#define NVB0C0_PIPE_NOP_V 31:0 + +#define NVB0C0_SET_SPARE00 0x1a30 +#define NVB0C0_SET_SPARE00_V 31:0 + +#define NVB0C0_SET_SPARE01 0x1a34 +#define NVB0C0_SET_SPARE01_V 31:0 + +#define NVB0C0_SET_SPARE02 0x1a38 +#define NVB0C0_SET_SPARE02_V 31:0 + +#define NVB0C0_SET_SPARE03 0x1a3c +#define NVB0C0_SET_SPARE03_V 31:0 + +#define NVB0C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVB0C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVB0C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVB0C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVB0C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVB0C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVB0C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVB0C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVB0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVB0C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVB0C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVB0C0_SET_TRAP_HANDLER 0x260c +#define NVB0C0_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVB0C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVB0C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVB0C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVB0C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVB0C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVB0C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVB0C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#endif /* _cl_maxwell_compute_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clb0cc.h b/userspace/sdks/nv570/inc/class/clb0cc.h new file mode 100644 index 0000000..61ee79f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb0cc.h @@ -0,0 +1,46 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clb0cc_h_ +#define _clb0cc_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define MAXWELL_PROFILER (0x0000B0CC) + +/* + * This is an interface definition for MAXWELL_PROFILER class and cannot + * be instantiated by clients. + * MAXWELL_PROFILER_DEVICE extends this interface to define interface for + * device level profiling + */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clb0cc_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clb0cd.h b/userspace/sdks/nv570/inc/class/clb0cd.h new file mode 100644 index 0000000..c47c899 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb0cd.h @@ -0,0 +1,49 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clb0cd.finn +// + +#include "nvcfg_sdk.h" + +#define PROFILER_DEVICE_EVENT (0xb0cdU) /* finn: Evaluated from "NVB0CD_ALLOC_PARAMETERS_MESSAGE_ID" */ + +#define NVB0CD_ALLOC_PARAMETERS_MESSAGE_ID (0xb0cdU) + +typedef struct NVB0CD_ALLOC_PARAMETERS { + // + // capDescriptor is a file descriptor for unix RM clients, but a void + // pointer for windows RM clients. + // + // capDescriptor is transparent to RM clients i.e. RM's user-mode shim + // populates this field on behalf of clients. + // + NV_DECLARE_ALIGNED(NvU64 capDescriptor, 8); +} NVB0CD_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clb0ce.h b/userspace/sdks/nv570/inc/class/clb0ce.h new file mode 100644 index 0000000..5371cc9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb0ce.h @@ -0,0 +1,53 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clb0ce.finn +// + +#define PROFILER_CONTEXT_EVENT (0xb0ceU) /* finn: Evaluated from "NVB0CE_ALLOC_PARAMETERS_MESSAGE_ID" */ + +#define NVB0CE_ALLOC_PARAMETERS_MESSAGE_ID (0xb0ceU) + +typedef struct NVB0CE_ALLOC_PARAMETERS { + // + // capDescriptor is a file descriptor for unix RM clients, but a void + // pointer for windows RM clients. + // + // capDescriptor is transparent to RM clients i.e. RM's user-mode shim + // populates this field on behalf of clients. + // + NV_DECLARE_ALIGNED(NvU64 capDescriptor, 8); + // + // When set to TRUE, this parameter indicates that the client aquires + // a file descriptor that correspond with PROFILER_DEVICE_EVENT instead + // of PROFILER_CONTEXT_EVENT. + // + NvBool bIsDeviceEventCap; +} NVB0CE_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clb197.h b/userspace/sdks/nv570/inc/class/clb197.h new file mode 100644 index 0000000..f8c976c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb197.h @@ -0,0 +1,4160 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_maxwell_b_h_ +#define _cl_maxwell_b_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl maxwell_b */ + +#include "nvtypes.h" + +#define MAXWELL_B 0xB197 + +#define NVB197_SET_OBJECT 0x0000 +#define NVB197_SET_OBJECT_CLASS_ID 15:0 +#define NVB197_SET_OBJECT_ENGINE_ID 20:16 + +#define NVB197_NO_OPERATION 0x0100 +#define NVB197_NO_OPERATION_V 31:0 + +#define NVB197_SET_NOTIFY_A 0x0104 +#define NVB197_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVB197_SET_NOTIFY_B 0x0108 +#define NVB197_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVB197_NOTIFY 0x010c +#define NVB197_NOTIFY_TYPE 31:0 +#define NVB197_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVB197_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVB197_WAIT_FOR_IDLE 0x0110 +#define NVB197_WAIT_FOR_IDLE_V 31:0 + +#define NVB197_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVB197_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVB197_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVB197_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVB197_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVB197_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVB197_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVB197_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVB197_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVB197_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVB197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVB197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVB197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVB197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVB197_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVB197_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVB197_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVB197_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVB197_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVB197_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVB197_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVB197_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVB197_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVB197_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVB197_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVB197_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVB197_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVB197_SEND_GO_IDLE 0x013c +#define NVB197_SEND_GO_IDLE_V 31:0 + +#define NVB197_PM_TRIGGER 0x0140 +#define NVB197_PM_TRIGGER_V 31:0 + +#define NVB197_PM_TRIGGER_WFI 0x0144 +#define NVB197_PM_TRIGGER_WFI_V 31:0 + +#define NVB197_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVB197_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVB197_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVB197_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVB197_LINE_LENGTH_IN 0x0180 +#define NVB197_LINE_LENGTH_IN_VALUE 31:0 + +#define NVB197_LINE_COUNT 0x0184 +#define NVB197_LINE_COUNT_VALUE 31:0 + +#define NVB197_OFFSET_OUT_UPPER 0x0188 +#define NVB197_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVB197_OFFSET_OUT 0x018c +#define NVB197_OFFSET_OUT_VALUE 31:0 + +#define NVB197_PITCH_OUT 0x0190 +#define NVB197_PITCH_OUT_VALUE 31:0 + +#define NVB197_SET_DST_BLOCK_SIZE 0x0194 +#define NVB197_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVB197_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVB197_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVB197_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVB197_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVB197_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB197_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB197_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB197_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB197_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVB197_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVB197_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVB197_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVB197_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVB197_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVB197_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVB197_SET_DST_WIDTH 0x0198 +#define NVB197_SET_DST_WIDTH_V 31:0 + +#define NVB197_SET_DST_HEIGHT 0x019c +#define NVB197_SET_DST_HEIGHT_V 31:0 + +#define NVB197_SET_DST_DEPTH 0x01a0 +#define NVB197_SET_DST_DEPTH_V 31:0 + +#define NVB197_SET_DST_LAYER 0x01a4 +#define NVB197_SET_DST_LAYER_V 31:0 + +#define NVB197_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVB197_SET_DST_ORIGIN_BYTES_X_V 19:0 + +#define NVB197_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVB197_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 + +#define NVB197_LAUNCH_DMA 0x01b0 +#define NVB197_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVB197_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVB197_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVB197_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVB197_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVB197_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVB197_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVB197_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVB197_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVB197_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVB197_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVB197_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVB197_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVB197_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVB197_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVB197_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVB197_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVB197_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVB197_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVB197_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVB197_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVB197_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVB197_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVB197_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVB197_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVB197_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVB197_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVB197_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVB197_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVB197_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVB197_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVB197_LOAD_INLINE_DATA 0x01b4 +#define NVB197_LOAD_INLINE_DATA_V 31:0 + +#define NVB197_SET_I2M_SEMAPHORE_A 0x01dc +#define NVB197_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVB197_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVB197_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVB197_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVB197_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVB197_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVB197_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVB197_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVB197_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVB197_SET_I2M_SPARE_NOOP03 0x01fc +#define NVB197_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVB197_RUN_DS_NOW 0x0200 +#define NVB197_RUN_DS_NOW_V 31:0 + +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVB197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVB197_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVB197_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVB197_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVB197_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVB197_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVB197_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVB197_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVB197_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_GS_DM_FIFO 0x0214 +#define NVB197_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVB197_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVB197_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVB197_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVB197_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB197_INVALIDATE_SHADER_CACHES 0x021c +#define NVB197_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVB197_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVB197_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVB197_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVB197_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVB197_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVB197_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVB197_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVB197_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVB197_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVB197_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVB197_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVB197_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVB197_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVB197_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVB197_INCREMENT_SYNC_POINT 0x02c8 +#define NVB197_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVB197_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVB197_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVB197_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVB197_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVB197_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVB197_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVB197_SET_PRIM_CIRCULAR_BUFFER_THROTTLE 0x02d0 +#define NVB197_SET_PRIM_CIRCULAR_BUFFER_THROTTLE_PRIM_AREA 21:0 + +#define NVB197_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVB197_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVB197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVB197_DECOMPRESS_SURFACE 0x02e0 +#define NVB197_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVB197_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVB197_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVB197_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVB197_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVB197_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVB197_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVB197_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVB197_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVB197_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVB197_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVB197_SET_ZCULL_SUBREGION 0x02e8 +#define NVB197_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVB197_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVB197_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVB197_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVB197_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVB197_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVB197_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVB197_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVB197_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVB197_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVB197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVB197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVB197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVB197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVB197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVB197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVB197_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVB197_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVB197_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVB197_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVB197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVB197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVB197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVB197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVB197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVB197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVB197_DRAW_ZERO_INDEX 0x0304 +#define NVB197_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVB197_SET_L1_CONFIGURATION 0x0308 +#define NVB197_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVB197_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVB197_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVB197_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVB197_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVB197_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVB197_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVB197_SET_SPA_VERSION 0x0310 +#define NVB197_SET_SPA_VERSION_MINOR 7:0 +#define NVB197_SET_SPA_VERSION_MAJOR 15:8 + +#define NVB197_SET_IEEE_CLEAN_UPDATE 0x0314 +#define NVB197_SET_IEEE_CLEAN_UPDATE_ENABLE 0:0 +#define NVB197_SET_IEEE_CLEAN_UPDATE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_IEEE_CLEAN_UPDATE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_SNAP_GRID_LINE 0x0318 +#define NVB197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVB197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVB197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVB197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVB197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVB197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVB197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVB197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVB197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVB197_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVB197_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVB197_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVB197_SET_SNAP_GRID_NON_LINE 0x031c +#define NVB197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVB197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVB197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVB197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVB197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVB197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVB197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVB197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVB197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVB197_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVB197_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVB197_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVB197_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVB197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVB197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVB197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVB197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVB197_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVB197_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVB197_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVB197_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVB197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVB197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVB197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVB197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVB197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVB197_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVB197_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVB197_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVB197_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVB197_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVB197_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVB197_SET_TESSELLATION_LOD_V1 0x0330 +#define NVB197_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVB197_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVB197_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVB197_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVB197_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVB197_RESERVED_TG07 0x033c +#define NVB197_RESERVED_TG07_V 0:0 + +#define NVB197_RESERVED_TG08 0x0340 +#define NVB197_RESERVED_TG08_V 0:0 + +#define NVB197_RESERVED_TG09 0x0344 +#define NVB197_RESERVED_TG09_V 0:0 + +#define NVB197_RESERVED_TG10 0x0348 +#define NVB197_RESERVED_TG10_V 0:0 + +#define NVB197_RESERVED_TG11 0x034c +#define NVB197_RESERVED_TG11_V 0:0 + +#define NVB197_RESERVED_TG12 0x0350 +#define NVB197_RESERVED_TG12_V 0:0 + +#define NVB197_RESERVED_TG13 0x0354 +#define NVB197_RESERVED_TG13_V 0:0 + +#define NVB197_RESERVED_TG14 0x0358 +#define NVB197_RESERVED_TG14_V 0:0 + +#define NVB197_RESERVED_TG15 0x035c +#define NVB197_RESERVED_TG15_V 0:0 + +#define NVB197_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVB197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVB197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVB197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVB197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVB197_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVB197_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVB197_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVB197_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVB197_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVB197_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVB197_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVB197_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVB197_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVB197_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVB197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVB197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVB197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVB197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVB197_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVB197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVB197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVB197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVB197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVB197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVB197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVB197_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVB197_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVB197_SET_RASTER_ENABLE 0x037c +#define NVB197_SET_RASTER_ENABLE_V 0:0 +#define NVB197_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVB197_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVB197_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVB197_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVB197_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVB197_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVB197_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVB197_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVB197_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVB197_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVB197_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVB197_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVB197_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVB197_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVB197_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVB197_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVB197_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVB197_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVB197_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVB197_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVB197_SET_RASTER_INPUT 0x0740 +#define NVB197_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVB197_SET_STREAM_OUTPUT 0x0744 +#define NVB197_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVB197_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVB197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVB197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_ALPHA_FRACTION 0x074c +#define NVB197_SET_ALPHA_FRACTION_V 7:0 + +#define NVB197_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVB197_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVB197_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVB197_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVB197_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 +#define NVB197_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES_EXTENDED 5:5 + +#define NVB197_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVB197_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVB197_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVB197_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVB197_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVB197_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVB197_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVB197_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVB197_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVB197_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVB197_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVB197_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVB197_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVB197_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVB197_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVB197_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVB197_SET_ISBE_SAVE_RESTORE_PROGRAM 0x07ac +#define NVB197_SET_ISBE_SAVE_RESTORE_PROGRAM_OFFSET 31:0 + +#define NVB197_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVB197_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVB197_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVB197_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVB197_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVB197_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVB197_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVB197_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVB197_SET_CULL_BEFORE_FETCH 0x07dc +#define NVB197_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVB197_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVB197_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVB197_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVB197_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVB197_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVB197_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVB197_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVB197_SET_ZCULL_STORAGE_A 0x07e8 +#define NVB197_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVB197_SET_ZCULL_STORAGE_B 0x07ec +#define NVB197_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVB197_SET_ZCULL_STORAGE_C 0x07f0 +#define NVB197_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVB197_SET_ZCULL_STORAGE_D 0x07f4 +#define NVB197_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVB197_SET_ZT_READ_ONLY 0x07f8 +#define NVB197_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVB197_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVB197_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVB197_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVB197_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVB197_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVB197_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVB197_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVB197_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVB197_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVB197_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVB197_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVB197_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVB197_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVB197_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVB197_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVB197_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVB197_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVB197_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVB197_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVB197_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVB197_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVB197_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVB197_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVB197_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVB197_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVB197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVB197_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVB197_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVB197_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVB197_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVB197_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVB197_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVB197_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVB197_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVB197_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVB197_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVB197_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVB197_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVB197_SET_COLOR_TARGET_MARK(j) (0x0824+(j)*64) +#define NVB197_SET_COLOR_TARGET_MARK_IEEE_CLEAN 0:0 +#define NVB197_SET_COLOR_TARGET_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVB197_SET_COLOR_TARGET_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVB197_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVB197_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVB197_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVB197_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVB197_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVB197_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVB197_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVB197_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVB197_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVB197_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVB197_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVB197_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE(j) (0x0a18+(j)*32) +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_X 2:0 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X 0x00000000 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X 0x00000001 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y 0x00000002 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y 0x00000003 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z 0x00000004 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z 0x00000005 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W 0x00000006 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W 0x00000007 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y 6:4 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X 0x00000000 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X 0x00000001 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y 0x00000002 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y 0x00000003 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z 0x00000004 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z 0x00000005 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W 0x00000006 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W 0x00000007 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z 10:8 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X 0x00000000 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X 0x00000001 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y 0x00000002 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y 0x00000003 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z 0x00000004 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z 0x00000005 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W 0x00000006 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W 0x00000007 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_W 14:12 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X 0x00000000 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X 0x00000001 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y 0x00000002 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y 0x00000003 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z 0x00000004 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z 0x00000005 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W 0x00000006 +#define NVB197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W 0x00000007 + +#define NVB197_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(j) (0x0a1c+(j)*32) +#define NVB197_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_X_BITS 4:0 +#define NVB197_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_Y_BITS 12:8 + +#define NVB197_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVB197_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVB197_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVB197_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVB197_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVB197_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVB197_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVB197_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVB197_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVB197_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVB197_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVB197_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVB197_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVB197_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVB197_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVB197_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVB197_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVB197_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVB197_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVB197_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVB197_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVB197_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVB197_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVB197_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVB197_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVB197_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVB197_SET_STATISTICS_COUNTER 0x0d68 +#define NVB197_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVB197_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVB197_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVB197_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVB197_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVB197_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVB197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVB197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVB197_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVB197_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVB197_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVB197_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVB197_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVB197_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVB197_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVB197_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVB197_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVB197_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVB197_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVB197_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVB197_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVB197_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVB197_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVB197_SET_VERTEX_ARRAY_START 0x0d74 +#define NVB197_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVB197_DRAW_VERTEX_ARRAY 0x0d78 +#define NVB197_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVB197_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVB197_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVB197_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVB197_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVB197_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVB197_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVB197_SET_Z_CLEAR_VALUE 0x0d90 +#define NVB197_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVB197_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVB197_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVB197_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVB197_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVB197_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVB197_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVB197_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVB197_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVB197_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVB197_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVB197_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVB197_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVB197_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVB197_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVB197_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVB197_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVB197_SET_FRONT_POLYGON_MODE 0x0dac +#define NVB197_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVB197_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVB197_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVB197_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVB197_SET_BACK_POLYGON_MODE 0x0db0 +#define NVB197_SET_BACK_POLYGON_MODE_V 31:0 +#define NVB197_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVB197_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVB197_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVB197_SET_POLY_SMOOTH 0x0db4 +#define NVB197_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVB197_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVB197_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_ZT_MARK 0x0db8 +#define NVB197_SET_ZT_MARK_IEEE_CLEAN 0:0 +#define NVB197_SET_ZT_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVB197_SET_ZT_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVB197_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVB197_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVB197_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVB197_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVB197_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVB197_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVB197_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVB197_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVB197_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVB197_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVB197_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVB197_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVB197_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVB197_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVB197_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVB197_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVB197_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_PATCH 0x0dcc +#define NVB197_SET_PATCH_SIZE 7:0 + +#define NVB197_SET_ITERATED_BLEND 0x0dd0 +#define NVB197_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVB197_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVB197_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVB197_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVB197_SET_ZCULL_CRITERION 0x0dd8 +#define NVB197_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVB197_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVB197_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVB197_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVB197_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVB197_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVB197_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVB197_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVB197_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVB197_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVB197_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVB197_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVB197_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVB197_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVB197_SET_ZCULL_CRITERION_SREF 23:16 +#define NVB197_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVB197_PIXEL_SHADER_BARRIER 0x0de0 +#define NVB197_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVB197_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVB197_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVB197_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVB197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVB197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVB197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVB197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVB197_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVB197_SET_WINDOW_OFFSET_X 0x0df8 +#define NVB197_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVB197_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVB197_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVB197_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVB197_SET_SCISSOR_ENABLE_V 0:0 +#define NVB197_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVB197_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVB197_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVB197_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVB197_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVB197_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVB197_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVB197_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVB197_SET_SELECT_MAXWELL_TEXTURE_HEADERS 0x0f10 +#define NVB197_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V 0:0 +#define NVB197_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE 0x00000000 +#define NVB197_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE 0x00000001 + +#define NVB197_SET_VPC_PERF_KNOB 0x0f14 +#define NVB197_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVB197_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVB197_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVB197_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVB197_PM_LOCAL_TRIGGER 0x0f18 +#define NVB197_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVB197_SET_POST_Z_PS_IMASK 0x0f1c +#define NVB197_SET_POST_Z_PS_IMASK_ENABLE 0:0 +#define NVB197_SET_POST_Z_PS_IMASK_ENABLE_FALSE 0x00000000 +#define NVB197_SET_POST_Z_PS_IMASK_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVB197_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVB197_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVB197_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVB197_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVB197_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVB197_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVB197_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVB197_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVB197_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVB197_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVB197_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVB197_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVB197_SET_BACK_STENCIL_MASK 0x0f58 +#define NVB197_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVB197_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVB197_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVB197_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVB197_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVB197_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVB197_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVB197_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVB197_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVB197_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVB197_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVB197_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVB197_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVB197_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVB197_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVB197_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVB197_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVB197_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVB197_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVB197_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVB197_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVB197_SET_SAMPLE_MASK 0x0fa4 +#define NVB197_SET_SAMPLE_MASK_RASTER_OUT_ENABLE 0:0 +#define NVB197_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE 0x00000001 +#define NVB197_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE 4:4 +#define NVB197_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE 0x00000000 +#define NVB197_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_COLOR_TARGET_SAMPLE_MASK 0x0fa8 +#define NVB197_SET_COLOR_TARGET_SAMPLE_MASK_V 15:0 + +#define NVB197_SET_CT_MRT_ENABLE 0x0fac +#define NVB197_SET_CT_MRT_ENABLE_V 0:0 +#define NVB197_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVB197_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVB197_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVB197_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVB197_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVB197_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVB197_SET_TIR 0x0fb4 +#define NVB197_SET_TIR_MODE 1:0 +#define NVB197_SET_TIR_MODE_DISABLED 0x00000000 +#define NVB197_SET_TIR_MODE_RASTER_N_TARGET_M 0x00000001 + +#define NVB197_SET_ANTI_ALIAS_RASTER 0x0fb8 +#define NVB197_SET_ANTI_ALIAS_RASTER_SAMPLES 2:0 +#define NVB197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1 0x00000000 +#define NVB197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2 0x00000002 +#define NVB197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVB197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVB197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4 0x00000006 + +#define NVB197_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVB197_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVB197_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVB197_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVB197_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVB197_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVB197_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVB197_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVB197_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVB197_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVB197_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_TIR_MODULATION 0x0fd4 +#define NVB197_SET_TIR_MODULATION_COMPONENT_SELECT 1:0 +#define NVB197_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION 0x00000000 +#define NVB197_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB 0x00000001 +#define NVB197_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY 0x00000002 +#define NVB197_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA 0x00000003 + +#define NVB197_SET_TIR_MODULATION_FUNCTION 0x0fd8 +#define NVB197_SET_TIR_MODULATION_FUNCTION_SELECT 0:0 +#define NVB197_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR 0x00000000 +#define NVB197_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE 0x00000001 + +#define NVB197_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVB197_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVB197_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVB197_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVB197_SET_ZT_A 0x0fe0 +#define NVB197_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_ZT_B 0x0fe4 +#define NVB197_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_ZT_FORMAT 0x0fe8 +#define NVB197_SET_ZT_FORMAT_V 4:0 +#define NVB197_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVB197_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVB197_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVB197_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVB197_SET_ZT_FORMAT_V_S8 0x00000017 +#define NVB197_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVB197_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVB197_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVB197_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVB197_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVB197_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVB197_SET_ZT_BLOCK_SIZE 0x0fec +#define NVB197_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVB197_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVB197_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVB197_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVB197_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVB197_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB197_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB197_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB197_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB197_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVB197_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVB197_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVB197_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVB197_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVB197_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVB197_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVB197_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVB197_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVB197_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVB197_SET_TILED_CACHE_BUNDLE_CONTROL 0x0ffc +#define NVB197_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT 0:0 +#define NVB197_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_FALSE 0x00000000 +#define NVB197_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_TRUE 0x00000001 + +#define NVB197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB197_SET_VIEWPORT_MULTICAST 0x1004 +#define NVB197_SET_VIEWPORT_MULTICAST_ORDER 0:0 +#define NVB197_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER 0x00000000 +#define NVB197_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER 0x00000001 + +#define NVB197_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVB197_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVB197_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVB197_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVB197_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVB197_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVB197_SET_RESERVED_SW_METHOD00 0x1014 +#define NVB197_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVB197_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVB197_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVB197_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVB197_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVB197_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVB197_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVB197_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVB197_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVB197_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_RESERVED_SW_METHOD01 0x1028 +#define NVB197_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD02 0x102c +#define NVB197_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVB197_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) (0x1030+(i)*4) +#define NVB197_SET_TIR_MODULATION_COEFFICIENT_TABLE_V0 7:0 +#define NVB197_SET_TIR_MODULATION_COEFFICIENT_TABLE_V1 15:8 +#define NVB197_SET_TIR_MODULATION_COEFFICIENT_TABLE_V2 23:16 +#define NVB197_SET_TIR_MODULATION_COEFFICIENT_TABLE_V3 31:24 + +#define NVB197_SET_SPARE_NOOP01 0x1044 +#define NVB197_SET_SPARE_NOOP01_V 31:0 + +#define NVB197_SET_SPARE_NOOP02 0x1048 +#define NVB197_SET_SPARE_NOOP02_V 31:0 + +#define NVB197_SET_SPARE_NOOP03 0x104c +#define NVB197_SET_SPARE_NOOP03_V 31:0 + +#define NVB197_SET_SPARE_NOOP04 0x1050 +#define NVB197_SET_SPARE_NOOP04_V 31:0 + +#define NVB197_SET_SPARE_NOOP05 0x1054 +#define NVB197_SET_SPARE_NOOP05_V 31:0 + +#define NVB197_SET_SPARE_NOOP06 0x1058 +#define NVB197_SET_SPARE_NOOP06_V 31:0 + +#define NVB197_SET_SPARE_NOOP07 0x105c +#define NVB197_SET_SPARE_NOOP07_V 31:0 + +#define NVB197_SET_SPARE_NOOP08 0x1060 +#define NVB197_SET_SPARE_NOOP08_V 31:0 + +#define NVB197_SET_SPARE_NOOP09 0x1064 +#define NVB197_SET_SPARE_NOOP09_V 31:0 + +#define NVB197_SET_SPARE_NOOP10 0x1068 +#define NVB197_SET_SPARE_NOOP10_V 31:0 + +#define NVB197_SET_SPARE_NOOP11 0x106c +#define NVB197_SET_SPARE_NOOP11_V 31:0 + +#define NVB197_SET_SPARE_NOOP12 0x1070 +#define NVB197_SET_SPARE_NOOP12_V 31:0 + +#define NVB197_SET_SPARE_NOOP13 0x1074 +#define NVB197_SET_SPARE_NOOP13_V 31:0 + +#define NVB197_SET_SPARE_NOOP14 0x1078 +#define NVB197_SET_SPARE_NOOP14_V 31:0 + +#define NVB197_SET_SPARE_NOOP15 0x107c +#define NVB197_SET_SPARE_NOOP15_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVB197_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVB197_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVB197_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD06 0x10bc +#define NVB197_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVB197_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVB197_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVB197_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVB197_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVB197_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVB197_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVB197_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD13 0x10dc +#define NVB197_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVB197_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVB197_UNBIND_ALL 0x10f4 +#define NVB197_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVB197_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVB197_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVB197_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVB197_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB197_SET_RESERVED_SW_METHOD14 0x1100 +#define NVB197_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVB197_SET_RESERVED_SW_METHOD15 0x1104 +#define NVB197_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVB197_NO_OPERATION_DATA_HI 0x110c +#define NVB197_NO_OPERATION_DATA_HI_V 31:0 + +#define NVB197_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVB197_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVB197_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVB197_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVB197_PM_TRIGGER_END 0x1114 +#define NVB197_PM_TRIGGER_END_V 31:0 + +#define NVB197_SET_VERTEX_ID_BASE 0x1118 +#define NVB197_SET_VERTEX_ID_BASE_V 31:0 + +#define NVB197_SET_STENCIL_COMPRESSION 0x111c +#define NVB197_SET_STENCIL_COMPRESSION_ENABLE 0:0 +#define NVB197_SET_STENCIL_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STENCIL_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVB197_SET_TIR_CONTROL 0x1130 +#define NVB197_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES 0:0 +#define NVB197_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVB197_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVB197_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES 4:4 +#define NVB197_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVB197_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVB197_SET_TIR_CONTROL_REDUCE_COVERAGE 1:1 +#define NVB197_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE 0x00000000 +#define NVB197_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE 0x00000001 + +#define NVB197_SET_MUTABLE_METHOD_CONTROL 0x1134 +#define NVB197_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT 0:0 +#define NVB197_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE 0x00000000 +#define NVB197_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE 0x00000001 + +#define NVB197_SET_POST_PS_INITIAL_COVERAGE 0x1138 +#define NVB197_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE 0:0 +#define NVB197_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE 0x00000000 +#define NVB197_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE 0x00000001 + +#define NVB197_SET_FILL_VIA_TRIANGLE 0x113c +#define NVB197_SET_FILL_VIA_TRIANGLE_MODE 1:0 +#define NVB197_SET_FILL_VIA_TRIANGLE_MODE_DISABLED 0x00000000 +#define NVB197_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL 0x00000001 +#define NVB197_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX 0x00000002 + +#define NVB197_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVB197_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVB197_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVB197_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVB197_FLUSH_PENDING_WRITES 0x1144 +#define NVB197_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVB197_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVB197_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVB197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVB197_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVB197_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVB197_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVB197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVB197_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVB197_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) (0x11e0+(i)*4) +#define NVB197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X0 3:0 +#define NVB197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y0 7:4 +#define NVB197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X1 11:8 +#define NVB197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y1 15:12 +#define NVB197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X2 19:16 +#define NVB197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y2 23:20 +#define NVB197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X3 27:24 +#define NVB197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y3 31:28 + +#define NVB197_SET_OFFSET_RENDER_TARGET_INDEX 0x11f0 +#define NVB197_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX 0:0 +#define NVB197_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE 0x00000000 +#define NVB197_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE 0x00000001 + +#define NVB197_FORCE_HEAVYWEIGHT_METHOD_SYNC 0x11f4 +#define NVB197_FORCE_HEAVYWEIGHT_METHOD_SYNC_V 31:0 + +#define NVB197_SET_COVERAGE_TO_COLOR 0x11f8 +#define NVB197_SET_COVERAGE_TO_COLOR_ENABLE 0:0 +#define NVB197_SET_COVERAGE_TO_COLOR_ENABLE_FALSE 0x00000000 +#define NVB197_SET_COVERAGE_TO_COLOR_ENABLE_TRUE 0x00000001 +#define NVB197_SET_COVERAGE_TO_COLOR_CT_SELECT 6:4 + +#define NVB197_DECOMPRESS_ZETA_SURFACE 0x11fc +#define NVB197_DECOMPRESS_ZETA_SURFACE_Z_ENABLE 0:0 +#define NVB197_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVB197_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVB197_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE 4:4 +#define NVB197_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVB197_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_ZT_SPARSE 0x1208 +#define NVB197_SET_ZT_SPARSE_ENABLE 0:0 +#define NVB197_SET_ZT_SPARSE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZT_SPARSE_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ZT_SPARSE_UNMAPPED_COMPARE 1:1 +#define NVB197_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 0x00000000 +#define NVB197_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS 0x00000001 + +#define NVB197_INVALIDATE_SAMPLER_CACHE_ALL 0x120c +#define NVB197_INVALIDATE_SAMPLER_CACHE_ALL_V 0:0 + +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_ALL 0x1210 +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_ALL_V 0:0 + +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVB197_SET_CT_SELECT 0x121c +#define NVB197_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVB197_SET_CT_SELECT_TARGET0 6:4 +#define NVB197_SET_CT_SELECT_TARGET1 9:7 +#define NVB197_SET_CT_SELECT_TARGET2 12:10 +#define NVB197_SET_CT_SELECT_TARGET3 15:13 +#define NVB197_SET_CT_SELECT_TARGET4 18:16 +#define NVB197_SET_CT_SELECT_TARGET5 21:19 +#define NVB197_SET_CT_SELECT_TARGET6 24:22 +#define NVB197_SET_CT_SELECT_TARGET7 27:25 + +#define NVB197_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVB197_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL 0x1224 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE 1:0 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT 0x00000000 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE 0x00000001 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL 0x00000002 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE 2:2 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 0x00000000 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 0x00000001 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER 3:3 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED 0x00000000 +#define NVB197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED 0x00000001 + +#define NVB197_SET_ZT_SIZE_A 0x1228 +#define NVB197_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVB197_SET_ZT_SIZE_B 0x122c +#define NVB197_SET_ZT_SIZE_B_HEIGHT 16:0 + +#define NVB197_SET_ZT_SIZE_C 0x1230 +#define NVB197_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVB197_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVB197_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVB197_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVB197_SET_SAMPLER_BINDING 0x1234 +#define NVB197_SET_SAMPLER_BINDING_V 0:0 +#define NVB197_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVB197_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVB197_DRAW_AUTO 0x123c +#define NVB197_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVB197_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) (0x1240+(i)*4) +#define NVB197_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK_V 31:0 + +#define NVB197_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE 0x1260 +#define NVB197_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_INDEX 7:0 +#define NVB197_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_VALUE 23:8 + +#define NVB197_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVB197_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVB197_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVB197_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVB197_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB197_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVB197_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVB197_CLEAR_ZCULL_REGION 0x12c8 +#define NVB197_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVB197_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVB197_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVB197_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVB197_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVB197_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVB197_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVB197_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVB197_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVB197_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVB197_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVB197_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVB197_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVB197_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVB197_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVB197_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVB197_SET_DEPTH_TEST 0x12cc +#define NVB197_SET_DEPTH_TEST_ENABLE 0:0 +#define NVB197_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVB197_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_FILL_MODE 0x12d0 +#define NVB197_SET_FILL_MODE_V 31:0 +#define NVB197_SET_FILL_MODE_V_POINT 0x00000001 +#define NVB197_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVB197_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVB197_SET_SHADE_MODE 0x12d4 +#define NVB197_SET_SHADE_MODE_V 31:0 +#define NVB197_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVB197_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVB197_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVB197_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVB197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVB197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVB197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVB197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVB197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVB197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVB197_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVB197_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVB197_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVB197_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_DEPTH_WRITE 0x12e8 +#define NVB197_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVB197_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_ALPHA_TEST 0x12ec +#define NVB197_SET_ALPHA_TEST_ENABLE 0:0 +#define NVB197_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVB197_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVB197_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVB197_DRAW_INLINE_INDEX4X8 0x1304 +#define NVB197_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVB197_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVB197_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVB197_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVB197_D3D_SET_CULL_MODE 0x1308 +#define NVB197_D3D_SET_CULL_MODE_V 31:0 +#define NVB197_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVB197_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVB197_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVB197_SET_DEPTH_FUNC 0x130c +#define NVB197_SET_DEPTH_FUNC_V 31:0 +#define NVB197_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVB197_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVB197_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVB197_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVB197_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVB197_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVB197_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVB197_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVB197_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVB197_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVB197_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVB197_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVB197_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVB197_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVB197_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVB197_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVB197_SET_ALPHA_REF 0x1310 +#define NVB197_SET_ALPHA_REF_V 31:0 + +#define NVB197_SET_ALPHA_FUNC 0x1314 +#define NVB197_SET_ALPHA_FUNC_V 31:0 +#define NVB197_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVB197_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVB197_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVB197_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVB197_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVB197_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVB197_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVB197_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVB197_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVB197_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVB197_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVB197_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVB197_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVB197_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVB197_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVB197_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVB197_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVB197_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVB197_SET_BLEND_CONST_RED 0x131c +#define NVB197_SET_BLEND_CONST_RED_V 31:0 + +#define NVB197_SET_BLEND_CONST_GREEN 0x1320 +#define NVB197_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVB197_SET_BLEND_CONST_BLUE 0x1324 +#define NVB197_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVB197_SET_BLEND_CONST_ALPHA 0x1328 +#define NVB197_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVB197_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVB197_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVB197_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVB197_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVB197_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVB197_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVB197_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVB197_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVB197_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVB197_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_BLEND_COLOR_OP 0x1340 +#define NVB197_SET_BLEND_COLOR_OP_V 31:0 +#define NVB197_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVB197_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVB197_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVB197_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVB197_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVB197_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVB197_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVB197_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVB197_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVB197_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB197_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB197_SET_BLEND_ALPHA_OP 0x134c +#define NVB197_SET_BLEND_ALPHA_OP_V 31:0 +#define NVB197_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVB197_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVB197_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVB197_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVB197_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVB197_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVB197_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVB197_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVB197_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVB197_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB197_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVB197_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVB197_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVB197_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB197_SET_SINGLE_ROP_CONTROL 0x135c +#define NVB197_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVB197_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVB197_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_BLEND(i) (0x1360+(i)*4) +#define NVB197_SET_BLEND_ENABLE 0:0 +#define NVB197_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVB197_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_STENCIL_TEST 0x1380 +#define NVB197_SET_STENCIL_TEST_ENABLE 0:0 +#define NVB197_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVB197_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_STENCIL_OP_FAIL 0x1384 +#define NVB197_SET_STENCIL_OP_FAIL_V 31:0 +#define NVB197_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVB197_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVB197_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVB197_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVB197_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVB197_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVB197_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVB197_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVB197_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVB197_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVB197_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVB197_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVB197_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVB197_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVB197_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVB197_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVB197_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVB197_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVB197_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVB197_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVB197_SET_STENCIL_OP_ZPASS 0x138c +#define NVB197_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVB197_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVB197_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVB197_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVB197_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVB197_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVB197_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVB197_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVB197_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVB197_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVB197_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVB197_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVB197_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVB197_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVB197_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVB197_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVB197_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVB197_SET_STENCIL_FUNC 0x1390 +#define NVB197_SET_STENCIL_FUNC_V 31:0 +#define NVB197_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVB197_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVB197_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVB197_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVB197_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVB197_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVB197_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVB197_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVB197_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVB197_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVB197_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVB197_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVB197_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVB197_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVB197_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVB197_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVB197_SET_STENCIL_FUNC_REF 0x1394 +#define NVB197_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVB197_SET_STENCIL_FUNC_MASK 0x1398 +#define NVB197_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVB197_SET_STENCIL_MASK 0x139c +#define NVB197_SET_STENCIL_MASK_V 7:0 + +#define NVB197_SET_DRAW_AUTO_START 0x13a4 +#define NVB197_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVB197_SET_PS_SATURATE 0x13a8 +#define NVB197_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVB197_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVB197_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB197_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVB197_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVB197_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB197_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVB197_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVB197_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB197_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVB197_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVB197_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB197_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVB197_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVB197_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB197_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVB197_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVB197_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB197_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVB197_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVB197_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVB197_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVB197_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVB197_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVB197_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVB197_SET_WINDOW_ORIGIN 0x13ac +#define NVB197_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVB197_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVB197_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVB197_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVB197_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVB197_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVB197_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVB197_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVB197_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVB197_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVB197_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVB197_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVB197_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_ALPHA_HYSTERESIS 0x1420 +#define NVB197_SET_ALPHA_HYSTERESIS_ROUNDS_OF_ALPHA 7:0 + +#define NVB197_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVB197_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVB197_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB197_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB197_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVB197_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVB197_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVB197_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVB197_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVB197_SET_PS_WARP_WATERMARKS 0x1450 +#define NVB197_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVB197_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVB197_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVB197_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVB197_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVB197_STORE_ZCULL 0x1464 +#define NVB197_STORE_ZCULL_V 0:0 + +#define NVB197_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVB197_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVB197_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVB197_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVB197_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVB197_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVB197_LOAD_ZCULL 0x1500 +#define NVB197_LOAD_ZCULL_V 0:0 + +#define NVB197_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVB197_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVB197_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVB197_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVB197_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVB197_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVB197_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVB197_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVB197_SET_USER_CLIP_ENABLE 0x1510 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVB197_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVB197_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVB197_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVB197_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_POINT_SIZE 0x1518 +#define NVB197_SET_POINT_SIZE_V 31:0 + +#define NVB197_SET_ZCULL_STATS 0x151c +#define NVB197_SET_ZCULL_STATS_ENABLE 0:0 +#define NVB197_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_POINT_SPRITE 0x1520 +#define NVB197_SET_POINT_SPRITE_ENABLE 0:0 +#define NVB197_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_SHADER_EXCEPTIONS 0x1528 +#define NVB197_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVB197_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVB197_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVB197_CLEAR_REPORT_VALUE 0x1530 +#define NVB197_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVB197_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVB197_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVB197_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVB197_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVB197_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVB197_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVB197_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 + +#define NVB197_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVB197_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVB197_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVB197_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVB197_SET_ZT_SELECT 0x1538 +#define NVB197_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVB197_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVB197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVB197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVB197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVB197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVB197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVB197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVB197_SET_RENDER_ENABLE_A 0x1550 +#define NVB197_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_RENDER_ENABLE_B 0x1554 +#define NVB197_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_RENDER_ENABLE_C 0x1558 +#define NVB197_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVB197_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVB197_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVB197_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVB197_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVB197_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVB197_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVB197_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVB197_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVB197_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVB197_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVB197_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVB197_SET_ANTI_ALIASED_LINE 0x1570 +#define NVB197_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVB197_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_TEX_HEADER_POOL_A 0x1574 +#define NVB197_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_TEX_HEADER_POOL_B 0x1578 +#define NVB197_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_TEX_HEADER_POOL_C 0x157c +#define NVB197_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVB197_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVB197_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVB197_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVB197_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVB197_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVB197_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVB197_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVB197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVB197_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVB197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVB197_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVB197_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVB197_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVB197_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVB197_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVB197_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVB197_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVB197_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVB197_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVB197_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVB197_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVB197_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVB197_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVB197_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVB197_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVB197_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVB197_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVB197_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVB197_SET_SRGB_WRITE 0x15b8 +#define NVB197_SET_SRGB_WRITE_ENABLE 0:0 +#define NVB197_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_DEPTH_BIAS 0x15bc +#define NVB197_SET_DEPTH_BIAS_V 31:0 + +#define NVB197_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVB197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVB197_SET_RT_LAYER 0x15cc +#define NVB197_SET_RT_LAYER_V 15:0 +#define NVB197_SET_RT_LAYER_CONTROL 16:16 +#define NVB197_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVB197_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVB197_SET_ANTI_ALIAS 0x15d0 +#define NVB197_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVB197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVB197_SET_EDGE_FLAG 0x15e4 +#define NVB197_SET_EDGE_FLAG_V 0:0 +#define NVB197_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVB197_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVB197_DRAW_INLINE_INDEX 0x15e8 +#define NVB197_DRAW_INLINE_INDEX_V 31:0 + +#define NVB197_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVB197_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVB197_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVB197_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVB197_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVB197_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVB197_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVB197_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVB197_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVB197_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVB197_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVB197_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVB197_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVB197_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVB197_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVB197_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVB197_SET_POINT_SPRITE_SELECT 0x1604 +#define NVB197_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVB197_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVB197_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVB197_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVB197_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVB197_SET_PROGRAM_REGION_A 0x1608 +#define NVB197_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVB197_SET_PROGRAM_REGION_B 0x160c +#define NVB197_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVB197_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVB197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVB197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVB197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVB197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVB197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVB197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVB197_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVB197_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVB197_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVB197_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVB197_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVB197_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVB197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVB197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVB197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVB197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVB197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVB197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVB197_END 0x1614 +#define NVB197_END_V 0:0 + +#define NVB197_BEGIN 0x1618 +#define NVB197_BEGIN_OP 15:0 +#define NVB197_BEGIN_OP_POINTS 0x00000000 +#define NVB197_BEGIN_OP_LINES 0x00000001 +#define NVB197_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVB197_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVB197_BEGIN_OP_TRIANGLES 0x00000004 +#define NVB197_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVB197_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVB197_BEGIN_OP_QUADS 0x00000007 +#define NVB197_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVB197_BEGIN_OP_POLYGON 0x00000009 +#define NVB197_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVB197_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVB197_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_BEGIN_OP_PATCH 0x0000000E +#define NVB197_BEGIN_PRIMITIVE_ID 24:24 +#define NVB197_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVB197_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVB197_BEGIN_INSTANCE_ID 27:26 +#define NVB197_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVB197_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVB197_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVB197_BEGIN_SPLIT_MODE 30:29 +#define NVB197_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVB197_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVB197_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVB197_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 + +#define NVB197_SET_VERTEX_ID_COPY 0x161c +#define NVB197_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVB197_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVB197_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVB197_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVB197_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVB197_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVB197_LOAD_PRIMITIVE_ID 0x1624 +#define NVB197_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVB197_SET_SHADER_BASED_CULL 0x162c +#define NVB197_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVB197_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVB197_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVB197_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVB197_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVB197_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_CLASS_VERSION 0x1638 +#define NVB197_SET_CLASS_VERSION_CURRENT 15:0 +#define NVB197_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB197_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVB197_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVB197_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVB197_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVB197_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVB197_SET_DA_OUTPUT 0x164c +#define NVB197_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVB197_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVB197_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVB197_SET_ANTI_ALIASED_POINT 0x1658 +#define NVB197_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVB197_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_POINT_CENTER_MODE 0x165c +#define NVB197_SET_POINT_CENTER_MODE_V 31:0 +#define NVB197_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVB197_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVB197_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVB197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVB197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVB197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVB197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVB197_SET_LINE_STIPPLE 0x166c +#define NVB197_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVB197_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVB197_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVB197_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVB197_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVB197_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVB197_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVB197_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVB197_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVB197_SET_PROVOKING_VERTEX 0x1684 +#define NVB197_SET_PROVOKING_VERTEX_V 0:0 +#define NVB197_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVB197_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVB197_SET_TWO_SIDED_LIGHT 0x1688 +#define NVB197_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVB197_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_POLYGON_STIPPLE 0x168c +#define NVB197_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVB197_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_SHADER_CONTROL 0x1690 +#define NVB197_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVB197_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVB197_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVB197_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVB197_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVB197_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVB197_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVB197_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVB197_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVB197_CHECK_CLASS_VERSION 0x16a0 +#define NVB197_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVB197_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB197_SET_SPH_VERSION 0x16a4 +#define NVB197_SET_SPH_VERSION_CURRENT 15:0 +#define NVB197_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB197_CHECK_SPH_VERSION 0x16a8 +#define NVB197_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVB197_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB197_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVB197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVB197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVB197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVB197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVB197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVB197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVB197_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVB197_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVB197_SET_AAM_VERSION 0x1790 +#define NVB197_SET_AAM_VERSION_CURRENT 15:0 +#define NVB197_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB197_CHECK_AAM_VERSION 0x1794 +#define NVB197_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVB197_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB197_SET_ZT_LAYER 0x179c +#define NVB197_SET_ZT_LAYER_OFFSET 15:0 + +#define NVB197_SET_INDEX_BUFFER_A 0x17c8 +#define NVB197_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVB197_SET_INDEX_BUFFER_B 0x17cc +#define NVB197_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVB197_SET_INDEX_BUFFER_C 0x17d0 +#define NVB197_SET_INDEX_BUFFER_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVB197_SET_INDEX_BUFFER_D 0x17d4 +#define NVB197_SET_INDEX_BUFFER_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVB197_SET_INDEX_BUFFER_E 0x17d8 +#define NVB197_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVB197_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVB197_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVB197_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVB197_SET_INDEX_BUFFER_F 0x17dc +#define NVB197_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVB197_DRAW_INDEX_BUFFER 0x17e0 +#define NVB197_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVB197_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVB197_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVB197_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVB197_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVB197_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVB197_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVB197_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVB197_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVB197_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVB197_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVB197_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVB197_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVB197_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVB197_OGL_SET_CULL 0x1918 +#define NVB197_OGL_SET_CULL_ENABLE 0:0 +#define NVB197_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVB197_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVB197_OGL_SET_FRONT_FACE 0x191c +#define NVB197_OGL_SET_FRONT_FACE_V 31:0 +#define NVB197_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVB197_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVB197_OGL_SET_CULL_FACE 0x1920 +#define NVB197_OGL_SET_CULL_FACE_V 31:0 +#define NVB197_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVB197_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVB197_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVB197_SET_VIEWPORT_PIXEL 0x1924 +#define NVB197_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVB197_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVB197_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVB197_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVB197_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVB197_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVB197_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP 0x00000006 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVB197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVB197_SET_USER_CLIP_OP 0x1940 +#define NVB197_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVB197_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVB197_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVB197_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVB197_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVB197_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVB197_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVB197_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVB197_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVB197_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVB197_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVB197_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVB197_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVB197_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVB197_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVB197_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVB197_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVB197_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVB197_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVB197_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVB197_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVB197_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVB197_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVB197_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVB197_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVB197_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVB197_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVB197_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVB197_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVB197_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVB197_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVB197_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVB197_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVB197_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVB197_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVB197_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVB197_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVB197_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVB197_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVB197_INVALIDATE_ZCULL 0x1958 +#define NVB197_INVALIDATE_ZCULL_V 31:0 +#define NVB197_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVB197_SET_ZCULL 0x1968 +#define NVB197_SET_ZCULL_Z_ENABLE 0:0 +#define NVB197_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVB197_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_ZCULL_BOUNDS 0x196c +#define NVB197_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVB197_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVB197_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVB197_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVB197_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVB197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVB197_ZCULL_SYNC 0x1978 +#define NVB197_ZCULL_SYNC_V 31:0 + +#define NVB197_SET_CLIP_ID_TEST 0x197c +#define NVB197_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVB197_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVB197_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVB197_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVB197_SET_CLIP_ID 0x1984 +#define NVB197_SET_CLIP_ID_V 31:0 + +#define NVB197_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVB197_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVB197_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVB197_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVB197_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVB197_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVB197_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVB197_SET_LOGIC_OP 0x19c4 +#define NVB197_SET_LOGIC_OP_ENABLE 0:0 +#define NVB197_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVB197_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_LOGIC_OP_FUNC 0x19c8 +#define NVB197_SET_LOGIC_OP_FUNC_V 31:0 +#define NVB197_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVB197_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVB197_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVB197_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVB197_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVB197_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVB197_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVB197_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVB197_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVB197_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVB197_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVB197_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVB197_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVB197_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVB197_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVB197_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVB197_SET_Z_COMPRESSION 0x19cc +#define NVB197_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVB197_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVB197_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVB197_CLEAR_SURFACE 0x19d0 +#define NVB197_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVB197_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVB197_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVB197_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVB197_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVB197_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVB197_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVB197_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVB197_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVB197_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVB197_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVB197_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVB197_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVB197_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVB197_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVB197_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVB197_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVB197_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVB197_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVB197_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVB197_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVB197_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVB197_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVB197_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVB197_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVB197_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVB197_SET_CT_WRITE_R_ENABLE 0:0 +#define NVB197_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVB197_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVB197_SET_CT_WRITE_G_ENABLE 4:4 +#define NVB197_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVB197_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVB197_SET_CT_WRITE_B_ENABLE 8:8 +#define NVB197_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVB197_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVB197_SET_CT_WRITE_A_ENABLE 12:12 +#define NVB197_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVB197_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVB197_PIPE_NOP 0x1a2c +#define NVB197_PIPE_NOP_V 31:0 + +#define NVB197_SET_SPARE00 0x1a30 +#define NVB197_SET_SPARE00_V 31:0 + +#define NVB197_SET_SPARE01 0x1a34 +#define NVB197_SET_SPARE01_V 31:0 + +#define NVB197_SET_SPARE02 0x1a38 +#define NVB197_SET_SPARE02_V 31:0 + +#define NVB197_SET_SPARE03 0x1a3c +#define NVB197_SET_SPARE03_V 31:0 + +#define NVB197_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVB197_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVB197_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVB197_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVB197_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVB197_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVB197_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVB197_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVB197_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVB197_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVB197_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVB197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVB197_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVB197_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVB197_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVB197_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVB197_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVB197_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVB197_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVB197_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVB197_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVB197_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVB197_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVB197_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVB197_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVB197_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVB197_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVB197_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVB197_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVB197_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVB197_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVB197_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVB197_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVB197_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVB197_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVB197_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVB197_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVB197_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVB197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVB197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVB197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVB197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVB197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVB197_SET_VERTEX_STREAM_LIMIT_A_A(j) (0x1f00+(j)*8) +#define NVB197_SET_VERTEX_STREAM_LIMIT_A_A_UPPER 7:0 + +#define NVB197_SET_VERTEX_STREAM_LIMIT_A_B(j) (0x1f04+(j)*8) +#define NVB197_SET_VERTEX_STREAM_LIMIT_A_B_LOWER 31:0 + +#define NVB197_SET_VERTEX_STREAM_LIMIT_B_A(j) (0x1f80+(j)*8) +#define NVB197_SET_VERTEX_STREAM_LIMIT_B_A_UPPER 7:0 + +#define NVB197_SET_VERTEX_STREAM_LIMIT_B_B(j) (0x1f84+(j)*8) +#define NVB197_SET_VERTEX_STREAM_LIMIT_B_B_LOWER 31:0 + +#define NVB197_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVB197_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVB197_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVB197_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVB197_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVB197_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVB197_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVB197_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVB197_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVB197_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVB197_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVB197_SET_PIPELINE_PROGRAM(j) (0x2004+(j)*64) +#define NVB197_SET_PIPELINE_PROGRAM_OFFSET 31:0 + +#define NVB197_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVB197_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVB197_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVB197_SET_PIPELINE_REGISTER_COUNT_V 7:0 + +#define NVB197_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVB197_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVB197_SET_PIPELINE_RESERVED_B(j) (0x2014+(j)*64) +#define NVB197_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVB197_SET_PIPELINE_RESERVED_C(j) (0x2018+(j)*64) +#define NVB197_SET_PIPELINE_RESERVED_C_V 0:0 + +#define NVB197_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NVB197_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NVB197_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVB197_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVB197_SET_FALCON00 0x2300 +#define NVB197_SET_FALCON00_V 31:0 + +#define NVB197_SET_FALCON01 0x2304 +#define NVB197_SET_FALCON01_V 31:0 + +#define NVB197_SET_FALCON02 0x2308 +#define NVB197_SET_FALCON02_V 31:0 + +#define NVB197_SET_FALCON03 0x230c +#define NVB197_SET_FALCON03_V 31:0 + +#define NVB197_SET_FALCON04 0x2310 +#define NVB197_SET_FALCON04_V 31:0 + +#define NVB197_SET_FALCON05 0x2314 +#define NVB197_SET_FALCON05_V 31:0 + +#define NVB197_SET_FALCON06 0x2318 +#define NVB197_SET_FALCON06_V 31:0 + +#define NVB197_SET_FALCON07 0x231c +#define NVB197_SET_FALCON07_V 31:0 + +#define NVB197_SET_FALCON08 0x2320 +#define NVB197_SET_FALCON08_V 31:0 + +#define NVB197_SET_FALCON09 0x2324 +#define NVB197_SET_FALCON09_V 31:0 + +#define NVB197_SET_FALCON10 0x2328 +#define NVB197_SET_FALCON10_V 31:0 + +#define NVB197_SET_FALCON11 0x232c +#define NVB197_SET_FALCON11_V 31:0 + +#define NVB197_SET_FALCON12 0x2330 +#define NVB197_SET_FALCON12_V 31:0 + +#define NVB197_SET_FALCON13 0x2334 +#define NVB197_SET_FALCON13_V 31:0 + +#define NVB197_SET_FALCON14 0x2338 +#define NVB197_SET_FALCON14_V 31:0 + +#define NVB197_SET_FALCON15 0x233c +#define NVB197_SET_FALCON15_V 31:0 + +#define NVB197_SET_FALCON16 0x2340 +#define NVB197_SET_FALCON16_V 31:0 + +#define NVB197_SET_FALCON17 0x2344 +#define NVB197_SET_FALCON17_V 31:0 + +#define NVB197_SET_FALCON18 0x2348 +#define NVB197_SET_FALCON18_V 31:0 + +#define NVB197_SET_FALCON19 0x234c +#define NVB197_SET_FALCON19_V 31:0 + +#define NVB197_SET_FALCON20 0x2350 +#define NVB197_SET_FALCON20_V 31:0 + +#define NVB197_SET_FALCON21 0x2354 +#define NVB197_SET_FALCON21_V 31:0 + +#define NVB197_SET_FALCON22 0x2358 +#define NVB197_SET_FALCON22_V 31:0 + +#define NVB197_SET_FALCON23 0x235c +#define NVB197_SET_FALCON23_V 31:0 + +#define NVB197_SET_FALCON24 0x2360 +#define NVB197_SET_FALCON24_V 31:0 + +#define NVB197_SET_FALCON25 0x2364 +#define NVB197_SET_FALCON25_V 31:0 + +#define NVB197_SET_FALCON26 0x2368 +#define NVB197_SET_FALCON26_V 31:0 + +#define NVB197_SET_FALCON27 0x236c +#define NVB197_SET_FALCON27_V 31:0 + +#define NVB197_SET_FALCON28 0x2370 +#define NVB197_SET_FALCON28_V 31:0 + +#define NVB197_SET_FALCON29 0x2374 +#define NVB197_SET_FALCON29_V 31:0 + +#define NVB197_SET_FALCON30 0x2378 +#define NVB197_SET_FALCON30_V 31:0 + +#define NVB197_SET_FALCON31 0x237c +#define NVB197_SET_FALCON31_V 31:0 + +#define NVB197_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVB197_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVB197_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVB197_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVB197_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVB197_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVB197_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVB197_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVB197_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVB197_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVB197_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVB197_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVB197_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVB197_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVB197_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVB197_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVB197_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVB197_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVB197_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVB197_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVB197_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVB197_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVB197_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVB197_SET_COLOR_CLAMP 0x2600 +#define NVB197_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVB197_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVB197_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVB197_SET_BINDLESS_TEXTURE 0x2608 +#define NVB197_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 4:0 + +#define NVB197_SET_TRAP_HANDLER 0x260c +#define NVB197_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVB197_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVB197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVB197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVB197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVB197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVB197_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVB197_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVB197_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVB197_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVB197_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVB197_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVB197_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVB197_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVB197_CALL_MME_MACRO_V 31:0 + +#define NVB197_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVB197_CALL_MME_DATA_V 31:0 + +#endif /* _cl_maxwell_b_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clb1c0.h b/userspace/sdks/nv570/inc/class/clb1c0.h new file mode 100644 index 0000000..8d7aaac --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb1c0.h @@ -0,0 +1,750 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_maxwell_compute_b_h_ +#define _cl_maxwell_compute_b_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl maxwell_compute_b */ + +#include "nvtypes.h" + +#define MAXWELL_COMPUTE_B 0xB1C0 + +#define NVB1C0_SET_OBJECT 0x0000 +#define NVB1C0_SET_OBJECT_CLASS_ID 15:0 +#define NVB1C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVB1C0_NO_OPERATION 0x0100 +#define NVB1C0_NO_OPERATION_V 31:0 + +#define NVB1C0_SET_NOTIFY_A 0x0104 +#define NVB1C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVB1C0_SET_NOTIFY_B 0x0108 +#define NVB1C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVB1C0_NOTIFY 0x010c +#define NVB1C0_NOTIFY_TYPE 31:0 +#define NVB1C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVB1C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVB1C0_WAIT_FOR_IDLE 0x0110 +#define NVB1C0_WAIT_FOR_IDLE_V 31:0 + +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVB1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVB1C0_SEND_GO_IDLE 0x013c +#define NVB1C0_SEND_GO_IDLE_V 31:0 + +#define NVB1C0_PM_TRIGGER 0x0140 +#define NVB1C0_PM_TRIGGER_V 31:0 + +#define NVB1C0_PM_TRIGGER_WFI 0x0144 +#define NVB1C0_PM_TRIGGER_WFI_V 31:0 + +#define NVB1C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVB1C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVB1C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVB1C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVB1C0_LINE_LENGTH_IN 0x0180 +#define NVB1C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVB1C0_LINE_COUNT 0x0184 +#define NVB1C0_LINE_COUNT_VALUE 31:0 + +#define NVB1C0_OFFSET_OUT_UPPER 0x0188 +#define NVB1C0_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVB1C0_OFFSET_OUT 0x018c +#define NVB1C0_OFFSET_OUT_VALUE 31:0 + +#define NVB1C0_PITCH_OUT 0x0190 +#define NVB1C0_PITCH_OUT_VALUE 31:0 + +#define NVB1C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVB1C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVB1C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVB1C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVB1C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVB1C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVB1C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVB1C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVB1C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVB1C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVB1C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVB1C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVB1C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVB1C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVB1C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVB1C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVB1C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVB1C0_SET_DST_WIDTH 0x0198 +#define NVB1C0_SET_DST_WIDTH_V 31:0 + +#define NVB1C0_SET_DST_HEIGHT 0x019c +#define NVB1C0_SET_DST_HEIGHT_V 31:0 + +#define NVB1C0_SET_DST_DEPTH 0x01a0 +#define NVB1C0_SET_DST_DEPTH_V 31:0 + +#define NVB1C0_SET_DST_LAYER 0x01a4 +#define NVB1C0_SET_DST_LAYER_V 31:0 + +#define NVB1C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVB1C0_SET_DST_ORIGIN_BYTES_X_V 19:0 + +#define NVB1C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVB1C0_SET_DST_ORIGIN_SAMPLES_Y_V 15:0 + +#define NVB1C0_LAUNCH_DMA 0x01b0 +#define NVB1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVB1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVB1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVB1C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVB1C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVB1C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVB1C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVB1C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVB1C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVB1C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVB1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVB1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVB1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVB1C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVB1C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVB1C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVB1C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVB1C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVB1C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVB1C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVB1C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVB1C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVB1C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVB1C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVB1C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVB1C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVB1C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVB1C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVB1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVB1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVB1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVB1C0_LOAD_INLINE_DATA 0x01b4 +#define NVB1C0_LOAD_INLINE_DATA_V 31:0 + +#define NVB1C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVB1C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVB1C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVB1C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVB1C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVB1C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVB1C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVB1C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVB1C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVB1C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVB1C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVB1C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVB1C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVB1C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVB1C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVB1C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVB1C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVB1C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVB1C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVB1C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVB1C0_SET_COALESCE_WAITING_PERIOD_UNIT 0x020c +#define NVB1C0_SET_COALESCE_WAITING_PERIOD_UNIT_CLOCKS 31:0 + +#define NVB1C0_PERFMON_TRANSFER 0x0210 +#define NVB1C0_PERFMON_TRANSFER_V 31:0 + +#define NVB1C0_SET_SHADER_SHARED_MEMORY_WINDOW 0x0214 +#define NVB1C0_SET_SHADER_SHARED_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVB1C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS 0x0218 +#define NVB1C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V 0:0 +#define NVB1C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE 0x00000000 +#define NVB1C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE 0x00000001 + +#define NVB1C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVB1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVB1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVB1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVB1C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVB1C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVB1C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVB1C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVB1C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVB1C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVB1C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVB1C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVB1C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVB1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVB1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVB1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVB1C0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVB1C0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVB1C0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVB1C0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD03 0x022c +#define NVB1C0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVB1C0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVB1C0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVB1C0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD07 0x023c +#define NVB1C0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVB1C0_SET_CWD_CONTROL 0x0240 +#define NVB1C0_SET_CWD_CONTROL_SM_SELECTION 0:0 +#define NVB1C0_SET_CWD_CONTROL_SM_SELECTION_LOAD_BALANCED 0x00000000 +#define NVB1C0_SET_CWD_CONTROL_SM_SELECTION_ROUND_ROBIN 0x00000001 + +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVB1C0_SET_CWD_REF_COUNTER 0x0248 +#define NVB1C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVB1C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVB1C0_SET_RESERVED_SW_METHOD08 0x024c +#define NVB1C0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVB1C0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVB1C0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVB1C0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD12 0x025c +#define NVB1C0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVB1C0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVB1C0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVB1C0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVB1C0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVB1C0_SET_GWC_SCG_TYPE 0x026c +#define NVB1C0_SET_GWC_SCG_TYPE_SCG_TYPE 0:0 +#define NVB1C0_SET_GWC_SCG_TYPE_SCG_TYPE_GRAPHICS_COMPUTE0 0x00000000 +#define NVB1C0_SET_GWC_SCG_TYPE_SCG_TYPE_COMPUTE1 0x00000001 + +#define NVB1C0_SET_SCG_CONTROL 0x0270 +#define NVB1C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 + +#define NVB1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A 0x0274 +#define NVB1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A_ADDRESS_UPPER 7:0 + +#define NVB1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B 0x0278 +#define NVB1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B_ADDRESS_LOWER 31:0 + +#define NVB1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C 0x027c +#define NVB1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_BYTE_COUNT 16:0 +#define NVB1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2 31:31 +#define NVB1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_FALSE 0x00000000 +#define NVB1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_TRUE 0x00000001 + +#define NVB1C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVB1C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVB1C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB1C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVB1C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVB1C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB1C0_SET_QMD_VERSION 0x0288 +#define NVB1C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVB1C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB1C0_SET_WFI_CONFIG 0x028c +#define NVB1C0_SET_WFI_CONFIG_ENABLE_SCG_TYPE_WFI 0:0 +#define NVB1C0_SET_WFI_CONFIG_ENABLE_SCG_TYPE_WFI_FALSE 0x00000000 +#define NVB1C0_SET_WFI_CONFIG_ENABLE_SCG_TYPE_WFI_TRUE 0x00000001 + +#define NVB1C0_CHECK_QMD_VERSION 0x0290 +#define NVB1C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVB1C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVB1C0_WAIT_FOR_IDLE_SCG_TYPE 0x0294 +#define NVB1C0_WAIT_FOR_IDLE_SCG_TYPE_V 31:0 + +#define NVB1C0_INVALIDATE_SKED_CACHES 0x0298 +#define NVB1C0_INVALIDATE_SKED_CACHES_V 0:0 + +#define NVB1C0_SET_SCG_RENDER_ENABLE_CONTROL 0x029c +#define NVB1C0_SET_SCG_RENDER_ENABLE_CONTROL_COMPUTE1_USES_RENDER_ENABLE 0:0 +#define NVB1C0_SET_SCG_RENDER_ENABLE_CONTROL_COMPUTE1_USES_RENDER_ENABLE_FALSE 0x00000000 +#define NVB1C0_SET_SCG_RENDER_ENABLE_CONTROL_COMPUTE1_USES_RENDER_ENABLE_TRUE 0x00000001 + +#define NVB1C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVB1C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVB1C0_SEND_PCAS_A 0x02b4 +#define NVB1C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVB1C0_SEND_PCAS_B 0x02b8 +#define NVB1C0_SEND_PCAS_B_FROM 23:0 +#define NVB1C0_SEND_PCAS_B_DELTA 31:24 + +#define NVB1C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVB1C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVB1C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVB1C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVB1C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVB1C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVB1C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A 0x02f0 +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B 0x02f4 +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C 0x02f8 +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVB1C0_SET_SPA_VERSION 0x0310 +#define NVB1C0_SET_SPA_VERSION_MINOR 7:0 +#define NVB1C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVB1C0_SET_FALCON00 0x0500 +#define NVB1C0_SET_FALCON00_V 31:0 + +#define NVB1C0_SET_FALCON01 0x0504 +#define NVB1C0_SET_FALCON01_V 31:0 + +#define NVB1C0_SET_FALCON02 0x0508 +#define NVB1C0_SET_FALCON02_V 31:0 + +#define NVB1C0_SET_FALCON03 0x050c +#define NVB1C0_SET_FALCON03_V 31:0 + +#define NVB1C0_SET_FALCON04 0x0510 +#define NVB1C0_SET_FALCON04_V 31:0 + +#define NVB1C0_SET_FALCON05 0x0514 +#define NVB1C0_SET_FALCON05_V 31:0 + +#define NVB1C0_SET_FALCON06 0x0518 +#define NVB1C0_SET_FALCON06_V 31:0 + +#define NVB1C0_SET_FALCON07 0x051c +#define NVB1C0_SET_FALCON07_V 31:0 + +#define NVB1C0_SET_FALCON08 0x0520 +#define NVB1C0_SET_FALCON08_V 31:0 + +#define NVB1C0_SET_FALCON09 0x0524 +#define NVB1C0_SET_FALCON09_V 31:0 + +#define NVB1C0_SET_FALCON10 0x0528 +#define NVB1C0_SET_FALCON10_V 31:0 + +#define NVB1C0_SET_FALCON11 0x052c +#define NVB1C0_SET_FALCON11_V 31:0 + +#define NVB1C0_SET_FALCON12 0x0530 +#define NVB1C0_SET_FALCON12_V 31:0 + +#define NVB1C0_SET_FALCON13 0x0534 +#define NVB1C0_SET_FALCON13_V 31:0 + +#define NVB1C0_SET_FALCON14 0x0538 +#define NVB1C0_SET_FALCON14_V 31:0 + +#define NVB1C0_SET_FALCON15 0x053c +#define NVB1C0_SET_FALCON15_V 31:0 + +#define NVB1C0_SET_FALCON16 0x0540 +#define NVB1C0_SET_FALCON16_V 31:0 + +#define NVB1C0_SET_FALCON17 0x0544 +#define NVB1C0_SET_FALCON17_V 31:0 + +#define NVB1C0_SET_FALCON18 0x0548 +#define NVB1C0_SET_FALCON18_V 31:0 + +#define NVB1C0_SET_FALCON19 0x054c +#define NVB1C0_SET_FALCON19_V 31:0 + +#define NVB1C0_SET_FALCON20 0x0550 +#define NVB1C0_SET_FALCON20_V 31:0 + +#define NVB1C0_SET_FALCON21 0x0554 +#define NVB1C0_SET_FALCON21_V 31:0 + +#define NVB1C0_SET_FALCON22 0x0558 +#define NVB1C0_SET_FALCON22_V 31:0 + +#define NVB1C0_SET_FALCON23 0x055c +#define NVB1C0_SET_FALCON23_V 31:0 + +#define NVB1C0_SET_FALCON24 0x0560 +#define NVB1C0_SET_FALCON24_V 31:0 + +#define NVB1C0_SET_FALCON25 0x0564 +#define NVB1C0_SET_FALCON25_V 31:0 + +#define NVB1C0_SET_FALCON26 0x0568 +#define NVB1C0_SET_FALCON26_V 31:0 + +#define NVB1C0_SET_FALCON27 0x056c +#define NVB1C0_SET_FALCON27_V 31:0 + +#define NVB1C0_SET_FALCON28 0x0570 +#define NVB1C0_SET_FALCON28_V 31:0 + +#define NVB1C0_SET_FALCON29 0x0574 +#define NVB1C0_SET_FALCON29_V 31:0 + +#define NVB1C0_SET_FALCON30 0x0578 +#define NVB1C0_SET_FALCON30_V 31:0 + +#define NVB1C0_SET_FALCON31 0x057c +#define NVB1C0_SET_FALCON31_V 31:0 + +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVB1C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVB1C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVB1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVB1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVB1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVB1C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVB1C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVB1C0_SET_SPARE_NOOP12 0x0f44 +#define NVB1C0_SET_SPARE_NOOP12_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP13 0x0f48 +#define NVB1C0_SET_SPARE_NOOP13_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP14 0x0f4c +#define NVB1C0_SET_SPARE_NOOP14_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP15 0x0f50 +#define NVB1C0_SET_SPARE_NOOP15_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP00 0x1040 +#define NVB1C0_SET_SPARE_NOOP00_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP01 0x1044 +#define NVB1C0_SET_SPARE_NOOP01_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP02 0x1048 +#define NVB1C0_SET_SPARE_NOOP02_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP03 0x104c +#define NVB1C0_SET_SPARE_NOOP03_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP04 0x1050 +#define NVB1C0_SET_SPARE_NOOP04_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP05 0x1054 +#define NVB1C0_SET_SPARE_NOOP05_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP06 0x1058 +#define NVB1C0_SET_SPARE_NOOP06_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP07 0x105c +#define NVB1C0_SET_SPARE_NOOP07_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP08 0x1060 +#define NVB1C0_SET_SPARE_NOOP08_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP09 0x1064 +#define NVB1C0_SET_SPARE_NOOP09_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP10 0x1068 +#define NVB1C0_SET_SPARE_NOOP10_V 31:0 + +#define NVB1C0_SET_SPARE_NOOP11 0x106c +#define NVB1C0_SET_SPARE_NOOP11_V 31:0 + +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_ALL 0x120c +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_ALL_V 0:0 + +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL 0x1210 +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL_V 0:0 + +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVB1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVB1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVB1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVB1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVB1C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVB1C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVB1C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVB1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVB1C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVB1C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVB1C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVB1C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVB1C0_SET_RENDER_ENABLE_A 0x1550 +#define NVB1C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVB1C0_SET_RENDER_ENABLE_B 0x1554 +#define NVB1C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVB1C0_SET_RENDER_ENABLE_C 0x1558 +#define NVB1C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVB1C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVB1C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVB1C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVB1C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVB1C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVB1C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVB1C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVB1C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVB1C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVB1C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVB1C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVB1C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVB1C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVB1C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVB1C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVB1C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVB1C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVB1C0_SET_PROGRAM_REGION_A 0x1608 +#define NVB1C0_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVB1C0_SET_PROGRAM_REGION_B 0x160c +#define NVB1C0_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVB1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVB1C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVB1C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVB1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVB1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVB1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVB1C0_PIPE_NOP 0x1a2c +#define NVB1C0_PIPE_NOP_V 31:0 + +#define NVB1C0_SET_SPARE00 0x1a30 +#define NVB1C0_SET_SPARE00_V 31:0 + +#define NVB1C0_SET_SPARE01 0x1a34 +#define NVB1C0_SET_SPARE01_V 31:0 + +#define NVB1C0_SET_SPARE02 0x1a38 +#define NVB1C0_SET_SPARE02_V 31:0 + +#define NVB1C0_SET_SPARE03 0x1a3c +#define NVB1C0_SET_SPARE03_V 31:0 + +#define NVB1C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVB1C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVB1C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVB1C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVB1C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVB1C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVB1C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVB1C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVB1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVB1C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVB1C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVB1C0_SET_TRAP_HANDLER 0x260c +#define NVB1C0_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVB1C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVB1C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVB1C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVB1C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVB1C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVB1C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVB1C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#endif /* _cl_maxwell_compute_b_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clb1cc.h b/userspace/sdks/nv570/inc/class/clb1cc.h new file mode 100644 index 0000000..4e3e226 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb1cc.h @@ -0,0 +1,50 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clb1cc.finn +// + +#include "clb0cc.h" + +#define MAXWELL_PROFILER_CONTEXT (0xb1ccU) /* finn: Evaluated from "NVB1CC_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* + * Creating the MAXWELL_PROFILER_CONTEXT object: + * - The profiler object is instantiated as a child of either a bc channel + * group or bc channel. + */ +#define NVB1CC_ALLOC_PARAMETERS_MESSAGE_ID (0xb1ccU) + +typedef struct NVB1CC_ALLOC_PARAMETERS { + /* + * Handle of a specific subdevice of a broadcast device. + */ + NvHandle hSubDevice; +} NVB1CC_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clb2cc.h b/userspace/sdks/nv570/inc/class/clb2cc.h new file mode 100644 index 0000000..f3ba26f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb2cc.h @@ -0,0 +1,60 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clb2cc.finn +// + +#include "clb0cc.h" + +#define MAXWELL_PROFILER_DEVICE (0xb2ccU) /* finn: Evaluated from "NVB2CC_ALLOC_PARAMETERS_MESSAGE_ID" */ + +/* + * Creating the MAXWELL_PROFILER_DEVICE object: + * - The profiler object is instantiated as a child of subdevice. + */ +#define NVB2CC_ALLOC_PARAMETERS_MESSAGE_ID (0xb2ccU) + +typedef struct NVB2CC_ALLOC_PARAMETERS { + /* + * This parameter specifies the handle of the client that owns the context + * specified by hContextTarget. This can set it to 0 where a context + * specific operation is not needed. For context level operations see: + * @ref NVB0CC_CTRL_CMD_RESERVE_HWPM_LEGACY, @ref NVB0CC_CTRL_CMD_RESERVE_PM_AREA_SMPC, + * @ref NVB0CC_CTRL_CMD_ALLOC_PMA_STREAM. + */ + NvHandle hClientTarget; + + /* + * This parameter specifies the handle of the BC channel (or BC channel + * group) object instance to which context-specific operations are to be + * directed. If hClientTarget is set to 0 then this parameter is ignored. + */ + NvHandle hContextTarget; +} NVB2CC_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clb4b7.h b/userspace/sdks/nv570/inc/class/clb4b7.h new file mode 100644 index 0000000..e015151 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb4b7.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef clb4b7_h_ +#define clb4b7_h_ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVB4B7_VIDEO_ENCODER (0x0000B4B7) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clb4b7_h + diff --git a/userspace/sdks/nv570/inc/class/clb6b0.h b/userspace/sdks/nv570/inc/class/clb6b0.h new file mode 100644 index 0000000..d79dcb4 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb6b0.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#include "nvtypes.h" + +#ifndef _clb6b0_h_ +#define _clb6b0_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVB6B0_VIDEO_DECODER (0x0000B6B0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clb6b0_h diff --git a/userspace/sdks/nv570/inc/class/clb8b0.h b/userspace/sdks/nv570/inc/class/clb8b0.h new file mode 100644 index 0000000..b2d0e09 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb8b0.h @@ -0,0 +1,27 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gh100_clb8b0_h__ +#define __gh100_clb8b0_h__ +#define NVB8B0_VIDEO_DECODER (0x0000B8B0) +#endif // __gh100_clb8b0_h__ diff --git a/userspace/sdks/nv570/inc/class/clb8d1.h b/userspace/sdks/nv570/inc/class/clb8d1.h new file mode 100644 index 0000000..e6c8e4c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb8d1.h @@ -0,0 +1,27 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gh100_clb8d1_h__ +#define __gh100_clb8d1_h__ +#define NVB8D1_VIDEO_NVJPG (0x0000B8D1) +#endif // __gh100_clb8d1_h__ diff --git a/userspace/sdks/nv570/inc/class/clb8fa.h b/userspace/sdks/nv570/inc/class/clb8fa.h new file mode 100644 index 0000000..19edb23 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clb8fa.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clb8fa_h_ +#define _clb8fa_h_ + +#define NVB8FA_VIDEO_OFA (0x0000B8FA) + +#endif /* _clb8fa_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc06f.h b/userspace/sdks/nv570/inc/class/clc06f.h new file mode 100644 index 0000000..d8b8607 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc06f.h @@ -0,0 +1,312 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc06f_h_ +#define _clc06f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* class PASCAL_CHANNEL_GPFIFO */ +/* + * Documentation for PASCAL_CHANNEL_GPFIFO can be found in dev_pbdma.ref, + * chapter "User Control Registers". It is documented as device NV_UDMA. + * The GPFIFO format itself is also documented in dev_pbdma.ref, + * NV_PPBDMA_GP_ENTRY_*. The pushbuffer format is documented in dev_ram.ref, + * chapter "FIFO DMA RAM", NV_FIFO_DMA_*. + * + * Note there is no .mfs file for this class. + */ +#define PASCAL_CHANNEL_GPFIFO_A (0x0000C06F) + +#define NVC06F_TYPEDEF PASCAL_CHANNELChannelGPFifoA + +/* dma flow control data structure */ +typedef volatile struct Nvc06fControl_struct { + NvU32 Ignored00[0x010]; /* 0000-003f*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 Ignored01[0x002]; /* 0050-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored02[0x007]; /* 0064-007f*/ + NvU32 Ignored03; /* used to be engine yield 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x5c]; +} Nvc06fControl, PascalAControlGPFifo; + +/* fields and values */ +#define NVC06F_NUMBER_OF_SUBCHANNELS (8) +#define NVC06F_SET_OBJECT (0x00000000) +#define NVC06F_SET_OBJECT_NVCLASS 15:0 +#define NVC06F_SET_OBJECT_ENGINE 20:16 +#define NVC06F_SET_OBJECT_ENGINE_SW 0x0000001f +#define NVC06F_ILLEGAL (0x00000004) +#define NVC06F_ILLEGAL_HANDLE 31:0 +#define NVC06F_NOP (0x00000008) +#define NVC06F_NOP_HANDLE 31:0 +#define NVC06F_SEMAPHOREA (0x00000010) +#define NVC06F_SEMAPHOREA_OFFSET_UPPER 7:0 +#define NVC06F_SEMAPHOREB (0x00000014) +#define NVC06F_SEMAPHOREB_OFFSET_LOWER 31:2 +#define NVC06F_SEMAPHOREC (0x00000018) +#define NVC06F_SEMAPHOREC_PAYLOAD 31:0 +#define NVC06F_SEMAPHORED (0x0000001C) +#define NVC06F_SEMAPHORED_OPERATION 4:0 +#define NVC06F_SEMAPHORED_OPERATION_ACQUIRE 0x00000001 +#define NVC06F_SEMAPHORED_OPERATION_RELEASE 0x00000002 +#define NVC06F_SEMAPHORED_OPERATION_ACQ_GEQ 0x00000004 +#define NVC06F_SEMAPHORED_OPERATION_ACQ_AND 0x00000008 +#define NVC06F_SEMAPHORED_OPERATION_REDUCTION 0x00000010 +#define NVC06F_SEMAPHORED_ACQUIRE_SWITCH 12:12 +#define NVC06F_SEMAPHORED_ACQUIRE_SWITCH_DISABLED 0x00000000 +#define NVC06F_SEMAPHORED_ACQUIRE_SWITCH_ENABLED 0x00000001 +#define NVC06F_SEMAPHORED_RELEASE_WFI 20:20 +#define NVC06F_SEMAPHORED_RELEASE_WFI_EN 0x00000000 +#define NVC06F_SEMAPHORED_RELEASE_WFI_DIS 0x00000001 +#define NVC06F_SEMAPHORED_RELEASE_SIZE 24:24 +#define NVC06F_SEMAPHORED_RELEASE_SIZE_16BYTE 0x00000000 +#define NVC06F_SEMAPHORED_RELEASE_SIZE_4BYTE 0x00000001 +#define NVC06F_SEMAPHORED_REDUCTION 30:27 +#define NVC06F_SEMAPHORED_REDUCTION_MIN 0x00000000 +#define NVC06F_SEMAPHORED_REDUCTION_MAX 0x00000001 +#define NVC06F_SEMAPHORED_REDUCTION_XOR 0x00000002 +#define NVC06F_SEMAPHORED_REDUCTION_AND 0x00000003 +#define NVC06F_SEMAPHORED_REDUCTION_OR 0x00000004 +#define NVC06F_SEMAPHORED_REDUCTION_ADD 0x00000005 +#define NVC06F_SEMAPHORED_REDUCTION_INC 0x00000006 +#define NVC06F_SEMAPHORED_REDUCTION_DEC 0x00000007 +#define NVC06F_SEMAPHORED_FORMAT 31:31 +#define NVC06F_SEMAPHORED_FORMAT_SIGNED 0x00000000 +#define NVC06F_SEMAPHORED_FORMAT_UNSIGNED 0x00000001 +#define NVC06F_NON_STALL_INTERRUPT (0x00000020) +#define NVC06F_NON_STALL_INTERRUPT_HANDLE 31:0 +#define NVC06F_FB_FLUSH (0x00000024) // Deprecated - use MEMBAR TYPE SYS_MEMBAR +#define NVC06F_FB_FLUSH_HANDLE 31:0 +// NOTE - MEM_OP_A and MEM_OP_B have been replaced in gp100 with methods for +// specifying the page address for a targeted TLB invalidate and the uTLB for +// a targeted REPLAY_CANCEL for UVM. +// The previous MEM_OP_A/B functionality is in MEM_OP_C/D, with slightly +// rearranged fields. +#define NVC06F_MEM_OP_A (0x00000028) +#define NVC06F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_CLIENT_UNIT_ID 5:0 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC06F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_GPC_ID 10:6 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC06F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR 11:11 +#define NVC06F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_EN 0x00000001 +#define NVC06F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_DIS 0x00000000 +#define NVC06F_MEM_OP_A_TLB_INVALIDATE_TARGET_ADDR_LO 31:12 +#define NVC06F_MEM_OP_B (0x0000002c) +#define NVC06F_MEM_OP_B_TLB_INVALIDATE_TARGET_ADDR_HI 31:0 +#define NVC06F_MEM_OP_C (0x00000030) +#define NVC06F_MEM_OP_C_MEMBAR_TYPE 2:0 +#define NVC06F_MEM_OP_C_MEMBAR_TYPE_SYS_MEMBAR 0x00000000 +#define NVC06F_MEM_OP_C_MEMBAR_TYPE_MEMBAR 0x00000001 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PDB 0:0 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PDB_ALL 0x00000001 // Probably nonsensical for MMU_TLB_INVALIDATE_TARGETED +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_GPC 1:1 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_REPLAY 4:2 // only relevant if GPC ENABLE +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_REPLAY_NONE 0x00000000 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START 0x00000001 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START_ACK_ALL 0x00000002 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_TARGETED 0x00000003 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_GLOBAL 0x00000004 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE 6:5 // only relevant if GPC ENABLE +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_NONE 0x00000000 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_GLOBALLY 0x00000001 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_INTRANODE 0x00000002 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL 9:7 // Invalidate affects this level and all below +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_ALL 0x00000000 // Invalidate tlb caches at all levels of the page table +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_PTE_ONLY 0x00000001 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE0 0x00000002 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE1 0x00000003 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE2 0x00000004 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3 0x00000005 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE4 0x00000006 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE5 0x00000007 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE 11:10 // only relevant if PDB_ONE +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_VID_MEM 0x00000000 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 +#define NVC06F_MEM_OP_C_TLB_INVALIDATE_PDB_ADDR_LO 31:12 // only relevant if PDB_ONE +// MEM_OP_D MUST be preceded by MEM_OPs A-C. +#define NVC06F_MEM_OP_D (0x00000034) +#define NVC06F_MEM_OP_D_TLB_INVALIDATE_PDB_ADDR_HI 26:0 // only relevant if PDB_ONE +#define NVC06F_MEM_OP_D_OPERATION 31:27 +#define NVC06F_MEM_OP_D_OPERATION_MEMBAR 0x00000005 +#define NVC06F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NVC06F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE_TARGETED 0x0000000a +#define NVC06F_MEM_OP_D_OPERATION_L2_PEERMEM_INVALIDATE 0x0000000d +#define NVC06F_MEM_OP_D_OPERATION_L2_SYSMEM_INVALIDATE 0x0000000e +// CLEAN_LINES is an alias for Tegra/GPU IP usage +#define NVC06F_MEM_OP_D_OPERATION_L2_INVALIDATE_CLEAN_LINES 0x0000000e +// This B alias is confusing but it was missed as part of the update. Left here +// for compatibility. +#define NVC06F_MEM_OP_B_OPERATION_L2_INVALIDATE_CLEAN_LINES 0x0000000e +#define NVC06F_MEM_OP_D_OPERATION_L2_CLEAN_COMPTAGS 0x0000000f +#define NVC06F_MEM_OP_D_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NVC06F_MEM_OP_D_OPERATION_L2_WAIT_FOR_SYS_PENDING_READS 0x00000015 +#define NVC06F_SET_REFERENCE (0x00000050) +#define NVC06F_SET_REFERENCE_COUNT 31:0 +// Syncpoint methods are only available on Tegra parts. Attempting to use +// them on discrete GPUs will result in Host raising NV_PPBDMA_INTR_0_METHOD. +#define NVC06F_SYNCPOINTA (0x00000070) +#define NVC06F_SYNCPOINTA_PAYLOAD 31:0 +#define NVC06F_SYNCPOINTB (0x00000074) +#define NVC06F_SYNCPOINTB_OPERATION 0:0 +#define NVC06F_SYNCPOINTB_OPERATION_WAIT 0x00000000 +#define NVC06F_SYNCPOINTB_OPERATION_INCR 0x00000001 +#define NVC06F_SYNCPOINTB_WAIT_SWITCH 4:4 +#define NVC06F_SYNCPOINTB_WAIT_SWITCH_DIS 0x00000000 +#define NVC06F_SYNCPOINTB_WAIT_SWITCH_EN 0x00000001 +#define NVC06F_SYNCPOINTB_SYNCPT_INDEX 19:8 +#define NVC06F_WFI (0x00000078) +#define NVC06F_WFI_SCOPE 0:0 +#define NVC06F_WFI_SCOPE_CURRENT_SCG_TYPE 0x00000000 +#define NVC06F_WFI_SCOPE_ALL 0x00000001 +#define NVC06F_CRC_CHECK (0x0000007c) +#define NVC06F_CRC_CHECK_VALUE 31:0 +#define NVC06F_YIELD (0x00000080) +#define NVC06F_YIELD_OP 1:0 +#define NVC06F_YIELD_OP_NOP 0x00000000 +#define NVC06F_YIELD_OP_PBDMA_TIMESLICE 0x00000001 +#define NVC06F_YIELD_OP_RUNLIST_TIMESLICE 0x00000002 +#define NVC06F_YIELD_OP_TSG 0x00000003 + + +/* GPFIFO entry format */ +#define NVC06F_GP_ENTRY__SIZE 8 +#define NVC06F_GP_ENTRY0_FETCH 0:0 +#define NVC06F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVC06F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVC06F_GP_ENTRY0_GET 31:2 +#define NVC06F_GP_ENTRY0_OPERAND 31:0 +#define NVC06F_GP_ENTRY1_GET_HI 7:0 +#define NVC06F_GP_ENTRY1_PRIV 8:8 +#define NVC06F_GP_ENTRY1_PRIV_USER 0x00000000 +#define NVC06F_GP_ENTRY1_PRIV_KERNEL 0x00000001 +#define NVC06F_GP_ENTRY1_LEVEL 9:9 +#define NVC06F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVC06F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVC06F_GP_ENTRY1_LENGTH 30:10 +#define NVC06F_GP_ENTRY1_SYNC 31:31 +#define NVC06F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVC06F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVC06F_GP_ENTRY1_OPCODE 7:0 +#define NVC06F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVC06F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVC06F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVC06F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 + +/* dma method formats */ +#define NVC06F_DMA_METHOD_ADDRESS_OLD 12:2 +#define NVC06F_DMA_METHOD_ADDRESS 11:0 +#define NVC06F_DMA_SUBDEVICE_MASK 15:4 +#define NVC06F_DMA_METHOD_SUBCHANNEL 15:13 +#define NVC06F_DMA_TERT_OP 17:16 +#define NVC06F_DMA_TERT_OP_GRP0_INC_METHOD (0x00000000) +#define NVC06F_DMA_TERT_OP_GRP0_SET_SUB_DEV_MASK (0x00000001) +#define NVC06F_DMA_TERT_OP_GRP0_STORE_SUB_DEV_MASK (0x00000002) +#define NVC06F_DMA_TERT_OP_GRP0_USE_SUB_DEV_MASK (0x00000003) +#define NVC06F_DMA_TERT_OP_GRP2_NON_INC_METHOD (0x00000000) +#define NVC06F_DMA_METHOD_COUNT_OLD 28:18 +#define NVC06F_DMA_METHOD_COUNT 28:16 +#define NVC06F_DMA_IMMD_DATA 28:16 +#define NVC06F_DMA_SEC_OP 31:29 +#define NVC06F_DMA_SEC_OP_GRP0_USE_TERT (0x00000000) +#define NVC06F_DMA_SEC_OP_INC_METHOD (0x00000001) +#define NVC06F_DMA_SEC_OP_GRP2_USE_TERT (0x00000002) +#define NVC06F_DMA_SEC_OP_NON_INC_METHOD (0x00000003) +#define NVC06F_DMA_SEC_OP_IMMD_DATA_METHOD (0x00000004) +#define NVC06F_DMA_SEC_OP_ONE_INC (0x00000005) +#define NVC06F_DMA_SEC_OP_RESERVED6 (0x00000006) +#define NVC06F_DMA_SEC_OP_END_PB_SEGMENT (0x00000007) +/* dma incrementing method format */ +#define NVC06F_DMA_INCR_ADDRESS 11:0 +#define NVC06F_DMA_INCR_SUBCHANNEL 15:13 +#define NVC06F_DMA_INCR_COUNT 28:16 +#define NVC06F_DMA_INCR_OPCODE 31:29 +#define NVC06F_DMA_INCR_OPCODE_VALUE (0x00000001) +#define NVC06F_DMA_INCR_DATA 31:0 +/* dma non-incrementing method format */ +#define NVC06F_DMA_NONINCR_ADDRESS 11:0 +#define NVC06F_DMA_NONINCR_SUBCHANNEL 15:13 +#define NVC06F_DMA_NONINCR_COUNT 28:16 +#define NVC06F_DMA_NONINCR_OPCODE 31:29 +#define NVC06F_DMA_NONINCR_OPCODE_VALUE (0x00000003) +#define NVC06F_DMA_NONINCR_DATA 31:0 +/* dma increment-once method format */ +#define NVC06F_DMA_ONEINCR_ADDRESS 11:0 +#define NVC06F_DMA_ONEINCR_SUBCHANNEL 15:13 +#define NVC06F_DMA_ONEINCR_COUNT 28:16 +#define NVC06F_DMA_ONEINCR_OPCODE 31:29 +#define NVC06F_DMA_ONEINCR_OPCODE_VALUE (0x00000005) +#define NVC06F_DMA_ONEINCR_DATA 31:0 +/* dma no-operation format */ +#define NVC06F_DMA_NOP (0x00000000) +/* dma immediate-data format */ +#define NVC06F_DMA_IMMD_ADDRESS 11:0 +#define NVC06F_DMA_IMMD_SUBCHANNEL 15:13 +#define NVC06F_DMA_IMMD_DATA 28:16 +#define NVC06F_DMA_IMMD_OPCODE 31:29 +#define NVC06F_DMA_IMMD_OPCODE_VALUE (0x00000004) +/* dma set sub-device mask format */ +#define NVC06F_DMA_SET_SUBDEVICE_MASK_VALUE 15:4 +#define NVC06F_DMA_SET_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC06F_DMA_SET_SUBDEVICE_MASK_OPCODE_VALUE (0x00000001) +/* dma store sub-device mask format */ +#define NVC06F_DMA_STORE_SUBDEVICE_MASK_VALUE 15:4 +#define NVC06F_DMA_STORE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC06F_DMA_STORE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000002) +/* dma use sub-device mask format */ +#define NVC06F_DMA_USE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC06F_DMA_USE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000003) +/* dma end-segment format */ +#define NVC06F_DMA_ENDSEG_OPCODE 31:29 +#define NVC06F_DMA_ENDSEG_OPCODE_VALUE (0x00000007) +/* dma legacy incrementing/non-incrementing formats */ +#define NVC06F_DMA_ADDRESS 12:2 +#define NVC06F_DMA_SUBCH 15:13 +#define NVC06F_DMA_OPCODE3 17:16 +#define NVC06F_DMA_OPCODE3_NONE (0x00000000) +#define NVC06F_DMA_COUNT 28:18 +#define NVC06F_DMA_OPCODE 31:29 +#define NVC06F_DMA_OPCODE_METHOD (0x00000000) +#define NVC06F_DMA_OPCODE_NONINC_METHOD (0x00000002) +#define NVC06F_DMA_DATA 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc06f_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc06fsw.h b/userspace/sdks/nv570/inc/class/clc06fsw.h new file mode 100644 index 0000000..4e000c6 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc06fsw.h @@ -0,0 +1,44 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* This file is *not* auto-generated. */ + +#ifndef _clc06f_sw_h_ +#define _clc06f_sw_h_ + +#define NVC06F_NOTIFIERS_RC (0) +#define NVC06F_NOTIFIERS_REFCNT (1) +#define NVC06F_NOTIFIERS_NONSTALL (2) +#define NVC06F_NOTIFIERS_EVENTBUFFER (3) +#define NVC06F_NOTIFIERS_IDLECHANNEL (4) +#define NVC06F_NOTIFIERS_ENDCTX (5) +#define NVC06F_NOTIFIERS_SW (6) +#define NVC06F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVC06F_NOTIFIERS_REPLAYABLE_FAULT (8) +#define NVC06F_NOTIFIERS_MAXCOUNT (9) + +/* NvNotification[] fields and values */ +#define NVC06F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVC06F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _clc06f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc076.h b/userspace/sdks/nv570/inc/class/clc076.h new file mode 100644 index 0000000..284c57a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc076.h @@ -0,0 +1,82 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc076_h_ +#define _clc076_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define GP100_UVM_SW (0x0000c076) + +#define NVC076_SET_OBJECT (0x00000000) +#define NVC076_NO_OPERATION (0x00000100) + +/* Method data fields to support gpu fault cancel. These are pushed in order by UVM */ + +#define NVC076_FAULT_CANCEL_A (0x00000104) +#define NVC076_FAULT_CANCEL_A_INST_APERTURE 1:0 +#define NVC076_FAULT_CANCEL_A_INST_APERTURE_VID_MEM 0x00000000 +#define NVC076_FAULT_CANCEL_A_INST_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC076_FAULT_CANCEL_A_INST_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 + +/* instance pointer is 4k aligned so those bits are reused to store the aperture */ +#define NVC076_FAULT_CANCEL_A_INST_LOW 31:12 + +#define NVC076_FAULT_CANCEL_B (0x00000108) +#define NVC076_FAULT_CANCEL_B_INST_HI 31:0 + +#define NVC076_FAULT_CANCEL_C (0x0000010c) +#define NVC076_FAULT_CANCEL_C_CLIENT_ID 5:0 +#define NVC076_FAULT_CANCEL_C_GPC_ID 10:6 +#define NVC076_FAULT_CANCEL_C_MODE 31:30 +#define NVC076_FAULT_CANCEL_C_MODE_TARGETED 0x00000000 +#define NVC076_FAULT_CANCEL_C_MODE_GLOBAL 0x00000001 + +/* Method data fields to support clearing faulted bit. These are pushed in order by UVM */ + +#define NVC076_CLEAR_FAULTED_A (0x00000110) + +#define NVC076_CLEAR_FAULTED_A_INST_APERTURE 1:0 +#define NVC076_CLEAR_FAULTED_A_INST_APERTURE_VID_MEM 0x00000000 +#define NVC076_CLEAR_FAULTED_A_INST_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC076_CLEAR_FAULTED_A_INST_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 + +#define NVC076_CLEAR_FAULTED_A_TYPE 2:2 +#define NVC076_CLEAR_FAULTED_A_TYPE_PBDMA_FAULTED 0x00000000 +#define NVC076_CLEAR_FAULTED_A_TYPE_ENG_FAULTED 0x00000001 + +/* instance pointer is 4k aligned */ +#define NVC076_CLEAR_FAULTED_A_INST_LOW 31:12 + +#define NVC076_CLEAR_FAULTED_B (0x00000114) +#define NVC076_CLEAR_FAULTED_B_INST_HI 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc076_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc097.h b/userspace/sdks/nv570/inc/class/clc097.h new file mode 100644 index 0000000..129056b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc097.h @@ -0,0 +1,4191 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_pascal_a_h_ +#define _cl_pascal_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl pascal_a */ + +#include "nvtypes.h" + +#define PASCAL_A 0xC097 + +#define NVC097_SET_OBJECT 0x0000 +#define NVC097_SET_OBJECT_CLASS_ID 15:0 +#define NVC097_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC097_NO_OPERATION 0x0100 +#define NVC097_NO_OPERATION_V 31:0 + +#define NVC097_SET_NOTIFY_A 0x0104 +#define NVC097_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC097_SET_NOTIFY_B 0x0108 +#define NVC097_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC097_NOTIFY 0x010c +#define NVC097_NOTIFY_TYPE 31:0 +#define NVC097_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC097_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC097_WAIT_FOR_IDLE 0x0110 +#define NVC097_WAIT_FOR_IDLE_V 31:0 + +#define NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVC097_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVC097_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVC097_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVC097_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVC097_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVC097_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVC097_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVC097_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVC097_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVC097_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVC097_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC097_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC097_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC097_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC097_SEND_GO_IDLE 0x013c +#define NVC097_SEND_GO_IDLE_V 31:0 + +#define NVC097_PM_TRIGGER 0x0140 +#define NVC097_PM_TRIGGER_V 31:0 + +#define NVC097_PM_TRIGGER_WFI 0x0144 +#define NVC097_PM_TRIGGER_WFI_V 31:0 + +#define NVC097_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC097_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC097_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC097_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC097_LINE_LENGTH_IN 0x0180 +#define NVC097_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC097_LINE_COUNT 0x0184 +#define NVC097_LINE_COUNT_VALUE 31:0 + +#define NVC097_OFFSET_OUT_UPPER 0x0188 +#define NVC097_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVC097_OFFSET_OUT 0x018c +#define NVC097_OFFSET_OUT_VALUE 31:0 + +#define NVC097_PITCH_OUT 0x0190 +#define NVC097_PITCH_OUT_VALUE 31:0 + +#define NVC097_SET_DST_BLOCK_SIZE 0x0194 +#define NVC097_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC097_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC097_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC097_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC097_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC097_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC097_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC097_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC097_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC097_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC097_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC097_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC097_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC097_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC097_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC097_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC097_SET_DST_WIDTH 0x0198 +#define NVC097_SET_DST_WIDTH_V 31:0 + +#define NVC097_SET_DST_HEIGHT 0x019c +#define NVC097_SET_DST_HEIGHT_V 31:0 + +#define NVC097_SET_DST_DEPTH 0x01a0 +#define NVC097_SET_DST_DEPTH_V 31:0 + +#define NVC097_SET_DST_LAYER 0x01a4 +#define NVC097_SET_DST_LAYER_V 31:0 + +#define NVC097_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC097_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC097_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC097_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC097_LAUNCH_DMA 0x01b0 +#define NVC097_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC097_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC097_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC097_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC097_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC097_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC097_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC097_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC097_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC097_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC097_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC097_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC097_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC097_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC097_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC097_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC097_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC097_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC097_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC097_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC097_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC097_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC097_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC097_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC097_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC097_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC097_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC097_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC097_LOAD_INLINE_DATA 0x01b4 +#define NVC097_LOAD_INLINE_DATA_V 31:0 + +#define NVC097_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC097_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC097_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC097_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC097_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC097_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC097_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC097_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC097_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC097_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC097_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC097_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC097_RUN_DS_NOW 0x0200 +#define NVC097_RUN_DS_NOW_V 31:0 + +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVC097_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVC097_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVC097_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVC097_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVC097_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVC097_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVC097_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVC097_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVC097_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_GS_DM_FIFO 0x0214 +#define NVC097_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVC097_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVC097_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVC097_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVC097_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC097_INVALIDATE_SHADER_CACHES 0x021c +#define NVC097_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC097_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC097_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC097_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC097_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC097_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC097_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC097_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC097_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC097_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC097_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC097_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC097_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC097_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC097_INCREMENT_SYNC_POINT 0x02c8 +#define NVC097_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVC097_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVC097_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVC097_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVC097_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVC097_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVC097_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE 0x02d0 +#define NVC097_SET_PRIM_CIRCULAR_BUFFER_THROTTLE_PRIM_AREA 21:0 + +#define NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVC097_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVC097_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVC097_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 21:0 + +#define NVC097_DECOMPRESS_SURFACE 0x02e0 +#define NVC097_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVC097_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVC097_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVC097_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVC097_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVC097_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVC097_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVC097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVC097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVC097_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVC097_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVC097_SET_ZCULL_SUBREGION 0x02e8 +#define NVC097_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVC097_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVC097_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVC097_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVC097_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVC097_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVC097_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVC097_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVC097_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVC097_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVC097_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVC097_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVC097_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVC097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVC097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVC097_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC097_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVC097_DRAW_ZERO_INDEX 0x0304 +#define NVC097_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVC097_SET_L1_CONFIGURATION 0x0308 +#define NVC097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVC097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVC097_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVC097_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVC097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVC097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVC097_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVC097_SET_SPA_VERSION 0x0310 +#define NVC097_SET_SPA_VERSION_MINOR 7:0 +#define NVC097_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC097_SET_IEEE_CLEAN_UPDATE 0x0314 +#define NVC097_SET_IEEE_CLEAN_UPDATE_ENABLE 0:0 +#define NVC097_SET_IEEE_CLEAN_UPDATE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_IEEE_CLEAN_UPDATE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_SNAP_GRID_LINE 0x0318 +#define NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC097_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC097_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVC097_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC097_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC097_SET_SNAP_GRID_NON_LINE 0x031c +#define NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC097_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVC097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC097_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC097_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVC097_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVC097_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVC097_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVC097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVC097_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVC097_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVC097_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVC097_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVC097_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVC097_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVC097_SET_TESSELLATION_LOD_V1 0x0330 +#define NVC097_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVC097_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVC097_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVC097_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVC097_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVC097_RESERVED_TG07 0x033c +#define NVC097_RESERVED_TG07_V 0:0 + +#define NVC097_RESERVED_TG08 0x0340 +#define NVC097_RESERVED_TG08_V 0:0 + +#define NVC097_RESERVED_TG09 0x0344 +#define NVC097_RESERVED_TG09_V 0:0 + +#define NVC097_RESERVED_TG10 0x0348 +#define NVC097_RESERVED_TG10_V 0:0 + +#define NVC097_RESERVED_TG11 0x034c +#define NVC097_RESERVED_TG11_V 0:0 + +#define NVC097_RESERVED_TG12 0x0350 +#define NVC097_RESERVED_TG12_V 0:0 + +#define NVC097_RESERVED_TG13 0x0354 +#define NVC097_RESERVED_TG13_V 0:0 + +#define NVC097_RESERVED_TG14 0x0358 +#define NVC097_RESERVED_TG14_V 0:0 + +#define NVC097_RESERVED_TG15 0x035c +#define NVC097_RESERVED_TG15_V 0:0 + +#define NVC097_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVC097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVC097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVC097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVC097_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVC097_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVC097_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVC097_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVC097_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVC097_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVC097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVC097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVC097_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC097_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVC097_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVC097_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVC097_SET_RASTER_ENABLE 0x037c +#define NVC097_SET_RASTER_ENABLE_V 0:0 +#define NVC097_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVC097_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVC097_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVC097_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVC097_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVC097_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVC097_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVC097_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVC097_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVC097_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVC097_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVC097_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVC097_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVC097_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVC097_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVC097_SET_RASTER_INPUT 0x0740 +#define NVC097_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVC097_SET_STREAM_OUTPUT 0x0744 +#define NVC097_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVC097_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_ALPHA_FRACTION 0x074c +#define NVC097_SET_ALPHA_FRACTION_V 7:0 + +#define NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 +#define NVC097_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES_EXTENDED 5:5 + +#define NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVC097_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC097_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC097_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVC097_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC097_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC097_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVC097_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVC097_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVC097_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVC097_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVC097_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVC097_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVC097_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM 0x07ac +#define NVC097_SET_ISBE_SAVE_RESTORE_PROGRAM_OFFSET 31:0 + +#define NVC097_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVC097_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVC097_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVC097_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVC097_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVC097_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVC097_SET_CULL_BEFORE_FETCH 0x07dc +#define NVC097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVC097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVC097_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVC097_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVC097_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVC097_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVC097_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVC097_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVC097_SET_ZCULL_STORAGE_A 0x07e8 +#define NVC097_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVC097_SET_ZCULL_STORAGE_B 0x07ec +#define NVC097_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVC097_SET_ZCULL_STORAGE_C 0x07f0 +#define NVC097_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC097_SET_ZCULL_STORAGE_D 0x07f4 +#define NVC097_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC097_SET_ZT_READ_ONLY 0x07f8 +#define NVC097_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVC097_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVC097_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVC097_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVC097_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVC097_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVC097_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVC097_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVC097_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVC097_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVC097_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVC097_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVC097_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVC097_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVC097_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVC097_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVC097_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVC097_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVC097_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVC097_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVC097_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVC097_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVC097_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVC097_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVC097_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVC097_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC097_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVC097_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVC097_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC097_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVC097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC097_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVC097_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVC097_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVC097_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVC097_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVC097_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVC097_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVC097_SET_COLOR_TARGET_MARK(j) (0x0824+(j)*64) +#define NVC097_SET_COLOR_TARGET_MARK_IEEE_CLEAN 0:0 +#define NVC097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVC097_SET_COLOR_TARGET_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVC097_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVC097_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVC097_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVC097_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVC097_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVC097_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVC097_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVC097_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVC097_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVC097_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVC097_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVC097_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE(j) (0x0a18+(j)*32) +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X 2:0 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X 0x00000000 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X 0x00000001 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y 0x00000002 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y 0x00000003 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z 0x00000004 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z 0x00000005 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W 0x00000006 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W 0x00000007 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y 6:4 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X 0x00000000 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X 0x00000001 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y 0x00000002 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y 0x00000003 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z 0x00000004 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z 0x00000005 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W 0x00000006 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W 0x00000007 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z 10:8 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X 0x00000000 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X 0x00000001 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y 0x00000002 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y 0x00000003 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z 0x00000004 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z 0x00000005 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W 0x00000006 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W 0x00000007 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W 14:12 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X 0x00000000 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X 0x00000001 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y 0x00000002 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y 0x00000003 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z 0x00000004 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z 0x00000005 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W 0x00000006 +#define NVC097_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W 0x00000007 + +#define NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(j) (0x0a1c+(j)*32) +#define NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_X_BITS 4:0 +#define NVC097_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_Y_BITS 12:8 + +#define NVC097_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVC097_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVC097_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC097_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVC097_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVC097_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC097_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVC097_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVC097_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVC097_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVC097_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVC097_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVC097_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVC097_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVC097_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVC097_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVC097_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVC097_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVC097_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVC097_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVC097_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVC097_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVC097_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC097_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVC097_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVC097_SET_STATISTICS_COUNTER 0x0d68 +#define NVC097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVC097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVC097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVC097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVC097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVC097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVC097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVC097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVC097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVC097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVC097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVC097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVC097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVC097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVC097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVC097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVC097_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC097_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC097_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVC097_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC097_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC097_SET_VERTEX_ARRAY_START 0x0d74 +#define NVC097_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVC097_DRAW_VERTEX_ARRAY 0x0d78 +#define NVC097_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVC097_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVC097_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVC097_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVC097_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVC097_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVC097_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVC097_SET_Z_CLEAR_VALUE 0x0d90 +#define NVC097_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVC097_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC097_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC097_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVC097_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVC097_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVC097_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC097_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC097_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVC097_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVC097_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVC097_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVC097_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVC097_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVC097_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVC097_SET_FRONT_POLYGON_MODE 0x0dac +#define NVC097_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVC097_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC097_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC097_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC097_SET_BACK_POLYGON_MODE 0x0db0 +#define NVC097_SET_BACK_POLYGON_MODE_V 31:0 +#define NVC097_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC097_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC097_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC097_SET_POLY_SMOOTH 0x0db4 +#define NVC097_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVC097_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVC097_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_ZT_MARK 0x0db8 +#define NVC097_SET_ZT_MARK_IEEE_CLEAN 0:0 +#define NVC097_SET_ZT_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVC097_SET_ZT_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVC097_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVC097_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVC097_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVC097_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVC097_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVC097_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVC097_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVC097_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVC097_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVC097_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVC097_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVC097_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVC097_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_PATCH 0x0dcc +#define NVC097_SET_PATCH_SIZE 7:0 + +#define NVC097_SET_ITERATED_BLEND 0x0dd0 +#define NVC097_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVC097_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVC097_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVC097_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVC097_SET_ZCULL_CRITERION 0x0dd8 +#define NVC097_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVC097_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVC097_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVC097_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVC097_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVC097_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVC097_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVC097_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVC097_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVC097_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVC097_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVC097_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVC097_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVC097_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVC097_SET_ZCULL_CRITERION_SREF 23:16 +#define NVC097_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVC097_PIXEL_SHADER_BARRIER 0x0de0 +#define NVC097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVC097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVC097_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC097_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVC097_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVC097_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVC097_SET_WINDOW_OFFSET_X 0x0df8 +#define NVC097_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVC097_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVC097_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVC097_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVC097_SET_SCISSOR_ENABLE_V 0:0 +#define NVC097_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVC097_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVC097_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVC097_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVC097_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVC097_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVC097_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVC097_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS 0x0f10 +#define NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V 0:0 +#define NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE 0x00000000 +#define NVC097_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE 0x00000001 + +#define NVC097_SET_VPC_PERF_KNOB 0x0f14 +#define NVC097_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVC097_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVC097_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVC097_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVC097_PM_LOCAL_TRIGGER 0x0f18 +#define NVC097_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVC097_SET_POST_Z_PS_IMASK 0x0f1c +#define NVC097_SET_POST_Z_PS_IMASK_ENABLE 0:0 +#define NVC097_SET_POST_Z_PS_IMASK_ENABLE_FALSE 0x00000000 +#define NVC097_SET_POST_Z_PS_IMASK_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVC097_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVC097_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVC097_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVC097_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVC097_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVC097_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVC097_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVC097_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVC097_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVC097_SET_BACK_STENCIL_MASK 0x0f58 +#define NVC097_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVC097_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVC097_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVC097_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVC097_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVC097_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVC097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVC097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVC097_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVC097_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVC097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVC097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC097_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVC097_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVC097_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVC097_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVC097_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVC097_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVC097_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVC097_SET_SAMPLE_MASK 0x0fa4 +#define NVC097_SET_SAMPLE_MASK_RASTER_OUT_ENABLE 0:0 +#define NVC097_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE 0x00000001 +#define NVC097_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE 4:4 +#define NVC097_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE 0x00000000 +#define NVC097_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_COLOR_TARGET_SAMPLE_MASK 0x0fa8 +#define NVC097_SET_COLOR_TARGET_SAMPLE_MASK_V 15:0 + +#define NVC097_SET_CT_MRT_ENABLE 0x0fac +#define NVC097_SET_CT_MRT_ENABLE_V 0:0 +#define NVC097_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVC097_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVC097_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVC097_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVC097_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVC097_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVC097_SET_TIR 0x0fb4 +#define NVC097_SET_TIR_MODE 1:0 +#define NVC097_SET_TIR_MODE_DISABLED 0x00000000 +#define NVC097_SET_TIR_MODE_RASTER_N_TARGET_M 0x00000001 + +#define NVC097_SET_ANTI_ALIAS_RASTER 0x0fb8 +#define NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES 2:0 +#define NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1 0x00000000 +#define NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2 0x00000002 +#define NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC097_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4 0x00000006 + +#define NVC097_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVC097_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVC097_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVC097_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVC097_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVC097_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVC097_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVC097_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVC097_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVC097_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVC097_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_TIR_MODULATION 0x0fd4 +#define NVC097_SET_TIR_MODULATION_COMPONENT_SELECT 1:0 +#define NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION 0x00000000 +#define NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB 0x00000001 +#define NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY 0x00000002 +#define NVC097_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA 0x00000003 + +#define NVC097_SET_TIR_MODULATION_FUNCTION 0x0fd8 +#define NVC097_SET_TIR_MODULATION_FUNCTION_SELECT 0:0 +#define NVC097_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR 0x00000000 +#define NVC097_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE 0x00000001 + +#define NVC097_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVC097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVC097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVC097_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVC097_SET_ZT_A 0x0fe0 +#define NVC097_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_ZT_B 0x0fe4 +#define NVC097_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_ZT_FORMAT 0x0fe8 +#define NVC097_SET_ZT_FORMAT_V 4:0 +#define NVC097_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVC097_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVC097_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVC097_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVC097_SET_ZT_FORMAT_V_S8 0x00000017 +#define NVC097_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVC097_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVC097_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVC097_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVC097_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVC097_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVC097_SET_ZT_BLOCK_SIZE 0x0fec +#define NVC097_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVC097_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC097_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC097_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC097_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVC097_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC097_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVC097_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVC097_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVC097_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVC097_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC097_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVC097_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVC097_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC097_SET_TILED_CACHE_BUNDLE_CONTROL 0x0ffc +#define NVC097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT 0:0 +#define NVC097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_FALSE 0x00000000 +#define NVC097_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_TRUE 0x00000001 + +#define NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC097_SET_VIEWPORT_MULTICAST 0x1004 +#define NVC097_SET_VIEWPORT_MULTICAST_ORDER 0:0 +#define NVC097_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER 0x00000000 +#define NVC097_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER 0x00000001 + +#define NVC097_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVC097_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVC097_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVC097_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVC097_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVC097_SET_RESERVED_SW_METHOD00 0x1014 +#define NVC097_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVC097_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC097_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVC097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVC097_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_RESERVED_SW_METHOD01 0x1028 +#define NVC097_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD02 0x102c +#define NVC097_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) (0x1030+(i)*4) +#define NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE_V0 7:0 +#define NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE_V1 15:8 +#define NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE_V2 23:16 +#define NVC097_SET_TIR_MODULATION_COEFFICIENT_TABLE_V3 31:24 + +#define NVC097_SET_SPARE_NOOP01 0x1044 +#define NVC097_SET_SPARE_NOOP01_V 31:0 + +#define NVC097_SET_SPARE_NOOP02 0x1048 +#define NVC097_SET_SPARE_NOOP02_V 31:0 + +#define NVC097_SET_SPARE_NOOP03 0x104c +#define NVC097_SET_SPARE_NOOP03_V 31:0 + +#define NVC097_SET_SPARE_NOOP04 0x1050 +#define NVC097_SET_SPARE_NOOP04_V 31:0 + +#define NVC097_SET_SPARE_NOOP05 0x1054 +#define NVC097_SET_SPARE_NOOP05_V 31:0 + +#define NVC097_SET_SPARE_NOOP06 0x1058 +#define NVC097_SET_SPARE_NOOP06_V 31:0 + +#define NVC097_SET_SPARE_NOOP07 0x105c +#define NVC097_SET_SPARE_NOOP07_V 31:0 + +#define NVC097_SET_SPARE_NOOP08 0x1060 +#define NVC097_SET_SPARE_NOOP08_V 31:0 + +#define NVC097_SET_SPARE_NOOP09 0x1064 +#define NVC097_SET_SPARE_NOOP09_V 31:0 + +#define NVC097_SET_SPARE_NOOP10 0x1068 +#define NVC097_SET_SPARE_NOOP10_V 31:0 + +#define NVC097_SET_SPARE_NOOP11 0x106c +#define NVC097_SET_SPARE_NOOP11_V 31:0 + +#define NVC097_SET_SPARE_NOOP12 0x1070 +#define NVC097_SET_SPARE_NOOP12_V 31:0 + +#define NVC097_SET_SPARE_NOOP13 0x1074 +#define NVC097_SET_SPARE_NOOP13_V 31:0 + +#define NVC097_SET_SPARE_NOOP14 0x1078 +#define NVC097_SET_SPARE_NOOP14_V 31:0 + +#define NVC097_SET_SPARE_NOOP15 0x107c +#define NVC097_SET_SPARE_NOOP15_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVC097_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVC097_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVC097_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD06 0x10bc +#define NVC097_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVC097_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVC097_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVC097_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVC097_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVC097_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVC097_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVC097_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD13 0x10dc +#define NVC097_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC097_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVC097_UNBIND_ALL 0x10f4 +#define NVC097_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVC097_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVC097_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVC097_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVC097_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC097_SET_RESERVED_SW_METHOD14 0x1100 +#define NVC097_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC097_SET_RESERVED_SW_METHOD15 0x1104 +#define NVC097_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC097_NO_OPERATION_DATA_HI 0x110c +#define NVC097_NO_OPERATION_DATA_HI_V 31:0 + +#define NVC097_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVC097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVC097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVC097_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVC097_PM_TRIGGER_END 0x1114 +#define NVC097_PM_TRIGGER_END_V 31:0 + +#define NVC097_SET_VERTEX_ID_BASE 0x1118 +#define NVC097_SET_VERTEX_ID_BASE_V 31:0 + +#define NVC097_SET_STENCIL_COMPRESSION 0x111c +#define NVC097_SET_STENCIL_COMPRESSION_ENABLE 0:0 +#define NVC097_SET_STENCIL_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STENCIL_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC097_SET_TIR_CONTROL 0x1130 +#define NVC097_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES 0:0 +#define NVC097_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC097_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC097_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES 4:4 +#define NVC097_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC097_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC097_SET_TIR_CONTROL_REDUCE_COVERAGE 1:1 +#define NVC097_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE 0x00000000 +#define NVC097_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE 0x00000001 + +#define NVC097_SET_MUTABLE_METHOD_CONTROL 0x1134 +#define NVC097_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT 0:0 +#define NVC097_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE 0x00000000 +#define NVC097_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE 0x00000001 + +#define NVC097_SET_POST_PS_INITIAL_COVERAGE 0x1138 +#define NVC097_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE 0:0 +#define NVC097_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE 0x00000000 +#define NVC097_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE 0x00000001 + +#define NVC097_SET_FILL_VIA_TRIANGLE 0x113c +#define NVC097_SET_FILL_VIA_TRIANGLE_MODE 1:0 +#define NVC097_SET_FILL_VIA_TRIANGLE_MODE_DISABLED 0x00000000 +#define NVC097_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL 0x00000001 +#define NVC097_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX 0x00000002 + +#define NVC097_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVC097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVC097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVC097_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVC097_FLUSH_PENDING_WRITES 0x1144 +#define NVC097_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVC097_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVC097_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC097_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC097_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC097_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVC097_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC097_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC097_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) (0x11e0+(i)*4) +#define NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X0 3:0 +#define NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y0 7:4 +#define NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X1 11:8 +#define NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y1 15:12 +#define NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X2 19:16 +#define NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y2 23:20 +#define NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X3 27:24 +#define NVC097_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y3 31:28 + +#define NVC097_SET_OFFSET_RENDER_TARGET_INDEX 0x11f0 +#define NVC097_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX 0:0 +#define NVC097_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE 0x00000000 +#define NVC097_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE 0x00000001 + +#define NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC 0x11f4 +#define NVC097_FORCE_HEAVYWEIGHT_METHOD_SYNC_V 31:0 + +#define NVC097_SET_COVERAGE_TO_COLOR 0x11f8 +#define NVC097_SET_COVERAGE_TO_COLOR_ENABLE 0:0 +#define NVC097_SET_COVERAGE_TO_COLOR_ENABLE_FALSE 0x00000000 +#define NVC097_SET_COVERAGE_TO_COLOR_ENABLE_TRUE 0x00000001 +#define NVC097_SET_COVERAGE_TO_COLOR_CT_SELECT 6:4 + +#define NVC097_DECOMPRESS_ZETA_SURFACE 0x11fc +#define NVC097_DECOMPRESS_ZETA_SURFACE_Z_ENABLE 0:0 +#define NVC097_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC097_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC097_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE 4:4 +#define NVC097_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC097_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_SCREEN_STATE_MASK 0x1204 +#define NVC097_SET_SCREEN_STATE_MASK_MASK 3:0 + +#define NVC097_SET_ZT_SPARSE 0x1208 +#define NVC097_SET_ZT_SPARSE_ENABLE 0:0 +#define NVC097_SET_ZT_SPARSE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZT_SPARSE_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ZT_SPARSE_UNMAPPED_COMPARE 1:1 +#define NVC097_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 0x00000000 +#define NVC097_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS 0x00000001 + +#define NVC097_INVALIDATE_SAMPLER_CACHE_ALL 0x120c +#define NVC097_INVALIDATE_SAMPLER_CACHE_ALL_V 0:0 + +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL 0x1210 +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_ALL_V 0:0 + +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC097_SET_CT_SELECT 0x121c +#define NVC097_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVC097_SET_CT_SELECT_TARGET0 6:4 +#define NVC097_SET_CT_SELECT_TARGET1 9:7 +#define NVC097_SET_CT_SELECT_TARGET2 12:10 +#define NVC097_SET_CT_SELECT_TARGET3 15:13 +#define NVC097_SET_CT_SELECT_TARGET4 18:16 +#define NVC097_SET_CT_SELECT_TARGET5 21:19 +#define NVC097_SET_CT_SELECT_TARGET6 24:22 +#define NVC097_SET_CT_SELECT_TARGET7 27:25 + +#define NVC097_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVC097_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL 0x1224 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE 1:0 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT 0x00000000 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE 0x00000001 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL 0x00000002 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE 2:2 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 0x00000000 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 0x00000001 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER 3:3 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED 0x00000000 +#define NVC097_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED 0x00000001 + +#define NVC097_SET_ZT_SIZE_A 0x1228 +#define NVC097_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVC097_SET_ZT_SIZE_B 0x122c +#define NVC097_SET_ZT_SIZE_B_HEIGHT 17:0 + +#define NVC097_SET_ZT_SIZE_C 0x1230 +#define NVC097_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVC097_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVC097_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC097_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVC097_SET_SAMPLER_BINDING 0x1234 +#define NVC097_SET_SAMPLER_BINDING_V 0:0 +#define NVC097_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVC097_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVC097_DRAW_AUTO 0x123c +#define NVC097_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) (0x1240+(i)*4) +#define NVC097_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK_V 31:0 + +#define NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE 0x1260 +#define NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_INDEX 7:0 +#define NVC097_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_VALUE 23:8 + +#define NVC097_SET_BACK_END_COPY_A 0x1264 +#define NVC097_SET_BACK_END_COPY_A_DWORDS 7:0 +#define NVC097_SET_BACK_END_COPY_A_SATURATE32_ENABLE 8:8 +#define NVC097_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE 0x00000000 +#define NVC097_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE 0x00000001 +#define NVC097_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE 12:12 +#define NVC097_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE 0x00000000 +#define NVC097_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_BACK_END_COPY_B 0x1268 +#define NVC097_SET_BACK_END_COPY_B_SRC_ADDRESS_UPPER 7:0 + +#define NVC097_SET_BACK_END_COPY_C 0x126c +#define NVC097_SET_BACK_END_COPY_C_SRC_ADDRESS_LOWER 31:0 + +#define NVC097_SET_BACK_END_COPY_D 0x1270 +#define NVC097_SET_BACK_END_COPY_D_DEST_ADDRESS_UPPER 7:0 + +#define NVC097_SET_BACK_END_COPY_E 0x1274 +#define NVC097_SET_BACK_END_COPY_E_DEST_ADDRESS_LOWER 31:0 + +#define NVC097_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVC097_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 21:0 + +#define NVC097_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVC097_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVC097_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVC097_CLEAR_ZCULL_REGION 0x12c8 +#define NVC097_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVC097_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVC097_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVC097_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVC097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC097_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVC097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC097_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVC097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVC097_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVC097_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVC097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVC097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVC097_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVC097_SET_DEPTH_TEST 0x12cc +#define NVC097_SET_DEPTH_TEST_ENABLE 0:0 +#define NVC097_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVC097_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_FILL_MODE 0x12d0 +#define NVC097_SET_FILL_MODE_V 31:0 +#define NVC097_SET_FILL_MODE_V_POINT 0x00000001 +#define NVC097_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVC097_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVC097_SET_SHADE_MODE 0x12d4 +#define NVC097_SET_SHADE_MODE_V 31:0 +#define NVC097_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVC097_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVC097_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVC097_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC097_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVC097_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVC097_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVC097_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVC097_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVC097_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_DEPTH_WRITE 0x12e8 +#define NVC097_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVC097_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_ALPHA_TEST 0x12ec +#define NVC097_SET_ALPHA_TEST_ENABLE 0:0 +#define NVC097_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVC097_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVC097_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVC097_DRAW_INLINE_INDEX4X8 0x1304 +#define NVC097_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVC097_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVC097_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVC097_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVC097_D3D_SET_CULL_MODE 0x1308 +#define NVC097_D3D_SET_CULL_MODE_V 31:0 +#define NVC097_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVC097_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVC097_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVC097_SET_DEPTH_FUNC 0x130c +#define NVC097_SET_DEPTH_FUNC_V 31:0 +#define NVC097_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVC097_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVC097_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC097_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC097_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVC097_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC097_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC097_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC097_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVC097_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVC097_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC097_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC097_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVC097_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC097_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC097_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC097_SET_ALPHA_REF 0x1310 +#define NVC097_SET_ALPHA_REF_V 31:0 + +#define NVC097_SET_ALPHA_FUNC 0x1314 +#define NVC097_SET_ALPHA_FUNC_V 31:0 +#define NVC097_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVC097_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVC097_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC097_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC097_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVC097_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC097_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC097_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC097_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVC097_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVC097_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC097_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC097_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVC097_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC097_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC097_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC097_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVC097_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVC097_SET_BLEND_CONST_RED 0x131c +#define NVC097_SET_BLEND_CONST_RED_V 31:0 + +#define NVC097_SET_BLEND_CONST_GREEN 0x1320 +#define NVC097_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVC097_SET_BLEND_CONST_BLUE 0x1324 +#define NVC097_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVC097_SET_BLEND_CONST_ALPHA 0x1328 +#define NVC097_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVC097_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC097_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC097_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC097_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC097_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC097_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC097_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVC097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC097_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_BLEND_COLOR_OP 0x1340 +#define NVC097_SET_BLEND_COLOR_OP_V 31:0 +#define NVC097_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC097_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC097_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC097_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC097_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC097_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC097_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC097_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC097_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC097_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC097_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC097_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC097_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC097_SET_BLEND_ALPHA_OP 0x134c +#define NVC097_SET_BLEND_ALPHA_OP_V 31:0 +#define NVC097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC097_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC097_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC097_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC097_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC097_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC097_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC097_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC097_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC097_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC097_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVC097_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVC097_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVC097_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC097_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC097_SET_SINGLE_ROP_CONTROL 0x135c +#define NVC097_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVC097_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC097_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_BLEND(i) (0x1360+(i)*4) +#define NVC097_SET_BLEND_ENABLE 0:0 +#define NVC097_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVC097_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_STENCIL_TEST 0x1380 +#define NVC097_SET_STENCIL_TEST_ENABLE 0:0 +#define NVC097_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC097_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_STENCIL_OP_FAIL 0x1384 +#define NVC097_SET_STENCIL_OP_FAIL_V 31:0 +#define NVC097_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC097_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC097_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC097_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC097_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC097_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC097_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC097_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC097_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC097_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC097_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC097_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC097_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC097_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC097_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC097_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC097_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVC097_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC097_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC097_SET_STENCIL_OP_ZPASS 0x138c +#define NVC097_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVC097_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC097_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC097_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC097_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC097_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC097_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC097_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC097_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC097_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC097_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC097_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC097_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC097_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC097_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC097_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC097_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC097_SET_STENCIL_FUNC 0x1390 +#define NVC097_SET_STENCIL_FUNC_V 31:0 +#define NVC097_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC097_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC097_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC097_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC097_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC097_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC097_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC097_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC097_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC097_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC097_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC097_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC097_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC097_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC097_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC097_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC097_SET_STENCIL_FUNC_REF 0x1394 +#define NVC097_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVC097_SET_STENCIL_FUNC_MASK 0x1398 +#define NVC097_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVC097_SET_STENCIL_MASK 0x139c +#define NVC097_SET_STENCIL_MASK_V 7:0 + +#define NVC097_SET_DRAW_AUTO_START 0x13a4 +#define NVC097_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVC097_SET_PS_SATURATE 0x13a8 +#define NVC097_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVC097_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVC097_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC097_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVC097_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVC097_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC097_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVC097_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVC097_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC097_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVC097_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVC097_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC097_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVC097_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVC097_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC097_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVC097_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVC097_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC097_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVC097_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVC097_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC097_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVC097_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVC097_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC097_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVC097_SET_WINDOW_ORIGIN 0x13ac +#define NVC097_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVC097_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVC097_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVC097_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVC097_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVC097_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVC097_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVC097_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC097_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVC097_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC097_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVC097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVC097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_ALPHA_HYSTERESIS 0x1420 +#define NVC097_SET_ALPHA_HYSTERESIS_ROUNDS_OF_ALPHA 7:0 + +#define NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC097_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC097_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC097_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVC097_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVC097_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVC097_SET_PS_WARP_WATERMARKS 0x1450 +#define NVC097_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVC097_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVC097_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVC097_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVC097_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC097_STORE_ZCULL 0x1464 +#define NVC097_STORE_ZCULL_V 0:0 + +#define NVC097_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVC097_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVC097_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVC097_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVC097_LOAD_ZCULL 0x1500 +#define NVC097_LOAD_ZCULL_V 0:0 + +#define NVC097_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVC097_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC097_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC097_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC097_SET_USER_CLIP_ENABLE 0x1510 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVC097_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVC097_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVC097_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVC097_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_POINT_SIZE 0x1518 +#define NVC097_SET_POINT_SIZE_V 31:0 + +#define NVC097_SET_ZCULL_STATS 0x151c +#define NVC097_SET_ZCULL_STATS_ENABLE 0:0 +#define NVC097_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_POINT_SPRITE 0x1520 +#define NVC097_SET_POINT_SPRITE_ENABLE 0:0 +#define NVC097_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC097_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC097_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC097_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC097_CLEAR_REPORT_VALUE 0x1530 +#define NVC097_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVC097_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVC097_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVC097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVC097_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVC097_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVC097_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVC097_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 + +#define NVC097_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVC097_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVC097_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVC097_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVC097_SET_ZT_SELECT 0x1538 +#define NVC097_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVC097_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVC097_SET_RENDER_ENABLE_A 0x1550 +#define NVC097_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_RENDER_ENABLE_B 0x1554 +#define NVC097_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_RENDER_ENABLE_C 0x1558 +#define NVC097_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC097_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC097_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC097_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC097_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC097_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC097_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC097_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC097_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC097_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVC097_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVC097_SET_ANTI_ALIASED_LINE 0x1570 +#define NVC097_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVC097_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC097_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC097_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_TEX_HEADER_POOL_C 0x157c +#define NVC097_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC097_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVC097_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVC097_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVC097_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVC097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC097_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC097_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC097_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC097_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC097_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC097_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVC097_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVC097_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC097_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC097_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC097_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC097_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC097_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC097_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC097_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC097_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC097_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC097_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC097_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC097_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC097_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC097_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC097_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC097_SET_SRGB_WRITE 0x15b8 +#define NVC097_SET_SRGB_WRITE_ENABLE 0:0 +#define NVC097_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_DEPTH_BIAS 0x15bc +#define NVC097_SET_DEPTH_BIAS_V 31:0 + +#define NVC097_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVC097_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVC097_SET_RT_LAYER 0x15cc +#define NVC097_SET_RT_LAYER_V 15:0 +#define NVC097_SET_RT_LAYER_CONTROL 16:16 +#define NVC097_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVC097_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVC097_SET_ANTI_ALIAS 0x15d0 +#define NVC097_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVC097_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVC097_SET_EDGE_FLAG 0x15e4 +#define NVC097_SET_EDGE_FLAG_V 0:0 +#define NVC097_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVC097_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVC097_DRAW_INLINE_INDEX 0x15e8 +#define NVC097_DRAW_INLINE_INDEX_V 31:0 + +#define NVC097_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVC097_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVC097_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVC097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVC097_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVC097_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVC097_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVC097_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVC097_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVC097_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVC097_SET_POINT_SPRITE_SELECT 0x1604 +#define NVC097_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVC097_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVC097_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVC097_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVC097_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVC097_SET_PROGRAM_REGION_A 0x1608 +#define NVC097_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVC097_SET_PROGRAM_REGION_B 0x160c +#define NVC097_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVC097_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVC097_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVC097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVC097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVC097_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVC097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVC097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVC097_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVC097_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVC097_END 0x1614 +#define NVC097_END_V 0:0 + +#define NVC097_BEGIN 0x1618 +#define NVC097_BEGIN_OP 15:0 +#define NVC097_BEGIN_OP_POINTS 0x00000000 +#define NVC097_BEGIN_OP_LINES 0x00000001 +#define NVC097_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVC097_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVC097_BEGIN_OP_TRIANGLES 0x00000004 +#define NVC097_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVC097_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVC097_BEGIN_OP_QUADS 0x00000007 +#define NVC097_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVC097_BEGIN_OP_POLYGON 0x00000009 +#define NVC097_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVC097_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVC097_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_BEGIN_OP_PATCH 0x0000000E +#define NVC097_BEGIN_PRIMITIVE_ID 24:24 +#define NVC097_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC097_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC097_BEGIN_INSTANCE_ID 27:26 +#define NVC097_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVC097_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC097_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC097_BEGIN_SPLIT_MODE 30:29 +#define NVC097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC097_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC097_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC097_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 + +#define NVC097_SET_VERTEX_ID_COPY 0x161c +#define NVC097_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVC097_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVC097_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVC097_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVC097_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVC097_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVC097_LOAD_PRIMITIVE_ID 0x1624 +#define NVC097_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVC097_SET_SHADER_BASED_CULL 0x162c +#define NVC097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVC097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVC097_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVC097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVC097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVC097_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_CLASS_VERSION 0x1638 +#define NVC097_SET_CLASS_VERSION_CURRENT 15:0 +#define NVC097_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC097_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVC097_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVC097_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVC097_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVC097_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVC097_SET_DA_OUTPUT 0x164c +#define NVC097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVC097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVC097_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVC097_SET_ANTI_ALIASED_POINT 0x1658 +#define NVC097_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVC097_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_POINT_CENTER_MODE 0x165c +#define NVC097_SET_POINT_CENTER_MODE_V 31:0 +#define NVC097_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVC097_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVC097_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVC097_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVC097_SET_LINE_STIPPLE 0x166c +#define NVC097_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVC097_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVC097_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVC097_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVC097_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVC097_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVC097_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVC097_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVC097_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVC097_SET_PROVOKING_VERTEX 0x1684 +#define NVC097_SET_PROVOKING_VERTEX_V 0:0 +#define NVC097_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVC097_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVC097_SET_TWO_SIDED_LIGHT 0x1688 +#define NVC097_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVC097_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_POLYGON_STIPPLE 0x168c +#define NVC097_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVC097_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_SHADER_CONTROL 0x1690 +#define NVC097_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVC097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVC097_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVC097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVC097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVC097_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVC097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVC097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVC097_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVC097_CHECK_CLASS_VERSION 0x16a0 +#define NVC097_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVC097_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC097_SET_SPH_VERSION 0x16a4 +#define NVC097_SET_SPH_VERSION_CURRENT 15:0 +#define NVC097_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC097_CHECK_SPH_VERSION 0x16a8 +#define NVC097_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVC097_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVC097_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVC097_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVC097_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVC097_SET_AAM_VERSION 0x1790 +#define NVC097_SET_AAM_VERSION_CURRENT 15:0 +#define NVC097_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC097_CHECK_AAM_VERSION 0x1794 +#define NVC097_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVC097_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC097_SET_ZT_LAYER 0x179c +#define NVC097_SET_ZT_LAYER_OFFSET 15:0 + +#define NVC097_SET_INDEX_BUFFER_A 0x17c8 +#define NVC097_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVC097_SET_INDEX_BUFFER_B 0x17cc +#define NVC097_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVC097_SET_INDEX_BUFFER_C 0x17d0 +#define NVC097_SET_INDEX_BUFFER_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC097_SET_INDEX_BUFFER_D 0x17d4 +#define NVC097_SET_INDEX_BUFFER_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC097_SET_INDEX_BUFFER_E 0x17d8 +#define NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVC097_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVC097_SET_INDEX_BUFFER_F 0x17dc +#define NVC097_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVC097_DRAW_INDEX_BUFFER 0x17e0 +#define NVC097_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC097_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVC097_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVC097_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVC097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVC097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVC097_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVC097_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVC097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVC097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVC097_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVC097_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVC097_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVC097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVC097_OGL_SET_CULL 0x1918 +#define NVC097_OGL_SET_CULL_ENABLE 0:0 +#define NVC097_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVC097_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVC097_OGL_SET_FRONT_FACE 0x191c +#define NVC097_OGL_SET_FRONT_FACE_V 31:0 +#define NVC097_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVC097_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVC097_OGL_SET_CULL_FACE 0x1920 +#define NVC097_OGL_SET_CULL_FACE_V 31:0 +#define NVC097_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVC097_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVC097_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVC097_SET_VIEWPORT_PIXEL 0x1924 +#define NVC097_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVC097_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVC097_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVC097_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVC097_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVC097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVC097_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP 0x00000006 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVC097_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVC097_SET_USER_CLIP_OP 0x1940 +#define NVC097_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVC097_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVC097_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVC097_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVC097_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVC097_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVC097_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVC097_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVC097_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVC097_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVC097_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVC097_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVC097_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVC097_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVC097_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVC097_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVC097_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVC097_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVC097_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVC097_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVC097_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVC097_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVC097_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVC097_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVC097_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC097_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVC097_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVC097_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVC097_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVC097_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVC097_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVC097_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVC097_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVC097_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVC097_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVC097_INVALIDATE_ZCULL 0x1958 +#define NVC097_INVALIDATE_ZCULL_V 31:0 +#define NVC097_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVC097_SET_ZCULL 0x1968 +#define NVC097_SET_ZCULL_Z_ENABLE 0:0 +#define NVC097_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVC097_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_ZCULL_BOUNDS 0x196c +#define NVC097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVC097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVC097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVC097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC097_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVC097_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVC097_ZCULL_SYNC 0x1978 +#define NVC097_ZCULL_SYNC_V 31:0 + +#define NVC097_SET_CLIP_ID_TEST 0x197c +#define NVC097_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVC097_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVC097_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVC097_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVC097_SET_CLIP_ID 0x1984 +#define NVC097_SET_CLIP_ID_V 31:0 + +#define NVC097_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVC097_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVC097_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVC097_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVC097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVC097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVC097_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVC097_SET_LOGIC_OP 0x19c4 +#define NVC097_SET_LOGIC_OP_ENABLE 0:0 +#define NVC097_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVC097_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_LOGIC_OP_FUNC 0x19c8 +#define NVC097_SET_LOGIC_OP_FUNC_V 31:0 +#define NVC097_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVC097_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVC097_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVC097_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVC097_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVC097_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVC097_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVC097_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVC097_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVC097_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVC097_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVC097_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVC097_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVC097_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVC097_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVC097_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVC097_SET_Z_COMPRESSION 0x19cc +#define NVC097_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVC097_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC097_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC097_CLEAR_SURFACE 0x19d0 +#define NVC097_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVC097_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC097_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC097_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVC097_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC097_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC097_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVC097_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVC097_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVC097_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVC097_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVC097_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVC097_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVC097_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVC097_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVC097_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVC097_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVC097_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVC097_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVC097_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVC097_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVC097_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVC097_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVC097_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVC097_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC097_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVC097_SET_CT_WRITE_R_ENABLE 0:0 +#define NVC097_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVC097_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVC097_SET_CT_WRITE_G_ENABLE 4:4 +#define NVC097_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVC097_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVC097_SET_CT_WRITE_B_ENABLE 8:8 +#define NVC097_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVC097_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVC097_SET_CT_WRITE_A_ENABLE 12:12 +#define NVC097_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVC097_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVC097_PIPE_NOP 0x1a2c +#define NVC097_PIPE_NOP_V 31:0 + +#define NVC097_SET_SPARE00 0x1a30 +#define NVC097_SET_SPARE00_V 31:0 + +#define NVC097_SET_SPARE01 0x1a34 +#define NVC097_SET_SPARE01_V 31:0 + +#define NVC097_SET_SPARE02 0x1a38 +#define NVC097_SET_SPARE02_V 31:0 + +#define NVC097_SET_SPARE03 0x1a3c +#define NVC097_SET_SPARE03_V 31:0 + +#define NVC097_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC097_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC097_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC097_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC097_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC097_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVC097_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC097_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVC097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVC097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVC097_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVC097_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVC097_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVC097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVC097_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVC097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC097_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVC097_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVC097_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVC097_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVC097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVC097_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVC097_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVC097_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVC097_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVC097_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVC097_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVC097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC097_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVC097_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC097_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVC097_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC097_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVC097_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC097_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC097_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC097_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC097_SET_VERTEX_STREAM_LIMIT_A_A(j) (0x1f00+(j)*8) +#define NVC097_SET_VERTEX_STREAM_LIMIT_A_A_UPPER 7:0 + +#define NVC097_SET_VERTEX_STREAM_LIMIT_A_B(j) (0x1f04+(j)*8) +#define NVC097_SET_VERTEX_STREAM_LIMIT_A_B_LOWER 31:0 + +#define NVC097_SET_VERTEX_STREAM_LIMIT_B_A(j) (0x1f80+(j)*8) +#define NVC097_SET_VERTEX_STREAM_LIMIT_B_A_UPPER 7:0 + +#define NVC097_SET_VERTEX_STREAM_LIMIT_B_B(j) (0x1f84+(j)*8) +#define NVC097_SET_VERTEX_STREAM_LIMIT_B_B_LOWER 31:0 + +#define NVC097_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVC097_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVC097_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVC097_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVC097_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVC097_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVC097_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVC097_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVC097_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVC097_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVC097_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVC097_SET_PIPELINE_PROGRAM(j) (0x2004+(j)*64) +#define NVC097_SET_PIPELINE_PROGRAM_OFFSET 31:0 + +#define NVC097_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVC097_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVC097_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVC097_SET_PIPELINE_REGISTER_COUNT_V 7:0 + +#define NVC097_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVC097_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVC097_SET_PIPELINE_RESERVED_B(j) (0x2014+(j)*64) +#define NVC097_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVC097_SET_PIPELINE_RESERVED_C(j) (0x2018+(j)*64) +#define NVC097_SET_PIPELINE_RESERVED_C_V 0:0 + +#define NVC097_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NVC097_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NVC097_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVC097_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVC097_SET_FALCON00 0x2300 +#define NVC097_SET_FALCON00_V 31:0 + +#define NVC097_SET_FALCON01 0x2304 +#define NVC097_SET_FALCON01_V 31:0 + +#define NVC097_SET_FALCON02 0x2308 +#define NVC097_SET_FALCON02_V 31:0 + +#define NVC097_SET_FALCON03 0x230c +#define NVC097_SET_FALCON03_V 31:0 + +#define NVC097_SET_FALCON04 0x2310 +#define NVC097_SET_FALCON04_V 31:0 + +#define NVC097_SET_FALCON05 0x2314 +#define NVC097_SET_FALCON05_V 31:0 + +#define NVC097_SET_FALCON06 0x2318 +#define NVC097_SET_FALCON06_V 31:0 + +#define NVC097_SET_FALCON07 0x231c +#define NVC097_SET_FALCON07_V 31:0 + +#define NVC097_SET_FALCON08 0x2320 +#define NVC097_SET_FALCON08_V 31:0 + +#define NVC097_SET_FALCON09 0x2324 +#define NVC097_SET_FALCON09_V 31:0 + +#define NVC097_SET_FALCON10 0x2328 +#define NVC097_SET_FALCON10_V 31:0 + +#define NVC097_SET_FALCON11 0x232c +#define NVC097_SET_FALCON11_V 31:0 + +#define NVC097_SET_FALCON12 0x2330 +#define NVC097_SET_FALCON12_V 31:0 + +#define NVC097_SET_FALCON13 0x2334 +#define NVC097_SET_FALCON13_V 31:0 + +#define NVC097_SET_FALCON14 0x2338 +#define NVC097_SET_FALCON14_V 31:0 + +#define NVC097_SET_FALCON15 0x233c +#define NVC097_SET_FALCON15_V 31:0 + +#define NVC097_SET_FALCON16 0x2340 +#define NVC097_SET_FALCON16_V 31:0 + +#define NVC097_SET_FALCON17 0x2344 +#define NVC097_SET_FALCON17_V 31:0 + +#define NVC097_SET_FALCON18 0x2348 +#define NVC097_SET_FALCON18_V 31:0 + +#define NVC097_SET_FALCON19 0x234c +#define NVC097_SET_FALCON19_V 31:0 + +#define NVC097_SET_FALCON20 0x2350 +#define NVC097_SET_FALCON20_V 31:0 + +#define NVC097_SET_FALCON21 0x2354 +#define NVC097_SET_FALCON21_V 31:0 + +#define NVC097_SET_FALCON22 0x2358 +#define NVC097_SET_FALCON22_V 31:0 + +#define NVC097_SET_FALCON23 0x235c +#define NVC097_SET_FALCON23_V 31:0 + +#define NVC097_SET_FALCON24 0x2360 +#define NVC097_SET_FALCON24_V 31:0 + +#define NVC097_SET_FALCON25 0x2364 +#define NVC097_SET_FALCON25_V 31:0 + +#define NVC097_SET_FALCON26 0x2368 +#define NVC097_SET_FALCON26_V 31:0 + +#define NVC097_SET_FALCON27 0x236c +#define NVC097_SET_FALCON27_V 31:0 + +#define NVC097_SET_FALCON28 0x2370 +#define NVC097_SET_FALCON28_V 31:0 + +#define NVC097_SET_FALCON29 0x2374 +#define NVC097_SET_FALCON29_V 31:0 + +#define NVC097_SET_FALCON30 0x2378 +#define NVC097_SET_FALCON30_V 31:0 + +#define NVC097_SET_FALCON31 0x237c +#define NVC097_SET_FALCON31_V 31:0 + +#define NVC097_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVC097_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVC097_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVC097_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVC097_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVC097_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVC097_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVC097_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVC097_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVC097_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVC097_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVC097_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVC097_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVC097_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVC097_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVC097_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVC097_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVC097_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVC097_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVC097_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVC097_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVC097_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVC097_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVC097_SET_COLOR_CLAMP 0x2600 +#define NVC097_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVC097_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVC097_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVC097_SET_BINDLESS_TEXTURE 0x2608 +#define NVC097_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 4:0 + +#define NVC097_SET_TRAP_HANDLER 0x260c +#define NVC097_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVC097_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVC097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVC097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVC097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVC097_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC097_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC097_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC097_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC097_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC097_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC097_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC097_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVC097_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVC097_CALL_MME_MACRO_V 31:0 + +#define NVC097_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVC097_CALL_MME_DATA_V 31:0 + +#endif /* _cl_pascal_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc0b5.h b/userspace/sdks/nv570/inc/class/clc0b5.h new file mode 100644 index 0000000..d1fa85a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc0b5.h @@ -0,0 +1,261 @@ +/******************************************************************************* + Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#include "nvtypes.h" + +#ifndef _clc0b5_h_ +#define _clc0b5_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define PASCAL_DMA_COPY_A (0x0000C0B5) + +#define NVC0B5_NOP (0x00000100) +#define NVC0B5_NOP_PARAMETER 31:0 +#define NVC0B5_PM_TRIGGER (0x00000140) +#define NVC0B5_PM_TRIGGER_V 31:0 +#define NVC0B5_SET_SEMAPHORE_A (0x00000240) +#define NVC0B5_SET_SEMAPHORE_A_UPPER 16:0 +#define NVC0B5_SET_SEMAPHORE_B (0x00000244) +#define NVC0B5_SET_SEMAPHORE_B_LOWER 31:0 +#define NVC0B5_SET_SEMAPHORE_PAYLOAD (0x00000248) +#define NVC0B5_SET_SEMAPHORE_PAYLOAD_PAYLOAD 31:0 +#define NVC0B5_SET_RENDER_ENABLE_A (0x00000254) +#define NVC0B5_SET_RENDER_ENABLE_A_UPPER 7:0 +#define NVC0B5_SET_RENDER_ENABLE_B (0x00000258) +#define NVC0B5_SET_RENDER_ENABLE_B_LOWER 31:0 +#define NVC0B5_SET_RENDER_ENABLE_C (0x0000025C) +#define NVC0B5_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC0B5_SET_RENDER_ENABLE_C_MODE_FALSE (0x00000000) +#define NVC0B5_SET_RENDER_ENABLE_C_MODE_TRUE (0x00000001) +#define NVC0B5_SET_RENDER_ENABLE_C_MODE_CONDITIONAL (0x00000002) +#define NVC0B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL (0x00000003) +#define NVC0B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL (0x00000004) +#define NVC0B5_SET_SRC_PHYS_MODE (0x00000260) +#define NVC0B5_SET_SRC_PHYS_MODE_TARGET 1:0 +#define NVC0B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC0B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC0B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC0B5_SET_DST_PHYS_MODE (0x00000264) +#define NVC0B5_SET_DST_PHYS_MODE_TARGET 1:0 +#define NVC0B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC0B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC0B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC0B5_LAUNCH_DMA (0x00000300) +#define NVC0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVC0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVC0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVC0B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVC0B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 +#define NVC0B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) +#define NVC0B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_TYPE_NONE (0x00000000) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_FOUR_WORD_SEMAPHORE (0x00000002) +#define NVC0B5_LAUNCH_DMA_INTERRUPT_TYPE 6:5 +#define NVC0B5_LAUNCH_DMA_INTERRUPT_TYPE_NONE (0x00000000) +#define NVC0B5_LAUNCH_DMA_INTERRUPT_TYPE_BLOCKING (0x00000001) +#define NVC0B5_LAUNCH_DMA_INTERRUPT_TYPE_NON_BLOCKING (0x00000002) +#define NVC0B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 +#define NVC0B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC0B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC0B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 +#define NVC0B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC0B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC0B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 +#define NVC0B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) +#define NVC0B5_LAUNCH_DMA_MULTI_LINE_ENABLE_TRUE (0x00000001) +#define NVC0B5_LAUNCH_DMA_REMAP_ENABLE 10:10 +#define NVC0B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) +#define NVC0B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) +#define NVC0B5_LAUNCH_DMA_FORCE_RMWDISABLE 11:11 +#define NVC0B5_LAUNCH_DMA_FORCE_RMWDISABLE_FALSE (0x00000000) +#define NVC0B5_LAUNCH_DMA_FORCE_RMWDISABLE_TRUE (0x00000001) +#define NVC0B5_LAUNCH_DMA_SRC_TYPE 12:12 +#define NVC0B5_LAUNCH_DMA_SRC_TYPE_VIRTUAL (0x00000000) +#define NVC0B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) +#define NVC0B5_LAUNCH_DMA_DST_TYPE 13:13 +#define NVC0B5_LAUNCH_DMA_DST_TYPE_VIRTUAL (0x00000000) +#define NVC0B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION 17:14 +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMIN (0x00000000) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMAX (0x00000001) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IXOR (0x00000002) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IAND (0x00000003) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IOR (0x00000004) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IADD (0x00000005) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INC (0x00000006) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_DEC (0x00000007) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FADD (0x0000000A) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN 18:18 +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_SIGNED (0x00000000) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_UNSIGNED (0x00000001) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE 19:19 +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_FALSE (0x00000000) +#define NVC0B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_TRUE (0x00000001) +#define NVC0B5_LAUNCH_DMA_SRC_BYPASS_L2 20:20 +#define NVC0B5_LAUNCH_DMA_SRC_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVC0B5_LAUNCH_DMA_SRC_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVC0B5_LAUNCH_DMA_DST_BYPASS_L2 21:21 +#define NVC0B5_LAUNCH_DMA_DST_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVC0B5_LAUNCH_DMA_DST_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVC0B5_LAUNCH_DMA_RESERVED 31:28 +#define NVC0B5_OFFSET_IN_UPPER (0x00000400) +#define NVC0B5_OFFSET_IN_UPPER_UPPER 16:0 +#define NVC0B5_OFFSET_IN_LOWER (0x00000404) +#define NVC0B5_OFFSET_IN_LOWER_VALUE 31:0 +#define NVC0B5_OFFSET_OUT_UPPER (0x00000408) +#define NVC0B5_OFFSET_OUT_UPPER_UPPER 16:0 +#define NVC0B5_OFFSET_OUT_LOWER (0x0000040C) +#define NVC0B5_OFFSET_OUT_LOWER_VALUE 31:0 +#define NVC0B5_PITCH_IN (0x00000410) +#define NVC0B5_PITCH_IN_VALUE 31:0 +#define NVC0B5_PITCH_OUT (0x00000414) +#define NVC0B5_PITCH_OUT_VALUE 31:0 +#define NVC0B5_LINE_LENGTH_IN (0x00000418) +#define NVC0B5_LINE_LENGTH_IN_VALUE 31:0 +#define NVC0B5_LINE_COUNT (0x0000041C) +#define NVC0B5_LINE_COUNT_VALUE 31:0 +#define NVC0B5_SET_REMAP_CONST_A (0x00000700) +#define NVC0B5_SET_REMAP_CONST_A_V 31:0 +#define NVC0B5_SET_REMAP_CONST_B (0x00000704) +#define NVC0B5_SET_REMAP_CONST_B_V 31:0 +#define NVC0B5_SET_REMAP_COMPONENTS (0x00000708) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_X 2:0 +#define NVC0B5_SET_REMAP_COMPONENTS_DST_X_SRC_X (0x00000000) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_X_SRC_Y (0x00000001) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_X_SRC_Z (0x00000002) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_X_SRC_W (0x00000003) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_X_NO_WRITE (0x00000006) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Y 6:4 +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_X (0x00000000) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Y (0x00000001) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Z (0x00000002) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Y_SRC_W (0x00000003) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Y_CONST_A (0x00000004) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Y_NO_WRITE (0x00000006) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Z 10:8 +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_X (0x00000000) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Y (0x00000001) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Z (0x00000002) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Z_SRC_W (0x00000003) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Z_CONST_A (0x00000004) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Z_CONST_B (0x00000005) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_Z_NO_WRITE (0x00000006) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_W 14:12 +#define NVC0B5_SET_REMAP_COMPONENTS_DST_W_SRC_X (0x00000000) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_W_SRC_Y (0x00000001) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_W_SRC_Z (0x00000002) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_W_SRC_W (0x00000003) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_W_CONST_A (0x00000004) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_W_CONST_B (0x00000005) +#define NVC0B5_SET_REMAP_COMPONENTS_DST_W_NO_WRITE (0x00000006) +#define NVC0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 +#define NVC0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) +#define NVC0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_TWO (0x00000001) +#define NVC0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_THREE (0x00000002) +#define NVC0B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS 21:20 +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_ONE (0x00000000) +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_TWO (0x00000001) +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_THREE (0x00000002) +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_FOUR (0x00000003) +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_THREE (0x00000002) +#define NVC0B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_FOUR (0x00000003) +#define NVC0B5_SET_DST_BLOCK_SIZE (0x0000070C) +#define NVC0B5_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC0B5_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC0B5_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC0B5_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC0B5_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC0B5_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC0B5_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC0B5_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC0B5_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC0B5_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC0B5_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC0B5_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC0B5_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC0B5_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC0B5_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC0B5_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC0B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC0B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC0B5_SET_DST_WIDTH (0x00000710) +#define NVC0B5_SET_DST_WIDTH_V 31:0 +#define NVC0B5_SET_DST_HEIGHT (0x00000714) +#define NVC0B5_SET_DST_HEIGHT_V 31:0 +#define NVC0B5_SET_DST_DEPTH (0x00000718) +#define NVC0B5_SET_DST_DEPTH_V 31:0 +#define NVC0B5_SET_DST_LAYER (0x0000071C) +#define NVC0B5_SET_DST_LAYER_V 31:0 +#define NVC0B5_SET_DST_ORIGIN (0x00000720) +#define NVC0B5_SET_DST_ORIGIN_X 15:0 +#define NVC0B5_SET_DST_ORIGIN_Y 31:16 +#define NVC0B5_SET_SRC_BLOCK_SIZE (0x00000728) +#define NVC0B5_SET_SRC_BLOCK_SIZE_WIDTH 3:0 +#define NVC0B5_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC0B5_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 +#define NVC0B5_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC0B5_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC0B5_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC0B5_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC0B5_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC0B5_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC0B5_SET_SRC_BLOCK_SIZE_DEPTH 11:8 +#define NVC0B5_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC0B5_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC0B5_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC0B5_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC0B5_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC0B5_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC0B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC0B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC0B5_SET_SRC_WIDTH (0x0000072C) +#define NVC0B5_SET_SRC_WIDTH_V 31:0 +#define NVC0B5_SET_SRC_HEIGHT (0x00000730) +#define NVC0B5_SET_SRC_HEIGHT_V 31:0 +#define NVC0B5_SET_SRC_DEPTH (0x00000734) +#define NVC0B5_SET_SRC_DEPTH_V 31:0 +#define NVC0B5_SET_SRC_LAYER (0x00000738) +#define NVC0B5_SET_SRC_LAYER_V 31:0 +#define NVC0B5_SET_SRC_ORIGIN (0x0000073C) +#define NVC0B5_SET_SRC_ORIGIN_X 15:0 +#define NVC0B5_SET_SRC_ORIGIN_Y 31:16 +#define NVC0B5_PM_TRIGGER_END (0x00001114) +#define NVC0B5_PM_TRIGGER_END_V 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc0b5_h + diff --git a/userspace/sdks/nv570/inc/class/clc0b5sw.h b/userspace/sdks/nv570/inc/class/clc0b5sw.h new file mode 100644 index 0000000..01ebd05 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc0b5sw.h @@ -0,0 +1,54 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2014-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc0b5sw.finn +// + + + +// +// Using VERSION_0 will cause the API to interpret +// engineType as a CE engine instance. This allows +// for backward compatibility with 85B5sw and 90B5sw. +// +#define NVC0B5_ALLOCATION_PARAMETERS_VERSION_0 0 + +// +// Using VERSION_1 will cause the API to interpret +// engineType as an NV2080_ENGINE_TYPE ordinal. +// +#define NVC0B5_ALLOCATION_PARAMETERS_VERSION_1 1 + +#define NVC0B5_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc0b5U) + +typedef struct NVC0B5_ALLOCATION_PARAMETERS { + NvU32 version; + NvU32 engineType; +} NVC0B5_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc0b7.h b/userspace/sdks/nv570/inc/class/clc0b7.h new file mode 100644 index 0000000..bdb9bba --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc0b7.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef clc0b7_h +#define clc0b7_h + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC0B7_VIDEO_ENCODER (0x0000C0B7) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clc0b7_h + diff --git a/userspace/sdks/nv570/inc/class/clc0c0.h b/userspace/sdks/nv570/inc/class/clc0c0.h new file mode 100644 index 0000000..fde8702 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc0c0.h @@ -0,0 +1,777 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_pascal_compute_a_h_ +#define _cl_pascal_compute_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl pascal_compute_a */ + +#include "nvtypes.h" + +#define PASCAL_COMPUTE_A 0xC0C0 + +#define NVC0C0_SET_OBJECT 0x0000 +#define NVC0C0_SET_OBJECT_CLASS_ID 15:0 +#define NVC0C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC0C0_NO_OPERATION 0x0100 +#define NVC0C0_NO_OPERATION_V 31:0 + +#define NVC0C0_SET_NOTIFY_A 0x0104 +#define NVC0C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC0C0_SET_NOTIFY_B 0x0108 +#define NVC0C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC0C0_NOTIFY 0x010c +#define NVC0C0_NOTIFY_TYPE 31:0 +#define NVC0C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC0C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC0C0_WAIT_FOR_IDLE 0x0110 +#define NVC0C0_WAIT_FOR_IDLE_V 31:0 + +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC0C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC0C0_SEND_GO_IDLE 0x013c +#define NVC0C0_SEND_GO_IDLE_V 31:0 + +#define NVC0C0_PM_TRIGGER 0x0140 +#define NVC0C0_PM_TRIGGER_V 31:0 + +#define NVC0C0_PM_TRIGGER_WFI 0x0144 +#define NVC0C0_PM_TRIGGER_WFI_V 31:0 + +#define NVC0C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC0C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC0C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC0C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC0C0_LINE_LENGTH_IN 0x0180 +#define NVC0C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC0C0_LINE_COUNT 0x0184 +#define NVC0C0_LINE_COUNT_VALUE 31:0 + +#define NVC0C0_OFFSET_OUT_UPPER 0x0188 +#define NVC0C0_OFFSET_OUT_UPPER_VALUE 16:0 + +#define NVC0C0_OFFSET_OUT 0x018c +#define NVC0C0_OFFSET_OUT_VALUE 31:0 + +#define NVC0C0_PITCH_OUT 0x0190 +#define NVC0C0_PITCH_OUT_VALUE 31:0 + +#define NVC0C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVC0C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC0C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC0C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC0C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC0C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC0C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC0C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC0C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC0C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC0C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC0C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC0C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC0C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC0C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC0C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC0C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC0C0_SET_DST_WIDTH 0x0198 +#define NVC0C0_SET_DST_WIDTH_V 31:0 + +#define NVC0C0_SET_DST_HEIGHT 0x019c +#define NVC0C0_SET_DST_HEIGHT_V 31:0 + +#define NVC0C0_SET_DST_DEPTH 0x01a0 +#define NVC0C0_SET_DST_DEPTH_V 31:0 + +#define NVC0C0_SET_DST_LAYER 0x01a4 +#define NVC0C0_SET_DST_LAYER_V 31:0 + +#define NVC0C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC0C0_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC0C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC0C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC0C0_LAUNCH_DMA 0x01b0 +#define NVC0C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC0C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC0C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC0C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC0C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC0C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC0C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC0C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC0C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC0C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC0C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC0C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC0C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC0C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC0C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC0C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC0C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC0C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC0C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC0C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC0C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC0C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC0C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC0C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC0C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC0C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC0C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC0C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC0C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC0C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC0C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC0C0_LOAD_INLINE_DATA 0x01b4 +#define NVC0C0_LOAD_INLINE_DATA_V 31:0 + +#define NVC0C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC0C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC0C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC0C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC0C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC0C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC0C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC0C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC0C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC0C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC0C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC0C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC0C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC0C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC0C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVC0C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVC0C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVC0C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVC0C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVC0C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVC0C0_SET_COALESCE_WAITING_PERIOD_UNIT 0x020c +#define NVC0C0_SET_COALESCE_WAITING_PERIOD_UNIT_CLOCKS 31:0 + +#define NVC0C0_PERFMON_TRANSFER 0x0210 +#define NVC0C0_PERFMON_TRANSFER_V 31:0 + +#define NVC0C0_SET_SHADER_SHARED_MEMORY_WINDOW 0x0214 +#define NVC0C0_SET_SHADER_SHARED_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC0C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS 0x0218 +#define NVC0C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V 0:0 +#define NVC0C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE 0x00000000 +#define NVC0C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE 0x00000001 + +#define NVC0C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVC0C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC0C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC0C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC0C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC0C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC0C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC0C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC0C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC0C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC0C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC0C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC0C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC0C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC0C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC0C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC0C0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVC0C0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVC0C0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVC0C0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD03 0x022c +#define NVC0C0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVC0C0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVC0C0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVC0C0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD07 0x023c +#define NVC0C0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC0C0_SET_CWD_CONTROL 0x0240 +#define NVC0C0_SET_CWD_CONTROL_SM_SELECTION 0:0 +#define NVC0C0_SET_CWD_CONTROL_SM_SELECTION_LOAD_BALANCED 0x00000000 +#define NVC0C0_SET_CWD_CONTROL_SM_SELECTION_ROUND_ROBIN 0x00000001 + +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC0C0_SET_CWD_REF_COUNTER 0x0248 +#define NVC0C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVC0C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVC0C0_SET_RESERVED_SW_METHOD08 0x024c +#define NVC0C0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVC0C0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVC0C0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVC0C0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD12 0x025c +#define NVC0C0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVC0C0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVC0C0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC0C0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVC0C0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC0C0_SET_GWC_SCG_TYPE 0x026c +#define NVC0C0_SET_GWC_SCG_TYPE_SCG_TYPE 0:0 +#define NVC0C0_SET_GWC_SCG_TYPE_SCG_TYPE_GRAPHICS_COMPUTE0 0x00000000 +#define NVC0C0_SET_GWC_SCG_TYPE_SCG_TYPE_COMPUTE1 0x00000001 + +#define NVC0C0_SET_SCG_CONTROL 0x0270 +#define NVC0C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 + +#define NVC0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A 0x0274 +#define NVC0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A_ADDRESS_UPPER 16:0 + +#define NVC0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B 0x0278 +#define NVC0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B_ADDRESS_LOWER 31:0 + +#define NVC0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C 0x027c +#define NVC0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_BYTE_COUNT 16:0 +#define NVC0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2 31:31 +#define NVC0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_FALSE 0x00000000 +#define NVC0C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_TRUE 0x00000001 + +#define NVC0C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVC0C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC0C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC0C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVC0C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC0C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC0C0_SET_QMD_VERSION 0x0288 +#define NVC0C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVC0C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC0C0_SET_WFI_CONFIG 0x028c +#define NVC0C0_SET_WFI_CONFIG_ENABLE_SCG_TYPE_WFI 0:0 +#define NVC0C0_SET_WFI_CONFIG_ENABLE_SCG_TYPE_WFI_FALSE 0x00000000 +#define NVC0C0_SET_WFI_CONFIG_ENABLE_SCG_TYPE_WFI_TRUE 0x00000001 + +#define NVC0C0_CHECK_QMD_VERSION 0x0290 +#define NVC0C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVC0C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC0C0_WAIT_FOR_IDLE_SCG_TYPE 0x0294 +#define NVC0C0_WAIT_FOR_IDLE_SCG_TYPE_V 31:0 + +#define NVC0C0_INVALIDATE_SKED_CACHES 0x0298 +#define NVC0C0_INVALIDATE_SKED_CACHES_V 0:0 + +#define NVC0C0_SET_SCG_RENDER_ENABLE_CONTROL 0x029c +#define NVC0C0_SET_SCG_RENDER_ENABLE_CONTROL_COMPUTE1_USES_RENDER_ENABLE 0:0 +#define NVC0C0_SET_SCG_RENDER_ENABLE_CONTROL_COMPUTE1_USES_RENDER_ENABLE_FALSE 0x00000000 +#define NVC0C0_SET_SCG_RENDER_ENABLE_CONTROL_COMPUTE1_USES_RENDER_ENABLE_TRUE 0x00000001 + +#define NVC0C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 +#define NVC0C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC0C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 +#define NVC0C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC0C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVC0C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVC0C0_SEND_PCAS_A 0x02b4 +#define NVC0C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVC0C0_SEND_PCAS_B 0x02b8 +#define NVC0C0_SEND_PCAS_B_FROM 23:0 +#define NVC0C0_SEND_PCAS_B_DELTA 31:24 + +#define NVC0C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVC0C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVC0C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVC0C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVC0C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVC0C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVC0C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A 0x02f0 +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B 0x02f4 +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C 0x02f8 +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVC0C0_SET_SPA_VERSION 0x0310 +#define NVC0C0_SET_SPA_VERSION_MINOR 7:0 +#define NVC0C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC0C0_SET_INLINE_QMD_ADDRESS_A 0x0318 +#define NVC0C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 + +#define NVC0C0_SET_INLINE_QMD_ADDRESS_B 0x031c +#define NVC0C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 + +#define NVC0C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) +#define NVC0C0_LOAD_INLINE_QMD_DATA_V 31:0 + +#define NVC0C0_SET_FALCON00 0x0500 +#define NVC0C0_SET_FALCON00_V 31:0 + +#define NVC0C0_SET_FALCON01 0x0504 +#define NVC0C0_SET_FALCON01_V 31:0 + +#define NVC0C0_SET_FALCON02 0x0508 +#define NVC0C0_SET_FALCON02_V 31:0 + +#define NVC0C0_SET_FALCON03 0x050c +#define NVC0C0_SET_FALCON03_V 31:0 + +#define NVC0C0_SET_FALCON04 0x0510 +#define NVC0C0_SET_FALCON04_V 31:0 + +#define NVC0C0_SET_FALCON05 0x0514 +#define NVC0C0_SET_FALCON05_V 31:0 + +#define NVC0C0_SET_FALCON06 0x0518 +#define NVC0C0_SET_FALCON06_V 31:0 + +#define NVC0C0_SET_FALCON07 0x051c +#define NVC0C0_SET_FALCON07_V 31:0 + +#define NVC0C0_SET_FALCON08 0x0520 +#define NVC0C0_SET_FALCON08_V 31:0 + +#define NVC0C0_SET_FALCON09 0x0524 +#define NVC0C0_SET_FALCON09_V 31:0 + +#define NVC0C0_SET_FALCON10 0x0528 +#define NVC0C0_SET_FALCON10_V 31:0 + +#define NVC0C0_SET_FALCON11 0x052c +#define NVC0C0_SET_FALCON11_V 31:0 + +#define NVC0C0_SET_FALCON12 0x0530 +#define NVC0C0_SET_FALCON12_V 31:0 + +#define NVC0C0_SET_FALCON13 0x0534 +#define NVC0C0_SET_FALCON13_V 31:0 + +#define NVC0C0_SET_FALCON14 0x0538 +#define NVC0C0_SET_FALCON14_V 31:0 + +#define NVC0C0_SET_FALCON15 0x053c +#define NVC0C0_SET_FALCON15_V 31:0 + +#define NVC0C0_SET_FALCON16 0x0540 +#define NVC0C0_SET_FALCON16_V 31:0 + +#define NVC0C0_SET_FALCON17 0x0544 +#define NVC0C0_SET_FALCON17_V 31:0 + +#define NVC0C0_SET_FALCON18 0x0548 +#define NVC0C0_SET_FALCON18_V 31:0 + +#define NVC0C0_SET_FALCON19 0x054c +#define NVC0C0_SET_FALCON19_V 31:0 + +#define NVC0C0_SET_FALCON20 0x0550 +#define NVC0C0_SET_FALCON20_V 31:0 + +#define NVC0C0_SET_FALCON21 0x0554 +#define NVC0C0_SET_FALCON21_V 31:0 + +#define NVC0C0_SET_FALCON22 0x0558 +#define NVC0C0_SET_FALCON22_V 31:0 + +#define NVC0C0_SET_FALCON23 0x055c +#define NVC0C0_SET_FALCON23_V 31:0 + +#define NVC0C0_SET_FALCON24 0x0560 +#define NVC0C0_SET_FALCON24_V 31:0 + +#define NVC0C0_SET_FALCON25 0x0564 +#define NVC0C0_SET_FALCON25_V 31:0 + +#define NVC0C0_SET_FALCON26 0x0568 +#define NVC0C0_SET_FALCON26_V 31:0 + +#define NVC0C0_SET_FALCON27 0x056c +#define NVC0C0_SET_FALCON27_V 31:0 + +#define NVC0C0_SET_FALCON28 0x0570 +#define NVC0C0_SET_FALCON28_V 31:0 + +#define NVC0C0_SET_FALCON29 0x0574 +#define NVC0C0_SET_FALCON29_V 31:0 + +#define NVC0C0_SET_FALCON30 0x0578 +#define NVC0C0_SET_FALCON30_V 31:0 + +#define NVC0C0_SET_FALCON31 0x057c +#define NVC0C0_SET_FALCON31_V 31:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 +#define NVC0C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC0C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC0C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC0C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC0C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC0C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC0C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC0C0_SET_SPARE_NOOP12 0x0f44 +#define NVC0C0_SET_SPARE_NOOP12_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP13 0x0f48 +#define NVC0C0_SET_SPARE_NOOP13_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP14 0x0f4c +#define NVC0C0_SET_SPARE_NOOP14_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP15 0x0f50 +#define NVC0C0_SET_SPARE_NOOP15_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP00 0x1040 +#define NVC0C0_SET_SPARE_NOOP00_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP01 0x1044 +#define NVC0C0_SET_SPARE_NOOP01_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP02 0x1048 +#define NVC0C0_SET_SPARE_NOOP02_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP03 0x104c +#define NVC0C0_SET_SPARE_NOOP03_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP04 0x1050 +#define NVC0C0_SET_SPARE_NOOP04_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP05 0x1054 +#define NVC0C0_SET_SPARE_NOOP05_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP06 0x1058 +#define NVC0C0_SET_SPARE_NOOP06_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP07 0x105c +#define NVC0C0_SET_SPARE_NOOP07_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP08 0x1060 +#define NVC0C0_SET_SPARE_NOOP08_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP09 0x1064 +#define NVC0C0_SET_SPARE_NOOP09_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP10 0x1068 +#define NVC0C0_SET_SPARE_NOOP10_V 31:0 + +#define NVC0C0_SET_SPARE_NOOP11 0x106c +#define NVC0C0_SET_SPARE_NOOP11_V 31:0 + +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_ALL 0x120c +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_ALL_V 0:0 + +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL 0x1210 +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL_V 0:0 + +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC0C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVC0C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVC0C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVC0C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVC0C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC0C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC0C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC0C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC0C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC0C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC0C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC0C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC0C0_SET_RENDER_ENABLE_A 0x1550 +#define NVC0C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC0C0_SET_RENDER_ENABLE_B 0x1554 +#define NVC0C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC0C0_SET_RENDER_ENABLE_C 0x1558 +#define NVC0C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC0C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC0C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC0C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC0C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC0C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC0C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC0C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC0C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC0C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC0C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC0C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC0C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC0C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC0C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC0C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC0C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVC0C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC0C0_SET_PROGRAM_REGION_A 0x1608 +#define NVC0C0_SET_PROGRAM_REGION_A_ADDRESS_UPPER 16:0 + +#define NVC0C0_SET_PROGRAM_REGION_B 0x160c +#define NVC0C0_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC0C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC0C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC0C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC0C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC0C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC0C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC0C0_PIPE_NOP 0x1a2c +#define NVC0C0_PIPE_NOP_V 31:0 + +#define NVC0C0_SET_SPARE00 0x1a30 +#define NVC0C0_SET_SPARE00_V 31:0 + +#define NVC0C0_SET_SPARE01 0x1a34 +#define NVC0C0_SET_SPARE01_V 31:0 + +#define NVC0C0_SET_SPARE02 0x1a38 +#define NVC0C0_SET_SPARE02_V 31:0 + +#define NVC0C0_SET_SPARE03 0x1a3c +#define NVC0C0_SET_SPARE03_V 31:0 + +#define NVC0C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC0C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC0C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC0C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC0C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC0C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC0C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC0C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC0C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVC0C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVC0C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVC0C0_SET_TRAP_HANDLER 0x260c +#define NVC0C0_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC0C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC0C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC0C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC0C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC0C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC0C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC0C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#endif /* _cl_pascal_compute_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc197.h b/userspace/sdks/nv570/inc/class/clc197.h new file mode 100644 index 0000000..b03d735 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc197.h @@ -0,0 +1,4242 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_pascal_b_h_ +#define _cl_pascal_b_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl pascal_b */ + +#include "nvtypes.h" + +#define PASCAL_B 0xC197 + +#define NVC197_SET_OBJECT 0x0000 +#define NVC197_SET_OBJECT_CLASS_ID 15:0 +#define NVC197_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC197_NO_OPERATION 0x0100 +#define NVC197_NO_OPERATION_V 31:0 + +#define NVC197_SET_NOTIFY_A 0x0104 +#define NVC197_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC197_SET_NOTIFY_B 0x0108 +#define NVC197_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC197_NOTIFY 0x010c +#define NVC197_NOTIFY_TYPE 31:0 +#define NVC197_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC197_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC197_WAIT_FOR_IDLE 0x0110 +#define NVC197_WAIT_FOR_IDLE_V 31:0 + +#define NVC197_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVC197_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVC197_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVC197_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVC197_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVC197_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVC197_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVC197_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVC197_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVC197_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVC197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVC197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVC197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVC197_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVC197_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVC197_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVC197_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVC197_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVC197_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC197_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC197_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC197_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC197_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC197_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC197_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC197_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC197_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC197_SEND_GO_IDLE 0x013c +#define NVC197_SEND_GO_IDLE_V 31:0 + +#define NVC197_PM_TRIGGER 0x0140 +#define NVC197_PM_TRIGGER_V 31:0 + +#define NVC197_PM_TRIGGER_WFI 0x0144 +#define NVC197_PM_TRIGGER_WFI_V 31:0 + +#define NVC197_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC197_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC197_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC197_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC197_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC197_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC197_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC197_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC197_LINE_LENGTH_IN 0x0180 +#define NVC197_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC197_LINE_COUNT 0x0184 +#define NVC197_LINE_COUNT_VALUE 31:0 + +#define NVC197_OFFSET_OUT_UPPER 0x0188 +#define NVC197_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVC197_OFFSET_OUT 0x018c +#define NVC197_OFFSET_OUT_VALUE 31:0 + +#define NVC197_PITCH_OUT 0x0190 +#define NVC197_PITCH_OUT_VALUE 31:0 + +#define NVC197_SET_DST_BLOCK_SIZE 0x0194 +#define NVC197_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC197_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC197_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC197_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC197_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC197_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC197_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC197_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC197_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC197_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC197_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC197_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC197_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC197_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC197_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC197_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC197_SET_DST_WIDTH 0x0198 +#define NVC197_SET_DST_WIDTH_V 31:0 + +#define NVC197_SET_DST_HEIGHT 0x019c +#define NVC197_SET_DST_HEIGHT_V 31:0 + +#define NVC197_SET_DST_DEPTH 0x01a0 +#define NVC197_SET_DST_DEPTH_V 31:0 + +#define NVC197_SET_DST_LAYER 0x01a4 +#define NVC197_SET_DST_LAYER_V 31:0 + +#define NVC197_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC197_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC197_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC197_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC197_LAUNCH_DMA 0x01b0 +#define NVC197_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC197_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC197_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC197_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC197_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC197_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC197_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC197_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC197_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC197_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC197_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC197_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC197_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC197_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC197_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC197_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC197_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC197_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC197_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC197_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC197_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC197_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC197_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC197_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC197_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC197_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC197_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC197_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC197_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC197_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC197_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC197_LOAD_INLINE_DATA 0x01b4 +#define NVC197_LOAD_INLINE_DATA_V 31:0 + +#define NVC197_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC197_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC197_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC197_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC197_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC197_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC197_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC197_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC197_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC197_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC197_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC197_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC197_RUN_DS_NOW 0x0200 +#define NVC197_RUN_DS_NOW_V 31:0 + +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVC197_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVC197_SET_GS_MODE 0x0208 +#define NVC197_SET_GS_MODE_TYPE 0:0 +#define NVC197_SET_GS_MODE_TYPE_ANY 0x00000000 +#define NVC197_SET_GS_MODE_TYPE_FAST_GS 0x00000001 + +#define NVC197_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVC197_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVC197_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVC197_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVC197_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVC197_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVC197_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVC197_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_GS_DM_FIFO 0x0214 +#define NVC197_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVC197_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVC197_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVC197_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVC197_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC197_INVALIDATE_SHADER_CACHES 0x021c +#define NVC197_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC197_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC197_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC197_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC197_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC197_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC197_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC197_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC197_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC197_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC197_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC197_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC197_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC197_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC197_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC197_SET_INSTANCE_COUNT 0x0220 +#define NVC197_SET_INSTANCE_COUNT_V 31:0 + +#define NVC197_SET_POSITION_W_SCALED_OFFSET_ENABLE 0x0224 +#define NVC197_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE 0:0 +#define NVC197_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_GO_IDLE_TIMEOUT 0x022c +#define NVC197_SET_GO_IDLE_TIMEOUT_V 31:0 + +#define NVC197_INCREMENT_SYNC_POINT 0x02c8 +#define NVC197_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVC197_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVC197_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVC197_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVC197_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVC197_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVC197_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVC197_SET_PRIM_CIRCULAR_BUFFER_THROTTLE 0x02d0 +#define NVC197_SET_PRIM_CIRCULAR_BUFFER_THROTTLE_PRIM_AREA 21:0 + +#define NVC197_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVC197_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVC197_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVC197_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVC197_DECOMPRESS_SURFACE 0x02e0 +#define NVC197_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVC197_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVC197_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVC197_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVC197_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVC197_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVC197_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVC197_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVC197_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVC197_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVC197_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVC197_SET_ZCULL_SUBREGION 0x02e8 +#define NVC197_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVC197_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVC197_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVC197_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVC197_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVC197_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVC197_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVC197_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVC197_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVC197_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVC197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVC197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVC197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVC197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVC197_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVC197_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVC197_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVC197_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVC197_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVC197_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVC197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVC197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVC197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVC197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVC197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC197_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVC197_DRAW_ZERO_INDEX 0x0304 +#define NVC197_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVC197_SET_L1_CONFIGURATION 0x0308 +#define NVC197_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVC197_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVC197_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVC197_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVC197_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVC197_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVC197_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVC197_SET_SPA_VERSION 0x0310 +#define NVC197_SET_SPA_VERSION_MINOR 7:0 +#define NVC197_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC197_SET_IEEE_CLEAN_UPDATE 0x0314 +#define NVC197_SET_IEEE_CLEAN_UPDATE_ENABLE 0:0 +#define NVC197_SET_IEEE_CLEAN_UPDATE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_IEEE_CLEAN_UPDATE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_SNAP_GRID_LINE 0x0318 +#define NVC197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC197_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC197_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVC197_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC197_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC197_SET_SNAP_GRID_NON_LINE 0x031c +#define NVC197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC197_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC197_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVC197_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC197_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC197_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVC197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVC197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVC197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVC197_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVC197_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVC197_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVC197_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVC197_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVC197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVC197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVC197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVC197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVC197_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVC197_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVC197_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVC197_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVC197_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVC197_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVC197_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVC197_SET_TESSELLATION_LOD_V1 0x0330 +#define NVC197_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVC197_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVC197_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVC197_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVC197_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVC197_RESERVED_TG07 0x033c +#define NVC197_RESERVED_TG07_V 0:0 + +#define NVC197_RESERVED_TG08 0x0340 +#define NVC197_RESERVED_TG08_V 0:0 + +#define NVC197_RESERVED_TG09 0x0344 +#define NVC197_RESERVED_TG09_V 0:0 + +#define NVC197_RESERVED_TG10 0x0348 +#define NVC197_RESERVED_TG10_V 0:0 + +#define NVC197_RESERVED_TG11 0x034c +#define NVC197_RESERVED_TG11_V 0:0 + +#define NVC197_RESERVED_TG12 0x0350 +#define NVC197_RESERVED_TG12_V 0:0 + +#define NVC197_RESERVED_TG13 0x0354 +#define NVC197_RESERVED_TG13_V 0:0 + +#define NVC197_RESERVED_TG14 0x0358 +#define NVC197_RESERVED_TG14_V 0:0 + +#define NVC197_RESERVED_TG15 0x035c +#define NVC197_RESERVED_TG15_V 0:0 + +#define NVC197_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVC197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVC197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVC197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVC197_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVC197_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVC197_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVC197_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVC197_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVC197_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVC197_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVC197_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVC197_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVC197_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVC197_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVC197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVC197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVC197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVC197_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE 8:8 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE 9:9 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC197_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVC197_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVC197_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVC197_SET_RASTER_ENABLE 0x037c +#define NVC197_SET_RASTER_ENABLE_V 0:0 +#define NVC197_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVC197_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVC197_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVC197_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVC197_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVC197_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVC197_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVC197_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVC197_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVC197_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVC197_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVC197_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVC197_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVC197_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVC197_SET_POSITION_W_SCALED_OFFSET_SCALE_A(j) (0x0400+(j)*16) +#define NVC197_SET_POSITION_W_SCALED_OFFSET_SCALE_A_V 31:0 + +#define NVC197_SET_POSITION_W_SCALED_OFFSET_SCALE_B(j) (0x0404+(j)*16) +#define NVC197_SET_POSITION_W_SCALED_OFFSET_SCALE_B_V 31:0 + +#define NVC197_SET_POSITION_W_SCALED_OFFSET_RESERVED_A(j) (0x0408+(j)*16) +#define NVC197_SET_POSITION_W_SCALED_OFFSET_RESERVED_A_V 31:0 + +#define NVC197_SET_POSITION_W_SCALED_OFFSET_RESERVED_B(j) (0x040c+(j)*16) +#define NVC197_SET_POSITION_W_SCALED_OFFSET_RESERVED_B_V 31:0 + +#define NVC197_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVC197_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVC197_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVC197_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVC197_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVC197_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVC197_SET_RASTER_INPUT 0x0740 +#define NVC197_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVC197_SET_STREAM_OUTPUT 0x0744 +#define NVC197_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVC197_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVC197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVC197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_ALPHA_FRACTION 0x074c +#define NVC197_SET_ALPHA_FRACTION_V 7:0 + +#define NVC197_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVC197_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVC197_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVC197_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVC197_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 +#define NVC197_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES_EXTENDED 5:5 + +#define NVC197_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVC197_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC197_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC197_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVC197_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC197_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC197_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVC197_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVC197_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVC197_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVC197_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVC197_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVC197_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVC197_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC197_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVC197_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC197_SET_ISBE_SAVE_RESTORE_PROGRAM 0x07ac +#define NVC197_SET_ISBE_SAVE_RESTORE_PROGRAM_OFFSET 31:0 + +#define NVC197_SET_STENCIL_ZERO_BANDWIDTH_CLEAR 0x07b0 +#define NVC197_SET_STENCIL_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC197_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVC197_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVC197_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVC197_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVC197_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVC197_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVC197_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVC197_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVC197_SET_CULL_BEFORE_FETCH 0x07dc +#define NVC197_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVC197_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVC197_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVC197_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVC197_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVC197_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVC197_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVC197_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVC197_SET_ZCULL_STORAGE_A 0x07e8 +#define NVC197_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVC197_SET_ZCULL_STORAGE_B 0x07ec +#define NVC197_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVC197_SET_ZCULL_STORAGE_C 0x07f0 +#define NVC197_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC197_SET_ZCULL_STORAGE_D 0x07f4 +#define NVC197_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC197_SET_ZT_READ_ONLY 0x07f8 +#define NVC197_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVC197_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVC197_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVC197_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVC197_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVC197_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVC197_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVC197_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVC197_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVC197_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVC197_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVC197_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVC197_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVC197_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVC197_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVC197_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVC197_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVC197_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVC197_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVC197_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVC197_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVC197_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVC197_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVC197_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVC197_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVC197_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC197_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVC197_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVC197_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC197_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC197_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVC197_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC197_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVC197_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVC197_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVC197_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVC197_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVC197_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVC197_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVC197_SET_COLOR_TARGET_MARK(j) (0x0824+(j)*64) +#define NVC197_SET_COLOR_TARGET_MARK_IEEE_CLEAN 0:0 +#define NVC197_SET_COLOR_TARGET_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVC197_SET_COLOR_TARGET_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVC197_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVC197_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVC197_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVC197_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVC197_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVC197_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVC197_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVC197_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVC197_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVC197_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVC197_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVC197_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE(j) (0x0a18+(j)*32) +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_X 2:0 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X 0x00000000 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X 0x00000001 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y 0x00000002 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y 0x00000003 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z 0x00000004 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z 0x00000005 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W 0x00000006 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W 0x00000007 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y 6:4 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X 0x00000000 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X 0x00000001 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y 0x00000002 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y 0x00000003 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z 0x00000004 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z 0x00000005 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W 0x00000006 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W 0x00000007 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z 10:8 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X 0x00000000 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X 0x00000001 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y 0x00000002 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y 0x00000003 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z 0x00000004 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z 0x00000005 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W 0x00000006 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W 0x00000007 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_W 14:12 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X 0x00000000 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X 0x00000001 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y 0x00000002 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y 0x00000003 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z 0x00000004 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z 0x00000005 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W 0x00000006 +#define NVC197_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W 0x00000007 + +#define NVC197_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(j) (0x0a1c+(j)*32) +#define NVC197_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_X_BITS 4:0 +#define NVC197_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_Y_BITS 12:8 + +#define NVC197_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVC197_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVC197_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC197_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVC197_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVC197_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC197_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVC197_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVC197_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVC197_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVC197_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVC197_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVC197_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVC197_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVC197_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVC197_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVC197_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVC197_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVC197_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVC197_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVC197_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVC197_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVC197_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVC197_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC197_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVC197_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVC197_SET_STATISTICS_COUNTER 0x0d68 +#define NVC197_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVC197_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVC197_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVC197_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVC197_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVC197_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVC197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVC197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVC197_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVC197_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVC197_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVC197_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVC197_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVC197_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVC197_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVC197_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVC197_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 +#define NVC197_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE 16:16 +#define NVC197_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVC197_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC197_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC197_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVC197_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC197_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC197_SET_VERTEX_ARRAY_START 0x0d74 +#define NVC197_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVC197_DRAW_VERTEX_ARRAY 0x0d78 +#define NVC197_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVC197_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVC197_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVC197_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVC197_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVC197_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVC197_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVC197_SET_Z_CLEAR_VALUE 0x0d90 +#define NVC197_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVC197_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC197_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC197_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC197_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC197_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVC197_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVC197_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVC197_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC197_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC197_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVC197_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVC197_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVC197_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVC197_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVC197_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVC197_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVC197_SET_FRONT_POLYGON_MODE 0x0dac +#define NVC197_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVC197_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC197_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC197_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC197_SET_BACK_POLYGON_MODE 0x0db0 +#define NVC197_SET_BACK_POLYGON_MODE_V 31:0 +#define NVC197_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC197_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC197_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC197_SET_POLY_SMOOTH 0x0db4 +#define NVC197_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVC197_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVC197_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_ZT_MARK 0x0db8 +#define NVC197_SET_ZT_MARK_IEEE_CLEAN 0:0 +#define NVC197_SET_ZT_MARK_IEEE_CLEAN_FALSE 0x00000000 +#define NVC197_SET_ZT_MARK_IEEE_CLEAN_TRUE 0x00000001 + +#define NVC197_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVC197_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVC197_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVC197_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVC197_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVC197_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVC197_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVC197_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVC197_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVC197_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVC197_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVC197_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVC197_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVC197_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVC197_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVC197_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVC197_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_PATCH 0x0dcc +#define NVC197_SET_PATCH_SIZE 7:0 + +#define NVC197_SET_ITERATED_BLEND 0x0dd0 +#define NVC197_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVC197_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVC197_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVC197_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVC197_SET_ZCULL_CRITERION 0x0dd8 +#define NVC197_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVC197_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVC197_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVC197_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVC197_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVC197_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVC197_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVC197_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVC197_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVC197_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVC197_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVC197_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVC197_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVC197_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVC197_SET_ZCULL_CRITERION_SREF 23:16 +#define NVC197_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVC197_PIXEL_SHADER_BARRIER 0x0de0 +#define NVC197_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVC197_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVC197_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC197_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVC197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVC197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVC197_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVC197_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVC197_SET_WINDOW_OFFSET_X 0x0df8 +#define NVC197_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVC197_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVC197_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVC197_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVC197_SET_SCISSOR_ENABLE_V 0:0 +#define NVC197_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVC197_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVC197_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVC197_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVC197_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVC197_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVC197_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVC197_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVC197_SET_SELECT_MAXWELL_TEXTURE_HEADERS 0x0f10 +#define NVC197_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V 0:0 +#define NVC197_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE 0x00000000 +#define NVC197_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE 0x00000001 + +#define NVC197_SET_VPC_PERF_KNOB 0x0f14 +#define NVC197_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVC197_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVC197_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVC197_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVC197_PM_LOCAL_TRIGGER 0x0f18 +#define NVC197_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVC197_SET_POST_Z_PS_IMASK 0x0f1c +#define NVC197_SET_POST_Z_PS_IMASK_ENABLE 0:0 +#define NVC197_SET_POST_Z_PS_IMASK_ENABLE_FALSE 0x00000000 +#define NVC197_SET_POST_Z_PS_IMASK_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVC197_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVC197_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVC197_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVC197_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVC197_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVC197_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVC197_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVC197_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVC197_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVC197_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVC197_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVC197_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVC197_SET_BACK_STENCIL_MASK 0x0f58 +#define NVC197_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVC197_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVC197_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVC197_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVC197_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVC197_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVC197_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVC197_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVC197_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVC197_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVC197_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVC197_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVC197_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVC197_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC197_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVC197_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVC197_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVC197_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVC197_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVC197_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVC197_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVC197_SET_SAMPLE_MASK 0x0fa4 +#define NVC197_SET_SAMPLE_MASK_RASTER_OUT_ENABLE 0:0 +#define NVC197_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE 0x00000001 +#define NVC197_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE 4:4 +#define NVC197_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE 0x00000000 +#define NVC197_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_COLOR_TARGET_SAMPLE_MASK 0x0fa8 +#define NVC197_SET_COLOR_TARGET_SAMPLE_MASK_V 15:0 + +#define NVC197_SET_CT_MRT_ENABLE 0x0fac +#define NVC197_SET_CT_MRT_ENABLE_V 0:0 +#define NVC197_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVC197_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVC197_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVC197_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVC197_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVC197_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVC197_SET_TIR 0x0fb4 +#define NVC197_SET_TIR_MODE 1:0 +#define NVC197_SET_TIR_MODE_DISABLED 0x00000000 +#define NVC197_SET_TIR_MODE_RASTER_N_TARGET_M 0x00000001 + +#define NVC197_SET_ANTI_ALIAS_RASTER 0x0fb8 +#define NVC197_SET_ANTI_ALIAS_RASTER_SAMPLES 2:0 +#define NVC197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1 0x00000000 +#define NVC197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2 0x00000002 +#define NVC197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC197_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4 0x00000006 + +#define NVC197_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVC197_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVC197_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVC197_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVC197_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVC197_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVC197_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVC197_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVC197_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVC197_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVC197_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_TIR_MODULATION 0x0fd4 +#define NVC197_SET_TIR_MODULATION_COMPONENT_SELECT 1:0 +#define NVC197_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION 0x00000000 +#define NVC197_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB 0x00000001 +#define NVC197_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY 0x00000002 +#define NVC197_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA 0x00000003 + +#define NVC197_SET_TIR_MODULATION_FUNCTION 0x0fd8 +#define NVC197_SET_TIR_MODULATION_FUNCTION_SELECT 0:0 +#define NVC197_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR 0x00000000 +#define NVC197_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE 0x00000001 + +#define NVC197_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVC197_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVC197_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVC197_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVC197_SET_ZT_A 0x0fe0 +#define NVC197_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_ZT_B 0x0fe4 +#define NVC197_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_ZT_FORMAT 0x0fe8 +#define NVC197_SET_ZT_FORMAT_V 4:0 +#define NVC197_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVC197_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVC197_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVC197_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVC197_SET_ZT_FORMAT_V_S8 0x00000017 +#define NVC197_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVC197_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVC197_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVC197_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVC197_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVC197_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVC197_SET_ZT_BLOCK_SIZE 0x0fec +#define NVC197_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVC197_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC197_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVC197_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC197_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC197_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC197_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC197_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC197_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC197_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVC197_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC197_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVC197_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVC197_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVC197_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVC197_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC197_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVC197_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVC197_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC197_SET_TILED_CACHE_BUNDLE_CONTROL 0x0ffc +#define NVC197_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT 0:0 +#define NVC197_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_FALSE 0x00000000 +#define NVC197_SET_TILED_CACHE_BUNDLE_CONTROL_TREAT_HEAVYWEIGHT_AS_LIGHTWEIGHT_TRUE 0x00000001 + +#define NVC197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC197_SET_VIEWPORT_MULTICAST 0x1004 +#define NVC197_SET_VIEWPORT_MULTICAST_ORDER 0:0 +#define NVC197_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER 0x00000000 +#define NVC197_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER 0x00000001 + +#define NVC197_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVC197_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVC197_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVC197_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC197_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVC197_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVC197_SET_RESERVED_SW_METHOD00 0x1014 +#define NVC197_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC197_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVC197_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC197_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVC197_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC197_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVC197_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC197_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVC197_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC197_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_RESERVED_SW_METHOD01 0x1028 +#define NVC197_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD02 0x102c +#define NVC197_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC197_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) (0x1030+(i)*4) +#define NVC197_SET_TIR_MODULATION_COEFFICIENT_TABLE_V0 7:0 +#define NVC197_SET_TIR_MODULATION_COEFFICIENT_TABLE_V1 15:8 +#define NVC197_SET_TIR_MODULATION_COEFFICIENT_TABLE_V2 23:16 +#define NVC197_SET_TIR_MODULATION_COEFFICIENT_TABLE_V3 31:24 + +#define NVC197_SET_SPARE_NOOP01 0x1044 +#define NVC197_SET_SPARE_NOOP01_V 31:0 + +#define NVC197_SET_SPARE_NOOP02 0x1048 +#define NVC197_SET_SPARE_NOOP02_V 31:0 + +#define NVC197_SET_SPARE_NOOP03 0x104c +#define NVC197_SET_SPARE_NOOP03_V 31:0 + +#define NVC197_SET_SPARE_NOOP04 0x1050 +#define NVC197_SET_SPARE_NOOP04_V 31:0 + +#define NVC197_SET_SPARE_NOOP05 0x1054 +#define NVC197_SET_SPARE_NOOP05_V 31:0 + +#define NVC197_SET_SPARE_NOOP06 0x1058 +#define NVC197_SET_SPARE_NOOP06_V 31:0 + +#define NVC197_SET_SPARE_NOOP07 0x105c +#define NVC197_SET_SPARE_NOOP07_V 31:0 + +#define NVC197_SET_SPARE_NOOP08 0x1060 +#define NVC197_SET_SPARE_NOOP08_V 31:0 + +#define NVC197_SET_SPARE_NOOP09 0x1064 +#define NVC197_SET_SPARE_NOOP09_V 31:0 + +#define NVC197_SET_SPARE_NOOP10 0x1068 +#define NVC197_SET_SPARE_NOOP10_V 31:0 + +#define NVC197_SET_SPARE_NOOP11 0x106c +#define NVC197_SET_SPARE_NOOP11_V 31:0 + +#define NVC197_SET_SPARE_NOOP12 0x1070 +#define NVC197_SET_SPARE_NOOP12_V 31:0 + +#define NVC197_SET_SPARE_NOOP13 0x1074 +#define NVC197_SET_SPARE_NOOP13_V 31:0 + +#define NVC197_SET_SPARE_NOOP14 0x1078 +#define NVC197_SET_SPARE_NOOP14_V 31:0 + +#define NVC197_SET_SPARE_NOOP15 0x107c +#define NVC197_SET_SPARE_NOOP15_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVC197_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVC197_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVC197_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD06 0x10bc +#define NVC197_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVC197_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVC197_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVC197_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVC197_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVC197_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVC197_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVC197_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD13 0x10dc +#define NVC197_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC197_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVC197_UNBIND_ALL 0x10f4 +#define NVC197_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVC197_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVC197_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVC197_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVC197_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC197_SET_RESERVED_SW_METHOD14 0x1100 +#define NVC197_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC197_SET_RESERVED_SW_METHOD15 0x1104 +#define NVC197_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC197_NO_OPERATION_DATA_HI 0x110c +#define NVC197_NO_OPERATION_DATA_HI_V 31:0 + +#define NVC197_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVC197_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVC197_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVC197_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVC197_PM_TRIGGER_END 0x1114 +#define NVC197_PM_TRIGGER_END_V 31:0 + +#define NVC197_SET_VERTEX_ID_BASE 0x1118 +#define NVC197_SET_VERTEX_ID_BASE_V 31:0 + +#define NVC197_SET_STENCIL_COMPRESSION 0x111c +#define NVC197_SET_STENCIL_COMPRESSION_ENABLE 0:0 +#define NVC197_SET_STENCIL_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STENCIL_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC197_SET_TIR_CONTROL 0x1130 +#define NVC197_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES 0:0 +#define NVC197_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC197_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC197_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES 4:4 +#define NVC197_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC197_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC197_SET_TIR_CONTROL_REDUCE_COVERAGE 1:1 +#define NVC197_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE 0x00000000 +#define NVC197_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE 0x00000001 + +#define NVC197_SET_MUTABLE_METHOD_CONTROL 0x1134 +#define NVC197_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT 0:0 +#define NVC197_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE 0x00000000 +#define NVC197_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE 0x00000001 + +#define NVC197_SET_POST_PS_INITIAL_COVERAGE 0x1138 +#define NVC197_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE 0:0 +#define NVC197_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE 0x00000000 +#define NVC197_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE 0x00000001 + +#define NVC197_SET_FILL_VIA_TRIANGLE 0x113c +#define NVC197_SET_FILL_VIA_TRIANGLE_MODE 1:0 +#define NVC197_SET_FILL_VIA_TRIANGLE_MODE_DISABLED 0x00000000 +#define NVC197_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL 0x00000001 +#define NVC197_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX 0x00000002 + +#define NVC197_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVC197_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVC197_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVC197_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVC197_FLUSH_PENDING_WRITES 0x1144 +#define NVC197_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVC197_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVC197_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC197_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC197_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC197_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVC197_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC197_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC197_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC197_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) (0x11e0+(i)*4) +#define NVC197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X0 3:0 +#define NVC197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y0 7:4 +#define NVC197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X1 11:8 +#define NVC197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y1 15:12 +#define NVC197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X2 19:16 +#define NVC197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y2 23:20 +#define NVC197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X3 27:24 +#define NVC197_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y3 31:28 + +#define NVC197_SET_OFFSET_RENDER_TARGET_INDEX 0x11f0 +#define NVC197_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX 0:0 +#define NVC197_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE 0x00000000 +#define NVC197_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE 0x00000001 + +#define NVC197_FORCE_HEAVYWEIGHT_METHOD_SYNC 0x11f4 +#define NVC197_FORCE_HEAVYWEIGHT_METHOD_SYNC_V 31:0 + +#define NVC197_SET_COVERAGE_TO_COLOR 0x11f8 +#define NVC197_SET_COVERAGE_TO_COLOR_ENABLE 0:0 +#define NVC197_SET_COVERAGE_TO_COLOR_ENABLE_FALSE 0x00000000 +#define NVC197_SET_COVERAGE_TO_COLOR_ENABLE_TRUE 0x00000001 +#define NVC197_SET_COVERAGE_TO_COLOR_CT_SELECT 6:4 + +#define NVC197_DECOMPRESS_ZETA_SURFACE 0x11fc +#define NVC197_DECOMPRESS_ZETA_SURFACE_Z_ENABLE 0:0 +#define NVC197_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC197_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC197_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE 4:4 +#define NVC197_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC197_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_SCREEN_STATE_MASK 0x1204 +#define NVC197_SET_SCREEN_STATE_MASK_MASK 3:0 + +#define NVC197_SET_ZT_SPARSE 0x1208 +#define NVC197_SET_ZT_SPARSE_ENABLE 0:0 +#define NVC197_SET_ZT_SPARSE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZT_SPARSE_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ZT_SPARSE_UNMAPPED_COMPARE 1:1 +#define NVC197_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 0x00000000 +#define NVC197_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS 0x00000001 + +#define NVC197_INVALIDATE_SAMPLER_CACHE_ALL 0x120c +#define NVC197_INVALIDATE_SAMPLER_CACHE_ALL_V 0:0 + +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_ALL 0x1210 +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_ALL_V 0:0 + +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC197_SET_CT_SELECT 0x121c +#define NVC197_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVC197_SET_CT_SELECT_TARGET0 6:4 +#define NVC197_SET_CT_SELECT_TARGET1 9:7 +#define NVC197_SET_CT_SELECT_TARGET2 12:10 +#define NVC197_SET_CT_SELECT_TARGET3 15:13 +#define NVC197_SET_CT_SELECT_TARGET4 18:16 +#define NVC197_SET_CT_SELECT_TARGET5 21:19 +#define NVC197_SET_CT_SELECT_TARGET6 24:22 +#define NVC197_SET_CT_SELECT_TARGET7 27:25 + +#define NVC197_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVC197_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL 0x1224 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE 1:0 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT 0x00000000 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE 0x00000001 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL 0x00000002 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE 2:2 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 0x00000000 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 0x00000001 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER 3:3 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED 0x00000000 +#define NVC197_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED 0x00000001 + +#define NVC197_SET_ZT_SIZE_A 0x1228 +#define NVC197_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVC197_SET_ZT_SIZE_B 0x122c +#define NVC197_SET_ZT_SIZE_B_HEIGHT 17:0 + +#define NVC197_SET_ZT_SIZE_C 0x1230 +#define NVC197_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVC197_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVC197_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC197_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVC197_SET_SAMPLER_BINDING 0x1234 +#define NVC197_SET_SAMPLER_BINDING_V 0:0 +#define NVC197_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVC197_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVC197_DRAW_AUTO 0x123c +#define NVC197_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVC197_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) (0x1240+(i)*4) +#define NVC197_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK_V 31:0 + +#define NVC197_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE 0x1260 +#define NVC197_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_INDEX 7:0 +#define NVC197_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_VALUE 23:8 + +#define NVC197_SET_BACK_END_COPY_A 0x1264 +#define NVC197_SET_BACK_END_COPY_A_DWORDS 7:0 +#define NVC197_SET_BACK_END_COPY_A_SATURATE32_ENABLE 8:8 +#define NVC197_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE 0x00000000 +#define NVC197_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE 0x00000001 +#define NVC197_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE 12:12 +#define NVC197_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE 0x00000000 +#define NVC197_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_BACK_END_COPY_B 0x1268 +#define NVC197_SET_BACK_END_COPY_B_SRC_ADDRESS_UPPER 7:0 + +#define NVC197_SET_BACK_END_COPY_C 0x126c +#define NVC197_SET_BACK_END_COPY_C_SRC_ADDRESS_LOWER 31:0 + +#define NVC197_SET_BACK_END_COPY_D 0x1270 +#define NVC197_SET_BACK_END_COPY_D_DEST_ADDRESS_UPPER 7:0 + +#define NVC197_SET_BACK_END_COPY_E 0x1274 +#define NVC197_SET_BACK_END_COPY_E_DEST_ADDRESS_LOWER 31:0 + +#define NVC197_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVC197_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 19:0 + +#define NVC197_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVC197_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVC197_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC197_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVC197_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVC197_CLEAR_ZCULL_REGION 0x12c8 +#define NVC197_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVC197_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVC197_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVC197_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVC197_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC197_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC197_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVC197_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC197_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC197_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVC197_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVC197_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVC197_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVC197_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVC197_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVC197_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVC197_SET_DEPTH_TEST 0x12cc +#define NVC197_SET_DEPTH_TEST_ENABLE 0:0 +#define NVC197_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVC197_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_FILL_MODE 0x12d0 +#define NVC197_SET_FILL_MODE_V 31:0 +#define NVC197_SET_FILL_MODE_V_POINT 0x00000001 +#define NVC197_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVC197_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVC197_SET_SHADE_MODE 0x12d4 +#define NVC197_SET_SHADE_MODE_V 31:0 +#define NVC197_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVC197_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVC197_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVC197_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC197_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVC197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVC197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVC197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVC197_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVC197_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVC197_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVC197_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVC197_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_DEPTH_WRITE 0x12e8 +#define NVC197_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVC197_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_ALPHA_TEST 0x12ec +#define NVC197_SET_ALPHA_TEST_ENABLE 0:0 +#define NVC197_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVC197_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVC197_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVC197_DRAW_INLINE_INDEX4X8 0x1304 +#define NVC197_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVC197_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVC197_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVC197_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVC197_D3D_SET_CULL_MODE 0x1308 +#define NVC197_D3D_SET_CULL_MODE_V 31:0 +#define NVC197_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVC197_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVC197_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVC197_SET_DEPTH_FUNC 0x130c +#define NVC197_SET_DEPTH_FUNC_V 31:0 +#define NVC197_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVC197_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVC197_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC197_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC197_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVC197_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC197_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC197_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC197_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVC197_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVC197_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC197_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC197_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVC197_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC197_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC197_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC197_SET_ALPHA_REF 0x1310 +#define NVC197_SET_ALPHA_REF_V 31:0 + +#define NVC197_SET_ALPHA_FUNC 0x1314 +#define NVC197_SET_ALPHA_FUNC_V 31:0 +#define NVC197_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVC197_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVC197_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC197_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC197_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVC197_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC197_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC197_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC197_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVC197_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVC197_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC197_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC197_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVC197_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC197_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC197_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC197_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVC197_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVC197_SET_BLEND_CONST_RED 0x131c +#define NVC197_SET_BLEND_CONST_RED_V 31:0 + +#define NVC197_SET_BLEND_CONST_GREEN 0x1320 +#define NVC197_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVC197_SET_BLEND_CONST_BLUE 0x1324 +#define NVC197_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVC197_SET_BLEND_CONST_ALPHA 0x1328 +#define NVC197_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVC197_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC197_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC197_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC197_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC197_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC197_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC197_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVC197_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC197_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC197_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_BLEND_COLOR_OP 0x1340 +#define NVC197_SET_BLEND_COLOR_OP_V 31:0 +#define NVC197_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC197_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC197_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC197_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC197_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC197_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC197_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC197_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC197_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC197_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC197_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC197_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC197_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC197_SET_BLEND_ALPHA_OP 0x134c +#define NVC197_SET_BLEND_ALPHA_OP_V 31:0 +#define NVC197_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC197_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC197_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC197_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC197_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC197_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC197_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC197_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC197_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC197_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC197_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC197_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVC197_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVC197_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVC197_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC197_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC197_SET_SINGLE_ROP_CONTROL 0x135c +#define NVC197_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVC197_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC197_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_BLEND(i) (0x1360+(i)*4) +#define NVC197_SET_BLEND_ENABLE 0:0 +#define NVC197_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVC197_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_STENCIL_TEST 0x1380 +#define NVC197_SET_STENCIL_TEST_ENABLE 0:0 +#define NVC197_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC197_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_STENCIL_OP_FAIL 0x1384 +#define NVC197_SET_STENCIL_OP_FAIL_V 31:0 +#define NVC197_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC197_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC197_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC197_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC197_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC197_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC197_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC197_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC197_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC197_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC197_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC197_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC197_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC197_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC197_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC197_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC197_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVC197_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC197_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC197_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC197_SET_STENCIL_OP_ZPASS 0x138c +#define NVC197_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVC197_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC197_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC197_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC197_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC197_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC197_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC197_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC197_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC197_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC197_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC197_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC197_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC197_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC197_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC197_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC197_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC197_SET_STENCIL_FUNC 0x1390 +#define NVC197_SET_STENCIL_FUNC_V 31:0 +#define NVC197_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC197_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC197_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC197_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC197_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC197_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC197_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC197_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC197_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC197_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC197_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC197_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC197_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC197_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC197_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC197_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC197_SET_STENCIL_FUNC_REF 0x1394 +#define NVC197_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVC197_SET_STENCIL_FUNC_MASK 0x1398 +#define NVC197_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVC197_SET_STENCIL_MASK 0x139c +#define NVC197_SET_STENCIL_MASK_V 7:0 + +#define NVC197_SET_DRAW_AUTO_START 0x13a4 +#define NVC197_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVC197_SET_PS_SATURATE 0x13a8 +#define NVC197_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVC197_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVC197_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC197_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVC197_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVC197_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC197_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVC197_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVC197_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC197_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVC197_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVC197_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC197_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVC197_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVC197_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC197_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVC197_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVC197_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC197_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVC197_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVC197_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC197_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVC197_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVC197_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC197_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVC197_SET_WINDOW_ORIGIN 0x13ac +#define NVC197_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVC197_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVC197_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVC197_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVC197_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVC197_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVC197_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVC197_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC197_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVC197_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC197_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVC197_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVC197_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_ALPHA_HYSTERESIS 0x1420 +#define NVC197_SET_ALPHA_HYSTERESIS_ROUNDS_OF_ALPHA 7:0 + +#define NVC197_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC197_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC197_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC197_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC197_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC197_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC197_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVC197_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVC197_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVC197_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVC197_SET_PS_WARP_WATERMARKS 0x1450 +#define NVC197_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVC197_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVC197_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVC197_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVC197_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC197_STORE_ZCULL 0x1464 +#define NVC197_STORE_ZCULL_V 0:0 + +#define NVC197_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVC197_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVC197_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVC197_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVC197_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVC197_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVC197_LOAD_ZCULL 0x1500 +#define NVC197_LOAD_ZCULL_V 0:0 + +#define NVC197_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVC197_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVC197_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVC197_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC197_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC197_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVC197_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC197_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC197_SET_USER_CLIP_ENABLE 0x1510 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVC197_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVC197_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVC197_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVC197_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_POINT_SIZE 0x1518 +#define NVC197_SET_POINT_SIZE_V 31:0 + +#define NVC197_SET_ZCULL_STATS 0x151c +#define NVC197_SET_ZCULL_STATS_ENABLE 0:0 +#define NVC197_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_POINT_SPRITE 0x1520 +#define NVC197_SET_POINT_SPRITE_ENABLE 0:0 +#define NVC197_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC197_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC197_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC197_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC197_CLEAR_REPORT_VALUE 0x1530 +#define NVC197_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVC197_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVC197_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVC197_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVC197_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVC197_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVC197_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC197_CLEAR_REPORT_VALUE_TYPE_SCG_CLOCKS 0x00000009 + +#define NVC197_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVC197_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVC197_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVC197_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVC197_SET_ZT_SELECT 0x1538 +#define NVC197_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVC197_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVC197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVC197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVC197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVC197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVC197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVC197_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVC197_SET_RENDER_ENABLE_A 0x1550 +#define NVC197_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_RENDER_ENABLE_B 0x1554 +#define NVC197_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_RENDER_ENABLE_C 0x1558 +#define NVC197_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC197_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC197_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC197_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC197_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC197_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC197_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC197_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC197_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC197_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC197_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVC197_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVC197_SET_ANTI_ALIASED_LINE 0x1570 +#define NVC197_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVC197_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC197_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC197_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_TEX_HEADER_POOL_C 0x157c +#define NVC197_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC197_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVC197_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVC197_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVC197_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVC197_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC197_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC197_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC197_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC197_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC197_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC197_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVC197_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVC197_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC197_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC197_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC197_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC197_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC197_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC197_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC197_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC197_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC197_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC197_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC197_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC197_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC197_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC197_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC197_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC197_SET_SRGB_WRITE 0x15b8 +#define NVC197_SET_SRGB_WRITE_ENABLE 0:0 +#define NVC197_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_DEPTH_BIAS 0x15bc +#define NVC197_SET_DEPTH_BIAS_V 31:0 + +#define NVC197_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVC197_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVC197_SET_RT_LAYER 0x15cc +#define NVC197_SET_RT_LAYER_V 15:0 +#define NVC197_SET_RT_LAYER_CONTROL 16:16 +#define NVC197_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVC197_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVC197_SET_ANTI_ALIAS 0x15d0 +#define NVC197_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVC197_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVC197_SET_EDGE_FLAG 0x15e4 +#define NVC197_SET_EDGE_FLAG_V 0:0 +#define NVC197_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVC197_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVC197_DRAW_INLINE_INDEX 0x15e8 +#define NVC197_DRAW_INLINE_INDEX_V 31:0 + +#define NVC197_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVC197_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVC197_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVC197_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVC197_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVC197_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVC197_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVC197_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVC197_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVC197_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVC197_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVC197_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVC197_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVC197_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVC197_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVC197_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVC197_SET_POINT_SPRITE_SELECT 0x1604 +#define NVC197_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVC197_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVC197_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVC197_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVC197_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVC197_SET_PROGRAM_REGION_A 0x1608 +#define NVC197_SET_PROGRAM_REGION_A_ADDRESS_UPPER 7:0 + +#define NVC197_SET_PROGRAM_REGION_B 0x160c +#define NVC197_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVC197_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVC197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVC197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVC197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVC197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVC197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVC197_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVC197_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVC197_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVC197_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVC197_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVC197_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVC197_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVC197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVC197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVC197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVC197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVC197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVC197_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVC197_END 0x1614 +#define NVC197_END_V 0:0 + +#define NVC197_BEGIN 0x1618 +#define NVC197_BEGIN_OP 15:0 +#define NVC197_BEGIN_OP_POINTS 0x00000000 +#define NVC197_BEGIN_OP_LINES 0x00000001 +#define NVC197_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVC197_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVC197_BEGIN_OP_TRIANGLES 0x00000004 +#define NVC197_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVC197_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVC197_BEGIN_OP_QUADS 0x00000007 +#define NVC197_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVC197_BEGIN_OP_POLYGON 0x00000009 +#define NVC197_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVC197_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVC197_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_BEGIN_OP_PATCH 0x0000000E +#define NVC197_BEGIN_PRIMITIVE_ID 24:24 +#define NVC197_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC197_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC197_BEGIN_INSTANCE_ID 27:26 +#define NVC197_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVC197_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC197_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC197_BEGIN_SPLIT_MODE 30:29 +#define NVC197_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC197_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC197_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC197_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC197_BEGIN_INSTANCE_ITERATE_ENABLE 31:31 +#define NVC197_BEGIN_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC197_BEGIN_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_VERTEX_ID_COPY 0x161c +#define NVC197_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVC197_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVC197_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVC197_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVC197_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVC197_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVC197_LOAD_PRIMITIVE_ID 0x1624 +#define NVC197_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVC197_SET_SHADER_BASED_CULL 0x162c +#define NVC197_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVC197_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVC197_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVC197_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVC197_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVC197_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_CLASS_VERSION 0x1638 +#define NVC197_SET_CLASS_VERSION_CURRENT 15:0 +#define NVC197_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC197_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVC197_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVC197_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVC197_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVC197_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVC197_SET_DA_OUTPUT 0x164c +#define NVC197_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVC197_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVC197_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVC197_SET_ANTI_ALIASED_POINT 0x1658 +#define NVC197_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVC197_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_POINT_CENTER_MODE 0x165c +#define NVC197_SET_POINT_CENTER_MODE_V 31:0 +#define NVC197_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVC197_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVC197_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVC197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVC197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVC197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVC197_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVC197_SET_LINE_STIPPLE 0x166c +#define NVC197_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVC197_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVC197_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVC197_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVC197_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVC197_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVC197_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVC197_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVC197_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVC197_SET_PROVOKING_VERTEX 0x1684 +#define NVC197_SET_PROVOKING_VERTEX_V 0:0 +#define NVC197_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVC197_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVC197_SET_TWO_SIDED_LIGHT 0x1688 +#define NVC197_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVC197_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_POLYGON_STIPPLE 0x168c +#define NVC197_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVC197_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_SHADER_CONTROL 0x1690 +#define NVC197_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVC197_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVC197_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVC197_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVC197_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVC197_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVC197_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVC197_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVC197_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVC197_CHECK_CLASS_VERSION 0x16a0 +#define NVC197_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVC197_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC197_SET_SPH_VERSION 0x16a4 +#define NVC197_SET_SPH_VERSION_CURRENT 15:0 +#define NVC197_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC197_CHECK_SPH_VERSION 0x16a8 +#define NVC197_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVC197_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC197_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVC197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVC197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVC197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVC197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVC197_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVC197_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVC197_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVC197_SET_AAM_VERSION 0x1790 +#define NVC197_SET_AAM_VERSION_CURRENT 15:0 +#define NVC197_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC197_CHECK_AAM_VERSION 0x1794 +#define NVC197_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVC197_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC197_SET_ZT_LAYER 0x179c +#define NVC197_SET_ZT_LAYER_OFFSET 15:0 + +#define NVC197_SET_INDEX_BUFFER_A 0x17c8 +#define NVC197_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVC197_SET_INDEX_BUFFER_B 0x17cc +#define NVC197_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVC197_SET_INDEX_BUFFER_C 0x17d0 +#define NVC197_SET_INDEX_BUFFER_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC197_SET_INDEX_BUFFER_D 0x17d4 +#define NVC197_SET_INDEX_BUFFER_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC197_SET_INDEX_BUFFER_E 0x17d8 +#define NVC197_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVC197_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVC197_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVC197_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVC197_SET_INDEX_BUFFER_F 0x17dc +#define NVC197_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVC197_DRAW_INDEX_BUFFER 0x17e0 +#define NVC197_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC197_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVC197_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVC197_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVC197_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVC197_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVC197_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVC197_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVC197_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVC197_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVC197_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVC197_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVC197_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVC197_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVC197_OGL_SET_CULL 0x1918 +#define NVC197_OGL_SET_CULL_ENABLE 0:0 +#define NVC197_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVC197_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVC197_OGL_SET_FRONT_FACE 0x191c +#define NVC197_OGL_SET_FRONT_FACE_V 31:0 +#define NVC197_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVC197_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVC197_OGL_SET_CULL_FACE 0x1920 +#define NVC197_OGL_SET_CULL_FACE_V 31:0 +#define NVC197_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVC197_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVC197_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVC197_SET_VIEWPORT_PIXEL 0x1924 +#define NVC197_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVC197_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVC197_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVC197_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVC197_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVC197_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVC197_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP 0x00000006 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVC197_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVC197_SET_USER_CLIP_OP 0x1940 +#define NVC197_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVC197_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVC197_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVC197_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVC197_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVC197_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVC197_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVC197_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVC197_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVC197_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVC197_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVC197_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVC197_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVC197_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVC197_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVC197_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVC197_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVC197_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVC197_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVC197_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVC197_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVC197_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVC197_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVC197_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVC197_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC197_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC197_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC197_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC197_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC197_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVC197_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVC197_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVC197_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVC197_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVC197_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVC197_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVC197_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVC197_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVC197_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVC197_INVALIDATE_ZCULL 0x1958 +#define NVC197_INVALIDATE_ZCULL_V 31:0 +#define NVC197_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVC197_SET_ZCULL 0x1968 +#define NVC197_SET_ZCULL_Z_ENABLE 0:0 +#define NVC197_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVC197_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_ZCULL_BOUNDS 0x196c +#define NVC197_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVC197_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVC197_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVC197_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC197_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVC197_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVC197_ZCULL_SYNC 0x1978 +#define NVC197_ZCULL_SYNC_V 31:0 + +#define NVC197_SET_CLIP_ID_TEST 0x197c +#define NVC197_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVC197_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVC197_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVC197_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVC197_SET_CLIP_ID 0x1984 +#define NVC197_SET_CLIP_ID_V 31:0 + +#define NVC197_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVC197_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVC197_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVC197_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVC197_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVC197_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVC197_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVC197_SET_LOGIC_OP 0x19c4 +#define NVC197_SET_LOGIC_OP_ENABLE 0:0 +#define NVC197_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVC197_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_LOGIC_OP_FUNC 0x19c8 +#define NVC197_SET_LOGIC_OP_FUNC_V 31:0 +#define NVC197_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVC197_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVC197_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVC197_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVC197_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVC197_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVC197_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVC197_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVC197_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVC197_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVC197_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVC197_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVC197_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVC197_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVC197_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVC197_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVC197_SET_Z_COMPRESSION 0x19cc +#define NVC197_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVC197_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC197_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC197_CLEAR_SURFACE 0x19d0 +#define NVC197_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVC197_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC197_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC197_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVC197_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC197_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC197_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVC197_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVC197_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVC197_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVC197_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVC197_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVC197_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVC197_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVC197_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVC197_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVC197_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVC197_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVC197_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVC197_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVC197_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVC197_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVC197_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVC197_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVC197_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC197_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVC197_SET_CT_WRITE_R_ENABLE 0:0 +#define NVC197_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVC197_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVC197_SET_CT_WRITE_G_ENABLE 4:4 +#define NVC197_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVC197_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVC197_SET_CT_WRITE_B_ENABLE 8:8 +#define NVC197_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVC197_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVC197_SET_CT_WRITE_A_ENABLE 12:12 +#define NVC197_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVC197_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVC197_PIPE_NOP 0x1a2c +#define NVC197_PIPE_NOP_V 31:0 + +#define NVC197_SET_SPARE00 0x1a30 +#define NVC197_SET_SPARE00_V 31:0 + +#define NVC197_SET_SPARE01 0x1a34 +#define NVC197_SET_SPARE01_V 31:0 + +#define NVC197_SET_SPARE02 0x1a38 +#define NVC197_SET_SPARE02_V 31:0 + +#define NVC197_SET_SPARE03 0x1a3c +#define NVC197_SET_SPARE03_V 31:0 + +#define NVC197_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC197_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC197_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC197_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC197_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC197_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC197_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVC197_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC197_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVC197_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVC197_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVC197_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVC197_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVC197_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC197_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_SCG_CLOCKS 0x00000008 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVC197_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC197_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVC197_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVC197_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC197_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC197_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVC197_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVC197_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVC197_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVC197_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVC197_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVC197_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVC197_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVC197_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVC197_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVC197_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVC197_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC197_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVC197_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC197_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVC197_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC197_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVC197_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVC197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVC197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC197_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC197_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC197_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC197_SET_VERTEX_STREAM_LIMIT_A_A(j) (0x1f00+(j)*8) +#define NVC197_SET_VERTEX_STREAM_LIMIT_A_A_UPPER 7:0 + +#define NVC197_SET_VERTEX_STREAM_LIMIT_A_B(j) (0x1f04+(j)*8) +#define NVC197_SET_VERTEX_STREAM_LIMIT_A_B_LOWER 31:0 + +#define NVC197_SET_VERTEX_STREAM_LIMIT_B_A(j) (0x1f80+(j)*8) +#define NVC197_SET_VERTEX_STREAM_LIMIT_B_A_UPPER 7:0 + +#define NVC197_SET_VERTEX_STREAM_LIMIT_B_B(j) (0x1f84+(j)*8) +#define NVC197_SET_VERTEX_STREAM_LIMIT_B_B_LOWER 31:0 + +#define NVC197_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVC197_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVC197_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVC197_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVC197_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVC197_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVC197_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVC197_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVC197_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVC197_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVC197_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVC197_SET_PIPELINE_PROGRAM(j) (0x2004+(j)*64) +#define NVC197_SET_PIPELINE_PROGRAM_OFFSET 31:0 + +#define NVC197_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVC197_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVC197_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVC197_SET_PIPELINE_REGISTER_COUNT_V 7:0 + +#define NVC197_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVC197_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVC197_SET_PIPELINE_RESERVED_B(j) (0x2014+(j)*64) +#define NVC197_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVC197_SET_PIPELINE_RESERVED_C(j) (0x2018+(j)*64) +#define NVC197_SET_PIPELINE_RESERVED_C_V 0:0 + +#define NVC197_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NVC197_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NVC197_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVC197_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVC197_SET_FALCON00 0x2300 +#define NVC197_SET_FALCON00_V 31:0 + +#define NVC197_SET_FALCON01 0x2304 +#define NVC197_SET_FALCON01_V 31:0 + +#define NVC197_SET_FALCON02 0x2308 +#define NVC197_SET_FALCON02_V 31:0 + +#define NVC197_SET_FALCON03 0x230c +#define NVC197_SET_FALCON03_V 31:0 + +#define NVC197_SET_FALCON04 0x2310 +#define NVC197_SET_FALCON04_V 31:0 + +#define NVC197_SET_FALCON05 0x2314 +#define NVC197_SET_FALCON05_V 31:0 + +#define NVC197_SET_FALCON06 0x2318 +#define NVC197_SET_FALCON06_V 31:0 + +#define NVC197_SET_FALCON07 0x231c +#define NVC197_SET_FALCON07_V 31:0 + +#define NVC197_SET_FALCON08 0x2320 +#define NVC197_SET_FALCON08_V 31:0 + +#define NVC197_SET_FALCON09 0x2324 +#define NVC197_SET_FALCON09_V 31:0 + +#define NVC197_SET_FALCON10 0x2328 +#define NVC197_SET_FALCON10_V 31:0 + +#define NVC197_SET_FALCON11 0x232c +#define NVC197_SET_FALCON11_V 31:0 + +#define NVC197_SET_FALCON12 0x2330 +#define NVC197_SET_FALCON12_V 31:0 + +#define NVC197_SET_FALCON13 0x2334 +#define NVC197_SET_FALCON13_V 31:0 + +#define NVC197_SET_FALCON14 0x2338 +#define NVC197_SET_FALCON14_V 31:0 + +#define NVC197_SET_FALCON15 0x233c +#define NVC197_SET_FALCON15_V 31:0 + +#define NVC197_SET_FALCON16 0x2340 +#define NVC197_SET_FALCON16_V 31:0 + +#define NVC197_SET_FALCON17 0x2344 +#define NVC197_SET_FALCON17_V 31:0 + +#define NVC197_SET_FALCON18 0x2348 +#define NVC197_SET_FALCON18_V 31:0 + +#define NVC197_SET_FALCON19 0x234c +#define NVC197_SET_FALCON19_V 31:0 + +#define NVC197_SET_FALCON20 0x2350 +#define NVC197_SET_FALCON20_V 31:0 + +#define NVC197_SET_FALCON21 0x2354 +#define NVC197_SET_FALCON21_V 31:0 + +#define NVC197_SET_FALCON22 0x2358 +#define NVC197_SET_FALCON22_V 31:0 + +#define NVC197_SET_FALCON23 0x235c +#define NVC197_SET_FALCON23_V 31:0 + +#define NVC197_SET_FALCON24 0x2360 +#define NVC197_SET_FALCON24_V 31:0 + +#define NVC197_SET_FALCON25 0x2364 +#define NVC197_SET_FALCON25_V 31:0 + +#define NVC197_SET_FALCON26 0x2368 +#define NVC197_SET_FALCON26_V 31:0 + +#define NVC197_SET_FALCON27 0x236c +#define NVC197_SET_FALCON27_V 31:0 + +#define NVC197_SET_FALCON28 0x2370 +#define NVC197_SET_FALCON28_V 31:0 + +#define NVC197_SET_FALCON29 0x2374 +#define NVC197_SET_FALCON29_V 31:0 + +#define NVC197_SET_FALCON30 0x2378 +#define NVC197_SET_FALCON30_V 31:0 + +#define NVC197_SET_FALCON31 0x237c +#define NVC197_SET_FALCON31_V 31:0 + +#define NVC197_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVC197_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVC197_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVC197_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVC197_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVC197_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVC197_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVC197_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVC197_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVC197_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVC197_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVC197_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVC197_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVC197_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVC197_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVC197_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVC197_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVC197_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVC197_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVC197_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVC197_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVC197_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVC197_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVC197_SET_COLOR_CLAMP 0x2600 +#define NVC197_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVC197_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVC197_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVC197_SET_BINDLESS_TEXTURE 0x2608 +#define NVC197_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 4:0 + +#define NVC197_SET_TRAP_HANDLER 0x260c +#define NVC197_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVC197_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVC197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVC197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVC197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVC197_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC197_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC197_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC197_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC197_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC197_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC197_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC197_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVC197_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVC197_CALL_MME_MACRO_V 31:0 + +#define NVC197_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVC197_CALL_MME_DATA_V 31:0 + +#endif /* _cl_pascal_b_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc1b0.h b/userspace/sdks/nv570/inc/class/clc1b0.h new file mode 100644 index 0000000..ec139e9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc1b0.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#include "nvtypes.h" + +#ifndef _clc1b0_h_ +#define _clc1b0_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC1B0_VIDEO_DECODER (0x0000C1B0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc1b0_h + diff --git a/userspace/sdks/nv570/inc/class/clc1b5.h b/userspace/sdks/nv570/inc/class/clc1b5.h new file mode 100644 index 0000000..fff8467 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc1b5.h @@ -0,0 +1,273 @@ +/******************************************************************************* + Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#include "nvtypes.h" + +#ifndef _clc1b5_h_ +#define _clc1b5_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define PASCAL_DMA_COPY_B (0x0000C1B5) + +#define NVC1B5_NOP (0x00000100) +#define NVC1B5_NOP_PARAMETER 31:0 +#define NVC1B5_PM_TRIGGER (0x00000140) +#define NVC1B5_PM_TRIGGER_V 31:0 +#define NVC1B5_SET_SEMAPHORE_A (0x00000240) +#define NVC1B5_SET_SEMAPHORE_A_UPPER 16:0 +#define NVC1B5_SET_SEMAPHORE_B (0x00000244) +#define NVC1B5_SET_SEMAPHORE_B_LOWER 31:0 +#define NVC1B5_SET_SEMAPHORE_PAYLOAD (0x00000248) +#define NVC1B5_SET_SEMAPHORE_PAYLOAD_PAYLOAD 31:0 +#define NVC1B5_SET_RENDER_ENABLE_A (0x00000254) +#define NVC1B5_SET_RENDER_ENABLE_A_UPPER 7:0 +#define NVC1B5_SET_RENDER_ENABLE_B (0x00000258) +#define NVC1B5_SET_RENDER_ENABLE_B_LOWER 31:0 +#define NVC1B5_SET_RENDER_ENABLE_C (0x0000025C) +#define NVC1B5_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC1B5_SET_RENDER_ENABLE_C_MODE_FALSE (0x00000000) +#define NVC1B5_SET_RENDER_ENABLE_C_MODE_TRUE (0x00000001) +#define NVC1B5_SET_RENDER_ENABLE_C_MODE_CONDITIONAL (0x00000002) +#define NVC1B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL (0x00000003) +#define NVC1B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL (0x00000004) +#define NVC1B5_SET_SRC_PHYS_MODE (0x00000260) +#define NVC1B5_SET_SRC_PHYS_MODE_TARGET 1:0 +#define NVC1B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC1B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC1B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC1B5_SET_DST_PHYS_MODE (0x00000264) +#define NVC1B5_SET_DST_PHYS_MODE_TARGET 1:0 +#define NVC1B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC1B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC1B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC1B5_LAUNCH_DMA (0x00000300) +#define NVC1B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVC1B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVC1B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVC1B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVC1B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 +#define NVC1B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) +#define NVC1B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_TYPE_NONE (0x00000000) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_FOUR_WORD_SEMAPHORE (0x00000002) +#define NVC1B5_LAUNCH_DMA_INTERRUPT_TYPE 6:5 +#define NVC1B5_LAUNCH_DMA_INTERRUPT_TYPE_NONE (0x00000000) +#define NVC1B5_LAUNCH_DMA_INTERRUPT_TYPE_BLOCKING (0x00000001) +#define NVC1B5_LAUNCH_DMA_INTERRUPT_TYPE_NON_BLOCKING (0x00000002) +#define NVC1B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 +#define NVC1B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC1B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC1B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 +#define NVC1B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC1B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC1B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 +#define NVC1B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) +#define NVC1B5_LAUNCH_DMA_MULTI_LINE_ENABLE_TRUE (0x00000001) +#define NVC1B5_LAUNCH_DMA_REMAP_ENABLE 10:10 +#define NVC1B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) +#define NVC1B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) +#define NVC1B5_LAUNCH_DMA_FORCE_RMWDISABLE 11:11 +#define NVC1B5_LAUNCH_DMA_FORCE_RMWDISABLE_FALSE (0x00000000) +#define NVC1B5_LAUNCH_DMA_FORCE_RMWDISABLE_TRUE (0x00000001) +#define NVC1B5_LAUNCH_DMA_SRC_TYPE 12:12 +#define NVC1B5_LAUNCH_DMA_SRC_TYPE_VIRTUAL (0x00000000) +#define NVC1B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) +#define NVC1B5_LAUNCH_DMA_DST_TYPE 13:13 +#define NVC1B5_LAUNCH_DMA_DST_TYPE_VIRTUAL (0x00000000) +#define NVC1B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION 17:14 +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMIN (0x00000000) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMAX (0x00000001) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IXOR (0x00000002) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IAND (0x00000003) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IOR (0x00000004) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IADD (0x00000005) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INC (0x00000006) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_DEC (0x00000007) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FADD (0x0000000A) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN 18:18 +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_SIGNED (0x00000000) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_UNSIGNED (0x00000001) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE 19:19 +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_FALSE (0x00000000) +#define NVC1B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_TRUE (0x00000001) +#define NVC1B5_LAUNCH_DMA_SRC_BYPASS_L2 20:20 +#define NVC1B5_LAUNCH_DMA_SRC_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVC1B5_LAUNCH_DMA_SRC_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVC1B5_LAUNCH_DMA_DST_BYPASS_L2 21:21 +#define NVC1B5_LAUNCH_DMA_DST_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVC1B5_LAUNCH_DMA_DST_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVC1B5_LAUNCH_DMA_VPRMODE 23:22 +#define NVC1B5_LAUNCH_DMA_VPRMODE_VPR_NONE (0x00000000) +#define NVC1B5_LAUNCH_DMA_VPRMODE_VPR_VID2VID (0x00000001) +#define NVC1B5_LAUNCH_DMA_RESERVED_START_OF_COPY 24:24 +#define NVC1B5_LAUNCH_DMA_RESERVED_ERR_CODE 31:28 +#define NVC1B5_OFFSET_IN_UPPER (0x00000400) +#define NVC1B5_OFFSET_IN_UPPER_UPPER 16:0 +#define NVC1B5_OFFSET_IN_LOWER (0x00000404) +#define NVC1B5_OFFSET_IN_LOWER_VALUE 31:0 +#define NVC1B5_OFFSET_OUT_UPPER (0x00000408) +#define NVC1B5_OFFSET_OUT_UPPER_UPPER 16:0 +#define NVC1B5_OFFSET_OUT_LOWER (0x0000040C) +#define NVC1B5_OFFSET_OUT_LOWER_VALUE 31:0 +#define NVC1B5_PITCH_IN (0x00000410) +#define NVC1B5_PITCH_IN_VALUE 31:0 +#define NVC1B5_PITCH_OUT (0x00000414) +#define NVC1B5_PITCH_OUT_VALUE 31:0 +#define NVC1B5_LINE_LENGTH_IN (0x00000418) +#define NVC1B5_LINE_LENGTH_IN_VALUE 31:0 +#define NVC1B5_LINE_COUNT (0x0000041C) +#define NVC1B5_LINE_COUNT_VALUE 31:0 +#define NVC1B5_SET_REMAP_CONST_A (0x00000700) +#define NVC1B5_SET_REMAP_CONST_A_V 31:0 +#define NVC1B5_SET_REMAP_CONST_B (0x00000704) +#define NVC1B5_SET_REMAP_CONST_B_V 31:0 +#define NVC1B5_SET_REMAP_COMPONENTS (0x00000708) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_X 2:0 +#define NVC1B5_SET_REMAP_COMPONENTS_DST_X_SRC_X (0x00000000) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_X_SRC_Y (0x00000001) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_X_SRC_Z (0x00000002) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_X_SRC_W (0x00000003) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_X_NO_WRITE (0x00000006) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Y 6:4 +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Y_SRC_X (0x00000000) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Y (0x00000001) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Z (0x00000002) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Y_SRC_W (0x00000003) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Y_CONST_A (0x00000004) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Y_NO_WRITE (0x00000006) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Z 10:8 +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Z_SRC_X (0x00000000) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Y (0x00000001) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Z (0x00000002) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Z_SRC_W (0x00000003) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Z_CONST_A (0x00000004) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Z_CONST_B (0x00000005) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_Z_NO_WRITE (0x00000006) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_W 14:12 +#define NVC1B5_SET_REMAP_COMPONENTS_DST_W_SRC_X (0x00000000) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_W_SRC_Y (0x00000001) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_W_SRC_Z (0x00000002) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_W_SRC_W (0x00000003) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_W_CONST_A (0x00000004) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_W_CONST_B (0x00000005) +#define NVC1B5_SET_REMAP_COMPONENTS_DST_W_NO_WRITE (0x00000006) +#define NVC1B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 +#define NVC1B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) +#define NVC1B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_TWO (0x00000001) +#define NVC1B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_THREE (0x00000002) +#define NVC1B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS 21:20 +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_ONE (0x00000000) +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_TWO (0x00000001) +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_THREE (0x00000002) +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_FOUR (0x00000003) +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_THREE (0x00000002) +#define NVC1B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_FOUR (0x00000003) +#define NVC1B5_SET_DST_BLOCK_SIZE (0x0000070C) +#define NVC1B5_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC1B5_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC1B5_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC1B5_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC1B5_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC1B5_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC1B5_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC1B5_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC1B5_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC1B5_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC1B5_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC1B5_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC1B5_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC1B5_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC1B5_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC1B5_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC1B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC1B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC1B5_SET_DST_WIDTH (0x00000710) +#define NVC1B5_SET_DST_WIDTH_V 31:0 +#define NVC1B5_SET_DST_HEIGHT (0x00000714) +#define NVC1B5_SET_DST_HEIGHT_V 31:0 +#define NVC1B5_SET_DST_DEPTH (0x00000718) +#define NVC1B5_SET_DST_DEPTH_V 31:0 +#define NVC1B5_SET_DST_LAYER (0x0000071C) +#define NVC1B5_SET_DST_LAYER_V 31:0 +#define NVC1B5_SET_DST_ORIGIN (0x00000720) +#define NVC1B5_SET_DST_ORIGIN_X 15:0 +#define NVC1B5_SET_DST_ORIGIN_Y 31:16 +#define NVC1B5_SET_SRC_BLOCK_SIZE (0x00000728) +#define NVC1B5_SET_SRC_BLOCK_SIZE_WIDTH 3:0 +#define NVC1B5_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC1B5_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 +#define NVC1B5_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC1B5_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC1B5_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC1B5_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC1B5_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC1B5_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC1B5_SET_SRC_BLOCK_SIZE_DEPTH 11:8 +#define NVC1B5_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC1B5_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC1B5_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC1B5_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC1B5_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC1B5_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC1B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC1B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC1B5_SET_SRC_WIDTH (0x0000072C) +#define NVC1B5_SET_SRC_WIDTH_V 31:0 +#define NVC1B5_SET_SRC_HEIGHT (0x00000730) +#define NVC1B5_SET_SRC_HEIGHT_V 31:0 +#define NVC1B5_SET_SRC_DEPTH (0x00000734) +#define NVC1B5_SET_SRC_DEPTH_V 31:0 +#define NVC1B5_SET_SRC_LAYER (0x00000738) +#define NVC1B5_SET_SRC_LAYER_V 31:0 +#define NVC1B5_SET_SRC_ORIGIN (0x0000073C) +#define NVC1B5_SET_SRC_ORIGIN_X 15:0 +#define NVC1B5_SET_SRC_ORIGIN_Y 31:16 +#define NVC1B5_SRC_ORIGIN_X (0x00000744) +#define NVC1B5_SRC_ORIGIN_X_VALUE 31:0 +#define NVC1B5_SRC_ORIGIN_Y (0x00000748) +#define NVC1B5_SRC_ORIGIN_Y_VALUE 31:0 +#define NVC1B5_DST_ORIGIN_X (0x0000074C) +#define NVC1B5_DST_ORIGIN_X_VALUE 31:0 +#define NVC1B5_DST_ORIGIN_Y (0x00000750) +#define NVC1B5_DST_ORIGIN_Y_VALUE 31:0 +#define NVC1B5_PM_TRIGGER_END (0x00001114) +#define NVC1B5_PM_TRIGGER_END_V 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc1b5_h + diff --git a/userspace/sdks/nv570/inc/class/clc1b5sw.h b/userspace/sdks/nv570/inc/class/clc1b5sw.h new file mode 100644 index 0000000..08da246 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc1b5sw.h @@ -0,0 +1,54 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2016-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc1b5sw.finn +// + + + +// +// Using VERSION_0 will cause the API to interpret +// engineType as a CE engine instance. This allows +// for backward compatibility with 85B5sw and 90B5sw. +// +#define NVC1B5_ALLOCATION_PARAMETERS_VERSION_0 0 + +// +// Using VERSION_1 will cause the API to interpret +// engineType as an NV2080_ENGINE_TYPE ordinal. +// +#define NVC1B5_ALLOCATION_PARAMETERS_VERSION_1 1 + +#define NVC1B5_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc1b5U) + +typedef struct NVC1B5_ALLOCATION_PARAMETERS { + NvU32 version; + NvU32 engineType; +} NVC1B5_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc1b7.h b/userspace/sdks/nv570/inc/class/clc1b7.h new file mode 100644 index 0000000..14d94ed --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc1b7.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef clc1b7_h +#define clc1b7_h + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC1B7_VIDEO_ENCODER (0x0000C1B7) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clc1b7_h + diff --git a/userspace/sdks/nv570/inc/class/clc1c0.h b/userspace/sdks/nv570/inc/class/clc1c0.h new file mode 100644 index 0000000..f2569bf --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc1c0.h @@ -0,0 +1,795 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_pascal_compute_b_h_ +#define _cl_pascal_compute_b_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl pascal_compute_b */ + +#include "nvtypes.h" + +#define PASCAL_COMPUTE_B 0xC1C0 + +#define NVC1C0_SET_OBJECT 0x0000 +#define NVC1C0_SET_OBJECT_CLASS_ID 15:0 +#define NVC1C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC1C0_NO_OPERATION 0x0100 +#define NVC1C0_NO_OPERATION_V 31:0 + +#define NVC1C0_SET_NOTIFY_A 0x0104 +#define NVC1C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC1C0_SET_NOTIFY_B 0x0108 +#define NVC1C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC1C0_NOTIFY 0x010c +#define NVC1C0_NOTIFY_TYPE 31:0 +#define NVC1C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC1C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC1C0_WAIT_FOR_IDLE 0x0110 +#define NVC1C0_WAIT_FOR_IDLE_V 31:0 + +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC1C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC1C0_SEND_GO_IDLE 0x013c +#define NVC1C0_SEND_GO_IDLE_V 31:0 + +#define NVC1C0_PM_TRIGGER 0x0140 +#define NVC1C0_PM_TRIGGER_V 31:0 + +#define NVC1C0_PM_TRIGGER_WFI 0x0144 +#define NVC1C0_PM_TRIGGER_WFI_V 31:0 + +#define NVC1C0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC1C0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC1C0_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC1C0_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC1C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC1C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC1C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC1C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC1C0_LINE_LENGTH_IN 0x0180 +#define NVC1C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC1C0_LINE_COUNT 0x0184 +#define NVC1C0_LINE_COUNT_VALUE 31:0 + +#define NVC1C0_OFFSET_OUT_UPPER 0x0188 +#define NVC1C0_OFFSET_OUT_UPPER_VALUE 16:0 + +#define NVC1C0_OFFSET_OUT 0x018c +#define NVC1C0_OFFSET_OUT_VALUE 31:0 + +#define NVC1C0_PITCH_OUT 0x0190 +#define NVC1C0_PITCH_OUT_VALUE 31:0 + +#define NVC1C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVC1C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC1C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC1C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC1C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC1C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC1C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC1C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC1C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC1C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC1C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC1C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC1C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC1C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC1C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC1C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC1C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC1C0_SET_DST_WIDTH 0x0198 +#define NVC1C0_SET_DST_WIDTH_V 31:0 + +#define NVC1C0_SET_DST_HEIGHT 0x019c +#define NVC1C0_SET_DST_HEIGHT_V 31:0 + +#define NVC1C0_SET_DST_DEPTH 0x01a0 +#define NVC1C0_SET_DST_DEPTH_V 31:0 + +#define NVC1C0_SET_DST_LAYER 0x01a4 +#define NVC1C0_SET_DST_LAYER_V 31:0 + +#define NVC1C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC1C0_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC1C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC1C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC1C0_LAUNCH_DMA 0x01b0 +#define NVC1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC1C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC1C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC1C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC1C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC1C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC1C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC1C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC1C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC1C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC1C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC1C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC1C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC1C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC1C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC1C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC1C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC1C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC1C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC1C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC1C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC1C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC1C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC1C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC1C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC1C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC1C0_LOAD_INLINE_DATA 0x01b4 +#define NVC1C0_LOAD_INLINE_DATA_V 31:0 + +#define NVC1C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC1C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC1C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC1C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC1C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC1C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC1C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC1C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC1C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC1C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC1C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC1C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC1C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC1C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC1C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVC1C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVC1C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVC1C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVC1C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVC1C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVC1C0_SET_COALESCE_WAITING_PERIOD_UNIT 0x020c +#define NVC1C0_SET_COALESCE_WAITING_PERIOD_UNIT_CLOCKS 31:0 + +#define NVC1C0_PERFMON_TRANSFER 0x0210 +#define NVC1C0_PERFMON_TRANSFER_V 31:0 + +#define NVC1C0_SET_SHADER_SHARED_MEMORY_WINDOW 0x0214 +#define NVC1C0_SET_SHADER_SHARED_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC1C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS 0x0218 +#define NVC1C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V 0:0 +#define NVC1C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_FALSE 0x00000000 +#define NVC1C0_SET_SELECT_MAXWELL_TEXTURE_HEADERS_V_TRUE 0x00000001 + +#define NVC1C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVC1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC1C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC1C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC1C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC1C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC1C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC1C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC1C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC1C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC1C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC1C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC1C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC1C0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVC1C0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVC1C0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVC1C0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD03 0x022c +#define NVC1C0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVC1C0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVC1C0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVC1C0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD07 0x023c +#define NVC1C0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC1C0_SET_CWD_CONTROL 0x0240 +#define NVC1C0_SET_CWD_CONTROL_SM_SELECTION 0:0 +#define NVC1C0_SET_CWD_CONTROL_SM_SELECTION_LOAD_BALANCED 0x00000000 +#define NVC1C0_SET_CWD_CONTROL_SM_SELECTION_ROUND_ROBIN 0x00000001 + +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC1C0_SET_CWD_REF_COUNTER 0x0248 +#define NVC1C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVC1C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVC1C0_SET_RESERVED_SW_METHOD08 0x024c +#define NVC1C0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVC1C0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVC1C0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVC1C0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD12 0x025c +#define NVC1C0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVC1C0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVC1C0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC1C0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVC1C0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC1C0_SET_GWC_SCG_TYPE 0x026c +#define NVC1C0_SET_GWC_SCG_TYPE_SCG_TYPE 0:0 +#define NVC1C0_SET_GWC_SCG_TYPE_SCG_TYPE_GRAPHICS_COMPUTE0 0x00000000 +#define NVC1C0_SET_GWC_SCG_TYPE_SCG_TYPE_COMPUTE1 0x00000001 + +#define NVC1C0_SET_SCG_CONTROL 0x0270 +#define NVC1C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 +#define NVC1C0_SET_SCG_CONTROL_COMPUTE1_MIN_SM_COUNT 20:12 +#define NVC1C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE 24:24 +#define NVC1C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_FALSE 0x00000000 +#define NVC1C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_TRUE 0x00000001 + +#define NVC1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A 0x0274 +#define NVC1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_A_ADDRESS_UPPER 16:0 + +#define NVC1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B 0x0278 +#define NVC1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_B_ADDRESS_LOWER 31:0 + +#define NVC1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C 0x027c +#define NVC1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_BYTE_COUNT 16:0 +#define NVC1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2 31:31 +#define NVC1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_FALSE 0x00000000 +#define NVC1C0_INVALIDATE_CONSTANT_BUFFER_CACHE_C_THRU_L2_TRUE 0x00000001 + +#define NVC1C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVC1C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC1C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC1C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVC1C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC1C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC1C0_SET_QMD_VERSION 0x0288 +#define NVC1C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVC1C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC1C0_SET_WFI_CONFIG 0x028c +#define NVC1C0_SET_WFI_CONFIG_ENABLE_SCG_TYPE_WFI 0:0 +#define NVC1C0_SET_WFI_CONFIG_ENABLE_SCG_TYPE_WFI_FALSE 0x00000000 +#define NVC1C0_SET_WFI_CONFIG_ENABLE_SCG_TYPE_WFI_TRUE 0x00000001 + +#define NVC1C0_CHECK_QMD_VERSION 0x0290 +#define NVC1C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVC1C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC1C0_WAIT_FOR_IDLE_SCG_TYPE 0x0294 +#define NVC1C0_WAIT_FOR_IDLE_SCG_TYPE_V 31:0 + +#define NVC1C0_INVALIDATE_SKED_CACHES 0x0298 +#define NVC1C0_INVALIDATE_SKED_CACHES_V 0:0 + +#define NVC1C0_SET_SCG_RENDER_ENABLE_CONTROL 0x029c +#define NVC1C0_SET_SCG_RENDER_ENABLE_CONTROL_COMPUTE1_USES_RENDER_ENABLE 0:0 +#define NVC1C0_SET_SCG_RENDER_ENABLE_CONTROL_COMPUTE1_USES_RENDER_ENABLE_FALSE 0x00000000 +#define NVC1C0_SET_SCG_RENDER_ENABLE_CONTROL_COMPUTE1_USES_RENDER_ENABLE_TRUE 0x00000001 + +#define NVC1C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 +#define NVC1C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC1C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 +#define NVC1C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC1C0_SCG_HYSTERESIS_CONTROL 0x02a8 +#define NVC1C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE 0:0 +#define NVC1C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC1C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_TRUE 0x00000001 +#define NVC1C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE 1:1 +#define NVC1C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC1C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_TRUE 0x00000001 + +#define NVC1C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVC1C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVC1C0_SEND_PCAS_A 0x02b4 +#define NVC1C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVC1C0_SEND_PCAS_B 0x02b8 +#define NVC1C0_SEND_PCAS_B_FROM 23:0 +#define NVC1C0_SEND_PCAS_B_DELTA 31:24 + +#define NVC1C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVC1C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVC1C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVC1C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVC1C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVC1C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVC1C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A 0x02f0 +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B 0x02f4 +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C 0x02f8 +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVC1C0_SET_SPA_VERSION 0x0310 +#define NVC1C0_SET_SPA_VERSION_MINOR 7:0 +#define NVC1C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC1C0_SET_INLINE_QMD_ADDRESS_A 0x0318 +#define NVC1C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 + +#define NVC1C0_SET_INLINE_QMD_ADDRESS_B 0x031c +#define NVC1C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 + +#define NVC1C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) +#define NVC1C0_LOAD_INLINE_QMD_DATA_V 31:0 + +#define NVC1C0_SET_FALCON00 0x0500 +#define NVC1C0_SET_FALCON00_V 31:0 + +#define NVC1C0_SET_FALCON01 0x0504 +#define NVC1C0_SET_FALCON01_V 31:0 + +#define NVC1C0_SET_FALCON02 0x0508 +#define NVC1C0_SET_FALCON02_V 31:0 + +#define NVC1C0_SET_FALCON03 0x050c +#define NVC1C0_SET_FALCON03_V 31:0 + +#define NVC1C0_SET_FALCON04 0x0510 +#define NVC1C0_SET_FALCON04_V 31:0 + +#define NVC1C0_SET_FALCON05 0x0514 +#define NVC1C0_SET_FALCON05_V 31:0 + +#define NVC1C0_SET_FALCON06 0x0518 +#define NVC1C0_SET_FALCON06_V 31:0 + +#define NVC1C0_SET_FALCON07 0x051c +#define NVC1C0_SET_FALCON07_V 31:0 + +#define NVC1C0_SET_FALCON08 0x0520 +#define NVC1C0_SET_FALCON08_V 31:0 + +#define NVC1C0_SET_FALCON09 0x0524 +#define NVC1C0_SET_FALCON09_V 31:0 + +#define NVC1C0_SET_FALCON10 0x0528 +#define NVC1C0_SET_FALCON10_V 31:0 + +#define NVC1C0_SET_FALCON11 0x052c +#define NVC1C0_SET_FALCON11_V 31:0 + +#define NVC1C0_SET_FALCON12 0x0530 +#define NVC1C0_SET_FALCON12_V 31:0 + +#define NVC1C0_SET_FALCON13 0x0534 +#define NVC1C0_SET_FALCON13_V 31:0 + +#define NVC1C0_SET_FALCON14 0x0538 +#define NVC1C0_SET_FALCON14_V 31:0 + +#define NVC1C0_SET_FALCON15 0x053c +#define NVC1C0_SET_FALCON15_V 31:0 + +#define NVC1C0_SET_FALCON16 0x0540 +#define NVC1C0_SET_FALCON16_V 31:0 + +#define NVC1C0_SET_FALCON17 0x0544 +#define NVC1C0_SET_FALCON17_V 31:0 + +#define NVC1C0_SET_FALCON18 0x0548 +#define NVC1C0_SET_FALCON18_V 31:0 + +#define NVC1C0_SET_FALCON19 0x054c +#define NVC1C0_SET_FALCON19_V 31:0 + +#define NVC1C0_SET_FALCON20 0x0550 +#define NVC1C0_SET_FALCON20_V 31:0 + +#define NVC1C0_SET_FALCON21 0x0554 +#define NVC1C0_SET_FALCON21_V 31:0 + +#define NVC1C0_SET_FALCON22 0x0558 +#define NVC1C0_SET_FALCON22_V 31:0 + +#define NVC1C0_SET_FALCON23 0x055c +#define NVC1C0_SET_FALCON23_V 31:0 + +#define NVC1C0_SET_FALCON24 0x0560 +#define NVC1C0_SET_FALCON24_V 31:0 + +#define NVC1C0_SET_FALCON25 0x0564 +#define NVC1C0_SET_FALCON25_V 31:0 + +#define NVC1C0_SET_FALCON26 0x0568 +#define NVC1C0_SET_FALCON26_V 31:0 + +#define NVC1C0_SET_FALCON27 0x056c +#define NVC1C0_SET_FALCON27_V 31:0 + +#define NVC1C0_SET_FALCON28 0x0570 +#define NVC1C0_SET_FALCON28_V 31:0 + +#define NVC1C0_SET_FALCON29 0x0574 +#define NVC1C0_SET_FALCON29_V 31:0 + +#define NVC1C0_SET_FALCON30 0x0578 +#define NVC1C0_SET_FALCON30_V 31:0 + +#define NVC1C0_SET_FALCON31 0x057c +#define NVC1C0_SET_FALCON31_V 31:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 +#define NVC1C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC1C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC1C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC1C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC1C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC1C0_SET_SPARE_NOOP12 0x0f44 +#define NVC1C0_SET_SPARE_NOOP12_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP13 0x0f48 +#define NVC1C0_SET_SPARE_NOOP13_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP14 0x0f4c +#define NVC1C0_SET_SPARE_NOOP14_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP15 0x0f50 +#define NVC1C0_SET_SPARE_NOOP15_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP00 0x1040 +#define NVC1C0_SET_SPARE_NOOP00_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP01 0x1044 +#define NVC1C0_SET_SPARE_NOOP01_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP02 0x1048 +#define NVC1C0_SET_SPARE_NOOP02_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP03 0x104c +#define NVC1C0_SET_SPARE_NOOP03_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP04 0x1050 +#define NVC1C0_SET_SPARE_NOOP04_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP05 0x1054 +#define NVC1C0_SET_SPARE_NOOP05_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP06 0x1058 +#define NVC1C0_SET_SPARE_NOOP06_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP07 0x105c +#define NVC1C0_SET_SPARE_NOOP07_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP08 0x1060 +#define NVC1C0_SET_SPARE_NOOP08_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP09 0x1064 +#define NVC1C0_SET_SPARE_NOOP09_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP10 0x1068 +#define NVC1C0_SET_SPARE_NOOP10_V 31:0 + +#define NVC1C0_SET_SPARE_NOOP11 0x106c +#define NVC1C0_SET_SPARE_NOOP11_V 31:0 + +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_ALL 0x120c +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_ALL_V 0:0 + +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL 0x1210 +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL_V 0:0 + +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVC1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVC1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVC1C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVC1C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC1C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC1C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC1C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC1C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC1C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC1C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC1C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC1C0_SET_RENDER_ENABLE_A 0x1550 +#define NVC1C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC1C0_SET_RENDER_ENABLE_B 0x1554 +#define NVC1C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC1C0_SET_RENDER_ENABLE_C 0x1558 +#define NVC1C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC1C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC1C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC1C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC1C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC1C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC1C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC1C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC1C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC1C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC1C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC1C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC1C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC1C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC1C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC1C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC1C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVC1C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC1C0_SET_PROGRAM_REGION_A 0x1608 +#define NVC1C0_SET_PROGRAM_REGION_A_ADDRESS_UPPER 16:0 + +#define NVC1C0_SET_PROGRAM_REGION_B 0x160c +#define NVC1C0_SET_PROGRAM_REGION_B_ADDRESS_LOWER 31:0 + +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC1C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC1C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC1C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC1C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC1C0_PIPE_NOP 0x1a2c +#define NVC1C0_PIPE_NOP_V 31:0 + +#define NVC1C0_SET_SPARE00 0x1a30 +#define NVC1C0_SET_SPARE00_V 31:0 + +#define NVC1C0_SET_SPARE01 0x1a34 +#define NVC1C0_SET_SPARE01_V 31:0 + +#define NVC1C0_SET_SPARE02 0x1a38 +#define NVC1C0_SET_SPARE02_V 31:0 + +#define NVC1C0_SET_SPARE03 0x1a3c +#define NVC1C0_SET_SPARE03_V 31:0 + +#define NVC1C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC1C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC1C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC1C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC1C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC1C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC1C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC1C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC1C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVC1C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVC1C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVC1C0_SET_TRAP_HANDLER 0x260c +#define NVC1C0_SET_TRAP_HANDLER_OFFSET 31:0 + +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC1C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC1C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC1C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC1C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC1C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC1C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC1C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#endif /* _cl_pascal_compute_b_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc2b0.h b/userspace/sdks/nv570/inc/class/clc2b0.h new file mode 100644 index 0000000..9961f82 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc2b0.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _clc2b0_h_ +#define _clc2b0_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC2B0_VIDEO_DECODER (0x0000C2B0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc2b0_h + diff --git a/userspace/sdks/nv570/inc/class/clc2b7.h b/userspace/sdks/nv570/inc/class/clc2b7.h new file mode 100644 index 0000000..4c4e37d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc2b7.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef clc2b7_h +#define clc2b7_h + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC2B7_VIDEO_ENCODER (0x0000C2B7) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clc2b7_h + diff --git a/userspace/sdks/nv570/inc/class/clc361.h b/userspace/sdks/nv570/inc/class/clc361.h new file mode 100644 index 0000000..daa8841 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc361.h @@ -0,0 +1,35 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc361_h_ +#define _clc361_h_ + +#define VOLTA_USERMODE_A (0xc361) + +#define NVC361 0x0081ffff:0x00810000 +#define NVC361_NV_USERMODE__SIZE 65536 +#define NVC361_TIME_0 0x00000080 +#define NVC361_TIME_1 0x00000084 +#define NVC361_NOTIFY_CHANNEL_PENDING 0x00000090 + +#endif // _clc361_h_ diff --git a/userspace/sdks/nv570/inc/class/clc365.h b/userspace/sdks/nv570/inc/class/clc365.h new file mode 100644 index 0000000..2bbd766 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc365.h @@ -0,0 +1,88 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc365_h_ +#define _clc365_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define ACCESS_COUNTER_NOTIFY_BUFFER (0xc365) + +#define NVC365_NOTIFY_BUF +#define NVC365_NOTIFY_BUF_ENTRY 0x0000001f:0x00000000 +#define NVC365_NOTIFY_BUF_SIZE 32 +#define NVC365_NOTIFY_BUF_ENTRY_TYPE MW((0+0*32):(0*32+0)) +#define NVC365_NOTIFY_BUF_ENTRY_TYPE_CPU 0x00000000 +#define NVC365_NOTIFY_BUF_ENTRY_TYPE_GPU 0x00000001 +#define NVC365_NOTIFY_BUF_ENTRY_ADDR_TYPE MW((1+0*32):(0*32+1)) +#define NVC365_NOTIFY_BUF_ENTRY_ADDR_TYPE_GVA 0x00000000 +#define NVC365_NOTIFY_BUF_ENTRY_ADDR_TYPE_GPA 0x00000001 +#define NVC365_NOTIFY_BUF_ENTRY_BANK MW((5+0*32):(0*32+2)) +#define NVC365_NOTIFY_BUF_ENTRY_BANK_0 0x00000000 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_1 0x00000001 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_2 0x00000002 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_3 0x00000003 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_4 0x00000004 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_5 0x00000005 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_6 0x00000006 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_7 0x00000007 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_8 0x00000008 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_9 0x00000009 +#define NVC365_NOTIFY_BUF_ENTRY_BANK_10 0x0000000a +#define NVC365_NOTIFY_BUF_ENTRY_BANK_11 0x0000000b +#define NVC365_NOTIFY_BUF_ENTRY_BANK_12 0x0000000c +#define NVC365_NOTIFY_BUF_ENTRY_BANK_13 0x0000000d +#define NVC365_NOTIFY_BUF_ENTRY_BANK_14 0x0000000e +#define NVC365_NOTIFY_BUF_ENTRY_BANK_15 0x0000000f +#define NVC365_NOTIFY_BUF_ENTRY_APERTURE MW((9+0*32):(0*32+8)) +#define NVC365_NOTIFY_BUF_ENTRY_APERTURE_VID_MEM 0x00000000 +#define NVC365_NOTIFY_BUF_ENTRY_APERTURE_PEER_MEM 0x00000001 +#define NVC365_NOTIFY_BUF_ENTRY_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC365_NOTIFY_BUF_ENTRY_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 +#define NVC365_NOTIFY_BUF_ENTRY_INST_APERTURE MW((11+0*32):(0*32+10)) +#define NVC365_NOTIFY_BUF_ENTRY_INST_APERTURE_VID_MEM 0x00000000 +#define NVC365_NOTIFY_BUF_ENTRY_INST_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC365_NOTIFY_BUF_ENTRY_INST_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 +#define NVC365_NOTIFY_BUF_ENTRY_INST_LO MW((31+0*32):(0*32+12)) +#define NVC365_NOTIFY_BUF_ENTRY_INST_HI MW((31+1*32):(1*32+0)) +#define NVC365_NOTIFY_BUF_ENTRY_INST MW((31+1*32):(0*32+12)) +#define NVC365_NOTIFY_BUF_ENTRY_ADDR_LO MW((31+2*32):(2*32+0)) +#define NVC365_NOTIFY_BUF_ENTRY_ADDR_HI MW((31+3*32):(3*32+0)) +#define NVC365_NOTIFY_BUF_ENTRY_ADDR MW((31+3*32):(2*32+0)) +#define NVC365_NOTIFY_BUF_ENTRY_SUB_GRANULARITY MW((31+4*32):(4*32+0)) +#define NVC365_NOTIFY_BUF_ENTRY_NOTIFY_TAG MW((19+5*32):(5*32+0)) +#define NVC365_NOTIFY_BUF_ENTRY_COUNTER_VAL MW((15+6*32):(6*32+0)) +#define NVC365_NOTIFY_BUF_ENTRY_PEER_ID MW((2+7*32):(7*32+0)) +#define NVC365_NOTIFY_BUF_ENTRY_MMU_ENGINE_ID MW((28+7*32):(7*32+20)) +#define NVC365_NOTIFY_BUF_ENTRY_VALID MW((31+7*32):(7*32+31)) +#define NVC365_NOTIFY_BUF_ENTRY_VALID_FALSE 0x00000000 +#define NVC365_NOTIFY_BUF_ENTRY_VALID_TRUE 0x00000001 +#define NVC365_NOTIFIERS_ACCESS_COUNTER (0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc365_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc369.h b/userspace/sdks/nv570/inc/class/clc369.h new file mode 100644 index 0000000..a73e182 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc369.h @@ -0,0 +1,77 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc369_h_ +#define _clc369_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define MMU_FAULT_BUFFER (0xc369) + +#define NVC369_BUF +#define NVC369_BUF_ENTRY 0x0000001f:0x00000000 +#define NVC369_BUF_SIZE 32 +#define NVC369_BUF_ENTRY_INST_APERTURE MW((9+0*32):(0*32+8)) +#define NVC369_BUF_ENTRY_INST_APERTURE_VID_MEM 0x00000000 +#define NVC369_BUF_ENTRY_INST_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC369_BUF_ENTRY_INST_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 +#define NVC369_BUF_ENTRY_INST_LO MW((31+0*32):(0*32+12)) +#define NVC369_BUF_ENTRY_INST_HI MW((31+1*32):(1*32+0)) +#define NVC369_BUF_ENTRY_INST MW((31+1*32):(0*32+12)) +#define NVC369_BUF_ENTRY_ADDR_PHYS_APERTURE MW((1+2*32):(2*32+0)) +#define NVC369_BUF_ENTRY_ADDR_LO MW((31+2*32):(2*32+12)) +#define NVC369_BUF_ENTRY_ADDR_HI MW((31+3*32):(3*32+0)) +#define NVC369_BUF_ENTRY_ADDR MW((31+3*32):(2*32+12)) +#define NVC369_BUF_ENTRY_TIMESTAMP_LO MW((31+4*32):(4*32+0)) +#define NVC369_BUF_ENTRY_TIMESTAMP_HI MW((31+5*32):(5*32+0)) +#define NVC369_BUF_ENTRY_TIMESTAMP MW((31+5*32):(4*32+0)) +#define NVC369_BUF_ENTRY_ENGINE_ID MW((8+6*32):(6*32+0)) +#define NVC369_BUF_ENTRY_FAULT_TYPE MW((4+7*32):(7*32+0)) +#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT MW((7+7*32):(7*32+7)) +#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_FALSE 0x00000000 +#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_TRUE 0x00000001 +#define NVC369_BUF_ENTRY_CLIENT MW((14+7*32):(7*32+8)) +#define NVC369_BUF_ENTRY_ACCESS_TYPE MW((19+7*32):(7*32+16)) +#define NVC369_BUF_ENTRY_MMU_CLIENT_TYPE MW((20+7*32):(7*32+20)) +#define NVC369_BUF_ENTRY_GPC_ID MW((28+7*32):(7*32+24)) +#define NVC369_BUF_ENTRY_PROTECTED_MODE MW((29+7*32):(7*32+29)) +#define NVC369_BUF_ENTRY_PROTECTED_MODE_FALSE 0x00000000 +#define NVC369_BUF_ENTRY_PROTECTED_MODE_TRUE 0x00000001 +#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_EN MW((30+7*32):(7*32+30)) +#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_EN_FALSE 0x00000000 +#define NVC369_BUF_ENTRY_REPLAYABLE_FAULT_EN_TRUE 0x00000001 +#define NVC369_BUF_ENTRY_VALID MW((31+7*32):(7*32+31)) +#define NVC369_BUF_ENTRY_VALID_FALSE 0x00000000 +#define NVC369_BUF_ENTRY_VALID_TRUE 0x00000001 +#define NVC369_NOTIFIER_MMU_FAULT_NON_REPLAYABLE 0 +#define NVC369_NOTIFIER_MMU_FAULT_REPLAYABLE 1 +#define NVC369_NOTIFIER_MMU_FAULT_ERROR 2 +#define NVC369_NOTIFIER_MMU_FAULT_NON_REPLAYABLE_IN_PRIV 3 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc369_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc36f.h b/userspace/sdks/nv570/inc/class/clc36f.h new file mode 100644 index 0000000..cae1c68 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc36f.h @@ -0,0 +1,366 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc36f_h_ +#define _clc36f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* class VOLTA_CHANNEL_GPFIFO */ +/* + * Documentation for VOLTA_CHANNEL_GPFIFO can be found in dev_pbdma.ref, + * chapter "User Control Registers". It is documented as device NV_UDMA. + * The GPFIFO format itself is also documented in dev_pbdma.ref, + * NV_PPBDMA_GP_ENTRY_*. The pushbuffer format is documented in dev_ram.ref, + * chapter "FIFO DMA RAM", NV_FIFO_DMA_*. + * + * Note there is no .mfs file for this class. + */ +#define VOLTA_CHANNEL_GPFIFO_A (0x0000C36F) + +#define NVC36F_TYPEDEF VOLTA_CHANNELChannelGPFifoA + +/* dma flow control data structure */ +typedef volatile struct Nvc36fControl_struct { + NvU32 Ignored00[0x010]; /* 0000-003f*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 Ignored01[0x002]; /* 0050-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored02[0x007]; /* 0064-007f*/ + NvU32 Ignored03; /* used to be engine yield 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x5c]; +} Nvc36fControl, VoltaAControlGPFifo; + +/* fields and values */ +#define NVC36F_NUMBER_OF_SUBCHANNELS (8) +#define NVC36F_SET_OBJECT (0x00000000) +#define NVC36F_SET_OBJECT_NVCLASS 15:0 +#define NVC36F_SET_OBJECT_ENGINE 20:16 +#define NVC36F_SET_OBJECT_ENGINE_SW 0x0000001f +#define NVC36F_ILLEGAL (0x00000004) +#define NVC36F_ILLEGAL_HANDLE 31:0 +#define NVC36F_NOP (0x00000008) +#define NVC36F_NOP_HANDLE 31:0 +#define NVC36F_SEMAPHOREA (0x00000010) +#define NVC36F_SEMAPHOREA_OFFSET_UPPER 7:0 +#define NVC36F_SEMAPHOREB (0x00000014) +#define NVC36F_SEMAPHOREB_OFFSET_LOWER 31:2 +#define NVC36F_SEMAPHOREC (0x00000018) +#define NVC36F_SEMAPHOREC_PAYLOAD 31:0 +#define NVC36F_SEMAPHORED (0x0000001C) +#define NVC36F_SEMAPHORED_OPERATION 4:0 +#define NVC36F_SEMAPHORED_OPERATION_ACQUIRE 0x00000001 +#define NVC36F_SEMAPHORED_OPERATION_RELEASE 0x00000002 +#define NVC36F_SEMAPHORED_OPERATION_ACQ_GEQ 0x00000004 +#define NVC36F_SEMAPHORED_OPERATION_ACQ_AND 0x00000008 +#define NVC36F_SEMAPHORED_OPERATION_REDUCTION 0x00000010 +#define NVC36F_SEMAPHORED_ACQUIRE_SWITCH 12:12 +#define NVC36F_SEMAPHORED_ACQUIRE_SWITCH_DISABLED 0x00000000 +#define NVC36F_SEMAPHORED_ACQUIRE_SWITCH_ENABLED 0x00000001 +#define NVC36F_SEMAPHORED_RELEASE_WFI 20:20 +#define NVC36F_SEMAPHORED_RELEASE_WFI_EN 0x00000000 +#define NVC36F_SEMAPHORED_RELEASE_WFI_DIS 0x00000001 +#define NVC36F_SEMAPHORED_RELEASE_SIZE 24:24 +#define NVC36F_SEMAPHORED_RELEASE_SIZE_16BYTE 0x00000000 +#define NVC36F_SEMAPHORED_RELEASE_SIZE_4BYTE 0x00000001 +#define NVC36F_SEMAPHORED_REDUCTION 30:27 +#define NVC36F_SEMAPHORED_REDUCTION_MIN 0x00000000 +#define NVC36F_SEMAPHORED_REDUCTION_MAX 0x00000001 +#define NVC36F_SEMAPHORED_REDUCTION_XOR 0x00000002 +#define NVC36F_SEMAPHORED_REDUCTION_AND 0x00000003 +#define NVC36F_SEMAPHORED_REDUCTION_OR 0x00000004 +#define NVC36F_SEMAPHORED_REDUCTION_ADD 0x00000005 +#define NVC36F_SEMAPHORED_REDUCTION_INC 0x00000006 +#define NVC36F_SEMAPHORED_REDUCTION_DEC 0x00000007 +#define NVC36F_SEMAPHORED_FORMAT 31:31 +#define NVC36F_SEMAPHORED_FORMAT_SIGNED 0x00000000 +#define NVC36F_SEMAPHORED_FORMAT_UNSIGNED 0x00000001 +#define NVC36F_NON_STALL_INTERRUPT (0x00000020) +#define NVC36F_NON_STALL_INTERRUPT_HANDLE 31:0 +#define NVC36F_FB_FLUSH (0x00000024) // Deprecated - use MEMBAR TYPE SYS_MEMBAR +#define NVC36F_FB_FLUSH_HANDLE 31:0 +// NOTE - MEM_OP_A and MEM_OP_B have been replaced in gp100 with methods for +// specifying the page address for a targeted TLB invalidate and the uTLB for +// a targeted REPLAY_CANCEL for UVM. +// The previous MEM_OP_A/B functionality is in MEM_OP_C/D, with slightly +// rearranged fields. +#define NVC36F_MEM_OP_A (0x00000028) +#define NVC36F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_CLIENT_UNIT_ID 5:0 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC36F_MEM_OP_A_TLB_INVALIDATE_INVALIDATION_SIZE 5:0 // Used to specify size of invalidate, used for invalidates which are not of the REPLAY_CANCEL_TARGETED type +#define NVC36F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_GPC_ID 10:6 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC36F_MEM_OP_A_TLB_INVALIDATE_CANCEL_MMU_ENGINE_ID 6:0 // only relevant for REPLAY_CANCEL_VA_GLOBAL +#define NVC36F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR 11:11 +#define NVC36F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_EN 0x00000001 +#define NVC36F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_DIS 0x00000000 +#define NVC36F_MEM_OP_A_TLB_INVALIDATE_TARGET_ADDR_LO 31:12 +#define NVC36F_MEM_OP_B (0x0000002c) +#define NVC36F_MEM_OP_B_TLB_INVALIDATE_TARGET_ADDR_HI 31:0 +#define NVC36F_MEM_OP_C (0x00000030) +#define NVC36F_MEM_OP_C_MEMBAR_TYPE 2:0 +#define NVC36F_MEM_OP_C_MEMBAR_TYPE_SYS_MEMBAR 0x00000000 +#define NVC36F_MEM_OP_C_MEMBAR_TYPE_MEMBAR 0x00000001 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PDB 0:0 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PDB_ALL 0x00000001 // Probably nonsensical for MMU_TLB_INVALIDATE_TARGETED +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_GPC 1:1 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_REPLAY 4:2 // only relevant if GPC ENABLE +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_REPLAY_NONE 0x00000000 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START 0x00000001 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START_ACK_ALL 0x00000002 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_TARGETED 0x00000003 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_GLOBAL 0x00000004 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_VA_GLOBAL 0x00000005 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE 6:5 // only relevant if GPC ENABLE +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_NONE 0x00000000 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_GLOBALLY 0x00000001 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_INTRANODE 0x00000002 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE 9:7 //only relevant for REPLAY_CANCEL_VA_GLOBAL +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_READ 0 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_WRITE 1 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_STRONG 2 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_RSVRVD 3 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_WEAK 4 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_ALL 5 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_WRITE_AND_ATOMIC 6 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ALL 7 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL 9:7 // Invalidate affects this level and all below +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_ALL 0x00000000 // Invalidate tlb caches at all levels of the page table +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_PTE_ONLY 0x00000001 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE0 0x00000002 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE1 0x00000003 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE2 0x00000004 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3 0x00000005 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE4 0x00000006 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE5 0x00000007 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE 11:10 // only relevant if PDB_ONE +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_VID_MEM 0x00000000 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 +#define NVC36F_MEM_OP_C_TLB_INVALIDATE_PDB_ADDR_LO 31:12 // only relevant if PDB_ONE +#define NVC36F_MEM_OP_C_ACCESS_COUNTER_CLR_TARGETED_NOTIFY_TAG 19:0 +// MEM_OP_D MUST be preceded by MEM_OPs A-C. +#define NVC36F_MEM_OP_D (0x00000034) +#define NVC36F_MEM_OP_D_TLB_INVALIDATE_PDB_ADDR_HI 26:0 // only relevant if PDB_ONE +#define NVC36F_MEM_OP_D_OPERATION 31:27 +#define NVC36F_MEM_OP_D_OPERATION_MEMBAR 0x00000005 +#define NVC36F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NVC36F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE_TARGETED 0x0000000a +#define NVC36F_MEM_OP_D_OPERATION_L2_PEERMEM_INVALIDATE 0x0000000d +#define NVC36F_MEM_OP_D_OPERATION_L2_SYSMEM_INVALIDATE 0x0000000e +// CLEAN_LINES is an alias for Tegra/GPU IP usage +#define NVC36F_MEM_OP_B_OPERATION_L2_INVALIDATE_CLEAN_LINES 0x0000000e +#define NVC36F_MEM_OP_D_OPERATION_L2_CLEAN_COMPTAGS 0x0000000f +#define NVC36F_MEM_OP_D_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NVC36F_MEM_OP_D_OPERATION_L2_WAIT_FOR_SYS_PENDING_READS 0x00000015 +#define NVC36F_MEM_OP_D_OPERATION_ACCESS_COUNTER_CLR 0x00000016 +#define NVC36F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE 1:0 +#define NVC36F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_MIMC 0x00000000 +#define NVC36F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_MOMC 0x00000001 +#define NVC36F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_ALL 0x00000002 +#define NVC36F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_TARGETED 0x00000003 +#define NVC36F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE 2:2 +#define NVC36F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE_MIMC 0x00000000 +#define NVC36F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE_MOMC 0x00000001 +#define NVC36F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_BANK 6:3 +#define NVC36F_SET_REFERENCE (0x00000050) +#define NVC36F_SET_REFERENCE_COUNT 31:0 +#define NVC36F_SEM_ADDR_LO (0x0000005c) +#define NVC36F_SEM_ADDR_LO_OFFSET 31:2 +#define NVC36F_SEM_ADDR_HI (0x00000060) +#define NVC36F_SEM_ADDR_HI_OFFSET 7:0 +#define NVC36F_SEM_PAYLOAD_LO (0x00000064) +#define NVC36F_SEM_PAYLOAD_LO_PAYLOAD 31:0 +#define NVC36F_SEM_PAYLOAD_HI (0x00000068) +#define NVC36F_SEM_PAYLOAD_HI_PAYLOAD 31:0 +#define NVC36F_SEM_EXECUTE (0x0000006c) +#define NVC36F_SEM_EXECUTE_OPERATION 2:0 +#define NVC36F_SEM_EXECUTE_OPERATION_ACQUIRE 0x00000000 +#define NVC36F_SEM_EXECUTE_OPERATION_RELEASE 0x00000001 +#define NVC36F_SEM_EXECUTE_OPERATION_ACQ_STRICT_GEQ 0x00000002 +#define NVC36F_SEM_EXECUTE_OPERATION_ACQ_CIRC_GEQ 0x00000003 +#define NVC36F_SEM_EXECUTE_OPERATION_ACQ_AND 0x00000004 +#define NVC36F_SEM_EXECUTE_OPERATION_ACQ_NOR 0x00000005 +#define NVC36F_SEM_EXECUTE_OPERATION_REDUCTION 0x00000006 +#define NVC36F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG 12:12 +#define NVC36F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG_DIS 0x00000000 +#define NVC36F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG_EN 0x00000001 +#define NVC36F_SEM_EXECUTE_RELEASE_WFI 20:20 +#define NVC36F_SEM_EXECUTE_RELEASE_WFI_DIS 0x00000000 +#define NVC36F_SEM_EXECUTE_RELEASE_WFI_EN 0x00000001 +#define NVC36F_SEM_EXECUTE_PAYLOAD_SIZE 24:24 +#define NVC36F_SEM_EXECUTE_PAYLOAD_SIZE_32BIT 0x00000000 +#define NVC36F_SEM_EXECUTE_PAYLOAD_SIZE_64BIT 0x00000001 +#define NVC36F_SEM_EXECUTE_RELEASE_TIMESTAMP 25:25 +#define NVC36F_SEM_EXECUTE_RELEASE_TIMESTAMP_DIS 0x00000000 +#define NVC36F_SEM_EXECUTE_RELEASE_TIMESTAMP_EN 0x00000001 +#define NVC36F_SEM_EXECUTE_REDUCTION 30:27 +#define NVC36F_SEM_EXECUTE_REDUCTION_IMIN 0x00000000 +#define NVC36F_SEM_EXECUTE_REDUCTION_IMAX 0x00000001 +#define NVC36F_SEM_EXECUTE_REDUCTION_IXOR 0x00000002 +#define NVC36F_SEM_EXECUTE_REDUCTION_IAND 0x00000003 +#define NVC36F_SEM_EXECUTE_REDUCTION_IOR 0x00000004 +#define NVC36F_SEM_EXECUTE_REDUCTION_IADD 0x00000005 +#define NVC36F_SEM_EXECUTE_REDUCTION_INC 0x00000006 +#define NVC36F_SEM_EXECUTE_REDUCTION_DEC 0x00000007 +#define NVC36F_SEM_EXECUTE_REDUCTION_FORMAT 31:31 +#define NVC36F_SEM_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000000 +#define NVC36F_SEM_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000001 +#define NVC36F_WFI (0x00000078) +#define NVC36F_WFI_SCOPE 0:0 +#define NVC36F_WFI_SCOPE_CURRENT_SCG_TYPE 0x00000000 +#define NVC36F_WFI_SCOPE_CURRENT_VEID 0x00000000 +#define NVC36F_WFI_SCOPE_ALL 0x00000001 +#define NVC36F_CRC_CHECK (0x0000007c) +#define NVC36F_CRC_CHECK_VALUE 31:0 +#define NVC36F_YIELD (0x00000080) +#define NVC36F_YIELD_OP 1:0 +#define NVC36F_YIELD_OP_NOP 0x00000000 +#define NVC36F_YIELD_OP_RUNLIST_TIMESLICE 0x00000002 +#define NVC36F_YIELD_OP_TSG 0x00000003 +#define NVC36F_CLEAR_FAULTED (0x00000084) +#define NVC36F_CLEAR_FAULTED_CHID 11:0 +#define NVC36F_CLEAR_FAULTED_TYPE 31:31 +#define NVC36F_CLEAR_FAULTED_TYPE_PBDMA_FAULTED 0x00000000 +#define NVC36F_CLEAR_FAULTED_TYPE_ENG_FAULTED 0x00000001 + + +/* GPFIFO entry format */ +#define NVC36F_GP_ENTRY__SIZE 8 +#define NVC36F_GP_ENTRY0_FETCH 0:0 +#define NVC36F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVC36F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVC36F_GP_ENTRY0_GET 31:2 +#define NVC36F_GP_ENTRY0_OPERAND 31:0 +#define NVC36F_GP_ENTRY1_GET_HI 7:0 +#define NVC36F_GP_ENTRY1_PRIV 8:8 +#define NVC36F_GP_ENTRY1_PRIV_USER 0x00000000 +#define NVC36F_GP_ENTRY1_PRIV_KERNEL 0x00000001 +#define NVC36F_GP_ENTRY1_LEVEL 9:9 +#define NVC36F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVC36F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVC36F_GP_ENTRY1_LENGTH 30:10 +#define NVC36F_GP_ENTRY1_SYNC 31:31 +#define NVC36F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVC36F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVC36F_GP_ENTRY1_OPCODE 7:0 +#define NVC36F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVC36F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVC36F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVC36F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 + +/* dma method formats */ +#define NVC36F_DMA_METHOD_ADDRESS_OLD 12:2 +#define NVC36F_DMA_METHOD_ADDRESS 11:0 +#define NVC36F_DMA_SUBDEVICE_MASK 15:4 +#define NVC36F_DMA_METHOD_SUBCHANNEL 15:13 +#define NVC36F_DMA_TERT_OP 17:16 +#define NVC36F_DMA_TERT_OP_GRP0_INC_METHOD (0x00000000) +#define NVC36F_DMA_TERT_OP_GRP0_SET_SUB_DEV_MASK (0x00000001) +#define NVC36F_DMA_TERT_OP_GRP0_STORE_SUB_DEV_MASK (0x00000002) +#define NVC36F_DMA_TERT_OP_GRP0_USE_SUB_DEV_MASK (0x00000003) +#define NVC36F_DMA_TERT_OP_GRP2_NON_INC_METHOD (0x00000000) +#define NVC36F_DMA_METHOD_COUNT_OLD 28:18 +#define NVC36F_DMA_METHOD_COUNT 28:16 +#define NVC36F_DMA_IMMD_DATA 28:16 +#define NVC36F_DMA_SEC_OP 31:29 +#define NVC36F_DMA_SEC_OP_GRP0_USE_TERT (0x00000000) +#define NVC36F_DMA_SEC_OP_INC_METHOD (0x00000001) +#define NVC36F_DMA_SEC_OP_GRP2_USE_TERT (0x00000002) +#define NVC36F_DMA_SEC_OP_NON_INC_METHOD (0x00000003) +#define NVC36F_DMA_SEC_OP_IMMD_DATA_METHOD (0x00000004) +#define NVC36F_DMA_SEC_OP_ONE_INC (0x00000005) +#define NVC36F_DMA_SEC_OP_RESERVED6 (0x00000006) +#define NVC36F_DMA_SEC_OP_END_PB_SEGMENT (0x00000007) +/* dma incrementing method format */ +#define NVC36F_DMA_INCR_ADDRESS 11:0 +#define NVC36F_DMA_INCR_SUBCHANNEL 15:13 +#define NVC36F_DMA_INCR_COUNT 28:16 +#define NVC36F_DMA_INCR_OPCODE 31:29 +#define NVC36F_DMA_INCR_OPCODE_VALUE (0x00000001) +#define NVC36F_DMA_INCR_DATA 31:0 +/* dma non-incrementing method format */ +#define NVC36F_DMA_NONINCR_ADDRESS 11:0 +#define NVC36F_DMA_NONINCR_SUBCHANNEL 15:13 +#define NVC36F_DMA_NONINCR_COUNT 28:16 +#define NVC36F_DMA_NONINCR_OPCODE 31:29 +#define NVC36F_DMA_NONINCR_OPCODE_VALUE (0x00000003) +#define NVC36F_DMA_NONINCR_DATA 31:0 +/* dma increment-once method format */ +#define NVC36F_DMA_ONEINCR_ADDRESS 11:0 +#define NVC36F_DMA_ONEINCR_SUBCHANNEL 15:13 +#define NVC36F_DMA_ONEINCR_COUNT 28:16 +#define NVC36F_DMA_ONEINCR_OPCODE 31:29 +#define NVC36F_DMA_ONEINCR_OPCODE_VALUE (0x00000005) +#define NVC36F_DMA_ONEINCR_DATA 31:0 +/* dma no-operation format */ +#define NVC36F_DMA_NOP (0x00000000) +/* dma immediate-data format */ +#define NVC36F_DMA_IMMD_ADDRESS 11:0 +#define NVC36F_DMA_IMMD_SUBCHANNEL 15:13 +#define NVC36F_DMA_IMMD_DATA 28:16 +#define NVC36F_DMA_IMMD_OPCODE 31:29 +#define NVC36F_DMA_IMMD_OPCODE_VALUE (0x00000004) +/* dma set sub-device mask format */ +#define NVC36F_DMA_SET_SUBDEVICE_MASK_VALUE 15:4 +#define NVC36F_DMA_SET_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC36F_DMA_SET_SUBDEVICE_MASK_OPCODE_VALUE (0x00000001) +/* dma store sub-device mask format */ +#define NVC36F_DMA_STORE_SUBDEVICE_MASK_VALUE 15:4 +#define NVC36F_DMA_STORE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC36F_DMA_STORE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000002) +/* dma use sub-device mask format */ +#define NVC36F_DMA_USE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC36F_DMA_USE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000003) +/* dma end-segment format */ +#define NVC36F_DMA_ENDSEG_OPCODE 31:29 +#define NVC36F_DMA_ENDSEG_OPCODE_VALUE (0x00000007) +/* dma legacy incrementing/non-incrementing formats */ +#define NVC36F_DMA_ADDRESS 12:2 +#define NVC36F_DMA_SUBCH 15:13 +#define NVC36F_DMA_OPCODE3 17:16 +#define NVC36F_DMA_OPCODE3_NONE (0x00000000) +#define NVC36F_DMA_COUNT 28:18 +#define NVC36F_DMA_OPCODE 31:29 +#define NVC36F_DMA_OPCODE_METHOD (0x00000000) +#define NVC36F_DMA_OPCODE_NONINC_METHOD (0x00000002) +#define NVC36F_DMA_DATA 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc36f_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc36fsw.h b/userspace/sdks/nv570/inc/class/clc36fsw.h new file mode 100644 index 0000000..b54c505 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc36fsw.h @@ -0,0 +1,44 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* This file is *not* auto-generated. */ + +#ifndef _clc36f_sw_h_ +#define _clc36f_sw_h_ + +#define NVC36F_NOTIFIERS_RC (0) +#define NVC36F_NOTIFIERS_REFCNT (1) +#define NVC36F_NOTIFIERS_NONSTALL (2) +#define NVC36F_NOTIFIERS_EVENTBUFFER (3) +#define NVC36F_NOTIFIERS_IDLECHANNEL (4) +#define NVC36F_NOTIFIERS_ENDCTX (5) +#define NVC36F_NOTIFIERS_SW (6) +#define NVC36F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVC36F_NOTIFIERS_REPLAYABLE_FAULT (8) +#define NVC36F_NOTIFIERS_MAXCOUNT (9) + +/* NvNotification[] fields and values */ +#define NVC36F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVC36F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _clc36f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc370.h b/userspace/sdks/nv570/inc/class/clc370.h new file mode 100644 index 0000000..762ecf0 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc370.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2015-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc370.finn +// + +#include "clc370_notification.h" + +#define NVC370_DISPLAY (0xc370U) /* finn: Evaluated from "NVC370_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NVC370_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc370U) + +typedef struct NVC370_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numPiors; // Number of PIORs in this chip/display +} NVC370_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc370_notification.h b/userspace/sdks/nv570/inc/class/clc370_notification.h new file mode 100644 index 0000000..c94556e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc370_notification.h @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc370_notification_h_ +#define _clc370_notification_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "class/cl5070.h" + +/* event values */ +#define NVC370_NOTIFIERS_SW NV5070_NOTIFIERS_SW +#define NVC370_NOTIFIERS_BEGIN NV5070_NOTIFIERS_MAXCOUNT +#define NVC370_NOTIFIERS_RG_SEM_NOTIFICATION NVC370_NOTIFIERS_BEGIN + (0) +#define NVC370_NOTIFIERS_WIN_SEM_NOTIFICATION NVC370_NOTIFIERS_RG_SEM_NOTIFICATION + (1) +#define NVC370_NOTIFIERS_MAXCOUNT NVC370_NOTIFIERS_WIN_SEM_NOTIFICATION + (1) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc370_notification_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/clc371.h b/userspace/sdks/nv570/inc/class/clc371.h new file mode 100644 index 0000000..e8f9977 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc371.h @@ -0,0 +1,109 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc371_h_ +#define _clc371_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC371_DISP_SF_USER (0x000C371) + +typedef volatile struct _clc371_tag0 { + NvU32 dispSfUserOffset[0x400]; +} _NvC371DispSfUser, NvC371DispSfUserMap; + +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x00690000-0x00690000+(i)*1024) /* RWX4A */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 4 /* */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER 4:4 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_DIS 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_EN 0x00000001 /* RW--V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE 8:8 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_DIS 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_EN 0x00000001 /* RW--V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x00690004-0x00690000+(i)*1024) /* R--4A */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 4 /* */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R--VF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x00690008-0x00690000+(i)*1024) /* RWX4A */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 4 /* */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x0069000C-0x00690000+(i)*1024) /* RWX4A */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 4 /* */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x00690010-0x00690000+(i)*1024) /* RWX4A */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 4 /* */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x00690014-0x00690000+(i)*1024) /* RWX4A */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 4 /* */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x00690018-0x00690000+(i)*1024) /* RWX4A */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 4 /* */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVC371_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _clc371_h_ diff --git a/userspace/sdks/nv570/inc/class/clc372sw.h b/userspace/sdks/nv570/inc/class/clc372sw.h new file mode 100644 index 0000000..552ea08 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc372sw.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc372sw_h_ +#define _clc372sw_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC372_DISPLAY_SW (0x0000C372) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc372sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc373.h b/userspace/sdks/nv570/inc/class/clc373.h new file mode 100644 index 0000000..c707022 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc373.h @@ -0,0 +1,350 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc373_h_ +#define _clc373_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC373_DISP_CAPABILITIES 0xC373 + +typedef volatile struct _clc373_tag0 { + NvU32 dispCapabilities[0x400]; +} _NvC373DispCapabilities,NvC373DispCapabilities_Map ; + + +#define NVC373_SYS_CAP 0x0 /* RW-4R */ +#define NVC373_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVC373_SYS_CAP_HEAD0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVC373_SYS_CAP_HEAD1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVC373_SYS_CAP_HEAD2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVC373_SYS_CAP_HEAD3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVC373_SYS_CAP_HEAD4_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVC373_SYS_CAP_HEAD5_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVC373_SYS_CAP_HEAD6_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVC373_SYS_CAP_HEAD7_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC373_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVC373_SYS_CAP_HEAD_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVC373_SYS_CAP_SOR0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVC373_SYS_CAP_SOR1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVC373_SYS_CAP_SOR2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVC373_SYS_CAP_SOR3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVC373_SYS_CAP_SOR4_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVC373_SYS_CAP_SOR5_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVC373_SYS_CAP_SOR6_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVC373_SYS_CAP_SOR7_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVC373_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVC373_SYS_CAP_SOR_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB 0x4 /* RW-4R */ +#define NVC373_SYS_CAPB_WINDOW0_EXISTS 0:0 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW1_EXISTS 1:1 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW2_EXISTS 2:2 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW3_EXISTS 3:3 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW4_EXISTS 4:4 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW4_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW5_EXISTS 5:5 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW5_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW6_EXISTS 6:6 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW6_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW7_EXISTS 7:7 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW7_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW8_EXISTS 8:8 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW8_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW9_EXISTS 9:9 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW9_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW10_EXISTS 10:10 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW10_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW11_EXISTS 11:11 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW11_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW12_EXISTS 12:12 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW12_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW13_EXISTS 13:13 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW13_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW14_EXISTS 14:14 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW14_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW15_EXISTS 15:15 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW15_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW16_EXISTS 16:16 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW16_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW17_EXISTS 17:17 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW17_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW18_EXISTS 18:18 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW18_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW19_EXISTS 19:19 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW19_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW20_EXISTS 20:20 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW20_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW21_EXISTS 21:21 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW21_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW22_EXISTS 22:22 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW22_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW23_EXISTS 23:23 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW23_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW24_EXISTS 24:24 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW24_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW25_EXISTS 25:25 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW25_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW26_EXISTS 26:26 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW26_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW27_EXISTS 27:27 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW27_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW28_EXISTS 28:28 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW28_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW29_EXISTS 29:29 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW29_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW30_EXISTS 30:30 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW30_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW31_EXISTS 31:31 /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW31_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC373_SYS_CAPB_WINDOW_EXISTS__SIZE_1 32 /* */ +#define NVC373_SYS_CAPB_WINDOW_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SYS_CAPB_WINDOW_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC373_SYS_CAPB_WINDOW_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC373_HEAD_CAPA(i) (0x30+(i)*32) /* RW-4A */ +#define NVC373_HEAD_CAPA__SIZE_1 8 /* */ +#define NVC373_HEAD_CAPA_SCALER 0:0 /* RWIVF */ +#define NVC373_HEAD_CAPA_SCALER_TRUE 0x00000001 /* RW--V */ +#define NVC373_HEAD_CAPA_SCALER_FALSE 0x00000000 /* RW--V */ +#define NVC373_HEAD_CAPA_SCALER_INIT 0x00000000 /* RWI-V */ +#define NVC373_HEAD_CAPA_SCALER_HAS_YUV422 1:1 /* RWIVF */ +#define NVC373_HEAD_CAPA_SCALER_HAS_YUV422_TRUE 0x00000001 /* RW--V */ +#define NVC373_HEAD_CAPA_SCALER_HAS_YUV422_FALSE 0x00000000 /* RW--V */ +#define NVC373_HEAD_CAPA_SCALER_HAS_YUV422_INIT 0x00000000 /* RWI-V */ +#define NVC373_HEAD_CAPA_HSAT 2:2 /* RWIVF */ +#define NVC373_HEAD_CAPA_HSAT_TRUE 0x00000001 /* RW--V */ +#define NVC373_HEAD_CAPA_HSAT_FALSE 0x00000000 /* RW--V */ +#define NVC373_HEAD_CAPA_HSAT_INIT 0x00000000 /* RWI-V */ +#define NVC373_HEAD_CAPA_OCSC 3:3 /* RWIVF */ +#define NVC373_HEAD_CAPA_OCSC_TRUE 0x00000001 /* RW--V */ +#define NVC373_HEAD_CAPA_OCSC_FALSE 0x00000000 /* RW--V */ +#define NVC373_HEAD_CAPA_OCSC_INIT 0x00000000 /* RWI-V */ +#define NVC373_HEAD_CAPA_YUV422 4:4 /* RWIVF */ +#define NVC373_HEAD_CAPA_YUV422_TRUE 0x00000001 /* RW--V */ +#define NVC373_HEAD_CAPA_YUV422_FALSE 0x00000000 /* RW--V */ +#define NVC373_HEAD_CAPA_YUV422_INIT 0x00000000 /* RWI-V */ +#define NVC373_HEAD_CAPA_LUT_TYPE 6:5 /* RWIVF */ +#define NVC373_HEAD_CAPA_LUT_TYPE_NONE 0x00000000 /* RW--V */ +#define NVC373_HEAD_CAPA_LUT_TYPE_257 0x00000001 /* RW--V */ +#define NVC373_HEAD_CAPA_LUT_TYPE_1025 0x00000002 /* RW--V */ +#define NVC373_HEAD_CAPA_LUT_TYPE_INIT 0x00000000 /* RWI-V */ +#define NVC373_HEAD_CAPA_LUT_LOCATION 7:7 /* RWIVF */ +#define NVC373_HEAD_CAPA_LUT_LOCATION_EARLY 0x00000000 /* RW--V */ +#define NVC373_HEAD_CAPA_LUT_LOCATION_LATE 0x00000001 /* RW--V */ +#define NVC373_HEAD_CAPA_LUT_LOCATION_INIT 0x00000000 /* RWI-V */ +#define NVC373_HEAD_CAPD(i) (0x3c+(i)*32) /* RW-4A */ +#define NVC373_HEAD_CAPD__SIZE_1 8 /* */ +#define NVC373_HEAD_CAPD_MAX_PIXELS_2TAP422 15:0 /* RWIUF */ +#define NVC373_HEAD_CAPD_MAX_PIXELS_2TAP422_INIT 0x00000000 /* RWI-V */ +#define NVC373_HEAD_CAPD_MAX_PIXELS_2TAP444 31:16 /* RWIUF */ +#define NVC373_HEAD_CAPD_MAX_PIXELS_2TAP444_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVC373_SOR_CAP__SIZE_1 8 /* */ +#define NVC373_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVC373_SOR_CAP_SINGLE_LVDS_18_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVC373_SOR_CAP_SINGLE_LVDS_24_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVC373_SOR_CAP_DUAL_LVDS_18_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVC373_SOR_CAP_DUAL_LVDS_24_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVC373_SOR_CAP_SINGLE_TMDS_A_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVC373_SOR_CAP_SINGLE_TMDS_B_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVC373_SOR_CAP_DUAL_TMDS_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVC373_SOR_CAP_DISPLAY_OVER_PCIE_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVC373_SOR_CAP_SDI_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVC373_SOR_CAP_DP_A_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVC373_SOR_CAP_DP_B_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVC373_SOR_CAP_DP_INTERLACE_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVC373_SOR_CAP_DP_8_LANES_INIT 0x00000000 /* RWI-V */ +#define NVC373_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVC373_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVC373_SOR_CLK_CAP(i) (0x608+(i)*4) /* RW-4A */ +#define NVC373_SOR_CLK_CAP__SIZE_1 8 /* */ +#define NVC373_SOR_CLK_CAP_DP_MAX 7:0 /* RWIUF */ +#define NVC373_SOR_CLK_CAP_DP_MAX_INIT 0x00000036 /* RWI-V */ +#define NVC373_SOR_CLK_CAP_TMDS_MAX 23:16 /* RWIUF */ +#define NVC373_SOR_CLK_CAP_TMDS_MAX_INIT 0x0000003C /* RWI-V */ +#define NVC373_SOR_CLK_CAP_LVDS_MAX 31:24 /* RWIUF */ +#define NVC373_SOR_CLK_CAP_LVDS_MAX_INIT 0x00000000 /* RWI-V */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clc373_h_ diff --git a/userspace/sdks/nv570/inc/class/clc37b.h b/userspace/sdks/nv570/inc/class/clc37b.h new file mode 100644 index 0000000..05f47a2 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc37b.h @@ -0,0 +1,68 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _clC37b_h_ +#define _clC37b_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC37B_WINDOW_IMM_CHANNEL_DMA (0x0000C37B) + +// dma opcode instructions +#define NVC37B_DMA +#define NVC37B_DMA_OPCODE 31:29 +#define NVC37B_DMA_OPCODE_METHOD 0x00000000 +#define NVC37B_DMA_OPCODE_JUMP 0x00000001 +#define NVC37B_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC37B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC37B_DMA_METHOD_COUNT 27:18 +#define NVC37B_DMA_METHOD_OFFSET 13:2 +#define NVC37B_DMA_DATA 31:0 +#define NVC37B_DMA_DATA_NOP 0x00000000 +#define NVC37B_DMA_JUMP_OFFSET 11:2 +#define NVC37B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC37B_PUT (0x00000000) +#define NVC37B_PUT_PTR 9:0 +#define NVC37B_GET (0x00000004) +#define NVC37B_GET_PTR 9:0 +#define NVC37B_UPDATE (0x00000200) +#define NVC37B_UPDATE_RELEASE_ELV 0:0 +#define NVC37B_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC37B_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW 1:1 +#define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC37B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC37B_SET_POINT_OUT_X 15:0 +#define NVC37B_SET_POINT_OUT_Y 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC37b_h diff --git a/userspace/sdks/nv570/inc/class/clc37d.h b/userspace/sdks/nv570/inc/class/clc37d.h new file mode 100644 index 0000000..9ac7050 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc37d.h @@ -0,0 +1,953 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _clC37d_h_ +#define _clC37d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC37D_CORE_CHANNEL_DMA (0x0000C37D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVC37D_DMA +#define NVC37D_DMA_OPCODE 31:29 +#define NVC37D_DMA_OPCODE_METHOD 0x00000000 +#define NVC37D_DMA_OPCODE_JUMP 0x00000001 +#define NVC37D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC37D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC37D_DMA_METHOD_COUNT 27:18 +#define NVC37D_DMA_METHOD_OFFSET 13:2 +#define NVC37D_DMA_DATA 31:0 +#define NVC37D_DMA_DATA_NOP 0x00000000 +#define NVC37D_DMA_JUMP_OFFSET 11:2 +#define NVC37D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + +// class methods +#define NVC37D_PUT (0x00000000) +#define NVC37D_PUT_PTR 9:0 +#define NVC37D_GET (0x00000004) +#define NVC37D_GET_PTR 9:0 +#define NVC37D_UPDATE (0x00000200) +#define NVC37D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVC37D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVC37D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVC37D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVC37D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVC37D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVC37D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVC37D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVC37D_UPDATE_RELEASE_ELV 0:0 +#define NVC37D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC37D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC37D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC37D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC37D_SET_CONTEXT_DMA_NOTIFIER (0x00000208) +#define NVC37D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NVC37D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVC37D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC37D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC37D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC37D_SET_NOTIFIER_CONTROL_OFFSET 11:4 +#define NVC37D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVC37D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVC37D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVC37D_SET_CONTROL (0x00000210) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVC37D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC37D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC37D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC37D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVC37D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVC37D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVC37D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVC37D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVC37D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVC37D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVC37D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVC37D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVC37D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVC37D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVC37D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) + +#define NVC37D_PIOR_SET_CONTROL(a) (0x00000280 + (a)*0x00000020) +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC37D_PIOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC37D_PIOR_SET_CONTROL_PROTOCOL 11:8 +#define NVC37D_PIOR_SET_CONTROL_PROTOCOL_EXT_TMDS_ENC (0x00000000) +#define NVC37D_PIOR_SET_CONTROL_PROTOCOL_EXT_SDI_SD_ENC (0x00000001) +#define NVC37D_PIOR_SET_CONTROL_PROTOCOL_EXT_SDI_HD_ENC (0x00000002) +#define NVC37D_PIOR_SET_CONTROL_PROTOCOL_DIST_RENDER_OUT (0x00000004) +#define NVC37D_PIOR_SET_CONTROL_PROTOCOL_DIST_RENDER_IN (0x00000005) +#define NVC37D_PIOR_SET_CONTROL_PROTOCOL_DIST_RENDER_INOUT (0x00000006) +#define NVC37D_PIOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVC37D_PIOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC37D_PIOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC37D_PIOR_SET_CUSTOM_REASON(a) (0x00000284 + (a)*0x00000020) +#define NVC37D_PIOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVC37D_PIOR_SET_SW_SPARE_A(a) (0x00000288 + (a)*0x00000020) +#define NVC37D_PIOR_SET_SW_SPARE_A_CODE 31:0 +#define NVC37D_PIOR_SET_SW_SPARE_B(a) (0x0000028C + (a)*0x00000020) +#define NVC37D_PIOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVC37D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC37D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC37D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVC37D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVC37D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVC37D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVC37D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVC37D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVC37D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVC37D_SOR_SET_CONTROL_PROTOCOL_DSI (0x0000000A) +#define NVC37D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVC37D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVC37D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC37D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC37D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVC37D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVC37D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVC37D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVC37D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVC37D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVC37D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVC37D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVC37D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVC37D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVC37D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVC37D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVC37D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVC37D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC37D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVC37D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC37D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_LUT 17:16 +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_LUT_USAGE_NONE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_LUT_USAGE_257 (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_LUT_USAGE_1025 (0x00000002) +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) + +#define NVC37D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000400) +#define NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVC37D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVC37D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVC37D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_PROCAMP_SAT_COS 15:4 +#define NVC37D_HEAD_SET_PROCAMP_SAT_SINE 27:16 +#define NVC37D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVC37D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVC37D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVC37D_HEAD_SET_PROCAMP_RANGE_COMPRESSION 29:29 +#define NVC37D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_PROCAMP_RANGE_COMPRESSION_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_PROCAMP_BLACK_LEVEL 31:30 +#define NVC37D_HEAD_SET_PROCAMP_BLACK_LEVEL_AUTO (0x00000000) +#define NVC37D_HEAD_SET_PROCAMP_BLACK_LEVEL_VIDEO (0x00000001) +#define NVC37D_HEAD_SET_PROCAMP_BLACK_LEVEL_GRAPHICS (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000400) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVC37D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000400) +#define NVC37D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVC37D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVC37D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE 11:10 +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN 8:4 +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_LOCKOUT_WINDOW 15:12 +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_MODE 23:22 +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN 20:16 +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC37D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC37D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE 30:30 +#define NVC37D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE 31:31 +#define NVC37D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000400) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC37D_HEAD_SET_PIXEL_REORDER_CONTROL(a) (0x00002010 + (a)*0x00000400) +#define NVC37D_HEAD_SET_PIXEL_REORDER_CONTROL_BANK_WIDTH 13:0 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000400) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC37D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000400) +#define NVC37D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVC37D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVC37D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVC37D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVC37D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVC37D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVC37D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVC37D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVC37D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVC37D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVC37D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVC37D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVC37D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVC37D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000400) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVC37D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000400 + (b)*0x00000004) +#define NVC37D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000400) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC37D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000400) +#define NVC37D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC37D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000400) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_LUT 5:4 +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_LUT_USAGE_NONE (0x00000000) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_LUT_USAGE_257 (0x00000001) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_LUT_USAGE_1025 (0x00000002) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC37D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC37D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000400) +#define NVC37D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVC37D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVC37D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVC37D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVC37D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVC37D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC37D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC37D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVC37D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVC37D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVC37D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVC37D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVC37D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC37D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000400) +#define NVC37D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVC37D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000400) +#define NVC37D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVC37D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVC37D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000400) +#define NVC37D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVC37D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVC37D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000400) +#define NVC37D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVC37D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVC37D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000400) +#define NVC37D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVC37D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVC37D_HEAD_SET_DESKTOP_COLOR(a) (0x00002060 + (a)*0x00000400) +#define NVC37D_HEAD_SET_DESKTOP_COLOR_ALPHA 7:0 +#define NVC37D_HEAD_SET_DESKTOP_COLOR_RED 15:8 +#define NVC37D_HEAD_SET_DESKTOP_COLOR_GREEN 23:16 +#define NVC37D_HEAD_SET_DESKTOP_COLOR_BLUE 31:24 +#define NVC37D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000400) +#define NVC37D_HEAD_SET_RASTER_SIZE_WIDTH 14:0 +#define NVC37D_HEAD_SET_RASTER_SIZE_HEIGHT 30:16 +#define NVC37D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000400) +#define NVC37D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVC37D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVC37D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000400) +#define NVC37D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVC37D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVC37D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000400) +#define NVC37D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVC37D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVC37D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000400) +#define NVC37D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVC37D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVC37D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVC37D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000400) +#define NVC37D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVC37D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVC37D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVC37D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000400) +#define NVC37D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVC37D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVC37D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVC37D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVC37D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVC37D_HEAD_SET_CONTEXT_DMA_CURSOR(a,b) (0x00002088 + (a)*0x00000400 + (b)*0x00000004) +#define NVC37D_HEAD_SET_CONTEXT_DMA_CURSOR_HANDLE 31:0 +#define NVC37D_HEAD_SET_OFFSET_CURSOR(a,b) (0x00002090 + (a)*0x00000400 + (b)*0x00000004) +#define NVC37D_HEAD_SET_OFFSET_CURSOR_ORIGIN 31:0 +#define NVC37D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000400) +#define NVC37D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVC37D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVC37D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000400) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_DE_GAMMA 29:28 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_DE_GAMMA_NONE (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_DE_GAMMA_SRGB (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_DE_GAMMA_YUV8_10 (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_DE_GAMMA_YUV12 (0x00000003) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000400) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT(a) (0x000020A4 + (a)*0x00000400) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_SIZE 1:0 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_SIZE_SIZE_257 (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_SIZE_SIZE_1025 (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_RANGE 5:4 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_RANGE_UNITY (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_RANGE_XRBIAS (0x00000001) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_RANGE_XVYCC (0x00000002) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_OUTPUT_MODE 9:8 +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_OUTPUT_MODE_INDEX (0x00000000) +#define NVC37D_HEAD_SET_CONTROL_OUTPUT_LUT_OUTPUT_MODE_INTERPOLATE (0x00000001) +#define NVC37D_HEAD_SET_OFFSET_OUTPUT_LUT(a) (0x000020A8 + (a)*0x00000400) +#define NVC37D_HEAD_SET_OFFSET_OUTPUT_LUT_ORIGIN 31:0 +#define NVC37D_HEAD_SET_CONTEXT_DMA_OUTPUT_LUT(a) (0x000020AC + (a)*0x00000400) +#define NVC37D_HEAD_SET_CONTEXT_DMA_OUTPUT_LUT_HANDLE 31:0 +#define NVC37D_HEAD_SET_CONTEXT_DMA_CRC(a) (0x00002180 + (a)*0x00000400) +#define NVC37D_HEAD_SET_CONTEXT_DMA_CRC_HANDLE 31:0 +#define NVC37D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000400) +#define NVC37D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 4:0 +#define NVC37D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVC37D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVC37D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_PIOR(i) (0x00000060 +(i)) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_PIOR__SIZE_1 4 +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_PIOR0 (0x00000060) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_PIOR1 (0x00000061) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_PIOR2 (0x00000062) +#define NVC37D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_PIOR3 (0x00000063) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_PIOR(i) (0x00000060 +(i)) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_PIOR__SIZE_1 4 +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_PIOR0 (0x00000060) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_PIOR1 (0x00000061) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_PIOR2 (0x00000062) +#define NVC37D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_PIOR3 (0x00000063) +#define NVC37D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVC37D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000400) +#define NVC37D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVC37D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVC37D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000400) +#define NVC37D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVC37D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000400) +#define NVC37D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVC37D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000400) +#define NVC37D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVC37D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000400) +#define NVC37D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVC37D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000400) +#define NVC37D_HEAD_SET_DISPLAY_RATE_RUN_MODE 0:0 +#define NVC37D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVC37D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVC37D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVC37D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVC37D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVC37D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVC37D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000400) +#define NVC37D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVC37D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC37d_h diff --git a/userspace/sdks/nv570/inc/class/clc37dcrcnotif.h b/userspace/sdks/nv570/inc/class/clc37dcrcnotif.h new file mode 100644 index 0000000..bf0e9a2 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc37dcrcnotif.h @@ -0,0 +1,50 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2016 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __clc37dcrcnotif_h__ +#define __clc37dcrcnotif_h__ +/* This file is autogenerated. Do not edit */ + +#define NVC37D_NOTIFIER_CRC_STATUS_0 0x00000000 +#define NVC37D_NOTIFIER_CRC_STATUS_0_DONE 0:0 +#define NVC37D_NOTIFIER_CRC_STATUS_0_DONE_FALSE 0x00000000 +#define NVC37D_NOTIFIER_CRC_STATUS_0_DONE_TRUE 0x00000001 +#define NVC37D_NOTIFIER_CRC_STATUS_0_COMPOSITOR_OVERFLOW 3:3 +#define NVC37D_NOTIFIER_CRC_STATUS_0_COMPOSITOR_OVERFLOW_FALSE 0x00000000 +#define NVC37D_NOTIFIER_CRC_STATUS_0_COMPOSITOR_OVERFLOW_TRUE 0x00000001 +#define NVC37D_NOTIFIER_CRC_STATUS_0_RG_OVERFLOW 4:4 +#define NVC37D_NOTIFIER_CRC_STATUS_0_RG_OVERFLOW_FALSE 0x00000000 +#define NVC37D_NOTIFIER_CRC_STATUS_0_RG_OVERFLOW_TRUE 0x00000001 +#define NVC37D_NOTIFIER_CRC_STATUS_0_PRIMARY_OUTPUT_OVERFLOW 5:5 +#define NVC37D_NOTIFIER_CRC_STATUS_0_PRIMARY_OUTPUT_OVERFLOW_FALSE 0x00000000 +#define NVC37D_NOTIFIER_CRC_STATUS_0_PRIMARY_OUTPUT_OVERFLOW_TRUE 0x00000001 +#define NVC37D_NOTIFIER_CRC_STATUS_0_COUNT 27:16 +#define NVC37D_NOTIFIER_CRC_CRC_ENTRY0_11 0x0000000B +#define NVC37D_NOTIFIER_CRC_CRC_ENTRY0_11_COMPOSITOR_CRC 31:0 +#define NVC37D_NOTIFIER_CRC_CRC_ENTRY0_12 0x0000000C +#define NVC37D_NOTIFIER_CRC_CRC_ENTRY0_12_RG_CRC 31:0 +#define NVC37D_NOTIFIER_CRC_CRC_ENTRY0_13 0x0000000D +#define NVC37D_NOTIFIER_CRC_CRC_ENTRY0_13_PRIMARY_OUTPUT_CRC 31:0 +#define NVC37D_NOTIFIER_CRC_CRC_ENTRY1_21 0x00000015 + +#endif // __clc37dcrcnotif_h__ diff --git a/userspace/sdks/nv570/inc/class/clc37dswspare.h b/userspace/sdks/nv570/inc/class/clc37dswspare.h new file mode 100644 index 0000000..44b21a8 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc37dswspare.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc37d_sw_spare_h_ +#define _clc37d_sw_spare_h_ + +/* This file is *not* auto-generated. */ + +#define NVC37D_HEAD_SET_SW_SPARE_A_CODE_VPLL_REF 1:0 +#define NVC37D_HEAD_SET_SW_SPARE_A_CODE_VPLL_REF_NO_PREF (0x00000000) +#define NVC37D_HEAD_SET_SW_SPARE_A_CODE_VPLL_REF_QSYNC (0x00000001) + +#define NVC37D_HEAD_SET_SW_SPARE_A_DISABLE_MID_FRAME_AND_DWCF_WATERMARK 2:2 +#define NVC37D_HEAD_SET_SW_SPARE_A_DISABLE_MID_FRAME_AND_DWCF_WATERMARK_FALSE (0x00000000) +#define NVC37D_HEAD_SET_SW_SPARE_A_DISABLE_MID_FRAME_AND_DWCF_WATERMARK_TRUE (0x00000001) + +#endif // _clc37d_sw_spare_h_ diff --git a/userspace/sdks/nv570/inc/class/clc37e.h b/userspace/sdks/nv570/inc/class/clc37e.h new file mode 100644 index 0000000..f46929a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc37e.h @@ -0,0 +1,498 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef _clC37e_h_ +#define _clC37e_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC37E_WINDOW_CHANNEL_DMA (0x0000C37E) + +// dma opcode instructions +#define NVC37E_DMA +#define NVC37E_DMA_OPCODE 31:29 +#define NVC37E_DMA_OPCODE_METHOD 0x00000000 +#define NVC37E_DMA_OPCODE_JUMP 0x00000001 +#define NVC37E_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC37E_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC37E_DMA_METHOD_COUNT 27:18 +#define NVC37E_DMA_METHOD_OFFSET 13:2 +#define NVC37E_DMA_DATA 31:0 +#define NVC37E_DMA_DATA_NOP 0x00000000 +#define NVC37E_DMA_JUMP_OFFSET 11:2 +#define NVC37E_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC37E_PUT (0x00000000) +#define NVC37E_PUT_PTR 9:0 +#define NVC37E_GET (0x00000004) +#define NVC37E_GET_PTR 9:0 +#define NVC37E_UPDATE (0x00000200) +#define NVC37E_UPDATE_RELEASE_ELV 0:0 +#define NVC37E_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC37E_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC37E_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC37E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM 12:12 +#define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000) +#define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001) +#define NVC37E_GET_LINE (0x00000208) +#define NVC37E_GET_LINE_LINE 15:0 +#define NVC37E_SET_SEMAPHORE_CONTROL (0x0000020C) +#define NVC37E_SET_SEMAPHORE_CONTROL_OFFSET 7:0 +#define NVC37E_SET_SEMAPHORE_ACQUIRE (0x00000210) +#define NVC37E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0 +#define NVC37E_SET_SEMAPHORE_RELEASE (0x00000214) +#define NVC37E_SET_SEMAPHORE_RELEASE_VALUE 31:0 +#define NVC37E_SET_CONTEXT_DMA_SEMAPHORE (0x00000218) +#define NVC37E_SET_CONTEXT_DMA_SEMAPHORE_HANDLE 31:0 +#define NVC37E_SET_CONTEXT_DMA_NOTIFIER (0x0000021C) +#define NVC37E_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NVC37E_SET_NOTIFIER_CONTROL (0x00000220) +#define NVC37E_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC37E_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC37E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC37E_SET_NOTIFIER_CONTROL_OFFSET 11:4 +#define NVC37E_SET_SIZE (0x00000224) +#define NVC37E_SET_SIZE_WIDTH 15:0 +#define NVC37E_SET_SIZE_HEIGHT 31:16 +#define NVC37E_SET_STORAGE (0x00000228) +#define NVC37E_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC37E_SET_STORAGE_MEMORY_LAYOUT 4:4 +#define NVC37E_SET_STORAGE_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC37E_SET_STORAGE_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC37E_SET_PARAMS (0x0000022C) +#define NVC37E_SET_PARAMS_FORMAT 7:0 +#define NVC37E_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NVC37E_SET_PARAMS_FORMAT_R4G4B4A4 (0x0000002F) +#define NVC37E_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NVC37E_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC37E_SET_PARAMS_FORMAT_R5G5B5A1 (0x0000002E) +#define NVC37E_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC37E_SET_PARAMS_FORMAT_X8R8G8B8 (0x000000E6) +#define NVC37E_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NVC37E_SET_PARAMS_FORMAT_X8B8G8R8 (0x000000F9) +#define NVC37E_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NVC37E_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NVC37E_SET_PARAMS_FORMAT_X2BL10GL10RL10_XRBIAS (0x00000022) +#define NVC37E_SET_PARAMS_FORMAT_X2BL10GL10RL10_XVYCC (0x00000024) +#define NVC37E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NVC37E_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NVC37E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NVC37E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422 (0x00000028) +#define NVC37E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422 (0x00000029) +#define NVC37E_SET_PARAMS_FORMAT_Y8___U8V8_N444 (0x00000035) +#define NVC37E_SET_PARAMS_FORMAT_Y8___U8V8_N422 (0x00000036) +#define NVC37E_SET_PARAMS_FORMAT_Y8___U8V8_N422R (0x00000037) +#define NVC37E_SET_PARAMS_FORMAT_Y8___V8U8_N420 (0x00000038) +#define NVC37E_SET_PARAMS_FORMAT_Y8___U8___V8_N444 (0x0000003A) +#define NVC37E_SET_PARAMS_FORMAT_Y8___U8___V8_N420 (0x0000003B) +#define NVC37E_SET_PARAMS_FORMAT_Y10___U10V10_N444 (0x00000055) +#define NVC37E_SET_PARAMS_FORMAT_Y10___U10V10_N422 (0x00000056) +#define NVC37E_SET_PARAMS_FORMAT_Y10___U10V10_N422R (0x00000057) +#define NVC37E_SET_PARAMS_FORMAT_Y10___V10U10_N420 (0x00000058) +#define NVC37E_SET_PARAMS_FORMAT_Y10___U10___V10_N444 (0x0000005A) +#define NVC37E_SET_PARAMS_FORMAT_Y10___U10___V10_N420 (0x0000005B) +#define NVC37E_SET_PARAMS_FORMAT_Y12___U12V12_N444 (0x00000075) +#define NVC37E_SET_PARAMS_FORMAT_Y12___U12V12_N422 (0x00000076) +#define NVC37E_SET_PARAMS_FORMAT_Y12___U12V12_N422R (0x00000077) +#define NVC37E_SET_PARAMS_FORMAT_Y12___V12U12_N420 (0x00000078) +#define NVC37E_SET_PARAMS_FORMAT_Y12___U12___V12_N444 (0x0000007A) +#define NVC37E_SET_PARAMS_FORMAT_Y12___U12___V12_N420 (0x0000007B) +#define NVC37E_SET_PARAMS_COLOR_SPACE 9:8 +#define NVC37E_SET_PARAMS_COLOR_SPACE_RGB (0x00000000) +#define NVC37E_SET_PARAMS_COLOR_SPACE_YUV_601 (0x00000001) +#define NVC37E_SET_PARAMS_COLOR_SPACE_YUV_709 (0x00000002) +#define NVC37E_SET_PARAMS_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVC37E_SET_PARAMS_INPUT_RANGE 13:12 +#define NVC37E_SET_PARAMS_INPUT_RANGE_BYPASS (0x00000000) +#define NVC37E_SET_PARAMS_INPUT_RANGE_LIMITED (0x00000001) +#define NVC37E_SET_PARAMS_INPUT_RANGE_FULL (0x00000002) +#define NVC37E_SET_PARAMS_UNDERREPLICATE 16:16 +#define NVC37E_SET_PARAMS_UNDERREPLICATE_DISABLE (0x00000000) +#define NVC37E_SET_PARAMS_UNDERREPLICATE_ENABLE (0x00000001) +#define NVC37E_SET_PARAMS_DE_GAMMA 21:20 +#define NVC37E_SET_PARAMS_DE_GAMMA_NONE (0x00000000) +#define NVC37E_SET_PARAMS_DE_GAMMA_SRGB (0x00000001) +#define NVC37E_SET_PARAMS_DE_GAMMA_YUV8_10 (0x00000002) +#define NVC37E_SET_PARAMS_DE_GAMMA_YUV12 (0x00000003) +#define NVC37E_SET_PARAMS_CSC 17:17 +#define NVC37E_SET_PARAMS_CSC_DISABLE (0x00000000) +#define NVC37E_SET_PARAMS_CSC_ENABLE (0x00000001) +#define NVC37E_SET_PARAMS_CLAMP_BEFORE_BLEND 18:18 +#define NVC37E_SET_PARAMS_CLAMP_BEFORE_BLEND_DISABLE (0x00000000) +#define NVC37E_SET_PARAMS_CLAMP_BEFORE_BLEND_ENABLE (0x00000001) +#define NVC37E_SET_PARAMS_SWAP_UV 19:19 +#define NVC37E_SET_PARAMS_SWAP_UV_DISABLE (0x00000000) +#define NVC37E_SET_PARAMS_SWAP_UV_ENABLE (0x00000001) +#define NVC37E_SET_PLANAR_STORAGE(b) (0x00000230 + (b)*0x00000004) +#define NVC37E_SET_PLANAR_STORAGE_PITCH 12:0 +#define NVC37E_SET_CONTEXT_DMA_ISO(b) (0x00000240 + (b)*0x00000004) +#define NVC37E_SET_CONTEXT_DMA_ISO_HANDLE 31:0 +#define NVC37E_SET_OFFSET(b) (0x00000260 + (b)*0x00000004) +#define NVC37E_SET_OFFSET_ORIGIN 31:0 +#define NVC37E_SET_PROCESSING (0x00000280) +#define NVC37E_SET_PROCESSING_USE_GAIN_OFFSETS 0:0 +#define NVC37E_SET_PROCESSING_USE_GAIN_OFFSETS_DISABLE (0x00000000) +#define NVC37E_SET_PROCESSING_USE_GAIN_OFFSETS_ENABLE (0x00000001) +#define NVC37E_SET_CONVERSION_RED (0x00000284) +#define NVC37E_SET_CONVERSION_RED_GAIN 15:0 +#define NVC37E_SET_CONVERSION_RED_OFFSET 31:16 +#define NVC37E_SET_CONVERSION_GREEN (0x00000288) +#define NVC37E_SET_CONVERSION_GREEN_GAIN 15:0 +#define NVC37E_SET_CONVERSION_GREEN_OFFSET 31:16 +#define NVC37E_SET_CONVERSION_BLUE (0x0000028C) +#define NVC37E_SET_CONVERSION_BLUE_GAIN 15:0 +#define NVC37E_SET_CONVERSION_BLUE_OFFSET 31:16 +#define NVC37E_SET_POINT_IN(b) (0x00000290 + (b)*0x00000004) +#define NVC37E_SET_POINT_IN_X 15:0 +#define NVC37E_SET_POINT_IN_Y 31:16 +#define NVC37E_SET_SIZE_IN (0x00000298) +#define NVC37E_SET_SIZE_IN_WIDTH 14:0 +#define NVC37E_SET_SIZE_IN_HEIGHT 30:16 +#define NVC37E_SET_SIZE_OUT (0x000002A4) +#define NVC37E_SET_SIZE_OUT_WIDTH 14:0 +#define NVC37E_SET_SIZE_OUT_HEIGHT 30:16 +#define NVC37E_SET_CONTROL_INPUT_SCALER (0x000002A8) +#define NVC37E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC37E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC37E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC37E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC37E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC37E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC37E_SET_INPUT_SCALER_COEFF_VALUE (0x000002AC) +#define NVC37E_SET_INPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC37E_SET_INPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC37E_SET_CONTROL_INPUT_LUT (0x000002B0) +#define NVC37E_SET_CONTROL_INPUT_LUT_SIZE 1:0 +#define NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_257 (0x00000000) +#define NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_1025 (0x00000002) +#define NVC37E_SET_CONTROL_INPUT_LUT_RANGE 5:4 +#define NVC37E_SET_CONTROL_INPUT_LUT_RANGE_UNITY (0x00000000) +#define NVC37E_SET_CONTROL_INPUT_LUT_RANGE_XRBIAS (0x00000001) +#define NVC37E_SET_CONTROL_INPUT_LUT_RANGE_XVYCC (0x00000002) +#define NVC37E_SET_CONTROL_INPUT_LUT_OUTPUT_MODE 9:8 +#define NVC37E_SET_CONTROL_INPUT_LUT_OUTPUT_MODE_INDEX (0x00000000) +#define NVC37E_SET_CONTROL_INPUT_LUT_OUTPUT_MODE_INTERPOLATE (0x00000001) +#define NVC37E_SET_OFFSET_INPUT_LUT (0x000002B4) +#define NVC37E_SET_OFFSET_INPUT_LUT_ORIGIN 31:0 +#define NVC37E_SET_CONTEXT_DMA_INPUT_LUT (0x000002B8) +#define NVC37E_SET_CONTEXT_DMA_INPUT_LUT_HANDLE 31:0 +#define NVC37E_SET_CSC_RED2RED (0x000002BC) +#define NVC37E_SET_CSC_RED2RED_COEFF 18:0 +#define NVC37E_SET_CSC_GREEN2RED (0x000002C0) +#define NVC37E_SET_CSC_GREEN2RED_COEFF 18:0 +#define NVC37E_SET_CSC_BLUE2RED (0x000002C4) +#define NVC37E_SET_CSC_BLUE2RED_COEFF 18:0 +#define NVC37E_SET_CSC_CONSTANT2RED (0x000002C8) +#define NVC37E_SET_CSC_CONSTANT2RED_COEFF 18:0 +#define NVC37E_SET_CSC_RED2GREEN (0x000002CC) +#define NVC37E_SET_CSC_RED2GREEN_COEFF 18:0 +#define NVC37E_SET_CSC_GREEN2GREEN (0x000002D0) +#define NVC37E_SET_CSC_GREEN2GREEN_COEFF 18:0 +#define NVC37E_SET_CSC_BLUE2GREEN (0x000002D4) +#define NVC37E_SET_CSC_BLUE2GREEN_COEFF 18:0 +#define NVC37E_SET_CSC_CONSTANT2GREEN (0x000002D8) +#define NVC37E_SET_CSC_CONSTANT2GREEN_COEFF 18:0 +#define NVC37E_SET_CSC_RED2BLUE (0x000002DC) +#define NVC37E_SET_CSC_RED2BLUE_COEFF 18:0 +#define NVC37E_SET_CSC_GREEN2BLUE (0x000002E0) +#define NVC37E_SET_CSC_GREEN2BLUE_COEFF 18:0 +#define NVC37E_SET_CSC_BLUE2BLUE (0x000002E4) +#define NVC37E_SET_CSC_BLUE2BLUE_COEFF 18:0 +#define NVC37E_SET_CSC_CONSTANT2BLUE (0x000002E8) +#define NVC37E_SET_CSC_CONSTANT2BLUE_COEFF 18:0 +#define NVC37E_SET_COMPOSITION_CONTROL (0x000002EC) +#define NVC37E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVC37E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVC37E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVC37E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVC37E_SET_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVC37E_SET_COMPOSITION_CONSTANT_ALPHA (0x000002F0) +#define NVC37E_SET_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVC37E_SET_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT (0x000002F4) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC37E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC37E_SET_KEY_ALPHA (0x000002F8) +#define NVC37E_SET_KEY_ALPHA_MIN 15:0 +#define NVC37E_SET_KEY_ALPHA_MAX 31:16 +#define NVC37E_SET_KEY_RED_CR (0x000002FC) +#define NVC37E_SET_KEY_RED_CR_MIN 15:0 +#define NVC37E_SET_KEY_RED_CR_MAX 31:16 +#define NVC37E_SET_KEY_GREEN_Y (0x00000300) +#define NVC37E_SET_KEY_GREEN_Y_MIN 15:0 +#define NVC37E_SET_KEY_GREEN_Y_MAX 31:16 +#define NVC37E_SET_KEY_BLUE_CB (0x00000304) +#define NVC37E_SET_KEY_BLUE_CB_MIN 15:0 +#define NVC37E_SET_KEY_BLUE_CB_MAX 31:16 +#define NVC37E_SET_PRESENT_CONTROL (0x00000308) +#define NVC37E_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NVC37E_SET_PRESENT_CONTROL_BEGIN_MODE 6:4 +#define NVC37E_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000) +#define NVC37E_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001) +#define NVC37E_SET_PRESENT_CONTROL_TIMESTAMP_MODE 8:8 +#define NVC37E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_DISABLE (0x00000000) +#define NVC37E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_ENABLE (0x00000001) +#define NVC37E_SET_PRESENT_CONTROL_STEREO_MODE 13:12 +#define NVC37E_SET_PRESENT_CONTROL_STEREO_MODE_MONO (0x00000000) +#define NVC37E_SET_PRESENT_CONTROL_STEREO_MODE_PAIR_FLIP (0x00000001) +#define NVC37E_SET_PRESENT_CONTROL_STEREO_MODE_AT_ANY_FRAME (0x00000002) +#define NVC37E_SET_TIMESTAMP_ORIGIN_LO (0x00000340) +#define NVC37E_SET_TIMESTAMP_ORIGIN_LO_TIMESTAMP_LO 31:0 +#define NVC37E_SET_TIMESTAMP_ORIGIN_HI (0x00000344) +#define NVC37E_SET_TIMESTAMP_ORIGIN_HI_TIMESTAMP_HI 31:0 +#define NVC37E_SET_UPDATE_TIMESTAMP_LO (0x00000348) +#define NVC37E_SET_UPDATE_TIMESTAMP_LO_TIMESTAMP_LO 31:0 +#define NVC37E_SET_UPDATE_TIMESTAMP_HI (0x0000034C) +#define NVC37E_SET_UPDATE_TIMESTAMP_HI_TIMESTAMP_HI 31:0 +#define NVC37E_SET_INTERLOCK_FLAGS (0x00000370) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 0:0 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+1):((i)+1) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 1:1 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 2:2 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 3:3 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 4:4 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 5:5 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 6:6 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 7:7 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 8:8 +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC37E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS (0x00000374) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC37E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC37e_h diff --git a/userspace/sdks/nv570/inc/class/clc397.h b/userspace/sdks/nv570/inc/class/clc397.h new file mode 100644 index 0000000..2122c75 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc397.h @@ -0,0 +1,4219 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_volta_a_h_ +#define _cl_volta_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl volta_a */ + +#include "nvtypes.h" + +#define VOLTA_A 0xC397 + +#define NVC397_SET_OBJECT 0x0000 +#define NVC397_SET_OBJECT_CLASS_ID 15:0 +#define NVC397_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC397_NO_OPERATION 0x0100 +#define NVC397_NO_OPERATION_V 31:0 + +#define NVC397_SET_NOTIFY_A 0x0104 +#define NVC397_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC397_SET_NOTIFY_B 0x0108 +#define NVC397_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC397_NOTIFY 0x010c +#define NVC397_NOTIFY_TYPE 31:0 +#define NVC397_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC397_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC397_WAIT_FOR_IDLE 0x0110 +#define NVC397_WAIT_FOR_IDLE_V 31:0 + +#define NVC397_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVC397_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVC397_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVC397_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVC397_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVC397_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVC397_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVC397_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVC397_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVC397_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVC397_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVC397_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVC397_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVC397_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVC397_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVC397_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVC397_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVC397_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVC397_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC397_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC397_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC397_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC397_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC397_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC397_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC397_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC397_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC397_SEND_GO_IDLE 0x013c +#define NVC397_SEND_GO_IDLE_V 31:0 + +#define NVC397_PM_TRIGGER 0x0140 +#define NVC397_PM_TRIGGER_V 31:0 + +#define NVC397_PM_TRIGGER_WFI 0x0144 +#define NVC397_PM_TRIGGER_WFI_V 31:0 + +#define NVC397_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC397_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC397_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC397_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC397_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC397_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC397_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC397_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC397_LINE_LENGTH_IN 0x0180 +#define NVC397_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC397_LINE_COUNT 0x0184 +#define NVC397_LINE_COUNT_VALUE 31:0 + +#define NVC397_OFFSET_OUT_UPPER 0x0188 +#define NVC397_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVC397_OFFSET_OUT 0x018c +#define NVC397_OFFSET_OUT_VALUE 31:0 + +#define NVC397_PITCH_OUT 0x0190 +#define NVC397_PITCH_OUT_VALUE 31:0 + +#define NVC397_SET_DST_BLOCK_SIZE 0x0194 +#define NVC397_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC397_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC397_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC397_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC397_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC397_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC397_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC397_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC397_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC397_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC397_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC397_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC397_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC397_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC397_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC397_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC397_SET_DST_WIDTH 0x0198 +#define NVC397_SET_DST_WIDTH_V 31:0 + +#define NVC397_SET_DST_HEIGHT 0x019c +#define NVC397_SET_DST_HEIGHT_V 31:0 + +#define NVC397_SET_DST_DEPTH 0x01a0 +#define NVC397_SET_DST_DEPTH_V 31:0 + +#define NVC397_SET_DST_LAYER 0x01a4 +#define NVC397_SET_DST_LAYER_V 31:0 + +#define NVC397_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC397_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC397_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC397_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC397_LAUNCH_DMA 0x01b0 +#define NVC397_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC397_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC397_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC397_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC397_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC397_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC397_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC397_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC397_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC397_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC397_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC397_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC397_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC397_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC397_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC397_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC397_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC397_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC397_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC397_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC397_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC397_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC397_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC397_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC397_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC397_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC397_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC397_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC397_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC397_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC397_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC397_LOAD_INLINE_DATA 0x01b4 +#define NVC397_LOAD_INLINE_DATA_V 31:0 + +#define NVC397_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC397_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC397_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC397_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC397_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC397_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC397_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC397_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC397_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC397_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC397_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC397_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC397_RUN_DS_NOW 0x0200 +#define NVC397_RUN_DS_NOW_V 31:0 + +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVC397_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVC397_SET_GS_MODE 0x0208 +#define NVC397_SET_GS_MODE_TYPE 0:0 +#define NVC397_SET_GS_MODE_TYPE_ANY 0x00000000 +#define NVC397_SET_GS_MODE_TYPE_FAST_GS 0x00000001 + +#define NVC397_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVC397_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVC397_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVC397_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVC397_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVC397_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVC397_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVC397_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_GS_DM_FIFO 0x0214 +#define NVC397_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVC397_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVC397_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVC397_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVC397_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC397_INVALIDATE_SHADER_CACHES 0x021c +#define NVC397_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC397_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC397_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC397_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC397_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC397_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC397_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC397_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC397_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC397_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC397_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC397_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC397_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC397_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC397_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC397_SET_INSTANCE_COUNT 0x0220 +#define NVC397_SET_INSTANCE_COUNT_V 31:0 + +#define NVC397_SET_POSITION_W_SCALED_OFFSET_ENABLE 0x0224 +#define NVC397_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE 0:0 +#define NVC397_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_GO_IDLE_TIMEOUT 0x022c +#define NVC397_SET_GO_IDLE_TIMEOUT_V 31:0 + +#define NVC397_SET_MME_VERSION 0x0234 +#define NVC397_SET_MME_VERSION_MAJOR 7:0 + +#define NVC397_INCREMENT_SYNC_POINT 0x02c8 +#define NVC397_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVC397_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVC397_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVC397_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVC397_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVC397_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVC397_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVC397_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVC397_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVC397_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC397_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVC397_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVC397_DECOMPRESS_SURFACE 0x02e0 +#define NVC397_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVC397_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVC397_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVC397_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVC397_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVC397_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVC397_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVC397_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVC397_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVC397_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVC397_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVC397_SET_ZCULL_SUBREGION 0x02e8 +#define NVC397_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVC397_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVC397_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVC397_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVC397_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVC397_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVC397_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVC397_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVC397_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVC397_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVC397_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVC397_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVC397_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVC397_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVC397_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVC397_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVC397_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVC397_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVC397_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVC397_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVC397_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVC397_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVC397_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVC397_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVC397_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC397_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVC397_DRAW_ZERO_INDEX 0x0304 +#define NVC397_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVC397_SET_L1_CONFIGURATION 0x0308 +#define NVC397_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVC397_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVC397_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVC397_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVC397_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVC397_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVC397_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVC397_SET_SPA_VERSION 0x0310 +#define NVC397_SET_SPA_VERSION_MINOR 7:0 +#define NVC397_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC397_SET_SNAP_GRID_LINE 0x0318 +#define NVC397_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC397_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC397_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC397_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC397_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC397_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC397_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC397_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC397_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC397_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVC397_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC397_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC397_SET_SNAP_GRID_NON_LINE 0x031c +#define NVC397_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC397_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC397_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC397_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC397_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC397_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC397_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC397_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC397_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC397_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVC397_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC397_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC397_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVC397_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVC397_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVC397_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVC397_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVC397_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVC397_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVC397_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVC397_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVC397_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVC397_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVC397_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVC397_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVC397_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVC397_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVC397_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVC397_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVC397_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVC397_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVC397_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVC397_SET_TESSELLATION_LOD_V1 0x0330 +#define NVC397_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVC397_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVC397_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVC397_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVC397_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVC397_RESERVED_TG07 0x033c +#define NVC397_RESERVED_TG07_V 0:0 + +#define NVC397_RESERVED_TG08 0x0340 +#define NVC397_RESERVED_TG08_V 0:0 + +#define NVC397_RESERVED_TG09 0x0344 +#define NVC397_RESERVED_TG09_V 0:0 + +#define NVC397_RESERVED_TG10 0x0348 +#define NVC397_RESERVED_TG10_V 0:0 + +#define NVC397_RESERVED_TG11 0x034c +#define NVC397_RESERVED_TG11_V 0:0 + +#define NVC397_RESERVED_TG12 0x0350 +#define NVC397_RESERVED_TG12_V 0:0 + +#define NVC397_RESERVED_TG13 0x0354 +#define NVC397_RESERVED_TG13_V 0:0 + +#define NVC397_RESERVED_TG14 0x0358 +#define NVC397_RESERVED_TG14_V 0:0 + +#define NVC397_RESERVED_TG15 0x035c +#define NVC397_RESERVED_TG15_V 0:0 + +#define NVC397_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVC397_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVC397_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVC397_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVC397_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVC397_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVC397_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVC397_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVC397_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVC397_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVC397_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVC397_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVC397_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVC397_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVC397_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVC397_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVC397_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVC397_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVC397_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE 8:8 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE 9:9 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC397_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVC397_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVC397_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVC397_SET_RASTER_ENABLE 0x037c +#define NVC397_SET_RASTER_ENABLE_V 0:0 +#define NVC397_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVC397_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVC397_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVC397_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVC397_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVC397_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVC397_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVC397_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVC397_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVC397_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVC397_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVC397_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVC397_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVC397_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVC397_SET_POSITION_W_SCALED_OFFSET_SCALE_A(j) (0x0400+(j)*16) +#define NVC397_SET_POSITION_W_SCALED_OFFSET_SCALE_A_V 31:0 + +#define NVC397_SET_POSITION_W_SCALED_OFFSET_SCALE_B(j) (0x0404+(j)*16) +#define NVC397_SET_POSITION_W_SCALED_OFFSET_SCALE_B_V 31:0 + +#define NVC397_SET_POSITION_W_SCALED_OFFSET_RESERVED_A(j) (0x0408+(j)*16) +#define NVC397_SET_POSITION_W_SCALED_OFFSET_RESERVED_A_V 31:0 + +#define NVC397_SET_POSITION_W_SCALED_OFFSET_RESERVED_B(j) (0x040c+(j)*16) +#define NVC397_SET_POSITION_W_SCALED_OFFSET_RESERVED_B_V 31:0 + +#define NVC397_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVC397_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVC397_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVC397_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVC397_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVC397_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVC397_SET_RASTER_INPUT 0x0740 +#define NVC397_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVC397_SET_STREAM_OUTPUT 0x0744 +#define NVC397_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVC397_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVC397_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVC397_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVC397_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVC397_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVC397_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVC397_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 +#define NVC397_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES_EXTENDED 5:5 + +#define NVC397_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVC397_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC397_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC397_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVC397_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC397_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC397_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVC397_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVC397_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVC397_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVC397_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVC397_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVC397_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVC397_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC397_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVC397_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC397_SET_STENCIL_ZERO_BANDWIDTH_CLEAR 0x07b0 +#define NVC397_SET_STENCIL_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC397_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVC397_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVC397_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVC397_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVC397_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVC397_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVC397_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVC397_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVC397_SET_CULL_BEFORE_FETCH 0x07dc +#define NVC397_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVC397_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVC397_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVC397_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVC397_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVC397_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVC397_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVC397_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVC397_SET_ZCULL_STORAGE_A 0x07e8 +#define NVC397_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVC397_SET_ZCULL_STORAGE_B 0x07ec +#define NVC397_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVC397_SET_ZCULL_STORAGE_C 0x07f0 +#define NVC397_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC397_SET_ZCULL_STORAGE_D 0x07f4 +#define NVC397_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC397_SET_ZT_READ_ONLY 0x07f8 +#define NVC397_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVC397_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVC397_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVC397_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVC397_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVC397_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVC397_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVC397_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVC397_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVC397_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVC397_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVC397_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVC397_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVC397_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVC397_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVC397_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVC397_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVC397_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVC397_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVC397_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVC397_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVC397_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVC397_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVC397_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVC397_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVC397_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC397_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVC397_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVC397_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC397_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC397_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVC397_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC397_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVC397_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVC397_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVC397_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVC397_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVC397_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVC397_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVC397_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVC397_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVC397_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVC397_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVC397_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVC397_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVC397_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVC397_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVC397_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVC397_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVC397_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVC397_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE(j) (0x0a18+(j)*32) +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_X 2:0 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X 0x00000000 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X 0x00000001 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y 0x00000002 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y 0x00000003 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z 0x00000004 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z 0x00000005 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W 0x00000006 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W 0x00000007 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Y 6:4 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X 0x00000000 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X 0x00000001 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y 0x00000002 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y 0x00000003 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z 0x00000004 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z 0x00000005 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W 0x00000006 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W 0x00000007 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Z 10:8 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X 0x00000000 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X 0x00000001 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y 0x00000002 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y 0x00000003 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z 0x00000004 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z 0x00000005 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W 0x00000006 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W 0x00000007 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_W 14:12 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X 0x00000000 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X 0x00000001 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y 0x00000002 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y 0x00000003 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z 0x00000004 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z 0x00000005 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W 0x00000006 +#define NVC397_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W 0x00000007 + +#define NVC397_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(j) (0x0a1c+(j)*32) +#define NVC397_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_X_BITS 4:0 +#define NVC397_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_Y_BITS 12:8 + +#define NVC397_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVC397_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVC397_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC397_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVC397_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVC397_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC397_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVC397_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVC397_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVC397_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVC397_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVC397_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVC397_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVC397_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVC397_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVC397_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVC397_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVC397_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVC397_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVC397_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVC397_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVC397_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVC397_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVC397_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC397_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVC397_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVC397_SET_STATISTICS_COUNTER 0x0d68 +#define NVC397_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVC397_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVC397_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVC397_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVC397_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVC397_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVC397_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVC397_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVC397_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVC397_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVC397_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVC397_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVC397_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVC397_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVC397_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVC397_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVC397_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 +#define NVC397_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE 16:16 +#define NVC397_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVC397_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC397_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC397_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVC397_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC397_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC397_SET_VERTEX_ARRAY_START 0x0d74 +#define NVC397_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVC397_DRAW_VERTEX_ARRAY 0x0d78 +#define NVC397_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVC397_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVC397_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVC397_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVC397_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVC397_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVC397_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVC397_SET_Z_CLEAR_VALUE 0x0d90 +#define NVC397_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVC397_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC397_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC397_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC397_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC397_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVC397_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVC397_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVC397_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC397_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC397_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVC397_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVC397_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVC397_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVC397_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVC397_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVC397_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVC397_SET_FRONT_POLYGON_MODE 0x0dac +#define NVC397_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVC397_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC397_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC397_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC397_SET_BACK_POLYGON_MODE 0x0db0 +#define NVC397_SET_BACK_POLYGON_MODE_V 31:0 +#define NVC397_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC397_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC397_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC397_SET_POLY_SMOOTH 0x0db4 +#define NVC397_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVC397_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVC397_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVC397_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVC397_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVC397_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVC397_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVC397_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVC397_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVC397_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVC397_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVC397_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVC397_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVC397_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVC397_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVC397_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVC397_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVC397_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVC397_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_PATCH 0x0dcc +#define NVC397_SET_PATCH_SIZE 7:0 + +#define NVC397_SET_ITERATED_BLEND 0x0dd0 +#define NVC397_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVC397_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVC397_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVC397_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVC397_SET_ZCULL_CRITERION 0x0dd8 +#define NVC397_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVC397_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVC397_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVC397_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVC397_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVC397_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVC397_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVC397_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVC397_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVC397_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVC397_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVC397_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVC397_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVC397_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVC397_SET_ZCULL_CRITERION_SREF 23:16 +#define NVC397_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVC397_PIXEL_SHADER_BARRIER 0x0de0 +#define NVC397_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVC397_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVC397_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC397_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC397_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVC397_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVC397_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVC397_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVC397_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVC397_SET_WINDOW_OFFSET_X 0x0df8 +#define NVC397_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVC397_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVC397_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVC397_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVC397_SET_SCISSOR_ENABLE_V 0:0 +#define NVC397_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVC397_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVC397_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVC397_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVC397_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVC397_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVC397_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVC397_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVC397_SET_VPC_PERF_KNOB 0x0f14 +#define NVC397_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVC397_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVC397_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVC397_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVC397_PM_LOCAL_TRIGGER 0x0f18 +#define NVC397_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVC397_SET_POST_Z_PS_IMASK 0x0f1c +#define NVC397_SET_POST_Z_PS_IMASK_ENABLE 0:0 +#define NVC397_SET_POST_Z_PS_IMASK_ENABLE_FALSE 0x00000000 +#define NVC397_SET_POST_Z_PS_IMASK_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVC397_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVC397_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVC397_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVC397_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVC397_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVC397_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVC397_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVC397_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVC397_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVC397_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVC397_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVC397_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVC397_SET_BACK_STENCIL_MASK 0x0f58 +#define NVC397_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVC397_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVC397_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVC397_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVC397_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVC397_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVC397_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVC397_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVC397_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVC397_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVC397_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVC397_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVC397_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVC397_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC397_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVC397_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVC397_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVC397_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVC397_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVC397_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVC397_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVC397_SET_SAMPLE_MASK 0x0fa4 +#define NVC397_SET_SAMPLE_MASK_RASTER_OUT_ENABLE 0:0 +#define NVC397_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE 0x00000001 +#define NVC397_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE 4:4 +#define NVC397_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE 0x00000000 +#define NVC397_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_COLOR_TARGET_SAMPLE_MASK 0x0fa8 +#define NVC397_SET_COLOR_TARGET_SAMPLE_MASK_V 15:0 + +#define NVC397_SET_CT_MRT_ENABLE 0x0fac +#define NVC397_SET_CT_MRT_ENABLE_V 0:0 +#define NVC397_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVC397_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVC397_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVC397_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVC397_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVC397_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVC397_SET_TIR 0x0fb4 +#define NVC397_SET_TIR_MODE 1:0 +#define NVC397_SET_TIR_MODE_DISABLED 0x00000000 +#define NVC397_SET_TIR_MODE_RASTER_N_TARGET_M 0x00000001 + +#define NVC397_SET_ANTI_ALIAS_RASTER 0x0fb8 +#define NVC397_SET_ANTI_ALIAS_RASTER_SAMPLES 2:0 +#define NVC397_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1 0x00000000 +#define NVC397_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2 0x00000002 +#define NVC397_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC397_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC397_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4 0x00000006 + +#define NVC397_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVC397_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVC397_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVC397_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVC397_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVC397_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVC397_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVC397_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVC397_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVC397_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVC397_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_TIR_MODULATION 0x0fd4 +#define NVC397_SET_TIR_MODULATION_COMPONENT_SELECT 1:0 +#define NVC397_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION 0x00000000 +#define NVC397_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB 0x00000001 +#define NVC397_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY 0x00000002 +#define NVC397_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA 0x00000003 + +#define NVC397_SET_TIR_MODULATION_FUNCTION 0x0fd8 +#define NVC397_SET_TIR_MODULATION_FUNCTION_SELECT 0:0 +#define NVC397_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR 0x00000000 +#define NVC397_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE 0x00000001 + +#define NVC397_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVC397_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVC397_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVC397_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVC397_SET_ZT_A 0x0fe0 +#define NVC397_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_ZT_B 0x0fe4 +#define NVC397_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_ZT_FORMAT 0x0fe8 +#define NVC397_SET_ZT_FORMAT_V 4:0 +#define NVC397_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVC397_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVC397_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVC397_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVC397_SET_ZT_FORMAT_V_S8 0x00000017 +#define NVC397_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVC397_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVC397_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVC397_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVC397_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVC397_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVC397_SET_ZT_BLOCK_SIZE 0x0fec +#define NVC397_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVC397_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC397_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVC397_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC397_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC397_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC397_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC397_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC397_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC397_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVC397_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC397_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVC397_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVC397_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVC397_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVC397_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC397_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVC397_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVC397_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC397_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC397_SET_VIEWPORT_MULTICAST 0x1004 +#define NVC397_SET_VIEWPORT_MULTICAST_ORDER 0:0 +#define NVC397_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER 0x00000000 +#define NVC397_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER 0x00000001 + +#define NVC397_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVC397_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVC397_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVC397_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC397_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVC397_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVC397_SET_RESERVED_SW_METHOD00 0x1014 +#define NVC397_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC397_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVC397_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC397_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVC397_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC397_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVC397_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC397_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVC397_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC397_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_RESERVED_SW_METHOD01 0x1028 +#define NVC397_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD02 0x102c +#define NVC397_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC397_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) (0x1030+(i)*4) +#define NVC397_SET_TIR_MODULATION_COEFFICIENT_TABLE_V0 7:0 +#define NVC397_SET_TIR_MODULATION_COEFFICIENT_TABLE_V1 15:8 +#define NVC397_SET_TIR_MODULATION_COEFFICIENT_TABLE_V2 23:16 +#define NVC397_SET_TIR_MODULATION_COEFFICIENT_TABLE_V3 31:24 + +#define NVC397_SET_SPARE_NOOP01 0x1044 +#define NVC397_SET_SPARE_NOOP01_V 31:0 + +#define NVC397_SET_SPARE_NOOP02 0x1048 +#define NVC397_SET_SPARE_NOOP02_V 31:0 + +#define NVC397_SET_SPARE_NOOP03 0x104c +#define NVC397_SET_SPARE_NOOP03_V 31:0 + +#define NVC397_SET_SPARE_NOOP04 0x1050 +#define NVC397_SET_SPARE_NOOP04_V 31:0 + +#define NVC397_SET_SPARE_NOOP05 0x1054 +#define NVC397_SET_SPARE_NOOP05_V 31:0 + +#define NVC397_SET_SPARE_NOOP06 0x1058 +#define NVC397_SET_SPARE_NOOP06_V 31:0 + +#define NVC397_SET_SPARE_NOOP07 0x105c +#define NVC397_SET_SPARE_NOOP07_V 31:0 + +#define NVC397_SET_SPARE_NOOP08 0x1060 +#define NVC397_SET_SPARE_NOOP08_V 31:0 + +#define NVC397_SET_SPARE_NOOP09 0x1064 +#define NVC397_SET_SPARE_NOOP09_V 31:0 + +#define NVC397_SET_SPARE_NOOP10 0x1068 +#define NVC397_SET_SPARE_NOOP10_V 31:0 + +#define NVC397_SET_SPARE_NOOP11 0x106c +#define NVC397_SET_SPARE_NOOP11_V 31:0 + +#define NVC397_SET_SPARE_NOOP12 0x1070 +#define NVC397_SET_SPARE_NOOP12_V 31:0 + +#define NVC397_SET_SPARE_NOOP13 0x1074 +#define NVC397_SET_SPARE_NOOP13_V 31:0 + +#define NVC397_SET_SPARE_NOOP14 0x1078 +#define NVC397_SET_SPARE_NOOP14_V 31:0 + +#define NVC397_SET_SPARE_NOOP15 0x107c +#define NVC397_SET_SPARE_NOOP15_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVC397_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVC397_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVC397_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD06 0x10bc +#define NVC397_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVC397_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVC397_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVC397_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVC397_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVC397_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVC397_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVC397_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD13 0x10dc +#define NVC397_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC397_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVC397_UNBIND_ALL 0x10f4 +#define NVC397_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVC397_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVC397_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVC397_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVC397_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC397_SET_RESERVED_SW_METHOD14 0x1100 +#define NVC397_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC397_SET_RESERVED_SW_METHOD15 0x1104 +#define NVC397_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC397_NO_OPERATION_DATA_HI 0x110c +#define NVC397_NO_OPERATION_DATA_HI_V 31:0 + +#define NVC397_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVC397_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVC397_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVC397_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVC397_PM_TRIGGER_END 0x1114 +#define NVC397_PM_TRIGGER_END_V 31:0 + +#define NVC397_SET_VERTEX_ID_BASE 0x1118 +#define NVC397_SET_VERTEX_ID_BASE_V 31:0 + +#define NVC397_SET_STENCIL_COMPRESSION 0x111c +#define NVC397_SET_STENCIL_COMPRESSION_ENABLE 0:0 +#define NVC397_SET_STENCIL_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STENCIL_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC397_SET_TIR_CONTROL 0x1130 +#define NVC397_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES 0:0 +#define NVC397_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC397_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC397_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES 4:4 +#define NVC397_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC397_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC397_SET_TIR_CONTROL_REDUCE_COVERAGE 1:1 +#define NVC397_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE 0x00000000 +#define NVC397_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE 0x00000001 + +#define NVC397_SET_MUTABLE_METHOD_CONTROL 0x1134 +#define NVC397_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT 0:0 +#define NVC397_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE 0x00000000 +#define NVC397_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE 0x00000001 + +#define NVC397_SET_POST_PS_INITIAL_COVERAGE 0x1138 +#define NVC397_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE 0:0 +#define NVC397_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE 0x00000000 +#define NVC397_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE 0x00000001 + +#define NVC397_SET_FILL_VIA_TRIANGLE 0x113c +#define NVC397_SET_FILL_VIA_TRIANGLE_MODE 1:0 +#define NVC397_SET_FILL_VIA_TRIANGLE_MODE_DISABLED 0x00000000 +#define NVC397_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL 0x00000001 +#define NVC397_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX 0x00000002 + +#define NVC397_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVC397_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVC397_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVC397_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVC397_FLUSH_PENDING_WRITES 0x1144 +#define NVC397_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVC397_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVC397_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC397_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC397_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC397_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVC397_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC397_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC397_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC397_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) (0x11e0+(i)*4) +#define NVC397_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X0 3:0 +#define NVC397_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y0 7:4 +#define NVC397_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X1 11:8 +#define NVC397_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y1 15:12 +#define NVC397_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X2 19:16 +#define NVC397_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y2 23:20 +#define NVC397_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X3 27:24 +#define NVC397_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y3 31:28 + +#define NVC397_SET_OFFSET_RENDER_TARGET_INDEX 0x11f0 +#define NVC397_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX 0:0 +#define NVC397_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE 0x00000000 +#define NVC397_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE 0x00000001 + +#define NVC397_FORCE_HEAVYWEIGHT_METHOD_SYNC 0x11f4 +#define NVC397_FORCE_HEAVYWEIGHT_METHOD_SYNC_V 31:0 + +#define NVC397_SET_COVERAGE_TO_COLOR 0x11f8 +#define NVC397_SET_COVERAGE_TO_COLOR_ENABLE 0:0 +#define NVC397_SET_COVERAGE_TO_COLOR_ENABLE_FALSE 0x00000000 +#define NVC397_SET_COVERAGE_TO_COLOR_ENABLE_TRUE 0x00000001 +#define NVC397_SET_COVERAGE_TO_COLOR_CT_SELECT 6:4 + +#define NVC397_DECOMPRESS_ZETA_SURFACE 0x11fc +#define NVC397_DECOMPRESS_ZETA_SURFACE_Z_ENABLE 0:0 +#define NVC397_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC397_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC397_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE 4:4 +#define NVC397_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC397_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_SCREEN_STATE_MASK 0x1204 +#define NVC397_SET_SCREEN_STATE_MASK_MASK 3:0 + +#define NVC397_SET_ZT_SPARSE 0x1208 +#define NVC397_SET_ZT_SPARSE_ENABLE 0:0 +#define NVC397_SET_ZT_SPARSE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZT_SPARSE_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ZT_SPARSE_UNMAPPED_COMPARE 1:1 +#define NVC397_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 0x00000000 +#define NVC397_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS 0x00000001 + +#define NVC397_INVALIDATE_SAMPLER_CACHE_ALL 0x120c +#define NVC397_INVALIDATE_SAMPLER_CACHE_ALL_V 0:0 + +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_ALL 0x1210 +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_ALL_V 0:0 + +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC397_SET_CT_SELECT 0x121c +#define NVC397_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVC397_SET_CT_SELECT_TARGET0 6:4 +#define NVC397_SET_CT_SELECT_TARGET1 9:7 +#define NVC397_SET_CT_SELECT_TARGET2 12:10 +#define NVC397_SET_CT_SELECT_TARGET3 15:13 +#define NVC397_SET_CT_SELECT_TARGET4 18:16 +#define NVC397_SET_CT_SELECT_TARGET5 21:19 +#define NVC397_SET_CT_SELECT_TARGET6 24:22 +#define NVC397_SET_CT_SELECT_TARGET7 27:25 + +#define NVC397_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVC397_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL 0x1224 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE 1:0 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT 0x00000000 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE 0x00000001 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL 0x00000002 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE 2:2 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 0x00000000 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 0x00000001 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER 3:3 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED 0x00000000 +#define NVC397_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED 0x00000001 + +#define NVC397_SET_ZT_SIZE_A 0x1228 +#define NVC397_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVC397_SET_ZT_SIZE_B 0x122c +#define NVC397_SET_ZT_SIZE_B_HEIGHT 17:0 + +#define NVC397_SET_ZT_SIZE_C 0x1230 +#define NVC397_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVC397_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVC397_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC397_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVC397_SET_SAMPLER_BINDING 0x1234 +#define NVC397_SET_SAMPLER_BINDING_V 0:0 +#define NVC397_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVC397_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVC397_DRAW_AUTO 0x123c +#define NVC397_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVC397_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) (0x1240+(i)*4) +#define NVC397_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK_V 31:0 + +#define NVC397_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE 0x1260 +#define NVC397_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_INDEX 7:0 +#define NVC397_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_VALUE 23:8 + +#define NVC397_SET_BACK_END_COPY_A 0x1264 +#define NVC397_SET_BACK_END_COPY_A_DWORDS 7:0 +#define NVC397_SET_BACK_END_COPY_A_SATURATE32_ENABLE 8:8 +#define NVC397_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE 0x00000000 +#define NVC397_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE 0x00000001 +#define NVC397_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE 12:12 +#define NVC397_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE 0x00000000 +#define NVC397_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_BACK_END_COPY_B 0x1268 +#define NVC397_SET_BACK_END_COPY_B_SRC_ADDRESS_UPPER 7:0 + +#define NVC397_SET_BACK_END_COPY_C 0x126c +#define NVC397_SET_BACK_END_COPY_C_SRC_ADDRESS_LOWER 31:0 + +#define NVC397_SET_BACK_END_COPY_D 0x1270 +#define NVC397_SET_BACK_END_COPY_D_DEST_ADDRESS_UPPER 7:0 + +#define NVC397_SET_BACK_END_COPY_E 0x1274 +#define NVC397_SET_BACK_END_COPY_E_DEST_ADDRESS_LOWER 31:0 + +#define NVC397_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVC397_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 19:0 + +#define NVC397_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVC397_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVC397_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC397_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVC397_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVC397_CLEAR_ZCULL_REGION 0x12c8 +#define NVC397_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVC397_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVC397_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVC397_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVC397_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC397_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC397_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVC397_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC397_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC397_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVC397_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVC397_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVC397_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVC397_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVC397_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVC397_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVC397_SET_DEPTH_TEST 0x12cc +#define NVC397_SET_DEPTH_TEST_ENABLE 0:0 +#define NVC397_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVC397_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_FILL_MODE 0x12d0 +#define NVC397_SET_FILL_MODE_V 31:0 +#define NVC397_SET_FILL_MODE_V_POINT 0x00000001 +#define NVC397_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVC397_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVC397_SET_SHADE_MODE 0x12d4 +#define NVC397_SET_SHADE_MODE_V 31:0 +#define NVC397_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVC397_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVC397_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVC397_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC397_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC397_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVC397_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVC397_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVC397_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVC397_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVC397_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVC397_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVC397_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVC397_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_DEPTH_WRITE 0x12e8 +#define NVC397_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVC397_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_ALPHA_TEST 0x12ec +#define NVC397_SET_ALPHA_TEST_ENABLE 0:0 +#define NVC397_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVC397_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVC397_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVC397_DRAW_INLINE_INDEX4X8 0x1304 +#define NVC397_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVC397_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVC397_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVC397_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVC397_D3D_SET_CULL_MODE 0x1308 +#define NVC397_D3D_SET_CULL_MODE_V 31:0 +#define NVC397_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVC397_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVC397_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVC397_SET_DEPTH_FUNC 0x130c +#define NVC397_SET_DEPTH_FUNC_V 31:0 +#define NVC397_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVC397_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVC397_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC397_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC397_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVC397_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC397_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC397_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC397_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVC397_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVC397_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC397_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC397_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVC397_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC397_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC397_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC397_SET_ALPHA_REF 0x1310 +#define NVC397_SET_ALPHA_REF_V 31:0 + +#define NVC397_SET_ALPHA_FUNC 0x1314 +#define NVC397_SET_ALPHA_FUNC_V 31:0 +#define NVC397_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVC397_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVC397_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC397_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC397_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVC397_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC397_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC397_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC397_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVC397_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVC397_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC397_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC397_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVC397_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC397_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC397_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC397_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVC397_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVC397_SET_BLEND_CONST_RED 0x131c +#define NVC397_SET_BLEND_CONST_RED_V 31:0 + +#define NVC397_SET_BLEND_CONST_GREEN 0x1320 +#define NVC397_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVC397_SET_BLEND_CONST_BLUE 0x1324 +#define NVC397_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVC397_SET_BLEND_CONST_ALPHA 0x1328 +#define NVC397_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVC397_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC397_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC397_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC397_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC397_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC397_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC397_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVC397_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC397_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC397_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_BLEND_COLOR_OP 0x1340 +#define NVC397_SET_BLEND_COLOR_OP_V 31:0 +#define NVC397_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC397_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC397_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC397_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC397_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC397_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC397_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC397_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC397_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC397_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC397_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC397_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC397_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC397_SET_BLEND_ALPHA_OP 0x134c +#define NVC397_SET_BLEND_ALPHA_OP_V 31:0 +#define NVC397_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC397_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC397_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC397_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC397_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC397_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC397_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC397_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC397_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC397_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC397_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC397_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVC397_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVC397_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVC397_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC397_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC397_SET_SINGLE_ROP_CONTROL 0x135c +#define NVC397_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVC397_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC397_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_BLEND(i) (0x1360+(i)*4) +#define NVC397_SET_BLEND_ENABLE 0:0 +#define NVC397_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVC397_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_STENCIL_TEST 0x1380 +#define NVC397_SET_STENCIL_TEST_ENABLE 0:0 +#define NVC397_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC397_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_STENCIL_OP_FAIL 0x1384 +#define NVC397_SET_STENCIL_OP_FAIL_V 31:0 +#define NVC397_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC397_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC397_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC397_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC397_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC397_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC397_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC397_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC397_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC397_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC397_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC397_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC397_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC397_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC397_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC397_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC397_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVC397_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC397_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC397_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC397_SET_STENCIL_OP_ZPASS 0x138c +#define NVC397_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVC397_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC397_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC397_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC397_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC397_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC397_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC397_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC397_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC397_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC397_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC397_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC397_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC397_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC397_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC397_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC397_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC397_SET_STENCIL_FUNC 0x1390 +#define NVC397_SET_STENCIL_FUNC_V 31:0 +#define NVC397_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC397_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC397_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC397_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC397_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC397_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC397_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC397_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC397_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC397_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC397_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC397_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC397_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC397_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC397_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC397_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC397_SET_STENCIL_FUNC_REF 0x1394 +#define NVC397_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVC397_SET_STENCIL_FUNC_MASK 0x1398 +#define NVC397_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVC397_SET_STENCIL_MASK 0x139c +#define NVC397_SET_STENCIL_MASK_V 7:0 + +#define NVC397_SET_DRAW_AUTO_START 0x13a4 +#define NVC397_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVC397_SET_PS_SATURATE 0x13a8 +#define NVC397_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVC397_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVC397_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC397_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVC397_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVC397_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC397_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVC397_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVC397_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC397_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVC397_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVC397_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC397_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVC397_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVC397_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC397_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVC397_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVC397_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC397_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVC397_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVC397_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC397_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVC397_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVC397_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC397_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVC397_SET_WINDOW_ORIGIN 0x13ac +#define NVC397_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVC397_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVC397_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVC397_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVC397_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVC397_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVC397_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVC397_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC397_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVC397_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC397_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVC397_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVC397_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVC397_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC397_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC397_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC397_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC397_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC397_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC397_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVC397_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVC397_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVC397_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVC397_SET_PS_WARP_WATERMARKS 0x1450 +#define NVC397_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVC397_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVC397_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVC397_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVC397_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC397_STORE_ZCULL 0x1464 +#define NVC397_STORE_ZCULL_V 0:0 + +#define NVC397_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVC397_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVC397_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVC397_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVC397_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVC397_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVC397_LOAD_ZCULL 0x1500 +#define NVC397_LOAD_ZCULL_V 0:0 + +#define NVC397_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVC397_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVC397_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVC397_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC397_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC397_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVC397_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC397_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC397_SET_USER_CLIP_ENABLE 0x1510 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVC397_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVC397_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVC397_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVC397_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_POINT_SIZE 0x1518 +#define NVC397_SET_POINT_SIZE_V 31:0 + +#define NVC397_SET_ZCULL_STATS 0x151c +#define NVC397_SET_ZCULL_STATS_ENABLE 0:0 +#define NVC397_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_POINT_SPRITE 0x1520 +#define NVC397_SET_POINT_SPRITE_ENABLE 0:0 +#define NVC397_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC397_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC397_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC397_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC397_CLEAR_REPORT_VALUE 0x1530 +#define NVC397_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVC397_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVC397_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVC397_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVC397_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVC397_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVC397_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC397_CLEAR_REPORT_VALUE_TYPE_SCG_CLOCKS 0x00000009 + +#define NVC397_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVC397_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVC397_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVC397_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVC397_SET_ZT_SELECT 0x1538 +#define NVC397_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVC397_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVC397_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVC397_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVC397_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVC397_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVC397_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVC397_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVC397_SET_RENDER_ENABLE_A 0x1550 +#define NVC397_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_RENDER_ENABLE_B 0x1554 +#define NVC397_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_RENDER_ENABLE_C 0x1558 +#define NVC397_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC397_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC397_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC397_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC397_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC397_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC397_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC397_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC397_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC397_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC397_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVC397_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVC397_SET_ANTI_ALIASED_LINE 0x1570 +#define NVC397_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVC397_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC397_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC397_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_TEX_HEADER_POOL_C 0x157c +#define NVC397_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC397_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVC397_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVC397_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVC397_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVC397_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC397_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC397_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC397_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC397_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC397_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC397_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVC397_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVC397_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC397_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC397_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC397_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC397_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC397_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC397_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC397_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC397_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC397_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC397_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC397_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC397_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC397_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC397_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC397_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC397_SET_SRGB_WRITE 0x15b8 +#define NVC397_SET_SRGB_WRITE_ENABLE 0:0 +#define NVC397_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_DEPTH_BIAS 0x15bc +#define NVC397_SET_DEPTH_BIAS_V 31:0 + +#define NVC397_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVC397_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVC397_SET_RT_LAYER 0x15cc +#define NVC397_SET_RT_LAYER_V 15:0 +#define NVC397_SET_RT_LAYER_CONTROL 16:16 +#define NVC397_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVC397_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVC397_SET_ANTI_ALIAS 0x15d0 +#define NVC397_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVC397_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVC397_SET_EDGE_FLAG 0x15e4 +#define NVC397_SET_EDGE_FLAG_V 0:0 +#define NVC397_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVC397_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVC397_DRAW_INLINE_INDEX 0x15e8 +#define NVC397_DRAW_INLINE_INDEX_V 31:0 + +#define NVC397_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVC397_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVC397_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVC397_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVC397_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVC397_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVC397_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVC397_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVC397_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVC397_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVC397_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVC397_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVC397_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVC397_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVC397_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVC397_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVC397_SET_POINT_SPRITE_SELECT 0x1604 +#define NVC397_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVC397_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVC397_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVC397_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVC397_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVC397_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVC397_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVC397_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVC397_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVC397_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVC397_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVC397_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVC397_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVC397_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVC397_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVC397_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVC397_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVC397_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVC397_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVC397_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVC397_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVC397_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVC397_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVC397_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVC397_END 0x1614 +#define NVC397_END_V 0:0 + +#define NVC397_BEGIN 0x1618 +#define NVC397_BEGIN_OP 15:0 +#define NVC397_BEGIN_OP_POINTS 0x00000000 +#define NVC397_BEGIN_OP_LINES 0x00000001 +#define NVC397_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVC397_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVC397_BEGIN_OP_TRIANGLES 0x00000004 +#define NVC397_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVC397_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVC397_BEGIN_OP_QUADS 0x00000007 +#define NVC397_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVC397_BEGIN_OP_POLYGON 0x00000009 +#define NVC397_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVC397_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVC397_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_BEGIN_OP_PATCH 0x0000000E +#define NVC397_BEGIN_PRIMITIVE_ID 24:24 +#define NVC397_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC397_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC397_BEGIN_INSTANCE_ID 27:26 +#define NVC397_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVC397_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC397_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC397_BEGIN_SPLIT_MODE 30:29 +#define NVC397_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC397_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC397_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC397_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC397_BEGIN_INSTANCE_ITERATE_ENABLE 31:31 +#define NVC397_BEGIN_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC397_BEGIN_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_VERTEX_ID_COPY 0x161c +#define NVC397_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVC397_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVC397_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVC397_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVC397_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVC397_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVC397_LOAD_PRIMITIVE_ID 0x1624 +#define NVC397_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVC397_SET_SHADER_BASED_CULL 0x162c +#define NVC397_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVC397_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVC397_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVC397_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVC397_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVC397_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_CLASS_VERSION 0x1638 +#define NVC397_SET_CLASS_VERSION_CURRENT 15:0 +#define NVC397_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC397_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVC397_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVC397_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVC397_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVC397_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVC397_SET_DA_OUTPUT 0x164c +#define NVC397_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVC397_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVC397_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVC397_SET_ANTI_ALIASED_POINT 0x1658 +#define NVC397_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVC397_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_POINT_CENTER_MODE 0x165c +#define NVC397_SET_POINT_CENTER_MODE_V 31:0 +#define NVC397_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVC397_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVC397_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVC397_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVC397_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVC397_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVC397_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVC397_SET_LINE_STIPPLE 0x166c +#define NVC397_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVC397_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVC397_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVC397_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVC397_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVC397_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVC397_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVC397_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVC397_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVC397_SET_PROVOKING_VERTEX 0x1684 +#define NVC397_SET_PROVOKING_VERTEX_V 0:0 +#define NVC397_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVC397_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVC397_SET_TWO_SIDED_LIGHT 0x1688 +#define NVC397_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVC397_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_POLYGON_STIPPLE 0x168c +#define NVC397_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVC397_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_SHADER_CONTROL 0x1690 +#define NVC397_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVC397_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVC397_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVC397_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVC397_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVC397_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVC397_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVC397_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVC397_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVC397_CHECK_CLASS_VERSION 0x16a0 +#define NVC397_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVC397_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC397_SET_SPH_VERSION 0x16a4 +#define NVC397_SET_SPH_VERSION_CURRENT 15:0 +#define NVC397_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC397_CHECK_SPH_VERSION 0x16a8 +#define NVC397_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVC397_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC397_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVC397_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVC397_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC397_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVC397_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVC397_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVC397_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVC397_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVC397_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVC397_SET_AAM_VERSION 0x1790 +#define NVC397_SET_AAM_VERSION_CURRENT 15:0 +#define NVC397_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC397_CHECK_AAM_VERSION 0x1794 +#define NVC397_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVC397_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC397_SET_ZT_LAYER 0x179c +#define NVC397_SET_ZT_LAYER_OFFSET 15:0 + +#define NVC397_SET_INDEX_BUFFER_A 0x17c8 +#define NVC397_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVC397_SET_INDEX_BUFFER_B 0x17cc +#define NVC397_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVC397_SET_INDEX_BUFFER_C 0x17d0 +#define NVC397_SET_INDEX_BUFFER_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC397_SET_INDEX_BUFFER_D 0x17d4 +#define NVC397_SET_INDEX_BUFFER_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC397_SET_INDEX_BUFFER_E 0x17d8 +#define NVC397_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVC397_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVC397_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVC397_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVC397_SET_INDEX_BUFFER_F 0x17dc +#define NVC397_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVC397_DRAW_INDEX_BUFFER 0x17e0 +#define NVC397_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC397_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVC397_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVC397_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVC397_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVC397_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVC397_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVC397_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVC397_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVC397_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVC397_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVC397_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVC397_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVC397_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVC397_OGL_SET_CULL 0x1918 +#define NVC397_OGL_SET_CULL_ENABLE 0:0 +#define NVC397_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVC397_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVC397_OGL_SET_FRONT_FACE 0x191c +#define NVC397_OGL_SET_FRONT_FACE_V 31:0 +#define NVC397_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVC397_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVC397_OGL_SET_CULL_FACE 0x1920 +#define NVC397_OGL_SET_CULL_FACE_V 31:0 +#define NVC397_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVC397_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVC397_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVC397_SET_VIEWPORT_PIXEL 0x1924 +#define NVC397_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVC397_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVC397_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVC397_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVC397_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVC397_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVC397_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE 17:16 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_USE_FIELD_MIN_Z_ZERO_MAX_Z_ONE 0x00000000 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MIN_Z_MAX_Z 0x00000001 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_ZERO_ONE 0x00000002 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MINUS_INF_PLUS_INF 0x00000003 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP 0x00000006 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVC397_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVC397_SET_USER_CLIP_OP 0x1940 +#define NVC397_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVC397_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVC397_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVC397_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVC397_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVC397_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVC397_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVC397_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVC397_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVC397_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVC397_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVC397_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVC397_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVC397_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVC397_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVC397_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVC397_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVC397_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVC397_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVC397_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVC397_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVC397_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVC397_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVC397_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVC397_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC397_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC397_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC397_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC397_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC397_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVC397_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVC397_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVC397_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVC397_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVC397_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVC397_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVC397_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVC397_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVC397_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVC397_INVALIDATE_ZCULL 0x1958 +#define NVC397_INVALIDATE_ZCULL_V 31:0 +#define NVC397_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVC397_SET_ZCULL 0x1968 +#define NVC397_SET_ZCULL_Z_ENABLE 0:0 +#define NVC397_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVC397_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_ZCULL_BOUNDS 0x196c +#define NVC397_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVC397_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVC397_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVC397_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC397_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVC397_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVC397_ZCULL_SYNC 0x1978 +#define NVC397_ZCULL_SYNC_V 31:0 + +#define NVC397_SET_CLIP_ID_TEST 0x197c +#define NVC397_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVC397_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVC397_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVC397_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVC397_SET_CLIP_ID 0x1984 +#define NVC397_SET_CLIP_ID_V 31:0 + +#define NVC397_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVC397_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVC397_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVC397_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVC397_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVC397_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVC397_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVC397_SET_LOGIC_OP 0x19c4 +#define NVC397_SET_LOGIC_OP_ENABLE 0:0 +#define NVC397_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVC397_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_LOGIC_OP_FUNC 0x19c8 +#define NVC397_SET_LOGIC_OP_FUNC_V 31:0 +#define NVC397_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVC397_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVC397_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVC397_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVC397_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVC397_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVC397_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVC397_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVC397_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVC397_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVC397_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVC397_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVC397_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVC397_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVC397_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVC397_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVC397_SET_Z_COMPRESSION 0x19cc +#define NVC397_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVC397_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC397_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC397_CLEAR_SURFACE 0x19d0 +#define NVC397_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVC397_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC397_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC397_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVC397_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC397_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC397_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVC397_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVC397_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVC397_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVC397_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVC397_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVC397_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVC397_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVC397_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVC397_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVC397_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVC397_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVC397_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVC397_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVC397_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVC397_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVC397_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVC397_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVC397_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC397_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVC397_SET_CT_WRITE_R_ENABLE 0:0 +#define NVC397_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVC397_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVC397_SET_CT_WRITE_G_ENABLE 4:4 +#define NVC397_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVC397_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVC397_SET_CT_WRITE_B_ENABLE 8:8 +#define NVC397_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVC397_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVC397_SET_CT_WRITE_A_ENABLE 12:12 +#define NVC397_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVC397_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVC397_PIPE_NOP 0x1a2c +#define NVC397_PIPE_NOP_V 31:0 + +#define NVC397_SET_SPARE00 0x1a30 +#define NVC397_SET_SPARE00_V 31:0 + +#define NVC397_SET_SPARE01 0x1a34 +#define NVC397_SET_SPARE01_V 31:0 + +#define NVC397_SET_SPARE02 0x1a38 +#define NVC397_SET_SPARE02_V 31:0 + +#define NVC397_SET_SPARE03 0x1a3c +#define NVC397_SET_SPARE03_V 31:0 + +#define NVC397_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC397_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC397_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC397_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC397_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC397_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC397_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVC397_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC397_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVC397_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVC397_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVC397_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVC397_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVC397_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC397_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_SCG_CLOCKS 0x00000008 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVC397_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC397_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVC397_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVC397_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC397_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC397_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVC397_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVC397_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVC397_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVC397_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVC397_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVC397_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVC397_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVC397_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVC397_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVC397_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVC397_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC397_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVC397_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC397_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVC397_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC397_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVC397_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVC397_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVC397_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC397_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC397_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC397_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC397_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC397_SET_VERTEX_STREAM_LIMIT_A_A(j) (0x1f00+(j)*8) +#define NVC397_SET_VERTEX_STREAM_LIMIT_A_A_UPPER 7:0 + +#define NVC397_SET_VERTEX_STREAM_LIMIT_A_B(j) (0x1f04+(j)*8) +#define NVC397_SET_VERTEX_STREAM_LIMIT_A_B_LOWER 31:0 + +#define NVC397_SET_VERTEX_STREAM_LIMIT_B_A(j) (0x1f80+(j)*8) +#define NVC397_SET_VERTEX_STREAM_LIMIT_B_A_UPPER 7:0 + +#define NVC397_SET_VERTEX_STREAM_LIMIT_B_B(j) (0x1f84+(j)*8) +#define NVC397_SET_VERTEX_STREAM_LIMIT_B_B_LOWER 31:0 + +#define NVC397_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVC397_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVC397_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVC397_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVC397_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVC397_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVC397_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVC397_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVC397_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVC397_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVC397_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVC397_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVC397_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVC397_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVC397_SET_PIPELINE_REGISTER_COUNT_V 8:0 + +#define NVC397_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVC397_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVC397_SET_PIPELINE_PROGRAM_ADDRESS_A(j) (0x2014+(j)*64) +#define NVC397_SET_PIPELINE_PROGRAM_ADDRESS_A_UPPER 7:0 + +#define NVC397_SET_PIPELINE_PROGRAM_ADDRESS_B(j) (0x2018+(j)*64) +#define NVC397_SET_PIPELINE_PROGRAM_ADDRESS_B_LOWER 31:0 + +#define NVC397_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NVC397_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NVC397_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVC397_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVC397_SET_FALCON00 0x2300 +#define NVC397_SET_FALCON00_V 31:0 + +#define NVC397_SET_FALCON01 0x2304 +#define NVC397_SET_FALCON01_V 31:0 + +#define NVC397_SET_FALCON02 0x2308 +#define NVC397_SET_FALCON02_V 31:0 + +#define NVC397_SET_FALCON03 0x230c +#define NVC397_SET_FALCON03_V 31:0 + +#define NVC397_SET_FALCON04 0x2310 +#define NVC397_SET_FALCON04_V 31:0 + +#define NVC397_SET_FALCON05 0x2314 +#define NVC397_SET_FALCON05_V 31:0 + +#define NVC397_SET_FALCON06 0x2318 +#define NVC397_SET_FALCON06_V 31:0 + +#define NVC397_SET_FALCON07 0x231c +#define NVC397_SET_FALCON07_V 31:0 + +#define NVC397_SET_FALCON08 0x2320 +#define NVC397_SET_FALCON08_V 31:0 + +#define NVC397_SET_FALCON09 0x2324 +#define NVC397_SET_FALCON09_V 31:0 + +#define NVC397_SET_FALCON10 0x2328 +#define NVC397_SET_FALCON10_V 31:0 + +#define NVC397_SET_FALCON11 0x232c +#define NVC397_SET_FALCON11_V 31:0 + +#define NVC397_SET_FALCON12 0x2330 +#define NVC397_SET_FALCON12_V 31:0 + +#define NVC397_SET_FALCON13 0x2334 +#define NVC397_SET_FALCON13_V 31:0 + +#define NVC397_SET_FALCON14 0x2338 +#define NVC397_SET_FALCON14_V 31:0 + +#define NVC397_SET_FALCON15 0x233c +#define NVC397_SET_FALCON15_V 31:0 + +#define NVC397_SET_FALCON16 0x2340 +#define NVC397_SET_FALCON16_V 31:0 + +#define NVC397_SET_FALCON17 0x2344 +#define NVC397_SET_FALCON17_V 31:0 + +#define NVC397_SET_FALCON18 0x2348 +#define NVC397_SET_FALCON18_V 31:0 + +#define NVC397_SET_FALCON19 0x234c +#define NVC397_SET_FALCON19_V 31:0 + +#define NVC397_SET_FALCON20 0x2350 +#define NVC397_SET_FALCON20_V 31:0 + +#define NVC397_SET_FALCON21 0x2354 +#define NVC397_SET_FALCON21_V 31:0 + +#define NVC397_SET_FALCON22 0x2358 +#define NVC397_SET_FALCON22_V 31:0 + +#define NVC397_SET_FALCON23 0x235c +#define NVC397_SET_FALCON23_V 31:0 + +#define NVC397_SET_FALCON24 0x2360 +#define NVC397_SET_FALCON24_V 31:0 + +#define NVC397_SET_FALCON25 0x2364 +#define NVC397_SET_FALCON25_V 31:0 + +#define NVC397_SET_FALCON26 0x2368 +#define NVC397_SET_FALCON26_V 31:0 + +#define NVC397_SET_FALCON27 0x236c +#define NVC397_SET_FALCON27_V 31:0 + +#define NVC397_SET_FALCON28 0x2370 +#define NVC397_SET_FALCON28_V 31:0 + +#define NVC397_SET_FALCON29 0x2374 +#define NVC397_SET_FALCON29_V 31:0 + +#define NVC397_SET_FALCON30 0x2378 +#define NVC397_SET_FALCON30_V 31:0 + +#define NVC397_SET_FALCON31 0x237c +#define NVC397_SET_FALCON31_V 31:0 + +#define NVC397_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVC397_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVC397_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVC397_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVC397_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVC397_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVC397_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVC397_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVC397_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVC397_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVC397_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVC397_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVC397_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVC397_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVC397_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVC397_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVC397_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVC397_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVC397_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVC397_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVC397_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVC397_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVC397_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVC397_SET_TRAP_HANDLER_A 0x25f8 +#define NVC397_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC397_SET_TRAP_HANDLER_B 0x25fc +#define NVC397_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC397_SET_COLOR_CLAMP 0x2600 +#define NVC397_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVC397_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVC397_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVC397_SET_BINDLESS_TEXTURE 0x2608 +#define NVC397_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 4:0 + +#define NVC397_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVC397_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVC397_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVC397_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVC397_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVC397_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC397_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC397_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC397_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC397_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC397_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC397_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC397_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC397_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC397_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC397_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC397_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC397_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC397_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC397_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVC397_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVC397_CALL_MME_MACRO_V 31:0 + +#define NVC397_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVC397_CALL_MME_DATA_V 31:0 + +#endif /* _cl_volta_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc3b0.h b/userspace/sdks/nv570/inc/class/clc3b0.h new file mode 100644 index 0000000..5ccaedd --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc3b0.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _clc3b0_h_ +#define _clc3b0_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC3B0_VIDEO_DECODER (0x0000C3B0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc3b0_h + diff --git a/userspace/sdks/nv570/inc/class/clc3b5.h b/userspace/sdks/nv570/inc/class/clc3b5.h new file mode 100644 index 0000000..74ee1b7 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc3b5.h @@ -0,0 +1,278 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#include "nvtypes.h" + +#ifndef _clc3b5_h_ +#define _clc3b5_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define VOLTA_DMA_COPY_A (0x0000C3B5) + +#define NVC3B5_NOP (0x00000100) +#define NVC3B5_NOP_PARAMETER 31:0 +#define NVC3B5_PM_TRIGGER (0x00000140) +#define NVC3B5_PM_TRIGGER_V 31:0 +#define NVC3B5_SET_SEMAPHORE_A (0x00000240) +#define NVC3B5_SET_SEMAPHORE_A_UPPER 16:0 +#define NVC3B5_SET_SEMAPHORE_B (0x00000244) +#define NVC3B5_SET_SEMAPHORE_B_LOWER 31:0 +#define NVC3B5_SET_SEMAPHORE_PAYLOAD (0x00000248) +#define NVC3B5_SET_SEMAPHORE_PAYLOAD_PAYLOAD 31:0 +#define NVC3B5_SET_RENDER_ENABLE_A (0x00000254) +#define NVC3B5_SET_RENDER_ENABLE_A_UPPER 7:0 +#define NVC3B5_SET_RENDER_ENABLE_B (0x00000258) +#define NVC3B5_SET_RENDER_ENABLE_B_LOWER 31:0 +#define NVC3B5_SET_RENDER_ENABLE_C (0x0000025C) +#define NVC3B5_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC3B5_SET_RENDER_ENABLE_C_MODE_FALSE (0x00000000) +#define NVC3B5_SET_RENDER_ENABLE_C_MODE_TRUE (0x00000001) +#define NVC3B5_SET_RENDER_ENABLE_C_MODE_CONDITIONAL (0x00000002) +#define NVC3B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL (0x00000003) +#define NVC3B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL (0x00000004) +#define NVC3B5_SET_SRC_PHYS_MODE (0x00000260) +#define NVC3B5_SET_SRC_PHYS_MODE_TARGET 1:0 +#define NVC3B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC3B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC3B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC3B5_SET_SRC_PHYS_MODE_BASIC_KIND 5:2 +#define NVC3B5_SET_DST_PHYS_MODE (0x00000264) +#define NVC3B5_SET_DST_PHYS_MODE_TARGET 1:0 +#define NVC3B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC3B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC3B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC3B5_SET_DST_PHYS_MODE_BASIC_KIND 5:2 +#define NVC3B5_LAUNCH_DMA (0x00000300) +#define NVC3B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVC3B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVC3B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVC3B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVC3B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 +#define NVC3B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) +#define NVC3B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) +#define NVC3B5_LAUNCH_DMA_FLUSH_TYPE 25:25 +#define NVC3B5_LAUNCH_DMA_FLUSH_TYPE_SYS (0x00000000) +#define NVC3B5_LAUNCH_DMA_FLUSH_TYPE_GL (0x00000001) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_TYPE_NONE (0x00000000) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_FOUR_WORD_SEMAPHORE (0x00000002) +#define NVC3B5_LAUNCH_DMA_INTERRUPT_TYPE 6:5 +#define NVC3B5_LAUNCH_DMA_INTERRUPT_TYPE_NONE (0x00000000) +#define NVC3B5_LAUNCH_DMA_INTERRUPT_TYPE_BLOCKING (0x00000001) +#define NVC3B5_LAUNCH_DMA_INTERRUPT_TYPE_NON_BLOCKING (0x00000002) +#define NVC3B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 +#define NVC3B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC3B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC3B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 +#define NVC3B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC3B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC3B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 +#define NVC3B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) +#define NVC3B5_LAUNCH_DMA_MULTI_LINE_ENABLE_TRUE (0x00000001) +#define NVC3B5_LAUNCH_DMA_REMAP_ENABLE 10:10 +#define NVC3B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) +#define NVC3B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) +#define NVC3B5_LAUNCH_DMA_FORCE_RMWDISABLE 11:11 +#define NVC3B5_LAUNCH_DMA_FORCE_RMWDISABLE_FALSE (0x00000000) +#define NVC3B5_LAUNCH_DMA_FORCE_RMWDISABLE_TRUE (0x00000001) +#define NVC3B5_LAUNCH_DMA_SRC_TYPE 12:12 +#define NVC3B5_LAUNCH_DMA_SRC_TYPE_VIRTUAL (0x00000000) +#define NVC3B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) +#define NVC3B5_LAUNCH_DMA_DST_TYPE 13:13 +#define NVC3B5_LAUNCH_DMA_DST_TYPE_VIRTUAL (0x00000000) +#define NVC3B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION 17:14 +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMIN (0x00000000) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMAX (0x00000001) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IXOR (0x00000002) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IAND (0x00000003) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IOR (0x00000004) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IADD (0x00000005) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INC (0x00000006) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_DEC (0x00000007) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FADD (0x0000000A) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN 18:18 +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_SIGNED (0x00000000) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_UNSIGNED (0x00000001) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE 19:19 +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_FALSE (0x00000000) +#define NVC3B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_TRUE (0x00000001) +#define NVC3B5_LAUNCH_DMA_SRC_BYPASS_L2 20:20 +#define NVC3B5_LAUNCH_DMA_SRC_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVC3B5_LAUNCH_DMA_SRC_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVC3B5_LAUNCH_DMA_DST_BYPASS_L2 21:21 +#define NVC3B5_LAUNCH_DMA_DST_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVC3B5_LAUNCH_DMA_DST_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVC3B5_LAUNCH_DMA_VPRMODE 23:22 +#define NVC3B5_LAUNCH_DMA_VPRMODE_VPR_NONE (0x00000000) +#define NVC3B5_LAUNCH_DMA_VPRMODE_VPR_VID2VID (0x00000001) +#define NVC3B5_LAUNCH_DMA_RESERVED_START_OF_COPY 24:24 +#define NVC3B5_LAUNCH_DMA_RESERVED_ERR_CODE 31:28 +#define NVC3B5_OFFSET_IN_UPPER (0x00000400) +#define NVC3B5_OFFSET_IN_UPPER_UPPER 16:0 +#define NVC3B5_OFFSET_IN_LOWER (0x00000404) +#define NVC3B5_OFFSET_IN_LOWER_VALUE 31:0 +#define NVC3B5_OFFSET_OUT_UPPER (0x00000408) +#define NVC3B5_OFFSET_OUT_UPPER_UPPER 16:0 +#define NVC3B5_OFFSET_OUT_LOWER (0x0000040C) +#define NVC3B5_OFFSET_OUT_LOWER_VALUE 31:0 +#define NVC3B5_PITCH_IN (0x00000410) +#define NVC3B5_PITCH_IN_VALUE 31:0 +#define NVC3B5_PITCH_OUT (0x00000414) +#define NVC3B5_PITCH_OUT_VALUE 31:0 +#define NVC3B5_LINE_LENGTH_IN (0x00000418) +#define NVC3B5_LINE_LENGTH_IN_VALUE 31:0 +#define NVC3B5_LINE_COUNT (0x0000041C) +#define NVC3B5_LINE_COUNT_VALUE 31:0 +#define NVC3B5_SET_REMAP_CONST_A (0x00000700) +#define NVC3B5_SET_REMAP_CONST_A_V 31:0 +#define NVC3B5_SET_REMAP_CONST_B (0x00000704) +#define NVC3B5_SET_REMAP_CONST_B_V 31:0 +#define NVC3B5_SET_REMAP_COMPONENTS (0x00000708) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_X 2:0 +#define NVC3B5_SET_REMAP_COMPONENTS_DST_X_SRC_X (0x00000000) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_X_SRC_Y (0x00000001) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_X_SRC_Z (0x00000002) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_X_SRC_W (0x00000003) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_X_NO_WRITE (0x00000006) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Y 6:4 +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Y_SRC_X (0x00000000) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Y (0x00000001) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Z (0x00000002) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Y_SRC_W (0x00000003) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Y_CONST_A (0x00000004) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Y_NO_WRITE (0x00000006) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Z 10:8 +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Z_SRC_X (0x00000000) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Y (0x00000001) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Z (0x00000002) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Z_SRC_W (0x00000003) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Z_CONST_A (0x00000004) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Z_CONST_B (0x00000005) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_Z_NO_WRITE (0x00000006) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_W 14:12 +#define NVC3B5_SET_REMAP_COMPONENTS_DST_W_SRC_X (0x00000000) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_W_SRC_Y (0x00000001) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_W_SRC_Z (0x00000002) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_W_SRC_W (0x00000003) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_W_CONST_A (0x00000004) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_W_CONST_B (0x00000005) +#define NVC3B5_SET_REMAP_COMPONENTS_DST_W_NO_WRITE (0x00000006) +#define NVC3B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 +#define NVC3B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) +#define NVC3B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_TWO (0x00000001) +#define NVC3B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_THREE (0x00000002) +#define NVC3B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS 21:20 +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_ONE (0x00000000) +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_TWO (0x00000001) +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_THREE (0x00000002) +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_FOUR (0x00000003) +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_THREE (0x00000002) +#define NVC3B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_FOUR (0x00000003) +#define NVC3B5_SET_DST_BLOCK_SIZE (0x0000070C) +#define NVC3B5_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC3B5_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC3B5_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC3B5_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC3B5_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC3B5_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC3B5_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC3B5_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC3B5_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC3B5_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC3B5_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC3B5_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC3B5_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC3B5_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC3B5_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC3B5_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC3B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC3B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC3B5_SET_DST_WIDTH (0x00000710) +#define NVC3B5_SET_DST_WIDTH_V 31:0 +#define NVC3B5_SET_DST_HEIGHT (0x00000714) +#define NVC3B5_SET_DST_HEIGHT_V 31:0 +#define NVC3B5_SET_DST_DEPTH (0x00000718) +#define NVC3B5_SET_DST_DEPTH_V 31:0 +#define NVC3B5_SET_DST_LAYER (0x0000071C) +#define NVC3B5_SET_DST_LAYER_V 31:0 +#define NVC3B5_SET_DST_ORIGIN (0x00000720) +#define NVC3B5_SET_DST_ORIGIN_X 15:0 +#define NVC3B5_SET_DST_ORIGIN_Y 31:16 +#define NVC3B5_SET_SRC_BLOCK_SIZE (0x00000728) +#define NVC3B5_SET_SRC_BLOCK_SIZE_WIDTH 3:0 +#define NVC3B5_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC3B5_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 +#define NVC3B5_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC3B5_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC3B5_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC3B5_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC3B5_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC3B5_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC3B5_SET_SRC_BLOCK_SIZE_DEPTH 11:8 +#define NVC3B5_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC3B5_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC3B5_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC3B5_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC3B5_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC3B5_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC3B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC3B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC3B5_SET_SRC_WIDTH (0x0000072C) +#define NVC3B5_SET_SRC_WIDTH_V 31:0 +#define NVC3B5_SET_SRC_HEIGHT (0x00000730) +#define NVC3B5_SET_SRC_HEIGHT_V 31:0 +#define NVC3B5_SET_SRC_DEPTH (0x00000734) +#define NVC3B5_SET_SRC_DEPTH_V 31:0 +#define NVC3B5_SET_SRC_LAYER (0x00000738) +#define NVC3B5_SET_SRC_LAYER_V 31:0 +#define NVC3B5_SET_SRC_ORIGIN (0x0000073C) +#define NVC3B5_SET_SRC_ORIGIN_X 15:0 +#define NVC3B5_SET_SRC_ORIGIN_Y 31:16 +#define NVC3B5_SRC_ORIGIN_X (0x00000744) +#define NVC3B5_SRC_ORIGIN_X_VALUE 31:0 +#define NVC3B5_SRC_ORIGIN_Y (0x00000748) +#define NVC3B5_SRC_ORIGIN_Y_VALUE 31:0 +#define NVC3B5_DST_ORIGIN_X (0x0000074C) +#define NVC3B5_DST_ORIGIN_X_VALUE 31:0 +#define NVC3B5_DST_ORIGIN_Y (0x00000750) +#define NVC3B5_DST_ORIGIN_Y_VALUE 31:0 +#define NVC3B5_PM_TRIGGER_END (0x00001114) +#define NVC3B5_PM_TRIGGER_END_V 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc3b5_h + diff --git a/userspace/sdks/nv570/inc/class/clc3b5sw.h b/userspace/sdks/nv570/inc/class/clc3b5sw.h new file mode 100644 index 0000000..518883c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc3b5sw.h @@ -0,0 +1,54 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2016-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc3b5sw.finn +// + + + +// +// Using VERSION_0 will cause the API to interpret +// engineType as a CE engine instance. This allows +// for backward compatibility with 85B5sw and 90B5sw. +// +#define NVC3B5_ALLOCATION_PARAMETERS_VERSION_0 0 + +// +// Using VERSION_1 will cause the API to interpret +// engineType as an NV2080_ENGINE_TYPE ordinal. +// +#define NVC3B5_ALLOCATION_PARAMETERS_VERSION_1 1 + +#define NVC3B5_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc3b5U) + +typedef struct NVC3B5_ALLOCATION_PARAMETERS { + NvU32 version; + NvU32 engineType; +} NVC3B5_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc3b7.h b/userspace/sdks/nv570/inc/class/clc3b7.h new file mode 100644 index 0000000..0a313b8 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc3b7.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef clc3b7_h +#define clc3b7_h + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC3B7_VIDEO_ENCODER (0x0000C3B7) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clc3b7_h + diff --git a/userspace/sdks/nv570/inc/class/clc3c0.h b/userspace/sdks/nv570/inc/class/clc3c0.h new file mode 100644 index 0000000..76b4566 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc3c0.h @@ -0,0 +1,703 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_volta_compute_a_h_ +#define _cl_volta_compute_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl volta_compute_a */ + +#include "nvtypes.h" + +#define VOLTA_COMPUTE_A 0xC3C0 + +#define NVC3C0_SET_OBJECT 0x0000 +#define NVC3C0_SET_OBJECT_CLASS_ID 15:0 +#define NVC3C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC3C0_NO_OPERATION 0x0100 +#define NVC3C0_NO_OPERATION_V 31:0 + +#define NVC3C0_SET_NOTIFY_A 0x0104 +#define NVC3C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC3C0_SET_NOTIFY_B 0x0108 +#define NVC3C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC3C0_NOTIFY 0x010c +#define NVC3C0_NOTIFY_TYPE 31:0 +#define NVC3C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC3C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC3C0_WAIT_FOR_IDLE 0x0110 +#define NVC3C0_WAIT_FOR_IDLE_V 31:0 + +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC3C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC3C0_SEND_GO_IDLE 0x013c +#define NVC3C0_SEND_GO_IDLE_V 31:0 + +#define NVC3C0_PM_TRIGGER 0x0140 +#define NVC3C0_PM_TRIGGER_V 31:0 + +#define NVC3C0_PM_TRIGGER_WFI 0x0144 +#define NVC3C0_PM_TRIGGER_WFI_V 31:0 + +#define NVC3C0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC3C0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC3C0_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC3C0_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC3C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC3C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC3C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC3C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC3C0_LINE_LENGTH_IN 0x0180 +#define NVC3C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC3C0_LINE_COUNT 0x0184 +#define NVC3C0_LINE_COUNT_VALUE 31:0 + +#define NVC3C0_OFFSET_OUT_UPPER 0x0188 +#define NVC3C0_OFFSET_OUT_UPPER_VALUE 16:0 + +#define NVC3C0_OFFSET_OUT 0x018c +#define NVC3C0_OFFSET_OUT_VALUE 31:0 + +#define NVC3C0_PITCH_OUT 0x0190 +#define NVC3C0_PITCH_OUT_VALUE 31:0 + +#define NVC3C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVC3C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC3C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC3C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC3C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC3C0_SET_DST_WIDTH 0x0198 +#define NVC3C0_SET_DST_WIDTH_V 31:0 + +#define NVC3C0_SET_DST_HEIGHT 0x019c +#define NVC3C0_SET_DST_HEIGHT_V 31:0 + +#define NVC3C0_SET_DST_DEPTH 0x01a0 +#define NVC3C0_SET_DST_DEPTH_V 31:0 + +#define NVC3C0_SET_DST_LAYER 0x01a4 +#define NVC3C0_SET_DST_LAYER_V 31:0 + +#define NVC3C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC3C0_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC3C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC3C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC3C0_LAUNCH_DMA 0x01b0 +#define NVC3C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC3C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC3C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC3C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC3C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC3C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC3C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC3C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC3C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC3C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC3C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC3C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC3C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC3C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC3C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC3C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC3C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC3C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC3C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC3C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC3C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC3C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC3C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC3C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC3C0_LOAD_INLINE_DATA 0x01b4 +#define NVC3C0_LOAD_INLINE_DATA_V 31:0 + +#define NVC3C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC3C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC3C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC3C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC3C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC3C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC3C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC3C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC3C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC3C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC3C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC3C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC3C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC3C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVC3C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVC3C0_PERFMON_TRANSFER 0x0210 +#define NVC3C0_PERFMON_TRANSFER_V 31:0 + +#define NVC3C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVC3C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC3C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC3C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC3C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC3C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC3C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC3C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC3C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC3C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC3C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC3C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC3C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC3C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC3C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC3C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC3C0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVC3C0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVC3C0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVC3C0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD03 0x022c +#define NVC3C0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVC3C0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVC3C0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVC3C0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD07 0x023c +#define NVC3C0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC3C0_SET_CWD_REF_COUNTER 0x0248 +#define NVC3C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVC3C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVC3C0_SET_RESERVED_SW_METHOD08 0x024c +#define NVC3C0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVC3C0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVC3C0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVC3C0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD12 0x025c +#define NVC3C0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVC3C0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVC3C0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC3C0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVC3C0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC3C0_SET_SCG_CONTROL 0x0270 +#define NVC3C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 +#define NVC3C0_SET_SCG_CONTROL_COMPUTE1_MIN_SM_COUNT 20:12 +#define NVC3C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE 24:24 +#define NVC3C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_FALSE 0x00000000 +#define NVC3C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_TRUE 0x00000001 + +#define NVC3C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVC3C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC3C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC3C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVC3C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC3C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC3C0_SET_QMD_VERSION 0x0288 +#define NVC3C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVC3C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC3C0_CHECK_QMD_VERSION 0x0290 +#define NVC3C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVC3C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC3C0_INVALIDATE_SKED_CACHES 0x0298 +#define NVC3C0_INVALIDATE_SKED_CACHES_V 0:0 + +#define NVC3C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 +#define NVC3C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC3C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 +#define NVC3C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC3C0_SCG_HYSTERESIS_CONTROL 0x02a8 +#define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE 0:0 +#define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_TRUE 0x00000001 +#define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE 1:1 +#define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC3C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_TRUE 0x00000001 + +#define NVC3C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVC3C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVC3C0_SEND_PCAS_A 0x02b4 +#define NVC3C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVC3C0_SEND_PCAS_B 0x02b8 +#define NVC3C0_SEND_PCAS_B_FROM 23:0 +#define NVC3C0_SEND_PCAS_B_DELTA 31:24 + +#define NVC3C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVC3C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVC3C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVC3C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVC3C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVC3C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVC3C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVC3C0_SET_SKED_CACHE_CONTROL 0x02cc +#define NVC3C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 +#define NVC3C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 +#define NVC3C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 + +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVC3C0_SET_SPA_VERSION 0x0310 +#define NVC3C0_SET_SPA_VERSION_MINOR 7:0 +#define NVC3C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC3C0_SET_INLINE_QMD_ADDRESS_A 0x0318 +#define NVC3C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 + +#define NVC3C0_SET_INLINE_QMD_ADDRESS_B 0x031c +#define NVC3C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 + +#define NVC3C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) +#define NVC3C0_LOAD_INLINE_QMD_DATA_V 31:0 + +#define NVC3C0_SET_FALCON00 0x0500 +#define NVC3C0_SET_FALCON00_V 31:0 + +#define NVC3C0_SET_FALCON01 0x0504 +#define NVC3C0_SET_FALCON01_V 31:0 + +#define NVC3C0_SET_FALCON02 0x0508 +#define NVC3C0_SET_FALCON02_V 31:0 + +#define NVC3C0_SET_FALCON03 0x050c +#define NVC3C0_SET_FALCON03_V 31:0 + +#define NVC3C0_SET_FALCON04 0x0510 +#define NVC3C0_SET_FALCON04_V 31:0 + +#define NVC3C0_SET_FALCON05 0x0514 +#define NVC3C0_SET_FALCON05_V 31:0 + +#define NVC3C0_SET_FALCON06 0x0518 +#define NVC3C0_SET_FALCON06_V 31:0 + +#define NVC3C0_SET_FALCON07 0x051c +#define NVC3C0_SET_FALCON07_V 31:0 + +#define NVC3C0_SET_FALCON08 0x0520 +#define NVC3C0_SET_FALCON08_V 31:0 + +#define NVC3C0_SET_FALCON09 0x0524 +#define NVC3C0_SET_FALCON09_V 31:0 + +#define NVC3C0_SET_FALCON10 0x0528 +#define NVC3C0_SET_FALCON10_V 31:0 + +#define NVC3C0_SET_FALCON11 0x052c +#define NVC3C0_SET_FALCON11_V 31:0 + +#define NVC3C0_SET_FALCON12 0x0530 +#define NVC3C0_SET_FALCON12_V 31:0 + +#define NVC3C0_SET_FALCON13 0x0534 +#define NVC3C0_SET_FALCON13_V 31:0 + +#define NVC3C0_SET_FALCON14 0x0538 +#define NVC3C0_SET_FALCON14_V 31:0 + +#define NVC3C0_SET_FALCON15 0x053c +#define NVC3C0_SET_FALCON15_V 31:0 + +#define NVC3C0_SET_FALCON16 0x0540 +#define NVC3C0_SET_FALCON16_V 31:0 + +#define NVC3C0_SET_FALCON17 0x0544 +#define NVC3C0_SET_FALCON17_V 31:0 + +#define NVC3C0_SET_FALCON18 0x0548 +#define NVC3C0_SET_FALCON18_V 31:0 + +#define NVC3C0_SET_FALCON19 0x054c +#define NVC3C0_SET_FALCON19_V 31:0 + +#define NVC3C0_SET_FALCON20 0x0550 +#define NVC3C0_SET_FALCON20_V 31:0 + +#define NVC3C0_SET_FALCON21 0x0554 +#define NVC3C0_SET_FALCON21_V 31:0 + +#define NVC3C0_SET_FALCON22 0x0558 +#define NVC3C0_SET_FALCON22_V 31:0 + +#define NVC3C0_SET_FALCON23 0x055c +#define NVC3C0_SET_FALCON23_V 31:0 + +#define NVC3C0_SET_FALCON24 0x0560 +#define NVC3C0_SET_FALCON24_V 31:0 + +#define NVC3C0_SET_FALCON25 0x0564 +#define NVC3C0_SET_FALCON25_V 31:0 + +#define NVC3C0_SET_FALCON26 0x0568 +#define NVC3C0_SET_FALCON26_V 31:0 + +#define NVC3C0_SET_FALCON27 0x056c +#define NVC3C0_SET_FALCON27_V 31:0 + +#define NVC3C0_SET_FALCON28 0x0570 +#define NVC3C0_SET_FALCON28_V 31:0 + +#define NVC3C0_SET_FALCON29 0x0574 +#define NVC3C0_SET_FALCON29_V 31:0 + +#define NVC3C0_SET_FALCON30 0x0578 +#define NVC3C0_SET_FALCON30_V 31:0 + +#define NVC3C0_SET_FALCON31 0x057c +#define NVC3C0_SET_FALCON31_V 31:0 + +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 + +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 +#define NVC3C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC3C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC3C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC3C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC3C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC3C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC3C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_ALL 0x120c +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_ALL_V 0:0 + +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL 0x1210 +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_ALL_V 0:0 + +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC3C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVC3C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVC3C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVC3C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVC3C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC3C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC3C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC3C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC3C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC3C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC3C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC3C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC3C0_SET_RENDER_ENABLE_A 0x1550 +#define NVC3C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC3C0_SET_RENDER_ENABLE_B 0x1554 +#define NVC3C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC3C0_SET_RENDER_ENABLE_C 0x1558 +#define NVC3C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC3C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC3C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC3C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC3C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC3C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC3C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC3C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC3C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC3C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC3C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC3C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC3C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC3C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC3C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC3C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC3C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVC3C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC3C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC3C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC3C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC3C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC3C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC3C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC3C0_PIPE_NOP 0x1a2c +#define NVC3C0_PIPE_NOP_V 31:0 + +#define NVC3C0_SET_SPARE00 0x1a30 +#define NVC3C0_SET_SPARE00_V 31:0 + +#define NVC3C0_SET_SPARE01 0x1a34 +#define NVC3C0_SET_SPARE01_V 31:0 + +#define NVC3C0_SET_SPARE02 0x1a38 +#define NVC3C0_SET_SPARE02_V 31:0 + +#define NVC3C0_SET_SPARE03 0x1a3c +#define NVC3C0_SET_SPARE03_V 31:0 + +#define NVC3C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC3C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC3C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC3C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC3C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC3C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC3C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC3C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC3C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 + +#define NVC3C0_SET_TRAP_HANDLER_A 0x25f8 +#define NVC3C0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC3C0_SET_TRAP_HANDLER_B 0x25fc +#define NVC3C0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC3C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVC3C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVC3C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC3C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC3C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC3C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC3C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC3C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC3C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC3C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC3C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC3C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC3C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC3C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC3C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC3C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC3C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#endif /* _cl_volta_compute_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc461.h b/userspace/sdks/nv570/inc/class/clc461.h new file mode 100644 index 0000000..0c0378f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc461.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc461_h_ +#define _clc461_h_ + +#define TURING_USERMODE_A (0xc461) + +#endif // _clc461_h_ diff --git a/userspace/sdks/nv570/inc/class/clc46f.h b/userspace/sdks/nv570/inc/class/clc46f.h new file mode 100644 index 0000000..fb1c594 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc46f.h @@ -0,0 +1,365 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc46f_h_ +#define _clc46f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* class TURING_CHANNEL_GPFIFO */ +/* + * Documentation for TURING_CHANNEL_GPFIFO can be found in dev_pbdma.ref, + * chapter "User Control Registers". It is documented as device NV_UDMA. + * The GPFIFO format itself is also documented in dev_pbdma.ref, + * NV_PPBDMA_GP_ENTRY_*. The pushbuffer format is documented in dev_ram.ref, + * chapter "FIFO DMA RAM", NV_FIFO_DMA_*. + * + * Note there is no .mfs file for this class. + */ +#define TURING_CHANNEL_GPFIFO_A (0x0000C46F) + +#define NVC46F_TYPEDEF TURING_CHANNELChannelGPFifoA + +/* dma flow control data structure */ +typedef volatile struct Nvc46fControl_struct { + NvU32 Ignored00[0x010]; /* 0000-003f*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 Ignored01[0x002]; /* 0050-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored02[0x007]; /* 0064-007f*/ + NvU32 Ignored03; /* used to be engine yield 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x5c]; +} Nvc46fControl, TuringAControlGPFifo; + +/* fields and values */ +#define NVC46F_NUMBER_OF_SUBCHANNELS (8) +#define NVC46F_SET_OBJECT (0x00000000) +#define NVC46F_SET_OBJECT_NVCLASS 15:0 +#define NVC46F_SET_OBJECT_ENGINE 20:16 +#define NVC46F_SET_OBJECT_ENGINE_SW 0x0000001f +#define NVC46F_ILLEGAL (0x00000004) +#define NVC46F_ILLEGAL_HANDLE 31:0 +#define NVC46F_NOP (0x00000008) +#define NVC46F_NOP_HANDLE 31:0 +#define NVC46F_SEMAPHOREA (0x00000010) +#define NVC46F_SEMAPHOREA_OFFSET_UPPER 7:0 +#define NVC46F_SEMAPHOREB (0x00000014) +#define NVC46F_SEMAPHOREB_OFFSET_LOWER 31:2 +#define NVC46F_SEMAPHOREC (0x00000018) +#define NVC46F_SEMAPHOREC_PAYLOAD 31:0 +#define NVC46F_SEMAPHORED (0x0000001C) +#define NVC46F_SEMAPHORED_OPERATION 4:0 +#define NVC46F_SEMAPHORED_OPERATION_ACQUIRE 0x00000001 +#define NVC46F_SEMAPHORED_OPERATION_RELEASE 0x00000002 +#define NVC46F_SEMAPHORED_OPERATION_ACQ_GEQ 0x00000004 +#define NVC46F_SEMAPHORED_OPERATION_ACQ_AND 0x00000008 +#define NVC46F_SEMAPHORED_OPERATION_REDUCTION 0x00000010 +#define NVC46F_SEMAPHORED_ACQUIRE_SWITCH 12:12 +#define NVC46F_SEMAPHORED_ACQUIRE_SWITCH_DISABLED 0x00000000 +#define NVC46F_SEMAPHORED_ACQUIRE_SWITCH_ENABLED 0x00000001 +#define NVC46F_SEMAPHORED_RELEASE_WFI 20:20 +#define NVC46F_SEMAPHORED_RELEASE_WFI_EN 0x00000000 +#define NVC46F_SEMAPHORED_RELEASE_WFI_DIS 0x00000001 +#define NVC46F_SEMAPHORED_RELEASE_SIZE 24:24 +#define NVC46F_SEMAPHORED_RELEASE_SIZE_16BYTE 0x00000000 +#define NVC46F_SEMAPHORED_RELEASE_SIZE_4BYTE 0x00000001 +#define NVC46F_SEMAPHORED_REDUCTION 30:27 +#define NVC46F_SEMAPHORED_REDUCTION_MIN 0x00000000 +#define NVC46F_SEMAPHORED_REDUCTION_MAX 0x00000001 +#define NVC46F_SEMAPHORED_REDUCTION_XOR 0x00000002 +#define NVC46F_SEMAPHORED_REDUCTION_AND 0x00000003 +#define NVC46F_SEMAPHORED_REDUCTION_OR 0x00000004 +#define NVC46F_SEMAPHORED_REDUCTION_ADD 0x00000005 +#define NVC46F_SEMAPHORED_REDUCTION_INC 0x00000006 +#define NVC46F_SEMAPHORED_REDUCTION_DEC 0x00000007 +#define NVC46F_SEMAPHORED_FORMAT 31:31 +#define NVC46F_SEMAPHORED_FORMAT_SIGNED 0x00000000 +#define NVC46F_SEMAPHORED_FORMAT_UNSIGNED 0x00000001 +#define NVC46F_NON_STALL_INTERRUPT (0x00000020) +#define NVC46F_NON_STALL_INTERRUPT_HANDLE 31:0 +#define NVC46F_FB_FLUSH (0x00000024) // Deprecated - use MEMBAR TYPE SYS_MEMBAR +#define NVC46F_FB_FLUSH_HANDLE 31:0 +// NOTE - MEM_OP_A and MEM_OP_B have been replaced in gp100 with methods for +// specifying the page address for a targeted TLB invalidate and the uTLB for +// a targeted REPLAY_CANCEL for UVM. +// The previous MEM_OP_A/B functionality is in MEM_OP_C/D, with slightly +// rearranged fields. +#define NVC46F_MEM_OP_A (0x00000028) +#define NVC46F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_CLIENT_UNIT_ID 5:0 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC46F_MEM_OP_A_TLB_INVALIDATE_INVALIDATION_SIZE 5:0 // Used to specify size of invalidate, used for invalidates which are not of the REPLAY_CANCEL_TARGETED type +#define NVC46F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_GPC_ID 10:6 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC46F_MEM_OP_A_TLB_INVALIDATE_CANCEL_MMU_ENGINE_ID 6:0 // only relevant for REPLAY_CANCEL_VA_GLOBAL +#define NVC46F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR 11:11 +#define NVC46F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_EN 0x00000001 +#define NVC46F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_DIS 0x00000000 +#define NVC46F_MEM_OP_A_TLB_INVALIDATE_TARGET_ADDR_LO 31:12 +#define NVC46F_MEM_OP_B (0x0000002c) +#define NVC46F_MEM_OP_B_TLB_INVALIDATE_TARGET_ADDR_HI 31:0 +#define NVC46F_MEM_OP_C (0x00000030) +#define NVC46F_MEM_OP_C_MEMBAR_TYPE 2:0 +#define NVC46F_MEM_OP_C_MEMBAR_TYPE_SYS_MEMBAR 0x00000000 +#define NVC46F_MEM_OP_C_MEMBAR_TYPE_MEMBAR 0x00000001 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PDB 0:0 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PDB_ALL 0x00000001 // Probably nonsensical for MMU_TLB_INVALIDATE_TARGETED +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_GPC 1:1 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_REPLAY 4:2 // only relevant if GPC ENABLE +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_REPLAY_NONE 0x00000000 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START 0x00000001 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START_ACK_ALL 0x00000002 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_TARGETED 0x00000003 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_GLOBAL 0x00000004 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_VA_GLOBAL 0x00000005 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE 6:5 // only relevant if GPC ENABLE +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_NONE 0x00000000 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_GLOBALLY 0x00000001 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_INTRANODE 0x00000002 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE 9:7 //only relevant for REPLAY_CANCEL_VA_GLOBAL +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_READ 0 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_WRITE 1 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_STRONG 2 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_RSVRVD 3 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_WEAK 4 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_ALL 5 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_WRITE_AND_ATOMIC 6 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ALL 7 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL 9:7 // Invalidate affects this level and all below +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_ALL 0x00000000 // Invalidate tlb caches at all levels of the page table +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_PTE_ONLY 0x00000001 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE0 0x00000002 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE1 0x00000003 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE2 0x00000004 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3 0x00000005 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE4 0x00000006 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE5 0x00000007 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE 11:10 // only relevant if PDB_ONE +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_VID_MEM 0x00000000 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 +#define NVC46F_MEM_OP_C_TLB_INVALIDATE_PDB_ADDR_LO 31:12 // only relevant if PDB_ONE +#define NVC46F_MEM_OP_C_ACCESS_COUNTER_CLR_TARGETED_NOTIFY_TAG 19:0 +// MEM_OP_D MUST be preceded by MEM_OPs A-C. +#define NVC46F_MEM_OP_D (0x00000034) +#define NVC46F_MEM_OP_D_TLB_INVALIDATE_PDB_ADDR_HI 26:0 // only relevant if PDB_ONE +#define NVC46F_MEM_OP_D_OPERATION 31:27 +#define NVC46F_MEM_OP_D_OPERATION_MEMBAR 0x00000005 +#define NVC46F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NVC46F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE_TARGETED 0x0000000a +#define NVC46F_MEM_OP_D_OPERATION_L2_PEERMEM_INVALIDATE 0x0000000d +#define NVC46F_MEM_OP_D_OPERATION_L2_SYSMEM_INVALIDATE 0x0000000e +// CLEAN_LINES is an alias for Tegra/GPU IP usage +#define NVC46F_MEM_OP_B_OPERATION_L2_INVALIDATE_CLEAN_LINES 0x0000000e +#define NVC46F_MEM_OP_D_OPERATION_L2_CLEAN_COMPTAGS 0x0000000f +#define NVC46F_MEM_OP_D_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NVC46F_MEM_OP_D_OPERATION_L2_WAIT_FOR_SYS_PENDING_READS 0x00000015 +#define NVC46F_MEM_OP_D_OPERATION_ACCESS_COUNTER_CLR 0x00000016 +#define NVC46F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE 1:0 +#define NVC46F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_MIMC 0x00000000 +#define NVC46F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_MOMC 0x00000001 +#define NVC46F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_ALL 0x00000002 +#define NVC46F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_TARGETED 0x00000003 +#define NVC46F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE 2:2 +#define NVC46F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE_MIMC 0x00000000 +#define NVC46F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE_MOMC 0x00000001 +#define NVC46F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_BANK 6:3 +#define NVC46F_SET_REFERENCE (0x00000050) +#define NVC46F_SET_REFERENCE_COUNT 31:0 +#define NVC46F_SEM_ADDR_LO (0x0000005c) +#define NVC46F_SEM_ADDR_LO_OFFSET 31:2 +#define NVC46F_SEM_ADDR_HI (0x00000060) +#define NVC46F_SEM_ADDR_HI_OFFSET 7:0 +#define NVC46F_SEM_PAYLOAD_LO (0x00000064) +#define NVC46F_SEM_PAYLOAD_LO_PAYLOAD 31:0 +#define NVC46F_SEM_PAYLOAD_HI (0x00000068) +#define NVC46F_SEM_PAYLOAD_HI_PAYLOAD 31:0 +#define NVC46F_SEM_EXECUTE (0x0000006c) +#define NVC46F_SEM_EXECUTE_OPERATION 2:0 +#define NVC46F_SEM_EXECUTE_OPERATION_ACQUIRE 0x00000000 +#define NVC46F_SEM_EXECUTE_OPERATION_RELEASE 0x00000001 +#define NVC46F_SEM_EXECUTE_OPERATION_ACQ_STRICT_GEQ 0x00000002 +#define NVC46F_SEM_EXECUTE_OPERATION_ACQ_CIRC_GEQ 0x00000003 +#define NVC46F_SEM_EXECUTE_OPERATION_ACQ_AND 0x00000004 +#define NVC46F_SEM_EXECUTE_OPERATION_ACQ_NOR 0x00000005 +#define NVC46F_SEM_EXECUTE_OPERATION_REDUCTION 0x00000006 +#define NVC46F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG 12:12 +#define NVC46F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG_DIS 0x00000000 +#define NVC46F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG_EN 0x00000001 +#define NVC46F_SEM_EXECUTE_RELEASE_WFI 20:20 +#define NVC46F_SEM_EXECUTE_RELEASE_WFI_DIS 0x00000000 +#define NVC46F_SEM_EXECUTE_RELEASE_WFI_EN 0x00000001 +#define NVC46F_SEM_EXECUTE_PAYLOAD_SIZE 24:24 +#define NVC46F_SEM_EXECUTE_PAYLOAD_SIZE_32BIT 0x00000000 +#define NVC46F_SEM_EXECUTE_PAYLOAD_SIZE_64BIT 0x00000001 +#define NVC46F_SEM_EXECUTE_RELEASE_TIMESTAMP 25:25 +#define NVC46F_SEM_EXECUTE_RELEASE_TIMESTAMP_DIS 0x00000000 +#define NVC46F_SEM_EXECUTE_RELEASE_TIMESTAMP_EN 0x00000001 +#define NVC46F_SEM_EXECUTE_REDUCTION 30:27 +#define NVC46F_SEM_EXECUTE_REDUCTION_IMIN 0x00000000 +#define NVC46F_SEM_EXECUTE_REDUCTION_IMAX 0x00000001 +#define NVC46F_SEM_EXECUTE_REDUCTION_IXOR 0x00000002 +#define NVC46F_SEM_EXECUTE_REDUCTION_IAND 0x00000003 +#define NVC46F_SEM_EXECUTE_REDUCTION_IOR 0x00000004 +#define NVC46F_SEM_EXECUTE_REDUCTION_IADD 0x00000005 +#define NVC46F_SEM_EXECUTE_REDUCTION_INC 0x00000006 +#define NVC46F_SEM_EXECUTE_REDUCTION_DEC 0x00000007 +#define NVC46F_SEM_EXECUTE_REDUCTION_FORMAT 31:31 +#define NVC46F_SEM_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000000 +#define NVC46F_SEM_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000001 +#define NVC46F_WFI (0x00000078) +#define NVC46F_WFI_SCOPE 0:0 +#define NVC46F_WFI_SCOPE_CURRENT_SCG_TYPE 0x00000000 +#define NVC46F_WFI_SCOPE_CURRENT_VEID 0x00000000 +#define NVC46F_WFI_SCOPE_ALL 0x00000001 +#define NVC46F_CRC_CHECK (0x0000007c) +#define NVC46F_CRC_CHECK_VALUE 31:0 +#define NVC46F_YIELD (0x00000080) +#define NVC46F_YIELD_OP 1:0 +#define NVC46F_YIELD_OP_NOP 0x00000000 +#define NVC46F_YIELD_OP_RUNLIST_TIMESLICE 0x00000002 +#define NVC46F_YIELD_OP_TSG 0x00000003 +#define NVC46F_CLEAR_FAULTED (0x00000084) +// Note: RM provides the HANDLE as an opaque value; the internal detail fields +// are intentionally not exposed to the driver through these defines. +#define NVC46F_CLEAR_FAULTED_HANDLE 30:0 +#define NVC46F_CLEAR_FAULTED_TYPE 31:31 +#define NVC46F_CLEAR_FAULTED_TYPE_PBDMA_FAULTED 0x00000000 +#define NVC46F_CLEAR_FAULTED_TYPE_ENG_FAULTED 0x00000001 + + +/* GPFIFO entry format */ +#define NVC46F_GP_ENTRY__SIZE 8 +#define NVC46F_GP_ENTRY0_FETCH 0:0 +#define NVC46F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVC46F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVC46F_GP_ENTRY0_GET 31:2 +#define NVC46F_GP_ENTRY0_OPERAND 31:0 +#define NVC46F_GP_ENTRY1_GET_HI 7:0 +#define NVC46F_GP_ENTRY1_LEVEL 9:9 +#define NVC46F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVC46F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVC46F_GP_ENTRY1_LENGTH 30:10 +#define NVC46F_GP_ENTRY1_SYNC 31:31 +#define NVC46F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVC46F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVC46F_GP_ENTRY1_OPCODE 7:0 +#define NVC46F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVC46F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVC46F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVC46F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 + +/* dma method formats */ +#define NVC46F_DMA_METHOD_ADDRESS_OLD 12:2 +#define NVC46F_DMA_METHOD_ADDRESS 11:0 +#define NVC46F_DMA_SUBDEVICE_MASK 15:4 +#define NVC46F_DMA_METHOD_SUBCHANNEL 15:13 +#define NVC46F_DMA_TERT_OP 17:16 +#define NVC46F_DMA_TERT_OP_GRP0_INC_METHOD (0x00000000) +#define NVC46F_DMA_TERT_OP_GRP0_SET_SUB_DEV_MASK (0x00000001) +#define NVC46F_DMA_TERT_OP_GRP0_STORE_SUB_DEV_MASK (0x00000002) +#define NVC46F_DMA_TERT_OP_GRP0_USE_SUB_DEV_MASK (0x00000003) +#define NVC46F_DMA_TERT_OP_GRP2_NON_INC_METHOD (0x00000000) +#define NVC46F_DMA_METHOD_COUNT_OLD 28:18 +#define NVC46F_DMA_METHOD_COUNT 28:16 +#define NVC46F_DMA_IMMD_DATA 28:16 +#define NVC46F_DMA_SEC_OP 31:29 +#define NVC46F_DMA_SEC_OP_GRP0_USE_TERT (0x00000000) +#define NVC46F_DMA_SEC_OP_INC_METHOD (0x00000001) +#define NVC46F_DMA_SEC_OP_GRP2_USE_TERT (0x00000002) +#define NVC46F_DMA_SEC_OP_NON_INC_METHOD (0x00000003) +#define NVC46F_DMA_SEC_OP_IMMD_DATA_METHOD (0x00000004) +#define NVC46F_DMA_SEC_OP_ONE_INC (0x00000005) +#define NVC46F_DMA_SEC_OP_RESERVED6 (0x00000006) +#define NVC46F_DMA_SEC_OP_END_PB_SEGMENT (0x00000007) +/* dma incrementing method format */ +#define NVC46F_DMA_INCR_ADDRESS 11:0 +#define NVC46F_DMA_INCR_SUBCHANNEL 15:13 +#define NVC46F_DMA_INCR_COUNT 28:16 +#define NVC46F_DMA_INCR_OPCODE 31:29 +#define NVC46F_DMA_INCR_OPCODE_VALUE (0x00000001) +#define NVC46F_DMA_INCR_DATA 31:0 +/* dma non-incrementing method format */ +#define NVC46F_DMA_NONINCR_ADDRESS 11:0 +#define NVC46F_DMA_NONINCR_SUBCHANNEL 15:13 +#define NVC46F_DMA_NONINCR_COUNT 28:16 +#define NVC46F_DMA_NONINCR_OPCODE 31:29 +#define NVC46F_DMA_NONINCR_OPCODE_VALUE (0x00000003) +#define NVC46F_DMA_NONINCR_DATA 31:0 +/* dma increment-once method format */ +#define NVC46F_DMA_ONEINCR_ADDRESS 11:0 +#define NVC46F_DMA_ONEINCR_SUBCHANNEL 15:13 +#define NVC46F_DMA_ONEINCR_COUNT 28:16 +#define NVC46F_DMA_ONEINCR_OPCODE 31:29 +#define NVC46F_DMA_ONEINCR_OPCODE_VALUE (0x00000005) +#define NVC46F_DMA_ONEINCR_DATA 31:0 +/* dma no-operation format */ +#define NVC46F_DMA_NOP (0x00000000) +/* dma immediate-data format */ +#define NVC46F_DMA_IMMD_ADDRESS 11:0 +#define NVC46F_DMA_IMMD_SUBCHANNEL 15:13 +#define NVC46F_DMA_IMMD_DATA 28:16 +#define NVC46F_DMA_IMMD_OPCODE 31:29 +#define NVC46F_DMA_IMMD_OPCODE_VALUE (0x00000004) +/* dma set sub-device mask format */ +#define NVC46F_DMA_SET_SUBDEVICE_MASK_VALUE 15:4 +#define NVC46F_DMA_SET_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC46F_DMA_SET_SUBDEVICE_MASK_OPCODE_VALUE (0x00000001) +/* dma store sub-device mask format */ +#define NVC46F_DMA_STORE_SUBDEVICE_MASK_VALUE 15:4 +#define NVC46F_DMA_STORE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC46F_DMA_STORE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000002) +/* dma use sub-device mask format */ +#define NVC46F_DMA_USE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC46F_DMA_USE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000003) +/* dma end-segment format */ +#define NVC46F_DMA_ENDSEG_OPCODE 31:29 +#define NVC46F_DMA_ENDSEG_OPCODE_VALUE (0x00000007) +/* dma legacy incrementing/non-incrementing formats */ +#define NVC46F_DMA_ADDRESS 12:2 +#define NVC46F_DMA_SUBCH 15:13 +#define NVC46F_DMA_OPCODE3 17:16 +#define NVC46F_DMA_OPCODE3_NONE (0x00000000) +#define NVC46F_DMA_COUNT 28:18 +#define NVC46F_DMA_OPCODE 31:29 +#define NVC46F_DMA_OPCODE_METHOD (0x00000000) +#define NVC46F_DMA_OPCODE_NONINC_METHOD (0x00000002) +#define NVC46F_DMA_DATA 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc46f_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc46fsw.h b/userspace/sdks/nv570/inc/class/clc46fsw.h new file mode 100644 index 0000000..7438195 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc46fsw.h @@ -0,0 +1,44 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* This file is *not* auto-generated. */ + +#ifndef _clc46f_sw_h_ +#define _clc46f_sw_h_ + +#define NVC46F_NOTIFIERS_RC (0) +#define NVC46F_NOTIFIERS_REFCNT (1) +#define NVC46F_NOTIFIERS_NONSTALL (2) +#define NVC46F_NOTIFIERS_EVENTBUFFER (3) +#define NVC46F_NOTIFIERS_IDLECHANNEL (4) +#define NVC46F_NOTIFIERS_ENDCTX (5) +#define NVC46F_NOTIFIERS_SW (6) +#define NVC46F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVC46F_NOTIFIERS_REPLAYABLE_FAULT (8) +#define NVC46F_NOTIFIERS_MAXCOUNT (9) + +/* NvNotification[] fields and values */ +#define NVC46F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVC46F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _clc46f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc4b0.h b/userspace/sdks/nv570/inc/class/clc4b0.h new file mode 100644 index 0000000..4b7d335 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc4b0.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef clc4b0_h_ +#define clc4b0_h_ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC4B0_VIDEO_DECODER (0x0000C4B0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clc4b0_h + diff --git a/userspace/sdks/nv570/inc/class/clc4b7.h b/userspace/sdks/nv570/inc/class/clc4b7.h new file mode 100644 index 0000000..27f3983 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc4b7.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef clc4b7_h_ +#define clc4b7_h_ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC4B7_VIDEO_ENCODER (0x0000C4B7) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clc4b7_h + diff --git a/userspace/sdks/nv570/inc/class/clc4c0.h b/userspace/sdks/nv570/inc/class/clc4c0.h new file mode 100644 index 0000000..f96026c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc4c0.h @@ -0,0 +1,34 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_volta_compute_b_h_ +#define _cl_volta_compute_b_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl volta_compute_b */ + +#include "nvtypes.h" + +#define VOLTA_COMPUTE_B 0xC4C0 + +#endif /* _cl_volta_compute_b_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc4d1.h b/userspace/sdks/nv570/inc/class/clc4d1.h new file mode 100644 index 0000000..196b034 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc4d1.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#include "nvtypes.h" + +#ifndef _clc4d1_h_ +#define _clc4d1_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC4D1_VIDEO_NVJPG (0x0000C4D1) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc4d1_h + diff --git a/userspace/sdks/nv570/inc/class/clc561.h b/userspace/sdks/nv570/inc/class/clc561.h new file mode 100644 index 0000000..83a9339 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc561.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc561_h_ +#define _clc561_h_ + +#define AMPERE_USERMODE_A (0xc561) + +#endif // _clc561_h_ diff --git a/userspace/sdks/nv570/inc/class/clc56f.h b/userspace/sdks/nv570/inc/class/clc56f.h new file mode 100644 index 0000000..bc8b675 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc56f.h @@ -0,0 +1,367 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc56f_h_ +#define _clc56f_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +/* class AMPERE_CHANNEL_GPFIFO */ +/* + * Documentation for AMPERE_CHANNEL_GPFIFO can be found in dev_pbdma.ref, + * chapter "User Control Registers". It is documented as device NV_UDMA. + * The GPFIFO format itself is also documented in dev_pbdma.ref, + * NV_PPBDMA_GP_ENTRY_*. The pushbuffer format is documented in dev_ram.ref, + * chapter "FIFO DMA RAM", NV_FIFO_DMA_*. + * + * Note there is no .mfs file for this class. + */ +#define AMPERE_CHANNEL_GPFIFO_A (0x0000C56F) + +#define NVC56F_TYPEDEF AMPERE_CHANNELChannelGPFifoA + +/* dma flow control data structure */ +typedef volatile struct Nvc56fControl_struct { + NvU32 Ignored00[0x010]; /* 0000-003f*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 Ignored01[0x002]; /* 0050-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored02[0x007]; /* 0064-007f*/ + NvU32 Ignored03; /* used to be engine yield 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x5c]; +} Nvc56fControl, AmpereAControlGPFifo; + +/* fields and values */ +#define NVC56F_NUMBER_OF_SUBCHANNELS (8) +#define NVC56F_SET_OBJECT (0x00000000) +#define NVC56F_SET_OBJECT_NVCLASS 15:0 +#define NVC56F_SET_OBJECT_ENGINE 20:16 +#define NVC56F_SET_OBJECT_ENGINE_SW 0x0000001f +#define NVC56F_ILLEGAL (0x00000004) +#define NVC56F_ILLEGAL_HANDLE 31:0 +#define NVC56F_NOP (0x00000008) +#define NVC56F_NOP_HANDLE 31:0 +#define NVC56F_SEMAPHOREA (0x00000010) +#define NVC56F_SEMAPHOREA_OFFSET_UPPER 7:0 +#define NVC56F_SEMAPHOREB (0x00000014) +#define NVC56F_SEMAPHOREB_OFFSET_LOWER 31:2 +#define NVC56F_SEMAPHOREC (0x00000018) +#define NVC56F_SEMAPHOREC_PAYLOAD 31:0 +#define NVC56F_SEMAPHORED (0x0000001C) +#define NVC56F_SEMAPHORED_OPERATION 4:0 +#define NVC56F_SEMAPHORED_OPERATION_ACQUIRE 0x00000001 +#define NVC56F_SEMAPHORED_OPERATION_RELEASE 0x00000002 +#define NVC56F_SEMAPHORED_OPERATION_ACQ_GEQ 0x00000004 +#define NVC56F_SEMAPHORED_OPERATION_ACQ_AND 0x00000008 +#define NVC56F_SEMAPHORED_OPERATION_REDUCTION 0x00000010 +#define NVC56F_SEMAPHORED_ACQUIRE_SWITCH 12:12 +#define NVC56F_SEMAPHORED_ACQUIRE_SWITCH_DISABLED 0x00000000 +#define NVC56F_SEMAPHORED_ACQUIRE_SWITCH_ENABLED 0x00000001 +#define NVC56F_SEMAPHORED_RELEASE_WFI 20:20 +#define NVC56F_SEMAPHORED_RELEASE_WFI_EN 0x00000000 +#define NVC56F_SEMAPHORED_RELEASE_WFI_DIS 0x00000001 +#define NVC56F_SEMAPHORED_RELEASE_SIZE 24:24 +#define NVC56F_SEMAPHORED_RELEASE_SIZE_16BYTE 0x00000000 +#define NVC56F_SEMAPHORED_RELEASE_SIZE_4BYTE 0x00000001 +#define NVC56F_SEMAPHORED_REDUCTION 30:27 +#define NVC56F_SEMAPHORED_REDUCTION_MIN 0x00000000 +#define NVC56F_SEMAPHORED_REDUCTION_MAX 0x00000001 +#define NVC56F_SEMAPHORED_REDUCTION_XOR 0x00000002 +#define NVC56F_SEMAPHORED_REDUCTION_AND 0x00000003 +#define NVC56F_SEMAPHORED_REDUCTION_OR 0x00000004 +#define NVC56F_SEMAPHORED_REDUCTION_ADD 0x00000005 +#define NVC56F_SEMAPHORED_REDUCTION_INC 0x00000006 +#define NVC56F_SEMAPHORED_REDUCTION_DEC 0x00000007 +#define NVC56F_SEMAPHORED_FORMAT 31:31 +#define NVC56F_SEMAPHORED_FORMAT_SIGNED 0x00000000 +#define NVC56F_SEMAPHORED_FORMAT_UNSIGNED 0x00000001 +#define NVC56F_NON_STALL_INTERRUPT (0x00000020) +#define NVC56F_NON_STALL_INTERRUPT_HANDLE 31:0 +#define NVC56F_FB_FLUSH (0x00000024) // Deprecated - use MEMBAR TYPE SYS_MEMBAR +#define NVC56F_FB_FLUSH_HANDLE 31:0 +// NOTE - MEM_OP_A and MEM_OP_B have been replaced in gp100 with methods for +// specifying the page address for a targeted TLB invalidate and the uTLB for +// a targeted REPLAY_CANCEL for UVM. +// The previous MEM_OP_A/B functionality is in MEM_OP_C/D, with slightly +// rearranged fields. +#define NVC56F_MEM_OP_A (0x00000028) +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_CLIENT_UNIT_ID 5:0 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_INVALIDATION_SIZE 5:0 // Used to specify size of invalidate, used for invalidates which are not of the REPLAY_CANCEL_TARGETED type +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_GPC_ID 10:6 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE 7:6 // only relevant for invalidates with NVC56F_MEM_OP_C_TLB_INVALIDATE_REPLAY_NONE for invalidating link TLB only, or non-link TLB only or all TLBs +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE_ALL_TLBS 0 +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE_LINK_TLBS 1 +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE_NON_LINK_TLBS 2 +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE_RSVRVD 3 +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_CANCEL_MMU_ENGINE_ID 6:0 // only relevant for REPLAY_CANCEL_VA_GLOBAL +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR 11:11 +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_EN 0x00000001 +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_DIS 0x00000000 +#define NVC56F_MEM_OP_A_TLB_INVALIDATE_TARGET_ADDR_LO 31:12 +#define NVC56F_MEM_OP_B (0x0000002c) +#define NVC56F_MEM_OP_B_TLB_INVALIDATE_TARGET_ADDR_HI 31:0 +#define NVC56F_MEM_OP_C (0x00000030) +#define NVC56F_MEM_OP_C_MEMBAR_TYPE 2:0 +#define NVC56F_MEM_OP_C_MEMBAR_TYPE_SYS_MEMBAR 0x00000000 +#define NVC56F_MEM_OP_C_MEMBAR_TYPE_MEMBAR 0x00000001 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PDB 0:0 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PDB_ALL 0x00000001 // Probably nonsensical for MMU_TLB_INVALIDATE_TARGETED +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_GPC 1:1 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_REPLAY 4:2 // only relevant if GPC ENABLE +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_REPLAY_NONE 0x00000000 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START 0x00000001 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START_ACK_ALL 0x00000002 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_TARGETED 0x00000003 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_GLOBAL 0x00000004 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_VA_GLOBAL 0x00000005 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE 6:5 // only relevant if GPC ENABLE +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_NONE 0x00000000 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_GLOBALLY 0x00000001 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_INTRANODE 0x00000002 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE 9:7 //only relevant for REPLAY_CANCEL_VA_GLOBAL +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_READ 0 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_WRITE 1 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_STRONG 2 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_RSVRVD 3 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_WEAK 4 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_ALL 5 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_WRITE_AND_ATOMIC 6 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ALL 7 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL 9:7 // Invalidate affects this level and all below +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_ALL 0x00000000 // Invalidate tlb caches at all levels of the page table +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_PTE_ONLY 0x00000001 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE0 0x00000002 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE1 0x00000003 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE2 0x00000004 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3 0x00000005 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE4 0x00000006 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE5 0x00000007 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE 11:10 // only relevant if PDB_ONE +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_VID_MEM 0x00000000 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 +#define NVC56F_MEM_OP_C_TLB_INVALIDATE_PDB_ADDR_LO 31:12 // only relevant if PDB_ONE +#define NVC56F_MEM_OP_C_ACCESS_COUNTER_CLR_TARGETED_NOTIFY_TAG 19:0 +// MEM_OP_D MUST be preceded by MEM_OPs A-C. +#define NVC56F_MEM_OP_D (0x00000034) +#define NVC56F_MEM_OP_D_TLB_INVALIDATE_PDB_ADDR_HI 26:0 // only relevant if PDB_ONE +#define NVC56F_MEM_OP_D_OPERATION 31:27 +#define NVC56F_MEM_OP_D_OPERATION_MEMBAR 0x00000005 +#define NVC56F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NVC56F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE_TARGETED 0x0000000a +#define NVC56F_MEM_OP_D_OPERATION_L2_PEERMEM_INVALIDATE 0x0000000d +#define NVC56F_MEM_OP_D_OPERATION_L2_SYSMEM_INVALIDATE 0x0000000e +// CLEAN_LINES is an alias for Tegra/GPU IP usage +#define NVC56F_MEM_OP_B_OPERATION_L2_INVALIDATE_CLEAN_LINES 0x0000000e +#define NVC56F_MEM_OP_D_OPERATION_L2_CLEAN_COMPTAGS 0x0000000f +#define NVC56F_MEM_OP_D_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NVC56F_MEM_OP_D_OPERATION_L2_WAIT_FOR_SYS_PENDING_READS 0x00000015 +#define NVC56F_MEM_OP_D_OPERATION_ACCESS_COUNTER_CLR 0x00000016 +#define NVC56F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE 1:0 +#define NVC56F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_MIMC 0x00000000 +#define NVC56F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_MOMC 0x00000001 +#define NVC56F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_ALL 0x00000002 +#define NVC56F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_TARGETED 0x00000003 +#define NVC56F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE 2:2 +#define NVC56F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE_MIMC 0x00000000 +#define NVC56F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE_MOMC 0x00000001 +#define NVC56F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_BANK 6:3 +#define NVC56F_SET_REFERENCE (0x00000050) +#define NVC56F_SET_REFERENCE_COUNT 31:0 +#define NVC56F_SEM_ADDR_LO (0x0000005c) +#define NVC56F_SEM_ADDR_LO_OFFSET 31:2 +#define NVC56F_SEM_ADDR_HI (0x00000060) +#define NVC56F_SEM_ADDR_HI_OFFSET 7:0 +#define NVC56F_SEM_PAYLOAD_LO (0x00000064) +#define NVC56F_SEM_PAYLOAD_LO_PAYLOAD 31:0 +#define NVC56F_SEM_PAYLOAD_HI (0x00000068) +#define NVC56F_SEM_PAYLOAD_HI_PAYLOAD 31:0 +#define NVC56F_SEM_EXECUTE (0x0000006c) +#define NVC56F_SEM_EXECUTE_OPERATION 2:0 +#define NVC56F_SEM_EXECUTE_OPERATION_ACQUIRE 0x00000000 +#define NVC56F_SEM_EXECUTE_OPERATION_RELEASE 0x00000001 +#define NVC56F_SEM_EXECUTE_OPERATION_ACQ_STRICT_GEQ 0x00000002 +#define NVC56F_SEM_EXECUTE_OPERATION_ACQ_CIRC_GEQ 0x00000003 +#define NVC56F_SEM_EXECUTE_OPERATION_ACQ_AND 0x00000004 +#define NVC56F_SEM_EXECUTE_OPERATION_ACQ_NOR 0x00000005 +#define NVC56F_SEM_EXECUTE_OPERATION_REDUCTION 0x00000006 +#define NVC56F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG 12:12 +#define NVC56F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG_DIS 0x00000000 +#define NVC56F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG_EN 0x00000001 +#define NVC56F_SEM_EXECUTE_RELEASE_WFI 20:20 +#define NVC56F_SEM_EXECUTE_RELEASE_WFI_DIS 0x00000000 +#define NVC56F_SEM_EXECUTE_RELEASE_WFI_EN 0x00000001 +#define NVC56F_SEM_EXECUTE_PAYLOAD_SIZE 24:24 +#define NVC56F_SEM_EXECUTE_PAYLOAD_SIZE_32BIT 0x00000000 +#define NVC56F_SEM_EXECUTE_PAYLOAD_SIZE_64BIT 0x00000001 +#define NVC56F_SEM_EXECUTE_RELEASE_TIMESTAMP 25:25 +#define NVC56F_SEM_EXECUTE_RELEASE_TIMESTAMP_DIS 0x00000000 +#define NVC56F_SEM_EXECUTE_RELEASE_TIMESTAMP_EN 0x00000001 +#define NVC56F_SEM_EXECUTE_REDUCTION 30:27 +#define NVC56F_SEM_EXECUTE_REDUCTION_IMIN 0x00000000 +#define NVC56F_SEM_EXECUTE_REDUCTION_IMAX 0x00000001 +#define NVC56F_SEM_EXECUTE_REDUCTION_IXOR 0x00000002 +#define NVC56F_SEM_EXECUTE_REDUCTION_IAND 0x00000003 +#define NVC56F_SEM_EXECUTE_REDUCTION_IOR 0x00000004 +#define NVC56F_SEM_EXECUTE_REDUCTION_IADD 0x00000005 +#define NVC56F_SEM_EXECUTE_REDUCTION_INC 0x00000006 +#define NVC56F_SEM_EXECUTE_REDUCTION_DEC 0x00000007 +#define NVC56F_SEM_EXECUTE_REDUCTION_FORMAT 31:31 +#define NVC56F_SEM_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000000 +#define NVC56F_SEM_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000001 +#define NVC56F_WFI (0x00000078) +#define NVC56F_WFI_SCOPE 0:0 +#define NVC56F_WFI_SCOPE_CURRENT_SCG_TYPE 0x00000000 +#define NVC56F_WFI_SCOPE_CURRENT_VEID 0x00000000 +#define NVC56F_WFI_SCOPE_ALL 0x00000001 +#define NVC56F_YIELD (0x00000080) +#define NVC56F_YIELD_OP 1:0 +#define NVC56F_YIELD_OP_NOP 0x00000000 +#define NVC56F_YIELD_OP_TSG 0x00000003 +#define NVC56F_CLEAR_FAULTED (0x00000084) +// Note: RM provides the HANDLE as an opaque value; the internal detail fields +// are intentionally not exposed to the driver through these defines. +#define NVC56F_CLEAR_FAULTED_HANDLE 30:0 +#define NVC56F_CLEAR_FAULTED_TYPE 31:31 +#define NVC56F_CLEAR_FAULTED_TYPE_PBDMA_FAULTED 0x00000000 +#define NVC56F_CLEAR_FAULTED_TYPE_ENG_FAULTED 0x00000001 + + +/* GPFIFO entry format */ +#define NVC56F_GP_ENTRY__SIZE 8 +#define NVC56F_GP_ENTRY0_FETCH 0:0 +#define NVC56F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVC56F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVC56F_GP_ENTRY0_GET 31:2 +#define NVC56F_GP_ENTRY0_OPERAND 31:0 +#define NVC56F_GP_ENTRY1_GET_HI 7:0 +#define NVC56F_GP_ENTRY1_LEVEL 9:9 +#define NVC56F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVC56F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVC56F_GP_ENTRY1_LENGTH 30:10 +#define NVC56F_GP_ENTRY1_SYNC 31:31 +#define NVC56F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVC56F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVC56F_GP_ENTRY1_OPCODE 7:0 +#define NVC56F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVC56F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVC56F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVC56F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 + +/* dma method formats */ +#define NVC56F_DMA_METHOD_ADDRESS_OLD 12:2 +#define NVC56F_DMA_METHOD_ADDRESS 11:0 +#define NVC56F_DMA_SUBDEVICE_MASK 15:4 +#define NVC56F_DMA_METHOD_SUBCHANNEL 15:13 +#define NVC56F_DMA_TERT_OP 17:16 +#define NVC56F_DMA_TERT_OP_GRP0_INC_METHOD (0x00000000) +#define NVC56F_DMA_TERT_OP_GRP0_SET_SUB_DEV_MASK (0x00000001) +#define NVC56F_DMA_TERT_OP_GRP0_STORE_SUB_DEV_MASK (0x00000002) +#define NVC56F_DMA_TERT_OP_GRP0_USE_SUB_DEV_MASK (0x00000003) +#define NVC56F_DMA_TERT_OP_GRP2_NON_INC_METHOD (0x00000000) +#define NVC56F_DMA_METHOD_COUNT_OLD 28:18 +#define NVC56F_DMA_METHOD_COUNT 28:16 +#define NVC56F_DMA_IMMD_DATA 28:16 +#define NVC56F_DMA_SEC_OP 31:29 +#define NVC56F_DMA_SEC_OP_GRP0_USE_TERT (0x00000000) +#define NVC56F_DMA_SEC_OP_INC_METHOD (0x00000001) +#define NVC56F_DMA_SEC_OP_GRP2_USE_TERT (0x00000002) +#define NVC56F_DMA_SEC_OP_NON_INC_METHOD (0x00000003) +#define NVC56F_DMA_SEC_OP_IMMD_DATA_METHOD (0x00000004) +#define NVC56F_DMA_SEC_OP_ONE_INC (0x00000005) +#define NVC56F_DMA_SEC_OP_RESERVED6 (0x00000006) +#define NVC56F_DMA_SEC_OP_END_PB_SEGMENT (0x00000007) +/* dma incrementing method format */ +#define NVC56F_DMA_INCR_ADDRESS 11:0 +#define NVC56F_DMA_INCR_SUBCHANNEL 15:13 +#define NVC56F_DMA_INCR_COUNT 28:16 +#define NVC56F_DMA_INCR_OPCODE 31:29 +#define NVC56F_DMA_INCR_OPCODE_VALUE (0x00000001) +#define NVC56F_DMA_INCR_DATA 31:0 +/* dma non-incrementing method format */ +#define NVC56F_DMA_NONINCR_ADDRESS 11:0 +#define NVC56F_DMA_NONINCR_SUBCHANNEL 15:13 +#define NVC56F_DMA_NONINCR_COUNT 28:16 +#define NVC56F_DMA_NONINCR_OPCODE 31:29 +#define NVC56F_DMA_NONINCR_OPCODE_VALUE (0x00000003) +#define NVC56F_DMA_NONINCR_DATA 31:0 +/* dma increment-once method format */ +#define NVC56F_DMA_ONEINCR_ADDRESS 11:0 +#define NVC56F_DMA_ONEINCR_SUBCHANNEL 15:13 +#define NVC56F_DMA_ONEINCR_COUNT 28:16 +#define NVC56F_DMA_ONEINCR_OPCODE 31:29 +#define NVC56F_DMA_ONEINCR_OPCODE_VALUE (0x00000005) +#define NVC56F_DMA_ONEINCR_DATA 31:0 +/* dma no-operation format */ +#define NVC56F_DMA_NOP (0x00000000) +/* dma immediate-data format */ +#define NVC56F_DMA_IMMD_ADDRESS 11:0 +#define NVC56F_DMA_IMMD_SUBCHANNEL 15:13 +#define NVC56F_DMA_IMMD_DATA 28:16 +#define NVC56F_DMA_IMMD_OPCODE 31:29 +#define NVC56F_DMA_IMMD_OPCODE_VALUE (0x00000004) +/* dma set sub-device mask format */ +#define NVC56F_DMA_SET_SUBDEVICE_MASK_VALUE 15:4 +#define NVC56F_DMA_SET_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC56F_DMA_SET_SUBDEVICE_MASK_OPCODE_VALUE (0x00000001) +/* dma store sub-device mask format */ +#define NVC56F_DMA_STORE_SUBDEVICE_MASK_VALUE 15:4 +#define NVC56F_DMA_STORE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC56F_DMA_STORE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000002) +/* dma use sub-device mask format */ +#define NVC56F_DMA_USE_SUBDEVICE_MASK_OPCODE 31:16 +#define NVC56F_DMA_USE_SUBDEVICE_MASK_OPCODE_VALUE (0x00000003) +/* dma end-segment format */ +#define NVC56F_DMA_ENDSEG_OPCODE 31:29 +#define NVC56F_DMA_ENDSEG_OPCODE_VALUE (0x00000007) +/* dma legacy incrementing/non-incrementing formats */ +#define NVC56F_DMA_ADDRESS 12:2 +#define NVC56F_DMA_SUBCH 15:13 +#define NVC56F_DMA_OPCODE3 17:16 +#define NVC56F_DMA_OPCODE3_NONE (0x00000000) +#define NVC56F_DMA_COUNT 28:18 +#define NVC56F_DMA_OPCODE 31:29 +#define NVC56F_DMA_OPCODE_METHOD (0x00000000) +#define NVC56F_DMA_OPCODE_NONINC_METHOD (0x00000002) +#define NVC56F_DMA_DATA 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc56f_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc56fsw.h b/userspace/sdks/nv570/inc/class/clc56fsw.h new file mode 100644 index 0000000..13496be --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc56fsw.h @@ -0,0 +1,44 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* This file is *not* auto-generated. */ + +#ifndef _clc56f_sw_h_ +#define _clc56f_sw_h_ + +#define NVC56F_NOTIFIERS_RC (0) +#define NVC56F_NOTIFIERS_REFCNT (1) +#define NVC56F_NOTIFIERS_NONSTALL (2) +#define NVC56F_NOTIFIERS_EVENTBUFFER (3) +#define NVC56F_NOTIFIERS_IDLECHANNEL (4) +#define NVC56F_NOTIFIERS_ENDCTX (5) +#define NVC56F_NOTIFIERS_SW (6) +#define NVC56F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVC56F_NOTIFIERS_REPLAYABLE_FAULT (8) +#define NVC56F_NOTIFIERS_MAXCOUNT (9) + +/* NvNotification[] fields and values */ +#define NVC56F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVC56F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _clc56f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc570.h b/userspace/sdks/nv570/inc/class/clc570.h new file mode 100644 index 0000000..461736b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc570.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc570.finn +// + +#define NVC570_DISPLAY (0xc570U) /* finn: Evaluated from "NVC570_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NVC570_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc570U) + +typedef struct NVC570_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numPiors; // Number of PIORs in this chip/display +} NVC570_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc572.h b/userspace/sdks/nv570/inc/class/clc572.h new file mode 100644 index 0000000..79dd9b3 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc572.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc572_h_ +#define _clc572_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define PHYSICAL_CHANNEL_GPFIFO (0x0000C572) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif /* _clc572_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc573.h b/userspace/sdks/nv570/inc/class/clc573.h new file mode 100644 index 0000000..5cd57a8 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc573.h @@ -0,0 +1,606 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc573_h_ +#define _clc573_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC573_DISP_CAPABILITIES 0xC573 + +typedef volatile struct _clc573_tag0 { + NvU32 dispCapabilities[0x400]; +} _NvC573DispCapabilities,NvC573DispCapabilities_Map ; + + +#define NVC573_SYS_CAP 0x0 /* RW-4R */ +#define NVC573_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVC573_SYS_CAP_HEAD0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVC573_SYS_CAP_HEAD1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVC573_SYS_CAP_HEAD2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVC573_SYS_CAP_HEAD3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVC573_SYS_CAP_HEAD4_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVC573_SYS_CAP_HEAD5_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVC573_SYS_CAP_HEAD6_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVC573_SYS_CAP_HEAD7_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC573_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVC573_SYS_CAP_HEAD_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVC573_SYS_CAP_SOR0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVC573_SYS_CAP_SOR1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVC573_SYS_CAP_SOR2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVC573_SYS_CAP_SOR3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVC573_SYS_CAP_SOR4_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVC573_SYS_CAP_SOR5_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVC573_SYS_CAP_SOR6_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVC573_SYS_CAP_SOR7_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVC573_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVC573_SYS_CAP_SOR_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB 0x4 /* RW-4R */ +#define NVC573_SYS_CAPB_WINDOW0_EXISTS 0:0 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW1_EXISTS 1:1 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW2_EXISTS 2:2 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW3_EXISTS 3:3 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW4_EXISTS 4:4 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW4_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW5_EXISTS 5:5 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW5_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW6_EXISTS 6:6 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW6_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW7_EXISTS 7:7 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW7_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW8_EXISTS 8:8 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW8_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW9_EXISTS 9:9 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW9_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW10_EXISTS 10:10 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW10_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW11_EXISTS 11:11 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW11_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW12_EXISTS 12:12 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW12_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW13_EXISTS 13:13 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW13_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW14_EXISTS 14:14 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW14_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW15_EXISTS 15:15 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW15_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW16_EXISTS 16:16 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW16_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW17_EXISTS 17:17 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW17_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW18_EXISTS 18:18 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW18_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW19_EXISTS 19:19 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW19_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW20_EXISTS 20:20 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW20_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW21_EXISTS 21:21 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW21_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW22_EXISTS 22:22 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW22_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW23_EXISTS 23:23 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW23_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW24_EXISTS 24:24 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW24_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW25_EXISTS 25:25 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW25_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW26_EXISTS 26:26 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW26_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW27_EXISTS 27:27 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW27_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW28_EXISTS 28:28 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW28_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW29_EXISTS 29:29 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW29_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW30_EXISTS 30:30 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW30_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW31_EXISTS 31:31 /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW31_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC573_SYS_CAPB_WINDOW_EXISTS__SIZE_1 32 /* */ +#define NVC573_SYS_CAPB_WINDOW_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SYS_CAPB_WINDOW_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC573_SYS_CAPB_WINDOW_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA 0x10 /* RW-4R */ +#define NVC573_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES 15:0 /* RWIUF */ +#define NVC573_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES_INIT 0x00000000 /* RWI-V */ +#define NVC573_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH 17:16 /* RWIVF */ +#define NVC573_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC573_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_32B 0x00000000 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_64B 0x00000001 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_128B 0x00000002 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_256B 0x00000003 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_PLANAR 19:19 /* RWIVF */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_PLANAR_INIT 0x00000000 /* RWI-V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_PLANAR_FALSE 0x00000000 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_VGA 20:20 /* RWIVF */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_VGA_INIT 0x00000000 /* RWI-V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION 21:21 /* RWIVF */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_INIT 0x00000000 /* RWI-V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_TRUE 0x00000001 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MSCG 22:22 /* RWIVF */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MSCG_INIT 0x00000000 /* RWI-V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MSCG_FALSE 0x00000000 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MSCG_TRUE 0x00000001 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH 23:23 /* RWIVF */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_INIT 0x00000000 /* RWI-V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_FALSE 0x00000000 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_TRUE 0x00000001 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT 26:26 /* RWIVF */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION 31:30 /* RWIVF */ +#define NVC573_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_INIT 0x00000000 /* RWI-V */ +#define NVC573_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_32B 0x00000000 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_64B 0x00000001 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_128B 0x00000002 /* RW--V */ +#define NVC573_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_256B 0x00000003 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA(i) (0x680+(i)*32) /* RW-4A */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA__SIZE_1 8 /* */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_FULL_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_UNIT_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT 16:16 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT 17:17 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT 18:18 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OLPF_PRESENT 19:19 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OLPF_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OLPF_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OLPF_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT 20:20 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT 21:21 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT 22:22 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB(i) (0x684+(i)*32) /* RW-4A */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB__SIZE_1 8 /* */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_VGA 0:0 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_VGA_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGSZ 9:6 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGNR 12:10 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT 15:15 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC(i) (0x688+(i)*32) /* RW-4A */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC__SIZE_1 8 /* */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC0_PRECISION 4:0 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC0_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC1_PRECISION 12:8 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC1_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP 13:13 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_SF_PRECISION 20:16 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_SF_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_CI_PRECISION 24:21 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_CI_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB 25:25 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPD(i) (0x68c+(i)*32) /* RW-4A */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPD__SIZE_1 8 /* */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE(i) (0x690+(i)*32) /* RW-4A */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE__SIZE_1 8 /* */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_RATEBUFSIZE 3:0 /* RWIUF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_RATEBUFSIZE_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_LINEBUFSIZE 13:8 /* RWIUF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_LINEBUFSIZE_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422 16:16 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_INIT 0x00000000 /* RWI-V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420 17:17 /* RWIVF */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_TRUE 0x00000001 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_FALSE 0x00000000 /* RW--V */ +#define NVC573_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVC573_SOR_CAP__SIZE_1 8 /* */ +#define NVC573_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVC573_SOR_CAP_SINGLE_LVDS_18_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVC573_SOR_CAP_SINGLE_LVDS_24_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVC573_SOR_CAP_DUAL_LVDS_18_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVC573_SOR_CAP_DUAL_LVDS_24_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVC573_SOR_CAP_SINGLE_TMDS_A_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVC573_SOR_CAP_SINGLE_TMDS_B_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVC573_SOR_CAP_DUAL_TMDS_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVC573_SOR_CAP_DISPLAY_OVER_PCIE_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVC573_SOR_CAP_SDI_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVC573_SOR_CAP_DP_A_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVC573_SOR_CAP_DP_B_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVC573_SOR_CAP_DP_INTERLACE_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVC573_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVC573_SOR_CAP_DP_8_LANES_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVC573_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA(i) (0x780+(i)*32) /* RW-4A */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA__SIZE_1 32 /* */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH 13:10 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT 16:16 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT 17:17 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT 18:18 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT 19:19 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT 20:20 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT 21:21 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT 22:22 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT 23:23 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT 24:24 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB(i) (0x784+(i)*32) /* RW-4A */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB__SIZE_1 32 /* */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION 4:0 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ 9:6 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR 12:10 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT 15:15 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC(i) (0x788+(i)*32) /* RW-4A */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC__SIZE_1 32 /* */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION 4:0 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGSZ 9:6 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGNR 12:10 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT 15:15 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION 20:16 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD(i) (0x78c+(i)*32) /* RW-4A */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD__SIZE_1 32 /* */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ 3:0 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR 6:4 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD 8:8 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT 9:9 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION 16:12 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION 20:17 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB 21:21 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA 22:22 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE(i) (0x790+(i)*32) /* RW-4A */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE__SIZE_1 32 /* */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION 4:0 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGSZ 9:6 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGNR 12:10 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT 15:15 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION 20:16 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPF(i) (0x794+(i)*32) /* RW-4A */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPF__SIZE_1 32 /* */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP_INIT 0x00000000 /* RWI-V */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVC573_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP_INIT 0x00000000 /* RWI-V */ +#define NVC573_SOR_CLK_CAP(i) (0x608+(i)*4) /* RW-4A */ +#define NVC573_SOR_CLK_CAP__SIZE_1 8 /* */ +#define NVC573_SOR_CLK_CAP_DP_MAX 7:0 /* RWIUF */ +#define NVC573_SOR_CLK_CAP_DP_MAX_INIT 0x00000051 /* RWI-V */ +#define NVC573_SOR_CLK_CAP_TMDS_MAX 23:16 /* RWIUF */ +#define NVC573_SOR_CLK_CAP_TMDS_MAX_INIT 0x0000003C /* RWI-V */ +#define NVC573_SOR_CLK_CAP_LVDS_MAX 31:24 /* RWIUF */ +#define NVC573_SOR_CLK_CAP_LVDS_MAX_INIT 0x00000000 /* RWI-V */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clc573_h_ diff --git a/userspace/sdks/nv570/inc/class/clc574.h b/userspace/sdks/nv570/inc/class/clc574.h new file mode 100644 index 0000000..077a57f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc574.h @@ -0,0 +1,41 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc574.finn +// + +#define UVM_CHANNEL_RETAINER (0xc574U) /* finn: Evaluated from "NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS_MESSAGE_ID" */ + +#define NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS_MESSAGE_ID (0xc574U) + +typedef struct NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS { + NvHandle hClient; + NvHandle hChannel; +} NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS; + diff --git a/userspace/sdks/nv570/inc/class/clc57a.h b/userspace/sdks/nv570/inc/class/clc57a.h new file mode 100644 index 0000000..2dcc60b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc57a.h @@ -0,0 +1,213 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc57a__h_ +#define _clc57a__h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC57A_CURSOR_IMM_CHANNEL_PIO (0x0000C57A) + +typedef volatile struct _clc57a_tag0 { + NvV32 Reserved00[0x2]; + NvV32 Free; // 0x00000008 - 0x0000000B + NvV32 Reserved01[0x7D]; + NvV32 Update; // 0x00000200 - 0x00000203 + NvV32 SetInterlockFlags; // 0x00000204 - 0x00000207 + NvV32 SetCursorHotSpotPointOut[2]; // 0x00000208 - 0x0000020F + NvV32 SetWindowInterlockFlags; // 0x00000210 - 0x00000213 + NvV32 Reserved02[0x37B]; +} NVC57ADispCursorImmControlPio; + +#define NVC57A_FREE (0x00000008) +#define NVC57A_FREE_COUNT 5:0 +#define NVC57A_UPDATE (0x00000200) +#define NVC57A_UPDATE_RELEASE_ELV 0:0 +#define NVC57A_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC57A_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC57A_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC57A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC57A_SET_INTERLOCK_FLAGS (0x00000204) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC57A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC57A_SET_CURSOR_HOT_SPOT_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC57A_SET_CURSOR_HOT_SPOT_POINT_OUT_X 15:0 +#define NVC57A_SET_CURSOR_HOT_SPOT_POINT_OUT_Y 31:16 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS (0x00000210) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC57A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc57a_h + diff --git a/userspace/sdks/nv570/inc/class/clc57b.h b/userspace/sdks/nv570/inc/class/clc57b.h new file mode 100644 index 0000000..f44d9a2 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc57b.h @@ -0,0 +1,67 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC57b_h_ +#define _clC57b_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC57B_WINDOW_IMM_CHANNEL_DMA (0x0000C57B) + +// dma opcode instructions +#define NVC57B_DMA +#define NVC57B_DMA_OPCODE 31:29 +#define NVC57B_DMA_OPCODE_METHOD 0x00000000 +#define NVC57B_DMA_OPCODE_JUMP 0x00000001 +#define NVC57B_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC57B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC57B_DMA_METHOD_COUNT 27:18 +#define NVC57B_DMA_METHOD_OFFSET 13:2 +#define NVC57B_DMA_DATA 31:0 +#define NVC57B_DMA_DATA_NOP 0x00000000 +#define NVC57B_DMA_JUMP_OFFSET 11:2 +#define NVC57B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC57B_PUT (0x00000000) +#define NVC57B_PUT_PTR 9:0 +#define NVC57B_GET (0x00000004) +#define NVC57B_GET_PTR 9:0 +#define NVC57B_UPDATE (0x00000200) +#define NVC57B_UPDATE_RELEASE_ELV 0:0 +#define NVC57B_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC57B_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC57B_UPDATE_INTERLOCK_WITH_WINDOW 1:1 +#define NVC57B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC57B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC57B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC57B_SET_POINT_OUT_X 15:0 +#define NVC57B_SET_POINT_OUT_Y 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC57b_h diff --git a/userspace/sdks/nv570/inc/class/clc57d.h b/userspace/sdks/nv570/inc/class/clc57d.h new file mode 100644 index 0000000..4f415d0 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc57d.h @@ -0,0 +1,1277 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC57d_h_ +#define _clC57d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC57D_CORE_CHANNEL_DMA (0x0000C57D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVC57D_DMA +#define NVC57D_DMA_OPCODE 31:29 +#define NVC57D_DMA_OPCODE_METHOD 0x00000000 +#define NVC57D_DMA_OPCODE_JUMP 0x00000001 +#define NVC57D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC57D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC57D_DMA_METHOD_COUNT 27:18 +#define NVC57D_DMA_METHOD_OFFSET 13:2 +#define NVC57D_DMA_DATA 31:0 +#define NVC57D_DMA_DATA_NOP 0x00000000 +#define NVC57D_DMA_JUMP_OFFSET 11:2 +#define NVC57D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + +// class methods +#define NVC57D_PUT (0x00000000) +#define NVC57D_PUT_PTR 9:0 +#define NVC57D_GET (0x00000004) +#define NVC57D_GET_PTR 9:0 +#define NVC57D_UPDATE (0x00000200) +#define NVC57D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVC57D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVC57D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVC57D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVC57D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVC57D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVC57D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVC57D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVC57D_UPDATE_RELEASE_ELV 0:0 +#define NVC57D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC57D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC57D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC57D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC57D_SET_CONTEXT_DMA_NOTIFIER (0x00000208) +#define NVC57D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NVC57D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVC57D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC57D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC57D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC57D_SET_NOTIFIER_CONTROL_OFFSET 11:4 +#define NVC57D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVC57D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVC57D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVC57D_SET_CONTROL (0x00000210) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVC57D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC57D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC57D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC57D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVC57D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVC57D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVC57D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVC57D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVC57D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVC57D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVC57D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVC57D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVC57D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVC57D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVC57D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) + +#define NVC57D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC57D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC57D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVC57D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVC57D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVC57D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVC57D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVC57D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVC57D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVC57D_SOR_SET_CONTROL_PROTOCOL_DSI (0x0000000A) +#define NVC57D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVC57D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVC57D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC57D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC57D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVC57D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVC57D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVC57D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVC57D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVC57D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVC57D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVC57D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVC57D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVC57D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVC57D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVC57D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVC57D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVC57D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVC57D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC57D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED 16:16 +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED 28:28 +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_TRUE (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) + +#define NVC57D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000400) +#define NVC57D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVC57D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVC57D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVC57D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVC57D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVC57D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVC57D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVC57D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVC57D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000400) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN 31:26 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN0 (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN1 (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN2 (0x00000002) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN3 (0x00000003) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN4 (0x00000004) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN5 (0x00000005) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN6 (0x00000006) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN7 (0x00000007) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN8 (0x00000008) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN9 (0x00000009) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN10 (0x0000000A) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN11 (0x0000000B) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN12 (0x0000000C) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN13 (0x0000000D) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN14 (0x0000000E) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN15 (0x0000000F) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN16 (0x00000010) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN17 (0x00000011) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN18 (0x00000012) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN19 (0x00000013) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN20 (0x00000014) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN21 (0x00000015) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN22 (0x00000016) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN23 (0x00000017) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN24 (0x00000018) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN25 (0x00000019) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN26 (0x0000001A) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN27 (0x0000001B) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN28 (0x0000001C) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN29 (0x0000001D) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN30 (0x0000001E) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN31 (0x0000001F) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_NONE (0x0000003F) +#define NVC57D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000400) +#define NVC57D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVC57D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVC57D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE 11:10 +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN 8:4 +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_LOCKOUT_WINDOW 15:12 +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_MODE 23:22 +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN 20:16 +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC57D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC57D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE 30:30 +#define NVC57D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE 31:31 +#define NVC57D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000400) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC57D_HEAD_SET_PIXEL_REORDER_CONTROL(a) (0x00002010 + (a)*0x00000400) +#define NVC57D_HEAD_SET_PIXEL_REORDER_CONTROL_BANK_WIDTH 13:0 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000400) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC57D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVC57D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVC57D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVC57D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVC57D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVC57D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVC57D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVC57D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVC57D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVC57D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVC57D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVC57D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVC57D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVC57D_HEAD_SET_DITHER_CONTROL_MODE_ROUND (0x00000005) +#define NVC57D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000400) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVC57D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000400 + (b)*0x00000004) +#define NVC57D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000400) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC57D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000400) +#define NVC57D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC57D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000400) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED 4:4 +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_FALSE (0x00000000) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_TRUE (0x00000001) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS 14:12 +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC57D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000400) +#define NVC57D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVC57D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVC57D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVC57D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVC57D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVC57D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC57D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC57D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVC57D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVC57D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVC57D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVC57D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVC57D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC57D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000400) +#define NVC57D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVC57D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000400) +#define NVC57D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVC57D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVC57D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000400) +#define NVC57D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVC57D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVC57D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000400) +#define NVC57D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVC57D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVC57D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000400) +#define NVC57D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVC57D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVC57D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000400) +#define NVC57D_HEAD_SET_RASTER_SIZE_WIDTH 14:0 +#define NVC57D_HEAD_SET_RASTER_SIZE_HEIGHT 30:16 +#define NVC57D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000400) +#define NVC57D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVC57D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVC57D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000400) +#define NVC57D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVC57D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVC57D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000400) +#define NVC57D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVC57D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVC57D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVC57D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVC57D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVC57D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000400) +#define NVC57D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVC57D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVC57D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVC57D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000400) +#define NVC57D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVC57D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVC57D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVC57D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVC57D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVC57D_HEAD_SET_CONTEXT_DMA_CURSOR(a,b) (0x00002088 + (a)*0x00000400 + (b)*0x00000004) +#define NVC57D_HEAD_SET_CONTEXT_DMA_CURSOR_HANDLE 31:0 +#define NVC57D_HEAD_SET_OFFSET_CURSOR(a,b) (0x00002090 + (a)*0x00000400 + (b)*0x00000004) +#define NVC57D_HEAD_SET_OFFSET_CURSOR_ORIGIN 31:0 +#define NVC57D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000400) +#define NVC57D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVC57D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVC57D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000400) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000400) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS 20:20 +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_CONTEXT_DMA_CRC(a) (0x00002180 + (a)*0x00000400) +#define NVC57D_HEAD_SET_CONTEXT_DMA_CRC_HANDLE 31:0 +#define NVC57D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000400) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 5:0 +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_0 (0x00000000) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_1 (0x00000001) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_2 (0x00000002) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_3 (0x00000003) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_4 (0x00000004) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_5 (0x00000005) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_6 (0x00000006) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_7 (0x00000007) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_8 (0x00000008) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_9 (0x00000009) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_10 (0x0000000A) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_11 (0x0000000B) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_12 (0x0000000C) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_13 (0x0000000D) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_14 (0x0000000E) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_15 (0x0000000F) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_16 (0x00000010) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_17 (0x00000011) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_18 (0x00000012) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_19 (0x00000013) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_20 (0x00000014) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_21 (0x00000015) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_22 (0x00000016) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_23 (0x00000017) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_24 (0x00000018) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_25 (0x00000019) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_26 (0x0000001A) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_27 (0x0000001B) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_28 (0x0000001C) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_29 (0x0000001D) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_30 (0x0000001E) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_31 (0x0000001F) +#define NVC57D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000020) +#define NVC57D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVC57D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVC57D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVC57D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVC57D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVC57D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVC57D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000400) +#define NVC57D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVC57D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVC57D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000400) +#define NVC57D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVC57D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000400) +#define NVC57D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVC57D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000400) +#define NVC57D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVC57D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000400) +#define NVC57D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVC57D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DISPLAY_RATE_RUN_MODE 0:0 +#define NVC57D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVC57D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVC57D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVC57D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVC57D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE(a) (0x00002214 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC57D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC57D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000400) +#define NVC57D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVC57D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 +#define NVC57D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED(a) (0x00002220 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_ALPHA 7:0 +#define NVC57D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_RED 31:16 +#define NVC57D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE(a) (0x00002224 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_GREEN 15:0 +#define NVC57D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_BLUE 31:16 +#define NVC57D_HEAD_SET_CURSOR_COLOR_NORM_SCALE(a) (0x00002228 + (a)*0x00000400) +#define NVC57D_HEAD_SET_CURSOR_COLOR_NORM_SCALE_VALUE 15:0 +#define NVC57D_HEAD_SET_XOR_BLEND_FACTOR(a) (0x0000222C + (a)*0x00000400) +#define NVC57D_HEAD_SET_XOR_BLEND_FACTOR_LOG2PEAK_LUMINANCE 3:0 +#define NVC57D_HEAD_SET_XOR_BLEND_FACTOR_S1 16:4 +#define NVC57D_HEAD_SET_XOR_BLEND_FACTOR_S2 30:18 +#define NVC57D_HEAD_SET_CLAMP_RANGE_GREEN(a) (0x00002238 + (a)*0x00000400) +#define NVC57D_HEAD_SET_CLAMP_RANGE_GREEN_LOW 11:0 +#define NVC57D_HEAD_SET_CLAMP_RANGE_GREEN_HIGH 27:16 +#define NVC57D_HEAD_SET_CLAMP_RANGE_RED_BLUE(a) (0x0000223C + (a)*0x00000400) +#define NVC57D_HEAD_SET_CLAMP_RANGE_RED_BLUE_LOW 11:0 +#define NVC57D_HEAD_SET_CLAMP_RANGE_RED_BLUE_HIGH 27:16 +#define NVC57D_HEAD_SET_OCSC0CONTROL(a) (0x00002240 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0CONTROL_ENABLE 0:0 +#define NVC57D_HEAD_SET_OCSC0CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_OCSC0CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C00(a) (0x00002244 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C00_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C01(a) (0x00002248 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C01_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C02(a) (0x0000224C + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C02_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C03(a) (0x00002250 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C03_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C10(a) (0x00002254 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C10_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C11(a) (0x00002258 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C11_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C12(a) (0x0000225C + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C12_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C13(a) (0x00002260 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C13_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C20(a) (0x00002264 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C20_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C21(a) (0x00002268 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C21_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C22(a) (0x0000226C + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C22_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C23(a) (0x00002270 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC0COEFFICIENT_C23_VALUE 20:0 +#define NVC57D_HEAD_SET_OLUT_CONTROL(a) (0x00002280 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OLUT_CONTROL_INTERPOLATE 0:0 +#define NVC57D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_OLUT_CONTROL_MIRROR 1:1 +#define NVC57D_HEAD_SET_OLUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_OLUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_OLUT_CONTROL_MODE 3:2 +#define NVC57D_HEAD_SET_OLUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC57D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC57D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC57D_HEAD_SET_OLUT_CONTROL_SIZE 18:8 +#define NVC57D_HEAD_SET_OLUT_FP_NORM_SCALE(a) (0x00002284 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OLUT_FP_NORM_SCALE_VALUE 31:0 +#define NVC57D_HEAD_SET_CONTEXT_DMA_OLUT(a) (0x00002288 + (a)*0x00000400) +#define NVC57D_HEAD_SET_CONTEXT_DMA_OLUT_HANDLE 31:0 +#define NVC57D_HEAD_SET_OFFSET_OLUT(a) (0x0000228C + (a)*0x00000400) +#define NVC57D_HEAD_SET_OFFSET_OLUT_ORIGIN 31:0 +#define NVC57D_HEAD_SET_OCSC1CONTROL(a) (0x0000229C + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1CONTROL_ENABLE 0:0 +#define NVC57D_HEAD_SET_OCSC1CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_OCSC1CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C00(a) (0x000022A0 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C00_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C01(a) (0x000022A4 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C01_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C02(a) (0x000022A8 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C02_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C03(a) (0x000022AC + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C03_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C10(a) (0x000022B0 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C10_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C11(a) (0x000022B4 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C11_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C12(a) (0x000022B8 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C12_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C13(a) (0x000022BC + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C13_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C20(a) (0x000022C0 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C20_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C21(a) (0x000022C4 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C21_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C22(a) (0x000022C8 + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C22_VALUE 20:0 +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C23(a) (0x000022CC + (a)*0x00000400) +#define NVC57D_HEAD_SET_OCSC1COEFFICIENT_C23_VALUE 20:0 +#define NVC57D_HEAD_SET_TILE_POSITION(a) (0x000022D0 + (a)*0x00000400) +#define NVC57D_HEAD_SET_TILE_POSITION_X 2:0 +#define NVC57D_HEAD_SET_TILE_POSITION_Y 6:4 +#define NVC57D_HEAD_SET_DSC_CONTROL(a) (0x000022D4 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_CONTROL_ENABLE 0:0 +#define NVC57D_HEAD_SET_DSC_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC57D_HEAD_SET_DSC_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC57D_HEAD_SET_DSC_CONTROL_MODE 2:1 +#define NVC57D_HEAD_SET_DSC_CONTROL_MODE_SINGLE (0x00000000) +#define NVC57D_HEAD_SET_DSC_CONTROL_MODE_DUAL (0x00000001) +#define NVC57D_HEAD_SET_DSC_CONTROL_MODE_QUAD (0x00000002) +#define NVC57D_HEAD_SET_DSC_CONTROL_MODE_DROP (0x00000003) +#define NVC57D_HEAD_SET_DSC_CONTROL_AUTO_RESET 3:3 +#define NVC57D_HEAD_SET_DSC_CONTROL_AUTO_RESET_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_DSC_CONTROL_AUTO_RESET_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION 4:4 +#define NVC57D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_ENABLE (0x00000001) +#define NVC57D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET 5:5 +#define NVC57D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_FALSE (0x00000000) +#define NVC57D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_TRUE (0x00000001) +#define NVC57D_HEAD_SET_DSC_CONTROL_FLATNESS_DET_THRESH 15:6 +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL(a) (0x000022D8 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_ENABLE 0:0 +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_LOCATION 1:1 +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_SIZE 9:2 +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY 10:10 +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC57D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC57D_HEAD_SET_DSC_PPS_HEAD(a) (0x000022DC + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_HEAD_BYTE0 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_HEAD_BYTE1 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_HEAD_BYTE2 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_HEAD_BYTE3 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA0(a) (0x000022E0 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MINOR 3:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MAJOR 7:4 +#define NVC57D_HEAD_SET_DSC_PPS_DATA0_PPS_IDENTIFIER 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA0_RESERVED 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA0_LINEBUF_DEPTH 27:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA0_BITS_PER_COMPONENT 31:28 +#define NVC57D_HEAD_SET_DSC_PPS_DATA1(a) (0x000022E4 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_HIGH 1:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA1_VBR_ENABLE 2:2 +#define NVC57D_HEAD_SET_DSC_PPS_DATA1_SIMPLE422 3:3 +#define NVC57D_HEAD_SET_DSC_PPS_DATA1_CONVERT_RGB 4:4 +#define NVC57D_HEAD_SET_DSC_PPS_DATA1_BLOCK_PRED_ENABLE 5:5 +#define NVC57D_HEAD_SET_DSC_PPS_DATA1_RESERVED 7:6 +#define NVC57D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_LOW 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_HIGH 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_LOW 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA2(a) (0x000022E8 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_HIGH 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_LOW 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_HIGH 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_LOW 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA3(a) (0x000022EC + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_HIGH 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_LOW 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_HIGH 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_LOW 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA4(a) (0x000022F0 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_HIGH 1:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA4_RESERVED 7:2 +#define NVC57D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_LOW 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_HIGH 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_LOW 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA5(a) (0x000022F4 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA5_RESERVED0 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA5_INITIAL_SCALE_VALUE 13:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA5_RESERVED1 15:14 +#define NVC57D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_HIGH 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_LOW 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA6(a) (0x000022F8 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_HIGH 3:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA6_RESERVED0 7:4 +#define NVC57D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_LOW 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA6_RESERVED1 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA6_FIRST_LINE_BPG_OFFSET 28:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA6_RESERVED2 31:29 +#define NVC57D_HEAD_SET_DSC_PPS_DATA7(a) (0x000022FC + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_HIGH 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_LOW 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_HIGH 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_LOW 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA8(a) (0x00002300 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_HIGH 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_LOW 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_HIGH 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_LOW 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA9(a) (0x00002304 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MIN_QP 4:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA9_RESERVED0 7:5 +#define NVC57D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MAX_QP 12:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA9_RESERVED1 15:13 +#define NVC57D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_HIGH 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_LOW 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA10(a) (0x00002308 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA10_RC_EDGE_FACTOR 3:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA10_RESERVED0 7:4 +#define NVC57D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT0 12:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA10_RESERVED1 15:13 +#define NVC57D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT1 20:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA10_RESERVED2 23:21 +#define NVC57D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_LO 27:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_HI 31:28 +#define NVC57D_HEAD_SET_DSC_PPS_DATA11(a) (0x0000230C + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH0 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH1 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH2 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH3 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA12(a) (0x00002310 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH4 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH5 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH6 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH7 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA13(a) (0x00002314 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH8 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH9 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH10 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH11 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA14(a) (0x00002318 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH12 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH13 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_HIGH0 18:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MIN_QP0 23:19 +#define NVC57D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_BPG_OFFSET0 29:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_LOW0 31:30 +#define NVC57D_HEAD_SET_DSC_PPS_DATA15(a) (0x0000231C + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH1 2:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP1 7:3 +#define NVC57D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET1 13:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW1 15:14 +#define NVC57D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH2 18:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP2 23:19 +#define NVC57D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET2 29:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW2 31:30 +#define NVC57D_HEAD_SET_DSC_PPS_DATA16(a) (0x00002320 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH3 2:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP3 7:3 +#define NVC57D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET3 13:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW3 15:14 +#define NVC57D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH4 18:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP4 23:19 +#define NVC57D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET4 29:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW4 31:30 +#define NVC57D_HEAD_SET_DSC_PPS_DATA17(a) (0x00002324 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH5 2:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP5 7:3 +#define NVC57D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET5 13:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW5 15:14 +#define NVC57D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH6 18:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP6 23:19 +#define NVC57D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET6 29:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW6 31:30 +#define NVC57D_HEAD_SET_DSC_PPS_DATA18(a) (0x00002328 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH7 2:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP7 7:3 +#define NVC57D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET7 13:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW7 15:14 +#define NVC57D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH8 18:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP8 23:19 +#define NVC57D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET8 29:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW8 31:30 +#define NVC57D_HEAD_SET_DSC_PPS_DATA19(a) (0x0000232C + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH9 2:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP9 7:3 +#define NVC57D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET9 13:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW9 15:14 +#define NVC57D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH10 18:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP10 23:19 +#define NVC57D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET10 29:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW10 31:30 +#define NVC57D_HEAD_SET_DSC_PPS_DATA20(a) (0x00002330 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH11 2:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP11 7:3 +#define NVC57D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET11 13:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW11 15:14 +#define NVC57D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH12 18:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP12 23:19 +#define NVC57D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET12 29:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW12 31:30 +#define NVC57D_HEAD_SET_DSC_PPS_DATA21(a) (0x00002334 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH13 2:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP13 7:3 +#define NVC57D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET13 13:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW13 15:14 +#define NVC57D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH14 18:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP14 23:19 +#define NVC57D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET14 29:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW14 31:30 +#define NVC57D_HEAD_SET_DSC_PPS_DATA22(a) (0x00002338 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA22_NATIVE422 0:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA22_NATIVE420 1:1 +#define NVC57D_HEAD_SET_DSC_PPS_DATA22_RESERVED0 7:2 +#define NVC57D_HEAD_SET_DSC_PPS_DATA22_SECOND_LINE_BPG_OFFSET 12:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA22_RESERVED1 15:13 +#define NVC57D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSET_HIGH 23:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSETLOW 31:24 +#define NVC57D_HEAD_SET_DSC_PPS_DATA23(a) (0x0000233C + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_HIGH 7:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_LOW 15:8 +#define NVC57D_HEAD_SET_DSC_PPS_DATA23_RESERVED 31:16 +#define NVC57D_HEAD_SET_DSC_PPS_DATA24(a) (0x00002340 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA24_RESERVED 31:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA25(a) (0x00002344 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA25_RESERVED 31:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA26(a) (0x00002348 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA26_RESERVED 31:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA27(a) (0x0000234C + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA27_RESERVED 31:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA28(a) (0x00002350 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA28_RESERVED 31:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA29(a) (0x00002354 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA29_RESERVED 31:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA30(a) (0x00002358 + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA30_RESERVED 31:0 +#define NVC57D_HEAD_SET_DSC_PPS_DATA31(a) (0x0000235C + (a)*0x00000400) +#define NVC57D_HEAD_SET_DSC_PPS_DATA31_RESERVED 31:0 +#define NVC57D_HEAD_SET_RG_MERGE(a) (0x00002360 + (a)*0x00000400) +#define NVC57D_HEAD_SET_RG_MERGE_MODE 1:0 +#define NVC57D_HEAD_SET_RG_MERGE_MODE_DISABLE (0x00000000) +#define NVC57D_HEAD_SET_RG_MERGE_MODE_SETUP (0x00000001) +#define NVC57D_HEAD_SET_RG_MERGE_MODE_MASTER (0x00000002) +#define NVC57D_HEAD_SET_RG_MERGE_MODE_SLAVE (0x00000003) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC57d_h diff --git a/userspace/sdks/nv570/inc/class/clc57e.h b/userspace/sdks/nv570/inc/class/clc57e.h new file mode 100644 index 0000000..d613410 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc57e.h @@ -0,0 +1,657 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC57e_h_ +#define _clC57e_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC57E_WINDOW_CHANNEL_DMA (0x0000C57E) + +// dma opcode instructions +#define NVC57E_DMA +#define NVC57E_DMA_OPCODE 31:29 +#define NVC57E_DMA_OPCODE_METHOD 0x00000000 +#define NVC57E_DMA_OPCODE_JUMP 0x00000001 +#define NVC57E_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC57E_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC57E_DMA_METHOD_COUNT 27:18 +#define NVC57E_DMA_METHOD_OFFSET 13:2 +#define NVC57E_DMA_DATA 31:0 +#define NVC57E_DMA_DATA_NOP 0x00000000 +#define NVC57E_DMA_JUMP_OFFSET 11:2 +#define NVC57E_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC57E_PUT (0x00000000) +#define NVC57E_PUT_PTR 9:0 +#define NVC57E_GET (0x00000004) +#define NVC57E_GET_PTR 9:0 +#define NVC57E_UPDATE (0x00000200) +#define NVC57E_UPDATE_RELEASE_ELV 0:0 +#define NVC57E_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC57E_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC57E_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC57E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC57E_UPDATE_INTERLOCK_WITH_WIN_IMM 12:12 +#define NVC57E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000) +#define NVC57E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001) +#define NVC57E_GET_LINE (0x00000208) +#define NVC57E_GET_LINE_LINE 15:0 +#define NVC57E_SET_SEMAPHORE_CONTROL (0x0000020C) +#define NVC57E_SET_SEMAPHORE_CONTROL_OFFSET 7:0 +#define NVC57E_SET_SEMAPHORE_ACQUIRE (0x00000210) +#define NVC57E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0 +#define NVC57E_SET_SEMAPHORE_RELEASE (0x00000214) +#define NVC57E_SET_SEMAPHORE_RELEASE_VALUE 31:0 +#define NVC57E_SET_CONTEXT_DMA_SEMAPHORE (0x00000218) +#define NVC57E_SET_CONTEXT_DMA_SEMAPHORE_HANDLE 31:0 +#define NVC57E_SET_CONTEXT_DMA_NOTIFIER (0x0000021C) +#define NVC57E_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NVC57E_SET_NOTIFIER_CONTROL (0x00000220) +#define NVC57E_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC57E_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC57E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC57E_SET_NOTIFIER_CONTROL_OFFSET 11:4 +#define NVC57E_SET_SIZE (0x00000224) +#define NVC57E_SET_SIZE_WIDTH 15:0 +#define NVC57E_SET_SIZE_HEIGHT 31:16 +#define NVC57E_SET_STORAGE (0x00000228) +#define NVC57E_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NVC57E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NVC57E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NVC57E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC57E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC57E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC57E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC57E_SET_STORAGE_MEMORY_LAYOUT 4:4 +#define NVC57E_SET_STORAGE_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC57E_SET_STORAGE_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC57E_SET_PARAMS (0x0000022C) +#define NVC57E_SET_PARAMS_FORMAT 7:0 +#define NVC57E_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NVC57E_SET_PARAMS_FORMAT_R4G4B4A4 (0x0000002F) +#define NVC57E_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NVC57E_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC57E_SET_PARAMS_FORMAT_R5G5B5A1 (0x0000002E) +#define NVC57E_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC57E_SET_PARAMS_FORMAT_X8R8G8B8 (0x000000E6) +#define NVC57E_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NVC57E_SET_PARAMS_FORMAT_X8B8G8R8 (0x000000F9) +#define NVC57E_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NVC57E_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NVC57E_SET_PARAMS_FORMAT_X2BL10GL10RL10_XRBIAS (0x00000022) +#define NVC57E_SET_PARAMS_FORMAT_X2BL10GL10RL10_XVYCC (0x00000024) +#define NVC57E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NVC57E_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NVC57E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NVC57E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422 (0x00000028) +#define NVC57E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422 (0x00000029) +#define NVC57E_SET_PARAMS_FORMAT_Y8___U8V8_N444 (0x00000035) +#define NVC57E_SET_PARAMS_FORMAT_Y8___U8V8_N422 (0x00000036) +#define NVC57E_SET_PARAMS_FORMAT_Y8___V8U8_N420 (0x00000038) +#define NVC57E_SET_PARAMS_FORMAT_Y10___U10V10_N444 (0x00000055) +#define NVC57E_SET_PARAMS_FORMAT_Y10___U10V10_N422 (0x00000056) +#define NVC57E_SET_PARAMS_FORMAT_Y10___V10U10_N420 (0x00000058) +#define NVC57E_SET_PARAMS_FORMAT_Y12___U12V12_N444 (0x00000075) +#define NVC57E_SET_PARAMS_FORMAT_Y12___U12V12_N422 (0x00000076) +#define NVC57E_SET_PARAMS_FORMAT_Y12___V12U12_N420 (0x00000078) +#define NVC57E_SET_PARAMS_CLAMP_BEFORE_BLEND 18:18 +#define NVC57E_SET_PARAMS_CLAMP_BEFORE_BLEND_DISABLE (0x00000000) +#define NVC57E_SET_PARAMS_CLAMP_BEFORE_BLEND_ENABLE (0x00000001) +#define NVC57E_SET_PARAMS_SWAP_UV 19:19 +#define NVC57E_SET_PARAMS_SWAP_UV_DISABLE (0x00000000) +#define NVC57E_SET_PARAMS_SWAP_UV_ENABLE (0x00000001) +#define NVC57E_SET_PARAMS_FMT_ROUNDING_MODE 22:22 +#define NVC57E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_TO_NEAREST (0x00000000) +#define NVC57E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_DOWN (0x00000001) +#define NVC57E_SET_PLANAR_STORAGE(b) (0x00000230 + (b)*0x00000004) +#define NVC57E_SET_PLANAR_STORAGE_PITCH 12:0 +#define NVC57E_SET_CONTEXT_DMA_ISO(b) (0x00000240 + (b)*0x00000004) +#define NVC57E_SET_CONTEXT_DMA_ISO_HANDLE 31:0 +#define NVC57E_SET_OFFSET(b) (0x00000260 + (b)*0x00000004) +#define NVC57E_SET_OFFSET_ORIGIN 31:0 +#define NVC57E_SET_POINT_IN(b) (0x00000290 + (b)*0x00000004) +#define NVC57E_SET_POINT_IN_X 15:0 +#define NVC57E_SET_POINT_IN_Y 31:16 +#define NVC57E_SET_SIZE_IN (0x00000298) +#define NVC57E_SET_SIZE_IN_WIDTH 15:0 +#define NVC57E_SET_SIZE_IN_HEIGHT 31:16 +#define NVC57E_SET_SIZE_OUT (0x000002A4) +#define NVC57E_SET_SIZE_OUT_WIDTH 15:0 +#define NVC57E_SET_SIZE_OUT_HEIGHT 31:16 +#define NVC57E_SET_CONTROL_INPUT_SCALER (0x000002A8) +#define NVC57E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC57E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC57E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC57E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC57E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC57E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC57E_SET_INPUT_SCALER_COEFF_VALUE (0x000002AC) +#define NVC57E_SET_INPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC57E_SET_INPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC57E_SET_COMPOSITION_CONTROL (0x000002EC) +#define NVC57E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVC57E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVC57E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVC57E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVC57E_SET_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVC57E_SET_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVC57E_SET_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVC57E_SET_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVC57E_SET_COMPOSITION_CONSTANT_ALPHA (0x000002F0) +#define NVC57E_SET_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVC57E_SET_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT (0x000002F4) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC57E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC57E_SET_KEY_ALPHA (0x000002F8) +#define NVC57E_SET_KEY_ALPHA_MIN 15:0 +#define NVC57E_SET_KEY_ALPHA_MAX 31:16 +#define NVC57E_SET_KEY_RED_CR (0x000002FC) +#define NVC57E_SET_KEY_RED_CR_MIN 15:0 +#define NVC57E_SET_KEY_RED_CR_MAX 31:16 +#define NVC57E_SET_KEY_GREEN_Y (0x00000300) +#define NVC57E_SET_KEY_GREEN_Y_MIN 15:0 +#define NVC57E_SET_KEY_GREEN_Y_MAX 31:16 +#define NVC57E_SET_KEY_BLUE_CB (0x00000304) +#define NVC57E_SET_KEY_BLUE_CB_MIN 15:0 +#define NVC57E_SET_KEY_BLUE_CB_MAX 31:16 +#define NVC57E_SET_PRESENT_CONTROL (0x00000308) +#define NVC57E_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NVC57E_SET_PRESENT_CONTROL_BEGIN_MODE 6:4 +#define NVC57E_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000) +#define NVC57E_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001) +#define NVC57E_SET_PRESENT_CONTROL_TIMESTAMP_MODE 8:8 +#define NVC57E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_DISABLE (0x00000000) +#define NVC57E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_ENABLE (0x00000001) +#define NVC57E_SET_PRESENT_CONTROL_STEREO_MODE 13:12 +#define NVC57E_SET_PRESENT_CONTROL_STEREO_MODE_MONO (0x00000000) +#define NVC57E_SET_PRESENT_CONTROL_STEREO_MODE_PAIR_FLIP (0x00000001) +#define NVC57E_SET_PRESENT_CONTROL_STEREO_MODE_AT_ANY_FRAME (0x00000002) +#define NVC57E_SET_TIMESTAMP_ORIGIN_LO (0x00000340) +#define NVC57E_SET_TIMESTAMP_ORIGIN_LO_TIMESTAMP_LO 31:0 +#define NVC57E_SET_TIMESTAMP_ORIGIN_HI (0x00000344) +#define NVC57E_SET_TIMESTAMP_ORIGIN_HI_TIMESTAMP_HI 31:0 +#define NVC57E_SET_UPDATE_TIMESTAMP_LO (0x00000348) +#define NVC57E_SET_UPDATE_TIMESTAMP_LO_TIMESTAMP_LO 31:0 +#define NVC57E_SET_UPDATE_TIMESTAMP_HI (0x0000034C) +#define NVC57E_SET_UPDATE_TIMESTAMP_HI_TIMESTAMP_HI 31:0 +#define NVC57E_SET_INTERLOCK_FLAGS (0x00000370) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 0:0 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+1):((i)+1) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 1:1 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 2:2 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 3:3 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 4:4 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 5:5 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 6:6 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 7:7 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 8:8 +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC57E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS (0x00000374) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC57E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC57E_SET_EXT_PACKET_CONTROL (0x00000398) +#define NVC57E_SET_EXT_PACKET_CONTROL_ENABLE 0:0 +#define NVC57E_SET_EXT_PACKET_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57E_SET_EXT_PACKET_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57E_SET_EXT_PACKET_CONTROL_LOCATION 4:4 +#define NVC57E_SET_EXT_PACKET_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVC57E_SET_EXT_PACKET_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVC57E_SET_EXT_PACKET_CONTROL_FREQUENCY 8:8 +#define NVC57E_SET_EXT_PACKET_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC57E_SET_EXT_PACKET_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC57E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE 12:12 +#define NVC57E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_DISABLE (0x00000000) +#define NVC57E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_ENABLE (0x00000001) +#define NVC57E_SET_EXT_PACKET_CONTROL_SIZE 27:16 +#define NVC57E_SET_EXT_PACKET_DATA (0x0000039C) +#define NVC57E_SET_EXT_PACKET_DATA_DB0 7:0 +#define NVC57E_SET_EXT_PACKET_DATA_DB1 15:8 +#define NVC57E_SET_EXT_PACKET_DATA_DB2 23:16 +#define NVC57E_SET_EXT_PACKET_DATA_DB3 31:24 +#define NVC57E_SET_FMT_COEFFICIENT_C00 (0x00000400) +#define NVC57E_SET_FMT_COEFFICIENT_C00_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C01 (0x00000404) +#define NVC57E_SET_FMT_COEFFICIENT_C01_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C02 (0x00000408) +#define NVC57E_SET_FMT_COEFFICIENT_C02_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C03 (0x0000040C) +#define NVC57E_SET_FMT_COEFFICIENT_C03_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C10 (0x00000410) +#define NVC57E_SET_FMT_COEFFICIENT_C10_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C11 (0x00000414) +#define NVC57E_SET_FMT_COEFFICIENT_C11_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C12 (0x00000418) +#define NVC57E_SET_FMT_COEFFICIENT_C12_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C13 (0x0000041C) +#define NVC57E_SET_FMT_COEFFICIENT_C13_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C20 (0x00000420) +#define NVC57E_SET_FMT_COEFFICIENT_C20_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C21 (0x00000424) +#define NVC57E_SET_FMT_COEFFICIENT_C21_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C22 (0x00000428) +#define NVC57E_SET_FMT_COEFFICIENT_C22_VALUE 20:0 +#define NVC57E_SET_FMT_COEFFICIENT_C23 (0x0000042C) +#define NVC57E_SET_FMT_COEFFICIENT_C23_VALUE 20:0 +#define NVC57E_SET_ILUT_CONTROL (0x00000440) +#define NVC57E_SET_ILUT_CONTROL_INTERPOLATE 0:0 +#define NVC57E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC57E_SET_ILUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC57E_SET_ILUT_CONTROL_MIRROR 1:1 +#define NVC57E_SET_ILUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC57E_SET_ILUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC57E_SET_ILUT_CONTROL_MODE 3:2 +#define NVC57E_SET_ILUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC57E_SET_ILUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC57E_SET_ILUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC57E_SET_ILUT_CONTROL_SIZE 18:8 +#define NVC57E_SET_CONTEXT_DMA_ILUT (0x00000444) +#define NVC57E_SET_CONTEXT_DMA_ILUT_HANDLE 31:0 +#define NVC57E_SET_OFFSET_ILUT (0x00000448) +#define NVC57E_SET_OFFSET_ILUT_ORIGIN 31:0 +#define NVC57E_SET_CSC00CONTROL (0x0000045C) +#define NVC57E_SET_CSC00CONTROL_ENABLE 0:0 +#define NVC57E_SET_CSC00CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57E_SET_CSC00CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57E_SET_CSC00COEFFICIENT_C00 (0x00000460) +#define NVC57E_SET_CSC00COEFFICIENT_C00_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C01 (0x00000464) +#define NVC57E_SET_CSC00COEFFICIENT_C01_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C02 (0x00000468) +#define NVC57E_SET_CSC00COEFFICIENT_C02_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C03 (0x0000046C) +#define NVC57E_SET_CSC00COEFFICIENT_C03_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C10 (0x00000470) +#define NVC57E_SET_CSC00COEFFICIENT_C10_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C11 (0x00000474) +#define NVC57E_SET_CSC00COEFFICIENT_C11_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C12 (0x00000478) +#define NVC57E_SET_CSC00COEFFICIENT_C12_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C13 (0x0000047C) +#define NVC57E_SET_CSC00COEFFICIENT_C13_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C20 (0x00000480) +#define NVC57E_SET_CSC00COEFFICIENT_C20_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C21 (0x00000484) +#define NVC57E_SET_CSC00COEFFICIENT_C21_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C22 (0x00000488) +#define NVC57E_SET_CSC00COEFFICIENT_C22_VALUE 20:0 +#define NVC57E_SET_CSC00COEFFICIENT_C23 (0x0000048C) +#define NVC57E_SET_CSC00COEFFICIENT_C23_VALUE 20:0 +#define NVC57E_SET_CSC0LUT_CONTROL (0x000004A0) +#define NVC57E_SET_CSC0LUT_CONTROL_INTERPOLATE 0:0 +#define NVC57E_SET_CSC0LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC57E_SET_CSC0LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC57E_SET_CSC0LUT_CONTROL_MIRROR 1:1 +#define NVC57E_SET_CSC0LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC57E_SET_CSC0LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC57E_SET_CSC0LUT_CONTROL_ENABLE 4:4 +#define NVC57E_SET_CSC0LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57E_SET_CSC0LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57E_SET_CSC0LUT_SEGMENT_SIZE (0x000004A4) +#define NVC57E_SET_CSC0LUT_SEGMENT_SIZE_IDX 5:0 +#define NVC57E_SET_CSC0LUT_SEGMENT_SIZE_VALUE 18:16 +#define NVC57E_SET_CSC0LUT_ENTRY (0x000004A8) +#define NVC57E_SET_CSC0LUT_ENTRY_IDX 10:0 +#define NVC57E_SET_CSC0LUT_ENTRY_VALUE 31:16 +#define NVC57E_SET_CSC01CONTROL (0x000004BC) +#define NVC57E_SET_CSC01CONTROL_ENABLE 0:0 +#define NVC57E_SET_CSC01CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57E_SET_CSC01CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57E_SET_CSC01COEFFICIENT_C00 (0x000004C0) +#define NVC57E_SET_CSC01COEFFICIENT_C00_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C01 (0x000004C4) +#define NVC57E_SET_CSC01COEFFICIENT_C01_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C02 (0x000004C8) +#define NVC57E_SET_CSC01COEFFICIENT_C02_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C03 (0x000004CC) +#define NVC57E_SET_CSC01COEFFICIENT_C03_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C10 (0x000004D0) +#define NVC57E_SET_CSC01COEFFICIENT_C10_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C11 (0x000004D4) +#define NVC57E_SET_CSC01COEFFICIENT_C11_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C12 (0x000004D8) +#define NVC57E_SET_CSC01COEFFICIENT_C12_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C13 (0x000004DC) +#define NVC57E_SET_CSC01COEFFICIENT_C13_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C20 (0x000004E0) +#define NVC57E_SET_CSC01COEFFICIENT_C20_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C21 (0x000004E4) +#define NVC57E_SET_CSC01COEFFICIENT_C21_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C22 (0x000004E8) +#define NVC57E_SET_CSC01COEFFICIENT_C22_VALUE 20:0 +#define NVC57E_SET_CSC01COEFFICIENT_C23 (0x000004EC) +#define NVC57E_SET_CSC01COEFFICIENT_C23_VALUE 20:0 +#define NVC57E_SET_TMO_CONTROL (0x00000500) +#define NVC57E_SET_TMO_CONTROL_INTERPOLATE 0:0 +#define NVC57E_SET_TMO_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC57E_SET_TMO_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC57E_SET_TMO_CONTROL_SAT_MODE 3:2 +#define NVC57E_SET_TMO_CONTROL_SIZE 18:8 +#define NVC57E_SET_TMO_LOW_INTENSITY_ZONE (0x00000508) +#define NVC57E_SET_TMO_LOW_INTENSITY_ZONE_END 29:16 +#define NVC57E_SET_TMO_LOW_INTENSITY_VALUE (0x0000050C) +#define NVC57E_SET_TMO_LOW_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC57E_SET_TMO_LOW_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC57E_SET_TMO_LOW_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC57E_SET_TMO_MEDIUM_INTENSITY_ZONE (0x00000510) +#define NVC57E_SET_TMO_MEDIUM_INTENSITY_ZONE_START 13:0 +#define NVC57E_SET_TMO_MEDIUM_INTENSITY_ZONE_END 29:16 +#define NVC57E_SET_TMO_MEDIUM_INTENSITY_VALUE (0x00000514) +#define NVC57E_SET_TMO_MEDIUM_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC57E_SET_TMO_MEDIUM_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC57E_SET_TMO_MEDIUM_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC57E_SET_TMO_HIGH_INTENSITY_ZONE (0x00000518) +#define NVC57E_SET_TMO_HIGH_INTENSITY_ZONE_START 13:0 +#define NVC57E_SET_TMO_HIGH_INTENSITY_VALUE (0x0000051C) +#define NVC57E_SET_TMO_HIGH_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC57E_SET_TMO_HIGH_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC57E_SET_TMO_HIGH_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC57E_SET_CONTEXT_DMA_TMO_LUT (0x00000528) +#define NVC57E_SET_CONTEXT_DMA_TMO_LUT_HANDLE 31:0 +#define NVC57E_SET_OFFSET_TMO_LUT (0x0000052C) +#define NVC57E_SET_OFFSET_TMO_LUT_ORIGIN 31:0 +#define NVC57E_SET_CSC10CONTROL (0x0000053C) +#define NVC57E_SET_CSC10CONTROL_ENABLE 0:0 +#define NVC57E_SET_CSC10CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57E_SET_CSC10CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57E_SET_CSC10COEFFICIENT_C00 (0x00000540) +#define NVC57E_SET_CSC10COEFFICIENT_C00_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C01 (0x00000544) +#define NVC57E_SET_CSC10COEFFICIENT_C01_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C02 (0x00000548) +#define NVC57E_SET_CSC10COEFFICIENT_C02_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C03 (0x0000054C) +#define NVC57E_SET_CSC10COEFFICIENT_C03_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C10 (0x00000550) +#define NVC57E_SET_CSC10COEFFICIENT_C10_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C11 (0x00000554) +#define NVC57E_SET_CSC10COEFFICIENT_C11_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C12 (0x00000558) +#define NVC57E_SET_CSC10COEFFICIENT_C12_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C13 (0x0000055C) +#define NVC57E_SET_CSC10COEFFICIENT_C13_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C20 (0x00000560) +#define NVC57E_SET_CSC10COEFFICIENT_C20_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C21 (0x00000564) +#define NVC57E_SET_CSC10COEFFICIENT_C21_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C22 (0x00000568) +#define NVC57E_SET_CSC10COEFFICIENT_C22_VALUE 20:0 +#define NVC57E_SET_CSC10COEFFICIENT_C23 (0x0000056C) +#define NVC57E_SET_CSC10COEFFICIENT_C23_VALUE 20:0 +#define NVC57E_SET_CSC1LUT_CONTROL (0x00000580) +#define NVC57E_SET_CSC1LUT_CONTROL_INTERPOLATE 0:0 +#define NVC57E_SET_CSC1LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC57E_SET_CSC1LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC57E_SET_CSC1LUT_CONTROL_MIRROR 1:1 +#define NVC57E_SET_CSC1LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC57E_SET_CSC1LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC57E_SET_CSC1LUT_CONTROL_ENABLE 4:4 +#define NVC57E_SET_CSC1LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57E_SET_CSC1LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57E_SET_CSC1LUT_SEGMENT_SIZE (0x00000584) +#define NVC57E_SET_CSC1LUT_SEGMENT_SIZE_IDX 5:0 +#define NVC57E_SET_CSC1LUT_SEGMENT_SIZE_VALUE 18:16 +#define NVC57E_SET_CSC1LUT_ENTRY (0x00000588) +#define NVC57E_SET_CSC1LUT_ENTRY_IDX 10:0 +#define NVC57E_SET_CSC1LUT_ENTRY_VALUE 31:16 +#define NVC57E_SET_CSC11CONTROL (0x0000059C) +#define NVC57E_SET_CSC11CONTROL_ENABLE 0:0 +#define NVC57E_SET_CSC11CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC57E_SET_CSC11CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC57E_SET_CSC11COEFFICIENT_C00 (0x000005A0) +#define NVC57E_SET_CSC11COEFFICIENT_C00_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C01 (0x000005A4) +#define NVC57E_SET_CSC11COEFFICIENT_C01_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C02 (0x000005A8) +#define NVC57E_SET_CSC11COEFFICIENT_C02_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C03 (0x000005AC) +#define NVC57E_SET_CSC11COEFFICIENT_C03_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C10 (0x000005B0) +#define NVC57E_SET_CSC11COEFFICIENT_C10_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C11 (0x000005B4) +#define NVC57E_SET_CSC11COEFFICIENT_C11_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C12 (0x000005B8) +#define NVC57E_SET_CSC11COEFFICIENT_C12_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C13 (0x000005BC) +#define NVC57E_SET_CSC11COEFFICIENT_C13_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C20 (0x000005C0) +#define NVC57E_SET_CSC11COEFFICIENT_C20_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C21 (0x000005C4) +#define NVC57E_SET_CSC11COEFFICIENT_C21_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C22 (0x000005C8) +#define NVC57E_SET_CSC11COEFFICIENT_C22_VALUE 20:0 +#define NVC57E_SET_CSC11COEFFICIENT_C23 (0x000005CC) +#define NVC57E_SET_CSC11COEFFICIENT_C23_VALUE 20:0 +#define NVC57E_SET_CLAMP_RANGE (0x000005D0) +#define NVC57E_SET_CLAMP_RANGE_LOW 15:0 +#define NVC57E_SET_CLAMP_RANGE_HIGH 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC57e_h diff --git a/userspace/sdks/nv570/inc/class/clc57esw.h b/userspace/sdks/nv570/inc/class/clc57esw.h new file mode 100644 index 0000000..8c106b4 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc57esw.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2009-2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc57e_sw_h_ +#define _clc57e_sw_h_ + +/* This file is *not* auto-generated. */ + +#define NVC57E_WINDOWS_NOTIFY_RM (0x0000058C) +#define NVC57E_WINDOWS_NOTIFY_RM_VSYNC_STATE_CHANGE 0:0 +#define NVC57E_WINDOWS_NOTIFY_RM_VSYNC_STATE_CHANGE_FALSE (0x00000000) +#define NVC57E_WINDOWS_NOTIFY_RM_VSYNC_STATE_CHANGE_TRUE (0x00000001) +#define NVC57E_WINDOWS_NOTIFY_RM_VSYNC_STATE 1:1 +#define NVC57E_WINDOWS_NOTIFY_RM_VSYNC_STATE_OFF (0x00000000) +#define NVC57E_WINDOWS_NOTIFY_RM_VSYNC_STATE_ON (0x00000001) +#define NVC57E_WINDOWS_NOTIFY_RM_ASSOCIATED_HEAD 7:4 + +#define SwSetMClkSwitch Reserved05[1] + +#define NVC57E_SW_SET_MCLK_SWITCH (0x000002B4) +#define NVC57E_SW_SET_MCLK_SWITCH_ENABLE 0:0 +#define NVC57E_SW_SET_MCLK_SWITCH_ENABLE_FALSE (0x00000000) +#define NVC57E_SW_SET_MCLK_SWITCH_ENABLE_TRUE (0x00000001) + +#endif // _clc57e_sw_h_ + diff --git a/userspace/sdks/nv570/inc/class/clc58b.h b/userspace/sdks/nv570/inc/class/clc58b.h new file mode 100644 index 0000000..4972f04 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc58b.h @@ -0,0 +1,50 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2017-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc58b.finn +// + +#define TURING_VMMU_A (0xc58bU) /* finn: Evaluated from "TURING_VMMU_A_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +/* + * @brief NvAlloc parameters for TuringVmmuA class + * + * This class represents mapping between guest physical and system physical. + * Will also be used to represent VF specific state for a given guest. + * + * gfid [in] + * GFID of VF + */ + +#define TURING_VMMU_A_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc58bU) + +typedef struct TURING_VMMU_A_ALLOCATION_PARAMETERS { + NvHandle hHostVgpuDevice; +} TURING_VMMU_A_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc597.h b/userspace/sdks/nv570/inc/class/clc597.h new file mode 100644 index 0000000..711dae1 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc597.h @@ -0,0 +1,4352 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_turing_a_h_ +#define _cl_turing_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl turing_a */ + +#include "nvtypes.h" + +#define TURING_A 0xC597 + +#define NVC597_SET_OBJECT 0x0000 +#define NVC597_SET_OBJECT_CLASS_ID 15:0 +#define NVC597_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC597_NO_OPERATION 0x0100 +#define NVC597_NO_OPERATION_V 31:0 + +#define NVC597_SET_NOTIFY_A 0x0104 +#define NVC597_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC597_SET_NOTIFY_B 0x0108 +#define NVC597_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC597_NOTIFY 0x010c +#define NVC597_NOTIFY_TYPE 31:0 +#define NVC597_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC597_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC597_WAIT_FOR_IDLE 0x0110 +#define NVC597_WAIT_FOR_IDLE_V 31:0 + +#define NVC597_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVC597_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVC597_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVC597_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVC597_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVC597_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVC597_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVC597_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVC597_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVC597_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVC597_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVC597_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVC597_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVC597_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVC597_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVC597_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVC597_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVC597_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVC597_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC597_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC597_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC597_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC597_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC597_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC597_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC597_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC597_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC597_SEND_GO_IDLE 0x013c +#define NVC597_SEND_GO_IDLE_V 31:0 + +#define NVC597_PM_TRIGGER 0x0140 +#define NVC597_PM_TRIGGER_V 31:0 + +#define NVC597_PM_TRIGGER_WFI 0x0144 +#define NVC597_PM_TRIGGER_WFI_V 31:0 + +#define NVC597_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC597_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC597_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC597_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC597_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC597_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC597_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC597_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC597_LINE_LENGTH_IN 0x0180 +#define NVC597_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC597_LINE_COUNT 0x0184 +#define NVC597_LINE_COUNT_VALUE 31:0 + +#define NVC597_OFFSET_OUT_UPPER 0x0188 +#define NVC597_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVC597_OFFSET_OUT 0x018c +#define NVC597_OFFSET_OUT_VALUE 31:0 + +#define NVC597_PITCH_OUT 0x0190 +#define NVC597_PITCH_OUT_VALUE 31:0 + +#define NVC597_SET_DST_BLOCK_SIZE 0x0194 +#define NVC597_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC597_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC597_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC597_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC597_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC597_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC597_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC597_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC597_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC597_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC597_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC597_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC597_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC597_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC597_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC597_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC597_SET_DST_WIDTH 0x0198 +#define NVC597_SET_DST_WIDTH_V 31:0 + +#define NVC597_SET_DST_HEIGHT 0x019c +#define NVC597_SET_DST_HEIGHT_V 31:0 + +#define NVC597_SET_DST_DEPTH 0x01a0 +#define NVC597_SET_DST_DEPTH_V 31:0 + +#define NVC597_SET_DST_LAYER 0x01a4 +#define NVC597_SET_DST_LAYER_V 31:0 + +#define NVC597_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC597_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC597_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC597_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC597_LAUNCH_DMA 0x01b0 +#define NVC597_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC597_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC597_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC597_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC597_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC597_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC597_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC597_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC597_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC597_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC597_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC597_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC597_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC597_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC597_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC597_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC597_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC597_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC597_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC597_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC597_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC597_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC597_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC597_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC597_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC597_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC597_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC597_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC597_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC597_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC597_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC597_LOAD_INLINE_DATA 0x01b4 +#define NVC597_LOAD_INLINE_DATA_V 31:0 + +#define NVC597_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC597_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC597_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC597_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC597_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC597_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC597_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC597_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC597_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC597_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC597_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC597_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC597_RUN_DS_NOW 0x0200 +#define NVC597_RUN_DS_NOW_V 31:0 + +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVC597_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVC597_SET_GS_MODE 0x0208 +#define NVC597_SET_GS_MODE_TYPE 0:0 +#define NVC597_SET_GS_MODE_TYPE_ANY 0x00000000 +#define NVC597_SET_GS_MODE_TYPE_FAST_GS 0x00000001 + +#define NVC597_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVC597_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVC597_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVC597_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVC597_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVC597_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVC597_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVC597_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_GS_DM_FIFO 0x0214 +#define NVC597_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVC597_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVC597_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVC597_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVC597_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC597_INVALIDATE_SHADER_CACHES 0x021c +#define NVC597_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC597_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC597_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC597_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC597_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC597_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC597_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC597_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC597_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC597_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC597_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC597_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC597_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC597_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC597_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC597_SET_INSTANCE_COUNT 0x0220 +#define NVC597_SET_INSTANCE_COUNT_V 31:0 + +#define NVC597_SET_POSITION_W_SCALED_OFFSET_ENABLE 0x0224 +#define NVC597_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE 0:0 +#define NVC597_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_GO_IDLE_TIMEOUT 0x022c +#define NVC597_SET_GO_IDLE_TIMEOUT_V 31:0 + +#define NVC597_SET_MME_VERSION 0x0234 +#define NVC597_SET_MME_VERSION_MAJOR 7:0 + +#define NVC597_SET_INDEX_BUFFER_SIZE_A 0x0238 +#define NVC597_SET_INDEX_BUFFER_SIZE_A_UPPER 7:0 + +#define NVC597_SET_INDEX_BUFFER_SIZE_B 0x023c +#define NVC597_SET_INDEX_BUFFER_SIZE_B_LOWER 31:0 + +#define NVC597_SET_ROOT_TABLE_VISIBILITY(i) (0x0240+(i)*4) +#define NVC597_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP0_ENABLE 1:0 +#define NVC597_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP1_ENABLE 5:4 +#define NVC597_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP2_ENABLE 9:8 +#define NVC597_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP3_ENABLE 13:12 +#define NVC597_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP4_ENABLE 17:16 + +#define NVC597_SET_DRAW_CONTROL_A 0x0260 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY 3:0 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_POINTS 0x00000000 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_LINES 0x00000001 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_QUADS 0x00000007 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_POLYGON 0x00000009 +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_SET_DRAW_CONTROL_A_TOPOLOGY_PATCH 0x0000000E +#define NVC597_SET_DRAW_CONTROL_A_PRIMITIVE_ID 4:4 +#define NVC597_SET_DRAW_CONTROL_A_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC597_SET_DRAW_CONTROL_A_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC597_SET_DRAW_CONTROL_A_INSTANCE_ID 6:5 +#define NVC597_SET_DRAW_CONTROL_A_INSTANCE_ID_FIRST 0x00000000 +#define NVC597_SET_DRAW_CONTROL_A_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC597_SET_DRAW_CONTROL_A_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC597_SET_DRAW_CONTROL_A_SPLIT_MODE 8:7 +#define NVC597_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC597_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC597_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC597_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC597_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE 9:9 +#define NVC597_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 +#define NVC597_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX 10:10 +#define NVC597_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_FALSE 0x00000000 +#define NVC597_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_TRUE 0x00000001 +#define NVC597_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX 11:11 +#define NVC597_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_FALSE 0x00000000 +#define NVC597_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_TRUE 0x00000001 + +#define NVC597_SET_DRAW_CONTROL_B 0x0264 +#define NVC597_SET_DRAW_CONTROL_B_INSTANCE_COUNT 31:0 + +#define NVC597_DRAW_INDEX_BUFFER_BEGIN_END_A 0x0268 +#define NVC597_DRAW_INDEX_BUFFER_BEGIN_END_A_FIRST 31:0 + +#define NVC597_DRAW_INDEX_BUFFER_BEGIN_END_B 0x026c +#define NVC597_DRAW_INDEX_BUFFER_BEGIN_END_B_COUNT 31:0 + +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_A 0x0270 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_A_START 31:0 + +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_B 0x0274 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_B_COUNT 31:0 + +#define NVC597_INVALIDATE_RASTER_CACHE_NO_WFI 0x027c +#define NVC597_INVALIDATE_RASTER_CACHE_NO_WFI_V 0:0 + +#define NVC597_SET_COLOR_RENDER_TO_ZETA_SURFACE 0x02b8 +#define NVC597_SET_COLOR_RENDER_TO_ZETA_SURFACE_V 0:0 +#define NVC597_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_FALSE 0x00000000 +#define NVC597_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_TRUE 0x00000001 + +#define NVC597_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION 0x02bc +#define NVC597_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V 0:0 +#define NVC597_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_FALSE 0x00000000 +#define NVC597_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_TRUE 0x00000001 + +#define NVC597_INCREMENT_SYNC_POINT 0x02c8 +#define NVC597_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVC597_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVC597_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVC597_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVC597_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVC597_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVC597_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVC597_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVC597_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVC597_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC597_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVC597_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVC597_DECOMPRESS_SURFACE 0x02e0 +#define NVC597_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVC597_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVC597_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVC597_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVC597_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVC597_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVC597_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVC597_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVC597_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVC597_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVC597_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVC597_SET_ZCULL_SUBREGION 0x02e8 +#define NVC597_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVC597_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVC597_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVC597_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVC597_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVC597_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVC597_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVC597_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVC597_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVC597_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVC597_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVC597_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVC597_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVC597_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVC597_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVC597_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVC597_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVC597_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVC597_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVC597_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVC597_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVC597_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVC597_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVC597_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVC597_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC597_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVC597_DRAW_ZERO_INDEX 0x0304 +#define NVC597_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVC597_SET_L1_CONFIGURATION 0x0308 +#define NVC597_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVC597_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVC597_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVC597_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVC597_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVC597_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVC597_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVC597_SET_SPA_VERSION 0x0310 +#define NVC597_SET_SPA_VERSION_MINOR 7:0 +#define NVC597_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC597_SET_TIMESLICE_BATCH_LIMIT 0x0314 +#define NVC597_SET_TIMESLICE_BATCH_LIMIT_BATCH_LIMIT 15:0 + +#define NVC597_SET_SNAP_GRID_LINE 0x0318 +#define NVC597_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC597_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC597_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC597_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC597_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC597_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC597_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC597_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC597_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC597_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVC597_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC597_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC597_SET_SNAP_GRID_NON_LINE 0x031c +#define NVC597_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC597_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC597_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC597_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC597_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC597_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC597_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC597_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC597_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC597_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVC597_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC597_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC597_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVC597_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVC597_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVC597_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVC597_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVC597_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVC597_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVC597_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVC597_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVC597_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVC597_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVC597_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVC597_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVC597_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVC597_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVC597_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVC597_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVC597_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVC597_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVC597_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVC597_SET_TESSELLATION_LOD_V1 0x0330 +#define NVC597_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVC597_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVC597_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVC597_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVC597_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVC597_RESERVED_TG07 0x033c +#define NVC597_RESERVED_TG07_V 0:0 + +#define NVC597_RESERVED_TG08 0x0340 +#define NVC597_RESERVED_TG08_V 0:0 + +#define NVC597_RESERVED_TG09 0x0344 +#define NVC597_RESERVED_TG09_V 0:0 + +#define NVC597_RESERVED_TG10 0x0348 +#define NVC597_RESERVED_TG10_V 0:0 + +#define NVC597_RESERVED_TG11 0x034c +#define NVC597_RESERVED_TG11_V 0:0 + +#define NVC597_RESERVED_TG12 0x0350 +#define NVC597_RESERVED_TG12_V 0:0 + +#define NVC597_RESERVED_TG13 0x0354 +#define NVC597_RESERVED_TG13_V 0:0 + +#define NVC597_RESERVED_TG14 0x0358 +#define NVC597_RESERVED_TG14_V 0:0 + +#define NVC597_RESERVED_TG15 0x035c +#define NVC597_RESERVED_TG15_V 0:0 + +#define NVC597_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVC597_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVC597_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVC597_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVC597_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVC597_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVC597_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVC597_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVC597_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVC597_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVC597_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVC597_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVC597_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVC597_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVC597_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVC597_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVC597_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVC597_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVC597_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE 8:8 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE 9:9 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC597_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVC597_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVC597_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVC597_SET_RASTER_ENABLE 0x037c +#define NVC597_SET_RASTER_ENABLE_V 0:0 +#define NVC597_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVC597_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVC597_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVC597_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVC597_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVC597_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVC597_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVC597_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVC597_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVC597_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVC597_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVC597_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVC597_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVC597_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVC597_SET_POSITION_W_SCALED_OFFSET_SCALE_A(j) (0x0400+(j)*16) +#define NVC597_SET_POSITION_W_SCALED_OFFSET_SCALE_A_V 31:0 + +#define NVC597_SET_POSITION_W_SCALED_OFFSET_SCALE_B(j) (0x0404+(j)*16) +#define NVC597_SET_POSITION_W_SCALED_OFFSET_SCALE_B_V 31:0 + +#define NVC597_SET_POSITION_W_SCALED_OFFSET_RESERVED_A(j) (0x0408+(j)*16) +#define NVC597_SET_POSITION_W_SCALED_OFFSET_RESERVED_A_V 31:0 + +#define NVC597_SET_POSITION_W_SCALED_OFFSET_RESERVED_B(j) (0x040c+(j)*16) +#define NVC597_SET_POSITION_W_SCALED_OFFSET_RESERVED_B_V 31:0 + +#define NVC597_SET_ROOT_TABLE_SELECTOR 0x0504 +#define NVC597_SET_ROOT_TABLE_SELECTOR_ROOT_TABLE 2:0 +#define NVC597_SET_ROOT_TABLE_SELECTOR_OFFSET 15:8 + +#define NVC597_LOAD_ROOT_TABLE 0x0508 +#define NVC597_LOAD_ROOT_TABLE_V 31:0 + +#define NVC597_SET_MME_MEM_ADDRESS_A 0x0550 +#define NVC597_SET_MME_MEM_ADDRESS_A_UPPER 7:0 + +#define NVC597_SET_MME_MEM_ADDRESS_B 0x0554 +#define NVC597_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NVC597_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NVC597_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NVC597_MME_DMA_READ 0x055c +#define NVC597_MME_DMA_READ_LENGTH 31:0 + +#define NVC597_MME_DMA_READ_FIFOED 0x0560 +#define NVC597_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NVC597_MME_DMA_WRITE 0x0564 +#define NVC597_MME_DMA_WRITE_LENGTH 31:0 + +#define NVC597_MME_DMA_REDUCTION 0x0568 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NVC597_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NVC597_MME_DMA_SYSMEMBAR 0x056c +#define NVC597_MME_DMA_SYSMEMBAR_V 0:0 + +#define NVC597_MME_DMA_SYNC 0x0570 +#define NVC597_MME_DMA_SYNC_VALUE 31:0 + +#define NVC597_SET_MME_DATA_FIFO_CONFIG 0x0574 +#define NVC597_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 +#define NVC597_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 +#define NVC597_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 +#define NVC597_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 +#define NVC597_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 +#define NVC597_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 + +#define NVC597_SET_VERTEX_STREAM_SIZE_A(j) (0x0600+(j)*8) +#define NVC597_SET_VERTEX_STREAM_SIZE_A_UPPER 7:0 + +#define NVC597_SET_VERTEX_STREAM_SIZE_B(j) (0x0604+(j)*8) +#define NVC597_SET_VERTEX_STREAM_SIZE_B_LOWER 31:0 + +#define NVC597_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVC597_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVC597_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVC597_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVC597_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVC597_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVC597_SET_RASTER_INPUT 0x0740 +#define NVC597_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVC597_SET_STREAM_OUTPUT 0x0744 +#define NVC597_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVC597_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVC597_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVC597_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVC597_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVC597_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVC597_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVC597_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 +#define NVC597_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES_EXTENDED 5:5 + +#define NVC597_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVC597_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC597_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC597_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVC597_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC597_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC597_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVC597_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVC597_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVC597_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVC597_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVC597_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVC597_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVC597_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC597_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVC597_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC597_SET_STENCIL_ZERO_BANDWIDTH_CLEAR 0x07b0 +#define NVC597_SET_STENCIL_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC597_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVC597_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVC597_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVC597_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVC597_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVC597_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVC597_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVC597_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVC597_SET_CULL_BEFORE_FETCH 0x07dc +#define NVC597_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVC597_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVC597_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVC597_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVC597_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVC597_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVC597_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVC597_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVC597_SET_ZCULL_STORAGE_A 0x07e8 +#define NVC597_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVC597_SET_ZCULL_STORAGE_B 0x07ec +#define NVC597_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVC597_SET_ZCULL_STORAGE_C 0x07f0 +#define NVC597_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC597_SET_ZCULL_STORAGE_D 0x07f4 +#define NVC597_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC597_SET_ZT_READ_ONLY 0x07f8 +#define NVC597_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVC597_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVC597_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVC597_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVC597_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVC597_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVC597_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVC597_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVC597_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVC597_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVC597_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVC597_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVC597_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVC597_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVC597_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVC597_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVC597_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVC597_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVC597_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVC597_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVC597_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVC597_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVC597_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVC597_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVC597_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVC597_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC597_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVC597_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVC597_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC597_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC597_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVC597_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC597_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVC597_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVC597_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVC597_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVC597_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVC597_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVC597_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVC597_SET_COLOR_TARGET_RESERVED_A(j) (0x0824+(j)*64) +#define NVC597_SET_COLOR_TARGET_RESERVED_A_V 0:0 + +#define NVC597_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVC597_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVC597_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVC597_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVC597_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVC597_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVC597_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVC597_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVC597_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVC597_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVC597_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVC597_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE(j) (0x0a18+(j)*32) +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_X 2:0 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X 0x00000000 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X 0x00000001 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y 0x00000002 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y 0x00000003 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z 0x00000004 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z 0x00000005 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W 0x00000006 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W 0x00000007 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Y 6:4 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X 0x00000000 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X 0x00000001 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y 0x00000002 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y 0x00000003 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z 0x00000004 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z 0x00000005 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W 0x00000006 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W 0x00000007 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Z 10:8 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X 0x00000000 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X 0x00000001 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y 0x00000002 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y 0x00000003 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z 0x00000004 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z 0x00000005 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W 0x00000006 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W 0x00000007 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_W 14:12 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X 0x00000000 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X 0x00000001 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y 0x00000002 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y 0x00000003 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z 0x00000004 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z 0x00000005 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W 0x00000006 +#define NVC597_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W 0x00000007 + +#define NVC597_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(j) (0x0a1c+(j)*32) +#define NVC597_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_X_BITS 4:0 +#define NVC597_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_Y_BITS 12:8 + +#define NVC597_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVC597_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVC597_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC597_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVC597_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVC597_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC597_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVC597_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVC597_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVC597_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVC597_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVC597_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVC597_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVC597_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVC597_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVC597_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVC597_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVC597_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVC597_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVC597_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVC597_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVC597_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVC597_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVC597_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC597_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVC597_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVC597_SET_STATISTICS_COUNTER 0x0d68 +#define NVC597_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVC597_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVC597_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVC597_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVC597_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVC597_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVC597_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVC597_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVC597_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVC597_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVC597_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVC597_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVC597_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVC597_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVC597_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVC597_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVC597_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 +#define NVC597_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE 16:16 +#define NVC597_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVC597_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC597_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC597_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVC597_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC597_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC597_SET_VERTEX_ARRAY_START 0x0d74 +#define NVC597_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVC597_DRAW_VERTEX_ARRAY 0x0d78 +#define NVC597_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVC597_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVC597_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVC597_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVC597_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVC597_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVC597_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVC597_SET_Z_CLEAR_VALUE 0x0d90 +#define NVC597_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVC597_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC597_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC597_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC597_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC597_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVC597_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVC597_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVC597_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC597_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC597_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVC597_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVC597_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVC597_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVC597_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVC597_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVC597_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVC597_SET_FRONT_POLYGON_MODE 0x0dac +#define NVC597_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVC597_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC597_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC597_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC597_SET_BACK_POLYGON_MODE 0x0db0 +#define NVC597_SET_BACK_POLYGON_MODE_V 31:0 +#define NVC597_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC597_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC597_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC597_SET_POLY_SMOOTH 0x0db4 +#define NVC597_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVC597_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVC597_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVC597_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVC597_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVC597_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVC597_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVC597_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVC597_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVC597_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVC597_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVC597_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVC597_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVC597_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVC597_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVC597_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVC597_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVC597_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVC597_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_PATCH 0x0dcc +#define NVC597_SET_PATCH_SIZE 7:0 + +#define NVC597_SET_ITERATED_BLEND 0x0dd0 +#define NVC597_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVC597_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVC597_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVC597_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVC597_SET_ZCULL_CRITERION 0x0dd8 +#define NVC597_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVC597_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVC597_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVC597_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVC597_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVC597_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVC597_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVC597_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVC597_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVC597_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVC597_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVC597_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVC597_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVC597_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVC597_SET_ZCULL_CRITERION_SREF 23:16 +#define NVC597_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVC597_PIXEL_SHADER_BARRIER 0x0de0 +#define NVC597_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVC597_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVC597_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC597_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC597_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVC597_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVC597_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVC597_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVC597_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVC597_SET_WINDOW_OFFSET_X 0x0df8 +#define NVC597_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVC597_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVC597_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVC597_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVC597_SET_SCISSOR_ENABLE_V 0:0 +#define NVC597_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVC597_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVC597_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVC597_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVC597_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVC597_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVC597_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVC597_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVC597_SET_VPC_PERF_KNOB 0x0f14 +#define NVC597_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVC597_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVC597_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVC597_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVC597_PM_LOCAL_TRIGGER 0x0f18 +#define NVC597_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVC597_SET_POST_Z_PS_IMASK 0x0f1c +#define NVC597_SET_POST_Z_PS_IMASK_ENABLE 0:0 +#define NVC597_SET_POST_Z_PS_IMASK_ENABLE_FALSE 0x00000000 +#define NVC597_SET_POST_Z_PS_IMASK_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVC597_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVC597_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVC597_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVC597_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVC597_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVC597_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVC597_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVC597_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVC597_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVC597_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVC597_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVC597_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVC597_SET_BACK_STENCIL_MASK 0x0f58 +#define NVC597_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVC597_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVC597_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVC597_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVC597_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVC597_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVC597_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVC597_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVC597_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVC597_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVC597_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVC597_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVC597_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVC597_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC597_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVC597_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVC597_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVC597_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVC597_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVC597_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVC597_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVC597_SET_SAMPLE_MASK 0x0fa4 +#define NVC597_SET_SAMPLE_MASK_RASTER_OUT_ENABLE 0:0 +#define NVC597_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE 0x00000001 +#define NVC597_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE 4:4 +#define NVC597_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE 0x00000000 +#define NVC597_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_COLOR_TARGET_SAMPLE_MASK 0x0fa8 +#define NVC597_SET_COLOR_TARGET_SAMPLE_MASK_V 15:0 + +#define NVC597_SET_CT_MRT_ENABLE 0x0fac +#define NVC597_SET_CT_MRT_ENABLE_V 0:0 +#define NVC597_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVC597_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVC597_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVC597_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVC597_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVC597_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVC597_SET_TIR 0x0fb4 +#define NVC597_SET_TIR_MODE 1:0 +#define NVC597_SET_TIR_MODE_DISABLED 0x00000000 +#define NVC597_SET_TIR_MODE_RASTER_N_TARGET_M 0x00000001 + +#define NVC597_SET_ANTI_ALIAS_RASTER 0x0fb8 +#define NVC597_SET_ANTI_ALIAS_RASTER_SAMPLES 2:0 +#define NVC597_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1 0x00000000 +#define NVC597_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2 0x00000002 +#define NVC597_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC597_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC597_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4 0x00000006 + +#define NVC597_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVC597_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVC597_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVC597_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVC597_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVC597_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVC597_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVC597_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVC597_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVC597_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVC597_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_TIR_MODULATION 0x0fd4 +#define NVC597_SET_TIR_MODULATION_COMPONENT_SELECT 1:0 +#define NVC597_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION 0x00000000 +#define NVC597_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB 0x00000001 +#define NVC597_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY 0x00000002 +#define NVC597_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA 0x00000003 + +#define NVC597_SET_TIR_MODULATION_FUNCTION 0x0fd8 +#define NVC597_SET_TIR_MODULATION_FUNCTION_SELECT 0:0 +#define NVC597_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR 0x00000000 +#define NVC597_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE 0x00000001 + +#define NVC597_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVC597_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVC597_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVC597_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVC597_SET_ZT_A 0x0fe0 +#define NVC597_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_ZT_B 0x0fe4 +#define NVC597_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_ZT_FORMAT 0x0fe8 +#define NVC597_SET_ZT_FORMAT_V 4:0 +#define NVC597_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVC597_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVC597_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVC597_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVC597_SET_ZT_FORMAT_V_S8 0x00000017 +#define NVC597_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVC597_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVC597_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVC597_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVC597_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVC597_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVC597_SET_ZT_BLOCK_SIZE 0x0fec +#define NVC597_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVC597_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC597_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVC597_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC597_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC597_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC597_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC597_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC597_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC597_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVC597_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC597_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVC597_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVC597_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVC597_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVC597_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC597_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVC597_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVC597_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC597_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC597_SET_VIEWPORT_MULTICAST 0x1004 +#define NVC597_SET_VIEWPORT_MULTICAST_ORDER 0:0 +#define NVC597_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER 0x00000000 +#define NVC597_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER 0x00000001 + +#define NVC597_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVC597_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVC597_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVC597_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC597_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVC597_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVC597_SET_RESERVED_SW_METHOD00 0x1014 +#define NVC597_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC597_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVC597_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC597_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVC597_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC597_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVC597_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC597_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVC597_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC597_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_RESERVED_SW_METHOD01 0x1028 +#define NVC597_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD02 0x102c +#define NVC597_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC597_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) (0x1030+(i)*4) +#define NVC597_SET_TIR_MODULATION_COEFFICIENT_TABLE_V0 7:0 +#define NVC597_SET_TIR_MODULATION_COEFFICIENT_TABLE_V1 15:8 +#define NVC597_SET_TIR_MODULATION_COEFFICIENT_TABLE_V2 23:16 +#define NVC597_SET_TIR_MODULATION_COEFFICIENT_TABLE_V3 31:24 + +#define NVC597_SET_SPARE_NOOP01 0x1044 +#define NVC597_SET_SPARE_NOOP01_V 31:0 + +#define NVC597_SET_SPARE_NOOP02 0x1048 +#define NVC597_SET_SPARE_NOOP02_V 31:0 + +#define NVC597_SET_SPARE_NOOP03 0x104c +#define NVC597_SET_SPARE_NOOP03_V 31:0 + +#define NVC597_SET_SPARE_NOOP04 0x1050 +#define NVC597_SET_SPARE_NOOP04_V 31:0 + +#define NVC597_SET_SPARE_NOOP05 0x1054 +#define NVC597_SET_SPARE_NOOP05_V 31:0 + +#define NVC597_SET_SPARE_NOOP06 0x1058 +#define NVC597_SET_SPARE_NOOP06_V 31:0 + +#define NVC597_SET_SPARE_NOOP07 0x105c +#define NVC597_SET_SPARE_NOOP07_V 31:0 + +#define NVC597_SET_SPARE_NOOP08 0x1060 +#define NVC597_SET_SPARE_NOOP08_V 31:0 + +#define NVC597_SET_SPARE_NOOP09 0x1064 +#define NVC597_SET_SPARE_NOOP09_V 31:0 + +#define NVC597_SET_SPARE_NOOP10 0x1068 +#define NVC597_SET_SPARE_NOOP10_V 31:0 + +#define NVC597_SET_SPARE_NOOP11 0x106c +#define NVC597_SET_SPARE_NOOP11_V 31:0 + +#define NVC597_SET_SPARE_NOOP12 0x1070 +#define NVC597_SET_SPARE_NOOP12_V 31:0 + +#define NVC597_SET_SPARE_NOOP13 0x1074 +#define NVC597_SET_SPARE_NOOP13_V 31:0 + +#define NVC597_SET_SPARE_NOOP14 0x1078 +#define NVC597_SET_SPARE_NOOP14_V 31:0 + +#define NVC597_SET_SPARE_NOOP15 0x107c +#define NVC597_SET_SPARE_NOOP15_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVC597_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVC597_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVC597_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD06 0x10bc +#define NVC597_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVC597_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVC597_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVC597_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVC597_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVC597_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVC597_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVC597_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD13 0x10dc +#define NVC597_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC597_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVC597_UNBIND_ALL 0x10f4 +#define NVC597_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVC597_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVC597_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVC597_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVC597_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC597_SET_RESERVED_SW_METHOD14 0x1100 +#define NVC597_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC597_SET_RESERVED_SW_METHOD15 0x1104 +#define NVC597_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC597_NO_OPERATION_DATA_HI 0x110c +#define NVC597_NO_OPERATION_DATA_HI_V 31:0 + +#define NVC597_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVC597_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVC597_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVC597_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVC597_PM_TRIGGER_END 0x1114 +#define NVC597_PM_TRIGGER_END_V 31:0 + +#define NVC597_SET_VERTEX_ID_BASE 0x1118 +#define NVC597_SET_VERTEX_ID_BASE_V 31:0 + +#define NVC597_SET_STENCIL_COMPRESSION 0x111c +#define NVC597_SET_STENCIL_COMPRESSION_ENABLE 0:0 +#define NVC597_SET_STENCIL_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STENCIL_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC597_SET_TIR_CONTROL 0x1130 +#define NVC597_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES 0:0 +#define NVC597_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC597_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC597_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES 4:4 +#define NVC597_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC597_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC597_SET_TIR_CONTROL_REDUCE_COVERAGE 1:1 +#define NVC597_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE 0x00000000 +#define NVC597_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE 0x00000001 + +#define NVC597_SET_MUTABLE_METHOD_CONTROL 0x1134 +#define NVC597_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT 0:0 +#define NVC597_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE 0x00000000 +#define NVC597_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE 0x00000001 + +#define NVC597_SET_POST_PS_INITIAL_COVERAGE 0x1138 +#define NVC597_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE 0:0 +#define NVC597_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE 0x00000000 +#define NVC597_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE 0x00000001 + +#define NVC597_SET_FILL_VIA_TRIANGLE 0x113c +#define NVC597_SET_FILL_VIA_TRIANGLE_MODE 1:0 +#define NVC597_SET_FILL_VIA_TRIANGLE_MODE_DISABLED 0x00000000 +#define NVC597_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL 0x00000001 +#define NVC597_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX 0x00000002 + +#define NVC597_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVC597_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVC597_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVC597_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVC597_FLUSH_PENDING_WRITES 0x1144 +#define NVC597_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVC597_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVC597_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC597_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC597_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC597_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVC597_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC597_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC597_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC597_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) (0x11e0+(i)*4) +#define NVC597_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X0 3:0 +#define NVC597_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y0 7:4 +#define NVC597_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X1 11:8 +#define NVC597_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y1 15:12 +#define NVC597_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X2 19:16 +#define NVC597_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y2 23:20 +#define NVC597_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X3 27:24 +#define NVC597_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y3 31:28 + +#define NVC597_SET_OFFSET_RENDER_TARGET_INDEX 0x11f0 +#define NVC597_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX 0:0 +#define NVC597_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE 0x00000000 +#define NVC597_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE 0x00000001 + +#define NVC597_FORCE_HEAVYWEIGHT_METHOD_SYNC 0x11f4 +#define NVC597_FORCE_HEAVYWEIGHT_METHOD_SYNC_V 31:0 + +#define NVC597_SET_COVERAGE_TO_COLOR 0x11f8 +#define NVC597_SET_COVERAGE_TO_COLOR_ENABLE 0:0 +#define NVC597_SET_COVERAGE_TO_COLOR_ENABLE_FALSE 0x00000000 +#define NVC597_SET_COVERAGE_TO_COLOR_ENABLE_TRUE 0x00000001 +#define NVC597_SET_COVERAGE_TO_COLOR_CT_SELECT 6:4 + +#define NVC597_DECOMPRESS_ZETA_SURFACE 0x11fc +#define NVC597_DECOMPRESS_ZETA_SURFACE_Z_ENABLE 0:0 +#define NVC597_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC597_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC597_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE 4:4 +#define NVC597_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC597_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_SCREEN_STATE_MASK 0x1204 +#define NVC597_SET_SCREEN_STATE_MASK_MASK 3:0 + +#define NVC597_SET_ZT_SPARSE 0x1208 +#define NVC597_SET_ZT_SPARSE_ENABLE 0:0 +#define NVC597_SET_ZT_SPARSE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZT_SPARSE_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ZT_SPARSE_UNMAPPED_COMPARE 1:1 +#define NVC597_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 0x00000000 +#define NVC597_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS 0x00000001 + +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC597_SET_CT_SELECT 0x121c +#define NVC597_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVC597_SET_CT_SELECT_TARGET0 6:4 +#define NVC597_SET_CT_SELECT_TARGET1 9:7 +#define NVC597_SET_CT_SELECT_TARGET2 12:10 +#define NVC597_SET_CT_SELECT_TARGET3 15:13 +#define NVC597_SET_CT_SELECT_TARGET4 18:16 +#define NVC597_SET_CT_SELECT_TARGET5 21:19 +#define NVC597_SET_CT_SELECT_TARGET6 24:22 +#define NVC597_SET_CT_SELECT_TARGET7 27:25 + +#define NVC597_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVC597_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL 0x1224 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE 1:0 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT 0x00000000 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE 0x00000001 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL 0x00000002 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE 2:2 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 0x00000000 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 0x00000001 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER 3:3 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED 0x00000000 +#define NVC597_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED 0x00000001 + +#define NVC597_SET_ZT_SIZE_A 0x1228 +#define NVC597_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVC597_SET_ZT_SIZE_B 0x122c +#define NVC597_SET_ZT_SIZE_B_HEIGHT 17:0 + +#define NVC597_SET_ZT_SIZE_C 0x1230 +#define NVC597_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVC597_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVC597_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC597_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVC597_SET_SAMPLER_BINDING 0x1234 +#define NVC597_SET_SAMPLER_BINDING_V 0:0 +#define NVC597_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVC597_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVC597_DRAW_AUTO 0x123c +#define NVC597_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVC597_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) (0x1240+(i)*4) +#define NVC597_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK_V 31:0 + +#define NVC597_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE 0x1260 +#define NVC597_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_INDEX 7:0 +#define NVC597_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_VALUE 23:8 + +#define NVC597_SET_BACK_END_COPY_A 0x1264 +#define NVC597_SET_BACK_END_COPY_A_DWORDS 7:0 +#define NVC597_SET_BACK_END_COPY_A_SATURATE32_ENABLE 8:8 +#define NVC597_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE 0x00000000 +#define NVC597_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE 0x00000001 +#define NVC597_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE 12:12 +#define NVC597_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE 0x00000000 +#define NVC597_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_BACK_END_COPY_B 0x1268 +#define NVC597_SET_BACK_END_COPY_B_SRC_ADDRESS_UPPER 7:0 + +#define NVC597_SET_BACK_END_COPY_C 0x126c +#define NVC597_SET_BACK_END_COPY_C_SRC_ADDRESS_LOWER 31:0 + +#define NVC597_SET_BACK_END_COPY_D 0x1270 +#define NVC597_SET_BACK_END_COPY_D_DEST_ADDRESS_UPPER 7:0 + +#define NVC597_SET_BACK_END_COPY_E 0x1274 +#define NVC597_SET_BACK_END_COPY_E_DEST_ADDRESS_LOWER 31:0 + +#define NVC597_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVC597_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 19:0 + +#define NVC597_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVC597_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVC597_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC597_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVC597_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVC597_CLEAR_ZCULL_REGION 0x12c8 +#define NVC597_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVC597_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVC597_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVC597_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVC597_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC597_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC597_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVC597_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC597_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC597_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVC597_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVC597_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVC597_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVC597_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVC597_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVC597_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVC597_SET_DEPTH_TEST 0x12cc +#define NVC597_SET_DEPTH_TEST_ENABLE 0:0 +#define NVC597_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVC597_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_FILL_MODE 0x12d0 +#define NVC597_SET_FILL_MODE_V 31:0 +#define NVC597_SET_FILL_MODE_V_POINT 0x00000001 +#define NVC597_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVC597_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVC597_SET_SHADE_MODE 0x12d4 +#define NVC597_SET_SHADE_MODE_V 31:0 +#define NVC597_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVC597_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVC597_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVC597_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC597_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC597_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVC597_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVC597_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVC597_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVC597_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVC597_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVC597_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVC597_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVC597_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_DEPTH_WRITE 0x12e8 +#define NVC597_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVC597_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_ALPHA_TEST 0x12ec +#define NVC597_SET_ALPHA_TEST_ENABLE 0:0 +#define NVC597_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVC597_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVC597_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVC597_DRAW_INLINE_INDEX4X8 0x1304 +#define NVC597_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVC597_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVC597_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVC597_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVC597_D3D_SET_CULL_MODE 0x1308 +#define NVC597_D3D_SET_CULL_MODE_V 31:0 +#define NVC597_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVC597_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVC597_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVC597_SET_DEPTH_FUNC 0x130c +#define NVC597_SET_DEPTH_FUNC_V 31:0 +#define NVC597_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVC597_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVC597_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC597_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC597_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVC597_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC597_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC597_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC597_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVC597_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVC597_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC597_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC597_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVC597_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC597_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC597_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC597_SET_ALPHA_REF 0x1310 +#define NVC597_SET_ALPHA_REF_V 31:0 + +#define NVC597_SET_ALPHA_FUNC 0x1314 +#define NVC597_SET_ALPHA_FUNC_V 31:0 +#define NVC597_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVC597_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVC597_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC597_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC597_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVC597_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC597_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC597_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC597_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVC597_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVC597_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC597_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC597_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVC597_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC597_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC597_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC597_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVC597_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVC597_SET_BLEND_CONST_RED 0x131c +#define NVC597_SET_BLEND_CONST_RED_V 31:0 + +#define NVC597_SET_BLEND_CONST_GREEN 0x1320 +#define NVC597_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVC597_SET_BLEND_CONST_BLUE 0x1324 +#define NVC597_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVC597_SET_BLEND_CONST_ALPHA 0x1328 +#define NVC597_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVC597_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC597_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC597_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC597_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC597_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC597_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC597_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVC597_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC597_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC597_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_BLEND_COLOR_OP 0x1340 +#define NVC597_SET_BLEND_COLOR_OP_V 31:0 +#define NVC597_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC597_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC597_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC597_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC597_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC597_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC597_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC597_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC597_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC597_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC597_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC597_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC597_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC597_SET_BLEND_ALPHA_OP 0x134c +#define NVC597_SET_BLEND_ALPHA_OP_V 31:0 +#define NVC597_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC597_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC597_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC597_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC597_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC597_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC597_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC597_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC597_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC597_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC597_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC597_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVC597_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVC597_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVC597_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC597_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC597_SET_SINGLE_ROP_CONTROL 0x135c +#define NVC597_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVC597_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC597_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_BLEND(i) (0x1360+(i)*4) +#define NVC597_SET_BLEND_ENABLE 0:0 +#define NVC597_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVC597_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_STENCIL_TEST 0x1380 +#define NVC597_SET_STENCIL_TEST_ENABLE 0:0 +#define NVC597_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC597_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_STENCIL_OP_FAIL 0x1384 +#define NVC597_SET_STENCIL_OP_FAIL_V 31:0 +#define NVC597_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC597_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC597_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC597_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC597_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC597_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC597_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC597_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC597_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC597_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC597_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC597_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC597_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC597_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC597_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC597_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC597_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVC597_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC597_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC597_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC597_SET_STENCIL_OP_ZPASS 0x138c +#define NVC597_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVC597_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC597_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC597_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC597_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC597_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC597_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC597_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC597_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC597_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC597_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC597_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC597_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC597_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC597_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC597_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC597_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC597_SET_STENCIL_FUNC 0x1390 +#define NVC597_SET_STENCIL_FUNC_V 31:0 +#define NVC597_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC597_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC597_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC597_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC597_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC597_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC597_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC597_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC597_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC597_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC597_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC597_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC597_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC597_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC597_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC597_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC597_SET_STENCIL_FUNC_REF 0x1394 +#define NVC597_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVC597_SET_STENCIL_FUNC_MASK 0x1398 +#define NVC597_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVC597_SET_STENCIL_MASK 0x139c +#define NVC597_SET_STENCIL_MASK_V 7:0 + +#define NVC597_SET_DRAW_AUTO_START 0x13a4 +#define NVC597_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVC597_SET_PS_SATURATE 0x13a8 +#define NVC597_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVC597_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVC597_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC597_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVC597_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVC597_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC597_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVC597_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVC597_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC597_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVC597_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVC597_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC597_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVC597_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVC597_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC597_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVC597_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVC597_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC597_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVC597_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVC597_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC597_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVC597_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVC597_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC597_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVC597_SET_WINDOW_ORIGIN 0x13ac +#define NVC597_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVC597_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVC597_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVC597_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVC597_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVC597_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVC597_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVC597_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC597_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVC597_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC597_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVC597_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVC597_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVC597_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC597_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC597_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC597_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC597_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC597_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC597_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVC597_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVC597_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVC597_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVC597_SET_PS_WARP_WATERMARKS 0x1450 +#define NVC597_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVC597_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVC597_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVC597_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVC597_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC597_STORE_ZCULL 0x1464 +#define NVC597_STORE_ZCULL_V 0:0 + +#define NVC597_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVC597_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVC597_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVC597_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVC597_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVC597_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVC597_LOAD_ZCULL 0x1500 +#define NVC597_LOAD_ZCULL_V 0:0 + +#define NVC597_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVC597_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVC597_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVC597_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC597_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC597_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVC597_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC597_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC597_SET_USER_CLIP_ENABLE 0x1510 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVC597_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVC597_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVC597_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVC597_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_POINT_SIZE 0x1518 +#define NVC597_SET_POINT_SIZE_V 31:0 + +#define NVC597_SET_ZCULL_STATS 0x151c +#define NVC597_SET_ZCULL_STATS_ENABLE 0:0 +#define NVC597_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_POINT_SPRITE 0x1520 +#define NVC597_SET_POINT_SPRITE_ENABLE 0:0 +#define NVC597_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC597_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC597_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC597_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC597_CLEAR_REPORT_VALUE 0x1530 +#define NVC597_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVC597_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVC597_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVC597_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVC597_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVC597_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVC597_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC597_CLEAR_REPORT_VALUE_TYPE_SCG_CLOCKS 0x00000009 + +#define NVC597_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVC597_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVC597_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVC597_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVC597_SET_ZT_SELECT 0x1538 +#define NVC597_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVC597_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVC597_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVC597_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVC597_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVC597_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVC597_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVC597_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVC597_SET_RENDER_ENABLE_A 0x1550 +#define NVC597_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_RENDER_ENABLE_B 0x1554 +#define NVC597_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_RENDER_ENABLE_C 0x1558 +#define NVC597_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC597_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC597_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC597_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC597_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC597_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC597_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC597_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC597_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC597_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC597_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVC597_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVC597_SET_ANTI_ALIASED_LINE 0x1570 +#define NVC597_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVC597_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC597_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC597_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_TEX_HEADER_POOL_C 0x157c +#define NVC597_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC597_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVC597_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVC597_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVC597_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVC597_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC597_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC597_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC597_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC597_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC597_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC597_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVC597_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVC597_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC597_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC597_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC597_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC597_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC597_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC597_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC597_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC597_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC597_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC597_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC597_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC597_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC597_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC597_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC597_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC597_SET_SRGB_WRITE 0x15b8 +#define NVC597_SET_SRGB_WRITE_ENABLE 0:0 +#define NVC597_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_DEPTH_BIAS 0x15bc +#define NVC597_SET_DEPTH_BIAS_V 31:0 + +#define NVC597_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVC597_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVC597_SET_RT_LAYER 0x15cc +#define NVC597_SET_RT_LAYER_V 15:0 +#define NVC597_SET_RT_LAYER_CONTROL 16:16 +#define NVC597_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVC597_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVC597_SET_ANTI_ALIAS 0x15d0 +#define NVC597_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVC597_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVC597_SET_EDGE_FLAG 0x15e4 +#define NVC597_SET_EDGE_FLAG_V 0:0 +#define NVC597_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVC597_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVC597_DRAW_INLINE_INDEX 0x15e8 +#define NVC597_DRAW_INLINE_INDEX_V 31:0 + +#define NVC597_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVC597_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVC597_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVC597_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVC597_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVC597_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVC597_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVC597_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVC597_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVC597_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVC597_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVC597_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVC597_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVC597_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVC597_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVC597_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVC597_SET_POINT_SPRITE_SELECT 0x1604 +#define NVC597_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVC597_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVC597_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVC597_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVC597_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVC597_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVC597_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVC597_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVC597_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVC597_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVC597_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVC597_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVC597_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVC597_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVC597_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVC597_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVC597_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVC597_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVC597_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVC597_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVC597_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVC597_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVC597_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVC597_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVC597_END 0x1614 +#define NVC597_END_V 0:0 + +#define NVC597_BEGIN 0x1618 +#define NVC597_BEGIN_OP 15:0 +#define NVC597_BEGIN_OP_POINTS 0x00000000 +#define NVC597_BEGIN_OP_LINES 0x00000001 +#define NVC597_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVC597_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVC597_BEGIN_OP_TRIANGLES 0x00000004 +#define NVC597_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVC597_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVC597_BEGIN_OP_QUADS 0x00000007 +#define NVC597_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVC597_BEGIN_OP_POLYGON 0x00000009 +#define NVC597_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVC597_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVC597_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_BEGIN_OP_PATCH 0x0000000E +#define NVC597_BEGIN_PRIMITIVE_ID 24:24 +#define NVC597_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC597_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC597_BEGIN_INSTANCE_ID 27:26 +#define NVC597_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVC597_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC597_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC597_BEGIN_SPLIT_MODE 30:29 +#define NVC597_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC597_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC597_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC597_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC597_BEGIN_INSTANCE_ITERATE_ENABLE 31:31 +#define NVC597_BEGIN_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC597_BEGIN_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_VERTEX_ID_COPY 0x161c +#define NVC597_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVC597_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVC597_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVC597_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVC597_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVC597_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVC597_LOAD_PRIMITIVE_ID 0x1624 +#define NVC597_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVC597_SET_SHADER_BASED_CULL 0x162c +#define NVC597_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVC597_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVC597_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVC597_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVC597_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVC597_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_CLASS_VERSION 0x1638 +#define NVC597_SET_CLASS_VERSION_CURRENT 15:0 +#define NVC597_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC597_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVC597_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVC597_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVC597_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVC597_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVC597_SET_DA_OUTPUT 0x164c +#define NVC597_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVC597_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVC597_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVC597_SET_ANTI_ALIASED_POINT 0x1658 +#define NVC597_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVC597_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_POINT_CENTER_MODE 0x165c +#define NVC597_SET_POINT_CENTER_MODE_V 31:0 +#define NVC597_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVC597_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVC597_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVC597_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVC597_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVC597_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVC597_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVC597_SET_LINE_STIPPLE 0x166c +#define NVC597_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVC597_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVC597_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVC597_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVC597_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVC597_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVC597_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVC597_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVC597_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVC597_SET_PROVOKING_VERTEX 0x1684 +#define NVC597_SET_PROVOKING_VERTEX_V 0:0 +#define NVC597_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVC597_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVC597_SET_TWO_SIDED_LIGHT 0x1688 +#define NVC597_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVC597_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_POLYGON_STIPPLE 0x168c +#define NVC597_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVC597_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_SHADER_CONTROL 0x1690 +#define NVC597_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVC597_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVC597_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVC597_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVC597_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVC597_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVC597_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVC597_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVC597_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVC597_CHECK_CLASS_VERSION 0x16a0 +#define NVC597_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVC597_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC597_SET_SPH_VERSION 0x16a4 +#define NVC597_SET_SPH_VERSION_CURRENT 15:0 +#define NVC597_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC597_CHECK_SPH_VERSION 0x16a8 +#define NVC597_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVC597_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC597_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVC597_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVC597_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC597_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVC597_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVC597_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVC597_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVC597_SET_SCG_GRAPHICS_PRIORITY 0x16bc +#define NVC597_SET_SCG_GRAPHICS_PRIORITY_PRIORITY 5:0 + +#define NVC597_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS(i) (0x16c0+(i)*4) +#define NVC597_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS_V 31:0 + +#define NVC597_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVC597_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVC597_SET_AAM_VERSION 0x1790 +#define NVC597_SET_AAM_VERSION_CURRENT 15:0 +#define NVC597_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC597_CHECK_AAM_VERSION 0x1794 +#define NVC597_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVC597_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC597_SET_ZT_LAYER 0x179c +#define NVC597_SET_ZT_LAYER_OFFSET 15:0 + +#define NVC597_SET_INDEX_BUFFER_A 0x17c8 +#define NVC597_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVC597_SET_INDEX_BUFFER_B 0x17cc +#define NVC597_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVC597_SET_INDEX_BUFFER_E 0x17d8 +#define NVC597_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVC597_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVC597_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVC597_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVC597_SET_INDEX_BUFFER_F 0x17dc +#define NVC597_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVC597_DRAW_INDEX_BUFFER 0x17e0 +#define NVC597_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC597_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVC597_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVC597_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVC597_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVC597_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVC597_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVC597_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVC597_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVC597_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVC597_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVC597_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVC597_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVC597_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVC597_OGL_SET_CULL 0x1918 +#define NVC597_OGL_SET_CULL_ENABLE 0:0 +#define NVC597_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVC597_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVC597_OGL_SET_FRONT_FACE 0x191c +#define NVC597_OGL_SET_FRONT_FACE_V 31:0 +#define NVC597_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVC597_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVC597_OGL_SET_CULL_FACE 0x1920 +#define NVC597_OGL_SET_CULL_FACE_V 31:0 +#define NVC597_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVC597_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVC597_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVC597_SET_VIEWPORT_PIXEL 0x1924 +#define NVC597_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVC597_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVC597_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVC597_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVC597_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVC597_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVC597_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE 17:16 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_USE_FIELD_MIN_Z_ZERO_MAX_Z_ONE 0x00000000 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MIN_Z_MAX_Z 0x00000001 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_ZERO_ONE 0x00000002 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MINUS_INF_PLUS_INF 0x00000003 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP 0x00000006 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVC597_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVC597_SET_USER_CLIP_OP 0x1940 +#define NVC597_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVC597_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVC597_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVC597_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVC597_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVC597_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVC597_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVC597_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVC597_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVC597_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVC597_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVC597_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVC597_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVC597_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVC597_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVC597_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVC597_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVC597_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVC597_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVC597_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVC597_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVC597_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVC597_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVC597_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVC597_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC597_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC597_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC597_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC597_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC597_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVC597_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVC597_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVC597_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVC597_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVC597_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVC597_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVC597_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVC597_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVC597_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVC597_INVALIDATE_ZCULL 0x1958 +#define NVC597_INVALIDATE_ZCULL_V 31:0 +#define NVC597_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVC597_SET_ZCULL 0x1968 +#define NVC597_SET_ZCULL_Z_ENABLE 0:0 +#define NVC597_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVC597_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_ZCULL_BOUNDS 0x196c +#define NVC597_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVC597_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVC597_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVC597_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC597_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVC597_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVC597_ZCULL_SYNC 0x1978 +#define NVC597_ZCULL_SYNC_V 31:0 + +#define NVC597_SET_CLIP_ID_TEST 0x197c +#define NVC597_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVC597_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVC597_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVC597_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVC597_SET_CLIP_ID 0x1984 +#define NVC597_SET_CLIP_ID_V 31:0 + +#define NVC597_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVC597_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVC597_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVC597_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVC597_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVC597_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVC597_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVC597_SET_LOGIC_OP 0x19c4 +#define NVC597_SET_LOGIC_OP_ENABLE 0:0 +#define NVC597_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVC597_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_LOGIC_OP_FUNC 0x19c8 +#define NVC597_SET_LOGIC_OP_FUNC_V 31:0 +#define NVC597_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVC597_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVC597_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVC597_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVC597_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVC597_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVC597_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVC597_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVC597_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVC597_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVC597_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVC597_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVC597_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVC597_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVC597_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVC597_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVC597_SET_Z_COMPRESSION 0x19cc +#define NVC597_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVC597_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC597_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC597_CLEAR_SURFACE 0x19d0 +#define NVC597_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVC597_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC597_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC597_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVC597_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC597_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC597_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVC597_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVC597_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVC597_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVC597_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVC597_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVC597_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVC597_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVC597_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVC597_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVC597_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVC597_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVC597_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVC597_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVC597_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVC597_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVC597_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVC597_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVC597_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC597_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVC597_SET_CT_WRITE_R_ENABLE 0:0 +#define NVC597_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVC597_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVC597_SET_CT_WRITE_G_ENABLE 4:4 +#define NVC597_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVC597_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVC597_SET_CT_WRITE_B_ENABLE 8:8 +#define NVC597_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVC597_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVC597_SET_CT_WRITE_A_ENABLE 12:12 +#define NVC597_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVC597_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVC597_PIPE_NOP 0x1a2c +#define NVC597_PIPE_NOP_V 31:0 + +#define NVC597_SET_SPARE00 0x1a30 +#define NVC597_SET_SPARE00_V 31:0 + +#define NVC597_SET_SPARE01 0x1a34 +#define NVC597_SET_SPARE01_V 31:0 + +#define NVC597_SET_SPARE02 0x1a38 +#define NVC597_SET_SPARE02_V 31:0 + +#define NVC597_SET_SPARE03 0x1a3c +#define NVC597_SET_SPARE03_V 31:0 + +#define NVC597_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC597_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC597_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC597_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC597_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC597_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC597_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVC597_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC597_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVC597_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVC597_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVC597_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVC597_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVC597_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC597_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_SCG_CLOCKS 0x00000008 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVC597_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC597_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVC597_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVC597_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC597_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC597_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVC597_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVC597_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVC597_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVC597_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVC597_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVC597_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVC597_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVC597_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVC597_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVC597_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVC597_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVC597_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVC597_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC597_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVC597_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC597_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVC597_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC597_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVC597_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVC597_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVC597_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC597_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC597_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC597_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC597_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC597_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVC597_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVC597_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVC597_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVC597_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVC597_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVC597_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVC597_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVC597_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVC597_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVC597_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVC597_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVC597_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVC597_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVC597_SET_PIPELINE_REGISTER_COUNT_V 8:0 + +#define NVC597_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVC597_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVC597_SET_PIPELINE_PROGRAM_ADDRESS_A(j) (0x2014+(j)*64) +#define NVC597_SET_PIPELINE_PROGRAM_ADDRESS_A_UPPER 7:0 + +#define NVC597_SET_PIPELINE_PROGRAM_ADDRESS_B(j) (0x2018+(j)*64) +#define NVC597_SET_PIPELINE_PROGRAM_ADDRESS_B_LOWER 31:0 + +#define NVC597_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NVC597_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NVC597_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVC597_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVC597_SET_FALCON00 0x2300 +#define NVC597_SET_FALCON00_V 31:0 + +#define NVC597_SET_FALCON01 0x2304 +#define NVC597_SET_FALCON01_V 31:0 + +#define NVC597_SET_FALCON02 0x2308 +#define NVC597_SET_FALCON02_V 31:0 + +#define NVC597_SET_FALCON03 0x230c +#define NVC597_SET_FALCON03_V 31:0 + +#define NVC597_SET_FALCON04 0x2310 +#define NVC597_SET_FALCON04_V 31:0 + +#define NVC597_SET_FALCON05 0x2314 +#define NVC597_SET_FALCON05_V 31:0 + +#define NVC597_SET_FALCON06 0x2318 +#define NVC597_SET_FALCON06_V 31:0 + +#define NVC597_SET_FALCON07 0x231c +#define NVC597_SET_FALCON07_V 31:0 + +#define NVC597_SET_FALCON08 0x2320 +#define NVC597_SET_FALCON08_V 31:0 + +#define NVC597_SET_FALCON09 0x2324 +#define NVC597_SET_FALCON09_V 31:0 + +#define NVC597_SET_FALCON10 0x2328 +#define NVC597_SET_FALCON10_V 31:0 + +#define NVC597_SET_FALCON11 0x232c +#define NVC597_SET_FALCON11_V 31:0 + +#define NVC597_SET_FALCON12 0x2330 +#define NVC597_SET_FALCON12_V 31:0 + +#define NVC597_SET_FALCON13 0x2334 +#define NVC597_SET_FALCON13_V 31:0 + +#define NVC597_SET_FALCON14 0x2338 +#define NVC597_SET_FALCON14_V 31:0 + +#define NVC597_SET_FALCON15 0x233c +#define NVC597_SET_FALCON15_V 31:0 + +#define NVC597_SET_FALCON16 0x2340 +#define NVC597_SET_FALCON16_V 31:0 + +#define NVC597_SET_FALCON17 0x2344 +#define NVC597_SET_FALCON17_V 31:0 + +#define NVC597_SET_FALCON18 0x2348 +#define NVC597_SET_FALCON18_V 31:0 + +#define NVC597_SET_FALCON19 0x234c +#define NVC597_SET_FALCON19_V 31:0 + +#define NVC597_SET_FALCON20 0x2350 +#define NVC597_SET_FALCON20_V 31:0 + +#define NVC597_SET_FALCON21 0x2354 +#define NVC597_SET_FALCON21_V 31:0 + +#define NVC597_SET_FALCON22 0x2358 +#define NVC597_SET_FALCON22_V 31:0 + +#define NVC597_SET_FALCON23 0x235c +#define NVC597_SET_FALCON23_V 31:0 + +#define NVC597_SET_FALCON24 0x2360 +#define NVC597_SET_FALCON24_V 31:0 + +#define NVC597_SET_FALCON25 0x2364 +#define NVC597_SET_FALCON25_V 31:0 + +#define NVC597_SET_FALCON26 0x2368 +#define NVC597_SET_FALCON26_V 31:0 + +#define NVC597_SET_FALCON27 0x236c +#define NVC597_SET_FALCON27_V 31:0 + +#define NVC597_SET_FALCON28 0x2370 +#define NVC597_SET_FALCON28_V 31:0 + +#define NVC597_SET_FALCON29 0x2374 +#define NVC597_SET_FALCON29_V 31:0 + +#define NVC597_SET_FALCON30 0x2378 +#define NVC597_SET_FALCON30_V 31:0 + +#define NVC597_SET_FALCON31 0x237c +#define NVC597_SET_FALCON31_V 31:0 + +#define NVC597_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVC597_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVC597_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVC597_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVC597_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVC597_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVC597_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVC597_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVC597_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVC597_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVC597_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVC597_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVC597_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVC597_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVC597_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVC597_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVC597_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVC597_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVC597_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVC597_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVC597_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVC597_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVC597_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVC597_SET_TRAP_HANDLER_A 0x25f8 +#define NVC597_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC597_SET_TRAP_HANDLER_B 0x25fc +#define NVC597_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC597_SET_COLOR_CLAMP 0x2600 +#define NVC597_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVC597_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVC597_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVC597_SET_BINDLESS_TEXTURE 0x2608 +#define NVC597_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 4:0 + +#define NVC597_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVC597_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVC597_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVC597_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVC597_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVC597_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC597_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC597_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC597_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC597_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC597_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC597_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC597_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC597_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC597_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC597_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC597_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC597_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC597_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC597_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVC597_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVC597_CALL_MME_MACRO_V 31:0 + +#define NVC597_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVC597_CALL_MME_DATA_V 31:0 + +#endif /* _cl_turing_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc597tex.h b/userspace/sdks/nv570/inc/class/clc597tex.h new file mode 100644 index 0000000..4767ff9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc597tex.h @@ -0,0 +1,1454 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2010 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ + +#ifndef __CLC597TEX_H__ +#define __CLC597TEX_H__ + +/* +** Texture Header State Blocklinear + */ + +#define NVC597_TEXHEAD_BL_COMPONENTS MW(6:0) +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R32 0x0000000f +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R16 0x0000001b +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R8 0x0000001d +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_R1 0x0000001f +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_EAC 0x00000019 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_X4V4Z24__COV4R4V 0x0000002c +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_X4V4Z24__COV8R8V 0x0000002d +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_V8Z24__COV4R12V 0x0000002e +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_X8Z24_X20V4S8__COV4R4V 0x00000031 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_X8Z24_X20V4S8__COV8R8V 0x00000032 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X20V4X8__COV4R4V 0x00000033 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X20V4X8__COV8R8V 0x00000034 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X20V4S8__COV4R4V 0x00000035 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X20V4S8__COV8R8V 0x00000036 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_X8Z24_X16V8S8__COV4R12V 0x00000037 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X16V8X8__COV4R12V 0x00000038 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X16V8S8__COV4R12V 0x00000039 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_Z16 0x0000003a +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_V8Z24__COV8R24V 0x0000003b +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_X8Z24_X16V8S8__COV8R24V 0x0000003c +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X16V8X8__COV8R24V 0x0000003d +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X16V8S8__COV8R24V 0x0000003e +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVC597_TEXHEAD_BL_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVC597_TEXHEAD_BL_R_DATA_TYPE MW(9:7) +#define NVC597_TEXHEAD_BL_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_BL_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_BL_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_BL_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_BL_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_BL_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_BL_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BL_G_DATA_TYPE MW(12:10) +#define NVC597_TEXHEAD_BL_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_BL_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_BL_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_BL_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_BL_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_BL_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_BL_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BL_B_DATA_TYPE MW(15:13) +#define NVC597_TEXHEAD_BL_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_BL_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_BL_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_BL_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_BL_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_BL_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_BL_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BL_A_DATA_TYPE MW(18:16) +#define NVC597_TEXHEAD_BL_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_BL_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_BL_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_BL_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_BL_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_BL_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_BL_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BL_X_SOURCE MW(21:19) +#define NVC597_TEXHEAD_BL_X_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_BL_X_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_BL_X_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_BL_X_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_BL_X_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_BL_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_BL_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BL_Y_SOURCE MW(24:22) +#define NVC597_TEXHEAD_BL_Y_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_BL_Y_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_BL_Y_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_BL_Y_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_BL_Y_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_BL_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_BL_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BL_Z_SOURCE MW(27:25) +#define NVC597_TEXHEAD_BL_Z_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_BL_Z_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_BL_Z_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_BL_Z_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_BL_Z_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_BL_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_BL_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BL_W_SOURCE MW(30:28) +#define NVC597_TEXHEAD_BL_W_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_BL_W_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_BL_W_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_BL_W_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_BL_W_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_BL_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_BL_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BL_PACK_COMPONENTS MW(31:31) +#define NVC597_TEXHEAD_BL_RESERVED1Y MW(36:32) +#define NVC597_TEXHEAD_BL_GOB_DEPTH_OFFSET MW(38:37) +#define NVC597_TEXHEAD_BL_RESERVED1X MW(40:39) +#define NVC597_TEXHEAD_BL_ADDRESS_BITS31TO9 MW(63:41) +#define NVC597_TEXHEAD_BL_ADDRESS_BITS48TO32 MW(80:64) +#define NVC597_TEXHEAD_BL_RESERVED_ADDRESS MW(84:81) +#define NVC597_TEXHEAD_BL_HEADER_VERSION MW(87:85) +#define NVC597_TEXHEAD_BL_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVC597_TEXHEAD_BL_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVC597_TEXHEAD_BL_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVC597_TEXHEAD_BL_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVC597_TEXHEAD_BL_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVC597_TEXHEAD_BL_RESERVED_HEADER_VERSION MW(88:88) +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVC597_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVC597_TEXHEAD_BL_RESERVED2A MW(95:93) +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_WIDTH MW(98:96) +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT MW(101:99) +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH MW(104:102) +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC597_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVC597_TEXHEAD_BL_RESERVED3Y MW(105:105) +#define NVC597_TEXHEAD_BL_TILE_WIDTH_IN_GOBS MW(108:106) +#define NVC597_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_ONE_GOB 0x00000000 +#define NVC597_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_TWO_GOBS 0x00000001 +#define NVC597_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_FOUR_GOBS 0x00000002 +#define NVC597_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_EIGHT_GOBS 0x00000003 +#define NVC597_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_SIXTEEN_GOBS 0x00000004 +#define NVC597_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_THIRTYTWO_GOBS 0x00000005 +#define NVC597_TEXHEAD_BL_GOB3D MW(109:109) +#define NVC597_TEXHEAD_BL_RESERVED3Z MW(111:110) +#define NVC597_TEXHEAD_BL_LOD_ANISO_QUALITY2 MW(112:112) +#define NVC597_TEXHEAD_BL_LOD_ANISO_QUALITY MW(113:113) +#define NVC597_TEXHEAD_BL_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVC597_TEXHEAD_BL_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVC597_TEXHEAD_BL_LOD_ISO_QUALITY MW(114:114) +#define NVC597_TEXHEAD_BL_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVC597_TEXHEAD_BL_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER MW(116:115) +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVC597_TEXHEAD_BL_ANISO_SPREAD_SCALE MW(121:117) +#define NVC597_TEXHEAD_BL_USE_HEADER_OPT_CONTROL MW(122:122) +#define NVC597_TEXHEAD_BL_DEPTH_TEXTURE MW(123:123) +#define NVC597_TEXHEAD_BL_MAX_MIP_LEVEL MW(127:124) +#define NVC597_TEXHEAD_BL_WIDTH_MINUS_ONE MW(144:128) +#define NVC597_TEXHEAD_BL_DEPTH_MINUS_ONE_BIT14 MW(145:145) +#define NVC597_TEXHEAD_BL_HEIGHT_MINUS_ONE_BIT16 MW(146:146) +#define NVC597_TEXHEAD_BL_ANISO_SPREAD_MAX_LOG2 MW(149:147) +#define NVC597_TEXHEAD_BL_S_R_G_B_CONVERSION MW(150:150) +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE MW(154:151) +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVC597_TEXHEAD_BL_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVC597_TEXHEAD_BL_SECTOR_PROMOTION MW(156:155) +#define NVC597_TEXHEAD_BL_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVC597_TEXHEAD_BL_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVC597_TEXHEAD_BL_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVC597_TEXHEAD_BL_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVC597_TEXHEAD_BL_BORDER_SIZE MW(159:157) +#define NVC597_TEXHEAD_BL_BORDER_SIZE_BORDER_SIZE_ONE 0x00000000 +#define NVC597_TEXHEAD_BL_BORDER_SIZE_BORDER_SIZE_TWO 0x00000001 +#define NVC597_TEXHEAD_BL_BORDER_SIZE_BORDER_SIZE_FOUR 0x00000002 +#define NVC597_TEXHEAD_BL_BORDER_SIZE_BORDER_SIZE_EIGHT 0x00000003 +#define NVC597_TEXHEAD_BL_BORDER_SIZE_BORDER_SAMPLER_COLOR 0x00000007 +#define NVC597_TEXHEAD_BL_HEIGHT_MINUS_ONE MW(175:160) +#define NVC597_TEXHEAD_BL_DEPTH_MINUS_ONE MW(189:176) +#define NVC597_TEXHEAD_BL_RESERVED5A MW(190:190) +#define NVC597_TEXHEAD_BL_NORMALIZED_COORDS MW(191:191) +#define NVC597_TEXHEAD_BL_RESERVED6Y MW(192:192) +#define NVC597_TEXHEAD_BL_TRILIN_OPT MW(197:193) +#define NVC597_TEXHEAD_BL_MIP_LOD_BIAS MW(210:198) +#define NVC597_TEXHEAD_BL_ANISO_BIAS MW(214:211) +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVC597_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVC597_TEXHEAD_BL_MAX_ANISOTROPY MW(221:219) +#define NVC597_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVC597_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVC597_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVC597_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVC597_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVC597_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVC597_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVC597_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVC597_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVC597_TEXHEAD_BL_RES_VIEW_MIN_MIP_LEVEL MW(227:224) +#define NVC597_TEXHEAD_BL_RES_VIEW_MAX_MIP_LEVEL MW(231:228) +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT MW(235:232) +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_1X1 0x00000000 +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X1 0x00000001 +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X2 0x00000002 +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X2 0x00000003 +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X2_D3D 0x00000004 +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X1_D3D 0x00000005 +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X4 0x00000006 +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X2_VC_4 0x00000008 +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X2_VC_12 0x00000009 +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X2_VC_8 0x0000000a +#define NVC597_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X2_VC_24 0x0000000b +#define NVC597_TEXHEAD_BL_MIN_LOD_CLAMP MW(247:236) +#define NVC597_TEXHEAD_BL_RESERVED7Y MW(255:248) + + +/* +** Texture Header State Blocklinear Color Key + */ + +#define NVC597_TEXHEAD_BLCK_COMPONENTS MW(6:0) +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R32 0x0000000f +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R16 0x0000001b +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R8 0x0000001d +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_R1 0x0000001f +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_EAC 0x00000019 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_X4V4Z24__COV4R4V 0x0000002c +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_X4V4Z24__COV8R8V 0x0000002d +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_V8Z24__COV4R12V 0x0000002e +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_X8Z24_X20V4S8__COV4R4V 0x00000031 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_X8Z24_X20V4S8__COV8R8V 0x00000032 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X20V4X8__COV4R4V 0x00000033 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X20V4X8__COV8R8V 0x00000034 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X20V4S8__COV4R4V 0x00000035 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X20V4S8__COV8R8V 0x00000036 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_X8Z24_X16V8S8__COV4R12V 0x00000037 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X16V8X8__COV4R12V 0x00000038 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X16V8S8__COV4R12V 0x00000039 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_Z16 0x0000003a +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_V8Z24__COV8R24V 0x0000003b +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_X8Z24_X16V8S8__COV8R24V 0x0000003c +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X16V8X8__COV8R24V 0x0000003d +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X16V8S8__COV8R24V 0x0000003e +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVC597_TEXHEAD_BLCK_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVC597_TEXHEAD_BLCK_R_DATA_TYPE MW(9:7) +#define NVC597_TEXHEAD_BLCK_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_BLCK_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_BLCK_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_BLCK_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_BLCK_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_BLCK_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_BLCK_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BLCK_G_DATA_TYPE MW(12:10) +#define NVC597_TEXHEAD_BLCK_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_BLCK_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_BLCK_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_BLCK_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_BLCK_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_BLCK_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_BLCK_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BLCK_B_DATA_TYPE MW(15:13) +#define NVC597_TEXHEAD_BLCK_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_BLCK_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_BLCK_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_BLCK_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_BLCK_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_BLCK_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_BLCK_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BLCK_A_DATA_TYPE MW(18:16) +#define NVC597_TEXHEAD_BLCK_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_BLCK_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_BLCK_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_BLCK_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_BLCK_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_BLCK_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_BLCK_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BLCK_X_SOURCE MW(21:19) +#define NVC597_TEXHEAD_BLCK_X_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_BLCK_X_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_BLCK_X_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_BLCK_X_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_BLCK_X_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_BLCK_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_BLCK_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BLCK_Y_SOURCE MW(24:22) +#define NVC597_TEXHEAD_BLCK_Y_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_BLCK_Y_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_BLCK_Y_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_BLCK_Y_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_BLCK_Y_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_BLCK_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_BLCK_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BLCK_Z_SOURCE MW(27:25) +#define NVC597_TEXHEAD_BLCK_Z_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_BLCK_Z_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_BLCK_Z_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_BLCK_Z_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_BLCK_Z_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_BLCK_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_BLCK_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BLCK_W_SOURCE MW(30:28) +#define NVC597_TEXHEAD_BLCK_W_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_BLCK_W_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_BLCK_W_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_BLCK_W_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_BLCK_W_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_BLCK_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_BLCK_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_BLCK_PACK_COMPONENTS MW(31:31) +#define NVC597_TEXHEAD_BLCK_RESERVED1Y MW(36:32) +#define NVC597_TEXHEAD_BLCK_GOB_DEPTH_OFFSET MW(38:37) +#define NVC597_TEXHEAD_BLCK_RESERVED1X MW(40:39) +#define NVC597_TEXHEAD_BLCK_ADDRESS_BITS31TO9 MW(63:41) +#define NVC597_TEXHEAD_BLCK_ADDRESS_BITS48TO32 MW(80:64) +#define NVC597_TEXHEAD_BLCK_RESERVED_ADDRESS MW(84:81) +#define NVC597_TEXHEAD_BLCK_HEADER_VERSION MW(87:85) +#define NVC597_TEXHEAD_BLCK_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVC597_TEXHEAD_BLCK_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVC597_TEXHEAD_BLCK_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVC597_TEXHEAD_BLCK_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVC597_TEXHEAD_BLCK_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVC597_TEXHEAD_BLCK_RESERVED_HEADER_VERSION MW(88:88) +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVC597_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVC597_TEXHEAD_BLCK_RESERVED2A MW(95:93) +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_WIDTH MW(98:96) +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT MW(101:99) +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH MW(104:102) +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC597_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVC597_TEXHEAD_BLCK_RESERVED3Y MW(105:105) +#define NVC597_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS MW(108:106) +#define NVC597_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_ONE_GOB 0x00000000 +#define NVC597_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_TWO_GOBS 0x00000001 +#define NVC597_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_FOUR_GOBS 0x00000002 +#define NVC597_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_EIGHT_GOBS 0x00000003 +#define NVC597_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_SIXTEEN_GOBS 0x00000004 +#define NVC597_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_THIRTYTWO_GOBS 0x00000005 +#define NVC597_TEXHEAD_BLCK_GOB3D MW(109:109) +#define NVC597_TEXHEAD_BLCK_RESERVED3Z MW(111:110) +#define NVC597_TEXHEAD_BLCK_LOD_ANISO_QUALITY2 MW(112:112) +#define NVC597_TEXHEAD_BLCK_LOD_ANISO_QUALITY MW(113:113) +#define NVC597_TEXHEAD_BLCK_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVC597_TEXHEAD_BLCK_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVC597_TEXHEAD_BLCK_LOD_ISO_QUALITY MW(114:114) +#define NVC597_TEXHEAD_BLCK_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVC597_TEXHEAD_BLCK_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER MW(116:115) +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVC597_TEXHEAD_BLCK_ANISO_SPREAD_SCALE MW(121:117) +#define NVC597_TEXHEAD_BLCK_USE_HEADER_OPT_CONTROL MW(122:122) +#define NVC597_TEXHEAD_BLCK_DEPTH_TEXTURE MW(123:123) +#define NVC597_TEXHEAD_BLCK_MAX_MIP_LEVEL MW(127:124) +#define NVC597_TEXHEAD_BLCK_WIDTH_MINUS_ONE MW(144:128) +#define NVC597_TEXHEAD_BLCK_DEPTH_MINUS_ONE_BIT14 MW(145:145) +#define NVC597_TEXHEAD_BLCK_HEIGHT_MINUS_ONE_BIT16 MW(146:146) +#define NVC597_TEXHEAD_BLCK_ANISO_SPREAD_MAX_LOG2 MW(149:147) +#define NVC597_TEXHEAD_BLCK_S_R_G_B_CONVERSION MW(150:150) +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE MW(154:151) +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVC597_TEXHEAD_BLCK_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVC597_TEXHEAD_BLCK_SECTOR_PROMOTION MW(156:155) +#define NVC597_TEXHEAD_BLCK_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVC597_TEXHEAD_BLCK_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVC597_TEXHEAD_BLCK_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVC597_TEXHEAD_BLCK_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVC597_TEXHEAD_BLCK_BORDER_SIZE MW(159:157) +#define NVC597_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SIZE_ONE 0x00000000 +#define NVC597_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SIZE_TWO 0x00000001 +#define NVC597_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SIZE_FOUR 0x00000002 +#define NVC597_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SIZE_EIGHT 0x00000003 +#define NVC597_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SAMPLER_COLOR 0x00000007 +#define NVC597_TEXHEAD_BLCK_HEIGHT_MINUS_ONE MW(175:160) +#define NVC597_TEXHEAD_BLCK_DEPTH_MINUS_ONE MW(189:176) +#define NVC597_TEXHEAD_BLCK_RESERVED5A MW(190:190) +#define NVC597_TEXHEAD_BLCK_NORMALIZED_COORDS MW(191:191) +#define NVC597_TEXHEAD_BLCK_COLOR_KEY_OP MW(192:192) +#define NVC597_TEXHEAD_BLCK_TRILIN_OPT MW(197:193) +#define NVC597_TEXHEAD_BLCK_MIP_LOD_BIAS MW(210:198) +#define NVC597_TEXHEAD_BLCK_ANISO_BIAS MW(214:211) +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVC597_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVC597_TEXHEAD_BLCK_MAX_ANISOTROPY MW(221:219) +#define NVC597_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVC597_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVC597_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVC597_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVC597_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVC597_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVC597_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVC597_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVC597_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVC597_TEXHEAD_BLCK_COLOR_KEY_VALUE MW(255:224) + + +/* +** Texture Header State One-D Buffer + */ + +#define NVC597_TEXHEAD_1D_COMPONENTS MW(6:0) +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R32 0x0000000f +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R16 0x0000001b +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R8 0x0000001d +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_R1 0x0000001f +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_EAC 0x00000019 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_X4V4Z24__COV4R4V 0x0000002c +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_X4V4Z24__COV8R8V 0x0000002d +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_V8Z24__COV4R12V 0x0000002e +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_X8Z24_X20V4S8__COV4R4V 0x00000031 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_X8Z24_X20V4S8__COV8R8V 0x00000032 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X20V4X8__COV4R4V 0x00000033 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X20V4X8__COV8R8V 0x00000034 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X20V4S8__COV4R4V 0x00000035 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X20V4S8__COV8R8V 0x00000036 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_X8Z24_X16V8S8__COV4R12V 0x00000037 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X16V8X8__COV4R12V 0x00000038 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X16V8S8__COV4R12V 0x00000039 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_Z16 0x0000003a +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_V8Z24__COV8R24V 0x0000003b +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_X8Z24_X16V8S8__COV8R24V 0x0000003c +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X16V8X8__COV8R24V 0x0000003d +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X16V8S8__COV8R24V 0x0000003e +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVC597_TEXHEAD_1D_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVC597_TEXHEAD_1D_R_DATA_TYPE MW(9:7) +#define NVC597_TEXHEAD_1D_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_1D_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_1D_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_1D_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_1D_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_1D_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_1D_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_1D_G_DATA_TYPE MW(12:10) +#define NVC597_TEXHEAD_1D_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_1D_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_1D_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_1D_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_1D_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_1D_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_1D_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_1D_B_DATA_TYPE MW(15:13) +#define NVC597_TEXHEAD_1D_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_1D_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_1D_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_1D_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_1D_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_1D_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_1D_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_1D_A_DATA_TYPE MW(18:16) +#define NVC597_TEXHEAD_1D_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_1D_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_1D_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_1D_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_1D_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_1D_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_1D_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_1D_X_SOURCE MW(21:19) +#define NVC597_TEXHEAD_1D_X_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_1D_X_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_1D_X_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_1D_X_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_1D_X_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_1D_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_1D_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_1D_Y_SOURCE MW(24:22) +#define NVC597_TEXHEAD_1D_Y_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_1D_Y_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_1D_Y_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_1D_Y_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_1D_Y_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_1D_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_1D_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_1D_Z_SOURCE MW(27:25) +#define NVC597_TEXHEAD_1D_Z_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_1D_Z_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_1D_Z_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_1D_Z_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_1D_Z_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_1D_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_1D_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_1D_W_SOURCE MW(30:28) +#define NVC597_TEXHEAD_1D_W_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_1D_W_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_1D_W_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_1D_W_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_1D_W_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_1D_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_1D_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_1D_PACK_COMPONENTS MW(31:31) +#define NVC597_TEXHEAD_1D_ADDRESS_BITS31TO0 MW(63:32) +#define NVC597_TEXHEAD_1D_ADDRESS_BITS48TO32 MW(80:64) +#define NVC597_TEXHEAD_1D_RESERVED_ADDRESS MW(84:81) +#define NVC597_TEXHEAD_1D_HEADER_VERSION MW(87:85) +#define NVC597_TEXHEAD_1D_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVC597_TEXHEAD_1D_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVC597_TEXHEAD_1D_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVC597_TEXHEAD_1D_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVC597_TEXHEAD_1D_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVC597_TEXHEAD_1D_RESERVED_HEADER_VERSION MW(88:88) +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVC597_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVC597_TEXHEAD_1D_RESERVED2A MW(95:93) +#define NVC597_TEXHEAD_1D_WIDTH_MINUS_ONE_BITS31TO16 MW(111:96) +#define NVC597_TEXHEAD_1D_RESERVED3X MW(127:112) +#define NVC597_TEXHEAD_1D_WIDTH_MINUS_ONE_BITS15TO0 MW(143:128) +#define NVC597_TEXHEAD_1D_RESERVED4X MW(149:144) +#define NVC597_TEXHEAD_1D_S_R_G_B_CONVERSION MW(150:150) +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE MW(154:151) +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVC597_TEXHEAD_1D_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVC597_TEXHEAD_1D_SECTOR_PROMOTION MW(156:155) +#define NVC597_TEXHEAD_1D_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVC597_TEXHEAD_1D_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVC597_TEXHEAD_1D_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVC597_TEXHEAD_1D_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVC597_TEXHEAD_1D_RESERVED4Y MW(159:157) +#define NVC597_TEXHEAD_1D_RESERVED5X MW(189:160) +#define NVC597_TEXHEAD_1D_RESERVED5A MW(190:190) +#define NVC597_TEXHEAD_1D_RESERVED5Y MW(191:191) +#define NVC597_TEXHEAD_1D_RESERVED6X MW(223:192) +#define NVC597_TEXHEAD_1D_RESERVED7X MW(255:224) + + +/* +** Texture Header State Pitch + */ + +#define NVC597_TEXHEAD_PITCH_COMPONENTS MW(6:0) +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R32 0x0000000f +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R16 0x0000001b +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R8 0x0000001d +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_R1 0x0000001f +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_EAC 0x00000019 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_X4V4Z24__COV4R4V 0x0000002c +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_X4V4Z24__COV8R8V 0x0000002d +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_V8Z24__COV4R12V 0x0000002e +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_X8Z24_X20V4S8__COV4R4V 0x00000031 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_X8Z24_X20V4S8__COV8R8V 0x00000032 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X20V4X8__COV4R4V 0x00000033 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X20V4X8__COV8R8V 0x00000034 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X20V4S8__COV4R4V 0x00000035 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X20V4S8__COV8R8V 0x00000036 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_X8Z24_X16V8S8__COV4R12V 0x00000037 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X16V8X8__COV4R12V 0x00000038 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X16V8S8__COV4R12V 0x00000039 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_Z16 0x0000003a +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_V8Z24__COV8R24V 0x0000003b +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_X8Z24_X16V8S8__COV8R24V 0x0000003c +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X16V8X8__COV8R24V 0x0000003d +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X16V8S8__COV8R24V 0x0000003e +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVC597_TEXHEAD_PITCH_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVC597_TEXHEAD_PITCH_R_DATA_TYPE MW(9:7) +#define NVC597_TEXHEAD_PITCH_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_PITCH_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_PITCH_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_PITCH_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_PITCH_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_PITCH_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_PITCH_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCH_G_DATA_TYPE MW(12:10) +#define NVC597_TEXHEAD_PITCH_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_PITCH_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_PITCH_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_PITCH_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_PITCH_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_PITCH_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_PITCH_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCH_B_DATA_TYPE MW(15:13) +#define NVC597_TEXHEAD_PITCH_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_PITCH_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_PITCH_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_PITCH_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_PITCH_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_PITCH_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_PITCH_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCH_A_DATA_TYPE MW(18:16) +#define NVC597_TEXHEAD_PITCH_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_PITCH_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_PITCH_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_PITCH_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_PITCH_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_PITCH_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_PITCH_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCH_X_SOURCE MW(21:19) +#define NVC597_TEXHEAD_PITCH_X_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_PITCH_X_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_PITCH_X_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_PITCH_X_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_PITCH_X_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_PITCH_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_PITCH_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCH_Y_SOURCE MW(24:22) +#define NVC597_TEXHEAD_PITCH_Y_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_PITCH_Y_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_PITCH_Y_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_PITCH_Y_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_PITCH_Y_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_PITCH_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_PITCH_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCH_Z_SOURCE MW(27:25) +#define NVC597_TEXHEAD_PITCH_Z_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_PITCH_Z_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_PITCH_Z_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_PITCH_Z_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_PITCH_Z_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_PITCH_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_PITCH_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCH_W_SOURCE MW(30:28) +#define NVC597_TEXHEAD_PITCH_W_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_PITCH_W_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_PITCH_W_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_PITCH_W_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_PITCH_W_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_PITCH_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_PITCH_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCH_PACK_COMPONENTS MW(31:31) +#define NVC597_TEXHEAD_PITCH_RESERVED1A MW(36:32) +#define NVC597_TEXHEAD_PITCH_ADDRESS_BITS31TO5 MW(63:37) +#define NVC597_TEXHEAD_PITCH_ADDRESS_BITS48TO32 MW(80:64) +#define NVC597_TEXHEAD_PITCH_RESERVED_ADDRESS MW(84:81) +#define NVC597_TEXHEAD_PITCH_HEADER_VERSION MW(87:85) +#define NVC597_TEXHEAD_PITCH_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVC597_TEXHEAD_PITCH_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVC597_TEXHEAD_PITCH_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVC597_TEXHEAD_PITCH_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVC597_TEXHEAD_PITCH_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVC597_TEXHEAD_PITCH_RESERVED_HEADER_VERSION MW(88:88) +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVC597_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVC597_TEXHEAD_PITCH_RESERVED2A MW(95:93) +#define NVC597_TEXHEAD_PITCH_PITCH_BITS20TO5 MW(111:96) +#define NVC597_TEXHEAD_PITCH_LOD_ANISO_QUALITY2 MW(112:112) +#define NVC597_TEXHEAD_PITCH_LOD_ANISO_QUALITY MW(113:113) +#define NVC597_TEXHEAD_PITCH_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVC597_TEXHEAD_PITCH_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVC597_TEXHEAD_PITCH_LOD_ISO_QUALITY MW(114:114) +#define NVC597_TEXHEAD_PITCH_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVC597_TEXHEAD_PITCH_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER MW(116:115) +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVC597_TEXHEAD_PITCH_ANISO_SPREAD_SCALE MW(121:117) +#define NVC597_TEXHEAD_PITCH_USE_HEADER_OPT_CONTROL MW(122:122) +#define NVC597_TEXHEAD_PITCH_DEPTH_TEXTURE MW(123:123) +#define NVC597_TEXHEAD_PITCH_MAX_MIP_LEVEL MW(127:124) +#define NVC597_TEXHEAD_PITCH_WIDTH_MINUS_ONE MW(144:128) +#define NVC597_TEXHEAD_PITCH_PITCH_BIT21 MW(145:145) +#define NVC597_TEXHEAD_PITCH_HEIGHT_MINUS_ONE_BIT16 MW(146:146) +#define NVC597_TEXHEAD_PITCH_ANISO_SPREAD_MAX_LOG2 MW(149:147) +#define NVC597_TEXHEAD_PITCH_S_R_G_B_CONVERSION MW(150:150) +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE MW(154:151) +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVC597_TEXHEAD_PITCH_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVC597_TEXHEAD_PITCH_SECTOR_PROMOTION MW(156:155) +#define NVC597_TEXHEAD_PITCH_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVC597_TEXHEAD_PITCH_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVC597_TEXHEAD_PITCH_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVC597_TEXHEAD_PITCH_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVC597_TEXHEAD_PITCH_BORDER_SIZE MW(159:157) +#define NVC597_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SIZE_ONE 0x00000000 +#define NVC597_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SIZE_TWO 0x00000001 +#define NVC597_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SIZE_FOUR 0x00000002 +#define NVC597_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SIZE_EIGHT 0x00000003 +#define NVC597_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SAMPLER_COLOR 0x00000007 +#define NVC597_TEXHEAD_PITCH_HEIGHT_MINUS_ONE MW(175:160) +#define NVC597_TEXHEAD_PITCH_DEPTH_MINUS_ONE MW(189:176) +#define NVC597_TEXHEAD_PITCH_RESERVED5A MW(190:190) +#define NVC597_TEXHEAD_PITCH_NORMALIZED_COORDS MW(191:191) +#define NVC597_TEXHEAD_PITCH_RESERVED6Y MW(192:192) +#define NVC597_TEXHEAD_PITCH_TRILIN_OPT MW(197:193) +#define NVC597_TEXHEAD_PITCH_MIP_LOD_BIAS MW(210:198) +#define NVC597_TEXHEAD_PITCH_ANISO_BIAS MW(214:211) +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVC597_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVC597_TEXHEAD_PITCH_MAX_ANISOTROPY MW(221:219) +#define NVC597_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVC597_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVC597_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVC597_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVC597_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVC597_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVC597_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVC597_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVC597_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVC597_TEXHEAD_PITCH_RES_VIEW_MIN_MIP_LEVEL MW(227:224) +#define NVC597_TEXHEAD_PITCH_RES_VIEW_MAX_MIP_LEVEL MW(231:228) +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT MW(235:232) +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_1X1 0x00000000 +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X1 0x00000001 +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X2 0x00000002 +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2 0x00000003 +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2_D3D 0x00000004 +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X1_D3D 0x00000005 +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X4 0x00000006 +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X2_VC_4 0x00000008 +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X2_VC_12 0x00000009 +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2_VC_8 0x0000000a +#define NVC597_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2_VC_24 0x0000000b +#define NVC597_TEXHEAD_PITCH_MIN_LOD_CLAMP MW(247:236) +#define NVC597_TEXHEAD_PITCH_RESERVED7Y MW(255:248) + + +/* +** Texture Header State Pitch Color Key + */ + +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS MW(6:0) +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32 0x0000000f +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R16 0x0000001b +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R8 0x0000001d +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R1 0x0000001f +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_EAC 0x00000019 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X4V4Z24__COV4R4V 0x0000002c +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X4V4Z24__COV8R8V 0x0000002d +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_V8Z24__COV4R12V 0x0000002e +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X8Z24_X20V4S8__COV4R4V 0x00000031 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X8Z24_X20V4S8__COV8R8V 0x00000032 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X20V4X8__COV4R4V 0x00000033 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X20V4X8__COV8R8V 0x00000034 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X20V4S8__COV4R4V 0x00000035 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X20V4S8__COV8R8V 0x00000036 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X8Z24_X16V8S8__COV4R12V 0x00000037 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X16V8X8__COV4R12V 0x00000038 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X16V8S8__COV4R12V 0x00000039 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_Z16 0x0000003a +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_V8Z24__COV8R24V 0x0000003b +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X8Z24_X16V8S8__COV8R24V 0x0000003c +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X16V8X8__COV8R24V 0x0000003d +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X16V8S8__COV8R24V 0x0000003e +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVC597_TEXHEAD_PITCHCK_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVC597_TEXHEAD_PITCHCK_R_DATA_TYPE MW(9:7) +#define NVC597_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_G_DATA_TYPE MW(12:10) +#define NVC597_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_B_DATA_TYPE MW(15:13) +#define NVC597_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_A_DATA_TYPE MW(18:16) +#define NVC597_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_X_SOURCE MW(21:19) +#define NVC597_TEXHEAD_PITCHCK_X_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_X_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_X_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_X_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_X_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_Y_SOURCE MW(24:22) +#define NVC597_TEXHEAD_PITCHCK_Y_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_Y_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_Y_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_Y_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_Y_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_Z_SOURCE MW(27:25) +#define NVC597_TEXHEAD_PITCHCK_Z_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_Z_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_Z_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_Z_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_Z_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_W_SOURCE MW(30:28) +#define NVC597_TEXHEAD_PITCHCK_W_SOURCE_IN_ZERO 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_W_SOURCE_IN_R 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_W_SOURCE_IN_G 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_W_SOURCE_IN_B 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_W_SOURCE_IN_A 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_PACK_COMPONENTS MW(31:31) +#define NVC597_TEXHEAD_PITCHCK_RESERVED1A MW(36:32) +#define NVC597_TEXHEAD_PITCHCK_ADDRESS_BITS31TO5 MW(63:37) +#define NVC597_TEXHEAD_PITCHCK_ADDRESS_BITS48TO32 MW(80:64) +#define NVC597_TEXHEAD_PITCHCK_RESERVED_ADDRESS MW(84:81) +#define NVC597_TEXHEAD_PITCHCK_HEADER_VERSION MW(87:85) +#define NVC597_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_RESERVED_HEADER_VERSION MW(88:88) +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVC597_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVC597_TEXHEAD_PITCHCK_RESERVED2A MW(95:93) +#define NVC597_TEXHEAD_PITCHCK_PITCH_BITS20TO5 MW(111:96) +#define NVC597_TEXHEAD_PITCHCK_LOD_ANISO_QUALITY2 MW(112:112) +#define NVC597_TEXHEAD_PITCHCK_LOD_ANISO_QUALITY MW(113:113) +#define NVC597_TEXHEAD_PITCHCK_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_LOD_ISO_QUALITY MW(114:114) +#define NVC597_TEXHEAD_PITCHCK_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER MW(116:115) +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_ANISO_SPREAD_SCALE MW(121:117) +#define NVC597_TEXHEAD_PITCHCK_USE_HEADER_OPT_CONTROL MW(122:122) +#define NVC597_TEXHEAD_PITCHCK_DEPTH_TEXTURE MW(123:123) +#define NVC597_TEXHEAD_PITCHCK_MAX_MIP_LEVEL MW(127:124) +#define NVC597_TEXHEAD_PITCHCK_WIDTH_MINUS_ONE MW(144:128) +#define NVC597_TEXHEAD_PITCHCK_PITCH_BIT21 MW(145:145) +#define NVC597_TEXHEAD_PITCHCK_HEIGHT_MINUS_ONE_BIT16 MW(146:146) +#define NVC597_TEXHEAD_PITCHCK_ANISO_SPREAD_MAX_LOG2 MW(149:147) +#define NVC597_TEXHEAD_PITCHCK_S_R_G_B_CONVERSION MW(150:150) +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE MW(154:151) +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVC597_TEXHEAD_PITCHCK_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVC597_TEXHEAD_PITCHCK_SECTOR_PROMOTION MW(156:155) +#define NVC597_TEXHEAD_PITCHCK_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_BORDER_SIZE MW(159:157) +#define NVC597_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SIZE_ONE 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SIZE_TWO 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SIZE_FOUR 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SIZE_EIGHT 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SAMPLER_COLOR 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_HEIGHT_MINUS_ONE MW(175:160) +#define NVC597_TEXHEAD_PITCHCK_DEPTH_MINUS_ONE MW(189:176) +#define NVC597_TEXHEAD_PITCHCK_RESERVED5A MW(190:190) +#define NVC597_TEXHEAD_PITCHCK_NORMALIZED_COORDS MW(191:191) +#define NVC597_TEXHEAD_PITCHCK_COLOR_KEY_OP MW(192:192) +#define NVC597_TEXHEAD_PITCHCK_TRILIN_OPT MW(197:193) +#define NVC597_TEXHEAD_PITCHCK_MIP_LOD_BIAS MW(210:198) +#define NVC597_TEXHEAD_PITCHCK_ANISO_BIAS MW(214:211) +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_MAX_ANISOTROPY MW(221:219) +#define NVC597_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVC597_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVC597_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVC597_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVC597_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVC597_TEXHEAD_PITCHCK_COLOR_KEY_VALUE MW(255:224) + + +/* +** Texture Sampler State + */ + +#define NVC597_TEXSAMP0_ADDRESS_U 2:0 +#define NVC597_TEXSAMP0_ADDRESS_U_WRAP 0x00000000 +#define NVC597_TEXSAMP0_ADDRESS_U_MIRROR 0x00000001 +#define NVC597_TEXSAMP0_ADDRESS_U_CLAMP_TO_EDGE 0x00000002 +#define NVC597_TEXSAMP0_ADDRESS_U_BORDER 0x00000003 +#define NVC597_TEXSAMP0_ADDRESS_U_CLAMP_OGL 0x00000004 +#define NVC597_TEXSAMP0_ADDRESS_U_MIRROR_ONCE_CLAMP_TO_EDGE 0x00000005 +#define NVC597_TEXSAMP0_ADDRESS_U_MIRROR_ONCE_BORDER 0x00000006 +#define NVC597_TEXSAMP0_ADDRESS_U_MIRROR_ONCE_CLAMP_OGL 0x00000007 +#define NVC597_TEXSAMP0_ADDRESS_V 5:3 +#define NVC597_TEXSAMP0_ADDRESS_V_WRAP 0x00000000 +#define NVC597_TEXSAMP0_ADDRESS_V_MIRROR 0x00000001 +#define NVC597_TEXSAMP0_ADDRESS_V_CLAMP_TO_EDGE 0x00000002 +#define NVC597_TEXSAMP0_ADDRESS_V_BORDER 0x00000003 +#define NVC597_TEXSAMP0_ADDRESS_V_CLAMP_OGL 0x00000004 +#define NVC597_TEXSAMP0_ADDRESS_V_MIRROR_ONCE_CLAMP_TO_EDGE 0x00000005 +#define NVC597_TEXSAMP0_ADDRESS_V_MIRROR_ONCE_BORDER 0x00000006 +#define NVC597_TEXSAMP0_ADDRESS_V_MIRROR_ONCE_CLAMP_OGL 0x00000007 +#define NVC597_TEXSAMP0_ADDRESS_P 8:6 +#define NVC597_TEXSAMP0_ADDRESS_P_WRAP 0x00000000 +#define NVC597_TEXSAMP0_ADDRESS_P_MIRROR 0x00000001 +#define NVC597_TEXSAMP0_ADDRESS_P_CLAMP_TO_EDGE 0x00000002 +#define NVC597_TEXSAMP0_ADDRESS_P_BORDER 0x00000003 +#define NVC597_TEXSAMP0_ADDRESS_P_CLAMP_OGL 0x00000004 +#define NVC597_TEXSAMP0_ADDRESS_P_MIRROR_ONCE_CLAMP_TO_EDGE 0x00000005 +#define NVC597_TEXSAMP0_ADDRESS_P_MIRROR_ONCE_BORDER 0x00000006 +#define NVC597_TEXSAMP0_ADDRESS_P_MIRROR_ONCE_CLAMP_OGL 0x00000007 +#define NVC597_TEXSAMP0_DEPTH_COMPARE 9:9 +#define NVC597_TEXSAMP0_DEPTH_COMPARE_FUNC 12:10 +#define NVC597_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_NEVER 0x00000000 +#define NVC597_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_LESS 0x00000001 +#define NVC597_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_EQUAL 0x00000002 +#define NVC597_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_LEQUAL 0x00000003 +#define NVC597_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_GREATER 0x00000004 +#define NVC597_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_NOTEQUAL 0x00000005 +#define NVC597_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_GEQUAL 0x00000006 +#define NVC597_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_ALWAYS 0x00000007 +#define NVC597_TEXSAMP0_S_R_G_B_CONVERSION 13:13 +#define NVC597_TEXSAMP0_RESERVED0A 16:14 +#define NVC597_TEXSAMP0_RESERVED0B 19:17 +#define NVC597_TEXSAMP0_MAX_ANISOTROPY 22:20 +#define NVC597_TEXSAMP0_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVC597_TEXSAMP0_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVC597_TEXSAMP0_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVC597_TEXSAMP0_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVC597_TEXSAMP0_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVC597_TEXSAMP0_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVC597_TEXSAMP0_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVC597_TEXSAMP0_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVC597_TEXSAMP0_FORCED_INVALID 31:31 +#define NVC597_TEXSAMP1_MAG_FILTER 2:0 +#define NVC597_TEXSAMP1_MAG_FILTER_MAG_POINT 0x00000001 +#define NVC597_TEXSAMP1_MAG_FILTER_MAG_LINEAR 0x00000002 +#define NVC597_TEXSAMP1_MAG_FILTER_VCAA_4_TAP 0x00000003 +#define NVC597_TEXSAMP1_MAG_FILTER_VCAA_8_TAP 0x00000004 +#define NVC597_TEXSAMP1_MIN_LOD_CLAMP_BEHAVIOR_FOR_NEAREST_MIP 3:3 +#define NVC597_TEXSAMP1_MIN_LOD_CLAMP_BEHAVIOR_FOR_NEAREST_MIP_INTEGER_AND_FRACTION 0x00000000 +#define NVC597_TEXSAMP1_MIN_LOD_CLAMP_BEHAVIOR_FOR_NEAREST_MIP_INTEGER_ONLY 0x00000001 +#define NVC597_TEXSAMP1_MIN_FILTER 5:4 +#define NVC597_TEXSAMP1_MIN_FILTER_MIN_POINT 0x00000001 +#define NVC597_TEXSAMP1_MIN_FILTER_MIN_LINEAR 0x00000002 +#define NVC597_TEXSAMP1_MIN_FILTER_MIN_ANISO 0x00000003 +#define NVC597_TEXSAMP1_MIP_FILTER 7:6 +#define NVC597_TEXSAMP1_MIP_FILTER_MIP_NONE 0x00000001 +#define NVC597_TEXSAMP1_MIP_FILTER_MIP_POINT 0x00000002 +#define NVC597_TEXSAMP1_MIP_FILTER_MIP_LINEAR 0x00000003 +#define NVC597_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING 9:8 +#define NVC597_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING_USE_WRAP 0x00000000 +#define NVC597_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING_OVERRIDE_WRAP 0x00000001 +#define NVC597_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING_AUTO_SPAN_SEAM 0x00000002 +#define NVC597_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING_AUTO_CROSS_SEAM 0x00000003 +#define NVC597_TEXSAMP1_REDUCTION_FILTER 11:10 +#define NVC597_TEXSAMP1_REDUCTION_FILTER_RED_NONE 0x00000000 +#define NVC597_TEXSAMP1_REDUCTION_FILTER_RED_MINIMUM 0x00000001 +#define NVC597_TEXSAMP1_REDUCTION_FILTER_RED_MAXIMUM 0x00000002 +#define NVC597_TEXSAMP1_MIP_LOD_BIAS 24:12 +#define NVC597_TEXSAMP1_FLOAT_COORD_NORMALIZATION 25:25 +#define NVC597_TEXSAMP1_FLOAT_COORD_NORMALIZATION_USE_HEADER_SETTING 0x00000000 +#define NVC597_TEXSAMP1_FLOAT_COORD_NORMALIZATION_FORCE_UNNORMALIZED_COORDS 0x00000001 +#define NVC597_TEXSAMP1_TRILIN_OPT 30:26 +#define NVC597_TEXSAMP2_MIN_LOD_CLAMP 11:0 +#define NVC597_TEXSAMP2_MAX_LOD_CLAMP 23:12 +#define NVC597_TEXSAMP2_S_R_G_B_BORDER_COLOR_R 31:24 +#define NVC597_TEXSAMP3_RESERVED12 11:0 +#define NVC597_TEXSAMP3_S_R_G_B_BORDER_COLOR_G 19:12 +#define NVC597_TEXSAMP3_S_R_G_B_BORDER_COLOR_B 27:20 +#define NVC597_TEXSAMP4_BORDER_COLOR_R 31:0 +#define NVC597_TEXSAMP5_BORDER_COLOR_G 31:0 +#define NVC597_TEXSAMP6_BORDER_COLOR_B 31:0 +#define NVC597_TEXSAMP7_BORDER_COLOR_A 31:0 + + + +#endif // #ifndef __CLC597TEX_H__ diff --git a/userspace/sdks/nv570/inc/class/clc5b5.h b/userspace/sdks/nv570/inc/class/clc5b5.h new file mode 100644 index 0000000..cc3633e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc5b5.h @@ -0,0 +1,282 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#include "nvtypes.h" + +#ifndef _clc5b5_h_ +#define _clc5b5_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define TURING_DMA_COPY_A (0x0000C5B5) + +#define NVC5B5_NOP (0x00000100) +#define NVC5B5_NOP_PARAMETER 31:0 +#define NVC5B5_PM_TRIGGER (0x00000140) +#define NVC5B5_PM_TRIGGER_V 31:0 +#define NVC5B5_SET_SEMAPHORE_A (0x00000240) +#define NVC5B5_SET_SEMAPHORE_A_UPPER 16:0 +#define NVC5B5_SET_SEMAPHORE_B (0x00000244) +#define NVC5B5_SET_SEMAPHORE_B_LOWER 31:0 +#define NVC5B5_SET_SEMAPHORE_PAYLOAD (0x00000248) +#define NVC5B5_SET_SEMAPHORE_PAYLOAD_PAYLOAD 31:0 +#define NVC5B5_SET_RENDER_ENABLE_A (0x00000254) +#define NVC5B5_SET_RENDER_ENABLE_A_UPPER 7:0 +#define NVC5B5_SET_RENDER_ENABLE_B (0x00000258) +#define NVC5B5_SET_RENDER_ENABLE_B_LOWER 31:0 +#define NVC5B5_SET_RENDER_ENABLE_C (0x0000025C) +#define NVC5B5_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC5B5_SET_RENDER_ENABLE_C_MODE_FALSE (0x00000000) +#define NVC5B5_SET_RENDER_ENABLE_C_MODE_TRUE (0x00000001) +#define NVC5B5_SET_RENDER_ENABLE_C_MODE_CONDITIONAL (0x00000002) +#define NVC5B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL (0x00000003) +#define NVC5B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL (0x00000004) +#define NVC5B5_SET_SRC_PHYS_MODE (0x00000260) +#define NVC5B5_SET_SRC_PHYS_MODE_TARGET 1:0 +#define NVC5B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC5B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC5B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC5B5_SET_SRC_PHYS_MODE_BASIC_KIND 5:2 +#define NVC5B5_SET_DST_PHYS_MODE (0x00000264) +#define NVC5B5_SET_DST_PHYS_MODE_TARGET 1:0 +#define NVC5B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC5B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC5B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC5B5_SET_DST_PHYS_MODE_BASIC_KIND 5:2 +#define NVC5B5_LAUNCH_DMA (0x00000300) +#define NVC5B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVC5B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVC5B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVC5B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVC5B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 +#define NVC5B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) +#define NVC5B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) +#define NVC5B5_LAUNCH_DMA_FLUSH_TYPE 25:25 +#define NVC5B5_LAUNCH_DMA_FLUSH_TYPE_SYS (0x00000000) +#define NVC5B5_LAUNCH_DMA_FLUSH_TYPE_GL (0x00000001) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_TYPE_NONE (0x00000000) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_FOUR_WORD_SEMAPHORE (0x00000002) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_CONDITIONAL_INTR_SEMAPHORE (0x00000003) +#define NVC5B5_LAUNCH_DMA_INTERRUPT_TYPE 6:5 +#define NVC5B5_LAUNCH_DMA_INTERRUPT_TYPE_NONE (0x00000000) +#define NVC5B5_LAUNCH_DMA_INTERRUPT_TYPE_BLOCKING (0x00000001) +#define NVC5B5_LAUNCH_DMA_INTERRUPT_TYPE_NON_BLOCKING (0x00000002) +#define NVC5B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 +#define NVC5B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC5B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC5B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 +#define NVC5B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC5B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC5B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 +#define NVC5B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) +#define NVC5B5_LAUNCH_DMA_MULTI_LINE_ENABLE_TRUE (0x00000001) +#define NVC5B5_LAUNCH_DMA_REMAP_ENABLE 10:10 +#define NVC5B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) +#define NVC5B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) +#define NVC5B5_LAUNCH_DMA_FORCE_RMWDISABLE 11:11 +#define NVC5B5_LAUNCH_DMA_FORCE_RMWDISABLE_FALSE (0x00000000) +#define NVC5B5_LAUNCH_DMA_FORCE_RMWDISABLE_TRUE (0x00000001) +#define NVC5B5_LAUNCH_DMA_SRC_TYPE 12:12 +#define NVC5B5_LAUNCH_DMA_SRC_TYPE_VIRTUAL (0x00000000) +#define NVC5B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) +#define NVC5B5_LAUNCH_DMA_DST_TYPE 13:13 +#define NVC5B5_LAUNCH_DMA_DST_TYPE_VIRTUAL (0x00000000) +#define NVC5B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION 17:14 +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMIN (0x00000000) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMAX (0x00000001) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IXOR (0x00000002) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IAND (0x00000003) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IOR (0x00000004) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IADD (0x00000005) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INC (0x00000006) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_DEC (0x00000007) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FADD (0x0000000A) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN 18:18 +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_SIGNED (0x00000000) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_UNSIGNED (0x00000001) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE 19:19 +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_FALSE (0x00000000) +#define NVC5B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_TRUE (0x00000001) +#define NVC5B5_LAUNCH_DMA_SRC_BYPASS_L2 20:20 +#define NVC5B5_LAUNCH_DMA_SRC_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVC5B5_LAUNCH_DMA_SRC_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVC5B5_LAUNCH_DMA_DST_BYPASS_L2 21:21 +#define NVC5B5_LAUNCH_DMA_DST_BYPASS_L2_USE_PTE_SETTING (0x00000000) +#define NVC5B5_LAUNCH_DMA_DST_BYPASS_L2_FORCE_VOLATILE (0x00000001) +#define NVC5B5_LAUNCH_DMA_VPRMODE 23:22 +#define NVC5B5_LAUNCH_DMA_VPRMODE_VPR_NONE (0x00000000) +#define NVC5B5_LAUNCH_DMA_VPRMODE_VPR_VID2VID (0x00000001) +#define NVC5B5_LAUNCH_DMA_RESERVED_START_OF_COPY 24:24 +#define NVC5B5_LAUNCH_DMA_DISABLE_PLC 26:26 +#define NVC5B5_LAUNCH_DMA_DISABLE_PLC_FALSE (0x00000000) +#define NVC5B5_LAUNCH_DMA_DISABLE_PLC_TRUE (0x00000001) +#define NVC5B5_LAUNCH_DMA_RESERVED_ERR_CODE 31:28 +#define NVC5B5_OFFSET_IN_UPPER (0x00000400) +#define NVC5B5_OFFSET_IN_UPPER_UPPER 16:0 +#define NVC5B5_OFFSET_IN_LOWER (0x00000404) +#define NVC5B5_OFFSET_IN_LOWER_VALUE 31:0 +#define NVC5B5_OFFSET_OUT_UPPER (0x00000408) +#define NVC5B5_OFFSET_OUT_UPPER_UPPER 16:0 +#define NVC5B5_OFFSET_OUT_LOWER (0x0000040C) +#define NVC5B5_OFFSET_OUT_LOWER_VALUE 31:0 +#define NVC5B5_PITCH_IN (0x00000410) +#define NVC5B5_PITCH_IN_VALUE 31:0 +#define NVC5B5_PITCH_OUT (0x00000414) +#define NVC5B5_PITCH_OUT_VALUE 31:0 +#define NVC5B5_LINE_LENGTH_IN (0x00000418) +#define NVC5B5_LINE_LENGTH_IN_VALUE 31:0 +#define NVC5B5_LINE_COUNT (0x0000041C) +#define NVC5B5_LINE_COUNT_VALUE 31:0 +#define NVC5B5_SET_REMAP_CONST_A (0x00000700) +#define NVC5B5_SET_REMAP_CONST_A_V 31:0 +#define NVC5B5_SET_REMAP_CONST_B (0x00000704) +#define NVC5B5_SET_REMAP_CONST_B_V 31:0 +#define NVC5B5_SET_REMAP_COMPONENTS (0x00000708) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_X 2:0 +#define NVC5B5_SET_REMAP_COMPONENTS_DST_X_SRC_X (0x00000000) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_X_SRC_Y (0x00000001) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_X_SRC_Z (0x00000002) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_X_SRC_W (0x00000003) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_X_NO_WRITE (0x00000006) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Y 6:4 +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Y_SRC_X (0x00000000) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Y (0x00000001) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Z (0x00000002) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Y_SRC_W (0x00000003) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Y_CONST_A (0x00000004) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Y_NO_WRITE (0x00000006) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Z 10:8 +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Z_SRC_X (0x00000000) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Y (0x00000001) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Z (0x00000002) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Z_SRC_W (0x00000003) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Z_CONST_A (0x00000004) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Z_CONST_B (0x00000005) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_Z_NO_WRITE (0x00000006) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_W 14:12 +#define NVC5B5_SET_REMAP_COMPONENTS_DST_W_SRC_X (0x00000000) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_W_SRC_Y (0x00000001) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_W_SRC_Z (0x00000002) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_W_SRC_W (0x00000003) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_W_CONST_A (0x00000004) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_W_CONST_B (0x00000005) +#define NVC5B5_SET_REMAP_COMPONENTS_DST_W_NO_WRITE (0x00000006) +#define NVC5B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 +#define NVC5B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) +#define NVC5B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_TWO (0x00000001) +#define NVC5B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_THREE (0x00000002) +#define NVC5B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS 21:20 +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_ONE (0x00000000) +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_TWO (0x00000001) +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_THREE (0x00000002) +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_FOUR (0x00000003) +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_THREE (0x00000002) +#define NVC5B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_FOUR (0x00000003) +#define NVC5B5_SET_DST_BLOCK_SIZE (0x0000070C) +#define NVC5B5_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC5B5_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC5B5_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC5B5_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC5B5_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC5B5_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC5B5_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC5B5_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC5B5_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC5B5_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC5B5_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC5B5_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC5B5_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC5B5_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC5B5_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC5B5_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC5B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC5B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC5B5_SET_DST_WIDTH (0x00000710) +#define NVC5B5_SET_DST_WIDTH_V 31:0 +#define NVC5B5_SET_DST_HEIGHT (0x00000714) +#define NVC5B5_SET_DST_HEIGHT_V 31:0 +#define NVC5B5_SET_DST_DEPTH (0x00000718) +#define NVC5B5_SET_DST_DEPTH_V 31:0 +#define NVC5B5_SET_DST_LAYER (0x0000071C) +#define NVC5B5_SET_DST_LAYER_V 31:0 +#define NVC5B5_SET_DST_ORIGIN (0x00000720) +#define NVC5B5_SET_DST_ORIGIN_X 15:0 +#define NVC5B5_SET_DST_ORIGIN_Y 31:16 +#define NVC5B5_SET_SRC_BLOCK_SIZE (0x00000728) +#define NVC5B5_SET_SRC_BLOCK_SIZE_WIDTH 3:0 +#define NVC5B5_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC5B5_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 +#define NVC5B5_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC5B5_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC5B5_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC5B5_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC5B5_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC5B5_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC5B5_SET_SRC_BLOCK_SIZE_DEPTH 11:8 +#define NVC5B5_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC5B5_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC5B5_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC5B5_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC5B5_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC5B5_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC5B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC5B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC5B5_SET_SRC_WIDTH (0x0000072C) +#define NVC5B5_SET_SRC_WIDTH_V 31:0 +#define NVC5B5_SET_SRC_HEIGHT (0x00000730) +#define NVC5B5_SET_SRC_HEIGHT_V 31:0 +#define NVC5B5_SET_SRC_DEPTH (0x00000734) +#define NVC5B5_SET_SRC_DEPTH_V 31:0 +#define NVC5B5_SET_SRC_LAYER (0x00000738) +#define NVC5B5_SET_SRC_LAYER_V 31:0 +#define NVC5B5_SET_SRC_ORIGIN (0x0000073C) +#define NVC5B5_SET_SRC_ORIGIN_X 15:0 +#define NVC5B5_SET_SRC_ORIGIN_Y 31:16 +#define NVC5B5_SRC_ORIGIN_X (0x00000744) +#define NVC5B5_SRC_ORIGIN_X_VALUE 31:0 +#define NVC5B5_SRC_ORIGIN_Y (0x00000748) +#define NVC5B5_SRC_ORIGIN_Y_VALUE 31:0 +#define NVC5B5_DST_ORIGIN_X (0x0000074C) +#define NVC5B5_DST_ORIGIN_X_VALUE 31:0 +#define NVC5B5_DST_ORIGIN_Y (0x00000750) +#define NVC5B5_DST_ORIGIN_Y_VALUE 31:0 +#define NVC5B5_PM_TRIGGER_END (0x00001114) +#define NVC5B5_PM_TRIGGER_END_V 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc5b5_h + diff --git a/userspace/sdks/nv570/inc/class/clc5b5sw.h b/userspace/sdks/nv570/inc/class/clc5b5sw.h new file mode 100644 index 0000000..12b3cc0 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc5b5sw.h @@ -0,0 +1,54 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2017-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc5b5sw.finn +// + + + +// +// Using VERSION_0 will cause the API to interpret +// engineType as a CE engine instance. This allows +// for backward compatibility with 85B5sw and 90B5sw. +// +#define NVC5B5_ALLOCATION_PARAMETERS_VERSION_0 0 + +// +// Using VERSION_1 will cause the API to interpret +// engineType as an NV2080_ENGINE_TYPE ordinal. +// +#define NVC5B5_ALLOCATION_PARAMETERS_VERSION_1 1 + +#define NVC5B5_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc5b5U) + +typedef struct NVC5B5_ALLOCATION_PARAMETERS { + NvU32 version; + NvU32 engineType; +} NVC5B5_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc5c0.h b/userspace/sdks/nv570/inc/class/clc5c0.h new file mode 100644 index 0000000..51e0837 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc5c0.h @@ -0,0 +1,732 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_turing_compute_a_h_ +#define _cl_turing_compute_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl turing_compute_a */ + +#include "nvtypes.h" + +#define TURING_COMPUTE_A 0xC5C0 + +#define NVC5C0_SET_OBJECT 0x0000 +#define NVC5C0_SET_OBJECT_CLASS_ID 15:0 +#define NVC5C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC5C0_NO_OPERATION 0x0100 +#define NVC5C0_NO_OPERATION_V 31:0 + +#define NVC5C0_SET_NOTIFY_A 0x0104 +#define NVC5C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC5C0_SET_NOTIFY_B 0x0108 +#define NVC5C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC5C0_NOTIFY 0x010c +#define NVC5C0_NOTIFY_TYPE 31:0 +#define NVC5C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC5C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC5C0_WAIT_FOR_IDLE 0x0110 +#define NVC5C0_WAIT_FOR_IDLE_V 31:0 + +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC5C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC5C0_SEND_GO_IDLE 0x013c +#define NVC5C0_SEND_GO_IDLE_V 31:0 + +#define NVC5C0_PM_TRIGGER 0x0140 +#define NVC5C0_PM_TRIGGER_V 31:0 + +#define NVC5C0_PM_TRIGGER_WFI 0x0144 +#define NVC5C0_PM_TRIGGER_WFI_V 31:0 + +#define NVC5C0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC5C0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC5C0_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC5C0_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC5C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC5C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC5C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC5C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC5C0_LINE_LENGTH_IN 0x0180 +#define NVC5C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC5C0_LINE_COUNT 0x0184 +#define NVC5C0_LINE_COUNT_VALUE 31:0 + +#define NVC5C0_OFFSET_OUT_UPPER 0x0188 +#define NVC5C0_OFFSET_OUT_UPPER_VALUE 16:0 + +#define NVC5C0_OFFSET_OUT 0x018c +#define NVC5C0_OFFSET_OUT_VALUE 31:0 + +#define NVC5C0_PITCH_OUT 0x0190 +#define NVC5C0_PITCH_OUT_VALUE 31:0 + +#define NVC5C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVC5C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC5C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC5C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC5C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC5C0_SET_DST_WIDTH 0x0198 +#define NVC5C0_SET_DST_WIDTH_V 31:0 + +#define NVC5C0_SET_DST_HEIGHT 0x019c +#define NVC5C0_SET_DST_HEIGHT_V 31:0 + +#define NVC5C0_SET_DST_DEPTH 0x01a0 +#define NVC5C0_SET_DST_DEPTH_V 31:0 + +#define NVC5C0_SET_DST_LAYER 0x01a4 +#define NVC5C0_SET_DST_LAYER_V 31:0 + +#define NVC5C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC5C0_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC5C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC5C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC5C0_LAUNCH_DMA 0x01b0 +#define NVC5C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC5C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC5C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC5C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC5C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC5C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC5C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC5C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC5C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC5C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC5C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC5C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC5C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC5C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC5C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC5C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC5C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC5C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC5C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC5C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC5C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC5C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC5C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC5C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC5C0_LOAD_INLINE_DATA 0x01b4 +#define NVC5C0_LOAD_INLINE_DATA_V 31:0 + +#define NVC5C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC5C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC5C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC5C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC5C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC5C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC5C0_SET_SM_SCG_CONTROL 0x01e8 +#define NVC5C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS 0:0 +#define NVC5C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_FALSE 0x00000000 +#define NVC5C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_TRUE 0x00000001 + +#define NVC5C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC5C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC5C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC5C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC5C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC5C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC5C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC5C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVC5C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVC5C0_PERFMON_TRANSFER 0x0210 +#define NVC5C0_PERFMON_TRANSFER_V 31:0 + +#define NVC5C0_SET_QMD_VIRTUALIZATION_BASE_A 0x0214 +#define NVC5C0_SET_QMD_VIRTUALIZATION_BASE_A_ADDRESS_UPPER 7:0 + +#define NVC5C0_SET_QMD_VIRTUALIZATION_BASE_B 0x0218 +#define NVC5C0_SET_QMD_VIRTUALIZATION_BASE_B_ADDRESS_LOWER 31:0 + +#define NVC5C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVC5C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC5C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC5C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC5C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC5C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC5C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC5C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC5C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC5C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC5C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC5C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC5C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC5C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC5C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC5C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC5C0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVC5C0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVC5C0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVC5C0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD03 0x022c +#define NVC5C0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVC5C0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVC5C0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVC5C0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD07 0x023c +#define NVC5C0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC5C0_SET_CWD_REF_COUNTER 0x0248 +#define NVC5C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVC5C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVC5C0_SET_RESERVED_SW_METHOD08 0x024c +#define NVC5C0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVC5C0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVC5C0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVC5C0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD12 0x025c +#define NVC5C0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVC5C0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVC5C0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC5C0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVC5C0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC5C0_SET_SCG_CONTROL 0x0270 +#define NVC5C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 +#define NVC5C0_SET_SCG_CONTROL_COMPUTE1_MIN_SM_COUNT 20:12 +#define NVC5C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE 24:24 +#define NVC5C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_FALSE 0x00000000 +#define NVC5C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_TRUE 0x00000001 + +#define NVC5C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVC5C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC5C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC5C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVC5C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC5C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC5C0_SET_QMD_VERSION 0x0288 +#define NVC5C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVC5C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC5C0_CHECK_QMD_VERSION 0x0290 +#define NVC5C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVC5C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC5C0_INVALIDATE_SKED_CACHES 0x0298 +#define NVC5C0_INVALIDATE_SKED_CACHES_V 0:0 + +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL 0x029c +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_CONSTANT_BUFFER_MASK 7:0 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE 8:8 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE 12:12 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE 16:16 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE 20:20 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE 24:24 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_FALSE 0x00000000 +#define NVC5C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_TRUE 0x00000001 + +#define NVC5C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 +#define NVC5C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC5C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 +#define NVC5C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC5C0_SCG_HYSTERESIS_CONTROL 0x02a8 +#define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE 0:0 +#define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_TRUE 0x00000001 +#define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE 1:1 +#define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC5C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_TRUE 0x00000001 + +#define NVC5C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVC5C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVC5C0_SEND_PCAS_A 0x02b4 +#define NVC5C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVC5C0_SEND_PCAS_B 0x02b8 +#define NVC5C0_SEND_PCAS_B_FROM 23:0 +#define NVC5C0_SEND_PCAS_B_DELTA 31:24 + +#define NVC5C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVC5C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVC5C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVC5C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVC5C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVC5C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVC5C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVC5C0_SET_SKED_CACHE_CONTROL 0x02cc +#define NVC5C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 +#define NVC5C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 +#define NVC5C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 + +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVC5C0_SET_SPA_VERSION 0x0310 +#define NVC5C0_SET_SPA_VERSION_MINOR 7:0 +#define NVC5C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC5C0_SET_INLINE_QMD_ADDRESS_A 0x0318 +#define NVC5C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 + +#define NVC5C0_SET_INLINE_QMD_ADDRESS_B 0x031c +#define NVC5C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 + +#define NVC5C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) +#define NVC5C0_LOAD_INLINE_QMD_DATA_V 31:0 + +#define NVC5C0_SET_FALCON00 0x0500 +#define NVC5C0_SET_FALCON00_V 31:0 + +#define NVC5C0_SET_FALCON01 0x0504 +#define NVC5C0_SET_FALCON01_V 31:0 + +#define NVC5C0_SET_FALCON02 0x0508 +#define NVC5C0_SET_FALCON02_V 31:0 + +#define NVC5C0_SET_FALCON03 0x050c +#define NVC5C0_SET_FALCON03_V 31:0 + +#define NVC5C0_SET_FALCON04 0x0510 +#define NVC5C0_SET_FALCON04_V 31:0 + +#define NVC5C0_SET_FALCON05 0x0514 +#define NVC5C0_SET_FALCON05_V 31:0 + +#define NVC5C0_SET_FALCON06 0x0518 +#define NVC5C0_SET_FALCON06_V 31:0 + +#define NVC5C0_SET_FALCON07 0x051c +#define NVC5C0_SET_FALCON07_V 31:0 + +#define NVC5C0_SET_FALCON08 0x0520 +#define NVC5C0_SET_FALCON08_V 31:0 + +#define NVC5C0_SET_FALCON09 0x0524 +#define NVC5C0_SET_FALCON09_V 31:0 + +#define NVC5C0_SET_FALCON10 0x0528 +#define NVC5C0_SET_FALCON10_V 31:0 + +#define NVC5C0_SET_FALCON11 0x052c +#define NVC5C0_SET_FALCON11_V 31:0 + +#define NVC5C0_SET_FALCON12 0x0530 +#define NVC5C0_SET_FALCON12_V 31:0 + +#define NVC5C0_SET_FALCON13 0x0534 +#define NVC5C0_SET_FALCON13_V 31:0 + +#define NVC5C0_SET_FALCON14 0x0538 +#define NVC5C0_SET_FALCON14_V 31:0 + +#define NVC5C0_SET_FALCON15 0x053c +#define NVC5C0_SET_FALCON15_V 31:0 + +#define NVC5C0_SET_FALCON16 0x0540 +#define NVC5C0_SET_FALCON16_V 31:0 + +#define NVC5C0_SET_FALCON17 0x0544 +#define NVC5C0_SET_FALCON17_V 31:0 + +#define NVC5C0_SET_FALCON18 0x0548 +#define NVC5C0_SET_FALCON18_V 31:0 + +#define NVC5C0_SET_FALCON19 0x054c +#define NVC5C0_SET_FALCON19_V 31:0 + +#define NVC5C0_SET_FALCON20 0x0550 +#define NVC5C0_SET_FALCON20_V 31:0 + +#define NVC5C0_SET_FALCON21 0x0554 +#define NVC5C0_SET_FALCON21_V 31:0 + +#define NVC5C0_SET_FALCON22 0x0558 +#define NVC5C0_SET_FALCON22_V 31:0 + +#define NVC5C0_SET_FALCON23 0x055c +#define NVC5C0_SET_FALCON23_V 31:0 + +#define NVC5C0_SET_FALCON24 0x0560 +#define NVC5C0_SET_FALCON24_V 31:0 + +#define NVC5C0_SET_FALCON25 0x0564 +#define NVC5C0_SET_FALCON25_V 31:0 + +#define NVC5C0_SET_FALCON26 0x0568 +#define NVC5C0_SET_FALCON26_V 31:0 + +#define NVC5C0_SET_FALCON27 0x056c +#define NVC5C0_SET_FALCON27_V 31:0 + +#define NVC5C0_SET_FALCON28 0x0570 +#define NVC5C0_SET_FALCON28_V 31:0 + +#define NVC5C0_SET_FALCON29 0x0574 +#define NVC5C0_SET_FALCON29_V 31:0 + +#define NVC5C0_SET_FALCON30 0x0578 +#define NVC5C0_SET_FALCON30_V 31:0 + +#define NVC5C0_SET_FALCON31 0x057c +#define NVC5C0_SET_FALCON31_V 31:0 + +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 + +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 +#define NVC5C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC5C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC5C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC5C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC5C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC5C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS(i) (0x0da0+(i)*4) +#define NVC5C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS_V 31:0 + +#define NVC5C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC5C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC5C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVC5C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVC5C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVC5C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVC5C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC5C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC5C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC5C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC5C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC5C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC5C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC5C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC5C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC5C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC5C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC5C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC5C0_SET_RENDER_ENABLE_A 0x1550 +#define NVC5C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC5C0_SET_RENDER_ENABLE_B 0x1554 +#define NVC5C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC5C0_SET_RENDER_ENABLE_C 0x1558 +#define NVC5C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC5C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC5C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC5C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC5C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC5C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC5C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC5C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC5C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC5C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC5C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC5C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC5C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC5C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC5C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC5C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC5C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVC5C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC5C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC5C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC5C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC5C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC5C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC5C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC5C0_PIPE_NOP 0x1a2c +#define NVC5C0_PIPE_NOP_V 31:0 + +#define NVC5C0_SET_SPARE00 0x1a30 +#define NVC5C0_SET_SPARE00_V 31:0 + +#define NVC5C0_SET_SPARE01 0x1a34 +#define NVC5C0_SET_SPARE01_V 31:0 + +#define NVC5C0_SET_SPARE02 0x1a38 +#define NVC5C0_SET_SPARE02_V 31:0 + +#define NVC5C0_SET_SPARE03 0x1a3c +#define NVC5C0_SET_SPARE03_V 31:0 + +#define NVC5C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC5C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC5C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC5C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC5C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC5C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC5C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC5C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVC5C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVC5C0_SET_TRAP_HANDLER_A 0x25f8 +#define NVC5C0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC5C0_SET_TRAP_HANDLER_B 0x25fc +#define NVC5C0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC5C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVC5C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVC5C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC5C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC5C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC5C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC5C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC5C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC5C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC5C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC5C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC5C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC5C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC5C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC5C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC5C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC5C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#endif /* _cl_turing_compute_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc637.h b/userspace/sdks/nv570/inc/class/clc637.h new file mode 100644 index 0000000..2f8ec0c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc637.h @@ -0,0 +1,62 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc637.finn +// + +#define AMPERE_SMC_PARTITION_REF (0xc637U) /* finn: Evaluated from "NVC637_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +// +// This swizzId can be used by root clients like tools for device level +// profiling +// +#define NVC637_DEVICE_PROFILING_SWIZZID (0xFFFFFFFE) + +// +// TODO: Deprecate NVC637_DEVICE_LEVEL_SWIZZID once all the clients are moved to +// NVC637_DEVICE_PROFILING_SWIZZID +// +#define NVC637_DEVICE_LEVEL_SWIZZID NVC637_DEVICE_PROFILING_SWIZZID + +/* NvRmAlloc parameters */ +#define NVC637_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc637U) + +typedef struct NVC637_ALLOCATION_PARAMETERS { + // + // capDescriptor is a file descriptor for unix RM clients, but a void + // pointer for windows RM clients. + // + // capDescriptor is transparent to RM clients i.e. RM's user-mode shim + // populates this field on behalf of clients. + // + NV_DECLARE_ALIGNED(NvU64 capDescriptor, 8); + + NvU32 swizzId; +} NVC637_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc638.h b/userspace/sdks/nv570/inc/class/clc638.h new file mode 100644 index 0000000..fc038b3 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc638.h @@ -0,0 +1,50 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc638.finn +// + +#define AMPERE_SMC_EXEC_PARTITION_REF (0xc638U) /* finn: Evaluated from "NVC638_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +/* NvRmAlloc parameters */ +#define NVC638_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc638U) + +typedef struct NVC638_ALLOCATION_PARAMETERS { + // + // capDescriptor is a file descriptor for unix RM clients, but a void + // pointer for windows RM clients. + // + // capDescriptor is transparent to RM clients i.e. RM's user-mode shim + // populates this field on behalf of clients. + // + NV_DECLARE_ALIGNED(NvU64 capDescriptor, 8); + + NvU32 execPartitionId; +} NVC638_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc639.h b/userspace/sdks/nv570/inc/class/clc639.h new file mode 100644 index 0000000..538ede0 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc639.h @@ -0,0 +1,48 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc639.finn +// + +#define AMPERE_SMC_CONFIG_SESSION (0xc639U) /* finn: Evaluated from "NVC639_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +/* NvRmAlloc parameters */ +#define NVC639_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc639U) + +typedef struct NVC639_ALLOCATION_PARAMETERS { + // + // capDescriptor is a file descriptor for unix RM clients, but a void + // pointer for windows RM clients. + // + // capDescriptor is transparent to RM clients i.e. RM's user-mode shim + // populates this field on behalf of clients. + // + NV_DECLARE_ALIGNED(NvU64 capDescriptor, 8); +} NVC639_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc640.h b/userspace/sdks/nv570/inc/class/clc640.h new file mode 100644 index 0000000..885a501 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc640.h @@ -0,0 +1,48 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc640.finn +// + +#define AMPERE_SMC_MONITOR_SESSION (0xc640U) /* finn: Evaluated from "NVC640_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +/* NvRmAlloc parameters */ +#define NVC640_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc640U) + +typedef struct NVC640_ALLOCATION_PARAMETERS { + // + // capDescriptor is a file descriptor for unix RM clients, but a void + // pointer for windows RM clients. + // + // capDescriptor is transparent to RM clients i.e. RM's user-mode shim + // populates this field on behalf of clients. + // + NV_DECLARE_ALIGNED(NvU64 capDescriptor, 8); +} NVC640_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc661.h b/userspace/sdks/nv570/inc/class/clc661.h new file mode 100644 index 0000000..d9f8a48 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc661.h @@ -0,0 +1,27 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gh100_clc661_h__ +#define __gh100_clc661_h__ +#define HOPPER_USERMODE_A (0xc661) +#endif // __gh100_clc661_h__ diff --git a/userspace/sdks/nv570/inc/class/clc670.h b/userspace/sdks/nv570/inc/class/clc670.h new file mode 100644 index 0000000..4828651 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc670.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc670.finn +// + +#define NVC670_DISPLAY (0xc670U) /* finn: Evaluated from "NVC670_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NVC670_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc670U) + +typedef struct NVC670_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numDsis; // Number of DSIs in this chip/display +} NVC670_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc671.h b/userspace/sdks/nv570/inc/class/clc671.h new file mode 100644 index 0000000..0255c8b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc671.h @@ -0,0 +1,124 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc671_h_ +#define _clc671_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC671_DISP_SF_USER (0x000C671) + +typedef volatile struct _clc671_tag0 { + NvU32 dispSfUserOffset[0x400]; +} _NvC671DispSfUser, NvC671DispSfUserMap; + +#define NVC671_SF_HDMI_INFO_IDX_GENERIC_INFOFRAME 0x00000001 /* */ +#define NVC671_SF_HDMI_INFO_IDX_VSI 0x00000004 /* */ +#define NVC671_SF_HDMI_INFO_CTRL(i,j) (0x000E0000-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC671_SF_HDMI_INFO_CTRL__SIZE_1 4 /* */ +#define NVC671_SF_HDMI_INFO_CTRL__SIZE_2 5 /* */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x000E0000-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER 4:4 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_DIS 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_EN 0x00000001 /* RW--V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE 8:8 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_DIS 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_EN 0x00000001 /* RW--V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x000E0004-0x000E0000+(i)*1024) /* R--4A */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 8 /* */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R-IVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x000E0008-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 8 /* */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x000E000C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x000E0010-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x000E0014-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x000E0018-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW(i) (0x000E001C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVC671_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _clc671_h_ diff --git a/userspace/sdks/nv570/inc/class/clc673.h b/userspace/sdks/nv570/inc/class/clc673.h new file mode 100644 index 0000000..b5942aa --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc673.h @@ -0,0 +1,505 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc673_h_ +#define _clc673_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC673_DISP_CAPABILITIES 0xC673 + +typedef volatile struct _clc673_tag0 { + NvU32 dispCapabilities[0x400]; +} _NvC673DispCapabilities,NvC673DispCapabilities_Map ; + + +#define NVC673_SYS_CAP 0x0 /* RW-4R */ +#define NVC673_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVC673_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVC673_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVC673_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVC673_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVC673_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVC673_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVC673_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVC673_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC673_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVC673_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVC673_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVC673_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVC673_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVC673_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVC673_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVC673_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVC673_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVC673_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVC673_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVC673_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_DSI0_EXISTS 20:20 /* RWIVF */ +#define NVC673_SYS_CAP_DSI0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_DSI0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_DSI1_EXISTS 21:21 /* RWIVF */ +#define NVC673_SYS_CAP_DSI1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_DSI1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_DSI2_EXISTS 22:22 /* RWIVF */ +#define NVC673_SYS_CAP_DSI2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_DSI2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_DSI3_EXISTS 23:23 /* RWIVF */ +#define NVC673_SYS_CAP_DSI3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_DSI3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAP_DSI_EXISTS(i) (20+(i)):(20+(i)) /* RWIVF */ +#define NVC673_SYS_CAP_DSI_EXISTS__SIZE_1 4 /* */ +#define NVC673_SYS_CAP_DSI_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAP_DSI_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB 0x4 /* RW-4R */ +#define NVC673_SYS_CAPB_WINDOW0_EXISTS 0:0 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW1_EXISTS 1:1 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW2_EXISTS 2:2 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW3_EXISTS 3:3 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW4_EXISTS 4:4 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW5_EXISTS 5:5 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW6_EXISTS 6:6 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW7_EXISTS 7:7 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW8_EXISTS 8:8 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW9_EXISTS 9:9 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW10_EXISTS 10:10 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW11_EXISTS 11:11 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW12_EXISTS 12:12 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW13_EXISTS 13:13 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW14_EXISTS 14:14 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW15_EXISTS 15:15 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW16_EXISTS 16:16 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW17_EXISTS 17:17 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW18_EXISTS 18:18 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW19_EXISTS 19:19 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW20_EXISTS 20:20 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW21_EXISTS 21:21 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW22_EXISTS 22:22 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW23_EXISTS 23:23 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW24_EXISTS 24:24 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW25_EXISTS 25:25 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW26_EXISTS 26:26 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW27_EXISTS 27:27 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW28_EXISTS 28:28 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW29_EXISTS 29:29 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW30_EXISTS 30:30 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW31_EXISTS 31:31 /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC673_SYS_CAPB_WINDOW_EXISTS__SIZE_1 32 /* */ +#define NVC673_SYS_CAPB_WINDOW_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC673_SYS_CAPB_WINDOW_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA 0x10 /* RW-4R */ +#define NVC673_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES 15:0 /* RWIUF */ +#define NVC673_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH 17:16 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_32B 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_64B 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_128B 0x00000002 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_256B 0x00000003 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_ROTATION 18:18 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_ROTATION_FALSE 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_ROTATION_TRUE 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_PLANAR 19:19 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_PLANAR_FALSE 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_VGA 20:20 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION 21:21 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_TRUE 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_MSCG 22:22 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_MSCG_FALSE 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_MSCG_TRUE 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH 23:23 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_FALSE 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_TRUE 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT 26:26 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION 31:30 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_32B 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_64B 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_128B 0x00000002 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_256B 0x00000003 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC 0x18 /* RW-4R */ +#define NVC673_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE 1:0 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_32B 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_64B 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_128B 0x00000002 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_256B 0x00000003 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED 6:4 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_NONE 0x00000000 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_TWO 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_FOUR 0x00000002 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_EIGHT 0x00000003 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_SIXTEEN 0x00000004 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR 11:11 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_FALSE 0x00000000 /* RWI-V */ +#define NVC673_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC673_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP 12:12 /* RWIVF */ +#define NVC673_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_FALSE 0x00000000 /* RWI-V */ +#define NVC673_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA(i) (0x680+(i)*32) /* RW-4A */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA__SIZE_1 8 /* */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT 16:16 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT 17:17 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT 18:18 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT 19:19 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT 20:20 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT 21:21 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT 22:22 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT 23:23 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT 24:24 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB(i) (0x684+(i)*32) /* RW-4A */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB__SIZE_1 8 /* */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_VGA 0:0 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGSZ 9:6 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGNR 12:10 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT 15:15 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC(i) (0x688+(i)*32) /* RW-4A */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC__SIZE_1 8 /* */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_OCSC0_PRECISION 4:0 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_OCSC1_PRECISION 12:8 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP 13:13 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_SF_PRECISION 20:16 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_CI_PRECISION 24:21 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB 25:25 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPD(i) (0x68c+(i)*32) /* RW-4A */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPD__SIZE_1 8 /* */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE(i) (0x690+(i)*32) /* RW-4A */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE__SIZE_1 8 /* */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE_DSC_RATEBUFSIZE 3:0 /* RWIUF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE_DSC_LINEBUFSIZE 13:8 /* RWIUF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422 16:16 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420 17:17 /* RWIVF */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_TRUE 0x00000001 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_FALSE 0x00000000 /* RW--V */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPF(i) (0x694+(i)*32) /* RW-4A */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPF__SIZE_1 8 /* */ +#define NVC673_POSTCOMP_HEAD_HDR_CAPF_VFILTER_MAX_PIXELS 15:0 /* RWIVF */ +#define NVC673_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVC673_SOR_CAP__SIZE_1 8 /* */ +#define NVC673_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVC673_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVC673_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVC673_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVC673_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVC673_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVC673_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVC673_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVC673_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVC673_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVC673_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVC673_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVC673_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVC673_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVC673_SOR_CAP_HDMI_FRL 28:28 /* RWIVF */ +#define NVC673_SOR_CAP_HDMI_FRL_FALSE 0x00000000 /* RW--V */ +#define NVC673_SOR_CAP_HDMI_FRL_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA(i) (0x780+(i)*32) /* RW-4A */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA__SIZE_1 32 /* */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH 13:10 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT 16:16 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT 17:17 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT 18:18 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT 19:19 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT 20:20 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT 21:21 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT 22:22 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT 23:23 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT 24:24 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB(i) (0x784+(i)*32) /* RW-4A */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB__SIZE_1 32 /* */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION 4:0 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ 9:6 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR 12:10 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT 15:15 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC(i) (0x788+(i)*32) /* RW-4A */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC__SIZE_1 32 /* */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION 4:0 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGSZ 9:6 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGNR 12:10 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT 15:15 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION 20:16 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD(i) (0x78c+(i)*32) /* RW-4A */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD__SIZE_1 32 /* */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ 3:0 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR 6:4 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD 8:8 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT 9:9 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION 16:12 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION 20:17 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB 21:21 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA 22:22 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE(i) (0x790+(i)*32) /* RW-4A */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE__SIZE_1 32 /* */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION 4:0 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGSZ 9:6 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGNR 12:10 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT 15:15 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION 20:16 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPF(i) (0x794+(i)*32) /* RW-4A */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPF__SIZE_1 32 /* */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC673_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVC673_SOR_CLK_CAP(i) (0x608+(i)*4) /* RW-4A */ +#define NVC673_SOR_CLK_CAP__SIZE_1 8 /* */ +#define NVC673_SOR_CLK_CAP_DP_MAX 7:0 /* RWIUF */ +#define NVC673_SOR_CLK_CAP_TMDS_MAX 23:16 /* RWIUF */ +#define NVC673_SOR_CLK_CAP_LVDS_MAX 31:24 /* RWIUF */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clc673_h_ diff --git a/userspace/sdks/nv570/inc/class/clc67a.h b/userspace/sdks/nv570/inc/class/clc67a.h new file mode 100644 index 0000000..4496969 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc67a.h @@ -0,0 +1,213 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc67a__h_ +#define _clc67a__h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC67A_CURSOR_IMM_CHANNEL_PIO (0x0000C67A) + +typedef volatile struct _clc67a_tag0 { + NvV32 Reserved00[0x2]; + NvV32 Free; // 0x00000008 - 0x0000000B + NvV32 Reserved01[0x7D]; + NvV32 Update; // 0x00000200 - 0x00000203 + NvV32 SetInterlockFlags; // 0x00000204 - 0x00000207 + NvV32 SetCursorHotSpotPointOut[2]; // 0x00000208 - 0x0000020F + NvV32 SetWindowInterlockFlags; // 0x00000210 - 0x00000213 + NvV32 Reserved02[0x37B]; +} NVC67ADispCursorImmControlPio; + +#define NVC67A_FREE (0x00000008) +#define NVC67A_FREE_COUNT 5:0 +#define NVC67A_UPDATE (0x00000200) +#define NVC67A_UPDATE_RELEASE_ELV 0:0 +#define NVC67A_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC67A_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC67A_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC67A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC67A_SET_INTERLOCK_FLAGS (0x00000204) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC67A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC67A_SET_CURSOR_HOT_SPOT_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC67A_SET_CURSOR_HOT_SPOT_POINT_OUT_X 15:0 +#define NVC67A_SET_CURSOR_HOT_SPOT_POINT_OUT_Y 31:16 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS (0x00000210) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC67A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc67a_h + diff --git a/userspace/sdks/nv570/inc/class/clc67b.h b/userspace/sdks/nv570/inc/class/clc67b.h new file mode 100644 index 0000000..5d73866 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc67b.h @@ -0,0 +1,67 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC67b_h_ +#define _clC67b_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC67B_WINDOW_IMM_CHANNEL_DMA (0x0000C67B) + +// dma opcode instructions +#define NVC67B_DMA +#define NVC67B_DMA_OPCODE 31:29 +#define NVC67B_DMA_OPCODE_METHOD 0x00000000 +#define NVC67B_DMA_OPCODE_JUMP 0x00000001 +#define NVC67B_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC67B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC67B_DMA_METHOD_COUNT 27:18 +#define NVC67B_DMA_METHOD_OFFSET 13:2 +#define NVC67B_DMA_DATA 31:0 +#define NVC67B_DMA_DATA_NOP 0x00000000 +#define NVC67B_DMA_JUMP_OFFSET 11:2 +#define NVC67B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC67B_PUT (0x00000000) +#define NVC67B_PUT_PTR 9:0 +#define NVC67B_GET (0x00000004) +#define NVC67B_GET_PTR 9:0 +#define NVC67B_UPDATE (0x00000200) +#define NVC67B_UPDATE_RELEASE_ELV 0:0 +#define NVC67B_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC67B_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC67B_UPDATE_INTERLOCK_WITH_WINDOW 1:1 +#define NVC67B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC67B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC67B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC67B_SET_POINT_OUT_X 15:0 +#define NVC67B_SET_POINT_OUT_Y 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC67b_h diff --git a/userspace/sdks/nv570/inc/class/clc67d.h b/userspace/sdks/nv570/inc/class/clc67d.h new file mode 100644 index 0000000..6b09ded --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc67d.h @@ -0,0 +1,1337 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC67d_h_ +#define _clC67d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC67D_CORE_CHANNEL_DMA (0x0000C67D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVC67D_DMA +#define NVC67D_DMA_OPCODE 31:29 +#define NVC67D_DMA_OPCODE_METHOD 0x00000000 +#define NVC67D_DMA_OPCODE_JUMP 0x00000001 +#define NVC67D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC67D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC67D_DMA_METHOD_COUNT 27:18 +#define NVC67D_DMA_METHOD_OFFSET 13:2 +#define NVC67D_DMA_DATA 31:0 +#define NVC67D_DMA_DATA_NOP 0x00000000 +#define NVC67D_DMA_JUMP_OFFSET 11:2 +#define NVC67D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + +// class methods +#define NVC67D_PUT (0x00000000) +#define NVC67D_PUT_PTR 9:0 +#define NVC67D_GET (0x00000004) +#define NVC67D_GET_PTR 9:0 +#define NVC67D_UPDATE (0x00000200) +#define NVC67D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVC67D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVC67D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVC67D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVC67D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVC67D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVC67D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVC67D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVC67D_UPDATE_RELEASE_ELV 0:0 +#define NVC67D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC67D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC67D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC67D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC67D_SET_CONTEXT_DMA_NOTIFIER (0x00000208) +#define NVC67D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NVC67D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVC67D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC67D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC67D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC67D_SET_NOTIFIER_CONTROL_OFFSET 11:4 +#define NVC67D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVC67D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVC67D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVC67D_SET_CONTROL (0x00000210) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVC67D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC67D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC67D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC67D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVC67D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVC67D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVC67D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVC67D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVC67D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVC67D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVC67D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVC67D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVC67D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVC67D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVC67D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) + +#define NVC67D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC67D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC67D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVC67D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVC67D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVC67D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVC67D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVC67D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVC67D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVC67D_SOR_SET_CONTROL_PROTOCOL_HDMI_FRL (0x0000000C) +#define NVC67D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVC67D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVC67D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC67D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC67D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVC67D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVC67D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVC67D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVC67D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVC67D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVC67D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVC67D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVC67D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVC67D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVC67D_DSI_SET_CONTROL(a) (0x00000500 + (a)*0x00000020) +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK 7:0 +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC67D_DSI_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC67D_DSI_SET_CUSTOM_REASON(a) (0x00000504 + (a)*0x00000020) +#define NVC67D_DSI_SET_CUSTOM_REASON_CODE 31:0 +#define NVC67D_DSI_SET_SW_SPARE_A(a) (0x00000508 + (a)*0x00000020) +#define NVC67D_DSI_SET_SW_SPARE_A_CODE 31:0 +#define NVC67D_DSI_SET_SW_SPARE_B(a) (0x0000050C + (a)*0x00000020) +#define NVC67D_DSI_SET_SW_SPARE_B_CODE 31:0 + +#define NVC67D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVC67D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVC67D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVC67D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVC67D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC67D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED 16:16 +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED 28:28 +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED 30:30 +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC67D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) + +#define NVC67D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000400) +#define NVC67D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVC67D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVC67D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVC67D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVC67D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVC67D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVC67D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_PROCAMP_CHROMA_DOWN_V 4:4 +#define NVC67D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVC67D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVC67D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000400) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_444 (0x00000009) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444NP (0x0000000A) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN 31:26 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN0 (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN1 (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN2 (0x00000002) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN3 (0x00000003) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN4 (0x00000004) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN5 (0x00000005) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN6 (0x00000006) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN7 (0x00000007) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN8 (0x00000008) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN9 (0x00000009) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN10 (0x0000000A) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN11 (0x0000000B) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN12 (0x0000000C) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN13 (0x0000000D) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN14 (0x0000000E) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN15 (0x0000000F) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN16 (0x00000010) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN17 (0x00000011) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN18 (0x00000012) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN19 (0x00000013) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN20 (0x00000014) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN21 (0x00000015) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN22 (0x00000016) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN23 (0x00000017) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN24 (0x00000018) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN25 (0x00000019) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN26 (0x0000001A) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN27 (0x0000001B) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN28 (0x0000001C) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN29 (0x0000001D) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN30 (0x0000001E) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN31 (0x0000001F) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_NONE (0x0000003F) +#define NVC67D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000400) +#define NVC67D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVC67D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVC67D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_YUV420PACKER 3:3 +#define NVC67D_HEAD_SET_CONTROL_YUV420PACKER_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_YUV420PACKER_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE 11:10 +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN 8:4 +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_LOCKOUT_WINDOW 15:12 +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_MODE 23:22 +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN 20:16 +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC67D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC67D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE 30:30 +#define NVC67D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE 31:31 +#define NVC67D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000400) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC67D_HEAD_SET_PIXEL_REORDER_CONTROL(a) (0x00002010 + (a)*0x00000400) +#define NVC67D_HEAD_SET_PIXEL_REORDER_CONTROL_BANK_WIDTH 13:0 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000400) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC67D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVC67D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVC67D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVC67D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVC67D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVC67D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVC67D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVC67D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVC67D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVC67D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVC67D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVC67D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVC67D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVC67D_HEAD_SET_DITHER_CONTROL_MODE_ROUND (0x00000005) +#define NVC67D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000400) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVC67D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000400 + (b)*0x00000004) +#define NVC67D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000400) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC67D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC67D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000400) +#define NVC67D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC67D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000400) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED 4:4 +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_FALSE (0x00000000) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_TRUE (0x00000001) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS 14:12 +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED 16:16 +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC67D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVC67D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000400) +#define NVC67D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVC67D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVC67D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVC67D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVC67D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVC67D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC67D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC67D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVC67D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVC67D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVC67D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVC67D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVC67D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC67D_HEAD_SET_STALL_LOCK_UNSTALL_SYNC_ADVANCE 25:16 +#define NVC67D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000400) +#define NVC67D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVC67D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000400) +#define NVC67D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVC67D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVC67D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000400) +#define NVC67D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVC67D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVC67D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000400) +#define NVC67D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVC67D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVC67D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000400) +#define NVC67D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVC67D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVC67D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000400) +#define NVC67D_HEAD_SET_RASTER_SIZE_WIDTH 14:0 +#define NVC67D_HEAD_SET_RASTER_SIZE_HEIGHT 30:16 +#define NVC67D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000400) +#define NVC67D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVC67D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVC67D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000400) +#define NVC67D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVC67D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVC67D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000400) +#define NVC67D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVC67D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVC67D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVC67D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVC67D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVC67D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000400) +#define NVC67D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVC67D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVC67D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVC67D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000400) +#define NVC67D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVC67D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVC67D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVC67D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVC67D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVC67D_HEAD_SET_CONTEXT_DMA_CURSOR(a,b) (0x00002088 + (a)*0x00000400 + (b)*0x00000004) +#define NVC67D_HEAD_SET_CONTEXT_DMA_CURSOR_HANDLE 31:0 +#define NVC67D_HEAD_SET_OFFSET_CURSOR(a,b) (0x00002090 + (a)*0x00000400 + (b)*0x00000004) +#define NVC67D_HEAD_SET_OFFSET_CURSOR_ORIGIN 31:0 +#define NVC67D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000400) +#define NVC67D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVC67D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVC67D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000400) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000400) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS 20:20 +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_CONTEXT_DMA_CRC(a) (0x00002180 + (a)*0x00000400) +#define NVC67D_HEAD_SET_CONTEXT_DMA_CRC_HANDLE 31:0 +#define NVC67D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000400) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 5:0 +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_0 (0x00000000) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_1 (0x00000001) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_2 (0x00000002) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_3 (0x00000003) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_4 (0x00000004) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_5 (0x00000005) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_6 (0x00000006) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_7 (0x00000007) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_8 (0x00000008) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_9 (0x00000009) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_10 (0x0000000A) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_11 (0x0000000B) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_12 (0x0000000C) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_13 (0x0000000D) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_14 (0x0000000E) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_15 (0x0000000F) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_16 (0x00000010) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_17 (0x00000011) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_18 (0x00000012) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_19 (0x00000013) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_20 (0x00000014) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_21 (0x00000015) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_22 (0x00000016) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_23 (0x00000017) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_24 (0x00000018) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_25 (0x00000019) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_26 (0x0000001A) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_27 (0x0000001B) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_28 (0x0000001C) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_29 (0x0000001D) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_30 (0x0000001E) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_31 (0x0000001F) +#define NVC67D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000020) +#define NVC67D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVC67D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVC67D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVC67D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVC67D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVC67D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVC67D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000400) +#define NVC67D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVC67D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVC67D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000400) +#define NVC67D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVC67D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000400) +#define NVC67D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVC67D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000400) +#define NVC67D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVC67D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000400) +#define NVC67D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVC67D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DISPLAY_RATE_RUN_MODE 0:0 +#define NVC67D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVC67D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVC67D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVC67D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVC67D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_CONTEXT_DMA_RG_REL_SEMAPHORE(a,b) (0x000021AC + (a)*0x00000400 + (b)*0x00000004) +#define NVC67D_HEAD_SET_CONTEXT_DMA_RG_REL_SEMAPHORE_HANDLE 31:0 +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL(a,b) (0x000021CC + (a)*0x00000400 + (b)*0x00000004) +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_OFFSET 7:0 +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE 10:10 +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_ONE_TIME (0x00000000) +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_CONTINUOUS (0x00000001) +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RASTER_LINE 30:16 +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_VALUE(a,b) (0x000021EC + (a)*0x00000400 + (b)*0x00000004) +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_VALUE 31:0 +#define NVC67D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE(a) (0x00002214 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC67D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC67D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000400) +#define NVC67D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVC67D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 +#define NVC67D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED(a) (0x00002220 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_ALPHA 7:0 +#define NVC67D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_RED 31:16 +#define NVC67D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE(a) (0x00002224 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_GREEN 15:0 +#define NVC67D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_BLUE 31:16 +#define NVC67D_HEAD_SET_CURSOR_COLOR_NORM_SCALE(a) (0x00002228 + (a)*0x00000400) +#define NVC67D_HEAD_SET_CURSOR_COLOR_NORM_SCALE_VALUE 15:0 +#define NVC67D_HEAD_SET_XOR_BLEND_FACTOR(a) (0x0000222C + (a)*0x00000400) +#define NVC67D_HEAD_SET_XOR_BLEND_FACTOR_LOG2PEAK_LUMINANCE 3:0 +#define NVC67D_HEAD_SET_XOR_BLEND_FACTOR_S1 16:4 +#define NVC67D_HEAD_SET_XOR_BLEND_FACTOR_S2 30:18 +#define NVC67D_HEAD_SET_CLAMP_RANGE_GREEN(a) (0x00002238 + (a)*0x00000400) +#define NVC67D_HEAD_SET_CLAMP_RANGE_GREEN_LOW 11:0 +#define NVC67D_HEAD_SET_CLAMP_RANGE_GREEN_HIGH 27:16 +#define NVC67D_HEAD_SET_CLAMP_RANGE_RED_BLUE(a) (0x0000223C + (a)*0x00000400) +#define NVC67D_HEAD_SET_CLAMP_RANGE_RED_BLUE_LOW 11:0 +#define NVC67D_HEAD_SET_CLAMP_RANGE_RED_BLUE_HIGH 27:16 +#define NVC67D_HEAD_SET_OCSC0CONTROL(a) (0x00002240 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0CONTROL_ENABLE 0:0 +#define NVC67D_HEAD_SET_OCSC0CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_OCSC0CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C00(a) (0x00002244 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C00_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C01(a) (0x00002248 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C01_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C02(a) (0x0000224C + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C02_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C03(a) (0x00002250 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C03_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C10(a) (0x00002254 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C10_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C11(a) (0x00002258 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C11_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C12(a) (0x0000225C + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C12_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C13(a) (0x00002260 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C13_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C20(a) (0x00002264 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C20_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C21(a) (0x00002268 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C21_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C22(a) (0x0000226C + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C22_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C23(a) (0x00002270 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC0COEFFICIENT_C23_VALUE 20:0 +#define NVC67D_HEAD_SET_OLUT_CONTROL(a) (0x00002280 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OLUT_CONTROL_INTERPOLATE 0:0 +#define NVC67D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_OLUT_CONTROL_MIRROR 1:1 +#define NVC67D_HEAD_SET_OLUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_OLUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_OLUT_CONTROL_MODE 3:2 +#define NVC67D_HEAD_SET_OLUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC67D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC67D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC67D_HEAD_SET_OLUT_CONTROL_SIZE 18:8 +#define NVC67D_HEAD_SET_OLUT_FP_NORM_SCALE(a) (0x00002284 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OLUT_FP_NORM_SCALE_VALUE 31:0 +#define NVC67D_HEAD_SET_CONTEXT_DMA_OLUT(a) (0x00002288 + (a)*0x00000400) +#define NVC67D_HEAD_SET_CONTEXT_DMA_OLUT_HANDLE 31:0 +#define NVC67D_HEAD_SET_OFFSET_OLUT(a) (0x0000228C + (a)*0x00000400) +#define NVC67D_HEAD_SET_OFFSET_OLUT_ORIGIN 31:0 +#define NVC67D_HEAD_SET_OCSC1CONTROL(a) (0x0000229C + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1CONTROL_ENABLE 0:0 +#define NVC67D_HEAD_SET_OCSC1CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_OCSC1CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C00(a) (0x000022A0 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C00_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C01(a) (0x000022A4 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C01_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C02(a) (0x000022A8 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C02_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C03(a) (0x000022AC + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C03_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C10(a) (0x000022B0 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C10_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C11(a) (0x000022B4 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C11_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C12(a) (0x000022B8 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C12_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C13(a) (0x000022BC + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C13_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C20(a) (0x000022C0 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C20_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C21(a) (0x000022C4 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C21_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C22(a) (0x000022C8 + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C22_VALUE 20:0 +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C23(a) (0x000022CC + (a)*0x00000400) +#define NVC67D_HEAD_SET_OCSC1COEFFICIENT_C23_VALUE 20:0 +#define NVC67D_HEAD_SET_TILE_POSITION(a) (0x000022D0 + (a)*0x00000400) +#define NVC67D_HEAD_SET_TILE_POSITION_X 2:0 +#define NVC67D_HEAD_SET_TILE_POSITION_Y 6:4 +#define NVC67D_HEAD_SET_DSC_CONTROL(a) (0x000022D4 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_CONTROL_ENABLE 0:0 +#define NVC67D_HEAD_SET_DSC_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC67D_HEAD_SET_DSC_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC67D_HEAD_SET_DSC_CONTROL_MODE 2:1 +#define NVC67D_HEAD_SET_DSC_CONTROL_MODE_SINGLE (0x00000000) +#define NVC67D_HEAD_SET_DSC_CONTROL_MODE_DUAL (0x00000001) +#define NVC67D_HEAD_SET_DSC_CONTROL_MODE_QUAD (0x00000002) +#define NVC67D_HEAD_SET_DSC_CONTROL_AUTO_RESET 3:3 +#define NVC67D_HEAD_SET_DSC_CONTROL_AUTO_RESET_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_DSC_CONTROL_AUTO_RESET_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION 4:4 +#define NVC67D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_ENABLE (0x00000001) +#define NVC67D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET 5:5 +#define NVC67D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_FALSE (0x00000000) +#define NVC67D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_TRUE (0x00000001) +#define NVC67D_HEAD_SET_DSC_CONTROL_FLATNESS_DET_THRESH 15:6 +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL(a) (0x000022D8 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_ENABLE 0:0 +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_LOCATION 1:1 +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_SIZE 9:2 +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY 10:10 +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC67D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC67D_HEAD_SET_DSC_PPS_HEAD(a) (0x000022DC + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_HEAD_BYTE0 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_HEAD_BYTE1 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_HEAD_BYTE2 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_HEAD_BYTE3 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA0(a) (0x000022E0 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MINOR 3:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MAJOR 7:4 +#define NVC67D_HEAD_SET_DSC_PPS_DATA0_PPS_IDENTIFIER 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA0_RESERVED 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA0_LINEBUF_DEPTH 27:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA0_BITS_PER_COMPONENT 31:28 +#define NVC67D_HEAD_SET_DSC_PPS_DATA1(a) (0x000022E4 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_HIGH 1:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA1_VBR_ENABLE 2:2 +#define NVC67D_HEAD_SET_DSC_PPS_DATA1_SIMPLE422 3:3 +#define NVC67D_HEAD_SET_DSC_PPS_DATA1_CONVERT_RGB 4:4 +#define NVC67D_HEAD_SET_DSC_PPS_DATA1_BLOCK_PRED_ENABLE 5:5 +#define NVC67D_HEAD_SET_DSC_PPS_DATA1_RESERVED 7:6 +#define NVC67D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_LOW 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_HIGH 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_LOW 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA2(a) (0x000022E8 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_HIGH 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_LOW 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_HIGH 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_LOW 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA3(a) (0x000022EC + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_HIGH 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_LOW 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_HIGH 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_LOW 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA4(a) (0x000022F0 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_HIGH 1:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA4_RESERVED 7:2 +#define NVC67D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_LOW 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_HIGH 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_LOW 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA5(a) (0x000022F4 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA5_RESERVED0 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA5_INITIAL_SCALE_VALUE 13:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA5_RESERVED1 15:14 +#define NVC67D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_HIGH 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_LOW 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA6(a) (0x000022F8 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_HIGH 3:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA6_RESERVED0 7:4 +#define NVC67D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_LOW 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA6_RESERVED1 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA6_FIRST_LINE_BPG_OFFSET 28:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA6_RESERVED2 31:29 +#define NVC67D_HEAD_SET_DSC_PPS_DATA7(a) (0x000022FC + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_HIGH 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_LOW 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_HIGH 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_LOW 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA8(a) (0x00002300 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_HIGH 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_LOW 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_HIGH 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_LOW 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA9(a) (0x00002304 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MIN_QP 4:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA9_RESERVED0 7:5 +#define NVC67D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MAX_QP 12:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA9_RESERVED1 15:13 +#define NVC67D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_HIGH 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_LOW 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA10(a) (0x00002308 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA10_RC_EDGE_FACTOR 3:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA10_RESERVED0 7:4 +#define NVC67D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT0 12:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA10_RESERVED1 15:13 +#define NVC67D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT1 20:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA10_RESERVED2 23:21 +#define NVC67D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_LO 27:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_HI 31:28 +#define NVC67D_HEAD_SET_DSC_PPS_DATA11(a) (0x0000230C + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH0 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH1 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH2 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH3 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA12(a) (0x00002310 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH4 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH5 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH6 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH7 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA13(a) (0x00002314 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH8 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH9 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH10 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH11 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA14(a) (0x00002318 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH12 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH13 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_HIGH0 18:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MIN_QP0 23:19 +#define NVC67D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_BPG_OFFSET0 29:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_LOW0 31:30 +#define NVC67D_HEAD_SET_DSC_PPS_DATA15(a) (0x0000231C + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH1 2:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP1 7:3 +#define NVC67D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET1 13:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW1 15:14 +#define NVC67D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH2 18:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP2 23:19 +#define NVC67D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET2 29:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW2 31:30 +#define NVC67D_HEAD_SET_DSC_PPS_DATA16(a) (0x00002320 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH3 2:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP3 7:3 +#define NVC67D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET3 13:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW3 15:14 +#define NVC67D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH4 18:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP4 23:19 +#define NVC67D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET4 29:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW4 31:30 +#define NVC67D_HEAD_SET_DSC_PPS_DATA17(a) (0x00002324 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH5 2:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP5 7:3 +#define NVC67D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET5 13:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW5 15:14 +#define NVC67D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH6 18:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP6 23:19 +#define NVC67D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET6 29:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW6 31:30 +#define NVC67D_HEAD_SET_DSC_PPS_DATA18(a) (0x00002328 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH7 2:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP7 7:3 +#define NVC67D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET7 13:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW7 15:14 +#define NVC67D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH8 18:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP8 23:19 +#define NVC67D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET8 29:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW8 31:30 +#define NVC67D_HEAD_SET_DSC_PPS_DATA19(a) (0x0000232C + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH9 2:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP9 7:3 +#define NVC67D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET9 13:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW9 15:14 +#define NVC67D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH10 18:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP10 23:19 +#define NVC67D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET10 29:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW10 31:30 +#define NVC67D_HEAD_SET_DSC_PPS_DATA20(a) (0x00002330 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH11 2:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP11 7:3 +#define NVC67D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET11 13:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW11 15:14 +#define NVC67D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH12 18:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP12 23:19 +#define NVC67D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET12 29:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW12 31:30 +#define NVC67D_HEAD_SET_DSC_PPS_DATA21(a) (0x00002334 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH13 2:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP13 7:3 +#define NVC67D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET13 13:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW13 15:14 +#define NVC67D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH14 18:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP14 23:19 +#define NVC67D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET14 29:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW14 31:30 +#define NVC67D_HEAD_SET_DSC_PPS_DATA22(a) (0x00002338 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA22_NATIVE422 0:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA22_NATIVE420 1:1 +#define NVC67D_HEAD_SET_DSC_PPS_DATA22_RESERVED0 7:2 +#define NVC67D_HEAD_SET_DSC_PPS_DATA22_SECOND_LINE_BPG_OFFSET 12:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA22_RESERVED1 15:13 +#define NVC67D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSET_HIGH 23:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSETLOW 31:24 +#define NVC67D_HEAD_SET_DSC_PPS_DATA23(a) (0x0000233C + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_HIGH 7:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_LOW 15:8 +#define NVC67D_HEAD_SET_DSC_PPS_DATA23_RESERVED 31:16 +#define NVC67D_HEAD_SET_DSC_PPS_DATA24(a) (0x00002340 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA24_RESERVED 31:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA25(a) (0x00002344 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA25_RESERVED 31:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA26(a) (0x00002348 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA26_RESERVED 31:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA27(a) (0x0000234C + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA27_RESERVED 31:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA28(a) (0x00002350 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA28_RESERVED 31:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA29(a) (0x00002354 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA29_RESERVED 31:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA30(a) (0x00002358 + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA30_RESERVED 31:0 +#define NVC67D_HEAD_SET_DSC_PPS_DATA31(a) (0x0000235C + (a)*0x00000400) +#define NVC67D_HEAD_SET_DSC_PPS_DATA31_RESERVED 31:0 +#define NVC67D_HEAD_SET_RG_MERGE(a) (0x00002360 + (a)*0x00000400) +#define NVC67D_HEAD_SET_RG_MERGE_MODE 1:0 +#define NVC67D_HEAD_SET_RG_MERGE_MODE_DISABLE (0x00000000) +#define NVC67D_HEAD_SET_RG_MERGE_MODE_SETUP (0x00000001) +#define NVC67D_HEAD_SET_RG_MERGE_MODE_MASTER (0x00000002) +#define NVC67D_HEAD_SET_RG_MERGE_MODE_SLAVE (0x00000003) +#define NVC67D_HEAD_SET_RASTER_HBLANK_DELAY(a) (0x00002364 + (a)*0x00000400) +#define NVC67D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_START 15:0 +#define NVC67D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_END 31:16 +#define NVC67D_HEAD_SET_HDMI_DSC_HCACTIVE(a) (0x00002368 + (a)*0x00000400) +#define NVC67D_HEAD_SET_HDMI_DSC_HCACTIVE_BYTES 15:0 +#define NVC67D_HEAD_SET_HDMI_DSC_HCACTIVE_TRI_BYTES 31:16 +#define NVC67D_HEAD_SET_HDMI_DSC_HCBLANK(a) (0x0000236C + (a)*0x00000400) +#define NVC67D_HEAD_SET_HDMI_DSC_HCBLANK_WIDTH 15:0 +#define NVC67D_HEAD_SW_RESERVED(a,b) (0x00002370 + (a)*0x00000400 + (b)*0x00000004) +#define NVC67D_HEAD_SW_RESERVED_VALUE 31:0 +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI(a,b) (0x00002380 + (a)*0x00000400 + (b)*0x00000004) +#define NVC67D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI_VALUE 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC67d_h diff --git a/userspace/sdks/nv570/inc/class/clc67e.h b/userspace/sdks/nv570/inc/class/clc67e.h new file mode 100644 index 0000000..871e8cd --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc67e.h @@ -0,0 +1,698 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC67e_h_ +#define _clC67e_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC67E_WINDOW_CHANNEL_DMA (0x0000C67E) + +// dma opcode instructions +#define NVC67E_DMA +#define NVC67E_DMA_OPCODE 31:29 +#define NVC67E_DMA_OPCODE_METHOD 0x00000000 +#define NVC67E_DMA_OPCODE_JUMP 0x00000001 +#define NVC67E_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC67E_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC67E_DMA_METHOD_COUNT 27:18 +#define NVC67E_DMA_METHOD_OFFSET 13:2 +#define NVC67E_DMA_DATA 31:0 +#define NVC67E_DMA_DATA_NOP 0x00000000 +#define NVC67E_DMA_JUMP_OFFSET 11:2 +#define NVC67E_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC67E_PUT (0x00000000) +#define NVC67E_PUT_PTR 9:0 +#define NVC67E_GET (0x00000004) +#define NVC67E_GET_PTR 9:0 +#define NVC67E_UPDATE (0x00000200) +#define NVC67E_UPDATE_RELEASE_ELV 0:0 +#define NVC67E_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC67E_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC67E_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC67E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC67E_UPDATE_INTERLOCK_WITH_WIN_IMM 12:12 +#define NVC67E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000) +#define NVC67E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001) +#define NVC67E_SET_SEMAPHORE_ACQUIRE_HI (0x00000204) +#define NVC67E_SET_SEMAPHORE_ACQUIRE_HI_VALUE 31:0 +#define NVC67E_GET_LINE (0x00000208) +#define NVC67E_GET_LINE_LINE 15:0 +#define NVC67E_SET_SEMAPHORE_CONTROL (0x0000020C) +#define NVC67E_SET_SEMAPHORE_CONTROL_OFFSET 7:0 +#define NVC67E_SET_SEMAPHORE_CONTROL_SKIP_ACQ 11:11 +#define NVC67E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_FALSE (0x00000000) +#define NVC67E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_TRUE (0x00000001) +#define NVC67E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC67E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC67E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC67E_SET_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVC67E_SET_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVC67E_SET_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVC67E_SET_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVC67E_SET_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVC67E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVC67E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC67E_SET_SEMAPHORE_ACQUIRE (0x00000210) +#define NVC67E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0 +#define NVC67E_SET_SEMAPHORE_RELEASE (0x00000214) +#define NVC67E_SET_SEMAPHORE_RELEASE_VALUE 31:0 +#define NVC67E_SET_CONTEXT_DMA_SEMAPHORE (0x00000218) +#define NVC67E_SET_CONTEXT_DMA_SEMAPHORE_HANDLE 31:0 +#define NVC67E_SET_CONTEXT_DMA_NOTIFIER (0x0000021C) +#define NVC67E_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NVC67E_SET_NOTIFIER_CONTROL (0x00000220) +#define NVC67E_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC67E_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC67E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC67E_SET_NOTIFIER_CONTROL_OFFSET 11:4 +#define NVC67E_SET_SIZE (0x00000224) +#define NVC67E_SET_SIZE_WIDTH 15:0 +#define NVC67E_SET_SIZE_HEIGHT 31:16 +#define NVC67E_SET_STORAGE (0x00000228) +#define NVC67E_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NVC67E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NVC67E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NVC67E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC67E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC67E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC67E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC67E_SET_PARAMS (0x0000022C) +#define NVC67E_SET_PARAMS_FORMAT 7:0 +#define NVC67E_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NVC67E_SET_PARAMS_FORMAT_R4G4B4A4 (0x0000002F) +#define NVC67E_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NVC67E_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC67E_SET_PARAMS_FORMAT_R5G5B5A1 (0x0000002E) +#define NVC67E_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC67E_SET_PARAMS_FORMAT_X8R8G8B8 (0x000000E6) +#define NVC67E_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NVC67E_SET_PARAMS_FORMAT_X8B8G8R8 (0x000000F9) +#define NVC67E_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NVC67E_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NVC67E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NVC67E_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NVC67E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NVC67E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422 (0x00000028) +#define NVC67E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422 (0x00000029) +#define NVC67E_SET_PARAMS_FORMAT_Y8___U8V8_N444 (0x00000035) +#define NVC67E_SET_PARAMS_FORMAT_Y8___U8V8_N422 (0x00000036) +#define NVC67E_SET_PARAMS_FORMAT_Y8___V8U8_N420 (0x00000038) +#define NVC67E_SET_PARAMS_FORMAT_Y8___U8___V8_N444 (0x0000003A) +#define NVC67E_SET_PARAMS_FORMAT_Y8___U8___V8_N420 (0x0000003B) +#define NVC67E_SET_PARAMS_FORMAT_Y10___U10V10_N444 (0x00000055) +#define NVC67E_SET_PARAMS_FORMAT_Y10___U10V10_N422 (0x00000056) +#define NVC67E_SET_PARAMS_FORMAT_Y10___V10U10_N420 (0x00000058) +#define NVC67E_SET_PARAMS_FORMAT_Y12___U12V12_N444 (0x00000075) +#define NVC67E_SET_PARAMS_FORMAT_Y12___U12V12_N422 (0x00000076) +#define NVC67E_SET_PARAMS_FORMAT_Y12___V12U12_N420 (0x00000078) +#define NVC67E_SET_PARAMS_CLAMP_BEFORE_BLEND 18:18 +#define NVC67E_SET_PARAMS_CLAMP_BEFORE_BLEND_DISABLE (0x00000000) +#define NVC67E_SET_PARAMS_CLAMP_BEFORE_BLEND_ENABLE (0x00000001) +#define NVC67E_SET_PARAMS_SWAP_UV 19:19 +#define NVC67E_SET_PARAMS_SWAP_UV_DISABLE (0x00000000) +#define NVC67E_SET_PARAMS_SWAP_UV_ENABLE (0x00000001) +#define NVC67E_SET_PARAMS_FMT_ROUNDING_MODE 22:22 +#define NVC67E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_TO_NEAREST (0x00000000) +#define NVC67E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_DOWN (0x00000001) +#define NVC67E_SET_PLANAR_STORAGE(b) (0x00000230 + (b)*0x00000004) +#define NVC67E_SET_PLANAR_STORAGE_PITCH 12:0 +#define NVC67E_SET_SEMAPHORE_RELEASE_HI (0x0000023C) +#define NVC67E_SET_SEMAPHORE_RELEASE_HI_VALUE 31:0 +#define NVC67E_SET_CONTEXT_DMA_ISO(b) (0x00000240 + (b)*0x00000004) +#define NVC67E_SET_CONTEXT_DMA_ISO_HANDLE 31:0 +#define NVC67E_SET_OFFSET(b) (0x00000260 + (b)*0x00000004) +#define NVC67E_SET_OFFSET_ORIGIN 31:0 +#define NVC67E_SET_POINT_IN(b) (0x00000290 + (b)*0x00000004) +#define NVC67E_SET_POINT_IN_X 15:0 +#define NVC67E_SET_POINT_IN_Y 31:16 +#define NVC67E_SET_SIZE_IN (0x00000298) +#define NVC67E_SET_SIZE_IN_WIDTH 15:0 +#define NVC67E_SET_SIZE_IN_HEIGHT 31:16 +#define NVC67E_SET_SIZE_OUT (0x000002A4) +#define NVC67E_SET_SIZE_OUT_WIDTH 15:0 +#define NVC67E_SET_SIZE_OUT_HEIGHT 31:16 +#define NVC67E_SET_CONTROL_INPUT_SCALER (0x000002A8) +#define NVC67E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC67E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC67E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC67E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC67E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC67E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC67E_SET_INPUT_SCALER_COEFF_VALUE (0x000002AC) +#define NVC67E_SET_INPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC67E_SET_INPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC67E_SET_COMPOSITION_CONTROL (0x000002EC) +#define NVC67E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVC67E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVC67E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVC67E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVC67E_SET_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVC67E_SET_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVC67E_SET_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVC67E_SET_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVC67E_SET_COMPOSITION_CONSTANT_ALPHA (0x000002F0) +#define NVC67E_SET_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVC67E_SET_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT (0x000002F4) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC67E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC67E_SET_KEY_ALPHA (0x000002F8) +#define NVC67E_SET_KEY_ALPHA_MIN 15:0 +#define NVC67E_SET_KEY_ALPHA_MAX 31:16 +#define NVC67E_SET_KEY_RED_CR (0x000002FC) +#define NVC67E_SET_KEY_RED_CR_MIN 15:0 +#define NVC67E_SET_KEY_RED_CR_MAX 31:16 +#define NVC67E_SET_KEY_GREEN_Y (0x00000300) +#define NVC67E_SET_KEY_GREEN_Y_MIN 15:0 +#define NVC67E_SET_KEY_GREEN_Y_MAX 31:16 +#define NVC67E_SET_KEY_BLUE_CB (0x00000304) +#define NVC67E_SET_KEY_BLUE_CB_MIN 15:0 +#define NVC67E_SET_KEY_BLUE_CB_MAX 31:16 +#define NVC67E_SET_PRESENT_CONTROL (0x00000308) +#define NVC67E_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NVC67E_SET_PRESENT_CONTROL_BEGIN_MODE 6:4 +#define NVC67E_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000) +#define NVC67E_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001) +#define NVC67E_SET_PRESENT_CONTROL_TIMESTAMP_MODE 8:8 +#define NVC67E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_DISABLE (0x00000000) +#define NVC67E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_ENABLE (0x00000001) +#define NVC67E_SET_PRESENT_CONTROL_STEREO_MODE 13:12 +#define NVC67E_SET_PRESENT_CONTROL_STEREO_MODE_MONO (0x00000000) +#define NVC67E_SET_PRESENT_CONTROL_STEREO_MODE_PAIR_FLIP (0x00000001) +#define NVC67E_SET_PRESENT_CONTROL_STEREO_MODE_AT_ANY_FRAME (0x00000002) +#define NVC67E_SET_ACQ_SEMAPHORE_VALUE_HI (0x0000030C) +#define NVC67E_SET_ACQ_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVC67E_SET_ACQ_SEMAPHORE_CONTROL (0x00000330) +#define NVC67E_SET_ACQ_SEMAPHORE_CONTROL_OFFSET 7:0 +#define NVC67E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC67E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC67E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC67E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVC67E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVC67E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVC67E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVC67E_SET_ACQ_SEMAPHORE_VALUE (0x00000334) +#define NVC67E_SET_ACQ_SEMAPHORE_VALUE_VALUE 31:0 +#define NVC67E_SET_CONTEXT_DMA_ACQ_SEMAPHORE (0x00000338) +#define NVC67E_SET_CONTEXT_DMA_ACQ_SEMAPHORE_HANDLE 31:0 +#define NVC67E_SET_SCAN_DIRECTION (0x0000033C) +#define NVC67E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION 0:0 +#define NVC67E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_LEFT (0x00000000) +#define NVC67E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_RIGHT (0x00000001) +#define NVC67E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION 1:1 +#define NVC67E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_TOP (0x00000000) +#define NVC67E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_BOTTOM (0x00000001) +#define NVC67E_SET_SCAN_DIRECTION_COLUMN_ORDER 2:2 +#define NVC67E_SET_SCAN_DIRECTION_COLUMN_ORDER_FALSE (0x00000000) +#define NVC67E_SET_SCAN_DIRECTION_COLUMN_ORDER_TRUE (0x00000001) +#define NVC67E_SET_TIMESTAMP_ORIGIN_LO (0x00000340) +#define NVC67E_SET_TIMESTAMP_ORIGIN_LO_TIMESTAMP_LO 31:0 +#define NVC67E_SET_TIMESTAMP_ORIGIN_HI (0x00000344) +#define NVC67E_SET_TIMESTAMP_ORIGIN_HI_TIMESTAMP_HI 31:0 +#define NVC67E_SET_UPDATE_TIMESTAMP_LO (0x00000348) +#define NVC67E_SET_UPDATE_TIMESTAMP_LO_TIMESTAMP_LO 31:0 +#define NVC67E_SET_UPDATE_TIMESTAMP_HI (0x0000034C) +#define NVC67E_SET_UPDATE_TIMESTAMP_HI_TIMESTAMP_HI 31:0 +#define NVC67E_SET_INTERLOCK_FLAGS (0x00000370) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 0:0 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+1):((i)+1) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 1:1 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 2:2 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 3:3 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 4:4 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 5:5 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 6:6 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 7:7 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 8:8 +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC67E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS (0x00000374) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC67E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC67E_SET_EXT_PACKET_CONTROL (0x00000398) +#define NVC67E_SET_EXT_PACKET_CONTROL_ENABLE 0:0 +#define NVC67E_SET_EXT_PACKET_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67E_SET_EXT_PACKET_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67E_SET_EXT_PACKET_CONTROL_LOCATION 4:4 +#define NVC67E_SET_EXT_PACKET_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVC67E_SET_EXT_PACKET_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVC67E_SET_EXT_PACKET_CONTROL_FREQUENCY 8:8 +#define NVC67E_SET_EXT_PACKET_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC67E_SET_EXT_PACKET_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC67E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE 12:12 +#define NVC67E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_DISABLE (0x00000000) +#define NVC67E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_ENABLE (0x00000001) +#define NVC67E_SET_EXT_PACKET_CONTROL_SIZE 27:16 +#define NVC67E_SET_EXT_PACKET_DATA (0x0000039C) +#define NVC67E_SET_EXT_PACKET_DATA_DB0 7:0 +#define NVC67E_SET_EXT_PACKET_DATA_DB1 15:8 +#define NVC67E_SET_EXT_PACKET_DATA_DB2 23:16 +#define NVC67E_SET_EXT_PACKET_DATA_DB3 31:24 +#define NVC67E_SET_FMT_COEFFICIENT_C00 (0x00000400) +#define NVC67E_SET_FMT_COEFFICIENT_C00_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C01 (0x00000404) +#define NVC67E_SET_FMT_COEFFICIENT_C01_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C02 (0x00000408) +#define NVC67E_SET_FMT_COEFFICIENT_C02_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C03 (0x0000040C) +#define NVC67E_SET_FMT_COEFFICIENT_C03_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C10 (0x00000410) +#define NVC67E_SET_FMT_COEFFICIENT_C10_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C11 (0x00000414) +#define NVC67E_SET_FMT_COEFFICIENT_C11_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C12 (0x00000418) +#define NVC67E_SET_FMT_COEFFICIENT_C12_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C13 (0x0000041C) +#define NVC67E_SET_FMT_COEFFICIENT_C13_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C20 (0x00000420) +#define NVC67E_SET_FMT_COEFFICIENT_C20_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C21 (0x00000424) +#define NVC67E_SET_FMT_COEFFICIENT_C21_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C22 (0x00000428) +#define NVC67E_SET_FMT_COEFFICIENT_C22_VALUE 20:0 +#define NVC67E_SET_FMT_COEFFICIENT_C23 (0x0000042C) +#define NVC67E_SET_FMT_COEFFICIENT_C23_VALUE 20:0 +#define NVC67E_SET_ILUT_CONTROL (0x00000440) +#define NVC67E_SET_ILUT_CONTROL_INTERPOLATE 0:0 +#define NVC67E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC67E_SET_ILUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC67E_SET_ILUT_CONTROL_MIRROR 1:1 +#define NVC67E_SET_ILUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC67E_SET_ILUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC67E_SET_ILUT_CONTROL_MODE 3:2 +#define NVC67E_SET_ILUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC67E_SET_ILUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC67E_SET_ILUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC67E_SET_ILUT_CONTROL_SIZE 18:8 +#define NVC67E_SET_CONTEXT_DMA_ILUT (0x00000444) +#define NVC67E_SET_CONTEXT_DMA_ILUT_HANDLE 31:0 +#define NVC67E_SET_OFFSET_ILUT (0x00000448) +#define NVC67E_SET_OFFSET_ILUT_ORIGIN 31:0 +#define NVC67E_SET_CSC00CONTROL (0x0000045C) +#define NVC67E_SET_CSC00CONTROL_ENABLE 0:0 +#define NVC67E_SET_CSC00CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67E_SET_CSC00CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67E_SET_CSC00COEFFICIENT_C00 (0x00000460) +#define NVC67E_SET_CSC00COEFFICIENT_C00_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C01 (0x00000464) +#define NVC67E_SET_CSC00COEFFICIENT_C01_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C02 (0x00000468) +#define NVC67E_SET_CSC00COEFFICIENT_C02_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C03 (0x0000046C) +#define NVC67E_SET_CSC00COEFFICIENT_C03_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C10 (0x00000470) +#define NVC67E_SET_CSC00COEFFICIENT_C10_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C11 (0x00000474) +#define NVC67E_SET_CSC00COEFFICIENT_C11_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C12 (0x00000478) +#define NVC67E_SET_CSC00COEFFICIENT_C12_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C13 (0x0000047C) +#define NVC67E_SET_CSC00COEFFICIENT_C13_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C20 (0x00000480) +#define NVC67E_SET_CSC00COEFFICIENT_C20_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C21 (0x00000484) +#define NVC67E_SET_CSC00COEFFICIENT_C21_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C22 (0x00000488) +#define NVC67E_SET_CSC00COEFFICIENT_C22_VALUE 20:0 +#define NVC67E_SET_CSC00COEFFICIENT_C23 (0x0000048C) +#define NVC67E_SET_CSC00COEFFICIENT_C23_VALUE 20:0 +#define NVC67E_SET_CSC0LUT_CONTROL (0x000004A0) +#define NVC67E_SET_CSC0LUT_CONTROL_INTERPOLATE 0:0 +#define NVC67E_SET_CSC0LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC67E_SET_CSC0LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC67E_SET_CSC0LUT_CONTROL_MIRROR 1:1 +#define NVC67E_SET_CSC0LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC67E_SET_CSC0LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC67E_SET_CSC0LUT_CONTROL_ENABLE 4:4 +#define NVC67E_SET_CSC0LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67E_SET_CSC0LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67E_SET_CSC0LUT_SEGMENT_SIZE (0x000004A4) +#define NVC67E_SET_CSC0LUT_SEGMENT_SIZE_IDX 5:0 +#define NVC67E_SET_CSC0LUT_SEGMENT_SIZE_VALUE 18:16 +#define NVC67E_SET_CSC0LUT_ENTRY (0x000004A8) +#define NVC67E_SET_CSC0LUT_ENTRY_IDX 10:0 +#define NVC67E_SET_CSC0LUT_ENTRY_VALUE 31:16 +#define NVC67E_SET_CSC01CONTROL (0x000004BC) +#define NVC67E_SET_CSC01CONTROL_ENABLE 0:0 +#define NVC67E_SET_CSC01CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67E_SET_CSC01CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67E_SET_CSC01COEFFICIENT_C00 (0x000004C0) +#define NVC67E_SET_CSC01COEFFICIENT_C00_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C01 (0x000004C4) +#define NVC67E_SET_CSC01COEFFICIENT_C01_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C02 (0x000004C8) +#define NVC67E_SET_CSC01COEFFICIENT_C02_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C03 (0x000004CC) +#define NVC67E_SET_CSC01COEFFICIENT_C03_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C10 (0x000004D0) +#define NVC67E_SET_CSC01COEFFICIENT_C10_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C11 (0x000004D4) +#define NVC67E_SET_CSC01COEFFICIENT_C11_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C12 (0x000004D8) +#define NVC67E_SET_CSC01COEFFICIENT_C12_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C13 (0x000004DC) +#define NVC67E_SET_CSC01COEFFICIENT_C13_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C20 (0x000004E0) +#define NVC67E_SET_CSC01COEFFICIENT_C20_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C21 (0x000004E4) +#define NVC67E_SET_CSC01COEFFICIENT_C21_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C22 (0x000004E8) +#define NVC67E_SET_CSC01COEFFICIENT_C22_VALUE 20:0 +#define NVC67E_SET_CSC01COEFFICIENT_C23 (0x000004EC) +#define NVC67E_SET_CSC01COEFFICIENT_C23_VALUE 20:0 +#define NVC67E_SET_TMO_CONTROL (0x00000500) +#define NVC67E_SET_TMO_CONTROL_INTERPOLATE 0:0 +#define NVC67E_SET_TMO_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC67E_SET_TMO_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC67E_SET_TMO_CONTROL_SAT_MODE 3:2 +#define NVC67E_SET_TMO_CONTROL_SIZE 18:8 +#define NVC67E_SET_TMO_LOW_INTENSITY_ZONE (0x00000508) +#define NVC67E_SET_TMO_LOW_INTENSITY_ZONE_END 29:16 +#define NVC67E_SET_TMO_LOW_INTENSITY_VALUE (0x0000050C) +#define NVC67E_SET_TMO_LOW_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC67E_SET_TMO_LOW_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC67E_SET_TMO_LOW_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC67E_SET_TMO_MEDIUM_INTENSITY_ZONE (0x00000510) +#define NVC67E_SET_TMO_MEDIUM_INTENSITY_ZONE_START 13:0 +#define NVC67E_SET_TMO_MEDIUM_INTENSITY_ZONE_END 29:16 +#define NVC67E_SET_TMO_MEDIUM_INTENSITY_VALUE (0x00000514) +#define NVC67E_SET_TMO_MEDIUM_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC67E_SET_TMO_MEDIUM_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC67E_SET_TMO_MEDIUM_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC67E_SET_TMO_HIGH_INTENSITY_ZONE (0x00000518) +#define NVC67E_SET_TMO_HIGH_INTENSITY_ZONE_START 13:0 +#define NVC67E_SET_TMO_HIGH_INTENSITY_VALUE (0x0000051C) +#define NVC67E_SET_TMO_HIGH_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC67E_SET_TMO_HIGH_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC67E_SET_TMO_HIGH_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC67E_SET_CONTEXT_DMA_TMO_LUT (0x00000528) +#define NVC67E_SET_CONTEXT_DMA_TMO_LUT_HANDLE 31:0 +#define NVC67E_SET_OFFSET_TMO_LUT (0x0000052C) +#define NVC67E_SET_OFFSET_TMO_LUT_ORIGIN 31:0 +#define NVC67E_SET_CSC10CONTROL (0x0000053C) +#define NVC67E_SET_CSC10CONTROL_ENABLE 0:0 +#define NVC67E_SET_CSC10CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67E_SET_CSC10CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67E_SET_CSC10COEFFICIENT_C00 (0x00000540) +#define NVC67E_SET_CSC10COEFFICIENT_C00_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C01 (0x00000544) +#define NVC67E_SET_CSC10COEFFICIENT_C01_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C02 (0x00000548) +#define NVC67E_SET_CSC10COEFFICIENT_C02_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C03 (0x0000054C) +#define NVC67E_SET_CSC10COEFFICIENT_C03_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C10 (0x00000550) +#define NVC67E_SET_CSC10COEFFICIENT_C10_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C11 (0x00000554) +#define NVC67E_SET_CSC10COEFFICIENT_C11_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C12 (0x00000558) +#define NVC67E_SET_CSC10COEFFICIENT_C12_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C13 (0x0000055C) +#define NVC67E_SET_CSC10COEFFICIENT_C13_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C20 (0x00000560) +#define NVC67E_SET_CSC10COEFFICIENT_C20_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C21 (0x00000564) +#define NVC67E_SET_CSC10COEFFICIENT_C21_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C22 (0x00000568) +#define NVC67E_SET_CSC10COEFFICIENT_C22_VALUE 20:0 +#define NVC67E_SET_CSC10COEFFICIENT_C23 (0x0000056C) +#define NVC67E_SET_CSC10COEFFICIENT_C23_VALUE 20:0 +#define NVC67E_SET_CSC1LUT_CONTROL (0x00000580) +#define NVC67E_SET_CSC1LUT_CONTROL_INTERPOLATE 0:0 +#define NVC67E_SET_CSC1LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC67E_SET_CSC1LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC67E_SET_CSC1LUT_CONTROL_MIRROR 1:1 +#define NVC67E_SET_CSC1LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC67E_SET_CSC1LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC67E_SET_CSC1LUT_CONTROL_ENABLE 4:4 +#define NVC67E_SET_CSC1LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67E_SET_CSC1LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67E_SET_CSC1LUT_SEGMENT_SIZE (0x00000584) +#define NVC67E_SET_CSC1LUT_SEGMENT_SIZE_IDX 5:0 +#define NVC67E_SET_CSC1LUT_SEGMENT_SIZE_VALUE 18:16 +#define NVC67E_SET_CSC1LUT_ENTRY (0x00000588) +#define NVC67E_SET_CSC1LUT_ENTRY_IDX 10:0 +#define NVC67E_SET_CSC1LUT_ENTRY_VALUE 31:16 +#define NVC67E_SET_CSC11CONTROL (0x0000059C) +#define NVC67E_SET_CSC11CONTROL_ENABLE 0:0 +#define NVC67E_SET_CSC11CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC67E_SET_CSC11CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC67E_SET_CSC11COEFFICIENT_C00 (0x000005A0) +#define NVC67E_SET_CSC11COEFFICIENT_C00_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C01 (0x000005A4) +#define NVC67E_SET_CSC11COEFFICIENT_C01_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C02 (0x000005A8) +#define NVC67E_SET_CSC11COEFFICIENT_C02_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C03 (0x000005AC) +#define NVC67E_SET_CSC11COEFFICIENT_C03_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C10 (0x000005B0) +#define NVC67E_SET_CSC11COEFFICIENT_C10_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C11 (0x000005B4) +#define NVC67E_SET_CSC11COEFFICIENT_C11_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C12 (0x000005B8) +#define NVC67E_SET_CSC11COEFFICIENT_C12_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C13 (0x000005BC) +#define NVC67E_SET_CSC11COEFFICIENT_C13_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C20 (0x000005C0) +#define NVC67E_SET_CSC11COEFFICIENT_C20_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C21 (0x000005C4) +#define NVC67E_SET_CSC11COEFFICIENT_C21_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C22 (0x000005C8) +#define NVC67E_SET_CSC11COEFFICIENT_C22_VALUE 20:0 +#define NVC67E_SET_CSC11COEFFICIENT_C23 (0x000005CC) +#define NVC67E_SET_CSC11COEFFICIENT_C23_VALUE 20:0 +#define NVC67E_SET_CLAMP_RANGE (0x000005D0) +#define NVC67E_SET_CLAMP_RANGE_LOW 15:0 +#define NVC67E_SET_CLAMP_RANGE_HIGH 31:16 +#define NVC67E_SW_RESERVED(b) (0x000005D4 + (b)*0x00000004) +#define NVC67E_SW_RESERVED_VALUE 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC67e_h diff --git a/userspace/sdks/nv570/inc/class/clc697.h b/userspace/sdks/nv570/inc/class/clc697.h new file mode 100644 index 0000000..a8b447e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc697.h @@ -0,0 +1,4352 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_ampere_a_h_ +#define _cl_ampere_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl ampere_a */ + +#include "nvtypes.h" + +#define AMPERE_A 0xC697 + +#define NVC697_SET_OBJECT 0x0000 +#define NVC697_SET_OBJECT_CLASS_ID 15:0 +#define NVC697_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC697_NO_OPERATION 0x0100 +#define NVC697_NO_OPERATION_V 31:0 + +#define NVC697_SET_NOTIFY_A 0x0104 +#define NVC697_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC697_SET_NOTIFY_B 0x0108 +#define NVC697_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC697_NOTIFY 0x010c +#define NVC697_NOTIFY_TYPE 31:0 +#define NVC697_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC697_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC697_WAIT_FOR_IDLE 0x0110 +#define NVC697_WAIT_FOR_IDLE_V 31:0 + +#define NVC697_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVC697_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVC697_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVC697_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVC697_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVC697_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVC697_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVC697_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVC697_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVC697_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVC697_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVC697_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVC697_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVC697_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVC697_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVC697_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVC697_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVC697_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVC697_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC697_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC697_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC697_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC697_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC697_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC697_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC697_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC697_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC697_SEND_GO_IDLE 0x013c +#define NVC697_SEND_GO_IDLE_V 31:0 + +#define NVC697_PM_TRIGGER 0x0140 +#define NVC697_PM_TRIGGER_V 31:0 + +#define NVC697_PM_TRIGGER_WFI 0x0144 +#define NVC697_PM_TRIGGER_WFI_V 31:0 + +#define NVC697_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC697_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC697_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC697_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC697_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC697_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC697_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC697_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC697_LINE_LENGTH_IN 0x0180 +#define NVC697_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC697_LINE_COUNT 0x0184 +#define NVC697_LINE_COUNT_VALUE 31:0 + +#define NVC697_OFFSET_OUT_UPPER 0x0188 +#define NVC697_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVC697_OFFSET_OUT 0x018c +#define NVC697_OFFSET_OUT_VALUE 31:0 + +#define NVC697_PITCH_OUT 0x0190 +#define NVC697_PITCH_OUT_VALUE 31:0 + +#define NVC697_SET_DST_BLOCK_SIZE 0x0194 +#define NVC697_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC697_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC697_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC697_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC697_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC697_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC697_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC697_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC697_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC697_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC697_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC697_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC697_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC697_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC697_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC697_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC697_SET_DST_WIDTH 0x0198 +#define NVC697_SET_DST_WIDTH_V 31:0 + +#define NVC697_SET_DST_HEIGHT 0x019c +#define NVC697_SET_DST_HEIGHT_V 31:0 + +#define NVC697_SET_DST_DEPTH 0x01a0 +#define NVC697_SET_DST_DEPTH_V 31:0 + +#define NVC697_SET_DST_LAYER 0x01a4 +#define NVC697_SET_DST_LAYER_V 31:0 + +#define NVC697_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC697_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC697_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC697_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC697_LAUNCH_DMA 0x01b0 +#define NVC697_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC697_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC697_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC697_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC697_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC697_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC697_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC697_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC697_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC697_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC697_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC697_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC697_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC697_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC697_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC697_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC697_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC697_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC697_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC697_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC697_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC697_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC697_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC697_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC697_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC697_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC697_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC697_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC697_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC697_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC697_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC697_LOAD_INLINE_DATA 0x01b4 +#define NVC697_LOAD_INLINE_DATA_V 31:0 + +#define NVC697_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC697_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC697_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC697_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC697_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC697_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC697_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC697_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC697_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC697_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC697_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC697_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC697_RUN_DS_NOW 0x0200 +#define NVC697_RUN_DS_NOW_V 31:0 + +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVC697_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVC697_SET_GS_MODE 0x0208 +#define NVC697_SET_GS_MODE_TYPE 0:0 +#define NVC697_SET_GS_MODE_TYPE_ANY 0x00000000 +#define NVC697_SET_GS_MODE_TYPE_FAST_GS 0x00000001 + +#define NVC697_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVC697_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVC697_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVC697_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVC697_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVC697_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVC697_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVC697_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_GS_DM_FIFO 0x0214 +#define NVC697_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVC697_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVC697_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVC697_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVC697_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC697_INVALIDATE_SHADER_CACHES 0x021c +#define NVC697_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC697_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC697_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC697_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC697_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC697_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC697_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC697_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC697_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC697_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC697_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC697_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC697_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC697_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC697_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC697_SET_INSTANCE_COUNT 0x0220 +#define NVC697_SET_INSTANCE_COUNT_V 31:0 + +#define NVC697_SET_POSITION_W_SCALED_OFFSET_ENABLE 0x0224 +#define NVC697_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE 0:0 +#define NVC697_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_GO_IDLE_TIMEOUT 0x022c +#define NVC697_SET_GO_IDLE_TIMEOUT_V 31:0 + +#define NVC697_SET_MME_VERSION 0x0234 +#define NVC697_SET_MME_VERSION_MAJOR 7:0 + +#define NVC697_SET_INDEX_BUFFER_SIZE_A 0x0238 +#define NVC697_SET_INDEX_BUFFER_SIZE_A_UPPER 7:0 + +#define NVC697_SET_INDEX_BUFFER_SIZE_B 0x023c +#define NVC697_SET_INDEX_BUFFER_SIZE_B_LOWER 31:0 + +#define NVC697_SET_ROOT_TABLE_VISIBILITY(i) (0x0240+(i)*4) +#define NVC697_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP0_ENABLE 1:0 +#define NVC697_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP1_ENABLE 5:4 +#define NVC697_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP2_ENABLE 9:8 +#define NVC697_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP3_ENABLE 13:12 +#define NVC697_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP4_ENABLE 17:16 + +#define NVC697_SET_DRAW_CONTROL_A 0x0260 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY 3:0 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_POINTS 0x00000000 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_LINES 0x00000001 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_QUADS 0x00000007 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_POLYGON 0x00000009 +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_SET_DRAW_CONTROL_A_TOPOLOGY_PATCH 0x0000000E +#define NVC697_SET_DRAW_CONTROL_A_PRIMITIVE_ID 4:4 +#define NVC697_SET_DRAW_CONTROL_A_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC697_SET_DRAW_CONTROL_A_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC697_SET_DRAW_CONTROL_A_INSTANCE_ID 6:5 +#define NVC697_SET_DRAW_CONTROL_A_INSTANCE_ID_FIRST 0x00000000 +#define NVC697_SET_DRAW_CONTROL_A_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC697_SET_DRAW_CONTROL_A_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC697_SET_DRAW_CONTROL_A_SPLIT_MODE 8:7 +#define NVC697_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC697_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC697_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC697_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC697_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE 9:9 +#define NVC697_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 +#define NVC697_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX 10:10 +#define NVC697_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_FALSE 0x00000000 +#define NVC697_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_TRUE 0x00000001 +#define NVC697_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX 11:11 +#define NVC697_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_FALSE 0x00000000 +#define NVC697_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_TRUE 0x00000001 + +#define NVC697_SET_DRAW_CONTROL_B 0x0264 +#define NVC697_SET_DRAW_CONTROL_B_INSTANCE_COUNT 31:0 + +#define NVC697_DRAW_INDEX_BUFFER_BEGIN_END_A 0x0268 +#define NVC697_DRAW_INDEX_BUFFER_BEGIN_END_A_FIRST 31:0 + +#define NVC697_DRAW_INDEX_BUFFER_BEGIN_END_B 0x026c +#define NVC697_DRAW_INDEX_BUFFER_BEGIN_END_B_COUNT 31:0 + +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_A 0x0270 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_A_START 31:0 + +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_B 0x0274 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_B_COUNT 31:0 + +#define NVC697_INVALIDATE_RASTER_CACHE_NO_WFI 0x027c +#define NVC697_INVALIDATE_RASTER_CACHE_NO_WFI_V 0:0 + +#define NVC697_SET_COLOR_RENDER_TO_ZETA_SURFACE 0x02b8 +#define NVC697_SET_COLOR_RENDER_TO_ZETA_SURFACE_V 0:0 +#define NVC697_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_FALSE 0x00000000 +#define NVC697_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_TRUE 0x00000001 + +#define NVC697_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION 0x02bc +#define NVC697_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V 0:0 +#define NVC697_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_FALSE 0x00000000 +#define NVC697_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_TRUE 0x00000001 + +#define NVC697_INCREMENT_SYNC_POINT 0x02c8 +#define NVC697_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVC697_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVC697_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVC697_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVC697_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVC697_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVC697_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVC697_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVC697_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVC697_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC697_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVC697_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVC697_DECOMPRESS_SURFACE 0x02e0 +#define NVC697_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVC697_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVC697_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVC697_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVC697_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVC697_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVC697_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVC697_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVC697_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVC697_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVC697_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVC697_SET_ZCULL_SUBREGION 0x02e8 +#define NVC697_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVC697_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVC697_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVC697_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVC697_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVC697_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVC697_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVC697_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVC697_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVC697_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVC697_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVC697_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVC697_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVC697_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVC697_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVC697_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVC697_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVC697_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVC697_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVC697_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVC697_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVC697_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVC697_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVC697_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVC697_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC697_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVC697_DRAW_ZERO_INDEX 0x0304 +#define NVC697_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVC697_SET_L1_CONFIGURATION 0x0308 +#define NVC697_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVC697_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVC697_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVC697_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVC697_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVC697_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVC697_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVC697_SET_SPA_VERSION 0x0310 +#define NVC697_SET_SPA_VERSION_MINOR 7:0 +#define NVC697_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC697_SET_TIMESLICE_BATCH_LIMIT 0x0314 +#define NVC697_SET_TIMESLICE_BATCH_LIMIT_BATCH_LIMIT 15:0 + +#define NVC697_SET_SNAP_GRID_LINE 0x0318 +#define NVC697_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC697_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC697_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC697_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC697_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC697_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC697_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC697_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC697_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC697_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVC697_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC697_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC697_SET_SNAP_GRID_NON_LINE 0x031c +#define NVC697_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC697_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC697_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC697_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC697_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC697_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC697_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC697_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC697_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC697_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVC697_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC697_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC697_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVC697_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVC697_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVC697_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVC697_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVC697_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVC697_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVC697_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVC697_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVC697_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVC697_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVC697_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVC697_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVC697_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVC697_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVC697_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVC697_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVC697_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVC697_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVC697_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVC697_SET_TESSELLATION_LOD_V1 0x0330 +#define NVC697_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVC697_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVC697_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVC697_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVC697_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVC697_RESERVED_TG07 0x033c +#define NVC697_RESERVED_TG07_V 0:0 + +#define NVC697_RESERVED_TG08 0x0340 +#define NVC697_RESERVED_TG08_V 0:0 + +#define NVC697_RESERVED_TG09 0x0344 +#define NVC697_RESERVED_TG09_V 0:0 + +#define NVC697_RESERVED_TG10 0x0348 +#define NVC697_RESERVED_TG10_V 0:0 + +#define NVC697_RESERVED_TG11 0x034c +#define NVC697_RESERVED_TG11_V 0:0 + +#define NVC697_RESERVED_TG12 0x0350 +#define NVC697_RESERVED_TG12_V 0:0 + +#define NVC697_RESERVED_TG13 0x0354 +#define NVC697_RESERVED_TG13_V 0:0 + +#define NVC697_RESERVED_TG14 0x0358 +#define NVC697_RESERVED_TG14_V 0:0 + +#define NVC697_RESERVED_TG15 0x035c +#define NVC697_RESERVED_TG15_V 0:0 + +#define NVC697_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVC697_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVC697_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVC697_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVC697_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVC697_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVC697_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVC697_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVC697_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVC697_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVC697_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVC697_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVC697_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVC697_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVC697_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVC697_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVC697_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVC697_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVC697_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE 8:8 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE 9:9 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC697_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVC697_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVC697_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVC697_SET_RASTER_ENABLE 0x037c +#define NVC697_SET_RASTER_ENABLE_V 0:0 +#define NVC697_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVC697_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVC697_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVC697_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVC697_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVC697_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVC697_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVC697_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVC697_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVC697_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVC697_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVC697_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVC697_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVC697_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVC697_SET_POSITION_W_SCALED_OFFSET_SCALE_A(j) (0x0400+(j)*16) +#define NVC697_SET_POSITION_W_SCALED_OFFSET_SCALE_A_V 31:0 + +#define NVC697_SET_POSITION_W_SCALED_OFFSET_SCALE_B(j) (0x0404+(j)*16) +#define NVC697_SET_POSITION_W_SCALED_OFFSET_SCALE_B_V 31:0 + +#define NVC697_SET_POSITION_W_SCALED_OFFSET_RESERVED_A(j) (0x0408+(j)*16) +#define NVC697_SET_POSITION_W_SCALED_OFFSET_RESERVED_A_V 31:0 + +#define NVC697_SET_POSITION_W_SCALED_OFFSET_RESERVED_B(j) (0x040c+(j)*16) +#define NVC697_SET_POSITION_W_SCALED_OFFSET_RESERVED_B_V 31:0 + +#define NVC697_SET_ROOT_TABLE_SELECTOR 0x0504 +#define NVC697_SET_ROOT_TABLE_SELECTOR_ROOT_TABLE 2:0 +#define NVC697_SET_ROOT_TABLE_SELECTOR_OFFSET 15:8 + +#define NVC697_LOAD_ROOT_TABLE 0x0508 +#define NVC697_LOAD_ROOT_TABLE_V 31:0 + +#define NVC697_SET_MME_MEM_ADDRESS_A 0x0550 +#define NVC697_SET_MME_MEM_ADDRESS_A_UPPER 7:0 + +#define NVC697_SET_MME_MEM_ADDRESS_B 0x0554 +#define NVC697_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NVC697_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NVC697_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NVC697_MME_DMA_READ 0x055c +#define NVC697_MME_DMA_READ_LENGTH 31:0 + +#define NVC697_MME_DMA_READ_FIFOED 0x0560 +#define NVC697_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NVC697_MME_DMA_WRITE 0x0564 +#define NVC697_MME_DMA_WRITE_LENGTH 31:0 + +#define NVC697_MME_DMA_REDUCTION 0x0568 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NVC697_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NVC697_MME_DMA_SYSMEMBAR 0x056c +#define NVC697_MME_DMA_SYSMEMBAR_V 0:0 + +#define NVC697_MME_DMA_SYNC 0x0570 +#define NVC697_MME_DMA_SYNC_VALUE 31:0 + +#define NVC697_SET_MME_DATA_FIFO_CONFIG 0x0574 +#define NVC697_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 +#define NVC697_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 +#define NVC697_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 +#define NVC697_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 +#define NVC697_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 +#define NVC697_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 + +#define NVC697_SET_VERTEX_STREAM_SIZE_A(j) (0x0600+(j)*8) +#define NVC697_SET_VERTEX_STREAM_SIZE_A_UPPER 7:0 + +#define NVC697_SET_VERTEX_STREAM_SIZE_B(j) (0x0604+(j)*8) +#define NVC697_SET_VERTEX_STREAM_SIZE_B_LOWER 31:0 + +#define NVC697_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVC697_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVC697_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVC697_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVC697_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVC697_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVC697_SET_RASTER_INPUT 0x0740 +#define NVC697_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVC697_SET_STREAM_OUTPUT 0x0744 +#define NVC697_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVC697_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVC697_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVC697_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVC697_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVC697_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVC697_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVC697_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 +#define NVC697_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES_EXTENDED 5:5 + +#define NVC697_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVC697_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC697_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC697_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVC697_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC697_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC697_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVC697_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVC697_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVC697_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVC697_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVC697_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVC697_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVC697_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC697_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVC697_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC697_SET_STENCIL_ZERO_BANDWIDTH_CLEAR 0x07b0 +#define NVC697_SET_STENCIL_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC697_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVC697_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVC697_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVC697_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVC697_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVC697_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVC697_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVC697_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVC697_SET_CULL_BEFORE_FETCH 0x07dc +#define NVC697_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVC697_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVC697_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVC697_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVC697_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVC697_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVC697_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVC697_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVC697_SET_ZCULL_STORAGE_A 0x07e8 +#define NVC697_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVC697_SET_ZCULL_STORAGE_B 0x07ec +#define NVC697_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVC697_SET_ZCULL_STORAGE_C 0x07f0 +#define NVC697_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC697_SET_ZCULL_STORAGE_D 0x07f4 +#define NVC697_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC697_SET_ZT_READ_ONLY 0x07f8 +#define NVC697_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVC697_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVC697_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVC697_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVC697_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVC697_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVC697_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVC697_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVC697_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVC697_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVC697_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVC697_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVC697_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVC697_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVC697_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVC697_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVC697_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVC697_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVC697_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVC697_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVC697_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVC697_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVC697_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVC697_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVC697_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVC697_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC697_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVC697_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVC697_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC697_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC697_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVC697_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC697_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVC697_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVC697_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVC697_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVC697_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVC697_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVC697_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVC697_SET_COLOR_TARGET_RESERVED_A(j) (0x0824+(j)*64) +#define NVC697_SET_COLOR_TARGET_RESERVED_A_V 0:0 + +#define NVC697_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVC697_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVC697_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVC697_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVC697_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVC697_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVC697_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVC697_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVC697_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVC697_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVC697_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVC697_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE(j) (0x0a18+(j)*32) +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_X 2:0 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X 0x00000000 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X 0x00000001 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y 0x00000002 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y 0x00000003 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z 0x00000004 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z 0x00000005 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W 0x00000006 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W 0x00000007 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Y 6:4 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X 0x00000000 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X 0x00000001 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y 0x00000002 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y 0x00000003 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z 0x00000004 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z 0x00000005 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W 0x00000006 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W 0x00000007 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Z 10:8 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X 0x00000000 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X 0x00000001 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y 0x00000002 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y 0x00000003 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z 0x00000004 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z 0x00000005 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W 0x00000006 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W 0x00000007 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_W 14:12 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X 0x00000000 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X 0x00000001 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y 0x00000002 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y 0x00000003 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z 0x00000004 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z 0x00000005 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W 0x00000006 +#define NVC697_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W 0x00000007 + +#define NVC697_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(j) (0x0a1c+(j)*32) +#define NVC697_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_X_BITS 4:0 +#define NVC697_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_Y_BITS 12:8 + +#define NVC697_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVC697_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVC697_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC697_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVC697_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVC697_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC697_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVC697_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVC697_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVC697_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVC697_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVC697_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVC697_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVC697_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVC697_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVC697_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVC697_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVC697_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVC697_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVC697_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVC697_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVC697_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVC697_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVC697_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC697_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVC697_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVC697_SET_STATISTICS_COUNTER 0x0d68 +#define NVC697_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVC697_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVC697_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVC697_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVC697_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVC697_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVC697_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVC697_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVC697_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVC697_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVC697_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVC697_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVC697_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVC697_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVC697_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVC697_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVC697_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 +#define NVC697_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE 16:16 +#define NVC697_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVC697_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC697_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC697_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVC697_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC697_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC697_SET_VERTEX_ARRAY_START 0x0d74 +#define NVC697_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVC697_DRAW_VERTEX_ARRAY 0x0d78 +#define NVC697_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVC697_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVC697_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVC697_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVC697_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVC697_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVC697_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVC697_SET_Z_CLEAR_VALUE 0x0d90 +#define NVC697_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVC697_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC697_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC697_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC697_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC697_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVC697_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVC697_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVC697_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC697_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC697_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVC697_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVC697_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVC697_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVC697_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVC697_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVC697_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVC697_SET_FRONT_POLYGON_MODE 0x0dac +#define NVC697_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVC697_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC697_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC697_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC697_SET_BACK_POLYGON_MODE 0x0db0 +#define NVC697_SET_BACK_POLYGON_MODE_V 31:0 +#define NVC697_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC697_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC697_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC697_SET_POLY_SMOOTH 0x0db4 +#define NVC697_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVC697_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVC697_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVC697_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVC697_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVC697_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVC697_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVC697_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVC697_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVC697_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVC697_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVC697_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVC697_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVC697_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVC697_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVC697_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVC697_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVC697_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVC697_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_PATCH 0x0dcc +#define NVC697_SET_PATCH_SIZE 7:0 + +#define NVC697_SET_ITERATED_BLEND 0x0dd0 +#define NVC697_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVC697_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVC697_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVC697_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVC697_SET_ZCULL_CRITERION 0x0dd8 +#define NVC697_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVC697_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVC697_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVC697_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVC697_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVC697_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVC697_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVC697_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVC697_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVC697_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVC697_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVC697_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVC697_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVC697_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVC697_SET_ZCULL_CRITERION_SREF 23:16 +#define NVC697_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVC697_PIXEL_SHADER_BARRIER 0x0de0 +#define NVC697_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVC697_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVC697_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC697_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC697_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVC697_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVC697_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVC697_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVC697_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVC697_SET_WINDOW_OFFSET_X 0x0df8 +#define NVC697_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVC697_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVC697_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVC697_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVC697_SET_SCISSOR_ENABLE_V 0:0 +#define NVC697_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVC697_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVC697_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVC697_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVC697_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVC697_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVC697_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVC697_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVC697_SET_VPC_PERF_KNOB 0x0f14 +#define NVC697_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVC697_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVC697_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVC697_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVC697_PM_LOCAL_TRIGGER 0x0f18 +#define NVC697_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVC697_SET_POST_Z_PS_IMASK 0x0f1c +#define NVC697_SET_POST_Z_PS_IMASK_ENABLE 0:0 +#define NVC697_SET_POST_Z_PS_IMASK_ENABLE_FALSE 0x00000000 +#define NVC697_SET_POST_Z_PS_IMASK_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVC697_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVC697_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVC697_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVC697_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVC697_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVC697_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVC697_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVC697_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVC697_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVC697_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVC697_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVC697_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVC697_SET_BACK_STENCIL_MASK 0x0f58 +#define NVC697_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVC697_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVC697_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVC697_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVC697_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVC697_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVC697_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVC697_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVC697_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVC697_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVC697_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVC697_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVC697_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVC697_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC697_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVC697_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVC697_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVC697_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVC697_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVC697_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVC697_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVC697_SET_SAMPLE_MASK 0x0fa4 +#define NVC697_SET_SAMPLE_MASK_RASTER_OUT_ENABLE 0:0 +#define NVC697_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE 0x00000001 +#define NVC697_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE 4:4 +#define NVC697_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE 0x00000000 +#define NVC697_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_COLOR_TARGET_SAMPLE_MASK 0x0fa8 +#define NVC697_SET_COLOR_TARGET_SAMPLE_MASK_V 15:0 + +#define NVC697_SET_CT_MRT_ENABLE 0x0fac +#define NVC697_SET_CT_MRT_ENABLE_V 0:0 +#define NVC697_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVC697_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVC697_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVC697_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVC697_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVC697_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVC697_SET_TIR 0x0fb4 +#define NVC697_SET_TIR_MODE 1:0 +#define NVC697_SET_TIR_MODE_DISABLED 0x00000000 +#define NVC697_SET_TIR_MODE_RASTER_N_TARGET_M 0x00000001 + +#define NVC697_SET_ANTI_ALIAS_RASTER 0x0fb8 +#define NVC697_SET_ANTI_ALIAS_RASTER_SAMPLES 2:0 +#define NVC697_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1 0x00000000 +#define NVC697_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2 0x00000002 +#define NVC697_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC697_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC697_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4 0x00000006 + +#define NVC697_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVC697_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVC697_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVC697_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVC697_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVC697_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVC697_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVC697_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVC697_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVC697_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVC697_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_TIR_MODULATION 0x0fd4 +#define NVC697_SET_TIR_MODULATION_COMPONENT_SELECT 1:0 +#define NVC697_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION 0x00000000 +#define NVC697_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB 0x00000001 +#define NVC697_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY 0x00000002 +#define NVC697_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA 0x00000003 + +#define NVC697_SET_TIR_MODULATION_FUNCTION 0x0fd8 +#define NVC697_SET_TIR_MODULATION_FUNCTION_SELECT 0:0 +#define NVC697_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR 0x00000000 +#define NVC697_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE 0x00000001 + +#define NVC697_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVC697_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVC697_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVC697_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVC697_SET_ZT_A 0x0fe0 +#define NVC697_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_ZT_B 0x0fe4 +#define NVC697_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_ZT_FORMAT 0x0fe8 +#define NVC697_SET_ZT_FORMAT_V 4:0 +#define NVC697_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVC697_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVC697_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVC697_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVC697_SET_ZT_FORMAT_V_S8 0x00000017 +#define NVC697_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVC697_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVC697_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVC697_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVC697_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVC697_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVC697_SET_ZT_BLOCK_SIZE 0x0fec +#define NVC697_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVC697_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC697_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVC697_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC697_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC697_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC697_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC697_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC697_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC697_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVC697_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC697_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVC697_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVC697_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVC697_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVC697_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC697_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVC697_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVC697_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC697_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC697_SET_VIEWPORT_MULTICAST 0x1004 +#define NVC697_SET_VIEWPORT_MULTICAST_ORDER 0:0 +#define NVC697_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER 0x00000000 +#define NVC697_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER 0x00000001 + +#define NVC697_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVC697_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVC697_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVC697_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC697_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVC697_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVC697_SET_RESERVED_SW_METHOD00 0x1014 +#define NVC697_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC697_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVC697_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC697_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVC697_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC697_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVC697_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC697_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVC697_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC697_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_RESERVED_SW_METHOD01 0x1028 +#define NVC697_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD02 0x102c +#define NVC697_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC697_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) (0x1030+(i)*4) +#define NVC697_SET_TIR_MODULATION_COEFFICIENT_TABLE_V0 7:0 +#define NVC697_SET_TIR_MODULATION_COEFFICIENT_TABLE_V1 15:8 +#define NVC697_SET_TIR_MODULATION_COEFFICIENT_TABLE_V2 23:16 +#define NVC697_SET_TIR_MODULATION_COEFFICIENT_TABLE_V3 31:24 + +#define NVC697_SET_SPARE_NOOP01 0x1044 +#define NVC697_SET_SPARE_NOOP01_V 31:0 + +#define NVC697_SET_SPARE_NOOP02 0x1048 +#define NVC697_SET_SPARE_NOOP02_V 31:0 + +#define NVC697_SET_SPARE_NOOP03 0x104c +#define NVC697_SET_SPARE_NOOP03_V 31:0 + +#define NVC697_SET_SPARE_NOOP04 0x1050 +#define NVC697_SET_SPARE_NOOP04_V 31:0 + +#define NVC697_SET_SPARE_NOOP05 0x1054 +#define NVC697_SET_SPARE_NOOP05_V 31:0 + +#define NVC697_SET_SPARE_NOOP06 0x1058 +#define NVC697_SET_SPARE_NOOP06_V 31:0 + +#define NVC697_SET_SPARE_NOOP07 0x105c +#define NVC697_SET_SPARE_NOOP07_V 31:0 + +#define NVC697_SET_SPARE_NOOP08 0x1060 +#define NVC697_SET_SPARE_NOOP08_V 31:0 + +#define NVC697_SET_SPARE_NOOP09 0x1064 +#define NVC697_SET_SPARE_NOOP09_V 31:0 + +#define NVC697_SET_SPARE_NOOP10 0x1068 +#define NVC697_SET_SPARE_NOOP10_V 31:0 + +#define NVC697_SET_SPARE_NOOP11 0x106c +#define NVC697_SET_SPARE_NOOP11_V 31:0 + +#define NVC697_SET_SPARE_NOOP12 0x1070 +#define NVC697_SET_SPARE_NOOP12_V 31:0 + +#define NVC697_SET_SPARE_NOOP13 0x1074 +#define NVC697_SET_SPARE_NOOP13_V 31:0 + +#define NVC697_SET_SPARE_NOOP14 0x1078 +#define NVC697_SET_SPARE_NOOP14_V 31:0 + +#define NVC697_SET_SPARE_NOOP15 0x107c +#define NVC697_SET_SPARE_NOOP15_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVC697_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVC697_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVC697_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD06 0x10bc +#define NVC697_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVC697_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVC697_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVC697_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVC697_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVC697_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVC697_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVC697_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD13 0x10dc +#define NVC697_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC697_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVC697_UNBIND_ALL 0x10f4 +#define NVC697_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVC697_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVC697_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVC697_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVC697_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC697_SET_RESERVED_SW_METHOD14 0x1100 +#define NVC697_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC697_SET_RESERVED_SW_METHOD15 0x1104 +#define NVC697_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC697_NO_OPERATION_DATA_HI 0x110c +#define NVC697_NO_OPERATION_DATA_HI_V 31:0 + +#define NVC697_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVC697_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVC697_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVC697_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVC697_PM_TRIGGER_END 0x1114 +#define NVC697_PM_TRIGGER_END_V 31:0 + +#define NVC697_SET_VERTEX_ID_BASE 0x1118 +#define NVC697_SET_VERTEX_ID_BASE_V 31:0 + +#define NVC697_SET_STENCIL_COMPRESSION 0x111c +#define NVC697_SET_STENCIL_COMPRESSION_ENABLE 0:0 +#define NVC697_SET_STENCIL_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STENCIL_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC697_SET_TIR_CONTROL 0x1130 +#define NVC697_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES 0:0 +#define NVC697_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC697_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC697_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES 4:4 +#define NVC697_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC697_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC697_SET_TIR_CONTROL_REDUCE_COVERAGE 1:1 +#define NVC697_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE 0x00000000 +#define NVC697_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE 0x00000001 + +#define NVC697_SET_MUTABLE_METHOD_CONTROL 0x1134 +#define NVC697_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT 0:0 +#define NVC697_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE 0x00000000 +#define NVC697_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE 0x00000001 + +#define NVC697_SET_POST_PS_INITIAL_COVERAGE 0x1138 +#define NVC697_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE 0:0 +#define NVC697_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE 0x00000000 +#define NVC697_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE 0x00000001 + +#define NVC697_SET_FILL_VIA_TRIANGLE 0x113c +#define NVC697_SET_FILL_VIA_TRIANGLE_MODE 1:0 +#define NVC697_SET_FILL_VIA_TRIANGLE_MODE_DISABLED 0x00000000 +#define NVC697_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL 0x00000001 +#define NVC697_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX 0x00000002 + +#define NVC697_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVC697_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVC697_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVC697_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVC697_FLUSH_PENDING_WRITES 0x1144 +#define NVC697_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVC697_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVC697_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC697_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC697_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC697_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVC697_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC697_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC697_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC697_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) (0x11e0+(i)*4) +#define NVC697_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X0 3:0 +#define NVC697_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y0 7:4 +#define NVC697_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X1 11:8 +#define NVC697_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y1 15:12 +#define NVC697_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X2 19:16 +#define NVC697_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y2 23:20 +#define NVC697_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X3 27:24 +#define NVC697_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y3 31:28 + +#define NVC697_SET_OFFSET_RENDER_TARGET_INDEX 0x11f0 +#define NVC697_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX 0:0 +#define NVC697_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE 0x00000000 +#define NVC697_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE 0x00000001 + +#define NVC697_FORCE_HEAVYWEIGHT_METHOD_SYNC 0x11f4 +#define NVC697_FORCE_HEAVYWEIGHT_METHOD_SYNC_V 31:0 + +#define NVC697_SET_COVERAGE_TO_COLOR 0x11f8 +#define NVC697_SET_COVERAGE_TO_COLOR_ENABLE 0:0 +#define NVC697_SET_COVERAGE_TO_COLOR_ENABLE_FALSE 0x00000000 +#define NVC697_SET_COVERAGE_TO_COLOR_ENABLE_TRUE 0x00000001 +#define NVC697_SET_COVERAGE_TO_COLOR_CT_SELECT 6:4 + +#define NVC697_DECOMPRESS_ZETA_SURFACE 0x11fc +#define NVC697_DECOMPRESS_ZETA_SURFACE_Z_ENABLE 0:0 +#define NVC697_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC697_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC697_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE 4:4 +#define NVC697_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC697_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_SCREEN_STATE_MASK 0x1204 +#define NVC697_SET_SCREEN_STATE_MASK_MASK 3:0 + +#define NVC697_SET_ZT_SPARSE 0x1208 +#define NVC697_SET_ZT_SPARSE_ENABLE 0:0 +#define NVC697_SET_ZT_SPARSE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZT_SPARSE_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ZT_SPARSE_UNMAPPED_COMPARE 1:1 +#define NVC697_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 0x00000000 +#define NVC697_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS 0x00000001 + +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC697_SET_CT_SELECT 0x121c +#define NVC697_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVC697_SET_CT_SELECT_TARGET0 6:4 +#define NVC697_SET_CT_SELECT_TARGET1 9:7 +#define NVC697_SET_CT_SELECT_TARGET2 12:10 +#define NVC697_SET_CT_SELECT_TARGET3 15:13 +#define NVC697_SET_CT_SELECT_TARGET4 18:16 +#define NVC697_SET_CT_SELECT_TARGET5 21:19 +#define NVC697_SET_CT_SELECT_TARGET6 24:22 +#define NVC697_SET_CT_SELECT_TARGET7 27:25 + +#define NVC697_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVC697_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL 0x1224 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE 1:0 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT 0x00000000 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE 0x00000001 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL 0x00000002 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE 2:2 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 0x00000000 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 0x00000001 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER 3:3 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED 0x00000000 +#define NVC697_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED 0x00000001 + +#define NVC697_SET_ZT_SIZE_A 0x1228 +#define NVC697_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVC697_SET_ZT_SIZE_B 0x122c +#define NVC697_SET_ZT_SIZE_B_HEIGHT 17:0 + +#define NVC697_SET_ZT_SIZE_C 0x1230 +#define NVC697_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVC697_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVC697_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC697_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVC697_SET_SAMPLER_BINDING 0x1234 +#define NVC697_SET_SAMPLER_BINDING_V 0:0 +#define NVC697_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVC697_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVC697_DRAW_AUTO 0x123c +#define NVC697_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVC697_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) (0x1240+(i)*4) +#define NVC697_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK_V 31:0 + +#define NVC697_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE 0x1260 +#define NVC697_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_INDEX 7:0 +#define NVC697_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_VALUE 23:8 + +#define NVC697_SET_BACK_END_COPY_A 0x1264 +#define NVC697_SET_BACK_END_COPY_A_DWORDS 7:0 +#define NVC697_SET_BACK_END_COPY_A_SATURATE32_ENABLE 8:8 +#define NVC697_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE 0x00000000 +#define NVC697_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE 0x00000001 +#define NVC697_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE 12:12 +#define NVC697_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE 0x00000000 +#define NVC697_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_BACK_END_COPY_B 0x1268 +#define NVC697_SET_BACK_END_COPY_B_SRC_ADDRESS_UPPER 7:0 + +#define NVC697_SET_BACK_END_COPY_C 0x126c +#define NVC697_SET_BACK_END_COPY_C_SRC_ADDRESS_LOWER 31:0 + +#define NVC697_SET_BACK_END_COPY_D 0x1270 +#define NVC697_SET_BACK_END_COPY_D_DEST_ADDRESS_UPPER 7:0 + +#define NVC697_SET_BACK_END_COPY_E 0x1274 +#define NVC697_SET_BACK_END_COPY_E_DEST_ADDRESS_LOWER 31:0 + +#define NVC697_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVC697_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 19:0 + +#define NVC697_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVC697_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVC697_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC697_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVC697_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVC697_CLEAR_ZCULL_REGION 0x12c8 +#define NVC697_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVC697_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVC697_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVC697_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVC697_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC697_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC697_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVC697_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC697_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC697_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVC697_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVC697_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVC697_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVC697_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVC697_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVC697_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVC697_SET_DEPTH_TEST 0x12cc +#define NVC697_SET_DEPTH_TEST_ENABLE 0:0 +#define NVC697_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVC697_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_FILL_MODE 0x12d0 +#define NVC697_SET_FILL_MODE_V 31:0 +#define NVC697_SET_FILL_MODE_V_POINT 0x00000001 +#define NVC697_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVC697_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVC697_SET_SHADE_MODE 0x12d4 +#define NVC697_SET_SHADE_MODE_V 31:0 +#define NVC697_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVC697_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVC697_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVC697_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC697_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC697_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVC697_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVC697_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVC697_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVC697_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVC697_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVC697_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVC697_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVC697_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_DEPTH_WRITE 0x12e8 +#define NVC697_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVC697_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_ALPHA_TEST 0x12ec +#define NVC697_SET_ALPHA_TEST_ENABLE 0:0 +#define NVC697_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVC697_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVC697_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVC697_DRAW_INLINE_INDEX4X8 0x1304 +#define NVC697_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVC697_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVC697_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVC697_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVC697_D3D_SET_CULL_MODE 0x1308 +#define NVC697_D3D_SET_CULL_MODE_V 31:0 +#define NVC697_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVC697_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVC697_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVC697_SET_DEPTH_FUNC 0x130c +#define NVC697_SET_DEPTH_FUNC_V 31:0 +#define NVC697_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVC697_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVC697_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC697_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC697_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVC697_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC697_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC697_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC697_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVC697_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVC697_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC697_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC697_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVC697_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC697_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC697_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC697_SET_ALPHA_REF 0x1310 +#define NVC697_SET_ALPHA_REF_V 31:0 + +#define NVC697_SET_ALPHA_FUNC 0x1314 +#define NVC697_SET_ALPHA_FUNC_V 31:0 +#define NVC697_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVC697_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVC697_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC697_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC697_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVC697_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC697_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC697_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC697_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVC697_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVC697_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC697_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC697_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVC697_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC697_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC697_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC697_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVC697_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVC697_SET_BLEND_CONST_RED 0x131c +#define NVC697_SET_BLEND_CONST_RED_V 31:0 + +#define NVC697_SET_BLEND_CONST_GREEN 0x1320 +#define NVC697_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVC697_SET_BLEND_CONST_BLUE 0x1324 +#define NVC697_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVC697_SET_BLEND_CONST_ALPHA 0x1328 +#define NVC697_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVC697_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC697_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC697_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC697_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC697_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC697_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC697_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVC697_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC697_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC697_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_BLEND_COLOR_OP 0x1340 +#define NVC697_SET_BLEND_COLOR_OP_V 31:0 +#define NVC697_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC697_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC697_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC697_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC697_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC697_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC697_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC697_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC697_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC697_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC697_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC697_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC697_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC697_SET_BLEND_ALPHA_OP 0x134c +#define NVC697_SET_BLEND_ALPHA_OP_V 31:0 +#define NVC697_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC697_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC697_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC697_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC697_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC697_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC697_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC697_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC697_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC697_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC697_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC697_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVC697_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVC697_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVC697_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC697_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC697_SET_SINGLE_ROP_CONTROL 0x135c +#define NVC697_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVC697_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC697_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_BLEND(i) (0x1360+(i)*4) +#define NVC697_SET_BLEND_ENABLE 0:0 +#define NVC697_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVC697_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_STENCIL_TEST 0x1380 +#define NVC697_SET_STENCIL_TEST_ENABLE 0:0 +#define NVC697_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC697_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_STENCIL_OP_FAIL 0x1384 +#define NVC697_SET_STENCIL_OP_FAIL_V 31:0 +#define NVC697_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC697_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC697_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC697_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC697_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC697_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC697_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC697_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC697_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC697_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC697_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC697_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC697_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC697_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC697_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC697_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC697_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVC697_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC697_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC697_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC697_SET_STENCIL_OP_ZPASS 0x138c +#define NVC697_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVC697_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC697_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC697_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC697_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC697_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC697_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC697_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC697_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC697_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC697_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC697_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC697_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC697_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC697_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC697_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC697_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC697_SET_STENCIL_FUNC 0x1390 +#define NVC697_SET_STENCIL_FUNC_V 31:0 +#define NVC697_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC697_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC697_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC697_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC697_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC697_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC697_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC697_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC697_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC697_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC697_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC697_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC697_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC697_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC697_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC697_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC697_SET_STENCIL_FUNC_REF 0x1394 +#define NVC697_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVC697_SET_STENCIL_FUNC_MASK 0x1398 +#define NVC697_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVC697_SET_STENCIL_MASK 0x139c +#define NVC697_SET_STENCIL_MASK_V 7:0 + +#define NVC697_SET_DRAW_AUTO_START 0x13a4 +#define NVC697_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVC697_SET_PS_SATURATE 0x13a8 +#define NVC697_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVC697_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVC697_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC697_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVC697_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVC697_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC697_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVC697_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVC697_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC697_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVC697_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVC697_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC697_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVC697_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVC697_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC697_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVC697_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVC697_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC697_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVC697_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVC697_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC697_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVC697_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVC697_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC697_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVC697_SET_WINDOW_ORIGIN 0x13ac +#define NVC697_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVC697_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVC697_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVC697_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVC697_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVC697_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVC697_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVC697_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC697_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVC697_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC697_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVC697_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVC697_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVC697_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC697_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC697_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC697_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC697_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC697_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC697_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVC697_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVC697_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVC697_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVC697_SET_PS_WARP_WATERMARKS 0x1450 +#define NVC697_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVC697_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVC697_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVC697_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVC697_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC697_STORE_ZCULL 0x1464 +#define NVC697_STORE_ZCULL_V 0:0 + +#define NVC697_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVC697_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVC697_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVC697_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVC697_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVC697_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVC697_LOAD_ZCULL 0x1500 +#define NVC697_LOAD_ZCULL_V 0:0 + +#define NVC697_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVC697_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVC697_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVC697_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC697_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC697_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVC697_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC697_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC697_SET_USER_CLIP_ENABLE 0x1510 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVC697_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVC697_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVC697_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVC697_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_POINT_SIZE 0x1518 +#define NVC697_SET_POINT_SIZE_V 31:0 + +#define NVC697_SET_ZCULL_STATS 0x151c +#define NVC697_SET_ZCULL_STATS_ENABLE 0:0 +#define NVC697_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_POINT_SPRITE 0x1520 +#define NVC697_SET_POINT_SPRITE_ENABLE 0:0 +#define NVC697_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC697_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC697_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC697_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC697_CLEAR_REPORT_VALUE 0x1530 +#define NVC697_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVC697_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVC697_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVC697_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVC697_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVC697_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVC697_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC697_CLEAR_REPORT_VALUE_TYPE_SCG_CLOCKS 0x00000009 + +#define NVC697_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVC697_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVC697_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVC697_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVC697_SET_ZT_SELECT 0x1538 +#define NVC697_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVC697_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVC697_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVC697_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVC697_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVC697_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVC697_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVC697_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVC697_SET_RENDER_ENABLE_A 0x1550 +#define NVC697_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_RENDER_ENABLE_B 0x1554 +#define NVC697_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_RENDER_ENABLE_C 0x1558 +#define NVC697_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC697_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC697_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC697_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC697_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC697_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC697_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC697_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC697_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC697_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC697_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVC697_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVC697_SET_ANTI_ALIASED_LINE 0x1570 +#define NVC697_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVC697_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC697_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC697_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_TEX_HEADER_POOL_C 0x157c +#define NVC697_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC697_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVC697_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVC697_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVC697_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVC697_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC697_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC697_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC697_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC697_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC697_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC697_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVC697_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVC697_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC697_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC697_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC697_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC697_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC697_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC697_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC697_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC697_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC697_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC697_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC697_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC697_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC697_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC697_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC697_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC697_SET_SRGB_WRITE 0x15b8 +#define NVC697_SET_SRGB_WRITE_ENABLE 0:0 +#define NVC697_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_DEPTH_BIAS 0x15bc +#define NVC697_SET_DEPTH_BIAS_V 31:0 + +#define NVC697_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVC697_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVC697_SET_RT_LAYER 0x15cc +#define NVC697_SET_RT_LAYER_V 15:0 +#define NVC697_SET_RT_LAYER_CONTROL 16:16 +#define NVC697_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVC697_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVC697_SET_ANTI_ALIAS 0x15d0 +#define NVC697_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVC697_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVC697_SET_EDGE_FLAG 0x15e4 +#define NVC697_SET_EDGE_FLAG_V 0:0 +#define NVC697_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVC697_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVC697_DRAW_INLINE_INDEX 0x15e8 +#define NVC697_DRAW_INLINE_INDEX_V 31:0 + +#define NVC697_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVC697_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVC697_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVC697_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVC697_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVC697_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVC697_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVC697_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVC697_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVC697_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVC697_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVC697_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVC697_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVC697_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVC697_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVC697_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVC697_SET_POINT_SPRITE_SELECT 0x1604 +#define NVC697_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVC697_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVC697_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVC697_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVC697_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVC697_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVC697_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVC697_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVC697_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVC697_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVC697_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVC697_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVC697_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVC697_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVC697_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVC697_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVC697_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVC697_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVC697_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVC697_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVC697_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVC697_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVC697_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVC697_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVC697_END 0x1614 +#define NVC697_END_V 0:0 + +#define NVC697_BEGIN 0x1618 +#define NVC697_BEGIN_OP 15:0 +#define NVC697_BEGIN_OP_POINTS 0x00000000 +#define NVC697_BEGIN_OP_LINES 0x00000001 +#define NVC697_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVC697_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVC697_BEGIN_OP_TRIANGLES 0x00000004 +#define NVC697_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVC697_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVC697_BEGIN_OP_QUADS 0x00000007 +#define NVC697_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVC697_BEGIN_OP_POLYGON 0x00000009 +#define NVC697_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVC697_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVC697_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_BEGIN_OP_PATCH 0x0000000E +#define NVC697_BEGIN_PRIMITIVE_ID 24:24 +#define NVC697_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC697_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC697_BEGIN_INSTANCE_ID 27:26 +#define NVC697_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVC697_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC697_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC697_BEGIN_SPLIT_MODE 30:29 +#define NVC697_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC697_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC697_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC697_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC697_BEGIN_INSTANCE_ITERATE_ENABLE 31:31 +#define NVC697_BEGIN_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC697_BEGIN_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_VERTEX_ID_COPY 0x161c +#define NVC697_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVC697_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVC697_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVC697_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVC697_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVC697_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVC697_LOAD_PRIMITIVE_ID 0x1624 +#define NVC697_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVC697_SET_SHADER_BASED_CULL 0x162c +#define NVC697_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVC697_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVC697_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVC697_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVC697_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVC697_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_CLASS_VERSION 0x1638 +#define NVC697_SET_CLASS_VERSION_CURRENT 15:0 +#define NVC697_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC697_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVC697_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVC697_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVC697_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVC697_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVC697_SET_DA_OUTPUT 0x164c +#define NVC697_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVC697_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVC697_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVC697_SET_ANTI_ALIASED_POINT 0x1658 +#define NVC697_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVC697_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_POINT_CENTER_MODE 0x165c +#define NVC697_SET_POINT_CENTER_MODE_V 31:0 +#define NVC697_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVC697_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVC697_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVC697_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVC697_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVC697_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVC697_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVC697_SET_LINE_STIPPLE 0x166c +#define NVC697_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVC697_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVC697_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVC697_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVC697_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVC697_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVC697_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVC697_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVC697_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVC697_SET_PROVOKING_VERTEX 0x1684 +#define NVC697_SET_PROVOKING_VERTEX_V 0:0 +#define NVC697_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVC697_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVC697_SET_TWO_SIDED_LIGHT 0x1688 +#define NVC697_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVC697_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_POLYGON_STIPPLE 0x168c +#define NVC697_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVC697_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_SHADER_CONTROL 0x1690 +#define NVC697_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVC697_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVC697_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVC697_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVC697_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVC697_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVC697_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVC697_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVC697_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVC697_CHECK_CLASS_VERSION 0x16a0 +#define NVC697_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVC697_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC697_SET_SPH_VERSION 0x16a4 +#define NVC697_SET_SPH_VERSION_CURRENT 15:0 +#define NVC697_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC697_CHECK_SPH_VERSION 0x16a8 +#define NVC697_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVC697_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC697_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVC697_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVC697_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC697_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVC697_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVC697_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVC697_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVC697_SET_SCG_GRAPHICS_PRIORITY 0x16bc +#define NVC697_SET_SCG_GRAPHICS_PRIORITY_PRIORITY 5:0 + +#define NVC697_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS(i) (0x16c0+(i)*4) +#define NVC697_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS_V 31:0 + +#define NVC697_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVC697_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVC697_SET_AAM_VERSION 0x1790 +#define NVC697_SET_AAM_VERSION_CURRENT 15:0 +#define NVC697_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC697_CHECK_AAM_VERSION 0x1794 +#define NVC697_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVC697_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC697_SET_ZT_LAYER 0x179c +#define NVC697_SET_ZT_LAYER_OFFSET 15:0 + +#define NVC697_SET_INDEX_BUFFER_A 0x17c8 +#define NVC697_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVC697_SET_INDEX_BUFFER_B 0x17cc +#define NVC697_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVC697_SET_INDEX_BUFFER_E 0x17d8 +#define NVC697_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVC697_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVC697_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVC697_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVC697_SET_INDEX_BUFFER_F 0x17dc +#define NVC697_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVC697_DRAW_INDEX_BUFFER 0x17e0 +#define NVC697_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC697_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVC697_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVC697_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVC697_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVC697_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVC697_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVC697_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVC697_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVC697_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVC697_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVC697_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVC697_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVC697_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVC697_OGL_SET_CULL 0x1918 +#define NVC697_OGL_SET_CULL_ENABLE 0:0 +#define NVC697_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVC697_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVC697_OGL_SET_FRONT_FACE 0x191c +#define NVC697_OGL_SET_FRONT_FACE_V 31:0 +#define NVC697_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVC697_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVC697_OGL_SET_CULL_FACE 0x1920 +#define NVC697_OGL_SET_CULL_FACE_V 31:0 +#define NVC697_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVC697_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVC697_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVC697_SET_VIEWPORT_PIXEL 0x1924 +#define NVC697_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVC697_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVC697_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVC697_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVC697_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVC697_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVC697_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE 17:16 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_USE_FIELD_MIN_Z_ZERO_MAX_Z_ONE 0x00000000 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MIN_Z_MAX_Z 0x00000001 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_ZERO_ONE 0x00000002 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MINUS_INF_PLUS_INF 0x00000003 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP 0x00000006 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVC697_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVC697_SET_USER_CLIP_OP 0x1940 +#define NVC697_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVC697_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVC697_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVC697_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVC697_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVC697_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVC697_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVC697_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVC697_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVC697_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVC697_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVC697_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVC697_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVC697_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVC697_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVC697_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVC697_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVC697_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVC697_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVC697_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVC697_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVC697_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVC697_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVC697_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVC697_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC697_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC697_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC697_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC697_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC697_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVC697_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVC697_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVC697_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVC697_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVC697_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVC697_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVC697_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVC697_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVC697_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVC697_INVALIDATE_ZCULL 0x1958 +#define NVC697_INVALIDATE_ZCULL_V 31:0 +#define NVC697_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVC697_SET_ZCULL 0x1968 +#define NVC697_SET_ZCULL_Z_ENABLE 0:0 +#define NVC697_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVC697_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_ZCULL_BOUNDS 0x196c +#define NVC697_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVC697_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVC697_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVC697_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC697_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVC697_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVC697_ZCULL_SYNC 0x1978 +#define NVC697_ZCULL_SYNC_V 31:0 + +#define NVC697_SET_CLIP_ID_TEST 0x197c +#define NVC697_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVC697_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVC697_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVC697_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVC697_SET_CLIP_ID 0x1984 +#define NVC697_SET_CLIP_ID_V 31:0 + +#define NVC697_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVC697_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVC697_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVC697_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVC697_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVC697_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVC697_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVC697_SET_LOGIC_OP 0x19c4 +#define NVC697_SET_LOGIC_OP_ENABLE 0:0 +#define NVC697_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVC697_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_LOGIC_OP_FUNC 0x19c8 +#define NVC697_SET_LOGIC_OP_FUNC_V 31:0 +#define NVC697_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVC697_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVC697_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVC697_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVC697_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVC697_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVC697_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVC697_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVC697_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVC697_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVC697_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVC697_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVC697_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVC697_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVC697_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVC697_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVC697_SET_Z_COMPRESSION 0x19cc +#define NVC697_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVC697_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC697_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC697_CLEAR_SURFACE 0x19d0 +#define NVC697_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVC697_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC697_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC697_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVC697_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC697_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC697_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVC697_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVC697_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVC697_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVC697_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVC697_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVC697_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVC697_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVC697_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVC697_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVC697_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVC697_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVC697_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVC697_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVC697_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVC697_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVC697_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVC697_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVC697_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC697_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVC697_SET_CT_WRITE_R_ENABLE 0:0 +#define NVC697_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVC697_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVC697_SET_CT_WRITE_G_ENABLE 4:4 +#define NVC697_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVC697_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVC697_SET_CT_WRITE_B_ENABLE 8:8 +#define NVC697_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVC697_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVC697_SET_CT_WRITE_A_ENABLE 12:12 +#define NVC697_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVC697_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVC697_PIPE_NOP 0x1a2c +#define NVC697_PIPE_NOP_V 31:0 + +#define NVC697_SET_SPARE00 0x1a30 +#define NVC697_SET_SPARE00_V 31:0 + +#define NVC697_SET_SPARE01 0x1a34 +#define NVC697_SET_SPARE01_V 31:0 + +#define NVC697_SET_SPARE02 0x1a38 +#define NVC697_SET_SPARE02_V 31:0 + +#define NVC697_SET_SPARE03 0x1a3c +#define NVC697_SET_SPARE03_V 31:0 + +#define NVC697_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC697_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC697_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC697_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC697_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC697_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC697_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVC697_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC697_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVC697_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVC697_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVC697_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVC697_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVC697_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC697_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_SCG_CLOCKS 0x00000008 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVC697_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC697_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVC697_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVC697_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC697_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC697_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVC697_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVC697_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVC697_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVC697_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVC697_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVC697_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVC697_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVC697_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVC697_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVC697_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVC697_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVC697_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVC697_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC697_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVC697_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC697_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVC697_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC697_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVC697_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVC697_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVC697_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC697_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC697_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC697_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC697_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC697_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVC697_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVC697_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVC697_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVC697_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVC697_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVC697_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVC697_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVC697_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVC697_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVC697_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVC697_SET_PIPELINE_RESERVED_B(j) (0x2004+(j)*64) +#define NVC697_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVC697_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVC697_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVC697_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVC697_SET_PIPELINE_REGISTER_COUNT_V 8:0 + +#define NVC697_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVC697_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVC697_SET_PIPELINE_PROGRAM_ADDRESS_A(j) (0x2014+(j)*64) +#define NVC697_SET_PIPELINE_PROGRAM_ADDRESS_A_UPPER 7:0 + +#define NVC697_SET_PIPELINE_PROGRAM_ADDRESS_B(j) (0x2018+(j)*64) +#define NVC697_SET_PIPELINE_PROGRAM_ADDRESS_B_LOWER 31:0 + +#define NVC697_SET_PIPELINE_RESERVED_D(j) (0x201c+(j)*64) +#define NVC697_SET_PIPELINE_RESERVED_D_V 0:0 + +#define NVC697_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVC697_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVC697_SET_FALCON00 0x2300 +#define NVC697_SET_FALCON00_V 31:0 + +#define NVC697_SET_FALCON01 0x2304 +#define NVC697_SET_FALCON01_V 31:0 + +#define NVC697_SET_FALCON02 0x2308 +#define NVC697_SET_FALCON02_V 31:0 + +#define NVC697_SET_FALCON03 0x230c +#define NVC697_SET_FALCON03_V 31:0 + +#define NVC697_SET_FALCON04 0x2310 +#define NVC697_SET_FALCON04_V 31:0 + +#define NVC697_SET_FALCON05 0x2314 +#define NVC697_SET_FALCON05_V 31:0 + +#define NVC697_SET_FALCON06 0x2318 +#define NVC697_SET_FALCON06_V 31:0 + +#define NVC697_SET_FALCON07 0x231c +#define NVC697_SET_FALCON07_V 31:0 + +#define NVC697_SET_FALCON08 0x2320 +#define NVC697_SET_FALCON08_V 31:0 + +#define NVC697_SET_FALCON09 0x2324 +#define NVC697_SET_FALCON09_V 31:0 + +#define NVC697_SET_FALCON10 0x2328 +#define NVC697_SET_FALCON10_V 31:0 + +#define NVC697_SET_FALCON11 0x232c +#define NVC697_SET_FALCON11_V 31:0 + +#define NVC697_SET_FALCON12 0x2330 +#define NVC697_SET_FALCON12_V 31:0 + +#define NVC697_SET_FALCON13 0x2334 +#define NVC697_SET_FALCON13_V 31:0 + +#define NVC697_SET_FALCON14 0x2338 +#define NVC697_SET_FALCON14_V 31:0 + +#define NVC697_SET_FALCON15 0x233c +#define NVC697_SET_FALCON15_V 31:0 + +#define NVC697_SET_FALCON16 0x2340 +#define NVC697_SET_FALCON16_V 31:0 + +#define NVC697_SET_FALCON17 0x2344 +#define NVC697_SET_FALCON17_V 31:0 + +#define NVC697_SET_FALCON18 0x2348 +#define NVC697_SET_FALCON18_V 31:0 + +#define NVC697_SET_FALCON19 0x234c +#define NVC697_SET_FALCON19_V 31:0 + +#define NVC697_SET_FALCON20 0x2350 +#define NVC697_SET_FALCON20_V 31:0 + +#define NVC697_SET_FALCON21 0x2354 +#define NVC697_SET_FALCON21_V 31:0 + +#define NVC697_SET_FALCON22 0x2358 +#define NVC697_SET_FALCON22_V 31:0 + +#define NVC697_SET_FALCON23 0x235c +#define NVC697_SET_FALCON23_V 31:0 + +#define NVC697_SET_FALCON24 0x2360 +#define NVC697_SET_FALCON24_V 31:0 + +#define NVC697_SET_FALCON25 0x2364 +#define NVC697_SET_FALCON25_V 31:0 + +#define NVC697_SET_FALCON26 0x2368 +#define NVC697_SET_FALCON26_V 31:0 + +#define NVC697_SET_FALCON27 0x236c +#define NVC697_SET_FALCON27_V 31:0 + +#define NVC697_SET_FALCON28 0x2370 +#define NVC697_SET_FALCON28_V 31:0 + +#define NVC697_SET_FALCON29 0x2374 +#define NVC697_SET_FALCON29_V 31:0 + +#define NVC697_SET_FALCON30 0x2378 +#define NVC697_SET_FALCON30_V 31:0 + +#define NVC697_SET_FALCON31 0x237c +#define NVC697_SET_FALCON31_V 31:0 + +#define NVC697_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVC697_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVC697_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVC697_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVC697_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVC697_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVC697_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVC697_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVC697_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVC697_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVC697_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVC697_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVC697_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVC697_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVC697_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVC697_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVC697_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVC697_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVC697_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVC697_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVC697_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVC697_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVC697_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVC697_SET_TRAP_HANDLER_A 0x25f8 +#define NVC697_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC697_SET_TRAP_HANDLER_B 0x25fc +#define NVC697_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC697_SET_COLOR_CLAMP 0x2600 +#define NVC697_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVC697_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVC697_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVC697_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVC697_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVC697_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVC697_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVC697_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVC697_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC697_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC697_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC697_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC697_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC697_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC697_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC697_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC697_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC697_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC697_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC697_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC697_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC697_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC697_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVC697_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVC697_CALL_MME_MACRO_V 31:0 + +#define NVC697_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVC697_CALL_MME_DATA_V 31:0 + +#endif /* _cl_ampere_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc6b0.h b/userspace/sdks/nv570/inc/class/clc6b0.h new file mode 100644 index 0000000..d36f053 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc6b0.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef clc6b0_h_ +#define clc6b0_h_ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC6B0_VIDEO_DECODER (0x0000C6B0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clc6b0_h + diff --git a/userspace/sdks/nv570/inc/class/clc6b5.h b/userspace/sdks/nv570/inc/class/clc6b5.h new file mode 100644 index 0000000..873ca74 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc6b5.h @@ -0,0 +1,282 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#include "nvtypes.h" + +#ifndef _clc6b5_h_ +#define _clc6b5_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define AMPERE_DMA_COPY_A (0x0000C6B5) + +#define NVC6B5_NOP (0x00000100) +#define NVC6B5_NOP_PARAMETER 31:0 +#define NVC6B5_PM_TRIGGER (0x00000140) +#define NVC6B5_PM_TRIGGER_V 31:0 +#define NVC6B5_SET_SEMAPHORE_A (0x00000240) +#define NVC6B5_SET_SEMAPHORE_A_UPPER 16:0 +#define NVC6B5_SET_SEMAPHORE_B (0x00000244) +#define NVC6B5_SET_SEMAPHORE_B_LOWER 31:0 +#define NVC6B5_SET_SEMAPHORE_PAYLOAD (0x00000248) +#define NVC6B5_SET_SEMAPHORE_PAYLOAD_PAYLOAD 31:0 +#define NVC6B5_SET_RENDER_ENABLE_A (0x00000254) +#define NVC6B5_SET_RENDER_ENABLE_A_UPPER 7:0 +#define NVC6B5_SET_RENDER_ENABLE_B (0x00000258) +#define NVC6B5_SET_RENDER_ENABLE_B_LOWER 31:0 +#define NVC6B5_SET_RENDER_ENABLE_C (0x0000025C) +#define NVC6B5_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC6B5_SET_RENDER_ENABLE_C_MODE_FALSE (0x00000000) +#define NVC6B5_SET_RENDER_ENABLE_C_MODE_TRUE (0x00000001) +#define NVC6B5_SET_RENDER_ENABLE_C_MODE_CONDITIONAL (0x00000002) +#define NVC6B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL (0x00000003) +#define NVC6B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL (0x00000004) +#define NVC6B5_SET_SRC_PHYS_MODE (0x00000260) +#define NVC6B5_SET_SRC_PHYS_MODE_TARGET 1:0 +#define NVC6B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC6B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC6B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC6B5_SET_SRC_PHYS_MODE_TARGET_PEERMEM (0x00000003) +#define NVC6B5_SET_SRC_PHYS_MODE_BASIC_KIND 5:2 +#define NVC6B5_SET_SRC_PHYS_MODE_PEER_ID 8:6 +#define NVC6B5_SET_SRC_PHYS_MODE_FLA 9:9 +#define NVC6B5_SET_DST_PHYS_MODE (0x00000264) +#define NVC6B5_SET_DST_PHYS_MODE_TARGET 1:0 +#define NVC6B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC6B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC6B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC6B5_SET_DST_PHYS_MODE_TARGET_PEERMEM (0x00000003) +#define NVC6B5_SET_DST_PHYS_MODE_BASIC_KIND 5:2 +#define NVC6B5_SET_DST_PHYS_MODE_PEER_ID 8:6 +#define NVC6B5_SET_DST_PHYS_MODE_FLA 9:9 +#define NVC6B5_LAUNCH_DMA (0x00000300) +#define NVC6B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVC6B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVC6B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVC6B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVC6B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 +#define NVC6B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) +#define NVC6B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) +#define NVC6B5_LAUNCH_DMA_FLUSH_TYPE 25:25 +#define NVC6B5_LAUNCH_DMA_FLUSH_TYPE_SYS (0x00000000) +#define NVC6B5_LAUNCH_DMA_FLUSH_TYPE_GL (0x00000001) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_TYPE_NONE (0x00000000) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_FOUR_WORD_SEMAPHORE (0x00000002) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_CONDITIONAL_INTR_SEMAPHORE (0x00000003) +#define NVC6B5_LAUNCH_DMA_INTERRUPT_TYPE 6:5 +#define NVC6B5_LAUNCH_DMA_INTERRUPT_TYPE_NONE (0x00000000) +#define NVC6B5_LAUNCH_DMA_INTERRUPT_TYPE_BLOCKING (0x00000001) +#define NVC6B5_LAUNCH_DMA_INTERRUPT_TYPE_NON_BLOCKING (0x00000002) +#define NVC6B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 +#define NVC6B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC6B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC6B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 +#define NVC6B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC6B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC6B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 +#define NVC6B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) +#define NVC6B5_LAUNCH_DMA_MULTI_LINE_ENABLE_TRUE (0x00000001) +#define NVC6B5_LAUNCH_DMA_REMAP_ENABLE 10:10 +#define NVC6B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) +#define NVC6B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) +#define NVC6B5_LAUNCH_DMA_FORCE_RMWDISABLE 11:11 +#define NVC6B5_LAUNCH_DMA_FORCE_RMWDISABLE_FALSE (0x00000000) +#define NVC6B5_LAUNCH_DMA_FORCE_RMWDISABLE_TRUE (0x00000001) +#define NVC6B5_LAUNCH_DMA_SRC_TYPE 12:12 +#define NVC6B5_LAUNCH_DMA_SRC_TYPE_VIRTUAL (0x00000000) +#define NVC6B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) +#define NVC6B5_LAUNCH_DMA_DST_TYPE 13:13 +#define NVC6B5_LAUNCH_DMA_DST_TYPE_VIRTUAL (0x00000000) +#define NVC6B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION 17:14 +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMIN (0x00000000) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMAX (0x00000001) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IXOR (0x00000002) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IAND (0x00000003) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IOR (0x00000004) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IADD (0x00000005) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INC (0x00000006) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_DEC (0x00000007) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FADD (0x0000000A) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN 18:18 +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_SIGNED (0x00000000) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_UNSIGNED (0x00000001) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE 19:19 +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_FALSE (0x00000000) +#define NVC6B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_TRUE (0x00000001) +#define NVC6B5_LAUNCH_DMA_VPRMODE 23:22 +#define NVC6B5_LAUNCH_DMA_VPRMODE_VPR_NONE (0x00000000) +#define NVC6B5_LAUNCH_DMA_VPRMODE_VPR_VID2VID (0x00000001) +#define NVC6B5_LAUNCH_DMA_RESERVED_START_OF_COPY 24:24 +#define NVC6B5_LAUNCH_DMA_DISABLE_PLC 26:26 +#define NVC6B5_LAUNCH_DMA_DISABLE_PLC_FALSE (0x00000000) +#define NVC6B5_LAUNCH_DMA_DISABLE_PLC_TRUE (0x00000001) +#define NVC6B5_LAUNCH_DMA_RESERVED_ERR_CODE 31:28 +#define NVC6B5_OFFSET_IN_UPPER (0x00000400) +#define NVC6B5_OFFSET_IN_UPPER_UPPER 16:0 +#define NVC6B5_OFFSET_IN_LOWER (0x00000404) +#define NVC6B5_OFFSET_IN_LOWER_VALUE 31:0 +#define NVC6B5_OFFSET_OUT_UPPER (0x00000408) +#define NVC6B5_OFFSET_OUT_UPPER_UPPER 16:0 +#define NVC6B5_OFFSET_OUT_LOWER (0x0000040C) +#define NVC6B5_OFFSET_OUT_LOWER_VALUE 31:0 +#define NVC6B5_PITCH_IN (0x00000410) +#define NVC6B5_PITCH_IN_VALUE 31:0 +#define NVC6B5_PITCH_OUT (0x00000414) +#define NVC6B5_PITCH_OUT_VALUE 31:0 +#define NVC6B5_LINE_LENGTH_IN (0x00000418) +#define NVC6B5_LINE_LENGTH_IN_VALUE 31:0 +#define NVC6B5_LINE_COUNT (0x0000041C) +#define NVC6B5_LINE_COUNT_VALUE 31:0 +#define NVC6B5_SET_REMAP_CONST_A (0x00000700) +#define NVC6B5_SET_REMAP_CONST_A_V 31:0 +#define NVC6B5_SET_REMAP_CONST_B (0x00000704) +#define NVC6B5_SET_REMAP_CONST_B_V 31:0 +#define NVC6B5_SET_REMAP_COMPONENTS (0x00000708) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_X 2:0 +#define NVC6B5_SET_REMAP_COMPONENTS_DST_X_SRC_X (0x00000000) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_X_SRC_Y (0x00000001) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_X_SRC_Z (0x00000002) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_X_SRC_W (0x00000003) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_X_NO_WRITE (0x00000006) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Y 6:4 +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Y_SRC_X (0x00000000) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Y (0x00000001) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Z (0x00000002) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Y_SRC_W (0x00000003) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Y_CONST_A (0x00000004) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Y_NO_WRITE (0x00000006) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Z 10:8 +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Z_SRC_X (0x00000000) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Y (0x00000001) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Z (0x00000002) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Z_SRC_W (0x00000003) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Z_CONST_A (0x00000004) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Z_CONST_B (0x00000005) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_Z_NO_WRITE (0x00000006) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_W 14:12 +#define NVC6B5_SET_REMAP_COMPONENTS_DST_W_SRC_X (0x00000000) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_W_SRC_Y (0x00000001) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_W_SRC_Z (0x00000002) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_W_SRC_W (0x00000003) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_W_CONST_A (0x00000004) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_W_CONST_B (0x00000005) +#define NVC6B5_SET_REMAP_COMPONENTS_DST_W_NO_WRITE (0x00000006) +#define NVC6B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 +#define NVC6B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) +#define NVC6B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_TWO (0x00000001) +#define NVC6B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_THREE (0x00000002) +#define NVC6B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS 21:20 +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_ONE (0x00000000) +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_TWO (0x00000001) +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_THREE (0x00000002) +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_FOUR (0x00000003) +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_THREE (0x00000002) +#define NVC6B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_FOUR (0x00000003) +#define NVC6B5_SET_DST_BLOCK_SIZE (0x0000070C) +#define NVC6B5_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC6B5_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC6B5_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC6B5_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC6B5_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC6B5_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC6B5_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC6B5_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC6B5_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC6B5_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC6B5_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC6B5_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC6B5_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC6B5_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC6B5_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC6B5_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC6B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC6B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC6B5_SET_DST_WIDTH (0x00000710) +#define NVC6B5_SET_DST_WIDTH_V 31:0 +#define NVC6B5_SET_DST_HEIGHT (0x00000714) +#define NVC6B5_SET_DST_HEIGHT_V 31:0 +#define NVC6B5_SET_DST_DEPTH (0x00000718) +#define NVC6B5_SET_DST_DEPTH_V 31:0 +#define NVC6B5_SET_DST_LAYER (0x0000071C) +#define NVC6B5_SET_DST_LAYER_V 31:0 +#define NVC6B5_SET_DST_ORIGIN (0x00000720) +#define NVC6B5_SET_DST_ORIGIN_X 15:0 +#define NVC6B5_SET_DST_ORIGIN_Y 31:16 +#define NVC6B5_SET_SRC_BLOCK_SIZE (0x00000728) +#define NVC6B5_SET_SRC_BLOCK_SIZE_WIDTH 3:0 +#define NVC6B5_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC6B5_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 +#define NVC6B5_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC6B5_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC6B5_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC6B5_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC6B5_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC6B5_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC6B5_SET_SRC_BLOCK_SIZE_DEPTH 11:8 +#define NVC6B5_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC6B5_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC6B5_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC6B5_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC6B5_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC6B5_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC6B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC6B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC6B5_SET_SRC_WIDTH (0x0000072C) +#define NVC6B5_SET_SRC_WIDTH_V 31:0 +#define NVC6B5_SET_SRC_HEIGHT (0x00000730) +#define NVC6B5_SET_SRC_HEIGHT_V 31:0 +#define NVC6B5_SET_SRC_DEPTH (0x00000734) +#define NVC6B5_SET_SRC_DEPTH_V 31:0 +#define NVC6B5_SET_SRC_LAYER (0x00000738) +#define NVC6B5_SET_SRC_LAYER_V 31:0 +#define NVC6B5_SET_SRC_ORIGIN (0x0000073C) +#define NVC6B5_SET_SRC_ORIGIN_X 15:0 +#define NVC6B5_SET_SRC_ORIGIN_Y 31:16 +#define NVC6B5_SRC_ORIGIN_X (0x00000744) +#define NVC6B5_SRC_ORIGIN_X_VALUE 31:0 +#define NVC6B5_SRC_ORIGIN_Y (0x00000748) +#define NVC6B5_SRC_ORIGIN_Y_VALUE 31:0 +#define NVC6B5_DST_ORIGIN_X (0x0000074C) +#define NVC6B5_DST_ORIGIN_X_VALUE 31:0 +#define NVC6B5_DST_ORIGIN_Y (0x00000750) +#define NVC6B5_DST_ORIGIN_Y_VALUE 31:0 +#define NVC6B5_PM_TRIGGER_END (0x00001114) +#define NVC6B5_PM_TRIGGER_END_V 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc6b5_h + diff --git a/userspace/sdks/nv570/inc/class/clc6b5sw.h b/userspace/sdks/nv570/inc/class/clc6b5sw.h new file mode 100644 index 0000000..2b41bdf --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc6b5sw.h @@ -0,0 +1,54 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc6b5sw.finn +// + + + +// +// Using VERSION_0 will cause the API to interpret +// engineType as a CE engine instance. This allows +// for backward compatibility with 85B5sw and 90B5sw. +// +#define NVC6B5_ALLOCATION_PARAMETERS_VERSION_0 0 + +// +// Using VERSION_1 will cause the API to interpret +// engineType as an NV2080_ENGINE_TYPE ordinal. +// +#define NVC6B5_ALLOCATION_PARAMETERS_VERSION_1 1 + +#define NVC6B5_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc6b5U) + +typedef struct NVC6B5_ALLOCATION_PARAMETERS { + NvU32 version; + NvU32 engineType; +} NVC6B5_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc6c0.h b/userspace/sdks/nv570/inc/class/clc6c0.h new file mode 100644 index 0000000..48aa385 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc6c0.h @@ -0,0 +1,697 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_ampere_compute_a_h_ +#define _cl_ampere_compute_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl ampere_compute_a */ + +#include "nvtypes.h" + +#define AMPERE_COMPUTE_A 0xC6C0 + +#define NVC6C0_SET_OBJECT 0x0000 +#define NVC6C0_SET_OBJECT_CLASS_ID 15:0 +#define NVC6C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC6C0_NO_OPERATION 0x0100 +#define NVC6C0_NO_OPERATION_V 31:0 + +#define NVC6C0_SET_NOTIFY_A 0x0104 +#define NVC6C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC6C0_SET_NOTIFY_B 0x0108 +#define NVC6C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC6C0_NOTIFY 0x010c +#define NVC6C0_NOTIFY_TYPE 31:0 +#define NVC6C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC6C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC6C0_WAIT_FOR_IDLE 0x0110 +#define NVC6C0_WAIT_FOR_IDLE_V 31:0 + +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC6C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC6C0_SEND_GO_IDLE 0x013c +#define NVC6C0_SEND_GO_IDLE_V 31:0 + +#define NVC6C0_PM_TRIGGER 0x0140 +#define NVC6C0_PM_TRIGGER_V 31:0 + +#define NVC6C0_PM_TRIGGER_WFI 0x0144 +#define NVC6C0_PM_TRIGGER_WFI_V 31:0 + +#define NVC6C0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC6C0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC6C0_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC6C0_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC6C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC6C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC6C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC6C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC6C0_LINE_LENGTH_IN 0x0180 +#define NVC6C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC6C0_LINE_COUNT 0x0184 +#define NVC6C0_LINE_COUNT_VALUE 31:0 + +#define NVC6C0_OFFSET_OUT_UPPER 0x0188 +#define NVC6C0_OFFSET_OUT_UPPER_VALUE 16:0 + +#define NVC6C0_OFFSET_OUT 0x018c +#define NVC6C0_OFFSET_OUT_VALUE 31:0 + +#define NVC6C0_PITCH_OUT 0x0190 +#define NVC6C0_PITCH_OUT_VALUE 31:0 + +#define NVC6C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVC6C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC6C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC6C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC6C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC6C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC6C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC6C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC6C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC6C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC6C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC6C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC6C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC6C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC6C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC6C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC6C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC6C0_SET_DST_WIDTH 0x0198 +#define NVC6C0_SET_DST_WIDTH_V 31:0 + +#define NVC6C0_SET_DST_HEIGHT 0x019c +#define NVC6C0_SET_DST_HEIGHT_V 31:0 + +#define NVC6C0_SET_DST_DEPTH 0x01a0 +#define NVC6C0_SET_DST_DEPTH_V 31:0 + +#define NVC6C0_SET_DST_LAYER 0x01a4 +#define NVC6C0_SET_DST_LAYER_V 31:0 + +#define NVC6C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC6C0_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC6C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC6C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC6C0_LAUNCH_DMA 0x01b0 +#define NVC6C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC6C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC6C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC6C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC6C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC6C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC6C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC6C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC6C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC6C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC6C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC6C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC6C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC6C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC6C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC6C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC6C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC6C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC6C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC6C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC6C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC6C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC6C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC6C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC6C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC6C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC6C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC6C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC6C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC6C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC6C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC6C0_LOAD_INLINE_DATA 0x01b4 +#define NVC6C0_LOAD_INLINE_DATA_V 31:0 + +#define NVC6C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC6C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC6C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC6C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC6C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC6C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC6C0_SET_SM_SCG_CONTROL 0x01e8 +#define NVC6C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS 0:0 +#define NVC6C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_FALSE 0x00000000 +#define NVC6C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_TRUE 0x00000001 + +#define NVC6C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC6C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC6C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC6C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC6C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC6C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC6C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC6C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC6C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVC6C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVC6C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVC6C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVC6C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVC6C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVC6C0_PERFMON_TRANSFER 0x0210 +#define NVC6C0_PERFMON_TRANSFER_V 31:0 + +#define NVC6C0_SET_QMD_VIRTUALIZATION_BASE_A 0x0214 +#define NVC6C0_SET_QMD_VIRTUALIZATION_BASE_A_ADDRESS_UPPER 7:0 + +#define NVC6C0_SET_QMD_VIRTUALIZATION_BASE_B 0x0218 +#define NVC6C0_SET_QMD_VIRTUALIZATION_BASE_B_ADDRESS_LOWER 31:0 + +#define NVC6C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVC6C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC6C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC6C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC6C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC6C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC6C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC6C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC6C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC6C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC6C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC6C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC6C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC6C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC6C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC6C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC6C0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVC6C0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVC6C0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVC6C0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD03 0x022c +#define NVC6C0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVC6C0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVC6C0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVC6C0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD07 0x023c +#define NVC6C0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC6C0_SET_CWD_REF_COUNTER 0x0248 +#define NVC6C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVC6C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVC6C0_SET_RESERVED_SW_METHOD08 0x024c +#define NVC6C0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVC6C0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVC6C0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVC6C0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD12 0x025c +#define NVC6C0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVC6C0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVC6C0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC6C0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVC6C0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC6C0_SET_SCG_CONTROL 0x0270 +#define NVC6C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 +#define NVC6C0_SET_SCG_CONTROL_COMPUTE1_MIN_SM_COUNT 20:12 +#define NVC6C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE 24:24 +#define NVC6C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_FALSE 0x00000000 +#define NVC6C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_TRUE 0x00000001 + +#define NVC6C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVC6C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC6C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC6C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVC6C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC6C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC6C0_SET_QMD_VERSION 0x0288 +#define NVC6C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVC6C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC6C0_CHECK_QMD_VERSION 0x0290 +#define NVC6C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVC6C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC6C0_INVALIDATE_SKED_CACHES 0x0298 +#define NVC6C0_INVALIDATE_SKED_CACHES_V 0:0 + +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL 0x029c +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_CONSTANT_BUFFER_MASK 7:0 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE 8:8 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE 12:12 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE 16:16 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE 20:20 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE 24:24 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_FALSE 0x00000000 +#define NVC6C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_TRUE 0x00000001 + +#define NVC6C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 +#define NVC6C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC6C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 +#define NVC6C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC6C0_SCG_HYSTERESIS_CONTROL 0x02a8 +#define NVC6C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE 0:0 +#define NVC6C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC6C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_TRUE 0x00000001 +#define NVC6C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE 1:1 +#define NVC6C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC6C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_TRUE 0x00000001 + +#define NVC6C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVC6C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVC6C0_SEND_PCAS_A 0x02b4 +#define NVC6C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVC6C0_SEND_PCAS_B 0x02b8 +#define NVC6C0_SEND_PCAS_B_FROM 23:0 +#define NVC6C0_SEND_PCAS_B_DELTA 31:24 + +#define NVC6C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVC6C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVC6C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVC6C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVC6C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVC6C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVC6C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVC6C0_SEND_SIGNALING_PCAS2_B 0x02c0 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION 3:0 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_NOP 0x00000000 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE 0x00000001 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_SCHEDULE 0x00000002 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_PUT 0x00000006 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_DECREMENT_DEPENDENCE 0x00000007 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH 0x00000008 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH_SCHEDULE 0x00000009 +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_SCHEDULE 0x0000000A +#define NVC6C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_FORCE_REQUIRE_SCHEDULING 0x0000000B + +#define NVC6C0_SET_SKED_CACHE_CONTROL 0x02cc +#define NVC6C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 +#define NVC6C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 +#define NVC6C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 + +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVC6C0_SET_SPA_VERSION 0x0310 +#define NVC6C0_SET_SPA_VERSION_MINOR 7:0 +#define NVC6C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC6C0_SET_INLINE_QMD_ADDRESS_A 0x0318 +#define NVC6C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 + +#define NVC6C0_SET_INLINE_QMD_ADDRESS_B 0x031c +#define NVC6C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 + +#define NVC6C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) +#define NVC6C0_LOAD_INLINE_QMD_DATA_V 31:0 + +#define NVC6C0_SET_FALCON00 0x0500 +#define NVC6C0_SET_FALCON00_V 31:0 + +#define NVC6C0_SET_FALCON01 0x0504 +#define NVC6C0_SET_FALCON01_V 31:0 + +#define NVC6C0_SET_FALCON02 0x0508 +#define NVC6C0_SET_FALCON02_V 31:0 + +#define NVC6C0_SET_FALCON03 0x050c +#define NVC6C0_SET_FALCON03_V 31:0 + +#define NVC6C0_SET_FALCON04 0x0510 +#define NVC6C0_SET_FALCON04_V 31:0 + +#define NVC6C0_SET_FALCON05 0x0514 +#define NVC6C0_SET_FALCON05_V 31:0 + +#define NVC6C0_SET_FALCON06 0x0518 +#define NVC6C0_SET_FALCON06_V 31:0 + +#define NVC6C0_SET_FALCON07 0x051c +#define NVC6C0_SET_FALCON07_V 31:0 + +#define NVC6C0_SET_FALCON08 0x0520 +#define NVC6C0_SET_FALCON08_V 31:0 + +#define NVC6C0_SET_FALCON09 0x0524 +#define NVC6C0_SET_FALCON09_V 31:0 + +#define NVC6C0_SET_FALCON10 0x0528 +#define NVC6C0_SET_FALCON10_V 31:0 + +#define NVC6C0_SET_FALCON11 0x052c +#define NVC6C0_SET_FALCON11_V 31:0 + +#define NVC6C0_SET_FALCON12 0x0530 +#define NVC6C0_SET_FALCON12_V 31:0 + +#define NVC6C0_SET_FALCON13 0x0534 +#define NVC6C0_SET_FALCON13_V 31:0 + +#define NVC6C0_SET_FALCON14 0x0538 +#define NVC6C0_SET_FALCON14_V 31:0 + +#define NVC6C0_SET_FALCON15 0x053c +#define NVC6C0_SET_FALCON15_V 31:0 + +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 + +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 +#define NVC6C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC6C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC6C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC6C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC6C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC6C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS(i) (0x0da0+(i)*4) +#define NVC6C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS_V 31:0 + +#define NVC6C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC6C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC6C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVC6C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVC6C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVC6C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVC6C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC6C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC6C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC6C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC6C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC6C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC6C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC6C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC6C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC6C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC6C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC6C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC6C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC6C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC6C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC6C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC6C0_SET_RENDER_ENABLE_A 0x1550 +#define NVC6C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC6C0_SET_RENDER_ENABLE_B 0x1554 +#define NVC6C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC6C0_SET_RENDER_ENABLE_C 0x1558 +#define NVC6C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC6C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC6C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC6C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC6C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC6C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC6C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC6C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC6C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC6C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC6C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC6C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC6C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC6C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC6C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC6C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC6C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVC6C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC6C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC6C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC6C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC6C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC6C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC6C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC6C0_PIPE_NOP 0x1a2c +#define NVC6C0_PIPE_NOP_V 31:0 + +#define NVC6C0_SET_SPARE00 0x1a30 +#define NVC6C0_SET_SPARE00_V 31:0 + +#define NVC6C0_SET_SPARE01 0x1a34 +#define NVC6C0_SET_SPARE01_V 31:0 + +#define NVC6C0_SET_SPARE02 0x1a38 +#define NVC6C0_SET_SPARE02_V 31:0 + +#define NVC6C0_SET_SPARE03 0x1a3c +#define NVC6C0_SET_SPARE03_V 31:0 + +#define NVC6C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC6C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC6C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC6C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC6C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC6C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC6C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC6C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVC6C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVC6C0_SET_TRAP_HANDLER_A 0x25f8 +#define NVC6C0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC6C0_SET_TRAP_HANDLER_B 0x25fc +#define NVC6C0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC6C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVC6C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVC6C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC6C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC6C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC6C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC6C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC6C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC6C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC6C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC6C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC6C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC6C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC6C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC6C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC6C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC6C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#endif /* _cl_ampere_compute_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc6fa.h b/userspace/sdks/nv570/inc/class/clc6fa.h new file mode 100644 index 0000000..92d06ea --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc6fa.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc6fa_h_ +#define _clc6fa_h_ + +#define NVC6FA_VIDEO_OFA (0x0000C6FA) + +#endif // _clc6fa_h_ diff --git a/userspace/sdks/nv570/inc/class/clc761.h b/userspace/sdks/nv570/inc/class/clc761.h new file mode 100644 index 0000000..38ff555 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc761.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc761_h_ +#define _clc761_h_ + +#define BLACKWELL_USERMODE_A (0xc761) + +#endif /* _clc761_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/clc763.h b/userspace/sdks/nv570/inc/class/clc763.h new file mode 100644 index 0000000..eb70baa --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc763.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc763_h_ +#define _clc763_h_ + +#define MMU_VIDMEM_ACCESS_BIT_BUFFER (0xc763) + +#endif /* _clc763_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc770.h b/userspace/sdks/nv570/inc/class/clc770.h new file mode 100644 index 0000000..87580e5 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc770.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc770.finn +// + +#define NVC770_DISPLAY (0xc770U) /* finn: Evaluated from "NVC770_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + + + diff --git a/userspace/sdks/nv570/inc/class/clc771.h b/userspace/sdks/nv570/inc/class/clc771.h new file mode 100644 index 0000000..9d484a7 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc771.h @@ -0,0 +1,257 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc771_h_ +#define _clc771_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC771_DISP_SF_USER (0x000C771) + +typedef volatile struct _clc771_tag0 { + NvU32 dispSfUserOffset[0x400]; /* NV_PDISP_SF_USER 0x000D0FFF:0x000D0000 */ +} _NvC771DispSfUser, NvC771DispSfUserMap; + +#define NVC771_SF_HDMI_INFO_IDX_GENERIC_INFOFRAME 0x00000001 /* */ +#define NVC771_SF_HDMI_INFO_IDX_VSI 0x00000004 /* */ +#define NVC771_SF_HDMI_INFO_CTRL(i,j) (0x000E0000-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC771_SF_HDMI_INFO_CTRL__SIZE_1 4 /* */ +#define NVC771_SF_HDMI_INFO_CTRL__SIZE_2 5 /* */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x000E0000-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER 4:4 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_DIS 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_EN 0x00000001 /* RW--V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE 8:8 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_DIS 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_EN 0x00000001 /* RW--V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x000E0004-0x000E0000+(i)*1024) /* R--4A */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 8 /* */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R-IVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x000E0008-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 8 /* */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x000E000C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x000E0010-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x000E0014-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x000E0018-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW(i) (0x000E001C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVC771_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL(i,j) (0x000E0200-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_CTRL__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_CTRL__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_SINGLE 4:4 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_CTRL_SINGLE_NO 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_SINGLE_YES 0x00000001 /* RW--V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_LOC 9:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_CTRL_LOC_VBLANK 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_LOC_VSYNC 0x00000001 /* RW--V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_LOC_LOADV 0x00000002 /* RW--V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_NEW 12:12 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_CTRL_NEW_INIT 0x00000000 /* R-I-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_NEW_DONE 0x00000000 /* R---V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_NEW_PENDING 0x00000001 /* R---V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_NEW_TRIGGER 0x00000001 /* -W--T */ +#define NVC771_SF_SHARED_GENERIC_CTRL_STATUS 13:13 /* R-IVF */ +#define NVC771_SF_SHARED_GENERIC_CTRL_STATUS_DONE 0x00000001 /* R---V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_STATUS_WAIT 0x00000000 /* R---V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_STATUS_INIT 0x00000000 /* R-I-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_CHECKSUM_HW 16:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_CTRL_CHECKSUM_HW_NO 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_CHECKSUM_HW_YES 0x00000001 /* RW--V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_BUSY 20:20 /* R-IVF */ +#define NVC771_SF_SHARED_GENERIC_CTRL_BUSY_NO 0x00000000 /* R-I-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_BUSY_YES 0x00000001 /* R---V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_VSC_SDP_UPDATE_RFB_OVERRIDE 28:28 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_CTRL_VSC_SDP_UPDATE_RFB_OVERRIDE_DISABLE 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_VSC_SDP_UPDATE_RFB_OVERRIDE_ENABLE 0x00000001 /* RW--V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_VSC_SDP_SU_COORDINATES_VALID_OVERRIDE 31:31 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_CTRL_VSC_SDP_SU_COORDINATES_VALID_OVERRIDE_DISABLE 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_CTRL_VSC_SDP_SU_COORDINATES_VALID_OVERRIDE_ENABLE 0x00000001 /* RW--V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER(i,j) (0x000E0204-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER_HB3 31:24 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_HEADER_HB3_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0(i,j) (0x000E0208-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0_DB0 7:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0_DB0_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0_DB1 15:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0_DB1_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0_DB2 23:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0_DB2_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0_DB3 31:24 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK0_DB3_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1(i,j) (0x000E020C-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1_DB4 7:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1_DB4_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1_DB5 15:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1_DB5_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1_DB6 23:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1_DB6_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1_DB7 31:24 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK1_DB7_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2(i,j) (0x000E0210-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2_DB8 7:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2_DB8_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2_DB9 15:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2_DB9_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2_DB10 23:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2_DB10_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2_DB11 31:24 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK2_DB11_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3(i,j) (0x000E0214-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3_DB12 7:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3_DB12_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3_DB13 15:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3_DB13_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3_DB14 23:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3_DB14_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3_DB15 31:24 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK3_DB15_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4(i,j) (0x000E0218-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4_DB16 7:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4_DB16_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4_DB17 15:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4_DB17_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4_DB18 23:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4_DB18_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4_DB19 31:24 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK4_DB19_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5(i,j) (0x000E021C-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5_DB20 7:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5_DB20_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5_DB21 15:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5_DB21_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5_DB22 23:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5_DB22_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5_DB23 31:24 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK5_DB23_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6(i,j) (0x000E0220-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6_DB24 7:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6_DB24_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6_DB25 15:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6_DB25_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6_DB26 23:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6_DB26_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6_DB27 31:24 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK6_DB27_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7(i,j) (0x000E0224-0x000E0000+(i)*1024+(j)*40) /* RW-4A */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7__SIZE_1 8 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7__SIZE_2 6 /* */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7_DB28 7:0 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7_DB28_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7_DB29 15:8 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7_DB29_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7_DB30 23:16 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7_DB30_INIT 0x00000000 /* RWI-V */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7_DB31 31:24 /* RWIVF */ +#define NVC771_SF_SHARED_GENERIC_INFOFRAME_SUBPACK7_DB31_INIT 0x00000000 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _clc771_h_ diff --git a/userspace/sdks/nv570/inc/class/clc773.h b/userspace/sdks/nv570/inc/class/clc773.h new file mode 100644 index 0000000..eb20db3 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc773.h @@ -0,0 +1,667 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc773_h_ +#define _clc773_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC773_DISP_CAPABILITIES 0xC773 + +typedef volatile struct _clc773_tag0 { + NvU32 dispCapabilities[0x400]; +} _NvC773DispCapabilities,NvC773DispCapabilities_Map ; + + +#define NVC773_SYS_CAP 0x0 /* RW-4R */ +#define NVC773_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVC773_SYS_CAP_HEAD0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVC773_SYS_CAP_HEAD1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVC773_SYS_CAP_HEAD2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVC773_SYS_CAP_HEAD3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVC773_SYS_CAP_HEAD4_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVC773_SYS_CAP_HEAD5_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVC773_SYS_CAP_HEAD6_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVC773_SYS_CAP_HEAD7_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC773_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVC773_SYS_CAP_HEAD_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVC773_SYS_CAP_SOR0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVC773_SYS_CAP_SOR1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVC773_SYS_CAP_SOR2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVC773_SYS_CAP_SOR3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVC773_SYS_CAP_SOR4_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVC773_SYS_CAP_SOR5_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVC773_SYS_CAP_SOR6_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVC773_SYS_CAP_SOR7_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVC773_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVC773_SYS_CAP_SOR_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_DSI0_EXISTS 20:20 /* RWIVF */ +#define NVC773_SYS_CAP_DSI0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_DSI0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_DSI0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_DSI1_EXISTS 21:21 /* RWIVF */ +#define NVC773_SYS_CAP_DSI1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_DSI1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_DSI1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_DSI2_EXISTS 22:22 /* RWIVF */ +#define NVC773_SYS_CAP_DSI2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_DSI2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_DSI2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_DSI3_EXISTS 23:23 /* RWIVF */ +#define NVC773_SYS_CAP_DSI3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_DSI3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_DSI3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAP_DSI_EXISTS(i) (20+(i)):(20+(i)) /* RWIVF */ +#define NVC773_SYS_CAP_DSI_EXISTS__SIZE_1 4 /* */ +#define NVC773_SYS_CAP_DSI_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAP_DSI_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAP_DSI_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB 0x4 /* RW-4R */ +#define NVC773_SYS_CAPB_WINDOW0_EXISTS 0:0 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW0_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW1_EXISTS 1:1 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW1_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW2_EXISTS 2:2 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW2_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW3_EXISTS 3:3 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW3_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW4_EXISTS 4:4 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW4_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW5_EXISTS 5:5 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW5_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW6_EXISTS 6:6 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW6_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW7_EXISTS 7:7 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW7_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW8_EXISTS 8:8 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW8_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW9_EXISTS 9:9 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW9_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW10_EXISTS 10:10 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW10_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW11_EXISTS 11:11 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW11_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW12_EXISTS 12:12 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW12_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW13_EXISTS 13:13 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW13_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW14_EXISTS 14:14 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW14_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW15_EXISTS 15:15 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW15_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW16_EXISTS 16:16 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW16_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW17_EXISTS 17:17 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW17_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW18_EXISTS 18:18 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW18_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW19_EXISTS 19:19 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW19_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW20_EXISTS 20:20 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW20_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW21_EXISTS 21:21 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW21_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW22_EXISTS 22:22 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW22_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW23_EXISTS 23:23 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW23_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW24_EXISTS 24:24 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW24_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW25_EXISTS 25:25 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW25_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW26_EXISTS 26:26 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW26_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW27_EXISTS 27:27 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW27_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW28_EXISTS 28:28 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW28_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW29_EXISTS 29:29 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW29_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW30_EXISTS 30:30 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW30_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW31_EXISTS 31:31 /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW31_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC773_SYS_CAPB_WINDOW_EXISTS__SIZE_1 32 /* */ +#define NVC773_SYS_CAPB_WINDOW_EXISTS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SYS_CAPB_WINDOW_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC773_SYS_CAPB_WINDOW_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA 0x10 /* RW-4R */ +#define NVC773_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES 15:0 /* RWIUF */ +#define NVC773_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH 17:16 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_32B 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_64B 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_128B 0x00000002 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_256B 0x00000003 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_ROTATION 18:18 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_ROTATION_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_ROTATION_FALSE 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_ROTATION_TRUE 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_PLANAR 19:19 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_PLANAR_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_PLANAR_FALSE 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_VGA 20:20 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_VGA_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION 21:21 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_TRUE 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MSCG 22:22 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MSCG_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MSCG_FALSE 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MSCG_TRUE 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH 23:23 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_FALSE 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_TRUE 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT 26:26 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION 31:30 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_32B 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_64B 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_128B 0x00000002 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_256B 0x00000003 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC 0x18 /* RW-4R */ +#define NVC773_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE 1:0 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_32B 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_64B 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_128B 0x00000002 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_256B 0x00000003 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED 6:4 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_INIT 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_NONE 0x00000000 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_TWO 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_FOUR 0x00000002 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_EIGHT 0x00000003 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_SIXTEEN 0x00000004 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR 11:11 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_FALSE 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC773_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP 12:12 /* RWIVF */ +#define NVC773_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_FALSE 0x00000000 /* RWI-V */ +#define NVC773_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA(i) (0x680+(i)*32) /* RW-4A */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA__SIZE_1 8 /* */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_FULL_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_UNIT_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT 16:16 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT 17:17 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT 18:18 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT 19:19 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT 20:20 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT 21:21 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT 22:22 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT 23:23 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT 24:24 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB(i) (0x684+(i)*32) /* RW-4A */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB__SIZE_1 8 /* */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_VGA 0:0 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_VGA_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGSZ 9:6 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGNR 12:10 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT 15:15 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC(i) (0x688+(i)*32) /* RW-4A */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC__SIZE_1 8 /* */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC0_PRECISION 4:0 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC0_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC1_PRECISION 12:8 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC1_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP 13:13 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_SF_PRECISION 20:16 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_SF_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_CI_PRECISION 24:21 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_CI_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB 25:25 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPD(i) (0x68c+(i)*32) /* RW-4A */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPD__SIZE_1 8 /* */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE(i) (0x690+(i)*32) /* RW-4A */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE__SIZE_1 8 /* */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_RATEBUFSIZE 3:0 /* RWIUF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_RATEBUFSIZE_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_LINEBUFSIZE 13:8 /* RWIUF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_LINEBUFSIZE_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422 16:16 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420 17:17 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_TRUE 0x00000001 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_FALSE 0x00000000 /* RW--V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_INIT 0x00000000 /* RWI-V */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPF(i) (0x694+(i)*32) /* RW-4A */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPF__SIZE_1 8 /* */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPF_VFILTER_MAX_PIXELS 15:0 /* RWIVF */ +#define NVC773_POSTCOMP_HEAD_HDR_CAPF_VFILTER_MAX_PIXELS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVC773_SOR_CAP__SIZE_1 8 /* */ +#define NVC773_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVC773_SOR_CAP_SINGLE_LVDS_18_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVC773_SOR_CAP_SINGLE_LVDS_24_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVC773_SOR_CAP_DUAL_LVDS_18_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVC773_SOR_CAP_DUAL_LVDS_24_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVC773_SOR_CAP_SINGLE_TMDS_A_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVC773_SOR_CAP_SINGLE_TMDS_B_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVC773_SOR_CAP_DUAL_TMDS_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVC773_SOR_CAP_DISPLAY_OVER_PCIE_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVC773_SOR_CAP_SDI_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVC773_SOR_CAP_DP_A_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVC773_SOR_CAP_DP_B_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVC773_SOR_CAP_DP_INTERLACE_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVC773_SOR_CAP_DP_8_LANES_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVC773_SOR_CAP_HDMI_FRL 28:28 /* RWIVF */ +#define NVC773_SOR_CAP_HDMI_FRL_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CAP_HDMI_FRL_FALSE 0x00000000 /* RW--V */ +#define NVC773_SOR_CAP_HDMI_FRL_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA(i) (0x780+(i)*32) /* RW-4A */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA__SIZE_1 32 /* */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH 13:10 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT 16:16 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT 17:17 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT 18:18 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT 19:19 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT 20:20 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT 21:21 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT 22:22 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT 23:23 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT 24:24 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB(i) (0x784+(i)*32) /* RW-4A */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB__SIZE_1 32 /* */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION 4:0 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ 9:6 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR 12:10 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT 15:15 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC(i) (0x788+(i)*32) /* RW-4A */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC__SIZE_1 32 /* */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION 4:0 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGSZ 9:6 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGNR 12:10 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT 15:15 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION 20:16 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD(i) (0x78c+(i)*32) /* RW-4A */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD__SIZE_1 32 /* */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ 3:0 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR 6:4 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD 8:8 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT 9:9 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION 16:12 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION 20:17 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB 21:21 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA 22:22 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE(i) (0x790+(i)*32) /* RW-4A */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE__SIZE_1 32 /* */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION 4:0 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGSZ 9:6 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGSZ_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGNR 12:10 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGNR_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT 15:15 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION 20:16 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPF(i) (0x794+(i)*32) /* RW-4A */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPF__SIZE_1 32 /* */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP_INIT 0x00000000 /* RWI-V */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVC773_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP_INIT 0x00000000 /* RWI-V */ +#define NVC773_SOR_CLK_CAP(i) (0x608+(i)*4) /* RW-4A */ +#define NVC773_SOR_CLK_CAP__SIZE_1 8 /* */ +#define NVC773_SOR_CLK_CAP_DP_MAX 7:0 /* RWIUF */ +#define NVC773_SOR_CLK_CAP_DP_MAX_INIT 0x00000051 /* RWI-V */ +#define NVC773_SOR_CLK_CAP_TMDS_MAX 23:16 /* RWIUF */ +#define NVC773_SOR_CLK_CAP_TMDS_MAX_INIT 0x0000003C /* RWI-V */ +#define NVC773_SOR_CLK_CAP_LVDS_MAX 31:24 /* RWIUF */ +#define NVC773_SOR_CLK_CAP_LVDS_MAX_INIT 0x00000000 /* RWI-V */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clc773_h_ diff --git a/userspace/sdks/nv570/inc/class/clc77d.h b/userspace/sdks/nv570/inc/class/clc77d.h new file mode 100644 index 0000000..50bc709 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc77d.h @@ -0,0 +1,1372 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC77d_h_ +#define _clC77d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC77D_CORE_CHANNEL_DMA (0x0000C77D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVC77D_DMA +#define NVC77D_DMA_OPCODE 31:29 +#define NVC77D_DMA_OPCODE_METHOD 0x00000000 +#define NVC77D_DMA_OPCODE_JUMP 0x00000001 +#define NVC77D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC77D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC77D_DMA_METHOD_COUNT 27:18 +#define NVC77D_DMA_METHOD_OFFSET 13:2 +#define NVC77D_DMA_DATA 31:0 +#define NVC77D_DMA_DATA_NOP 0x00000000 +#define NVC77D_DMA_JUMP_OFFSET 11:2 +#define NVC77D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + +// class methods +#define NVC77D_PUT (0x00000000) +#define NVC77D_PUT_PTR 9:0 +#define NVC77D_GET (0x00000004) +#define NVC77D_GET_PTR 9:0 +#define NVC77D_UPDATE (0x00000200) +#define NVC77D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVC77D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVC77D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVC77D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVC77D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVC77D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVC77D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVC77D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVC77D_UPDATE_RELEASE_ELV 0:0 +#define NVC77D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC77D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC77D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC77D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC77D_SET_CONTEXT_DMA_NOTIFIER (0x00000208) +#define NVC77D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NVC77D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVC77D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC77D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC77D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC77D_SET_NOTIFIER_CONTROL_OFFSET 11:4 +#define NVC77D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVC77D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVC77D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVC77D_SET_CONTROL (0x00000210) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVC77D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC77D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC77D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC77D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVC77D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVC77D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVC77D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVC77D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVC77D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVC77D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVC77D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVC77D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVC77D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVC77D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVC77D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) + +#define NVC77D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC77D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC77D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVC77D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVC77D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVC77D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVC77D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVC77D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVC77D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVC77D_SOR_SET_CONTROL_PROTOCOL_HDMI_FRL (0x0000000C) +#define NVC77D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVC77D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVC77D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC77D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC77D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVC77D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVC77D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVC77D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVC77D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVC77D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVC77D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVC77D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVC77D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVC77D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVC77D_DSI_SET_CONTROL(a) (0x00000500 + (a)*0x00000020) +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK 7:0 +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC77D_DSI_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC77D_DSI_SET_CUSTOM_REASON(a) (0x00000504 + (a)*0x00000020) +#define NVC77D_DSI_SET_CUSTOM_REASON_CODE 31:0 +#define NVC77D_DSI_SET_SW_SPARE_A(a) (0x00000508 + (a)*0x00000020) +#define NVC77D_DSI_SET_SW_SPARE_A_CODE 31:0 +#define NVC77D_DSI_SET_SW_SPARE_B(a) (0x0000050C + (a)*0x00000020) +#define NVC77D_DSI_SET_SW_SPARE_B_CODE 31:0 + +#define NVC77D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVC77D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVC77D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVC77D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVC77D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC77D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED 16:16 +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED 28:28 +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED 30:30 +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC77D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) + +#define NVC77D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000400) +#define NVC77D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVC77D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVC77D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVC77D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVC77D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVC77D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVC77D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_PROCAMP_CHROMA_DOWN_V 4:4 +#define NVC77D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVC77D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVC77D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000400) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_444 (0x00000009) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444NP (0x0000000A) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN 31:26 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN0 (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN1 (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN2 (0x00000002) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN3 (0x00000003) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN4 (0x00000004) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN5 (0x00000005) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN6 (0x00000006) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN7 (0x00000007) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN8 (0x00000008) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN9 (0x00000009) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN10 (0x0000000A) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN11 (0x0000000B) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN12 (0x0000000C) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN13 (0x0000000D) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN14 (0x0000000E) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN15 (0x0000000F) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN16 (0x00000010) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN17 (0x00000011) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN18 (0x00000012) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN19 (0x00000013) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN20 (0x00000014) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN21 (0x00000015) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN22 (0x00000016) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN23 (0x00000017) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN24 (0x00000018) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN25 (0x00000019) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN26 (0x0000001A) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN27 (0x0000001B) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN28 (0x0000001C) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN29 (0x0000001D) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN30 (0x0000001E) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN31 (0x0000001F) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_NONE (0x0000003F) +#define NVC77D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000400) +#define NVC77D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVC77D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVC77D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_YUV420PACKER 3:3 +#define NVC77D_HEAD_SET_CONTROL_YUV420PACKER_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_YUV420PACKER_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE 11:10 +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN 8:4 +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_LOCKOUT_WINDOW 15:12 +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_MODE 23:22 +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN 20:16 +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC77D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC77D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE 30:30 +#define NVC77D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE 31:31 +#define NVC77D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000400) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC77D_HEAD_SET_PIXEL_REORDER_CONTROL(a) (0x00002010 + (a)*0x00000400) +#define NVC77D_HEAD_SET_PIXEL_REORDER_CONTROL_BANK_WIDTH 13:0 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000400) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC77D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVC77D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVC77D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVC77D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVC77D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVC77D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVC77D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVC77D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVC77D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVC77D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVC77D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVC77D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVC77D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVC77D_HEAD_SET_DITHER_CONTROL_MODE_ROUND (0x00000005) +#define NVC77D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000400) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVC77D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000400 + (b)*0x00000004) +#define NVC77D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000400) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC77D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC77D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000400) +#define NVC77D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC77D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000400) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED 4:4 +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_FALSE (0x00000000) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_TRUE (0x00000001) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS 14:12 +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED 16:16 +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVC77D_HEAD_SET_HEAD_USAGE_BOUNDS_ELV_START 31:17 +#define NVC77D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000400) +#define NVC77D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVC77D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVC77D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVC77D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVC77D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVC77D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC77D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC77D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVC77D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVC77D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVC77D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVC77D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVC77D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC77D_HEAD_SET_STALL_LOCK_UNSTALL_SYNC_ADVANCE 25:16 +#define NVC77D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000400) +#define NVC77D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVC77D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000400) +#define NVC77D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVC77D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVC77D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000400) +#define NVC77D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVC77D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVC77D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000400) +#define NVC77D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVC77D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVC77D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000400) +#define NVC77D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVC77D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVC77D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000400) +#define NVC77D_HEAD_SET_RASTER_SIZE_WIDTH 14:0 +#define NVC77D_HEAD_SET_RASTER_SIZE_HEIGHT 30:16 +#define NVC77D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000400) +#define NVC77D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVC77D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVC77D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000400) +#define NVC77D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVC77D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVC77D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000400) +#define NVC77D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVC77D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVC77D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVC77D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVC77D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVC77D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000400) +#define NVC77D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVC77D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVC77D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVC77D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000400) +#define NVC77D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVC77D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVC77D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVC77D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVC77D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVC77D_HEAD_SET_CONTEXT_DMA_CURSOR(a,b) (0x00002088 + (a)*0x00000400 + (b)*0x00000004) +#define NVC77D_HEAD_SET_CONTEXT_DMA_CURSOR_HANDLE 31:0 +#define NVC77D_HEAD_SET_OFFSET_CURSOR(a,b) (0x00002090 + (a)*0x00000400 + (b)*0x00000004) +#define NVC77D_HEAD_SET_OFFSET_CURSOR_ORIGIN 31:0 +#define NVC77D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000400) +#define NVC77D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVC77D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVC77D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000400) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000400) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS 20:20 +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_CONTEXT_DMA_CRC(a) (0x00002180 + (a)*0x00000400) +#define NVC77D_HEAD_SET_CONTEXT_DMA_CRC_HANDLE 31:0 +#define NVC77D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000400) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 5:0 +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_0 (0x00000000) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_1 (0x00000001) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_2 (0x00000002) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_3 (0x00000003) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_4 (0x00000004) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_5 (0x00000005) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_6 (0x00000006) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_7 (0x00000007) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_8 (0x00000008) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_9 (0x00000009) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_10 (0x0000000A) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_11 (0x0000000B) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_12 (0x0000000C) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_13 (0x0000000D) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_14 (0x0000000E) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_15 (0x0000000F) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_16 (0x00000010) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_17 (0x00000011) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_18 (0x00000012) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_19 (0x00000013) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_20 (0x00000014) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_21 (0x00000015) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_22 (0x00000016) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_23 (0x00000017) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_24 (0x00000018) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_25 (0x00000019) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_26 (0x0000001A) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_27 (0x0000001B) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_28 (0x0000001C) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_29 (0x0000001D) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_30 (0x0000001E) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_31 (0x0000001F) +#define NVC77D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000020) +#define NVC77D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVC77D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVC77D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVC77D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVC77D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVC77D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVC77D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000400) +#define NVC77D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVC77D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVC77D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000400) +#define NVC77D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVC77D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000400) +#define NVC77D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVC77D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000400) +#define NVC77D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVC77D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000400) +#define NVC77D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVC77D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DISPLAY_RATE_RUN_MODE 0:0 +#define NVC77D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVC77D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVC77D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVC77D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVC77D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_CONTEXT_DMA_RG_REL_SEMAPHORE(a,b) (0x000021AC + (a)*0x00000400 + (b)*0x00000004) +#define NVC77D_HEAD_SET_CONTEXT_DMA_RG_REL_SEMAPHORE_HANDLE 31:0 +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL(a,b) (0x000021CC + (a)*0x00000400 + (b)*0x00000004) +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_OFFSET 7:0 +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE 10:10 +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_ONE_TIME (0x00000000) +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_CONTINUOUS (0x00000001) +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RASTER_LINE 30:16 +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_VALUE(a,b) (0x000021EC + (a)*0x00000400 + (b)*0x00000004) +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_VALUE 31:0 +#define NVC77D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE(a) (0x00002214 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC77D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC77D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000400) +#define NVC77D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVC77D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 +#define NVC77D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED(a) (0x00002220 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_ALPHA 7:0 +#define NVC77D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_RED 31:16 +#define NVC77D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE(a) (0x00002224 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_GREEN 15:0 +#define NVC77D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_BLUE 31:16 +#define NVC77D_HEAD_SET_CURSOR_COLOR_NORM_SCALE(a) (0x00002228 + (a)*0x00000400) +#define NVC77D_HEAD_SET_CURSOR_COLOR_NORM_SCALE_VALUE 15:0 +#define NVC77D_HEAD_SET_XOR_BLEND_FACTOR(a) (0x0000222C + (a)*0x00000400) +#define NVC77D_HEAD_SET_XOR_BLEND_FACTOR_LOG2PEAK_LUMINANCE 3:0 +#define NVC77D_HEAD_SET_XOR_BLEND_FACTOR_S1 16:4 +#define NVC77D_HEAD_SET_XOR_BLEND_FACTOR_S2 30:18 +#define NVC77D_HEAD_SET_CLAMP_RANGE_GREEN(a) (0x00002238 + (a)*0x00000400) +#define NVC77D_HEAD_SET_CLAMP_RANGE_GREEN_LOW 11:0 +#define NVC77D_HEAD_SET_CLAMP_RANGE_GREEN_HIGH 27:16 +#define NVC77D_HEAD_SET_CLAMP_RANGE_RED_BLUE(a) (0x0000223C + (a)*0x00000400) +#define NVC77D_HEAD_SET_CLAMP_RANGE_RED_BLUE_LOW 11:0 +#define NVC77D_HEAD_SET_CLAMP_RANGE_RED_BLUE_HIGH 27:16 +#define NVC77D_HEAD_SET_OCSC0CONTROL(a) (0x00002240 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0CONTROL_ENABLE 0:0 +#define NVC77D_HEAD_SET_OCSC0CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_OCSC0CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C00(a) (0x00002244 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C00_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C01(a) (0x00002248 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C01_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C02(a) (0x0000224C + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C02_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C03(a) (0x00002250 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C03_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C10(a) (0x00002254 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C10_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C11(a) (0x00002258 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C11_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C12(a) (0x0000225C + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C12_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C13(a) (0x00002260 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C13_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C20(a) (0x00002264 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C20_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C21(a) (0x00002268 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C21_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C22(a) (0x0000226C + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C22_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C23(a) (0x00002270 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC0COEFFICIENT_C23_VALUE 20:0 +#define NVC77D_HEAD_SET_OLUT_CONTROL(a) (0x00002280 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OLUT_CONTROL_INTERPOLATE 0:0 +#define NVC77D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_OLUT_CONTROL_MIRROR 1:1 +#define NVC77D_HEAD_SET_OLUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_OLUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_OLUT_CONTROL_MODE 3:2 +#define NVC77D_HEAD_SET_OLUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC77D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC77D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC77D_HEAD_SET_OLUT_CONTROL_SIZE 18:8 +#define NVC77D_HEAD_SET_OLUT_FP_NORM_SCALE(a) (0x00002284 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OLUT_FP_NORM_SCALE_VALUE 31:0 +#define NVC77D_HEAD_SET_CONTEXT_DMA_OLUT(a) (0x00002288 + (a)*0x00000400) +#define NVC77D_HEAD_SET_CONTEXT_DMA_OLUT_HANDLE 31:0 +#define NVC77D_HEAD_SET_OFFSET_OLUT(a) (0x0000228C + (a)*0x00000400) +#define NVC77D_HEAD_SET_OFFSET_OLUT_ORIGIN 31:0 +#define NVC77D_HEAD_SET_OCSC1CONTROL(a) (0x0000229C + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1CONTROL_ENABLE 0:0 +#define NVC77D_HEAD_SET_OCSC1CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_OCSC1CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C00(a) (0x000022A0 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C00_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C01(a) (0x000022A4 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C01_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C02(a) (0x000022A8 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C02_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C03(a) (0x000022AC + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C03_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C10(a) (0x000022B0 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C10_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C11(a) (0x000022B4 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C11_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C12(a) (0x000022B8 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C12_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C13(a) (0x000022BC + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C13_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C20(a) (0x000022C0 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C20_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C21(a) (0x000022C4 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C21_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C22(a) (0x000022C8 + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C22_VALUE 20:0 +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C23(a) (0x000022CC + (a)*0x00000400) +#define NVC77D_HEAD_SET_OCSC1COEFFICIENT_C23_VALUE 20:0 +#define NVC77D_HEAD_SET_TILE_POSITION(a) (0x000022D0 + (a)*0x00000400) +#define NVC77D_HEAD_SET_TILE_POSITION_X 2:0 +#define NVC77D_HEAD_SET_TILE_POSITION_Y 6:4 +#define NVC77D_HEAD_SET_DSC_CONTROL(a) (0x000022D4 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_CONTROL_ENABLE 0:0 +#define NVC77D_HEAD_SET_DSC_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC77D_HEAD_SET_DSC_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC77D_HEAD_SET_DSC_CONTROL_MODE 2:1 +#define NVC77D_HEAD_SET_DSC_CONTROL_MODE_SINGLE (0x00000000) +#define NVC77D_HEAD_SET_DSC_CONTROL_MODE_DUAL (0x00000001) +#define NVC77D_HEAD_SET_DSC_CONTROL_MODE_QUAD (0x00000002) +#define NVC77D_HEAD_SET_DSC_CONTROL_AUTO_RESET 3:3 +#define NVC77D_HEAD_SET_DSC_CONTROL_AUTO_RESET_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_DSC_CONTROL_AUTO_RESET_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION 4:4 +#define NVC77D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_ENABLE (0x00000001) +#define NVC77D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET 5:5 +#define NVC77D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_FALSE (0x00000000) +#define NVC77D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_TRUE (0x00000001) +#define NVC77D_HEAD_SET_DSC_CONTROL_FLATNESS_DET_THRESH 15:6 +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL(a) (0x000022D8 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_ENABLE 0:0 +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_LOCATION 1:1 +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_SIZE 9:2 +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY 10:10 +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC77D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC77D_HEAD_SET_DSC_PPS_HEAD(a) (0x000022DC + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_HEAD_BYTE0 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_HEAD_BYTE1 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_HEAD_BYTE2 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_HEAD_BYTE3 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA0(a) (0x000022E0 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MINOR 3:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MAJOR 7:4 +#define NVC77D_HEAD_SET_DSC_PPS_DATA0_PPS_IDENTIFIER 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA0_RESERVED 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA0_LINEBUF_DEPTH 27:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA0_BITS_PER_COMPONENT 31:28 +#define NVC77D_HEAD_SET_DSC_PPS_DATA1(a) (0x000022E4 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_HIGH 1:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA1_VBR_ENABLE 2:2 +#define NVC77D_HEAD_SET_DSC_PPS_DATA1_SIMPLE422 3:3 +#define NVC77D_HEAD_SET_DSC_PPS_DATA1_CONVERT_RGB 4:4 +#define NVC77D_HEAD_SET_DSC_PPS_DATA1_BLOCK_PRED_ENABLE 5:5 +#define NVC77D_HEAD_SET_DSC_PPS_DATA1_RESERVED 7:6 +#define NVC77D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_LOW 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_HIGH 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_LOW 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA2(a) (0x000022E8 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_HIGH 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_LOW 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_HIGH 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_LOW 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA3(a) (0x000022EC + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_HIGH 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_LOW 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_HIGH 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_LOW 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA4(a) (0x000022F0 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_HIGH 1:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA4_RESERVED 7:2 +#define NVC77D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_LOW 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_HIGH 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_LOW 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA5(a) (0x000022F4 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA5_RESERVED0 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA5_INITIAL_SCALE_VALUE 13:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA5_RESERVED1 15:14 +#define NVC77D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_HIGH 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_LOW 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA6(a) (0x000022F8 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_HIGH 3:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA6_RESERVED0 7:4 +#define NVC77D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_LOW 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA6_RESERVED1 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA6_FIRST_LINE_BPG_OFFSET 28:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA6_RESERVED2 31:29 +#define NVC77D_HEAD_SET_DSC_PPS_DATA7(a) (0x000022FC + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_HIGH 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_LOW 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_HIGH 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_LOW 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA8(a) (0x00002300 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_HIGH 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_LOW 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_HIGH 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_LOW 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA9(a) (0x00002304 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MIN_QP 4:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA9_RESERVED0 7:5 +#define NVC77D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MAX_QP 12:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA9_RESERVED1 15:13 +#define NVC77D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_HIGH 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_LOW 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA10(a) (0x00002308 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA10_RC_EDGE_FACTOR 3:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA10_RESERVED0 7:4 +#define NVC77D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT0 12:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA10_RESERVED1 15:13 +#define NVC77D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT1 20:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA10_RESERVED2 23:21 +#define NVC77D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_LO 27:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_HI 31:28 +#define NVC77D_HEAD_SET_DSC_PPS_DATA11(a) (0x0000230C + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH0 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH1 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH2 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH3 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA12(a) (0x00002310 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH4 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH5 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH6 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH7 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA13(a) (0x00002314 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH8 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH9 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH10 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH11 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA14(a) (0x00002318 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH12 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH13 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_HIGH0 18:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MIN_QP0 23:19 +#define NVC77D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_BPG_OFFSET0 29:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_LOW0 31:30 +#define NVC77D_HEAD_SET_DSC_PPS_DATA15(a) (0x0000231C + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH1 2:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP1 7:3 +#define NVC77D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET1 13:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW1 15:14 +#define NVC77D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH2 18:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP2 23:19 +#define NVC77D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET2 29:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW2 31:30 +#define NVC77D_HEAD_SET_DSC_PPS_DATA16(a) (0x00002320 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH3 2:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP3 7:3 +#define NVC77D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET3 13:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW3 15:14 +#define NVC77D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH4 18:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP4 23:19 +#define NVC77D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET4 29:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW4 31:30 +#define NVC77D_HEAD_SET_DSC_PPS_DATA17(a) (0x00002324 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH5 2:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP5 7:3 +#define NVC77D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET5 13:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW5 15:14 +#define NVC77D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH6 18:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP6 23:19 +#define NVC77D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET6 29:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW6 31:30 +#define NVC77D_HEAD_SET_DSC_PPS_DATA18(a) (0x00002328 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH7 2:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP7 7:3 +#define NVC77D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET7 13:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW7 15:14 +#define NVC77D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH8 18:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP8 23:19 +#define NVC77D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET8 29:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW8 31:30 +#define NVC77D_HEAD_SET_DSC_PPS_DATA19(a) (0x0000232C + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH9 2:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP9 7:3 +#define NVC77D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET9 13:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW9 15:14 +#define NVC77D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH10 18:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP10 23:19 +#define NVC77D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET10 29:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW10 31:30 +#define NVC77D_HEAD_SET_DSC_PPS_DATA20(a) (0x00002330 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH11 2:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP11 7:3 +#define NVC77D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET11 13:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW11 15:14 +#define NVC77D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH12 18:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP12 23:19 +#define NVC77D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET12 29:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW12 31:30 +#define NVC77D_HEAD_SET_DSC_PPS_DATA21(a) (0x00002334 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH13 2:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP13 7:3 +#define NVC77D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET13 13:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW13 15:14 +#define NVC77D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH14 18:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP14 23:19 +#define NVC77D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET14 29:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW14 31:30 +#define NVC77D_HEAD_SET_DSC_PPS_DATA22(a) (0x00002338 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA22_NATIVE422 0:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA22_NATIVE420 1:1 +#define NVC77D_HEAD_SET_DSC_PPS_DATA22_RESERVED0 7:2 +#define NVC77D_HEAD_SET_DSC_PPS_DATA22_SECOND_LINE_BPG_OFFSET 12:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA22_RESERVED1 15:13 +#define NVC77D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSET_HIGH 23:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSETLOW 31:24 +#define NVC77D_HEAD_SET_DSC_PPS_DATA23(a) (0x0000233C + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_HIGH 7:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_LOW 15:8 +#define NVC77D_HEAD_SET_DSC_PPS_DATA23_RESERVED 31:16 +#define NVC77D_HEAD_SET_DSC_PPS_DATA24(a) (0x00002340 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA24_RESERVED 31:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA25(a) (0x00002344 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA25_RESERVED 31:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA26(a) (0x00002348 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA26_RESERVED 31:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA27(a) (0x0000234C + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA27_RESERVED 31:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA28(a) (0x00002350 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA28_RESERVED 31:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA29(a) (0x00002354 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA29_RESERVED 31:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA30(a) (0x00002358 + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA30_RESERVED 31:0 +#define NVC77D_HEAD_SET_DSC_PPS_DATA31(a) (0x0000235C + (a)*0x00000400) +#define NVC77D_HEAD_SET_DSC_PPS_DATA31_RESERVED 31:0 +#define NVC77D_HEAD_SET_RG_MERGE(a) (0x00002360 + (a)*0x00000400) +#define NVC77D_HEAD_SET_RG_MERGE_MODE 1:0 +#define NVC77D_HEAD_SET_RG_MERGE_MODE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_RG_MERGE_MODE_SETUP (0x00000001) +#define NVC77D_HEAD_SET_RG_MERGE_MODE_MASTER (0x00000002) +#define NVC77D_HEAD_SET_RG_MERGE_MODE_SLAVE (0x00000003) +#define NVC77D_HEAD_SET_RASTER_HBLANK_DELAY(a) (0x00002364 + (a)*0x00000400) +#define NVC77D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_START 15:0 +#define NVC77D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_END 31:16 +#define NVC77D_HEAD_SET_HDMI_DSC_HCACTIVE(a) (0x00002368 + (a)*0x00000400) +#define NVC77D_HEAD_SET_HDMI_DSC_HCACTIVE_BYTES 15:0 +#define NVC77D_HEAD_SET_HDMI_DSC_HCACTIVE_TRI_BYTES 31:16 +#define NVC77D_HEAD_SET_HDMI_DSC_HCBLANK(a) (0x0000236C + (a)*0x00000400) +#define NVC77D_HEAD_SET_HDMI_DSC_HCBLANK_WIDTH 15:0 +#define NVC77D_HEAD_SW_RESERVED(a,b) (0x00002370 + (a)*0x00000400 + (b)*0x00000004) +#define NVC77D_HEAD_SW_RESERVED_VALUE 31:0 +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI(a,b) (0x00002380 + (a)*0x00000400 + (b)*0x00000004) +#define NVC77D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVC77D_HEAD_SET_INFOFRAME_CTRL(a) (0x000023A4 + (a)*0x00000400) +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_MODE 1:0 +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_MODE_DISABLE (0x00000000) +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_MODE_GENERIC (0x00000001) +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_MODE_EMP_OTHERS (0x00000002) +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY 12:12 +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY_ONCE (0x00000001) +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_LOCATION 5:4 +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_LOCATION_VSYNC (0x00000000) +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_LOCATION_VBLANK (0x00000001) +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL 14:14 +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL_ACTIVE (0x00000000) +#define NVC77D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL_ARM (0x00000001) +#define NVC77D_HEAD_SET_INFOFRAME_HEADER(a) (0x000023A8 + (a)*0x00000400) +#define NVC77D_HEAD_SET_INFOFRAME_HEADER_HB0 7:0 +#define NVC77D_HEAD_SET_INFOFRAME_HEADER_HB1 15:8 +#define NVC77D_HEAD_SET_INFOFRAME_HEADER_HB2 23:16 +#define NVC77D_HEAD_SET_INFOFRAME_HEADER_HB3 31:24 +#define NVC77D_HEAD_SET_INFOFRAME_DATA0(a) (0x000023AC + (a)*0x00000400) +#define NVC77D_HEAD_SET_INFOFRAME_DATA0_DB0 7:0 +#define NVC77D_HEAD_SET_INFOFRAME_DATA0_DB1 15:8 +#define NVC77D_HEAD_SET_INFOFRAME_DATA0_DB2 23:16 +#define NVC77D_HEAD_SET_INFOFRAME_DATA0_DB3 31:24 +#define NVC77D_HEAD_SET_INFOFRAME_DATA1(a) (0x000023B0 + (a)*0x00000400) +#define NVC77D_HEAD_SET_INFOFRAME_DATA1_DB4 7:0 +#define NVC77D_HEAD_SET_INFOFRAME_DATA1_DB5 15:8 +#define NVC77D_HEAD_SET_INFOFRAME_DATA1_DB6 23:16 +#define NVC77D_HEAD_SET_INFOFRAME_DATA1_DB7 31:24 +#define NVC77D_HEAD_SET_INFOFRAME_DATA2(a) (0x000023B4 + (a)*0x00000400) +#define NVC77D_HEAD_SET_INFOFRAME_DATA2_DB8 7:0 +#define NVC77D_HEAD_SET_INFOFRAME_DATA2_DB9 15:8 +#define NVC77D_HEAD_SET_INFOFRAME_DATA2_DB10 23:16 +#define NVC77D_HEAD_SET_INFOFRAME_DATA2_DB11 31:24 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC77d_h diff --git a/userspace/sdks/nv570/inc/class/clc77f.h b/userspace/sdks/nv570/inc/class/clc77f.h new file mode 100644 index 0000000..3651a58 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc77f.h @@ -0,0 +1,34 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC77F_h_ +#define _clC77F_h_ + +// +// This class provides functional support of Display ANYChannel, Display Contextdmas bound to +// ANYChannel can be used on any other display window channels. +// +#define NVC77F_ANY_CHANNEL_DMA (0x0000C77F) + +#endif // _clC77F_h_ + diff --git a/userspace/sdks/nv570/inc/class/clc797.h b/userspace/sdks/nv570/inc/class/clc797.h new file mode 100644 index 0000000..dc4b600 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc797.h @@ -0,0 +1,4481 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef _cl_ampere_b_h_ +#define _cl_ampere_b_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl ampere_b */ + +#include "nvtypes.h" + +#define AMPERE_B 0xC797 + +#define NVC797_SET_OBJECT 0x0000 +#define NVC797_SET_OBJECT_CLASS_ID 15:0 +#define NVC797_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC797_NO_OPERATION 0x0100 +#define NVC797_NO_OPERATION_V 31:0 + +#define NVC797_SET_NOTIFY_A 0x0104 +#define NVC797_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC797_SET_NOTIFY_B 0x0108 +#define NVC797_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC797_NOTIFY 0x010c +#define NVC797_NOTIFY_TYPE 31:0 +#define NVC797_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC797_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC797_WAIT_FOR_IDLE 0x0110 +#define NVC797_WAIT_FOR_IDLE_V 31:0 + +#define NVC797_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVC797_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVC797_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVC797_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVC797_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVC797_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVC797_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVC797_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVC797_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVC797_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVC797_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVC797_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVC797_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVC797_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVC797_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVC797_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVC797_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVC797_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVC797_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC797_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC797_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC797_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC797_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC797_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC797_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC797_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC797_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC797_SEND_GO_IDLE 0x013c +#define NVC797_SEND_GO_IDLE_V 31:0 + +#define NVC797_PM_TRIGGER 0x0140 +#define NVC797_PM_TRIGGER_V 31:0 + +#define NVC797_PM_TRIGGER_WFI 0x0144 +#define NVC797_PM_TRIGGER_WFI_V 31:0 + +#define NVC797_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC797_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC797_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC797_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC797_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC797_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC797_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC797_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC797_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER 0x0158 +#define NVC797_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER_PAYLOAD_LOWER 31:0 + +#define NVC797_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER 0x015c +#define NVC797_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER_PAYLOAD_UPPER 31:0 + +#define NVC797_SET_REPORT_SEMAPHORE_ADDRESS_LOWER 0x0160 +#define NVC797_SET_REPORT_SEMAPHORE_ADDRESS_LOWER_LOWER 31:0 + +#define NVC797_SET_REPORT_SEMAPHORE_ADDRESS_UPPER 0x0164 +#define NVC797_SET_REPORT_SEMAPHORE_ADDRESS_UPPER_UPPER 7:0 + +#define NVC797_REPORT_SEMAPHORE_EXECUTE 0x0168 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_OPERATION 1:0 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_OPERATION_RELEASE 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_OPERATION_ACQUIRE 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_OPERATION_REPORT_ONLY 0x00000002 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_OPERATION_TRAP 0x00000003 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION 5:2 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_NONE 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_VPC 0x00000004 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_ALL 0x0000000F +#define NVC797_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE 6:6 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT 11:7 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_NONE 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_VS_INVOCATIONS 0x00000005 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_TI_INVOCATIONS 0x0000001B +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_TS_INVOCATIONS 0x0000001D +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_GS_INVOCATIONS 0x00000007 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_SCG_CLOCKS 0x00000008 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS0 0x0000000A +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS1 0x0000000C +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS2 0x0000000E +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS3 0x00000010 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_PS_INVOCATIONS 0x00000013 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REPORT_TIMESTAMP 0x00000014 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE 14:13 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_SUB_REPORT 17:15 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE 19:19 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_ROP_FLUSH_DISABLE 18:18 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_ROP_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_ROP_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE 20:20 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP 23:21 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_INC 0x00000003 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_AND 0x00000005 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_OR 0x00000006 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT 25:24 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64 27:27 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_FALSE 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_TRUE 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE 29:28 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVC797_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 + +#define NVC797_LINE_LENGTH_IN 0x0180 +#define NVC797_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC797_LINE_COUNT 0x0184 +#define NVC797_LINE_COUNT_VALUE 31:0 + +#define NVC797_OFFSET_OUT_UPPER 0x0188 +#define NVC797_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVC797_OFFSET_OUT 0x018c +#define NVC797_OFFSET_OUT_VALUE 31:0 + +#define NVC797_PITCH_OUT 0x0190 +#define NVC797_PITCH_OUT_VALUE 31:0 + +#define NVC797_SET_DST_BLOCK_SIZE 0x0194 +#define NVC797_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC797_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC797_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC797_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC797_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC797_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC797_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC797_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC797_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC797_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC797_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC797_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC797_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC797_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC797_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC797_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC797_SET_DST_WIDTH 0x0198 +#define NVC797_SET_DST_WIDTH_V 31:0 + +#define NVC797_SET_DST_HEIGHT 0x019c +#define NVC797_SET_DST_HEIGHT_V 31:0 + +#define NVC797_SET_DST_DEPTH 0x01a0 +#define NVC797_SET_DST_DEPTH_V 31:0 + +#define NVC797_SET_DST_LAYER 0x01a4 +#define NVC797_SET_DST_LAYER_V 31:0 + +#define NVC797_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC797_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC797_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC797_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC797_LAUNCH_DMA 0x01b0 +#define NVC797_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC797_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC797_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC797_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC797_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC797_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC797_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC797_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC797_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC797_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC797_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC797_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC797_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC797_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC797_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC797_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC797_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC797_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC797_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC797_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC797_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC797_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC797_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC797_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC797_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC797_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC797_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC797_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC797_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC797_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC797_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC797_LOAD_INLINE_DATA 0x01b4 +#define NVC797_LOAD_INLINE_DATA_V 31:0 + +#define NVC797_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC797_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC797_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC797_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC797_SET_MME_SWITCH_STATE 0x01ec +#define NVC797_SET_MME_SWITCH_STATE_VALID 0:0 +#define NVC797_SET_MME_SWITCH_STATE_VALID_FALSE 0x00000000 +#define NVC797_SET_MME_SWITCH_STATE_VALID_TRUE 0x00000001 +#define NVC797_SET_MME_SWITCH_STATE_SAVE_MACRO 11:4 +#define NVC797_SET_MME_SWITCH_STATE_RESTORE_MACRO 19:12 + +#define NVC797_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC797_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC797_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC797_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC797_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC797_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC797_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC797_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC797_RUN_DS_NOW 0x0200 +#define NVC797_RUN_DS_NOW_V 31:0 + +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVC797_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVC797_SET_GS_MODE 0x0208 +#define NVC797_SET_GS_MODE_TYPE 0:0 +#define NVC797_SET_GS_MODE_TYPE_ANY 0x00000000 +#define NVC797_SET_GS_MODE_TYPE_FAST_GS 0x00000001 + +#define NVC797_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVC797_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVC797_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVC797_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVC797_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVC797_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVC797_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVC797_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_GS_DM_FIFO 0x0214 +#define NVC797_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVC797_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVC797_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVC797_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVC797_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC797_INVALIDATE_SHADER_CACHES 0x021c +#define NVC797_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC797_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC797_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC797_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC797_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC797_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC797_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC797_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC797_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC797_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC797_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC797_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC797_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC797_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC797_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC797_SET_INSTANCE_COUNT 0x0220 +#define NVC797_SET_INSTANCE_COUNT_V 31:0 + +#define NVC797_SET_POSITION_W_SCALED_OFFSET_ENABLE 0x0224 +#define NVC797_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE 0:0 +#define NVC797_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_GO_IDLE_TIMEOUT 0x022c +#define NVC797_SET_GO_IDLE_TIMEOUT_V 31:0 + +#define NVC797_SET_MME_VERSION 0x0234 +#define NVC797_SET_MME_VERSION_MAJOR 7:0 + +#define NVC797_SET_INDEX_BUFFER_SIZE_A 0x0238 +#define NVC797_SET_INDEX_BUFFER_SIZE_A_UPPER 7:0 + +#define NVC797_SET_INDEX_BUFFER_SIZE_B 0x023c +#define NVC797_SET_INDEX_BUFFER_SIZE_B_LOWER 31:0 + +#define NVC797_SET_ROOT_TABLE_VISIBILITY(i) (0x0240+(i)*4) +#define NVC797_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP0_ENABLE 1:0 +#define NVC797_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP1_ENABLE 5:4 +#define NVC797_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP2_ENABLE 9:8 +#define NVC797_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP3_ENABLE 13:12 +#define NVC797_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP4_ENABLE 17:16 + +#define NVC797_SET_DRAW_CONTROL_A 0x0260 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY 3:0 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_POINTS 0x00000000 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_LINES 0x00000001 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_QUADS 0x00000007 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_POLYGON 0x00000009 +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_SET_DRAW_CONTROL_A_TOPOLOGY_PATCH 0x0000000E +#define NVC797_SET_DRAW_CONTROL_A_PRIMITIVE_ID 4:4 +#define NVC797_SET_DRAW_CONTROL_A_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC797_SET_DRAW_CONTROL_A_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC797_SET_DRAW_CONTROL_A_INSTANCE_ID 6:5 +#define NVC797_SET_DRAW_CONTROL_A_INSTANCE_ID_FIRST 0x00000000 +#define NVC797_SET_DRAW_CONTROL_A_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC797_SET_DRAW_CONTROL_A_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC797_SET_DRAW_CONTROL_A_SPLIT_MODE 8:7 +#define NVC797_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC797_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC797_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC797_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC797_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE 9:9 +#define NVC797_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 +#define NVC797_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX 10:10 +#define NVC797_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_FALSE 0x00000000 +#define NVC797_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_TRUE 0x00000001 +#define NVC797_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX 11:11 +#define NVC797_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_FALSE 0x00000000 +#define NVC797_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_TRUE 0x00000001 + +#define NVC797_SET_DRAW_CONTROL_B 0x0264 +#define NVC797_SET_DRAW_CONTROL_B_INSTANCE_COUNT 31:0 + +#define NVC797_DRAW_INDEX_BUFFER_BEGIN_END_A 0x0268 +#define NVC797_DRAW_INDEX_BUFFER_BEGIN_END_A_FIRST 31:0 + +#define NVC797_DRAW_INDEX_BUFFER_BEGIN_END_B 0x026c +#define NVC797_DRAW_INDEX_BUFFER_BEGIN_END_B_COUNT 31:0 + +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_A 0x0270 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_A_START 31:0 + +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_B 0x0274 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_B_COUNT 31:0 + +#define NVC797_INVALIDATE_RASTER_CACHE_NO_WFI 0x027c +#define NVC797_INVALIDATE_RASTER_CACHE_NO_WFI_V 0:0 + +#define NVC797_SET_COLOR_RENDER_TO_ZETA_SURFACE 0x02b8 +#define NVC797_SET_COLOR_RENDER_TO_ZETA_SURFACE_V 0:0 +#define NVC797_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_FALSE 0x00000000 +#define NVC797_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_TRUE 0x00000001 + +#define NVC797_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION 0x02bc +#define NVC797_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V 0:0 +#define NVC797_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_FALSE 0x00000000 +#define NVC797_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_TRUE 0x00000001 + +#define NVC797_INCREMENT_SYNC_POINT 0x02c8 +#define NVC797_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVC797_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVC797_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVC797_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVC797_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVC797_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVC797_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVC797_SET_ROOT_TABLE_PREFETCH 0x02d0 +#define NVC797_SET_ROOT_TABLE_PREFETCH_STAGE_ENABLES 5:0 + +#define NVC797_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVC797_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVC797_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC797_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVC797_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVC797_DECOMPRESS_SURFACE 0x02e0 +#define NVC797_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVC797_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVC797_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVC797_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVC797_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVC797_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVC797_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVC797_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVC797_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVC797_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVC797_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVC797_SET_ZCULL_SUBREGION 0x02e8 +#define NVC797_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVC797_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVC797_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVC797_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVC797_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVC797_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVC797_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVC797_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVC797_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVC797_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVC797_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVC797_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVC797_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVC797_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVC797_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVC797_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVC797_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVC797_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVC797_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVC797_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVC797_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVC797_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVC797_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVC797_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVC797_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC797_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVC797_DRAW_ZERO_INDEX 0x0304 +#define NVC797_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVC797_SET_L1_CONFIGURATION 0x0308 +#define NVC797_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVC797_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVC797_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVC797_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVC797_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVC797_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVC797_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVC797_SET_SPA_VERSION 0x0310 +#define NVC797_SET_SPA_VERSION_MINOR 7:0 +#define NVC797_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC797_SET_TIMESLICE_BATCH_LIMIT 0x0314 +#define NVC797_SET_TIMESLICE_BATCH_LIMIT_BATCH_LIMIT 15:0 + +#define NVC797_SET_SNAP_GRID_LINE 0x0318 +#define NVC797_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC797_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC797_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC797_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC797_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC797_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC797_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC797_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC797_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC797_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVC797_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC797_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC797_SET_SNAP_GRID_NON_LINE 0x031c +#define NVC797_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC797_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC797_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC797_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC797_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC797_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC797_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC797_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC797_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC797_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVC797_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC797_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC797_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVC797_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVC797_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVC797_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVC797_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVC797_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVC797_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVC797_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVC797_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVC797_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVC797_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVC797_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVC797_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVC797_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVC797_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVC797_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVC797_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVC797_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVC797_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVC797_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVC797_SET_TESSELLATION_LOD_V1 0x0330 +#define NVC797_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVC797_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVC797_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVC797_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVC797_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVC797_RESERVED_TG07 0x033c +#define NVC797_RESERVED_TG07_V 0:0 + +#define NVC797_RESERVED_TG08 0x0340 +#define NVC797_RESERVED_TG08_V 0:0 + +#define NVC797_RESERVED_TG09 0x0344 +#define NVC797_RESERVED_TG09_V 0:0 + +#define NVC797_RESERVED_TG10 0x0348 +#define NVC797_RESERVED_TG10_V 0:0 + +#define NVC797_RESERVED_TG11 0x034c +#define NVC797_RESERVED_TG11_V 0:0 + +#define NVC797_RESERVED_TG12 0x0350 +#define NVC797_RESERVED_TG12_V 0:0 + +#define NVC797_RESERVED_TG13 0x0354 +#define NVC797_RESERVED_TG13_V 0:0 + +#define NVC797_RESERVED_TG14 0x0358 +#define NVC797_RESERVED_TG14_V 0:0 + +#define NVC797_RESERVED_TG15 0x035c +#define NVC797_RESERVED_TG15_V 0:0 + +#define NVC797_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVC797_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVC797_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVC797_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVC797_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVC797_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVC797_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVC797_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVC797_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVC797_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVC797_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVC797_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVC797_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVC797_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVC797_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVC797_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVC797_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVC797_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVC797_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE 8:8 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE 9:9 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC797_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVC797_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVC797_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVC797_SET_RASTER_ENABLE 0x037c +#define NVC797_SET_RASTER_ENABLE_V 0:0 +#define NVC797_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVC797_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVC797_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVC797_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVC797_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVC797_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVC797_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVC797_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVC797_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVC797_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVC797_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVC797_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVC797_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVC797_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVC797_SET_POSITION_W_SCALED_OFFSET_SCALE_A(j) (0x0400+(j)*16) +#define NVC797_SET_POSITION_W_SCALED_OFFSET_SCALE_A_V 31:0 + +#define NVC797_SET_POSITION_W_SCALED_OFFSET_SCALE_B(j) (0x0404+(j)*16) +#define NVC797_SET_POSITION_W_SCALED_OFFSET_SCALE_B_V 31:0 + +#define NVC797_SET_POSITION_W_SCALED_OFFSET_RESERVED_A(j) (0x0408+(j)*16) +#define NVC797_SET_POSITION_W_SCALED_OFFSET_RESERVED_A_V 31:0 + +#define NVC797_SET_POSITION_W_SCALED_OFFSET_RESERVED_B(j) (0x040c+(j)*16) +#define NVC797_SET_POSITION_W_SCALED_OFFSET_RESERVED_B_V 31:0 + +#define NVC797_SET_Z_ROP_SLICE_MAP 0x0500 +#define NVC797_SET_Z_ROP_SLICE_MAP_VIRTUAL_ADDRESS_MASK 31:0 + +#define NVC797_SET_ROOT_TABLE_SELECTOR 0x0504 +#define NVC797_SET_ROOT_TABLE_SELECTOR_ROOT_TABLE 2:0 +#define NVC797_SET_ROOT_TABLE_SELECTOR_OFFSET 15:8 + +#define NVC797_LOAD_ROOT_TABLE 0x0508 +#define NVC797_LOAD_ROOT_TABLE_V 31:0 + +#define NVC797_SET_MME_MEM_ADDRESS_A 0x0550 +#define NVC797_SET_MME_MEM_ADDRESS_A_UPPER 16:0 + +#define NVC797_SET_MME_MEM_ADDRESS_B 0x0554 +#define NVC797_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NVC797_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NVC797_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NVC797_MME_DMA_READ 0x055c +#define NVC797_MME_DMA_READ_LENGTH 31:0 + +#define NVC797_MME_DMA_READ_FIFOED 0x0560 +#define NVC797_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NVC797_MME_DMA_WRITE 0x0564 +#define NVC797_MME_DMA_WRITE_LENGTH 31:0 + +#define NVC797_MME_DMA_REDUCTION 0x0568 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NVC797_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NVC797_MME_DMA_SYSMEMBAR 0x056c +#define NVC797_MME_DMA_SYSMEMBAR_V 0:0 + +#define NVC797_MME_DMA_SYNC 0x0570 +#define NVC797_MME_DMA_SYNC_VALUE 31:0 + +#define NVC797_SET_MME_DATA_FIFO_CONFIG 0x0574 +#define NVC797_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 +#define NVC797_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 +#define NVC797_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 +#define NVC797_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 +#define NVC797_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 +#define NVC797_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 + +#define NVC797_SET_VERTEX_STREAM_SIZE_A(j) (0x0600+(j)*8) +#define NVC797_SET_VERTEX_STREAM_SIZE_A_UPPER 7:0 + +#define NVC797_SET_VERTEX_STREAM_SIZE_B(j) (0x0604+(j)*8) +#define NVC797_SET_VERTEX_STREAM_SIZE_B_LOWER 31:0 + +#define NVC797_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVC797_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVC797_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVC797_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVC797_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVC797_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVC797_SET_RASTER_INPUT 0x0740 +#define NVC797_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVC797_SET_STREAM_OUTPUT 0x0744 +#define NVC797_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVC797_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVC797_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVC797_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVC797_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVC797_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVC797_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVC797_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 +#define NVC797_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES_EXTENDED 5:5 + +#define NVC797_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVC797_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC797_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC797_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVC797_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC797_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC797_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVC797_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVC797_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVC797_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVC797_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVC797_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVC797_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVC797_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC797_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVC797_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC797_SET_STENCIL_ZERO_BANDWIDTH_CLEAR 0x07b0 +#define NVC797_SET_STENCIL_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC797_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVC797_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVC797_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVC797_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVC797_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVC797_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVC797_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVC797_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVC797_SET_CULL_BEFORE_FETCH 0x07dc +#define NVC797_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVC797_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVC797_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVC797_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVC797_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVC797_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVC797_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVC797_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVC797_SET_ZCULL_STORAGE_A 0x07e8 +#define NVC797_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVC797_SET_ZCULL_STORAGE_B 0x07ec +#define NVC797_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVC797_SET_ZCULL_STORAGE_C 0x07f0 +#define NVC797_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC797_SET_ZCULL_STORAGE_D 0x07f4 +#define NVC797_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC797_SET_ZT_READ_ONLY 0x07f8 +#define NVC797_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVC797_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVC797_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVC797_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVC797_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVC797_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVC797_THROTTLE_SM 0x07fc +#define NVC797_THROTTLE_SM_MULTIPLY_ADD 0:0 +#define NVC797_THROTTLE_SM_MULTIPLY_ADD_FALSE 0x00000000 +#define NVC797_THROTTLE_SM_MULTIPLY_ADD_TRUE 0x00000001 + +#define NVC797_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVC797_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVC797_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVC797_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVC797_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVC797_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVC797_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVC797_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVC797_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVC797_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVC797_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVC797_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVC797_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVC797_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVC797_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVC797_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVC797_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVC797_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVC797_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVC797_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC797_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVC797_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVC797_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC797_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC797_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVC797_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC797_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVC797_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVC797_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVC797_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVC797_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVC797_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVC797_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVC797_SET_COLOR_TARGET_C_ROP_SLICE_MAP(j) (0x0824+(j)*64) +#define NVC797_SET_COLOR_TARGET_C_ROP_SLICE_MAP_VIRTUAL_ADDRESS_MASK 31:0 + +#define NVC797_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVC797_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVC797_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVC797_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVC797_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVC797_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVC797_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVC797_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVC797_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVC797_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVC797_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVC797_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE(j) (0x0a18+(j)*32) +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_X 2:0 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X 0x00000000 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X 0x00000001 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y 0x00000002 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y 0x00000003 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z 0x00000004 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z 0x00000005 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W 0x00000006 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W 0x00000007 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Y 6:4 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X 0x00000000 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X 0x00000001 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y 0x00000002 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y 0x00000003 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z 0x00000004 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z 0x00000005 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W 0x00000006 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W 0x00000007 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Z 10:8 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X 0x00000000 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X 0x00000001 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y 0x00000002 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y 0x00000003 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z 0x00000004 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z 0x00000005 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W 0x00000006 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W 0x00000007 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_W 14:12 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X 0x00000000 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X 0x00000001 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y 0x00000002 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y 0x00000003 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z 0x00000004 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z 0x00000005 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W 0x00000006 +#define NVC797_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W 0x00000007 + +#define NVC797_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(j) (0x0a1c+(j)*32) +#define NVC797_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_X_BITS 4:0 +#define NVC797_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_Y_BITS 12:8 + +#define NVC797_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVC797_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVC797_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC797_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVC797_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVC797_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC797_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVC797_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVC797_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVC797_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVC797_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVC797_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVC797_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVC797_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVC797_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVC797_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVC797_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVC797_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVC797_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVC797_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVC797_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVC797_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVC797_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVC797_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC797_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVC797_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVC797_SET_STATISTICS_COUNTER 0x0d68 +#define NVC797_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVC797_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVC797_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVC797_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVC797_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVC797_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVC797_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVC797_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVC797_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVC797_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVC797_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVC797_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVC797_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVC797_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVC797_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVC797_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVC797_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 +#define NVC797_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE 16:16 +#define NVC797_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVC797_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC797_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC797_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVC797_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC797_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC797_SET_VERTEX_ARRAY_START 0x0d74 +#define NVC797_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVC797_DRAW_VERTEX_ARRAY 0x0d78 +#define NVC797_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVC797_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVC797_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVC797_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVC797_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVC797_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVC797_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVC797_SET_Z_CLEAR_VALUE 0x0d90 +#define NVC797_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVC797_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC797_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC797_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC797_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC797_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVC797_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVC797_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVC797_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC797_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC797_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVC797_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVC797_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVC797_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVC797_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVC797_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVC797_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVC797_SET_FRONT_POLYGON_MODE 0x0dac +#define NVC797_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVC797_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC797_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC797_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC797_SET_BACK_POLYGON_MODE 0x0db0 +#define NVC797_SET_BACK_POLYGON_MODE_V 31:0 +#define NVC797_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC797_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC797_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC797_SET_POLY_SMOOTH 0x0db4 +#define NVC797_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVC797_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVC797_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVC797_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVC797_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVC797_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVC797_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVC797_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVC797_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVC797_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVC797_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVC797_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVC797_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVC797_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVC797_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVC797_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVC797_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVC797_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVC797_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_PATCH 0x0dcc +#define NVC797_SET_PATCH_SIZE 7:0 + +#define NVC797_SET_ITERATED_BLEND 0x0dd0 +#define NVC797_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVC797_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVC797_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVC797_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVC797_SET_ZCULL_CRITERION 0x0dd8 +#define NVC797_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVC797_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVC797_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVC797_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVC797_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVC797_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVC797_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVC797_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVC797_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVC797_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVC797_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVC797_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVC797_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVC797_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVC797_SET_ZCULL_CRITERION_SREF 23:16 +#define NVC797_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVC797_PIXEL_SHADER_BARRIER 0x0de0 +#define NVC797_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVC797_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVC797_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 +#define NVC797_PIXEL_SHADER_BARRIER_BARRIER_LOCATION 1:1 +#define NVC797_PIXEL_SHADER_BARRIER_BARRIER_LOCATION_BLOCK_BEFORE_PS 0x00000000 +#define NVC797_PIXEL_SHADER_BARRIER_BARRIER_LOCATION_BLOCK_BEFORE_PS_AND_ZTEST 0x00000001 + +#define NVC797_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC797_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC797_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVC797_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVC797_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVC797_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVC797_MME_DMA_WRITE_METHOD_BARRIER 0x0dec +#define NVC797_MME_DMA_WRITE_METHOD_BARRIER_V 0:0 + +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVC797_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVC797_SET_WINDOW_OFFSET_X 0x0df8 +#define NVC797_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVC797_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVC797_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVC797_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVC797_SET_SCISSOR_ENABLE_V 0:0 +#define NVC797_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVC797_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVC797_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVC797_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVC797_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVC797_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVC797_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVC797_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVC797_SET_VPC_PERF_KNOB 0x0f14 +#define NVC797_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVC797_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVC797_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVC797_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVC797_PM_LOCAL_TRIGGER 0x0f18 +#define NVC797_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVC797_SET_POST_Z_PS_IMASK 0x0f1c +#define NVC797_SET_POST_Z_PS_IMASK_ENABLE 0:0 +#define NVC797_SET_POST_Z_PS_IMASK_ENABLE_FALSE 0x00000000 +#define NVC797_SET_POST_Z_PS_IMASK_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVC797_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVC797_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVC797_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVC797_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVC797_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVC797_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVC797_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVC797_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVC797_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVC797_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVC797_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVC797_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVC797_SET_BACK_STENCIL_MASK 0x0f58 +#define NVC797_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVC797_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVC797_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVC797_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVC797_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVC797_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVC797_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVC797_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVC797_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVC797_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVC797_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVC797_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVC797_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVC797_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC797_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVC797_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVC797_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVC797_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVC797_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVC797_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVC797_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVC797_SET_SAMPLE_MASK 0x0fa4 +#define NVC797_SET_SAMPLE_MASK_RASTER_OUT_ENABLE 0:0 +#define NVC797_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE 0x00000001 +#define NVC797_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE 4:4 +#define NVC797_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE 0x00000000 +#define NVC797_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_COLOR_TARGET_SAMPLE_MASK 0x0fa8 +#define NVC797_SET_COLOR_TARGET_SAMPLE_MASK_V 15:0 + +#define NVC797_SET_CT_MRT_ENABLE 0x0fac +#define NVC797_SET_CT_MRT_ENABLE_V 0:0 +#define NVC797_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVC797_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVC797_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVC797_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVC797_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVC797_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVC797_SET_TIR 0x0fb4 +#define NVC797_SET_TIR_MODE 1:0 +#define NVC797_SET_TIR_MODE_DISABLED 0x00000000 +#define NVC797_SET_TIR_MODE_RASTER_N_TARGET_M 0x00000001 + +#define NVC797_SET_ANTI_ALIAS_RASTER 0x0fb8 +#define NVC797_SET_ANTI_ALIAS_RASTER_SAMPLES 2:0 +#define NVC797_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1 0x00000000 +#define NVC797_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2 0x00000002 +#define NVC797_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC797_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC797_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4 0x00000006 + +#define NVC797_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVC797_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVC797_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVC797_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVC797_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVC797_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVC797_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVC797_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVC797_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVC797_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVC797_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_TIR_MODULATION 0x0fd4 +#define NVC797_SET_TIR_MODULATION_COMPONENT_SELECT 1:0 +#define NVC797_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION 0x00000000 +#define NVC797_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB 0x00000001 +#define NVC797_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY 0x00000002 +#define NVC797_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA 0x00000003 + +#define NVC797_SET_TIR_MODULATION_FUNCTION 0x0fd8 +#define NVC797_SET_TIR_MODULATION_FUNCTION_SELECT 0:0 +#define NVC797_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR 0x00000000 +#define NVC797_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE 0x00000001 + +#define NVC797_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVC797_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVC797_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVC797_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVC797_SET_ZT_A 0x0fe0 +#define NVC797_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_ZT_B 0x0fe4 +#define NVC797_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_ZT_FORMAT 0x0fe8 +#define NVC797_SET_ZT_FORMAT_V 4:0 +#define NVC797_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVC797_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVC797_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVC797_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVC797_SET_ZT_FORMAT_V_S8 0x00000017 +#define NVC797_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVC797_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVC797_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVC797_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVC797_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVC797_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVC797_SET_ZT_BLOCK_SIZE 0x0fec +#define NVC797_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVC797_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC797_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVC797_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC797_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC797_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC797_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC797_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC797_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC797_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVC797_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC797_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVC797_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVC797_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVC797_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVC797_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC797_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVC797_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVC797_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC797_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC797_SET_VIEWPORT_MULTICAST 0x1004 +#define NVC797_SET_VIEWPORT_MULTICAST_ORDER 0:0 +#define NVC797_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER 0x00000000 +#define NVC797_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER 0x00000001 + +#define NVC797_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVC797_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVC797_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVC797_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC797_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVC797_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVC797_SET_RESERVED_SW_METHOD00 0x1014 +#define NVC797_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC797_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVC797_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC797_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVC797_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC797_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVC797_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC797_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVC797_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC797_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_RESERVED_SW_METHOD01 0x1028 +#define NVC797_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD02 0x102c +#define NVC797_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC797_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) (0x1030+(i)*4) +#define NVC797_SET_TIR_MODULATION_COEFFICIENT_TABLE_V0 7:0 +#define NVC797_SET_TIR_MODULATION_COEFFICIENT_TABLE_V1 15:8 +#define NVC797_SET_TIR_MODULATION_COEFFICIENT_TABLE_V2 23:16 +#define NVC797_SET_TIR_MODULATION_COEFFICIENT_TABLE_V3 31:24 + +#define NVC797_SET_SPARE_NOOP01 0x1044 +#define NVC797_SET_SPARE_NOOP01_V 31:0 + +#define NVC797_SET_SPARE_NOOP02 0x1048 +#define NVC797_SET_SPARE_NOOP02_V 31:0 + +#define NVC797_SET_SPARE_NOOP03 0x104c +#define NVC797_SET_SPARE_NOOP03_V 31:0 + +#define NVC797_SET_SPARE_NOOP04 0x1050 +#define NVC797_SET_SPARE_NOOP04_V 31:0 + +#define NVC797_SET_SPARE_NOOP05 0x1054 +#define NVC797_SET_SPARE_NOOP05_V 31:0 + +#define NVC797_SET_SPARE_NOOP06 0x1058 +#define NVC797_SET_SPARE_NOOP06_V 31:0 + +#define NVC797_SET_SPARE_NOOP07 0x105c +#define NVC797_SET_SPARE_NOOP07_V 31:0 + +#define NVC797_SET_SPARE_NOOP08 0x1060 +#define NVC797_SET_SPARE_NOOP08_V 31:0 + +#define NVC797_SET_SPARE_NOOP09 0x1064 +#define NVC797_SET_SPARE_NOOP09_V 31:0 + +#define NVC797_SET_SPARE_NOOP10 0x1068 +#define NVC797_SET_SPARE_NOOP10_V 31:0 + +#define NVC797_SET_SPARE_NOOP11 0x106c +#define NVC797_SET_SPARE_NOOP11_V 31:0 + +#define NVC797_SET_SPARE_NOOP12 0x1070 +#define NVC797_SET_SPARE_NOOP12_V 31:0 + +#define NVC797_SET_SPARE_NOOP13 0x1074 +#define NVC797_SET_SPARE_NOOP13_V 31:0 + +#define NVC797_SET_SPARE_NOOP14 0x1078 +#define NVC797_SET_SPARE_NOOP14_V 31:0 + +#define NVC797_SET_SPARE_NOOP15 0x107c +#define NVC797_SET_SPARE_NOOP15_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVC797_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVC797_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVC797_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD06 0x10bc +#define NVC797_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVC797_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVC797_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVC797_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVC797_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVC797_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVC797_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVC797_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD13 0x10dc +#define NVC797_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC797_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVC797_UNBIND_ALL 0x10f4 +#define NVC797_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVC797_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVC797_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVC797_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVC797_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC797_SET_RESERVED_SW_METHOD14 0x1100 +#define NVC797_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC797_SET_RESERVED_SW_METHOD15 0x1104 +#define NVC797_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC797_NO_OPERATION_DATA_HI 0x110c +#define NVC797_NO_OPERATION_DATA_HI_V 31:0 + +#define NVC797_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVC797_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVC797_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVC797_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVC797_PM_TRIGGER_END 0x1114 +#define NVC797_PM_TRIGGER_END_V 31:0 + +#define NVC797_SET_VERTEX_ID_BASE 0x1118 +#define NVC797_SET_VERTEX_ID_BASE_V 31:0 + +#define NVC797_SET_STENCIL_COMPRESSION 0x111c +#define NVC797_SET_STENCIL_COMPRESSION_ENABLE 0:0 +#define NVC797_SET_STENCIL_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STENCIL_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC797_SET_TIR_CONTROL 0x1130 +#define NVC797_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES 0:0 +#define NVC797_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC797_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC797_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES 4:4 +#define NVC797_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC797_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC797_SET_TIR_CONTROL_REDUCE_COVERAGE 1:1 +#define NVC797_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE 0x00000000 +#define NVC797_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE 0x00000001 +#define NVC797_SET_TIR_CONTROL_REDUCTION_MODE 2:2 +#define NVC797_SET_TIR_CONTROL_REDUCTION_MODE_AFFINITY_MAP 0x00000000 +#define NVC797_SET_TIR_CONTROL_REDUCTION_MODE_TRUNCATION 0x00000001 + +#define NVC797_SET_MUTABLE_METHOD_CONTROL 0x1134 +#define NVC797_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT 0:0 +#define NVC797_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE 0x00000000 +#define NVC797_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE 0x00000001 + +#define NVC797_SET_POST_PS_INITIAL_COVERAGE 0x1138 +#define NVC797_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE 0:0 +#define NVC797_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE 0x00000000 +#define NVC797_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE 0x00000001 + +#define NVC797_SET_FILL_VIA_TRIANGLE 0x113c +#define NVC797_SET_FILL_VIA_TRIANGLE_MODE 1:0 +#define NVC797_SET_FILL_VIA_TRIANGLE_MODE_DISABLED 0x00000000 +#define NVC797_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL 0x00000001 +#define NVC797_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX 0x00000002 + +#define NVC797_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVC797_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVC797_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVC797_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVC797_FLUSH_PENDING_WRITES 0x1144 +#define NVC797_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVC797_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVC797_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC797_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC797_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC797_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVC797_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC797_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC797_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC797_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) (0x11e0+(i)*4) +#define NVC797_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X0 3:0 +#define NVC797_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y0 7:4 +#define NVC797_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X1 11:8 +#define NVC797_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y1 15:12 +#define NVC797_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X2 19:16 +#define NVC797_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y2 23:20 +#define NVC797_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X3 27:24 +#define NVC797_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y3 31:28 + +#define NVC797_SET_OFFSET_RENDER_TARGET_INDEX 0x11f0 +#define NVC797_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX 0:0 +#define NVC797_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE 0x00000000 +#define NVC797_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE 0x00000001 + +#define NVC797_FORCE_HEAVYWEIGHT_METHOD_SYNC 0x11f4 +#define NVC797_FORCE_HEAVYWEIGHT_METHOD_SYNC_V 31:0 + +#define NVC797_SET_COVERAGE_TO_COLOR 0x11f8 +#define NVC797_SET_COVERAGE_TO_COLOR_ENABLE 0:0 +#define NVC797_SET_COVERAGE_TO_COLOR_ENABLE_FALSE 0x00000000 +#define NVC797_SET_COVERAGE_TO_COLOR_ENABLE_TRUE 0x00000001 +#define NVC797_SET_COVERAGE_TO_COLOR_CT_SELECT 6:4 + +#define NVC797_DECOMPRESS_ZETA_SURFACE 0x11fc +#define NVC797_DECOMPRESS_ZETA_SURFACE_Z_ENABLE 0:0 +#define NVC797_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC797_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC797_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE 4:4 +#define NVC797_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC797_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_SCREEN_STATE_MASK 0x1204 +#define NVC797_SET_SCREEN_STATE_MASK_MASK 3:0 + +#define NVC797_SET_ZT_SPARSE 0x1208 +#define NVC797_SET_ZT_SPARSE_ENABLE 0:0 +#define NVC797_SET_ZT_SPARSE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZT_SPARSE_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ZT_SPARSE_UNMAPPED_COMPARE 1:1 +#define NVC797_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 0x00000000 +#define NVC797_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS 0x00000001 + +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC797_SET_CT_SELECT 0x121c +#define NVC797_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVC797_SET_CT_SELECT_TARGET0 6:4 +#define NVC797_SET_CT_SELECT_TARGET1 9:7 +#define NVC797_SET_CT_SELECT_TARGET2 12:10 +#define NVC797_SET_CT_SELECT_TARGET3 15:13 +#define NVC797_SET_CT_SELECT_TARGET4 18:16 +#define NVC797_SET_CT_SELECT_TARGET5 21:19 +#define NVC797_SET_CT_SELECT_TARGET6 24:22 +#define NVC797_SET_CT_SELECT_TARGET7 27:25 + +#define NVC797_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVC797_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL 0x1224 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE 1:0 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT 0x00000000 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE 0x00000001 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL 0x00000002 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE 2:2 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 0x00000000 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 0x00000001 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER 3:3 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED 0x00000000 +#define NVC797_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED 0x00000001 + +#define NVC797_SET_ZT_SIZE_A 0x1228 +#define NVC797_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVC797_SET_ZT_SIZE_B 0x122c +#define NVC797_SET_ZT_SIZE_B_HEIGHT 17:0 + +#define NVC797_SET_ZT_SIZE_C 0x1230 +#define NVC797_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVC797_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVC797_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC797_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVC797_SET_SAMPLER_BINDING 0x1234 +#define NVC797_SET_SAMPLER_BINDING_V 0:0 +#define NVC797_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVC797_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVC797_DRAW_AUTO 0x123c +#define NVC797_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVC797_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) (0x1240+(i)*4) +#define NVC797_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK_V 31:0 + +#define NVC797_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE 0x1260 +#define NVC797_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_INDEX 7:0 +#define NVC797_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_VALUE 23:8 + +#define NVC797_SET_BACK_END_COPY_A 0x1264 +#define NVC797_SET_BACK_END_COPY_A_DWORDS 7:0 +#define NVC797_SET_BACK_END_COPY_A_SATURATE32_ENABLE 8:8 +#define NVC797_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE 0x00000000 +#define NVC797_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE 0x00000001 +#define NVC797_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE 12:12 +#define NVC797_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE 0x00000000 +#define NVC797_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_BACK_END_COPY_B 0x1268 +#define NVC797_SET_BACK_END_COPY_B_SRC_ADDRESS_UPPER 7:0 + +#define NVC797_SET_BACK_END_COPY_C 0x126c +#define NVC797_SET_BACK_END_COPY_C_SRC_ADDRESS_LOWER 31:0 + +#define NVC797_SET_BACK_END_COPY_D 0x1270 +#define NVC797_SET_BACK_END_COPY_D_DEST_ADDRESS_UPPER 7:0 + +#define NVC797_SET_BACK_END_COPY_E 0x1274 +#define NVC797_SET_BACK_END_COPY_E_DEST_ADDRESS_LOWER 31:0 + +#define NVC797_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVC797_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 19:0 + +#define NVC797_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVC797_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVC797_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC797_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVC797_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVC797_CLEAR_ZCULL_REGION 0x12c8 +#define NVC797_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVC797_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVC797_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVC797_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVC797_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC797_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC797_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVC797_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC797_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC797_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVC797_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVC797_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVC797_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVC797_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVC797_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVC797_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVC797_SET_DEPTH_TEST 0x12cc +#define NVC797_SET_DEPTH_TEST_ENABLE 0:0 +#define NVC797_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVC797_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_FILL_MODE 0x12d0 +#define NVC797_SET_FILL_MODE_V 31:0 +#define NVC797_SET_FILL_MODE_V_POINT 0x00000001 +#define NVC797_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVC797_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVC797_SET_SHADE_MODE 0x12d4 +#define NVC797_SET_SHADE_MODE_V 31:0 +#define NVC797_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVC797_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVC797_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVC797_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC797_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC797_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVC797_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVC797_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVC797_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVC797_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVC797_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVC797_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVC797_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVC797_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_DEPTH_WRITE 0x12e8 +#define NVC797_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVC797_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_ALPHA_TEST 0x12ec +#define NVC797_SET_ALPHA_TEST_ENABLE 0:0 +#define NVC797_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVC797_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVC797_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVC797_DRAW_INLINE_INDEX4X8 0x1304 +#define NVC797_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVC797_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVC797_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVC797_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVC797_D3D_SET_CULL_MODE 0x1308 +#define NVC797_D3D_SET_CULL_MODE_V 31:0 +#define NVC797_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVC797_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVC797_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVC797_SET_DEPTH_FUNC 0x130c +#define NVC797_SET_DEPTH_FUNC_V 31:0 +#define NVC797_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVC797_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVC797_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC797_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC797_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVC797_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC797_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC797_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC797_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVC797_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVC797_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC797_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC797_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVC797_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC797_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC797_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC797_SET_ALPHA_REF 0x1310 +#define NVC797_SET_ALPHA_REF_V 31:0 + +#define NVC797_SET_ALPHA_FUNC 0x1314 +#define NVC797_SET_ALPHA_FUNC_V 31:0 +#define NVC797_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVC797_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVC797_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC797_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC797_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVC797_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC797_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC797_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC797_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVC797_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVC797_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC797_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC797_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVC797_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC797_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC797_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC797_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVC797_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVC797_SET_BLEND_CONST_RED 0x131c +#define NVC797_SET_BLEND_CONST_RED_V 31:0 + +#define NVC797_SET_BLEND_CONST_GREEN 0x1320 +#define NVC797_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVC797_SET_BLEND_CONST_BLUE 0x1324 +#define NVC797_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVC797_SET_BLEND_CONST_ALPHA 0x1328 +#define NVC797_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVC797_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC797_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC797_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC797_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC797_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC797_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC797_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVC797_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC797_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC797_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_BLEND_COLOR_OP 0x1340 +#define NVC797_SET_BLEND_COLOR_OP_V 31:0 +#define NVC797_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC797_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC797_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC797_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC797_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC797_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC797_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC797_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC797_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC797_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC797_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC797_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC797_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC797_SET_BLEND_ALPHA_OP 0x134c +#define NVC797_SET_BLEND_ALPHA_OP_V 31:0 +#define NVC797_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC797_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC797_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC797_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC797_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC797_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC797_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC797_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC797_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC797_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC797_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC797_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVC797_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVC797_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVC797_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC797_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC797_SET_SINGLE_ROP_CONTROL 0x135c +#define NVC797_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVC797_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC797_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_BLEND(i) (0x1360+(i)*4) +#define NVC797_SET_BLEND_ENABLE 0:0 +#define NVC797_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVC797_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_STENCIL_TEST 0x1380 +#define NVC797_SET_STENCIL_TEST_ENABLE 0:0 +#define NVC797_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC797_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_STENCIL_OP_FAIL 0x1384 +#define NVC797_SET_STENCIL_OP_FAIL_V 31:0 +#define NVC797_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC797_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC797_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC797_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC797_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC797_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC797_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC797_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC797_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC797_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC797_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC797_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC797_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC797_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC797_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC797_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC797_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVC797_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC797_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC797_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC797_SET_STENCIL_OP_ZPASS 0x138c +#define NVC797_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVC797_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC797_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC797_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC797_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC797_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC797_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC797_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC797_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC797_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC797_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC797_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC797_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC797_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC797_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC797_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC797_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC797_SET_STENCIL_FUNC 0x1390 +#define NVC797_SET_STENCIL_FUNC_V 31:0 +#define NVC797_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC797_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC797_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC797_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC797_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC797_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC797_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC797_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC797_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC797_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC797_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC797_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC797_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC797_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC797_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC797_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC797_SET_STENCIL_FUNC_REF 0x1394 +#define NVC797_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVC797_SET_STENCIL_FUNC_MASK 0x1398 +#define NVC797_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVC797_SET_STENCIL_MASK 0x139c +#define NVC797_SET_STENCIL_MASK_V 7:0 + +#define NVC797_SET_DRAW_AUTO_START 0x13a4 +#define NVC797_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVC797_SET_PS_SATURATE 0x13a8 +#define NVC797_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVC797_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVC797_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC797_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVC797_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVC797_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC797_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVC797_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVC797_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC797_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVC797_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVC797_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC797_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVC797_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVC797_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC797_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVC797_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVC797_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC797_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVC797_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVC797_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC797_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVC797_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVC797_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC797_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVC797_SET_WINDOW_ORIGIN 0x13ac +#define NVC797_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVC797_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVC797_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVC797_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVC797_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVC797_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVC797_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVC797_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC797_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVC797_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC797_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVC797_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVC797_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVC797_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC797_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC797_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC797_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC797_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC797_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC797_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVC797_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVC797_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVC797_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVC797_SET_PS_WARP_WATERMARKS 0x1450 +#define NVC797_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVC797_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVC797_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVC797_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVC797_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC797_STORE_ZCULL 0x1464 +#define NVC797_STORE_ZCULL_V 0:0 + +#define NVC797_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVC797_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVC797_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVC797_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVC797_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVC797_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVC797_LOAD_ZCULL 0x1500 +#define NVC797_LOAD_ZCULL_V 0:0 + +#define NVC797_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVC797_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVC797_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVC797_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC797_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC797_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVC797_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC797_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC797_SET_USER_CLIP_ENABLE 0x1510 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVC797_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVC797_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVC797_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVC797_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_POINT_SIZE 0x1518 +#define NVC797_SET_POINT_SIZE_V 31:0 + +#define NVC797_SET_ZCULL_STATS 0x151c +#define NVC797_SET_ZCULL_STATS_ENABLE 0:0 +#define NVC797_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_POINT_SPRITE 0x1520 +#define NVC797_SET_POINT_SPRITE_ENABLE 0:0 +#define NVC797_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC797_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC797_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC797_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC797_CLEAR_REPORT_VALUE 0x1530 +#define NVC797_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVC797_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVC797_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVC797_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVC797_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVC797_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVC797_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC797_CLEAR_REPORT_VALUE_TYPE_SCG_CLOCKS 0x00000009 + +#define NVC797_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVC797_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVC797_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVC797_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVC797_SET_ZT_SELECT 0x1538 +#define NVC797_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVC797_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVC797_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVC797_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVC797_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVC797_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVC797_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVC797_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVC797_SET_RENDER_ENABLE_A 0x1550 +#define NVC797_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_RENDER_ENABLE_B 0x1554 +#define NVC797_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_RENDER_ENABLE_C 0x1558 +#define NVC797_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC797_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC797_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC797_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC797_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC797_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC797_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC797_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC797_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC797_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC797_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVC797_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVC797_SET_ANTI_ALIASED_LINE 0x1570 +#define NVC797_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVC797_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC797_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC797_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_TEX_HEADER_POOL_C 0x157c +#define NVC797_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC797_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVC797_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVC797_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVC797_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVC797_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC797_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC797_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC797_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC797_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC797_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC797_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVC797_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVC797_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC797_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC797_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC797_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC797_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC797_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC797_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC797_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC797_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC797_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC797_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC797_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC797_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC797_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC797_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC797_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC797_SET_SRGB_WRITE 0x15b8 +#define NVC797_SET_SRGB_WRITE_ENABLE 0:0 +#define NVC797_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_DEPTH_BIAS 0x15bc +#define NVC797_SET_DEPTH_BIAS_V 31:0 + +#define NVC797_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVC797_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVC797_SET_RT_LAYER 0x15cc +#define NVC797_SET_RT_LAYER_V 15:0 +#define NVC797_SET_RT_LAYER_CONTROL 16:16 +#define NVC797_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVC797_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVC797_SET_ANTI_ALIAS 0x15d0 +#define NVC797_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVC797_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVC797_SET_EDGE_FLAG 0x15e4 +#define NVC797_SET_EDGE_FLAG_V 0:0 +#define NVC797_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVC797_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVC797_DRAW_INLINE_INDEX 0x15e8 +#define NVC797_DRAW_INLINE_INDEX_V 31:0 + +#define NVC797_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVC797_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVC797_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVC797_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVC797_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVC797_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVC797_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVC797_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVC797_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVC797_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVC797_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVC797_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVC797_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVC797_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVC797_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVC797_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVC797_SET_POINT_SPRITE_SELECT 0x1604 +#define NVC797_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVC797_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVC797_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVC797_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVC797_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVC797_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVC797_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVC797_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVC797_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVC797_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVC797_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVC797_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVC797_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVC797_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVC797_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVC797_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVC797_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVC797_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVC797_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVC797_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVC797_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVC797_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVC797_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVC797_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVC797_END 0x1614 +#define NVC797_END_V 0:0 + +#define NVC797_BEGIN 0x1618 +#define NVC797_BEGIN_OP 15:0 +#define NVC797_BEGIN_OP_POINTS 0x00000000 +#define NVC797_BEGIN_OP_LINES 0x00000001 +#define NVC797_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVC797_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVC797_BEGIN_OP_TRIANGLES 0x00000004 +#define NVC797_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVC797_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVC797_BEGIN_OP_QUADS 0x00000007 +#define NVC797_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVC797_BEGIN_OP_POLYGON 0x00000009 +#define NVC797_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVC797_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVC797_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_BEGIN_OP_PATCH 0x0000000E +#define NVC797_BEGIN_PRIMITIVE_ID 24:24 +#define NVC797_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC797_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC797_BEGIN_INSTANCE_ID 27:26 +#define NVC797_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVC797_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC797_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC797_BEGIN_SPLIT_MODE 30:29 +#define NVC797_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC797_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC797_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC797_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC797_BEGIN_INSTANCE_ITERATE_ENABLE 31:31 +#define NVC797_BEGIN_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC797_BEGIN_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_VERTEX_ID_COPY 0x161c +#define NVC797_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVC797_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVC797_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVC797_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVC797_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVC797_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVC797_LOAD_PRIMITIVE_ID 0x1624 +#define NVC797_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVC797_SET_SHADER_BASED_CULL 0x162c +#define NVC797_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVC797_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVC797_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVC797_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVC797_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVC797_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_CLASS_VERSION 0x1638 +#define NVC797_SET_CLASS_VERSION_CURRENT 15:0 +#define NVC797_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC797_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVC797_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVC797_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVC797_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVC797_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVC797_SET_DA_OUTPUT 0x164c +#define NVC797_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVC797_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVC797_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVC797_SET_ANTI_ALIASED_POINT 0x1658 +#define NVC797_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVC797_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_POINT_CENTER_MODE 0x165c +#define NVC797_SET_POINT_CENTER_MODE_V 31:0 +#define NVC797_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVC797_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVC797_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVC797_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVC797_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVC797_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVC797_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVC797_SET_LINE_STIPPLE 0x166c +#define NVC797_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVC797_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVC797_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVC797_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVC797_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVC797_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVC797_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVC797_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVC797_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVC797_SET_PROVOKING_VERTEX 0x1684 +#define NVC797_SET_PROVOKING_VERTEX_V 0:0 +#define NVC797_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVC797_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVC797_SET_TWO_SIDED_LIGHT 0x1688 +#define NVC797_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVC797_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_POLYGON_STIPPLE 0x168c +#define NVC797_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVC797_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_SHADER_CONTROL 0x1690 +#define NVC797_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVC797_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVC797_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVC797_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVC797_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVC797_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVC797_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVC797_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVC797_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVC797_CHECK_CLASS_VERSION 0x16a0 +#define NVC797_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVC797_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC797_SET_SPH_VERSION 0x16a4 +#define NVC797_SET_SPH_VERSION_CURRENT 15:0 +#define NVC797_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC797_CHECK_SPH_VERSION 0x16a8 +#define NVC797_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVC797_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC797_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVC797_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVC797_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC797_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVC797_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVC797_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVC797_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVC797_SET_SCG_GRAPHICS_PRIORITY 0x16bc +#define NVC797_SET_SCG_GRAPHICS_PRIORITY_PRIORITY 5:0 + +#define NVC797_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS(i) (0x16c0+(i)*4) +#define NVC797_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS_V 31:0 + +#define NVC797_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVC797_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVC797_SET_AAM_VERSION 0x1790 +#define NVC797_SET_AAM_VERSION_CURRENT 15:0 +#define NVC797_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC797_CHECK_AAM_VERSION 0x1794 +#define NVC797_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVC797_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC797_SET_ZT_LAYER 0x179c +#define NVC797_SET_ZT_LAYER_OFFSET 15:0 + +#define NVC797_SET_INDEX_BUFFER_A 0x17c8 +#define NVC797_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVC797_SET_INDEX_BUFFER_B 0x17cc +#define NVC797_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVC797_SET_INDEX_BUFFER_E 0x17d8 +#define NVC797_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVC797_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVC797_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVC797_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVC797_SET_INDEX_BUFFER_F 0x17dc +#define NVC797_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVC797_DRAW_INDEX_BUFFER 0x17e0 +#define NVC797_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC797_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVC797_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVC797_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVC797_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVC797_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVC797_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVC797_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVC797_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVC797_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVC797_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVC797_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVC797_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVC797_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVC797_OGL_SET_CULL 0x1918 +#define NVC797_OGL_SET_CULL_ENABLE 0:0 +#define NVC797_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVC797_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVC797_OGL_SET_FRONT_FACE 0x191c +#define NVC797_OGL_SET_FRONT_FACE_V 31:0 +#define NVC797_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVC797_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVC797_OGL_SET_CULL_FACE 0x1920 +#define NVC797_OGL_SET_CULL_FACE_V 31:0 +#define NVC797_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVC797_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVC797_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVC797_SET_VIEWPORT_PIXEL 0x1924 +#define NVC797_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVC797_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVC797_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVC797_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVC797_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVC797_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVC797_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE 17:16 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_USE_FIELD_MIN_Z_ZERO_MAX_Z_ONE 0x00000000 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MIN_Z_MAX_Z 0x00000001 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_ZERO_ONE 0x00000002 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MINUS_INF_PLUS_INF 0x00000003 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP 0x00000006 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVC797_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVC797_SET_USER_CLIP_OP 0x1940 +#define NVC797_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVC797_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVC797_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVC797_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVC797_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVC797_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVC797_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVC797_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVC797_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVC797_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVC797_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVC797_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVC797_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVC797_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVC797_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVC797_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVC797_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVC797_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVC797_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVC797_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVC797_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVC797_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVC797_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVC797_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVC797_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC797_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC797_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC797_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC797_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC797_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVC797_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVC797_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVC797_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVC797_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVC797_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVC797_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVC797_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVC797_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVC797_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVC797_INVALIDATE_ZCULL 0x1958 +#define NVC797_INVALIDATE_ZCULL_V 31:0 +#define NVC797_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVC797_SET_ZCULL 0x1968 +#define NVC797_SET_ZCULL_Z_ENABLE 0:0 +#define NVC797_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVC797_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_ZCULL_BOUNDS 0x196c +#define NVC797_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVC797_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVC797_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVC797_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC797_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVC797_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVC797_ZCULL_SYNC 0x1978 +#define NVC797_ZCULL_SYNC_V 31:0 + +#define NVC797_SET_CLIP_ID_TEST 0x197c +#define NVC797_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVC797_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVC797_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVC797_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVC797_SET_CLIP_ID 0x1984 +#define NVC797_SET_CLIP_ID_V 31:0 + +#define NVC797_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVC797_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVC797_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVC797_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVC797_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVC797_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVC797_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVC797_SET_LOGIC_OP 0x19c4 +#define NVC797_SET_LOGIC_OP_ENABLE 0:0 +#define NVC797_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVC797_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_LOGIC_OP_FUNC 0x19c8 +#define NVC797_SET_LOGIC_OP_FUNC_V 31:0 +#define NVC797_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVC797_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVC797_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVC797_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVC797_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVC797_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVC797_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVC797_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVC797_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVC797_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVC797_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVC797_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVC797_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVC797_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVC797_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVC797_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVC797_SET_Z_COMPRESSION 0x19cc +#define NVC797_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVC797_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC797_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC797_CLEAR_SURFACE 0x19d0 +#define NVC797_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVC797_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC797_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC797_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVC797_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC797_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC797_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVC797_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVC797_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVC797_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVC797_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVC797_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVC797_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVC797_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVC797_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVC797_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVC797_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVC797_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVC797_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVC797_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVC797_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVC797_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVC797_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVC797_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVC797_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC797_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVC797_SET_CT_WRITE_R_ENABLE 0:0 +#define NVC797_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVC797_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVC797_SET_CT_WRITE_G_ENABLE 4:4 +#define NVC797_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVC797_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVC797_SET_CT_WRITE_B_ENABLE 8:8 +#define NVC797_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVC797_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVC797_SET_CT_WRITE_A_ENABLE 12:12 +#define NVC797_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVC797_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVC797_PIPE_NOP 0x1a2c +#define NVC797_PIPE_NOP_V 31:0 + +#define NVC797_SET_SPARE00 0x1a30 +#define NVC797_SET_SPARE00_V 31:0 + +#define NVC797_SET_SPARE01 0x1a34 +#define NVC797_SET_SPARE01_V 31:0 + +#define NVC797_SET_SPARE02 0x1a38 +#define NVC797_SET_SPARE02_V 31:0 + +#define NVC797_SET_SPARE03 0x1a3c +#define NVC797_SET_SPARE03_V 31:0 + +#define NVC797_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC797_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC797_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC797_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC797_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC797_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC797_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVC797_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC797_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVC797_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVC797_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVC797_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVC797_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVC797_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC797_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_SCG_CLOCKS 0x00000008 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_TIMESTAMP 0x00000014 +#define NVC797_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC797_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVC797_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVC797_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC797_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC797_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVC797_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVC797_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVC797_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVC797_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVC797_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVC797_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVC797_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVC797_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVC797_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVC797_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVC797_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVC797_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVC797_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC797_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVC797_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC797_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVC797_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC797_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVC797_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVC797_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVC797_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC797_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC797_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC797_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC797_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC797_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVC797_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVC797_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVC797_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVC797_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVC797_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVC797_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVC797_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVC797_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVC797_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVC797_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVC797_SET_PIPELINE_RESERVED_B(j) (0x2004+(j)*64) +#define NVC797_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVC797_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVC797_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVC797_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVC797_SET_PIPELINE_REGISTER_COUNT_V 8:0 + +#define NVC797_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVC797_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVC797_SET_PIPELINE_PROGRAM_ADDRESS_A(j) (0x2014+(j)*64) +#define NVC797_SET_PIPELINE_PROGRAM_ADDRESS_A_UPPER 7:0 + +#define NVC797_SET_PIPELINE_PROGRAM_ADDRESS_B(j) (0x2018+(j)*64) +#define NVC797_SET_PIPELINE_PROGRAM_ADDRESS_B_LOWER 31:0 + +#define NVC797_SET_PIPELINE_PROGRAM_PREFETCH(j) (0x201c+(j)*64) +#define NVC797_SET_PIPELINE_PROGRAM_PREFETCH_SIZE_IN_BLOCKS 6:0 + +#define NVC797_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVC797_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVC797_SET_FALCON00 0x2300 +#define NVC797_SET_FALCON00_V 31:0 + +#define NVC797_SET_FALCON01 0x2304 +#define NVC797_SET_FALCON01_V 31:0 + +#define NVC797_SET_FALCON02 0x2308 +#define NVC797_SET_FALCON02_V 31:0 + +#define NVC797_SET_FALCON03 0x230c +#define NVC797_SET_FALCON03_V 31:0 + +#define NVC797_SET_FALCON04 0x2310 +#define NVC797_SET_FALCON04_V 31:0 + +#define NVC797_SET_FALCON05 0x2314 +#define NVC797_SET_FALCON05_V 31:0 + +#define NVC797_SET_FALCON06 0x2318 +#define NVC797_SET_FALCON06_V 31:0 + +#define NVC797_SET_FALCON07 0x231c +#define NVC797_SET_FALCON07_V 31:0 + +#define NVC797_SET_FALCON08 0x2320 +#define NVC797_SET_FALCON08_V 31:0 + +#define NVC797_SET_FALCON09 0x2324 +#define NVC797_SET_FALCON09_V 31:0 + +#define NVC797_SET_FALCON10 0x2328 +#define NVC797_SET_FALCON10_V 31:0 + +#define NVC797_SET_FALCON11 0x232c +#define NVC797_SET_FALCON11_V 31:0 + +#define NVC797_SET_FALCON12 0x2330 +#define NVC797_SET_FALCON12_V 31:0 + +#define NVC797_SET_FALCON13 0x2334 +#define NVC797_SET_FALCON13_V 31:0 + +#define NVC797_SET_FALCON14 0x2338 +#define NVC797_SET_FALCON14_V 31:0 + +#define NVC797_SET_FALCON15 0x233c +#define NVC797_SET_FALCON15_V 31:0 + +#define NVC797_SET_FALCON16 0x2340 +#define NVC797_SET_FALCON16_V 31:0 + +#define NVC797_SET_FALCON17 0x2344 +#define NVC797_SET_FALCON17_V 31:0 + +#define NVC797_SET_FALCON18 0x2348 +#define NVC797_SET_FALCON18_V 31:0 + +#define NVC797_SET_FALCON19 0x234c +#define NVC797_SET_FALCON19_V 31:0 + +#define NVC797_SET_FALCON20 0x2350 +#define NVC797_SET_FALCON20_V 31:0 + +#define NVC797_SET_FALCON21 0x2354 +#define NVC797_SET_FALCON21_V 31:0 + +#define NVC797_SET_FALCON22 0x2358 +#define NVC797_SET_FALCON22_V 31:0 + +#define NVC797_SET_FALCON23 0x235c +#define NVC797_SET_FALCON23_V 31:0 + +#define NVC797_SET_FALCON24 0x2360 +#define NVC797_SET_FALCON24_V 31:0 + +#define NVC797_SET_FALCON25 0x2364 +#define NVC797_SET_FALCON25_V 31:0 + +#define NVC797_SET_FALCON26 0x2368 +#define NVC797_SET_FALCON26_V 31:0 + +#define NVC797_SET_FALCON27 0x236c +#define NVC797_SET_FALCON27_V 31:0 + +#define NVC797_SET_FALCON28 0x2370 +#define NVC797_SET_FALCON28_V 31:0 + +#define NVC797_SET_FALCON29 0x2374 +#define NVC797_SET_FALCON29_V 31:0 + +#define NVC797_SET_FALCON30 0x2378 +#define NVC797_SET_FALCON30_V 31:0 + +#define NVC797_SET_FALCON31 0x237c +#define NVC797_SET_FALCON31_V 31:0 + +#define NVC797_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVC797_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVC797_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVC797_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVC797_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVC797_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVC797_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVC797_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVC797_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVC797_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVC797_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVC797_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVC797_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVC797_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVC797_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVC797_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVC797_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVC797_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVC797_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVC797_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVC797_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVC797_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVC797_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVC797_SET_TRAP_HANDLER_A 0x25f8 +#define NVC797_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC797_SET_TRAP_HANDLER_B 0x25fc +#define NVC797_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC797_SET_COLOR_CLAMP 0x2600 +#define NVC797_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVC797_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVC797_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVC797_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVC797_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVC797_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVC797_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVC797_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVC797_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC797_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC797_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC797_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC797_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC797_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC797_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC797_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC797_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC797_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC797_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC797_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC797_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC797_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC797_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVC797_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVC797_CALL_MME_MACRO_V 31:0 + +#define NVC797_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVC797_CALL_MME_DATA_V 31:0 + +#endif /* _cl_ampere_b_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc7b0.h b/userspace/sdks/nv570/inc/class/clc7b0.h new file mode 100644 index 0000000..8c98771 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc7b0.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef clc7b0_h_ +#define clc7b0_h_ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC7B0_VIDEO_DECODER (0x0000C7B0) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clc7b0_h + diff --git a/userspace/sdks/nv570/inc/class/clc7b5.h b/userspace/sdks/nv570/inc/class/clc7b5.h new file mode 100644 index 0000000..df331e8 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc7b5.h @@ -0,0 +1,304 @@ +/******************************************************************************* + Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#include "nvtypes.h" + +#ifndef _clc7b5_h_ +#define _clc7b5_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define AMPERE_DMA_COPY_B (0x0000C7B5) + +#define NVC7B5_NOP (0x00000100) +#define NVC7B5_NOP_PARAMETER 31:0 +#define NVC7B5_PM_TRIGGER (0x00000140) +#define NVC7B5_PM_TRIGGER_V 31:0 +#define NVC7B5_SET_MONITORED_FENCE_TYPE (0x0000021C) +#define NVC7B5_SET_MONITORED_FENCE_TYPE_TYPE 0:0 +#define NVC7B5_SET_MONITORED_FENCE_TYPE_TYPE_MONITORED_FENCE (0x00000000) +#define NVC7B5_SET_MONITORED_FENCE_TYPE_TYPE_MONITORED_FENCE_EXT (0x00000001) +#define NVC7B5_SET_MONITORED_FENCE_SIGNAL_ADDR_BASE_UPPER (0x00000220) +#define NVC7B5_SET_MONITORED_FENCE_SIGNAL_ADDR_BASE_UPPER_UPPER 16:0 +#define NVC7B5_SET_MONITORED_FENCE_SIGNAL_ADDR_BASE_LOWER (0x00000224) +#define NVC7B5_SET_MONITORED_FENCE_SIGNAL_ADDR_BASE_LOWER_LOWER 31:0 +#define NVC7B5_SET_SEMAPHORE_A (0x00000240) +#define NVC7B5_SET_SEMAPHORE_A_UPPER 16:0 +#define NVC7B5_SET_SEMAPHORE_B (0x00000244) +#define NVC7B5_SET_SEMAPHORE_B_LOWER 31:0 +#define NVC7B5_SET_SEMAPHORE_PAYLOAD (0x00000248) +#define NVC7B5_SET_SEMAPHORE_PAYLOAD_PAYLOAD 31:0 +#define NVC7B5_SET_SEMAPHORE_PAYLOAD_UPPER (0x0000024C) +#define NVC7B5_SET_SEMAPHORE_PAYLOAD_UPPER_PAYLOAD 31:0 +#define NVC7B5_SET_RENDER_ENABLE_A (0x00000254) +#define NVC7B5_SET_RENDER_ENABLE_A_UPPER 7:0 +#define NVC7B5_SET_RENDER_ENABLE_B (0x00000258) +#define NVC7B5_SET_RENDER_ENABLE_B_LOWER 31:0 +#define NVC7B5_SET_RENDER_ENABLE_C (0x0000025C) +#define NVC7B5_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC7B5_SET_RENDER_ENABLE_C_MODE_FALSE (0x00000000) +#define NVC7B5_SET_RENDER_ENABLE_C_MODE_TRUE (0x00000001) +#define NVC7B5_SET_RENDER_ENABLE_C_MODE_CONDITIONAL (0x00000002) +#define NVC7B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL (0x00000003) +#define NVC7B5_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL (0x00000004) +#define NVC7B5_SET_SRC_PHYS_MODE (0x00000260) +#define NVC7B5_SET_SRC_PHYS_MODE_TARGET 1:0 +#define NVC7B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC7B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC7B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC7B5_SET_SRC_PHYS_MODE_TARGET_PEERMEM (0x00000003) +#define NVC7B5_SET_SRC_PHYS_MODE_BASIC_KIND 5:2 +#define NVC7B5_SET_SRC_PHYS_MODE_PEER_ID 8:6 +#define NVC7B5_SET_SRC_PHYS_MODE_FLA 9:9 +#define NVC7B5_SET_DST_PHYS_MODE (0x00000264) +#define NVC7B5_SET_DST_PHYS_MODE_TARGET 1:0 +#define NVC7B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC7B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC7B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC7B5_SET_DST_PHYS_MODE_TARGET_PEERMEM (0x00000003) +#define NVC7B5_SET_DST_PHYS_MODE_BASIC_KIND 5:2 +#define NVC7B5_SET_DST_PHYS_MODE_PEER_ID 8:6 +#define NVC7B5_SET_DST_PHYS_MODE_FLA 9:9 +#define NVC7B5_LAUNCH_DMA (0x00000300) +#define NVC7B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVC7B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVC7B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVC7B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVC7B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 +#define NVC7B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) +#define NVC7B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) +#define NVC7B5_LAUNCH_DMA_FLUSH_TYPE 25:25 +#define NVC7B5_LAUNCH_DMA_FLUSH_TYPE_SYS (0x00000000) +#define NVC7B5_LAUNCH_DMA_FLUSH_TYPE_GL (0x00000001) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_TYPE_NONE (0x00000000) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_SEMAPHORE_NO_TIMESTAMP (0x00000001) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_SEMAPHORE_WITH_TIMESTAMP (0x00000002) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_FOUR_WORD_SEMAPHORE (0x00000002) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_CONDITIONAL_INTR_SEMAPHORE (0x00000003) +#define NVC7B5_LAUNCH_DMA_INTERRUPT_TYPE 6:5 +#define NVC7B5_LAUNCH_DMA_INTERRUPT_TYPE_NONE (0x00000000) +#define NVC7B5_LAUNCH_DMA_INTERRUPT_TYPE_BLOCKING (0x00000001) +#define NVC7B5_LAUNCH_DMA_INTERRUPT_TYPE_NON_BLOCKING (0x00000002) +#define NVC7B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 +#define NVC7B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC7B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC7B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 +#define NVC7B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR (0x00000000) +#define NVC7B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC7B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 +#define NVC7B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) +#define NVC7B5_LAUNCH_DMA_MULTI_LINE_ENABLE_TRUE (0x00000001) +#define NVC7B5_LAUNCH_DMA_REMAP_ENABLE 10:10 +#define NVC7B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) +#define NVC7B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) +#define NVC7B5_LAUNCH_DMA_FORCE_RMWDISABLE 11:11 +#define NVC7B5_LAUNCH_DMA_FORCE_RMWDISABLE_FALSE (0x00000000) +#define NVC7B5_LAUNCH_DMA_FORCE_RMWDISABLE_TRUE (0x00000001) +#define NVC7B5_LAUNCH_DMA_SRC_TYPE 12:12 +#define NVC7B5_LAUNCH_DMA_SRC_TYPE_VIRTUAL (0x00000000) +#define NVC7B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) +#define NVC7B5_LAUNCH_DMA_DST_TYPE 13:13 +#define NVC7B5_LAUNCH_DMA_DST_TYPE_VIRTUAL (0x00000000) +#define NVC7B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION 17:14 +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMIN (0x00000000) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IMAX (0x00000001) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IXOR (0x00000002) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IAND (0x00000003) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IOR (0x00000004) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_IADD (0x00000005) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INC (0x00000006) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_DEC (0x00000007) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INVALIDA (0x00000008) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INVALIDB (0x00000009) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FADD (0x0000000A) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FMIN (0x0000000B) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_FMAX (0x0000000C) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INVALIDC (0x0000000D) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INVALIDD (0x0000000E) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INVALIDE (0x0000000F) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN 18:18 +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_SIGNED (0x00000000) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_UNSIGNED (0x00000001) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE 19:19 +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_FALSE (0x00000000) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_TRUE (0x00000001) +#define NVC7B5_LAUNCH_DMA_VPRMODE 23:22 +#define NVC7B5_LAUNCH_DMA_VPRMODE_VPR_NONE (0x00000000) +#define NVC7B5_LAUNCH_DMA_VPRMODE_VPR_VID2VID (0x00000001) +#define NVC7B5_LAUNCH_DMA_RESERVED_START_OF_COPY 24:24 +#define NVC7B5_LAUNCH_DMA_DISABLE_PLC 26:26 +#define NVC7B5_LAUNCH_DMA_DISABLE_PLC_FALSE (0x00000000) +#define NVC7B5_LAUNCH_DMA_DISABLE_PLC_TRUE (0x00000001) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_PAYLOAD_SIZE 27:27 +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_PAYLOAD_SIZE_ONE_WORD (0x00000000) +#define NVC7B5_LAUNCH_DMA_SEMAPHORE_PAYLOAD_SIZE_TWO_WORD (0x00000001) +#define NVC7B5_LAUNCH_DMA_RESERVED_ERR_CODE 31:28 +#define NVC7B5_OFFSET_IN_UPPER (0x00000400) +#define NVC7B5_OFFSET_IN_UPPER_UPPER 16:0 +#define NVC7B5_OFFSET_IN_LOWER (0x00000404) +#define NVC7B5_OFFSET_IN_LOWER_VALUE 31:0 +#define NVC7B5_OFFSET_OUT_UPPER (0x00000408) +#define NVC7B5_OFFSET_OUT_UPPER_UPPER 16:0 +#define NVC7B5_OFFSET_OUT_LOWER (0x0000040C) +#define NVC7B5_OFFSET_OUT_LOWER_VALUE 31:0 +#define NVC7B5_PITCH_IN (0x00000410) +#define NVC7B5_PITCH_IN_VALUE 31:0 +#define NVC7B5_PITCH_OUT (0x00000414) +#define NVC7B5_PITCH_OUT_VALUE 31:0 +#define NVC7B5_LINE_LENGTH_IN (0x00000418) +#define NVC7B5_LINE_LENGTH_IN_VALUE 31:0 +#define NVC7B5_LINE_COUNT (0x0000041C) +#define NVC7B5_LINE_COUNT_VALUE 31:0 +#define NVC7B5_SET_REMAP_CONST_A (0x00000700) +#define NVC7B5_SET_REMAP_CONST_A_V 31:0 +#define NVC7B5_SET_REMAP_CONST_B (0x00000704) +#define NVC7B5_SET_REMAP_CONST_B_V 31:0 +#define NVC7B5_SET_REMAP_COMPONENTS (0x00000708) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_X 2:0 +#define NVC7B5_SET_REMAP_COMPONENTS_DST_X_SRC_X (0x00000000) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_X_SRC_Y (0x00000001) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_X_SRC_Z (0x00000002) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_X_SRC_W (0x00000003) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_X_NO_WRITE (0x00000006) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Y 6:4 +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Y_SRC_X (0x00000000) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Y (0x00000001) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Y_SRC_Z (0x00000002) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Y_SRC_W (0x00000003) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Y_CONST_A (0x00000004) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Y_NO_WRITE (0x00000006) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Z 10:8 +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Z_SRC_X (0x00000000) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Y (0x00000001) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Z_SRC_Z (0x00000002) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Z_SRC_W (0x00000003) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Z_CONST_A (0x00000004) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Z_CONST_B (0x00000005) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_Z_NO_WRITE (0x00000006) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_W 14:12 +#define NVC7B5_SET_REMAP_COMPONENTS_DST_W_SRC_X (0x00000000) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_W_SRC_Y (0x00000001) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_W_SRC_Z (0x00000002) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_W_SRC_W (0x00000003) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_W_CONST_A (0x00000004) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_W_CONST_B (0x00000005) +#define NVC7B5_SET_REMAP_COMPONENTS_DST_W_NO_WRITE (0x00000006) +#define NVC7B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 +#define NVC7B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) +#define NVC7B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_TWO (0x00000001) +#define NVC7B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_THREE (0x00000002) +#define NVC7B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS 21:20 +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_ONE (0x00000000) +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_TWO (0x00000001) +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_THREE (0x00000002) +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_SRC_COMPONENTS_FOUR (0x00000003) +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_THREE (0x00000002) +#define NVC7B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_FOUR (0x00000003) +#define NVC7B5_SET_DST_BLOCK_SIZE (0x0000070C) +#define NVC7B5_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC7B5_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC7B5_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC7B5_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC7B5_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC7B5_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC7B5_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC7B5_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC7B5_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC7B5_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC7B5_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC7B5_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC7B5_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC7B5_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC7B5_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC7B5_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC7B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC7B5_SET_DST_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC7B5_SET_DST_WIDTH (0x00000710) +#define NVC7B5_SET_DST_WIDTH_V 31:0 +#define NVC7B5_SET_DST_HEIGHT (0x00000714) +#define NVC7B5_SET_DST_HEIGHT_V 31:0 +#define NVC7B5_SET_DST_DEPTH (0x00000718) +#define NVC7B5_SET_DST_DEPTH_V 31:0 +#define NVC7B5_SET_DST_LAYER (0x0000071C) +#define NVC7B5_SET_DST_LAYER_V 31:0 +#define NVC7B5_SET_DST_ORIGIN (0x00000720) +#define NVC7B5_SET_DST_ORIGIN_X 15:0 +#define NVC7B5_SET_DST_ORIGIN_Y 31:16 +#define NVC7B5_SET_SRC_BLOCK_SIZE (0x00000728) +#define NVC7B5_SET_SRC_BLOCK_SIZE_WIDTH 3:0 +#define NVC7B5_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB (0x00000000) +#define NVC7B5_SET_SRC_BLOCK_SIZE_HEIGHT 7:4 +#define NVC7B5_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB (0x00000000) +#define NVC7B5_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS (0x00000001) +#define NVC7B5_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC7B5_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC7B5_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC7B5_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC7B5_SET_SRC_BLOCK_SIZE_DEPTH 11:8 +#define NVC7B5_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB (0x00000000) +#define NVC7B5_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS (0x00000001) +#define NVC7B5_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS (0x00000002) +#define NVC7B5_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS (0x00000003) +#define NVC7B5_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS (0x00000004) +#define NVC7B5_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS (0x00000005) +#define NVC7B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT 15:12 +#define NVC7B5_SET_SRC_BLOCK_SIZE_GOB_HEIGHT_GOB_HEIGHT_FERMI_8 (0x00000001) +#define NVC7B5_SET_SRC_WIDTH (0x0000072C) +#define NVC7B5_SET_SRC_WIDTH_V 31:0 +#define NVC7B5_SET_SRC_HEIGHT (0x00000730) +#define NVC7B5_SET_SRC_HEIGHT_V 31:0 +#define NVC7B5_SET_SRC_DEPTH (0x00000734) +#define NVC7B5_SET_SRC_DEPTH_V 31:0 +#define NVC7B5_SET_SRC_LAYER (0x00000738) +#define NVC7B5_SET_SRC_LAYER_V 31:0 +#define NVC7B5_SET_SRC_ORIGIN (0x0000073C) +#define NVC7B5_SET_SRC_ORIGIN_X 15:0 +#define NVC7B5_SET_SRC_ORIGIN_Y 31:16 +#define NVC7B5_SRC_ORIGIN_X (0x00000744) +#define NVC7B5_SRC_ORIGIN_X_VALUE 31:0 +#define NVC7B5_SRC_ORIGIN_Y (0x00000748) +#define NVC7B5_SRC_ORIGIN_Y_VALUE 31:0 +#define NVC7B5_DST_ORIGIN_X (0x0000074C) +#define NVC7B5_DST_ORIGIN_X_VALUE 31:0 +#define NVC7B5_DST_ORIGIN_Y (0x00000750) +#define NVC7B5_DST_ORIGIN_Y_VALUE 31:0 +#define NVC7B5_PM_TRIGGER_END (0x00001114) +#define NVC7B5_PM_TRIGGER_END_V 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc7b5_h + diff --git a/userspace/sdks/nv570/inc/class/clc7b7.h b/userspace/sdks/nv570/inc/class/clc7b7.h new file mode 100644 index 0000000..909195b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc7b7.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef clc7b7_h_ +#define clc7b7_h_ + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC7B7_VIDEO_ENCODER (0x0000C7B7) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // clc7b7_h + diff --git a/userspace/sdks/nv570/inc/class/clc7c0.h b/userspace/sdks/nv570/inc/class/clc7c0.h new file mode 100644 index 0000000..6eb2889 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc7c0.h @@ -0,0 +1,848 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_ampere_compute_b_h_ +#define _cl_ampere_compute_b_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl ampere_compute_b */ + +#include "nvtypes.h" + +#define AMPERE_COMPUTE_B 0xC7C0 + +#define NVC7C0_SET_OBJECT 0x0000 +#define NVC7C0_SET_OBJECT_CLASS_ID 15:0 +#define NVC7C0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC7C0_NO_OPERATION 0x0100 +#define NVC7C0_NO_OPERATION_V 31:0 + +#define NVC7C0_SET_NOTIFY_A 0x0104 +#define NVC7C0_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC7C0_SET_NOTIFY_B 0x0108 +#define NVC7C0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC7C0_NOTIFY 0x010c +#define NVC7C0_NOTIFY_TYPE 31:0 +#define NVC7C0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC7C0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC7C0_WAIT_FOR_IDLE 0x0110 +#define NVC7C0_WAIT_FOR_IDLE_V 31:0 + +#define NVC7C0_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVC7C0_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVC7C0_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVC7C0_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVC7C0_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVC7C0_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVC7C0_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVC7C0_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVC7C0_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVC7C0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC7C0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC7C0_SEND_GO_IDLE 0x013c +#define NVC7C0_SEND_GO_IDLE_V 31:0 + +#define NVC7C0_PM_TRIGGER 0x0140 +#define NVC7C0_PM_TRIGGER_V 31:0 + +#define NVC7C0_PM_TRIGGER_WFI 0x0144 +#define NVC7C0_PM_TRIGGER_WFI_V 31:0 + +#define NVC7C0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC7C0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC7C0_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC7C0_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC7C0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC7C0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC7C0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC7C0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC7C0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER 0x0158 +#define NVC7C0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER_PAYLOAD_LOWER 31:0 + +#define NVC7C0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER 0x015c +#define NVC7C0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER_PAYLOAD_UPPER 31:0 + +#define NVC7C0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER 0x0160 +#define NVC7C0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER_LOWER 31:0 + +#define NVC7C0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER 0x0164 +#define NVC7C0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER_UPPER 7:0 + +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE 0x0168 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION 1:0 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_RELEASE 0x00000000 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_ACQUIRE 0x00000001 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_REPORT_ONLY 0x00000002 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_OPERATION_TRAP 0x00000003 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE 2:2 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE 4:3 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE 5:5 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE 6:6 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP 9:7 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_INC 0x00000003 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_AND 0x00000005 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_OR 0x00000006 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT 11:10 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64 12:12 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_FALSE 0x00000000 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_TRUE 0x00000001 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE 14:13 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVC7C0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 + +#define NVC7C0_LINE_LENGTH_IN 0x0180 +#define NVC7C0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC7C0_LINE_COUNT 0x0184 +#define NVC7C0_LINE_COUNT_VALUE 31:0 + +#define NVC7C0_OFFSET_OUT_UPPER 0x0188 +#define NVC7C0_OFFSET_OUT_UPPER_VALUE 16:0 + +#define NVC7C0_OFFSET_OUT 0x018c +#define NVC7C0_OFFSET_OUT_VALUE 31:0 + +#define NVC7C0_PITCH_OUT 0x0190 +#define NVC7C0_PITCH_OUT_VALUE 31:0 + +#define NVC7C0_SET_DST_BLOCK_SIZE 0x0194 +#define NVC7C0_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC7C0_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC7C0_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC7C0_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC7C0_SET_DST_WIDTH 0x0198 +#define NVC7C0_SET_DST_WIDTH_V 31:0 + +#define NVC7C0_SET_DST_HEIGHT 0x019c +#define NVC7C0_SET_DST_HEIGHT_V 31:0 + +#define NVC7C0_SET_DST_DEPTH 0x01a0 +#define NVC7C0_SET_DST_DEPTH_V 31:0 + +#define NVC7C0_SET_DST_LAYER 0x01a4 +#define NVC7C0_SET_DST_LAYER_V 31:0 + +#define NVC7C0_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC7C0_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC7C0_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC7C0_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC7C0_LAUNCH_DMA 0x01b0 +#define NVC7C0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC7C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC7C0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC7C0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC7C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC7C0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC7C0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC7C0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC7C0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC7C0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC7C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC7C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC7C0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC7C0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC7C0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC7C0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC7C0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC7C0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC7C0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC7C0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC7C0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC7C0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC7C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC7C0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC7C0_LOAD_INLINE_DATA 0x01b4 +#define NVC7C0_LOAD_INLINE_DATA_V 31:0 + +#define NVC7C0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC7C0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC7C0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC7C0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC7C0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC7C0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC7C0_SET_SM_SCG_CONTROL 0x01e8 +#define NVC7C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS 0:0 +#define NVC7C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_FALSE 0x00000000 +#define NVC7C0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_TRUE 0x00000001 + +#define NVC7C0_SET_MME_SWITCH_STATE 0x01ec +#define NVC7C0_SET_MME_SWITCH_STATE_VALID 0:0 +#define NVC7C0_SET_MME_SWITCH_STATE_VALID_FALSE 0x00000000 +#define NVC7C0_SET_MME_SWITCH_STATE_VALID_TRUE 0x00000001 +#define NVC7C0_SET_MME_SWITCH_STATE_SAVE_MACRO 11:4 +#define NVC7C0_SET_MME_SWITCH_STATE_RESTORE_MACRO 19:12 + +#define NVC7C0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC7C0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC7C0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC7C0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC7C0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC7C0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC7C0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC7C0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVC7C0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVC7C0_PERFMON_TRANSFER 0x0210 +#define NVC7C0_PERFMON_TRANSFER_V 31:0 + +#define NVC7C0_SET_QMD_VIRTUALIZATION_BASE_A 0x0214 +#define NVC7C0_SET_QMD_VIRTUALIZATION_BASE_A_ADDRESS_UPPER 7:0 + +#define NVC7C0_SET_QMD_VIRTUALIZATION_BASE_B 0x0218 +#define NVC7C0_SET_QMD_VIRTUALIZATION_BASE_B_ADDRESS_LOWER 31:0 + +#define NVC7C0_INVALIDATE_SHADER_CACHES 0x021c +#define NVC7C0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC7C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC7C0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC7C0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC7C0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC7C0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC7C0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC7C0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC7C0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC7C0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC7C0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC7C0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC7C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC7C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC7C0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC7C0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVC7C0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVC7C0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVC7C0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD03 0x022c +#define NVC7C0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVC7C0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVC7C0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVC7C0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD07 0x023c +#define NVC7C0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC7C0_SET_CWD_REF_COUNTER 0x0248 +#define NVC7C0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVC7C0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVC7C0_SET_RESERVED_SW_METHOD08 0x024c +#define NVC7C0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVC7C0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVC7C0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVC7C0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD12 0x025c +#define NVC7C0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVC7C0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVC7C0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC7C0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVC7C0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC7C0_SET_SCG_CONTROL 0x0270 +#define NVC7C0_SET_SCG_CONTROL_COMPUTE1_MAX_SM_COUNT 8:0 +#define NVC7C0_SET_SCG_CONTROL_COMPUTE1_MIN_SM_COUNT 20:12 +#define NVC7C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE 24:24 +#define NVC7C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_FALSE 0x00000000 +#define NVC7C0_SET_SCG_CONTROL_DISABLE_COMPUTE1_LIMIT_IN_ALL_COMPUTE_TRUE 0x00000001 + +#define NVC7C0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVC7C0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC7C0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC7C0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVC7C0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVC7C0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC7C0_SET_QMD_VERSION 0x0288 +#define NVC7C0_SET_QMD_VERSION_CURRENT 15:0 +#define NVC7C0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC7C0_CHECK_QMD_VERSION 0x0290 +#define NVC7C0_CHECK_QMD_VERSION_CURRENT 15:0 +#define NVC7C0_CHECK_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC7C0_INVALIDATE_SKED_CACHES 0x0298 +#define NVC7C0_INVALIDATE_SKED_CACHES_V 0:0 + +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL 0x029c +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_CONSTANT_BUFFER_MASK 7:0 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE 8:8 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE 12:12 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE 9:9 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_I2M_DEPENDENT_ENABLE_TRUE 0x00000001 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE 16:16 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_ADDR_ENABLE_TRUE 0x00000001 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE 20:20 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_CONSTANT_BUFFER_ENABLE_TRUE 0x00000001 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE 10:10 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_IQ2M_DEPENDENT_ENABLE_TRUE 0x00000001 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE 24:24 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_QMD_VIRTUALIZATION_CONTROL_SEND_PCAS_ENABLE_TRUE 0x00000001 + +#define NVC7C0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 +#define NVC7C0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC7C0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 +#define NVC7C0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC7C0_SCG_HYSTERESIS_CONTROL 0x02a8 +#define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE 0:0 +#define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_TIMEOUT_ONCE_TRUE 0x00000001 +#define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE 1:1 +#define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_FALSE 0x00000000 +#define NVC7C0_SCG_HYSTERESIS_CONTROL_USE_NULL_TIMEOUT_ONCE_TRUE 0x00000001 + +#define NVC7C0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVC7C0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVC7C0_SEND_PCAS_A 0x02b4 +#define NVC7C0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVC7C0_SEND_PCAS_B 0x02b8 +#define NVC7C0_SEND_PCAS_B_FROM 23:0 +#define NVC7C0_SEND_PCAS_B_DELTA 31:24 + +#define NVC7C0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVC7C0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVC7C0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVC7C0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVC7C0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVC7C0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVC7C0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVC7C0_SEND_SIGNALING_PCAS2_B 0x02c0 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION 3:0 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_NOP 0x00000000 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE 0x00000001 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_SCHEDULE 0x00000002 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_PUT 0x00000006 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_DECREMENT_DEPENDENCE 0x00000007 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH 0x00000008 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH_SCHEDULE 0x00000009 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_SCHEDULE 0x0000000A +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_FORCE_REQUIRE_SCHEDULING 0x0000000B +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_DEPENDENCE 0x0000000C +#define NVC7C0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_CWD_REF_COUNTER 0x0000000D +#define NVC7C0_SEND_SIGNALING_PCAS2_B_SELECT 13:8 +#define NVC7C0_SEND_SIGNALING_PCAS2_B_OFFSET_MINUS_ONE 23:14 + +#define NVC7C0_SET_SKED_CACHE_CONTROL 0x02cc +#define NVC7C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 +#define NVC7C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 +#define NVC7C0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 + +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 + +#define NVC7C0_SET_SPA_VERSION 0x0310 +#define NVC7C0_SET_SPA_VERSION_MINOR 7:0 +#define NVC7C0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC7C0_SET_INLINE_QMD_ADDRESS_A 0x0318 +#define NVC7C0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 31:0 + +#define NVC7C0_SET_INLINE_QMD_ADDRESS_B 0x031c +#define NVC7C0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 + +#define NVC7C0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) +#define NVC7C0_LOAD_INLINE_QMD_DATA_V 31:0 + +#define NVC7C0_SET_FALCON00 0x0500 +#define NVC7C0_SET_FALCON00_V 31:0 + +#define NVC7C0_SET_FALCON01 0x0504 +#define NVC7C0_SET_FALCON01_V 31:0 + +#define NVC7C0_SET_FALCON02 0x0508 +#define NVC7C0_SET_FALCON02_V 31:0 + +#define NVC7C0_SET_FALCON03 0x050c +#define NVC7C0_SET_FALCON03_V 31:0 + +#define NVC7C0_SET_FALCON04 0x0510 +#define NVC7C0_SET_FALCON04_V 31:0 + +#define NVC7C0_SET_FALCON05 0x0514 +#define NVC7C0_SET_FALCON05_V 31:0 + +#define NVC7C0_SET_FALCON06 0x0518 +#define NVC7C0_SET_FALCON06_V 31:0 + +#define NVC7C0_SET_FALCON07 0x051c +#define NVC7C0_SET_FALCON07_V 31:0 + +#define NVC7C0_SET_FALCON08 0x0520 +#define NVC7C0_SET_FALCON08_V 31:0 + +#define NVC7C0_SET_FALCON09 0x0524 +#define NVC7C0_SET_FALCON09_V 31:0 + +#define NVC7C0_SET_FALCON10 0x0528 +#define NVC7C0_SET_FALCON10_V 31:0 + +#define NVC7C0_SET_FALCON11 0x052c +#define NVC7C0_SET_FALCON11_V 31:0 + +#define NVC7C0_SET_FALCON12 0x0530 +#define NVC7C0_SET_FALCON12_V 31:0 + +#define NVC7C0_SET_FALCON13 0x0534 +#define NVC7C0_SET_FALCON13_V 31:0 + +#define NVC7C0_SET_FALCON14 0x0538 +#define NVC7C0_SET_FALCON14_V 31:0 + +#define NVC7C0_SET_FALCON15 0x053c +#define NVC7C0_SET_FALCON15_V 31:0 + +#define NVC7C0_SET_MME_MEM_ADDRESS_A 0x0550 +#define NVC7C0_SET_MME_MEM_ADDRESS_A_UPPER 16:0 + +#define NVC7C0_SET_MME_MEM_ADDRESS_B 0x0554 +#define NVC7C0_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NVC7C0_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NVC7C0_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NVC7C0_MME_DMA_READ 0x055c +#define NVC7C0_MME_DMA_READ_LENGTH 31:0 + +#define NVC7C0_MME_DMA_READ_FIFOED 0x0560 +#define NVC7C0_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NVC7C0_MME_DMA_WRITE 0x0564 +#define NVC7C0_MME_DMA_WRITE_LENGTH 31:0 + +#define NVC7C0_MME_DMA_REDUCTION 0x0568 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NVC7C0_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NVC7C0_MME_DMA_SYSMEMBAR 0x056c +#define NVC7C0_MME_DMA_SYSMEMBAR_V 0:0 + +#define NVC7C0_MME_DMA_SYNC 0x0570 +#define NVC7C0_MME_DMA_SYNC_VALUE 31:0 + +#define NVC7C0_SET_MME_DATA_FIFO_CONFIG 0x0574 +#define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 +#define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 +#define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 +#define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 +#define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 +#define NVC7C0_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 + +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 16:0 + +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 +#define NVC7C0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVC7C0_THROTTLE_SM 0x07fc +#define NVC7C0_THROTTLE_SM_MULTIPLY_ADD 0:0 +#define NVC7C0_THROTTLE_SM_MULTIPLY_ADD_FALSE 0x00000000 +#define NVC7C0_THROTTLE_SM_MULTIPLY_ADD_TRUE 0x00000001 + +#define NVC7C0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC7C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC7C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC7C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS(i) (0x0da0+(i)*4) +#define NVC7C0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS_V 31:0 + +#define NVC7C0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC7C0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC7C0_MME_DMA_WRITE_METHOD_BARRIER 0x0dec +#define NVC7C0_MME_DMA_WRITE_METHOD_BARRIER_V 0:0 + +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC7C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVC7C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVC7C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVC7C0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVC7C0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC7C0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC7C0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC7C0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC7C0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC7C0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC7C0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC7C0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC7C0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC7C0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC7C0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC7C0_SET_RENDER_ENABLE_A 0x1550 +#define NVC7C0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC7C0_SET_RENDER_ENABLE_B 0x1554 +#define NVC7C0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC7C0_SET_RENDER_ENABLE_C 0x1558 +#define NVC7C0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC7C0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC7C0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC7C0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC7C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC7C0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC7C0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC7C0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC7C0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC7C0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC7C0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC7C0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC7C0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC7C0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 16:0 + +#define NVC7C0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC7C0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC7C0_SET_TEX_HEADER_POOL_C 0x157c +#define NVC7C0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC7C0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC7C0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC7C0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC7C0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC7C0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC7C0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC7C0_PIPE_NOP 0x1a2c +#define NVC7C0_PIPE_NOP_V 31:0 + +#define NVC7C0_SET_SPARE00 0x1a30 +#define NVC7C0_SET_SPARE00_V 31:0 + +#define NVC7C0_SET_SPARE01 0x1a34 +#define NVC7C0_SET_SPARE01_V 31:0 + +#define NVC7C0_SET_SPARE02 0x1a38 +#define NVC7C0_SET_SPARE02_V 31:0 + +#define NVC7C0_SET_SPARE03 0x1a3c +#define NVC7C0_SET_SPARE03_V 31:0 + +#define NVC7C0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC7C0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC7C0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC7C0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC7C0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC7C0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC7C0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC7C0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVC7C0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVC7C0_SET_TRAP_HANDLER_A 0x25f8 +#define NVC7C0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC7C0_SET_TRAP_HANDLER_B 0x25fc +#define NVC7C0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC7C0_SET_BINDLESS_TEXTURE 0x2608 +#define NVC7C0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVC7C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC7C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC7C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC7C0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC7C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC7C0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC7C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC7C0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC7C0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC7C0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC7C0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC7C0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC7C0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC7C0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC7C0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVC7C0_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVC7C0_CALL_MME_MACRO_V 31:0 + +#define NVC7C0_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVC7C0_CALL_MME_DATA_V 31:0 + +#endif /* _cl_ampere_compute_b_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc7fa.h b/userspace/sdks/nv570/inc/class/clc7fa.h new file mode 100644 index 0000000..50892c5 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc7fa.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#include "nvtypes.h" + +#ifndef _clc7fa_h_ +#define _clc7fa_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC7FA_VIDEO_OFA (0x0000C7FA) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc7fa_h + diff --git a/userspace/sdks/nv570/inc/class/clc863.h b/userspace/sdks/nv570/inc/class/clc863.h new file mode 100644 index 0000000..1240562 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc863.h @@ -0,0 +1,31 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef CLC863_H +#define CLC863_H + +#define HOPPER_MMU_VIDMEM_ACCESS_BIT_BUFFER (0xc863) + +#define NVC863_SIZE 1024 + +#endif diff --git a/userspace/sdks/nv570/inc/class/clc86f.h b/userspace/sdks/nv570/inc/class/clc86f.h new file mode 100644 index 0000000..1548cd2 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc86f.h @@ -0,0 +1,191 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gh100_clc86f_h__ +#define __gh100_clc86f_h__ + +#define HOPPER_CHANNEL_GPFIFO_A (0x0000C86F) + +typedef volatile struct Nvc86fControl_struct { + NvU32 Ignored00[0x010]; /* 0000-003f*/ + NvU32 Put; /* put offset, read/write 0040-0043*/ + NvU32 Get; /* get offset, read only 0044-0047*/ + NvU32 Reference; /* reference value, read only 0048-004b*/ + NvU32 PutHi; /* high order put offset bits 004c-004f*/ + NvU32 Ignored01[0x002]; /* 0050-0057*/ + NvU32 TopLevelGet; /* top level get offset, read only 0058-005b*/ + NvU32 TopLevelGetHi; /* high order top level get bits 005c-005f*/ + NvU32 GetHi; /* high order get offset bits 0060-0063*/ + NvU32 Ignored02[0x007]; /* 0064-007f*/ + NvU32 Ignored03; /* used to be engine yield 0080-0083*/ + NvU32 Ignored04[0x001]; /* 0084-0087*/ + NvU32 GPGet; /* GP FIFO get offset, read only 0088-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored05[0x5c]; +} Nvc86fControl, HopperAControlGPFifo; + +#define NVC86F_SET_OBJECT (0x00000000) +// NOTE - MEM_OP_A and MEM_OP_B have been replaced in gp100 with methods for +// specifying the page address for a targeted TLB invalidate and the uTLB for +// a targeted REPLAY_CANCEL for UVM. +// The previous MEM_OP_A/B functionality is in MEM_OP_C/D, with slightly +// rearranged fields. +#define NVC86F_MEM_OP_A (0x00000028) +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_CLIENT_UNIT_ID 5:0 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_INVALIDATION_SIZE 5:0 // Used to specify size of invalidate, used for invalidates which are not of the REPLAY_CANCEL_TARGETED type +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_CANCEL_TARGET_GPC_ID 10:6 // only relevant for REPLAY_CANCEL_TARGETED +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE 7:6 // only relevant for invalidates with NVC86F_MEM_OP_C_TLB_INVALIDATE_REPLAY_NONE for invalidating link TLB only, or non-link TLB only or all TLBs +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE_ALL_TLBS 0 +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE_LINK_TLBS 1 +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE_NON_LINK_TLBS 2 +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE_RSVRVD 3 +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_CANCEL_MMU_ENGINE_ID 8:0 // only relevant for REPLAY_CANCEL_VA_GLOBAL +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR 11:11 +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_EN 0x00000001 +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_DIS 0x00000000 +#define NVC86F_MEM_OP_A_TLB_INVALIDATE_TARGET_ADDR_LO 31:12 +#define NVC86F_MEM_OP_B (0x0000002c) +#define NVC86F_MEM_OP_B_TLB_INVALIDATE_TARGET_ADDR_HI 31:0 +#define NVC86F_MEM_OP_C (0x00000030) +#define NVC86F_MEM_OP_C_MEMBAR_TYPE 2:0 +#define NVC86F_MEM_OP_C_MEMBAR_TYPE_SYS_MEMBAR 0x00000000 +#define NVC86F_MEM_OP_C_MEMBAR_TYPE_MEMBAR 0x00000001 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PDB 0:0 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PDB_ALL 0x00000001 // Probably nonsensical for MMU_TLB_INVALIDATE_TARGETED +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_GPC 1:1 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_REPLAY 4:2 // only relevant if GPC ENABLE +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_REPLAY_NONE 0x00000000 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START 0x00000001 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_REPLAY_START_ACK_ALL 0x00000002 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_TARGETED 0x00000003 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_GLOBAL 0x00000004 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_REPLAY_CANCEL_VA_GLOBAL 0x00000005 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE 6:5 // only relevant if GPC ENABLE +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_NONE 0x00000000 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_GLOBALLY 0x00000001 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_INTRANODE 0x00000002 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE 9:7 //only relevant for REPLAY_CANCEL_VA_GLOBAL +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_READ 0 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_WRITE 1 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_STRONG 2 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_RSVRVD 3 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_WEAK 4 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ATOMIC_ALL 5 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_WRITE_AND_ATOMIC 6 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_ACCESS_TYPE_VIRT_ALL 7 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL 9:7 // Invalidate affects this level and all below +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_ALL 0x00000000 // Invalidate tlb caches at all levels of the page table +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_PTE_ONLY 0x00000001 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE0 0x00000002 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE1 0x00000003 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE2 0x00000004 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE3 0x00000005 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE4 0x00000006 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE5 0x00000007 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE 11:10 // only relevant if PDB_ONE +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_VID_MEM 0x00000000 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_NONCOHERENT 0x00000003 +#define NVC86F_MEM_OP_C_TLB_INVALIDATE_PDB_ADDR_LO 31:12 // only relevant if PDB_ONE +#define NVC86F_MEM_OP_C_ACCESS_COUNTER_CLR_TARGETED_NOTIFY_TAG 19:0 +// MEM_OP_D MUST be preceded by MEM_OPs A-C. +#define NVC86F_MEM_OP_D (0x00000034) +#define NVC86F_MEM_OP_D_TLB_INVALIDATE_PDB_ADDR_HI 26:0 // only relevant if PDB_ONE +#define NVC86F_MEM_OP_D_OPERATION 31:27 +#define NVC86F_MEM_OP_D_OPERATION_MEMBAR 0x00000005 +#define NVC86F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NVC86F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE_TARGETED 0x0000000a +#define NVC86F_MEM_OP_D_OPERATION_MMU_OPERATION 0x0000000b +#define NVC86F_MEM_OP_D_OPERATION_L2_PEERMEM_INVALIDATE 0x0000000d +#define NVC86F_MEM_OP_D_OPERATION_L2_SYSMEM_INVALIDATE 0x0000000e +// CLEAN_LINES is an alias for Tegra/GPU IP usage +#define NVC86F_MEM_OP_B_OPERATION_L2_INVALIDATE_CLEAN_LINES 0x0000000e +#define NVC86F_MEM_OP_D_OPERATION_L2_CLEAN_COMPTAGS 0x0000000f +#define NVC86F_MEM_OP_D_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NVC86F_MEM_OP_D_OPERATION_L2_WAIT_FOR_SYS_PENDING_READS 0x00000015 +#define NVC86F_MEM_OP_D_OPERATION_ACCESS_COUNTER_CLR 0x00000016 +#define NVC86F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE 1:0 +#define NVC86F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_MIMC 0x00000000 +#define NVC86F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_MOMC 0x00000001 +#define NVC86F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_ALL 0x00000002 +#define NVC86F_MEM_OP_D_ACCESS_COUNTER_CLR_TYPE_TARGETED 0x00000003 +#define NVC86F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE 2:2 +#define NVC86F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE_MIMC 0x00000000 +#define NVC86F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_TYPE_MOMC 0x00000001 +#define NVC86F_MEM_OP_D_ACCESS_COUNTER_CLR_TARGETED_BANK 6:3 +#define NVC86F_MEM_OP_D_MMU_OPERATION_TYPE 23:20 +#define NVC86F_MEM_OP_D_MMU_OPERATION_TYPE_RESERVED 0x00000000 +#define NVC86F_MEM_OP_D_MMU_OPERATION_TYPE_VIDMEM_ACCESS_BIT_DUMP 0x00000001 +#define NVC86F_SEM_ADDR_LO (0x0000005c) +#define NVC86F_SEM_ADDR_LO_OFFSET 31:2 +#define NVC86F_SEM_ADDR_HI (0x00000060) +#define NVC86F_SEM_ADDR_HI_OFFSET 24:0 +#define NVC86F_SEM_PAYLOAD_LO (0x00000064) +#define NVC86F_SEM_PAYLOAD_HI (0x00000068) +#define NVC86F_SEM_EXECUTE (0x0000006c) +#define NVC86F_SEM_EXECUTE_OPERATION 2:0 +#define NVC86F_SEM_EXECUTE_OPERATION_ACQUIRE 0x00000000 +#define NVC86F_SEM_EXECUTE_OPERATION_RELEASE 0x00000001 +#define NVC86F_SEM_EXECUTE_OPERATION_ACQ_CIRC_GEQ 0x00000003 +#define NVC86F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG 12:12 +#define NVC86F_SEM_EXECUTE_ACQUIRE_SWITCH_TSG_EN 0x00000001 +#define NVC86F_SEM_EXECUTE_RELEASE_WFI 20:20 +#define NVC86F_SEM_EXECUTE_RELEASE_WFI_DIS 0x00000000 +#define NVC86F_SEM_EXECUTE_PAYLOAD_SIZE 24:24 +#define NVC86F_SEM_EXECUTE_PAYLOAD_SIZE_32BIT 0x00000000 +#define NVC86F_SEM_EXECUTE_RELEASE_TIMESTAMP 25:25 +#define NVC86F_SEM_EXECUTE_RELEASE_TIMESTAMP_DIS 0x00000000 +#define NVC86F_SEM_EXECUTE_RELEASE_TIMESTAMP_EN 0x00000001 +#define NVC86F_WFI (0x00000078) +#define NVC86F_WFI_SCOPE 0:0 +#define NVC86F_WFI_SCOPE_CURRENT_SCG_TYPE 0x00000000 +#define NVC86F_WFI_SCOPE_CURRENT_VEID 0x00000000 +#define NVC86F_WFI_SCOPE_ALL 0x00000001 + +/* GPFIFO entry format */ +#define NVC86F_GP_ENTRY__SIZE 8 +#define NVC86F_GP_ENTRY0_FETCH 0:0 +#define NVC86F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVC86F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVC86F_GP_ENTRY0_GET 31:2 +#define NVC86F_GP_ENTRY0_OPERAND 31:0 +#define NVC86F_GP_ENTRY0_PB_EXTENDED_BASE_OPERAND 24:8 +#define NVC86F_GP_ENTRY1_GET_HI 7:0 +#define NVC86F_GP_ENTRY1_LEVEL 9:9 +#define NVC86F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVC86F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVC86F_GP_ENTRY1_LENGTH 30:10 +#define NVC86F_GP_ENTRY1_SYNC 31:31 +#define NVC86F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVC86F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVC86F_GP_ENTRY1_OPCODE 7:0 +#define NVC86F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVC86F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVC86F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVC86F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 +#define NVC86F_GP_ENTRY1_OPCODE_SET_PB_SEGMENT_EXTENDED_BASE 0x00000004 + +#endif // __gh100_clc86f_h__ diff --git a/userspace/sdks/nv570/inc/class/clc86fsw.h b/userspace/sdks/nv570/inc/class/clc86fsw.h new file mode 100644 index 0000000..6020315 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc86fsw.h @@ -0,0 +1,45 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2018 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* This file is *not* auto-generated. */ + +#ifndef _clc86f_sw_h_ +#define _clc86f_sw_h_ + +#define NVC86F_NOTIFIERS_RC (0) +#define NVC86F_NOTIFIERS_REFCNT (1) +#define NVC86F_NOTIFIERS_NONSTALL (2) +#define NVC86F_NOTIFIERS_EVENTBUFFER (3) +#define NVC86F_NOTIFIERS_IDLECHANNEL (4) +#define NVC86F_NOTIFIERS_ENDCTX (5) +#define NVC86F_NOTIFIERS_SW (6) +#define NVC86F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVC86F_NOTIFIERS_REPLAYABLE_FAULT (8) +#define NVC86F_NOTIFIERS_KEY_ROTATION (9) +#define NVC86F_NOTIFIERS_MAXCOUNT (10) + +/* NvNotification[] fields and values */ +#define NVC86F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVC86F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _clc56f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc870.h b/userspace/sdks/nv570/inc/class/clc870.h new file mode 100644 index 0000000..d2d35f1 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc870.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc870.finn +// + +#define NVC870_DISPLAY (0xc870U) /* finn: Evaluated from "NVC870_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NVC870_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc870U) + +typedef struct NVC870_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numDsis; // Number of DSIs in this chip/display +} NVC870_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc871.h b/userspace/sdks/nv570/inc/class/clc871.h new file mode 100644 index 0000000..a8d348b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc871.h @@ -0,0 +1,380 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc871_h_ +#define _clc871_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC871_DISP_SF_USER (0x000C871) + +typedef volatile struct _clc871_tag0 { + NvU32 dispSfUserOffset[0x400]; +} _NvC871DispSfUser, NvC871DispSfUserMap; + +#define NVC871_SF_HDMI_INFO_IDX_AVI_INFOFRAME 0x00000000 /* */ +#define NVC871_SF_HDMI_INFO_IDX_GCP 0x00000001 /* */ +#define NVC871_SF_HDMI_INFO_IDX_ACR 0x00000002 /* */ +#define NVC871_SF_HDMI_INFO_CTRL(i,j) (0x000E0000-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_CTRL__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_CTRL__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_OTHER 4:4 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_CTRL_OTHER_DIS 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_CTRL_OTHER_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_SINGLE 8:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_CTRL_SINGLE_DIS 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_CTRL_SINGLE_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_CHKSUM_HW_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_CHKSUM_HW_DIS 0x00000000 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_CTRL_HBLANK 12:12 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_CTRL_HBLANK_DIS 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_CTRL_HBLANK_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_VIDEO_FMT 16:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_CTRL_VIDEO_FMT_SW_CONTROLLED 0x00000000 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_VIDEO_FMT_HW_CONTROLLED 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_INFO_CTRL_VIDEO_FMT_INIT 0x00000001 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_STATUS(i,j) (0x000E0004-0x000E0000+(i)*1024+(j)*64) /* R--4A */ +#define NVC871_SF_HDMI_INFO_STATUS__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_STATUS__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_STATUS_SENT 0:0 /* R--VF */ +#define NVC871_SF_HDMI_INFO_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC871_SF_HDMI_INFO_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC871_SF_HDMI_INFO_HEADER(i,j) (0x000E0008-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_HEADER__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_HEADER__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_HEADER_HB0 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_HEADER_HB1 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_HEADER_HB2 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW(i,j) (0x000E000C-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_HIGH(i,j) (0x000E0010-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_HIGH__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW(i,j) (0x000E0014-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_HIGH(i,j) (0x000E0018-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_HIGH__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW(i,j) (0x000E001C-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_HIGH(i,j) (0x000E0020-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_HIGH__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_HIGH__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_HIGH_PB18 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_HIGH_PB18_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_HIGH_PB19 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_HIGH_PB19_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_HIGH_PB20 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK2_HIGH_PB20_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW(i,j) (0x000E0024-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW_PB21 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW_PB21_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW_PB22 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW_PB22_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW_PB23 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW_PB23_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW_PB24 31:24 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_LOW_PB24_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_HIGH(i,j) (0x000E0028-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_HIGH__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_HIGH__SIZE_2 3 /* */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_HIGH_PB25 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_HIGH_PB25_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_HIGH_PB26 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_HIGH_PB26_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_HIGH_PB27 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_INFO_SUBPACK3_HIGH_PB27_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x000E0000-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER 4:4 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_DIS 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_OTHER_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE 8:8 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_DIS 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_SINGLE_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x000E0004-0x000E0000+(i)*1024) /* R--4A */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R-IVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x000E0008-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x000E000C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x000E0010-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x000E0014-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x000E0018-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW(i) (0x000E001C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVC871_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_GCP_CTRL(i) (0x000E0040-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_HDMI_GCP_CTRL__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_GCP_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC871_SF_HDMI_GCP_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_GCP_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_GCP_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC871_SF_HDMI_GCP_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_GCP_CTRL_OTHER 4:4 /* RWIVF */ +#define NVC871_SF_HDMI_GCP_CTRL_OTHER_DIS 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_GCP_CTRL_OTHER_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_GCP_CTRL_SINGLE 8:8 /* RWIVF */ +#define NVC871_SF_HDMI_GCP_CTRL_SINGLE_DIS 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_GCP_CTRL_SINGLE_EN 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_GCP_STATUS(i) (0x000E0044-0x000E0000+(i)*1024) /* R--4A */ +#define NVC871_SF_HDMI_GCP_STATUS__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_GCP_STATUS_SENT 0:0 /* R-IVF */ +#define NVC871_SF_HDMI_GCP_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_START_PP 6:4 /* R--VF */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_START_PP_0 0x00000004 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_START_PP_1 0x00000001 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_START_PP_2 0x00000002 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_START_PP_3 0x00000003 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_END_PP 10:8 /* R--VF */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_END_PP_0 0x00000004 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_END_PP_1 0x00000001 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_END_PP_2 0x00000002 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_ACTIVE_END_PP_3 0x00000003 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_START_PP 14:12 /* R--VF */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_START_PP_0 0x00000004 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_START_PP_1 0x00000001 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_START_PP_2 0x00000002 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_START_PP_3 0x00000003 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_END_PP 18:16 /* R--VF */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_END_PP_0 0x00000004 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_END_PP_1 0x00000001 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_END_PP_2 0x00000002 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_VSYNC_END_PP_3 0x00000003 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_START_PP 22:20 /* R--VF */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_START_PP_0 0x00000004 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_START_PP_1 0x00000001 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_START_PP_2 0x00000002 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_START_PP_3 0x00000003 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_END_PP 26:24 /* R--VF */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_END_PP_0 0x00000004 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_END_PP_1 0x00000001 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_END_PP_2 0x00000002 /* R---V */ +#define NVC871_SF_HDMI_GCP_STATUS_HSYNC_END_PP_3 0x00000003 /* R---V */ +#define NVC871_SF_HDMI_GCP_SUBPACK(i) (0x000E004C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_HDMI_GCP_SUBPACK__SIZE_1 8 /* */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB0 7:0 /* RWIVF */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB0_INIT 0x00000001 /* RWI-V */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB0_SET_AVMUTE 0x00000001 /* RW--V */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB0_CLR_AVMUTE 0x00000010 /* RW--V */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB1 15:8 /* RWIVF */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB1_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB2 23:16 /* RWIVF */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB2_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB1_CTRL 24:24 /* RWIVF */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB1_CTRL_INIT 0x00000001 /* RWI-V */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB1_CTRL_SW 0x00000000 /* RW--V */ +#define NVC871_SF_HDMI_GCP_SUBPACK_SB1_CTRL_HW 0x00000001 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL(i,j) (0x000E0130-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL__SIZE_2 10 /* */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE 3:1 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ALWAYS 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ONCE 0x00000001 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ALWAYS 0x00000002 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ONCE 0x00000003 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_TRIGGER 0x00000004 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_LOC 5:4 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_LOC_VBLANK 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_LOC_VSYNC 0x00000001 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_LOC_LINE 0x00000002 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_LOC_LOADV 0x00000003 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_OFFSET 10:6 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_SIZE 18:14 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_SIZE_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_BUSY 22:22 /* R-IVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_BUSY_NO 0x00000000 /* R-I-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_BUSY_YES 0x00000001 /* R---V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_SENT 23:23 /* R-IVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_SENT_NO 0x00000000 /* R-I-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CTRL_SENT_YES 0x00000001 /* R---V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG(i,j) (0x000E0134-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG__SIZE_1 8 /* */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG__SIZE_2 10 /* */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_FID 7:0 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_FID_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID 23:8 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED 24:24 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_NO 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_YES 0x00000001 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_CRC_OVERRIDE 28:28 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_CRC_OVERRIDE_NO 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_CRC_OVERRIDE_YES 0x00000001 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM 29:29 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_NO 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_YES 0x00000001 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_NEW 30:30 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_NEW_INIT 0x00000000 /* R-I-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_NEW_DONE 0x00000000 /* R---V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_NEW_PENDING 0x00000001 /* R---V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_NEW_TRIGGER 0x00000001 /* -W--T */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL 31:31 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ACT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ARM 0x00000001 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_CTRL(i) (0x000E03F0-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_CTRL__SIZE_1 8 /* */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET 4:0 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA(i) (0x000E03F4-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA__SIZE_1 8 /* */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_BYTE0 7:0 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_BYTE0_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_BYTE1 15:8 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_BYTE1_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_BYTE2 23:16 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_BYTE2_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_BYTE3 31:24 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_DATA_BYTE3_INIT 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_MISC_CTRL(i) (0x000E03F8-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC871_SF_GENERIC_INFOFRAME_MISC_CTRL__SIZE_1 8 /* */ +#define NVC871_SF_GENERIC_INFOFRAME_MISC_CTRL_WIN_CHN_SEL 0:0 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_MISC_CTRL_WIN_CHN_SEL_PRIVATE 0x00000000 /* RWI-V */ +#define NVC871_SF_GENERIC_INFOFRAME_MISC_CTRL_WIN_CHN_SEL_PUBLIC 0x00000001 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY 1:1 /* RWIVF */ +#define NVC871_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_HIGH 0x00000000 /* RW--V */ +#define NVC871_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_LOW 0x00000001 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _clc871_h_ diff --git a/userspace/sdks/nv570/inc/class/clc873.h b/userspace/sdks/nv570/inc/class/clc873.h new file mode 100644 index 0000000..2d32b6d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc873.h @@ -0,0 +1,399 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc873_h_ +#define _clc873_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC873_DISP_CAPABILITIES 0xC873 + +typedef volatile struct _clc873_tag0 { + NvU32 dispCapabilities[0x400]; +} _NvC873DispCapabilities,NvC873DispCapabilities_Map ; + + +#define NVC873_SYS_CAP 0x0 /* RW-4R */ +#define NVC873_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVC873_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVC873_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVC873_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVC873_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVC873_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVC873_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVC873_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVC873_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC873_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVC873_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVC873_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVC873_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVC873_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVC873_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVC873_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVC873_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVC873_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVC873_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVC873_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVC873_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_DSI0_EXISTS 20:20 /* RWIVF */ +#define NVC873_SYS_CAP_DSI0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_DSI0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_DSI1_EXISTS 21:21 /* RWIVF */ +#define NVC873_SYS_CAP_DSI1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_DSI1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_DSI2_EXISTS 22:22 /* RWIVF */ +#define NVC873_SYS_CAP_DSI2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_DSI2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_DSI3_EXISTS 23:23 /* RWIVF */ +#define NVC873_SYS_CAP_DSI3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_DSI3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_SYS_CAP_DSI_EXISTS(i) (20+(i)):(20+(i)) /* RWIVF */ +#define NVC873_SYS_CAP_DSI_EXISTS__SIZE_1 4 /* */ +#define NVC873_SYS_CAP_DSI_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC873_SYS_CAP_DSI_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA 0x10 /* RW-4R */ +#define NVC873_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES 15:0 /* RWIUF */ +#define NVC873_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH 17:16 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_32B 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_64B 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_128B 0x00000002 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_256B 0x00000003 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_ROTATION 18:18 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_ROTATION_FALSE 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_ROTATION_TRUE 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_PLANAR 19:19 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_PLANAR_FALSE 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_VGA 20:20 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION 21:21 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_TRUE 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_MSCG 22:22 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_MSCG_FALSE 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_MSCG_TRUE 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH 23:23 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_FALSE 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_TRUE 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT 26:26 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION 31:30 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_32B 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_64B 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_128B 0x00000002 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_256B 0x00000003 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC 0x18 /* RW-4R */ +#define NVC873_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE 1:0 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_32B 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_64B 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_128B 0x00000002 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_256B 0x00000003 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED 6:4 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_NONE 0x00000000 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_TWO 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_FOUR 0x00000002 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_EIGHT 0x00000003 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_SIXTEEN 0x00000004 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR 11:11 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_FALSE 0x00000000 /* RWI-V */ +#define NVC873_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC873_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP 12:12 /* RWIVF */ +#define NVC873_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_FALSE 0x00000000 /* RWI-V */ +#define NVC873_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA(i) (0x680+(i)*32) /* RW-4A */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA__SIZE_1 8 /* */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT 16:16 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_OCSC0_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT 17:17 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_OCSC1_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT 18:18 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT 19:19 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_HCLPF_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT 20:20 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_DTH_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT 21:21 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_OSCAN_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT 22:22 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_DSC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT 23:23 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_VFILTER_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT 24:24 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPA_RCRC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB(i) (0x684+(i)*32) /* RW-4A */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB__SIZE_1 8 /* */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_VGA 0:0 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGSZ 9:6 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_OLUT_LOGNR 12:10 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_OLUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT 15:15 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPB_OLUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC(i) (0x688+(i)*32) /* RW-4A */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC__SIZE_1 8 /* */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_OCSC0_PRECISION 4:0 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_OCSC1_PRECISION 12:8 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP 13:13 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_SF_PRECISION 20:16 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_CI_PRECISION 24:21 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB 25:25 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPD(i) (0x68c+(i)*32) /* RW-4A */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPD__SIZE_1 8 /* */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE(i) (0x690+(i)*32) /* RW-4A */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE__SIZE_1 8 /* */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE_DSC_RATEBUFSIZE 3:0 /* RWIUF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE_DSC_LINEBUFSIZE 13:8 /* RWIUF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422 16:16 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE422_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420 17:17 /* RWIVF */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_TRUE 0x00000001 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPE_DSC_NATIVE420_FALSE 0x00000000 /* RW--V */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPF(i) (0x694+(i)*32) /* RW-4A */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPF__SIZE_1 8 /* */ +#define NVC873_POSTCOMP_HEAD_HDR_CAPF_VFILTER_MAX_PIXELS 15:0 /* RWIVF */ +#define NVC873_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVC873_SOR_CAP__SIZE_1 8 /* */ +#define NVC873_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVC873_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVC873_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVC873_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVC873_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVC873_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVC873_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVC873_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVC873_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVC873_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVC873_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVC873_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVC873_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVC873_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVC873_SOR_CAP_HDMI_FRL 28:28 /* RWIVF */ +#define NVC873_SOR_CAP_HDMI_FRL_FALSE 0x00000000 /* RW--V */ +#define NVC873_SOR_CAP_HDMI_FRL_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA(i) (0x780+(i)*32) /* RW-4A */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA__SIZE_1 32 /* */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH 13:10 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT 16:16 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT 17:17 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT 18:18 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT 19:19 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT 20:20 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT 21:21 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT 22:22 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT 23:23 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT 24:24 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB(i) (0x784+(i)*32) /* RW-4A */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB__SIZE_1 32 /* */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION 4:0 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ 9:6 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR 12:10 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT 15:15 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC(i) (0x788+(i)*32) /* RW-4A */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC__SIZE_1 32 /* */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION 4:0 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGSZ 9:6 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_LOGNR 12:10 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT 15:15 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION 20:16 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD(i) (0x78c+(i)*32) /* RW-4A */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD__SIZE_1 32 /* */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ 3:0 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR 6:4 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD 8:8 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT 9:9 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION 16:12 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION 20:17 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB 21:21 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA 22:22 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE(i) (0x790+(i)*32) /* RW-4A */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE__SIZE_1 32 /* */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION 4:0 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGSZ 9:6 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_LOGNR 12:10 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT 15:15 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION 20:16 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPF(i) (0x794+(i)*32) /* RW-4A */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPF__SIZE_1 32 /* */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC873_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clc873_h_ diff --git a/userspace/sdks/nv570/inc/class/clc87a.h b/userspace/sdks/nv570/inc/class/clc87a.h new file mode 100644 index 0000000..cadb2ae --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc87a.h @@ -0,0 +1,180 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc87a__h_ +#define _clc87a__h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC87A_CURSOR_IMM_CHANNEL_PIO (0x0000C87A) + +typedef volatile struct _clc87a_tag0 { + NvV32 Reserved00[0x2]; + NvV32 Free; // 0x00000008 - 0x0000000B + NvV32 Reserved01[0x7D]; + NvV32 Update; // 0x00000200 - 0x00000203 + NvV32 SetInterlockFlags; // 0x00000204 - 0x00000207 + NvV32 SetCursorHotSpotPointOut[2]; // 0x00000208 - 0x0000020F + NvV32 SetWindowInterlockFlags; // 0x00000210 - 0x00000213 + NvV32 Reserved02[0x37B]; +} NVC87ADispCursorImmControlPio; + +#define NVC87A_FREE (0x00000008) +#define NVC87A_FREE_COUNT 5:0 +#define NVC87A_UPDATE (0x00000200) +#define NVC87A_SET_INTERLOCK_FLAGS (0x00000204) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC87A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC87A_SET_CURSOR_HOT_SPOT_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC87A_SET_CURSOR_HOT_SPOT_POINT_OUT_X 15:0 +#define NVC87A_SET_CURSOR_HOT_SPOT_POINT_OUT_Y 31:16 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS (0x00000210) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC87A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc87a_h + diff --git a/userspace/sdks/nv570/inc/class/clc87b.h b/userspace/sdks/nv570/inc/class/clc87b.h new file mode 100644 index 0000000..608e7e9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc87b.h @@ -0,0 +1,63 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC87b_h_ +#define _clC87b_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC87B_WINDOW_IMM_CHANNEL_DMA (0x0000C87B) + +// dma opcode instructions +#define NVC87B_DMA +#define NVC87B_DMA_OPCODE 31:29 +#define NVC87B_DMA_OPCODE_METHOD 0x00000000 +#define NVC87B_DMA_OPCODE_JUMP 0x00000001 +#define NVC87B_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC87B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC87B_DMA_METHOD_COUNT 27:18 +#define NVC87B_DMA_METHOD_OFFSET 13:2 +#define NVC87B_DMA_DATA 31:0 +#define NVC87B_DMA_DATA_NOP 0x00000000 +#define NVC87B_DMA_JUMP_OFFSET 11:2 +#define NVC87B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC87B_PUT (0x00000000) +#define NVC87B_PUT_PTR 9:0 +#define NVC87B_GET (0x00000004) +#define NVC87B_GET_PTR 9:0 +#define NVC87B_UPDATE (0x00000200) +#define NVC87B_UPDATE_INTERLOCK_WITH_WINDOW 1:1 +#define NVC87B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC87B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC87B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC87B_SET_POINT_OUT_X 15:0 +#define NVC87B_SET_POINT_OUT_Y 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC87b_h diff --git a/userspace/sdks/nv570/inc/class/clc87d.h b/userspace/sdks/nv570/inc/class/clc87d.h new file mode 100644 index 0000000..1472a94 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc87d.h @@ -0,0 +1,1341 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC87d_h_ +#define _clC87d_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC87D_CORE_CHANNEL_DMA (0x0000C87D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVC87D_DMA +#define NVC87D_DMA_OPCODE 31:29 +#define NVC87D_DMA_OPCODE_METHOD 0x00000000 +#define NVC87D_DMA_OPCODE_JUMP 0x00000001 +#define NVC87D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC87D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC87D_DMA_METHOD_COUNT 27:18 +#define NVC87D_DMA_METHOD_OFFSET 13:2 +#define NVC87D_DMA_DATA 31:0 +#define NVC87D_DMA_DATA_NOP 0x00000000 +#define NVC87D_DMA_JUMP_OFFSET 11:2 +#define NVC87D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + +// class methods +#define NVC87D_PUT (0x00000000) +#define NVC87D_PUT_PTR 9:0 +#define NVC87D_GET (0x00000004) +#define NVC87D_GET_PTR 9:0 +#define NVC87D_UPDATE (0x00000200) +#define NVC87D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVC87D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVC87D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVC87D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVC87D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVC87D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVC87D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVC87D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVC87D_UPDATE_RELEASE_ELV 0:0 +#define NVC87D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC87D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC87D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC87D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC87D_SET_CONTEXT_DMA_NOTIFIER (0x00000208) +#define NVC87D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NVC87D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVC87D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC87D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC87D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC87D_SET_NOTIFIER_CONTROL_OFFSET 11:4 +#define NVC87D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVC87D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVC87D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVC87D_SET_CONTROL (0x00000210) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVC87D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC87D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC87D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC87D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVC87D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVC87D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVC87D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVC87D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVC87D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVC87D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVC87D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVC87D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVC87D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVC87D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVC87D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) + +#define NVC87D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC87D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC87D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVC87D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVC87D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVC87D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVC87D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVC87D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVC87D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVC87D_SOR_SET_CONTROL_PROTOCOL_HDMI_FRL (0x0000000C) +#define NVC87D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVC87D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVC87D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC87D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC87D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVC87D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVC87D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVC87D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVC87D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVC87D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVC87D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVC87D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVC87D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVC87D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVC87D_DSI_SET_CONTROL(a) (0x00000500 + (a)*0x00000020) +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK 7:0 +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC87D_DSI_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC87D_DSI_SET_CUSTOM_REASON(a) (0x00000504 + (a)*0x00000020) +#define NVC87D_DSI_SET_CUSTOM_REASON_CODE 31:0 +#define NVC87D_DSI_SET_SW_SPARE_A(a) (0x00000508 + (a)*0x00000020) +#define NVC87D_DSI_SET_SW_SPARE_A_CODE 31:0 +#define NVC87D_DSI_SET_SW_SPARE_B(a) (0x0000050C + (a)*0x00000020) +#define NVC87D_DSI_SET_SW_SPARE_B_CODE 31:0 + +#define NVC87D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVC87D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVC87D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVC87D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVC87D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC87D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED 16:16 +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED 28:28 +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED 30:30 +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC87D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) + +#define NVC87D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000400) +#define NVC87D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVC87D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVC87D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVC87D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVC87D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVC87D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVC87D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_PROCAMP_CHROMA_DOWN_V 4:4 +#define NVC87D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVC87D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVC87D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000400) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_444 (0x00000009) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444NP (0x0000000A) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN 31:26 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN0 (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN1 (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN2 (0x00000002) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN3 (0x00000003) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN4 (0x00000004) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN5 (0x00000005) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN6 (0x00000006) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN7 (0x00000007) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN8 (0x00000008) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN9 (0x00000009) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN10 (0x0000000A) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN11 (0x0000000B) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN12 (0x0000000C) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN13 (0x0000000D) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN14 (0x0000000E) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN15 (0x0000000F) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN16 (0x00000010) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN17 (0x00000011) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN18 (0x00000012) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN19 (0x00000013) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN20 (0x00000014) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN21 (0x00000015) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN22 (0x00000016) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN23 (0x00000017) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN24 (0x00000018) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN25 (0x00000019) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN26 (0x0000001A) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN27 (0x0000001B) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN28 (0x0000001C) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN29 (0x0000001D) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN30 (0x0000001E) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN31 (0x0000001F) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_NONE (0x0000003F) +#define NVC87D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000400) +#define NVC87D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVC87D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVC87D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_YUV420PACKER 3:3 +#define NVC87D_HEAD_SET_CONTROL_YUV420PACKER_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_YUV420PACKER_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE 11:10 +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN 8:4 +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_LOCKOUT_WINDOW 15:12 +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_MODE 23:22 +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN 20:16 +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC87D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC87D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE 30:30 +#define NVC87D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE 31:31 +#define NVC87D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000400) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC87D_HEAD_SET_PIXEL_REORDER_CONTROL(a) (0x00002010 + (a)*0x00000400) +#define NVC87D_HEAD_SET_PIXEL_REORDER_CONTROL_BANK_WIDTH 13:0 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000400) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC87D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVC87D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVC87D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVC87D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVC87D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVC87D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVC87D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVC87D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVC87D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVC87D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVC87D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVC87D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVC87D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVC87D_HEAD_SET_DITHER_CONTROL_MODE_ROUND (0x00000005) +#define NVC87D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000400) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVC87D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000400 + (b)*0x00000004) +#define NVC87D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000400) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC87D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC87D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000400) +#define NVC87D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC87D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000400) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED 4:4 +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_FALSE (0x00000000) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_TRUE (0x00000001) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS 14:12 +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED 16:16 +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC87D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVC87D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000400) +#define NVC87D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVC87D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVC87D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVC87D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVC87D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVC87D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC87D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC87D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVC87D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVC87D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVC87D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVC87D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVC87D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC87D_HEAD_SET_STALL_LOCK_UNSTALL_SYNC_ADVANCE 25:16 +#define NVC87D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000400) +#define NVC87D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVC87D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000400) +#define NVC87D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVC87D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVC87D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000400) +#define NVC87D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVC87D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVC87D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000400) +#define NVC87D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVC87D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVC87D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000400) +#define NVC87D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVC87D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVC87D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000400) +#define NVC87D_HEAD_SET_RASTER_SIZE_WIDTH 14:0 +#define NVC87D_HEAD_SET_RASTER_SIZE_HEIGHT 30:16 +#define NVC87D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000400) +#define NVC87D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVC87D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVC87D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000400) +#define NVC87D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVC87D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVC87D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000400) +#define NVC87D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVC87D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVC87D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVC87D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVC87D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVC87D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000400) +#define NVC87D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVC87D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVC87D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVC87D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000400) +#define NVC87D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVC87D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVC87D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVC87D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVC87D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVC87D_HEAD_SET_CONTEXT_DMA_CURSOR(a,b) (0x00002088 + (a)*0x00000400 + (b)*0x00000004) +#define NVC87D_HEAD_SET_CONTEXT_DMA_CURSOR_HANDLE 31:0 +#define NVC87D_HEAD_SET_OFFSET_CURSOR(a,b) (0x00002090 + (a)*0x00000400 + (b)*0x00000004) +#define NVC87D_HEAD_SET_OFFSET_CURSOR_ORIGIN 31:0 +#define NVC87D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000400) +#define NVC87D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVC87D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVC87D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000400) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000400) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS 20:20 +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_CONTEXT_DMA_CRC(a) (0x00002180 + (a)*0x00000400) +#define NVC87D_HEAD_SET_CONTEXT_DMA_CRC_HANDLE 31:0 +#define NVC87D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000400) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 5:0 +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_0 (0x00000000) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_1 (0x00000001) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_2 (0x00000002) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_3 (0x00000003) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_4 (0x00000004) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_5 (0x00000005) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_6 (0x00000006) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_7 (0x00000007) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_8 (0x00000008) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_9 (0x00000009) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_10 (0x0000000A) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_11 (0x0000000B) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_12 (0x0000000C) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_13 (0x0000000D) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_14 (0x0000000E) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_15 (0x0000000F) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_16 (0x00000010) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_17 (0x00000011) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_18 (0x00000012) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_19 (0x00000013) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_20 (0x00000014) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_21 (0x00000015) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_22 (0x00000016) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_23 (0x00000017) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_24 (0x00000018) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_25 (0x00000019) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_26 (0x0000001A) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_27 (0x0000001B) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_28 (0x0000001C) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_29 (0x0000001D) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_30 (0x0000001E) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_31 (0x0000001F) +#define NVC87D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000020) +#define NVC87D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVC87D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVC87D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVC87D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVC87D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVC87D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVC87D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000400) +#define NVC87D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVC87D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVC87D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000400) +#define NVC87D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVC87D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000400) +#define NVC87D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVC87D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000400) +#define NVC87D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVC87D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000400) +#define NVC87D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVC87D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DISPLAY_RATE_RUN_MODE 0:0 +#define NVC87D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVC87D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVC87D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVC87D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVC87D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_CONTEXT_DMA_RG_REL_SEMAPHORE(a,b) (0x000021AC + (a)*0x00000400 + (b)*0x00000004) +#define NVC87D_HEAD_SET_CONTEXT_DMA_RG_REL_SEMAPHORE_HANDLE 31:0 +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL(a,b) (0x000021CC + (a)*0x00000400 + (b)*0x00000004) +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_OFFSET 7:0 +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE 10:10 +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_ONE_TIME (0x00000000) +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_CONTINUOUS (0x00000001) +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RASTER_LINE 30:16 +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_VALUE(a,b) (0x000021EC + (a)*0x00000400 + (b)*0x00000004) +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_VALUE 31:0 +#define NVC87D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE(a) (0x00002214 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC87D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC87D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000400) +#define NVC87D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVC87D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 +#define NVC87D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED(a) (0x00002220 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_ALPHA 7:0 +#define NVC87D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_RED 31:16 +#define NVC87D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE(a) (0x00002224 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_GREEN 15:0 +#define NVC87D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_BLUE 31:16 +#define NVC87D_HEAD_SET_CURSOR_COLOR_NORM_SCALE(a) (0x00002228 + (a)*0x00000400) +#define NVC87D_HEAD_SET_CURSOR_COLOR_NORM_SCALE_VALUE 15:0 +#define NVC87D_HEAD_SET_XOR_BLEND_FACTOR(a) (0x0000222C + (a)*0x00000400) +#define NVC87D_HEAD_SET_XOR_BLEND_FACTOR_LOG2PEAK_LUMINANCE 3:0 +#define NVC87D_HEAD_SET_XOR_BLEND_FACTOR_S1 16:4 +#define NVC87D_HEAD_SET_XOR_BLEND_FACTOR_S2 30:18 +#define NVC87D_HEAD_SET_CLAMP_RANGE_GREEN(a) (0x00002238 + (a)*0x00000400) +#define NVC87D_HEAD_SET_CLAMP_RANGE_GREEN_LOW 11:0 +#define NVC87D_HEAD_SET_CLAMP_RANGE_GREEN_HIGH 27:16 +#define NVC87D_HEAD_SET_CLAMP_RANGE_RED_BLUE(a) (0x0000223C + (a)*0x00000400) +#define NVC87D_HEAD_SET_CLAMP_RANGE_RED_BLUE_LOW 11:0 +#define NVC87D_HEAD_SET_CLAMP_RANGE_RED_BLUE_HIGH 27:16 +#define NVC87D_HEAD_SET_OCSC0CONTROL(a) (0x00002240 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0CONTROL_ENABLE 0:0 +#define NVC87D_HEAD_SET_OCSC0CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_OCSC0CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C00(a) (0x00002244 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C00_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C01(a) (0x00002248 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C01_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C02(a) (0x0000224C + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C02_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C03(a) (0x00002250 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C03_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C10(a) (0x00002254 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C10_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C11(a) (0x00002258 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C11_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C12(a) (0x0000225C + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C12_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C13(a) (0x00002260 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C13_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C20(a) (0x00002264 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C20_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C21(a) (0x00002268 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C21_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C22(a) (0x0000226C + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C22_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C23(a) (0x00002270 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC0COEFFICIENT_C23_VALUE 20:0 +#define NVC87D_HEAD_SET_OLUT_CONTROL(a) (0x00002280 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OLUT_CONTROL_INTERPOLATE 0:0 +#define NVC87D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_OLUT_CONTROL_MIRROR 1:1 +#define NVC87D_HEAD_SET_OLUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_OLUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_OLUT_CONTROL_MODE 3:2 +#define NVC87D_HEAD_SET_OLUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC87D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC87D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC87D_HEAD_SET_OLUT_CONTROL_SIZE 18:8 +#define NVC87D_HEAD_SET_OLUT_FP_NORM_SCALE(a) (0x00002284 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OLUT_FP_NORM_SCALE_VALUE 31:0 +#define NVC87D_HEAD_SET_CONTEXT_DMA_OLUT(a) (0x00002288 + (a)*0x00000400) +#define NVC87D_HEAD_SET_CONTEXT_DMA_OLUT_HANDLE 31:0 +#define NVC87D_HEAD_SET_OFFSET_OLUT(a) (0x0000228C + (a)*0x00000400) +#define NVC87D_HEAD_SET_OFFSET_OLUT_ORIGIN 31:0 +#define NVC87D_HEAD_SET_OCSC1CONTROL(a) (0x0000229C + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1CONTROL_ENABLE 0:0 +#define NVC87D_HEAD_SET_OCSC1CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_OCSC1CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C00(a) (0x000022A0 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C00_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C01(a) (0x000022A4 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C01_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C02(a) (0x000022A8 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C02_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C03(a) (0x000022AC + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C03_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C10(a) (0x000022B0 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C10_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C11(a) (0x000022B4 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C11_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C12(a) (0x000022B8 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C12_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C13(a) (0x000022BC + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C13_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C20(a) (0x000022C0 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C20_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C21(a) (0x000022C4 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C21_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C22(a) (0x000022C8 + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C22_VALUE 20:0 +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C23(a) (0x000022CC + (a)*0x00000400) +#define NVC87D_HEAD_SET_OCSC1COEFFICIENT_C23_VALUE 20:0 +#define NVC87D_HEAD_SET_TILE_POSITION(a) (0x000022D0 + (a)*0x00000400) +#define NVC87D_HEAD_SET_TILE_POSITION_X 2:0 +#define NVC87D_HEAD_SET_TILE_POSITION_Y 6:4 +#define NVC87D_HEAD_SET_DSC_CONTROL(a) (0x000022D4 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_CONTROL_ENABLE 0:0 +#define NVC87D_HEAD_SET_DSC_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC87D_HEAD_SET_DSC_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC87D_HEAD_SET_DSC_CONTROL_MODE 2:1 +#define NVC87D_HEAD_SET_DSC_CONTROL_MODE_SINGLE (0x00000000) +#define NVC87D_HEAD_SET_DSC_CONTROL_MODE_DUAL (0x00000001) +#define NVC87D_HEAD_SET_DSC_CONTROL_MODE_QUAD (0x00000002) +#define NVC87D_HEAD_SET_DSC_CONTROL_AUTO_RESET 3:3 +#define NVC87D_HEAD_SET_DSC_CONTROL_AUTO_RESET_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_DSC_CONTROL_AUTO_RESET_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION 4:4 +#define NVC87D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_ENABLE (0x00000001) +#define NVC87D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET 5:5 +#define NVC87D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_FALSE (0x00000000) +#define NVC87D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_TRUE (0x00000001) +#define NVC87D_HEAD_SET_DSC_CONTROL_FLATNESS_DET_THRESH 15:6 +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL(a) (0x000022D8 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_ENABLE 0:0 +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_LOCATION 1:1 +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_SIZE 9:2 +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY 10:10 +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC87D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC87D_HEAD_SET_DSC_PPS_HEAD(a) (0x000022DC + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_HEAD_BYTE0 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_HEAD_BYTE1 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_HEAD_BYTE2 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_HEAD_BYTE3 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA0(a) (0x000022E0 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MINOR 3:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MAJOR 7:4 +#define NVC87D_HEAD_SET_DSC_PPS_DATA0_PPS_IDENTIFIER 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA0_RESERVED 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA0_LINEBUF_DEPTH 27:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA0_BITS_PER_COMPONENT 31:28 +#define NVC87D_HEAD_SET_DSC_PPS_DATA1(a) (0x000022E4 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_HIGH 1:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA1_VBR_ENABLE 2:2 +#define NVC87D_HEAD_SET_DSC_PPS_DATA1_SIMPLE422 3:3 +#define NVC87D_HEAD_SET_DSC_PPS_DATA1_CONVERT_RGB 4:4 +#define NVC87D_HEAD_SET_DSC_PPS_DATA1_BLOCK_PRED_ENABLE 5:5 +#define NVC87D_HEAD_SET_DSC_PPS_DATA1_RESERVED 7:6 +#define NVC87D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_LOW 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_HIGH 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_LOW 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA2(a) (0x000022E8 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_HIGH 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_LOW 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_HIGH 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_LOW 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA3(a) (0x000022EC + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_HIGH 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_LOW 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_HIGH 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_LOW 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA4(a) (0x000022F0 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_HIGH 1:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA4_RESERVED 7:2 +#define NVC87D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_LOW 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_HIGH 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_LOW 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA5(a) (0x000022F4 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA5_RESERVED0 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA5_INITIAL_SCALE_VALUE 13:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA5_RESERVED1 15:14 +#define NVC87D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_HIGH 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_LOW 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA6(a) (0x000022F8 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_HIGH 3:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA6_RESERVED0 7:4 +#define NVC87D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_LOW 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA6_RESERVED1 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA6_FIRST_LINE_BPG_OFFSET 28:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA6_RESERVED2 31:29 +#define NVC87D_HEAD_SET_DSC_PPS_DATA7(a) (0x000022FC + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_HIGH 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_LOW 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_HIGH 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_LOW 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA8(a) (0x00002300 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_HIGH 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_LOW 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_HIGH 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_LOW 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA9(a) (0x00002304 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MIN_QP 4:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA9_RESERVED0 7:5 +#define NVC87D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MAX_QP 12:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA9_RESERVED1 15:13 +#define NVC87D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_HIGH 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_LOW 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA10(a) (0x00002308 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA10_RC_EDGE_FACTOR 3:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA10_RESERVED0 7:4 +#define NVC87D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT0 12:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA10_RESERVED1 15:13 +#define NVC87D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT1 20:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA10_RESERVED2 23:21 +#define NVC87D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_LO 27:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_HI 31:28 +#define NVC87D_HEAD_SET_DSC_PPS_DATA11(a) (0x0000230C + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH0 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH1 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH2 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH3 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA12(a) (0x00002310 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH4 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH5 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH6 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH7 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA13(a) (0x00002314 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH8 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH9 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH10 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH11 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA14(a) (0x00002318 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH12 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH13 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_HIGH0 18:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MIN_QP0 23:19 +#define NVC87D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_BPG_OFFSET0 29:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_LOW0 31:30 +#define NVC87D_HEAD_SET_DSC_PPS_DATA15(a) (0x0000231C + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH1 2:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP1 7:3 +#define NVC87D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET1 13:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW1 15:14 +#define NVC87D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH2 18:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP2 23:19 +#define NVC87D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET2 29:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW2 31:30 +#define NVC87D_HEAD_SET_DSC_PPS_DATA16(a) (0x00002320 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH3 2:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP3 7:3 +#define NVC87D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET3 13:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW3 15:14 +#define NVC87D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH4 18:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP4 23:19 +#define NVC87D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET4 29:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW4 31:30 +#define NVC87D_HEAD_SET_DSC_PPS_DATA17(a) (0x00002324 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH5 2:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP5 7:3 +#define NVC87D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET5 13:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW5 15:14 +#define NVC87D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH6 18:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP6 23:19 +#define NVC87D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET6 29:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW6 31:30 +#define NVC87D_HEAD_SET_DSC_PPS_DATA18(a) (0x00002328 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH7 2:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP7 7:3 +#define NVC87D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET7 13:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW7 15:14 +#define NVC87D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH8 18:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP8 23:19 +#define NVC87D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET8 29:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW8 31:30 +#define NVC87D_HEAD_SET_DSC_PPS_DATA19(a) (0x0000232C + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH9 2:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP9 7:3 +#define NVC87D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET9 13:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW9 15:14 +#define NVC87D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH10 18:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP10 23:19 +#define NVC87D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET10 29:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW10 31:30 +#define NVC87D_HEAD_SET_DSC_PPS_DATA20(a) (0x00002330 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH11 2:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP11 7:3 +#define NVC87D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET11 13:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW11 15:14 +#define NVC87D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH12 18:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP12 23:19 +#define NVC87D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET12 29:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW12 31:30 +#define NVC87D_HEAD_SET_DSC_PPS_DATA21(a) (0x00002334 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH13 2:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP13 7:3 +#define NVC87D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET13 13:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW13 15:14 +#define NVC87D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH14 18:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP14 23:19 +#define NVC87D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET14 29:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW14 31:30 +#define NVC87D_HEAD_SET_DSC_PPS_DATA22(a) (0x00002338 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA22_NATIVE422 0:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA22_NATIVE420 1:1 +#define NVC87D_HEAD_SET_DSC_PPS_DATA22_RESERVED0 7:2 +#define NVC87D_HEAD_SET_DSC_PPS_DATA22_SECOND_LINE_BPG_OFFSET 12:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA22_RESERVED1 15:13 +#define NVC87D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSET_HIGH 23:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSETLOW 31:24 +#define NVC87D_HEAD_SET_DSC_PPS_DATA23(a) (0x0000233C + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_HIGH 7:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_LOW 15:8 +#define NVC87D_HEAD_SET_DSC_PPS_DATA23_RESERVED 31:16 +#define NVC87D_HEAD_SET_DSC_PPS_DATA24(a) (0x00002340 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA24_RESERVED 31:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA25(a) (0x00002344 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA25_RESERVED 31:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA26(a) (0x00002348 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA26_RESERVED 31:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA27(a) (0x0000234C + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA27_RESERVED 31:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA28(a) (0x00002350 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA28_RESERVED 31:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA29(a) (0x00002354 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA29_RESERVED 31:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA30(a) (0x00002358 + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA30_RESERVED 31:0 +#define NVC87D_HEAD_SET_DSC_PPS_DATA31(a) (0x0000235C + (a)*0x00000400) +#define NVC87D_HEAD_SET_DSC_PPS_DATA31_RESERVED 31:0 +#define NVC87D_HEAD_SET_RG_MERGE(a) (0x00002360 + (a)*0x00000400) +#define NVC87D_HEAD_SET_RG_MERGE_MODE 1:0 +#define NVC87D_HEAD_SET_RG_MERGE_MODE_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_RG_MERGE_MODE_SETUP (0x00000001) +#define NVC87D_HEAD_SET_RG_MERGE_MODE_MASTER (0x00000002) +#define NVC87D_HEAD_SET_RG_MERGE_MODE_SLAVE (0x00000003) +#define NVC87D_HEAD_SET_RASTER_HBLANK_DELAY(a) (0x00002364 + (a)*0x00000400) +#define NVC87D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_START 15:0 +#define NVC87D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_END 31:16 +#define NVC87D_HEAD_SET_HDMI_DSC_HCACTIVE(a) (0x00002368 + (a)*0x00000400) +#define NVC87D_HEAD_SET_HDMI_DSC_HCACTIVE_BYTES 15:0 +#define NVC87D_HEAD_SET_HDMI_DSC_HCACTIVE_TRI_BYTES 31:16 +#define NVC87D_HEAD_SET_HDMI_DSC_HCBLANK(a) (0x0000236C + (a)*0x00000400) +#define NVC87D_HEAD_SET_HDMI_DSC_HCBLANK_WIDTH 15:0 +#define NVC87D_HEAD_SW_RESERVED(a,b) (0x00002370 + (a)*0x00000400 + (b)*0x00000004) +#define NVC87D_HEAD_SW_RESERVED_VALUE 31:0 +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI(a,b) (0x00002380 + (a)*0x00000400 + (b)*0x00000004) +#define NVC87D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVC87D_HEAD_SET_HEAD_INFOFRAME(a) (0x000023A0 + (a)*0x00000400) +#define NVC87D_HEAD_SET_HEAD_INFOFRAME_FID 7:0 +#define NVC87D_HEAD_SET_HEAD_INFOFRAME_EN 16:16 +#define NVC87D_HEAD_SET_HEAD_INFOFRAME_EN_DISABLE (0x00000000) +#define NVC87D_HEAD_SET_HEAD_INFOFRAME_EN_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC87d_h diff --git a/userspace/sdks/nv570/inc/class/clc87e.h b/userspace/sdks/nv570/inc/class/clc87e.h new file mode 100644 index 0000000..61c58f1 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc87e.h @@ -0,0 +1,697 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clC87e_h_ +#define _clC87e_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC87E_WINDOW_CHANNEL_DMA (0x0000C87E) + +// dma opcode instructions +#define NVC87E_DMA +#define NVC87E_DMA_OPCODE 31:29 +#define NVC87E_DMA_OPCODE_METHOD 0x00000000 +#define NVC87E_DMA_OPCODE_JUMP 0x00000001 +#define NVC87E_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC87E_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC87E_DMA_METHOD_COUNT 27:18 +#define NVC87E_DMA_METHOD_OFFSET 13:2 +#define NVC87E_DMA_DATA 31:0 +#define NVC87E_DMA_DATA_NOP 0x00000000 +#define NVC87E_DMA_JUMP_OFFSET 11:2 +#define NVC87E_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC87E_PUT (0x00000000) +#define NVC87E_PUT_PTR 9:0 +#define NVC87E_GET (0x00000004) +#define NVC87E_GET_PTR 9:0 +#define NVC87E_UPDATE (0x00000200) +#define NVC87E_UPDATE_RELEASE_ELV 0:0 +#define NVC87E_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC87E_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC87E_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC87E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC87E_UPDATE_INTERLOCK_WITH_WIN_IMM 12:12 +#define NVC87E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000) +#define NVC87E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001) +#define NVC87E_SET_SEMAPHORE_ACQUIRE_HI (0x00000204) +#define NVC87E_SET_SEMAPHORE_ACQUIRE_HI_VALUE 31:0 +#define NVC87E_GET_LINE (0x00000208) +#define NVC87E_GET_LINE_LINE 15:0 +#define NVC87E_SET_SEMAPHORE_CONTROL (0x0000020C) +#define NVC87E_SET_SEMAPHORE_CONTROL_OFFSET 7:0 +#define NVC87E_SET_SEMAPHORE_CONTROL_SKIP_ACQ 11:11 +#define NVC87E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_FALSE (0x00000000) +#define NVC87E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_TRUE (0x00000001) +#define NVC87E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC87E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC87E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC87E_SET_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVC87E_SET_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVC87E_SET_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVC87E_SET_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVC87E_SET_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVC87E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVC87E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC87E_SET_SEMAPHORE_ACQUIRE (0x00000210) +#define NVC87E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0 +#define NVC87E_SET_SEMAPHORE_RELEASE (0x00000214) +#define NVC87E_SET_SEMAPHORE_RELEASE_VALUE 31:0 +#define NVC87E_SET_CONTEXT_DMA_SEMAPHORE (0x00000218) +#define NVC87E_SET_CONTEXT_DMA_SEMAPHORE_HANDLE 31:0 +#define NVC87E_SET_CONTEXT_DMA_NOTIFIER (0x0000021C) +#define NVC87E_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 +#define NVC87E_SET_NOTIFIER_CONTROL (0x00000220) +#define NVC87E_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC87E_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC87E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC87E_SET_NOTIFIER_CONTROL_OFFSET 11:4 +#define NVC87E_SET_SIZE (0x00000224) +#define NVC87E_SET_SIZE_WIDTH 15:0 +#define NVC87E_SET_SIZE_HEIGHT 31:16 +#define NVC87E_SET_STORAGE (0x00000228) +#define NVC87E_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NVC87E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NVC87E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NVC87E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC87E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC87E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC87E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC87E_SET_PARAMS (0x0000022C) +#define NVC87E_SET_PARAMS_FORMAT 7:0 +#define NVC87E_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NVC87E_SET_PARAMS_FORMAT_R4G4B4A4 (0x0000002F) +#define NVC87E_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NVC87E_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC87E_SET_PARAMS_FORMAT_R5G5B5A1 (0x0000002E) +#define NVC87E_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC87E_SET_PARAMS_FORMAT_X8R8G8B8 (0x000000E6) +#define NVC87E_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NVC87E_SET_PARAMS_FORMAT_X8B8G8R8 (0x000000F9) +#define NVC87E_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NVC87E_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NVC87E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NVC87E_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NVC87E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NVC87E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422 (0x00000028) +#define NVC87E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422 (0x00000029) +#define NVC87E_SET_PARAMS_FORMAT_Y8___U8V8_N444 (0x00000035) +#define NVC87E_SET_PARAMS_FORMAT_Y8___U8V8_N422 (0x00000036) +#define NVC87E_SET_PARAMS_FORMAT_Y8___V8U8_N420 (0x00000038) +#define NVC87E_SET_PARAMS_FORMAT_Y8___U8___V8_N444 (0x0000003A) +#define NVC87E_SET_PARAMS_FORMAT_Y8___U8___V8_N420 (0x0000003B) +#define NVC87E_SET_PARAMS_FORMAT_Y10___U10V10_N444 (0x00000055) +#define NVC87E_SET_PARAMS_FORMAT_Y10___U10V10_N422 (0x00000056) +#define NVC87E_SET_PARAMS_FORMAT_Y10___V10U10_N420 (0x00000058) +#define NVC87E_SET_PARAMS_FORMAT_Y12___U12V12_N444 (0x00000075) +#define NVC87E_SET_PARAMS_FORMAT_Y12___U12V12_N422 (0x00000076) +#define NVC87E_SET_PARAMS_FORMAT_Y12___V12U12_N420 (0x00000078) +#define NVC87E_SET_PARAMS_CLAMP_BEFORE_BLEND 18:18 +#define NVC87E_SET_PARAMS_CLAMP_BEFORE_BLEND_DISABLE (0x00000000) +#define NVC87E_SET_PARAMS_CLAMP_BEFORE_BLEND_ENABLE (0x00000001) +#define NVC87E_SET_PARAMS_SWAP_UV 19:19 +#define NVC87E_SET_PARAMS_SWAP_UV_DISABLE (0x00000000) +#define NVC87E_SET_PARAMS_SWAP_UV_ENABLE (0x00000001) +#define NVC87E_SET_PARAMS_FMT_ROUNDING_MODE 22:22 +#define NVC87E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_TO_NEAREST (0x00000000) +#define NVC87E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_DOWN (0x00000001) +#define NVC87E_SET_PLANAR_STORAGE(b) (0x00000230 + (b)*0x00000004) +#define NVC87E_SET_PLANAR_STORAGE_PITCH 12:0 +#define NVC87E_SET_SEMAPHORE_RELEASE_HI (0x0000023C) +#define NVC87E_SET_SEMAPHORE_RELEASE_HI_VALUE 31:0 +#define NVC87E_SET_CONTEXT_DMA_ISO(b) (0x00000240 + (b)*0x00000004) +#define NVC87E_SET_CONTEXT_DMA_ISO_HANDLE 31:0 +#define NVC87E_SET_OFFSET(b) (0x00000260 + (b)*0x00000004) +#define NVC87E_SET_OFFSET_ORIGIN 31:0 +#define NVC87E_SET_POINT_IN(b) (0x00000290 + (b)*0x00000004) +#define NVC87E_SET_POINT_IN_X 15:0 +#define NVC87E_SET_POINT_IN_Y 31:16 +#define NVC87E_SET_SIZE_IN (0x00000298) +#define NVC87E_SET_SIZE_IN_WIDTH 15:0 +#define NVC87E_SET_SIZE_IN_HEIGHT 31:16 +#define NVC87E_SET_SIZE_OUT (0x000002A4) +#define NVC87E_SET_SIZE_OUT_WIDTH 15:0 +#define NVC87E_SET_SIZE_OUT_HEIGHT 31:16 +#define NVC87E_SET_CONTROL_INPUT_SCALER (0x000002A8) +#define NVC87E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC87E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC87E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC87E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC87E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC87E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC87E_SET_INPUT_SCALER_COEFF_VALUE (0x000002AC) +#define NVC87E_SET_INPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC87E_SET_INPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC87E_SET_COMPOSITION_CONTROL (0x000002EC) +#define NVC87E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVC87E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVC87E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVC87E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVC87E_SET_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVC87E_SET_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVC87E_SET_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVC87E_SET_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVC87E_SET_COMPOSITION_CONSTANT_ALPHA (0x000002F0) +#define NVC87E_SET_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVC87E_SET_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT (0x000002F4) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC87E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC87E_SET_KEY_ALPHA (0x000002F8) +#define NVC87E_SET_KEY_ALPHA_MIN 15:0 +#define NVC87E_SET_KEY_ALPHA_MAX 31:16 +#define NVC87E_SET_KEY_RED_CR (0x000002FC) +#define NVC87E_SET_KEY_RED_CR_MIN 15:0 +#define NVC87E_SET_KEY_RED_CR_MAX 31:16 +#define NVC87E_SET_KEY_GREEN_Y (0x00000300) +#define NVC87E_SET_KEY_GREEN_Y_MIN 15:0 +#define NVC87E_SET_KEY_GREEN_Y_MAX 31:16 +#define NVC87E_SET_KEY_BLUE_CB (0x00000304) +#define NVC87E_SET_KEY_BLUE_CB_MIN 15:0 +#define NVC87E_SET_KEY_BLUE_CB_MAX 31:16 +#define NVC87E_SET_PRESENT_CONTROL (0x00000308) +#define NVC87E_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NVC87E_SET_PRESENT_CONTROL_BEGIN_MODE 6:4 +#define NVC87E_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000) +#define NVC87E_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001) +#define NVC87E_SET_PRESENT_CONTROL_TIMESTAMP_MODE 8:8 +#define NVC87E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_DISABLE (0x00000000) +#define NVC87E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_ENABLE (0x00000001) +#define NVC87E_SET_PRESENT_CONTROL_STEREO_MODE 13:12 +#define NVC87E_SET_PRESENT_CONTROL_STEREO_MODE_MONO (0x00000000) +#define NVC87E_SET_PRESENT_CONTROL_STEREO_MODE_PAIR_FLIP (0x00000001) +#define NVC87E_SET_PRESENT_CONTROL_STEREO_MODE_AT_ANY_FRAME (0x00000002) +#define NVC87E_SET_ACQ_SEMAPHORE_VALUE_HI (0x0000030C) +#define NVC87E_SET_ACQ_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVC87E_SET_ACQ_SEMAPHORE_CONTROL (0x00000330) +#define NVC87E_SET_ACQ_SEMAPHORE_CONTROL_OFFSET 7:0 +#define NVC87E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC87E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC87E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC87E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVC87E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVC87E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVC87E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVC87E_SET_ACQ_SEMAPHORE_VALUE (0x00000334) +#define NVC87E_SET_ACQ_SEMAPHORE_VALUE_VALUE 31:0 +#define NVC87E_SET_CONTEXT_DMA_ACQ_SEMAPHORE (0x00000338) +#define NVC87E_SET_CONTEXT_DMA_ACQ_SEMAPHORE_HANDLE 31:0 +#define NVC87E_SET_SCAN_DIRECTION (0x0000033C) +#define NVC87E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION 0:0 +#define NVC87E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_LEFT (0x00000000) +#define NVC87E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_RIGHT (0x00000001) +#define NVC87E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION 1:1 +#define NVC87E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_TOP (0x00000000) +#define NVC87E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_BOTTOM (0x00000001) +#define NVC87E_SET_SCAN_DIRECTION_COLUMN_ORDER 2:2 +#define NVC87E_SET_SCAN_DIRECTION_COLUMN_ORDER_FALSE (0x00000000) +#define NVC87E_SET_SCAN_DIRECTION_COLUMN_ORDER_TRUE (0x00000001) +#define NVC87E_SET_TIMESTAMP_ORIGIN_LO (0x00000340) +#define NVC87E_SET_TIMESTAMP_ORIGIN_LO_TIMESTAMP_LO 31:0 +#define NVC87E_SET_TIMESTAMP_ORIGIN_HI (0x00000344) +#define NVC87E_SET_TIMESTAMP_ORIGIN_HI_TIMESTAMP_HI 31:0 +#define NVC87E_SET_UPDATE_TIMESTAMP_LO (0x00000348) +#define NVC87E_SET_UPDATE_TIMESTAMP_LO_TIMESTAMP_LO 31:0 +#define NVC87E_SET_UPDATE_TIMESTAMP_HI (0x0000034C) +#define NVC87E_SET_UPDATE_TIMESTAMP_HI_TIMESTAMP_HI 31:0 +#define NVC87E_SET_INTERLOCK_FLAGS (0x00000370) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 0:0 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+1):((i)+1) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 1:1 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 2:2 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 3:3 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 4:4 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 5:5 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 6:6 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 7:7 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 8:8 +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC87E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS (0x00000374) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC87E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC87E_SET_EXT_PACKET_CONTROL (0x00000398) +#define NVC87E_SET_EXT_PACKET_CONTROL_ENABLE 0:0 +#define NVC87E_SET_EXT_PACKET_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87E_SET_EXT_PACKET_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87E_SET_EXT_PACKET_CONTROL_LOCATION 4:4 +#define NVC87E_SET_EXT_PACKET_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVC87E_SET_EXT_PACKET_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVC87E_SET_EXT_PACKET_CONTROL_FREQUENCY 8:8 +#define NVC87E_SET_EXT_PACKET_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC87E_SET_EXT_PACKET_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC87E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE 12:12 +#define NVC87E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_DISABLE (0x00000000) +#define NVC87E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_ENABLE (0x00000001) +#define NVC87E_SET_EXT_PACKET_CONTROL_SIZE 27:16 +#define NVC87E_SET_EXT_PACKET_DATA (0x0000039C) +#define NVC87E_SET_EXT_PACKET_DATA_DB0 7:0 +#define NVC87E_SET_EXT_PACKET_DATA_DB1 15:8 +#define NVC87E_SET_EXT_PACKET_DATA_DB2 23:16 +#define NVC87E_SET_EXT_PACKET_DATA_DB3 31:24 +#define NVC87E_SET_FMT_COEFFICIENT_C00 (0x00000400) +#define NVC87E_SET_FMT_COEFFICIENT_C00_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C01 (0x00000404) +#define NVC87E_SET_FMT_COEFFICIENT_C01_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C02 (0x00000408) +#define NVC87E_SET_FMT_COEFFICIENT_C02_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C03 (0x0000040C) +#define NVC87E_SET_FMT_COEFFICIENT_C03_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C10 (0x00000410) +#define NVC87E_SET_FMT_COEFFICIENT_C10_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C11 (0x00000414) +#define NVC87E_SET_FMT_COEFFICIENT_C11_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C12 (0x00000418) +#define NVC87E_SET_FMT_COEFFICIENT_C12_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C13 (0x0000041C) +#define NVC87E_SET_FMT_COEFFICIENT_C13_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C20 (0x00000420) +#define NVC87E_SET_FMT_COEFFICIENT_C20_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C21 (0x00000424) +#define NVC87E_SET_FMT_COEFFICIENT_C21_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C22 (0x00000428) +#define NVC87E_SET_FMT_COEFFICIENT_C22_VALUE 20:0 +#define NVC87E_SET_FMT_COEFFICIENT_C23 (0x0000042C) +#define NVC87E_SET_FMT_COEFFICIENT_C23_VALUE 20:0 +#define NVC87E_SET_ILUT_CONTROL (0x00000440) +#define NVC87E_SET_ILUT_CONTROL_INTERPOLATE 0:0 +#define NVC87E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC87E_SET_ILUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC87E_SET_ILUT_CONTROL_MIRROR 1:1 +#define NVC87E_SET_ILUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC87E_SET_ILUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC87E_SET_ILUT_CONTROL_MODE 3:2 +#define NVC87E_SET_ILUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC87E_SET_ILUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC87E_SET_ILUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC87E_SET_ILUT_CONTROL_SIZE 18:8 +#define NVC87E_SET_CONTEXT_DMA_ILUT (0x00000444) +#define NVC87E_SET_CONTEXT_DMA_ILUT_HANDLE 31:0 +#define NVC87E_SET_OFFSET_ILUT (0x00000448) +#define NVC87E_SET_OFFSET_ILUT_ORIGIN 31:0 +#define NVC87E_SET_CSC00CONTROL (0x0000045C) +#define NVC87E_SET_CSC00CONTROL_ENABLE 0:0 +#define NVC87E_SET_CSC00CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87E_SET_CSC00CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87E_SET_CSC00COEFFICIENT_C00 (0x00000460) +#define NVC87E_SET_CSC00COEFFICIENT_C00_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C01 (0x00000464) +#define NVC87E_SET_CSC00COEFFICIENT_C01_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C02 (0x00000468) +#define NVC87E_SET_CSC00COEFFICIENT_C02_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C03 (0x0000046C) +#define NVC87E_SET_CSC00COEFFICIENT_C03_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C10 (0x00000470) +#define NVC87E_SET_CSC00COEFFICIENT_C10_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C11 (0x00000474) +#define NVC87E_SET_CSC00COEFFICIENT_C11_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C12 (0x00000478) +#define NVC87E_SET_CSC00COEFFICIENT_C12_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C13 (0x0000047C) +#define NVC87E_SET_CSC00COEFFICIENT_C13_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C20 (0x00000480) +#define NVC87E_SET_CSC00COEFFICIENT_C20_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C21 (0x00000484) +#define NVC87E_SET_CSC00COEFFICIENT_C21_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C22 (0x00000488) +#define NVC87E_SET_CSC00COEFFICIENT_C22_VALUE 20:0 +#define NVC87E_SET_CSC00COEFFICIENT_C23 (0x0000048C) +#define NVC87E_SET_CSC00COEFFICIENT_C23_VALUE 20:0 +#define NVC87E_SET_CSC0LUT_CONTROL (0x000004A0) +#define NVC87E_SET_CSC0LUT_CONTROL_INTERPOLATE 0:0 +#define NVC87E_SET_CSC0LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC87E_SET_CSC0LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC87E_SET_CSC0LUT_CONTROL_MIRROR 1:1 +#define NVC87E_SET_CSC0LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC87E_SET_CSC0LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC87E_SET_CSC0LUT_CONTROL_ENABLE 4:4 +#define NVC87E_SET_CSC0LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87E_SET_CSC0LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87E_SET_CSC0LUT_SEGMENT_SIZE (0x000004A4) +#define NVC87E_SET_CSC0LUT_SEGMENT_SIZE_IDX 5:0 +#define NVC87E_SET_CSC0LUT_SEGMENT_SIZE_VALUE 18:16 +#define NVC87E_SET_CSC0LUT_ENTRY (0x000004A8) +#define NVC87E_SET_CSC0LUT_ENTRY_IDX 10:0 +#define NVC87E_SET_CSC0LUT_ENTRY_VALUE 31:16 +#define NVC87E_SET_CSC01CONTROL (0x000004BC) +#define NVC87E_SET_CSC01CONTROL_ENABLE 0:0 +#define NVC87E_SET_CSC01CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87E_SET_CSC01CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87E_SET_CSC01COEFFICIENT_C00 (0x000004C0) +#define NVC87E_SET_CSC01COEFFICIENT_C00_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C01 (0x000004C4) +#define NVC87E_SET_CSC01COEFFICIENT_C01_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C02 (0x000004C8) +#define NVC87E_SET_CSC01COEFFICIENT_C02_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C03 (0x000004CC) +#define NVC87E_SET_CSC01COEFFICIENT_C03_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C10 (0x000004D0) +#define NVC87E_SET_CSC01COEFFICIENT_C10_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C11 (0x000004D4) +#define NVC87E_SET_CSC01COEFFICIENT_C11_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C12 (0x000004D8) +#define NVC87E_SET_CSC01COEFFICIENT_C12_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C13 (0x000004DC) +#define NVC87E_SET_CSC01COEFFICIENT_C13_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C20 (0x000004E0) +#define NVC87E_SET_CSC01COEFFICIENT_C20_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C21 (0x000004E4) +#define NVC87E_SET_CSC01COEFFICIENT_C21_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C22 (0x000004E8) +#define NVC87E_SET_CSC01COEFFICIENT_C22_VALUE 20:0 +#define NVC87E_SET_CSC01COEFFICIENT_C23 (0x000004EC) +#define NVC87E_SET_CSC01COEFFICIENT_C23_VALUE 20:0 +#define NVC87E_SET_TMO_CONTROL (0x00000500) +#define NVC87E_SET_TMO_CONTROL_INTERPOLATE 0:0 +#define NVC87E_SET_TMO_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC87E_SET_TMO_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC87E_SET_TMO_CONTROL_SAT_MODE 3:2 +#define NVC87E_SET_TMO_CONTROL_SIZE 18:8 +#define NVC87E_SET_TMO_LOW_INTENSITY_ZONE (0x00000508) +#define NVC87E_SET_TMO_LOW_INTENSITY_ZONE_END 29:16 +#define NVC87E_SET_TMO_LOW_INTENSITY_VALUE (0x0000050C) +#define NVC87E_SET_TMO_LOW_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC87E_SET_TMO_LOW_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC87E_SET_TMO_LOW_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC87E_SET_TMO_MEDIUM_INTENSITY_ZONE (0x00000510) +#define NVC87E_SET_TMO_MEDIUM_INTENSITY_ZONE_START 13:0 +#define NVC87E_SET_TMO_MEDIUM_INTENSITY_ZONE_END 29:16 +#define NVC87E_SET_TMO_MEDIUM_INTENSITY_VALUE (0x00000514) +#define NVC87E_SET_TMO_MEDIUM_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC87E_SET_TMO_MEDIUM_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC87E_SET_TMO_MEDIUM_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC87E_SET_TMO_HIGH_INTENSITY_ZONE (0x00000518) +#define NVC87E_SET_TMO_HIGH_INTENSITY_ZONE_START 13:0 +#define NVC87E_SET_TMO_HIGH_INTENSITY_VALUE (0x0000051C) +#define NVC87E_SET_TMO_HIGH_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC87E_SET_TMO_HIGH_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC87E_SET_TMO_HIGH_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC87E_SET_CONTEXT_DMA_TMO_LUT (0x00000528) +#define NVC87E_SET_CONTEXT_DMA_TMO_LUT_HANDLE 31:0 +#define NVC87E_SET_OFFSET_TMO_LUT (0x0000052C) +#define NVC87E_SET_OFFSET_TMO_LUT_ORIGIN 31:0 +#define NVC87E_SET_CSC10CONTROL (0x0000053C) +#define NVC87E_SET_CSC10CONTROL_ENABLE 0:0 +#define NVC87E_SET_CSC10CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87E_SET_CSC10CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87E_SET_CSC10COEFFICIENT_C00 (0x00000540) +#define NVC87E_SET_CSC10COEFFICIENT_C00_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C01 (0x00000544) +#define NVC87E_SET_CSC10COEFFICIENT_C01_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C02 (0x00000548) +#define NVC87E_SET_CSC10COEFFICIENT_C02_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C03 (0x0000054C) +#define NVC87E_SET_CSC10COEFFICIENT_C03_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C10 (0x00000550) +#define NVC87E_SET_CSC10COEFFICIENT_C10_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C11 (0x00000554) +#define NVC87E_SET_CSC10COEFFICIENT_C11_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C12 (0x00000558) +#define NVC87E_SET_CSC10COEFFICIENT_C12_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C13 (0x0000055C) +#define NVC87E_SET_CSC10COEFFICIENT_C13_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C20 (0x00000560) +#define NVC87E_SET_CSC10COEFFICIENT_C20_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C21 (0x00000564) +#define NVC87E_SET_CSC10COEFFICIENT_C21_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C22 (0x00000568) +#define NVC87E_SET_CSC10COEFFICIENT_C22_VALUE 20:0 +#define NVC87E_SET_CSC10COEFFICIENT_C23 (0x0000056C) +#define NVC87E_SET_CSC10COEFFICIENT_C23_VALUE 20:0 +#define NVC87E_SET_CSC1LUT_CONTROL (0x00000580) +#define NVC87E_SET_CSC1LUT_CONTROL_INTERPOLATE 0:0 +#define NVC87E_SET_CSC1LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC87E_SET_CSC1LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC87E_SET_CSC1LUT_CONTROL_MIRROR 1:1 +#define NVC87E_SET_CSC1LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC87E_SET_CSC1LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC87E_SET_CSC1LUT_CONTROL_ENABLE 4:4 +#define NVC87E_SET_CSC1LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87E_SET_CSC1LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87E_SET_CSC1LUT_SEGMENT_SIZE (0x00000584) +#define NVC87E_SET_CSC1LUT_SEGMENT_SIZE_IDX 5:0 +#define NVC87E_SET_CSC1LUT_SEGMENT_SIZE_VALUE 18:16 +#define NVC87E_SET_CSC1LUT_ENTRY (0x00000588) +#define NVC87E_SET_CSC1LUT_ENTRY_IDX 10:0 +#define NVC87E_SET_CSC1LUT_ENTRY_VALUE 31:16 +#define NVC87E_SET_CSC11CONTROL (0x0000059C) +#define NVC87E_SET_CSC11CONTROL_ENABLE 0:0 +#define NVC87E_SET_CSC11CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC87E_SET_CSC11CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC87E_SET_CSC11COEFFICIENT_C00 (0x000005A0) +#define NVC87E_SET_CSC11COEFFICIENT_C00_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C01 (0x000005A4) +#define NVC87E_SET_CSC11COEFFICIENT_C01_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C02 (0x000005A8) +#define NVC87E_SET_CSC11COEFFICIENT_C02_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C03 (0x000005AC) +#define NVC87E_SET_CSC11COEFFICIENT_C03_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C10 (0x000005B0) +#define NVC87E_SET_CSC11COEFFICIENT_C10_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C11 (0x000005B4) +#define NVC87E_SET_CSC11COEFFICIENT_C11_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C12 (0x000005B8) +#define NVC87E_SET_CSC11COEFFICIENT_C12_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C13 (0x000005BC) +#define NVC87E_SET_CSC11COEFFICIENT_C13_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C20 (0x000005C0) +#define NVC87E_SET_CSC11COEFFICIENT_C20_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C21 (0x000005C4) +#define NVC87E_SET_CSC11COEFFICIENT_C21_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C22 (0x000005C8) +#define NVC87E_SET_CSC11COEFFICIENT_C22_VALUE 20:0 +#define NVC87E_SET_CSC11COEFFICIENT_C23 (0x000005CC) +#define NVC87E_SET_CSC11COEFFICIENT_C23_VALUE 20:0 +#define NVC87E_SET_CLAMP_RANGE (0x000005D0) +#define NVC87E_SET_CLAMP_RANGE_LOW 15:0 +#define NVC87E_SET_CLAMP_RANGE_HIGH 31:16 +#define NVC87E_SW_RESERVED(b) (0x000005D4 + (b)*0x00000004) +#define NVC87E_SW_RESERVED_VALUE 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clC87e_h diff --git a/userspace/sdks/nv570/inc/class/clc8b5.h b/userspace/sdks/nv570/inc/class/clc8b5.h new file mode 100644 index 0000000..2676dc5 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc8b5.h @@ -0,0 +1,137 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gh100_clc8b5_h__ +#define __gh100_clc8b5_h__ + +#define HOPPER_DMA_COPY_A (0x0000C8B5) +#define NVC8B5_SET_SEMAPHORE_A (0x00000240) +#define NVC8B5_SET_SEMAPHORE_A_UPPER 24:0 +#define NVC8B5_SET_SEMAPHORE_B (0x00000244) +#define NVC8B5_SET_SEMAPHORE_B_LOWER 31:0 +#define NVC8B5_SET_SEMAPHORE_PAYLOAD (0x00000248) +#define NVC8B5_SET_SRC_PHYS_MODE (0x00000260) +#define NVC8B5_SET_SRC_PHYS_MODE_TARGET 1:0 +#define NVC8B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC8B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC8B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC8B5_SET_SRC_PHYS_MODE_TARGET_PEERMEM (0x00000003) +#define NVC8B5_SET_SRC_PHYS_MODE_PEER_ID 8:6 +#define NVC8B5_SET_SRC_PHYS_MODE_FLA 9:9 +#define NVC8B5_SET_DST_PHYS_MODE (0x00000264) +#define NVC8B5_SET_DST_PHYS_MODE_TARGET 1:0 +#define NVC8B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000) +#define NVC8B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001) +#define NVC8B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002) +#define NVC8B5_SET_DST_PHYS_MODE_TARGET_PEERMEM (0x00000003) +#define NVC8B5_LAUNCH_DMA (0x00000300) +#define NVC8B5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVC8B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVC8B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVC8B5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVC8B5_LAUNCH_DMA_FLUSH_ENABLE 2:2 +#define NVC8B5_LAUNCH_DMA_FLUSH_ENABLE_FALSE (0x00000000) +#define NVC8B5_LAUNCH_DMA_FLUSH_ENABLE_TRUE (0x00000001) +#define NVC8B5_LAUNCH_DMA_FLUSH_TYPE 25:25 +#define NVC8B5_LAUNCH_DMA_FLUSH_TYPE_SYS (0x00000000) +#define NVC8B5_LAUNCH_DMA_FLUSH_TYPE_GL (0x00000001) +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_TYPE 4:3 +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_SEMAPHORE_NO_TIMESTAMP (0x00000001) +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_SEMAPHORE_WITH_TIMESTAMP (0x00000002) +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_TYPE_RELEASE_ONE_WORD_SEMAPHORE (0x00000001) +#define NVC8B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT 7:7 +#define NVC8B5_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC8B5_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8 +#define NVC8B5_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH (0x00000001) +#define NVC8B5_LAUNCH_DMA_MULTI_LINE_ENABLE 9:9 +#define NVC8B5_LAUNCH_DMA_MULTI_LINE_ENABLE_FALSE (0x00000000) +#define NVC8B5_LAUNCH_DMA_REMAP_ENABLE 10:10 +#define NVC8B5_LAUNCH_DMA_REMAP_ENABLE_FALSE (0x00000000) +#define NVC8B5_LAUNCH_DMA_REMAP_ENABLE_TRUE (0x00000001) +#define NVC8B5_LAUNCH_DMA_SRC_TYPE 12:12 +#define NVC8B5_LAUNCH_DMA_SRC_TYPE_VIRTUAL (0x00000000) +#define NVC8B5_LAUNCH_DMA_SRC_TYPE_PHYSICAL (0x00000001) +#define NVC8B5_LAUNCH_DMA_DST_TYPE 13:13 +#define NVC8B5_LAUNCH_DMA_DST_TYPE_VIRTUAL (0x00000000) +#define NVC8B5_LAUNCH_DMA_DST_TYPE_PHYSICAL (0x00000001) +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_REDUCTION 17:14 +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_INC (0x00000006) +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN 18:18 +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_SIGN_UNSIGNED (0x00000001) +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE 19:19 +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_REDUCTION_ENABLE_TRUE (0x00000001) +#define NVC8B5_LAUNCH_DMA_COPY_TYPE 21:20 +#define NVC8B5_LAUNCH_DMA_COPY_TYPE_PROT2PROT (0x00000000) +#define NVC8B5_LAUNCH_DMA_COPY_TYPE_DEFAULT (0x00000000) +#define NVC8B5_LAUNCH_DMA_COPY_TYPE_SECURE (0x00000001) +#define NVC8B5_LAUNCH_DMA_COPY_TYPE_NONPROT2NONPROT (0x00000002) +#define NVC8B5_LAUNCH_DMA_MEMORY_SCRUB_ENABLE 23:23 +#define NVC8B5_LAUNCH_DMA_MEMORY_SCRUB_ENABLE_FALSE (0x00000000) +#define NVC8B5_LAUNCH_DMA_MEMORY_SCRUB_ENABLE_TRUE (0x00000001) +#define NVC8B5_LAUNCH_DMA_DISABLE_PLC 26:26 +#define NVC8B5_LAUNCH_DMA_DISABLE_PLC_TRUE (0x00000001) +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_PAYLOAD_SIZE 27:27 +#define NVC8B5_LAUNCH_DMA_SEMAPHORE_PAYLOAD_SIZE_ONE_WORD (0x00000000) +#define NVC8B5_OFFSET_IN_UPPER (0x00000400) +#define NVC8B5_OFFSET_IN_UPPER_UPPER 24:0 +#define NVC8B5_OFFSET_IN_LOWER (0x00000404) +#define NVC8B5_OFFSET_IN_LOWER_VALUE 31:0 +#define NVC8B5_OFFSET_OUT_UPPER (0x00000408) +#define NVC8B5_OFFSET_OUT_UPPER_UPPER 24:0 +#define NVC8B5_OFFSET_OUT_LOWER (0x0000040C) +#define NVC8B5_OFFSET_OUT_LOWER_VALUE 31:0 +#define NVC8B5_LINE_LENGTH_IN (0x00000418) +#define NVC8B5_SET_SECURE_COPY_MODE (0x00000500) +#define NVC8B5_SET_SECURE_COPY_MODE_MODE 0:0 +#define NVC8B5_SET_SECURE_COPY_MODE_MODE_ENCRYPT (0x00000000) +#define NVC8B5_SET_SECURE_COPY_MODE_MODE_DECRYPT (0x00000001) +#define NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_UPPER (0x00000514) +#define NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_UPPER_UPPER 24:0 +#define NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_LOWER (0x00000518) +#define NVC8B5_SET_DECRYPT_AUTH_TAG_COMPARE_ADDR_LOWER_LOWER 31:0 +#define NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_UPPER (0x00000530) +#define NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_UPPER_UPPER 24:0 +#define NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_LOWER (0x00000534) +#define NVC8B5_SET_ENCRYPT_AUTH_TAG_ADDR_LOWER_LOWER 31:0 +#define NVC8B5_SET_ENCRYPT_IV_ADDR_UPPER (0x00000538) +#define NVC8B5_SET_ENCRYPT_IV_ADDR_UPPER_UPPER 24:0 +#define NVC8B5_SET_ENCRYPT_IV_ADDR_LOWER (0x0000053C) +#define NVC8B5_SET_ENCRYPT_IV_ADDR_LOWER_LOWER 31:0 +#define NVC8B5_SET_MEMORY_SCRUB_PARAMETERS (0x000006FC) +#define NVC8B5_SET_MEMORY_SCRUB_PARAMETERS_DISCARDABLE 0:0 +#define NVC8B5_SET_MEMORY_SCRUB_PARAMETERS_DISCARDABLE_FALSE (0x00000000) +#define NVC8B5_SET_REMAP_CONST_A (0x00000700) +#define NVC8B5_SET_REMAP_CONST_B (0x00000704) +#define NVC8B5_SET_REMAP_COMPONENTS (0x00000708) +#define NVC8B5_SET_REMAP_COMPONENTS_DST_X 2:0 +#define NVC8B5_SET_REMAP_COMPONENTS_DST_X_CONST_A (0x00000004) +#define NVC8B5_SET_REMAP_COMPONENTS_DST_X_CONST_B (0x00000005) +#define NVC8B5_SET_REMAP_COMPONENTS_DST_Y 6:4 +#define NVC8B5_SET_REMAP_COMPONENTS_DST_Y_CONST_B (0x00000005) +#define NVC8B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE 17:16 +#define NVC8B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_ONE (0x00000000) +#define NVC8B5_SET_REMAP_COMPONENTS_COMPONENT_SIZE_FOUR (0x00000003) +#define NVC8B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS 25:24 +#define NVC8B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_ONE (0x00000000) +#define NVC8B5_SET_REMAP_COMPONENTS_NUM_DST_COMPONENTS_TWO (0x00000001) +#endif // __gh100_clc8b5_h__ diff --git a/userspace/sdks/nv570/inc/class/clc96f.h b/userspace/sdks/nv570/inc/class/clc96f.h new file mode 100644 index 0000000..14b8a5d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc96f.h @@ -0,0 +1,113 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_clc96f_h__ +#define __gb100_clc96f_h__ + +#define BLACKWELL_CHANNEL_GPFIFO_A (0x0000C96F) + +typedef volatile struct Nvc96fControl_struct { + NvU32 Ignored00[0x23]; /* 0000-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored01[0x5c]; +} Nvc96fControl, BlackwellAControlGPFifo; + +#define NVC96F_SET_OBJECT (0x00000000) +#define NVC96F_MEM_OP_A (0x00000028) +#define NVC96F_MEM_OP_A_TLB_INVALIDATE_INVALIDATION_SIZE 5:0 // Used to specify size of invalidate, used for invalidates which are not of the REPLAY_CANCEL_TARGETED type +#define NVC96F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE 7:6 // only relevant for invalidates with NVC96F_MEM_OP_C_TLB_INVALIDATE_REPLAY_NONE for invalidating link TLB only, or non-link TLB only or all TLBs +#define NVC96F_MEM_OP_A_TLB_INVALIDATE_INVAL_SCOPE_NON_LINK_TLBS 2 +#define NVC96F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR 11:11 +#define NVC96F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_EN 0x00000001 +#define NVC96F_MEM_OP_A_TLB_INVALIDATE_SYSMEMBAR_DIS 0x00000000 +#define NVC96F_MEM_OP_A_TLB_INVALIDATE_TARGET_ADDR_LO 31:12 +#define NVC96F_MEM_OP_B (0x0000002c) +#define NVC96F_MEM_OP_B_TLB_INVALIDATE_TARGET_ADDR_HI 31:0 +#define NVC96F_MEM_OP_C (0x00000030) +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PDB 0:0 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PDB_ONE 0x00000000 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PDB_ALL 0x00000001 // Probably nonsensical for MMU_TLB_INVALIDATE_TARGETED +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_GPC 1:1 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_GPC_ENABLE 0x00000000 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_GPC_DISABLE 0x00000001 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_REPLAY 4:2 // only relevant if GPC ENABLE +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_REPLAY_NONE 0x00000000 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE 6:5 // only relevant if GPC ENABLE +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_NONE 0x00000000 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_ACK_TYPE_GLOBALLY 0x00000001 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL 9:7 // Invalidate affects this level and all below +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_ALL 0x00000000 // Invalidate tlb caches at all levels of the page table +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_PTE_ONLY 0x00000001 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PAGE_TABLE_LEVEL_UP_TO_PDE4 0x00000006 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE 11:10 // only relevant if PDB_ONE +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_VID_MEM 0x00000000 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PDB_APERTURE_SYS_MEM_COHERENT 0x00000002 +#define NVC96F_MEM_OP_C_TLB_INVALIDATE_PDB_ADDR_LO 31:12 // only relevant if PDB_ONE + +#define NVC96F_MEM_OP_D (0x00000034) +#define NVC96F_MEM_OP_D_TLB_INVALIDATE_PDB_ADDR_HI 26:0 // only relevant if PDB_ONE +#define NVC96F_MEM_OP_D_OPERATION 31:27 +#define NVC96F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE 0x00000009 +#define NVC96F_MEM_OP_D_OPERATION_MMU_TLB_INVALIDATE_TARGETED 0x0000000a +#define NVC96F_MEM_OP_D_OPERATION_L2_FLUSH_DIRTY 0x00000010 +#define NVC96F_MEM_OP_D_OPERATION_L2_SYSMEM_NCOH_INVALIDATE 0x00000011 + +#define NVC96F_SEM_ADDR_LO (0x0000005c) +#define NVC96F_SEM_ADDR_LO_OFFSET 31:2 +#define NVC96F_SEM_ADDR_HI (0x00000060) +#define NVC96F_SEM_ADDR_HI_OFFSET 24:0 +#define NVC96F_SEM_PAYLOAD_LO (0x00000064) +#define NVC96F_SEM_PAYLOAD_HI (0x00000068) +#define NVC96F_SEM_EXECUTE (0x0000006c) +#define NVC96F_SEM_EXECUTE_OPERATION 2:0 +#define NVC96F_SEM_EXECUTE_OPERATION_ACQUIRE 0x00000000 +#define NVC96F_SEM_EXECUTE_OPERATION_RELEASE 0x00000001 +#define NVC96F_SEM_EXECUTE_RELEASE_WFI 20:20 +#define NVC96F_SEM_EXECUTE_RELEASE_WFI_DIS 0x00000000 +#define NVC96F_SEM_EXECUTE_PAYLOAD_SIZE 24:24 +#define NVC96F_SEM_EXECUTE_PAYLOAD_SIZE_32BIT 0x00000000 + +/* GPFIFO entry format */ +#define NVC96F_GP_ENTRY__SIZE 8 +#define NVC96F_GP_ENTRY0_FETCH 0:0 +#define NVC96F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVC96F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVC96F_GP_ENTRY0_GET 31:2 +#define NVC96F_GP_ENTRY0_OPERAND 31:0 +#define NVC96F_GP_ENTRY0_PB_EXTENDED_BASE_OPERAND 24:8 +#define NVC96F_GP_ENTRY1_GET_HI 7:0 +#define NVC96F_GP_ENTRY1_LEVEL 9:9 +#define NVC96F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVC96F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVC96F_GP_ENTRY1_LENGTH 30:10 +#define NVC96F_GP_ENTRY1_SYNC 31:31 +#define NVC96F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVC96F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVC96F_GP_ENTRY1_OPCODE 7:0 +#define NVC96F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVC96F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVC96F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVC96F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 +#define NVC96F_GP_ENTRY1_OPCODE_SET_PB_SEGMENT_EXTENDED_BASE 0x00000004 + +#endif // __gb100_clc96f_h__ diff --git a/userspace/sdks/nv570/inc/class/clc96fsw.h b/userspace/sdks/nv570/inc/class/clc96fsw.h new file mode 100644 index 0000000..d34715a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc96fsw.h @@ -0,0 +1,45 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* This file is *not* auto-generated. */ + +#ifndef _clc96f_sw_h_ +#define _clc96f_sw_h_ + +#define NVC96F_NOTIFIERS_RC (0) +#define NVC96F_NOTIFIERS_REFCNT (1) +#define NVC96F_NOTIFIERS_NONSTALL (2) +#define NVC96F_NOTIFIERS_EVENTBUFFER (3) +#define NVC96F_NOTIFIERS_IDLECHANNEL (4) +#define NVC96F_NOTIFIERS_ENDCTX (5) +#define NVC96F_NOTIFIERS_SW (6) +#define NVC96F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVC96F_NOTIFIERS_REPLAYABLE_FAULT (8) +#define NVC96F_NOTIFIERS_KEY_ROTATION (9) +#define NVC96F_NOTIFIERS_MAXCOUNT (10) + +/* NvNotification[] fields and values */ +#define NVC96F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVC96F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _clc96f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc970.h b/userspace/sdks/nv570/inc/class/clc970.h new file mode 100644 index 0000000..769cd74 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc970.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clc970.finn +// + +#define NVC970_DISPLAY (0xc970U) /* finn: Evaluated from "NVC970_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NVC970_ALLOCATION_PARAMETERS_MESSAGE_ID (0xc970U) + +typedef struct NVC970_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numDsis; // Number of DSIs in this chip/display +} NVC970_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clc971.h b/userspace/sdks/nv570/inc/class/clc971.h new file mode 100644 index 0000000..7cdb433 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc971.h @@ -0,0 +1,329 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc971_h_ +#define _clc971_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC971_DISP_SF_USER (0x000C971) + +typedef volatile struct { + NvU32 dispSfUserOffset[0x400]; +} _NvC971DispSfUser, NvC971DispSfUserMap; + +#define NVC971_SF_HDMI_INFO_IDX_AVI_INFOFRAME 0x00000000 /* */ +#define NVC971_SF_HDMI_INFO_IDX_GCP 0x00000001 /* */ +#define NVC971_SF_HDMI_INFO_IDX_ACR 0x00000002 /* */ +#define NVC971_SF_HDMI_INFO_CTRL(i,j) (0x000E0000-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_CTRL__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_DIS 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_CTRL_HBLANK 12:12 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_CTRL_HBLANK_DIS 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_CTRL_HBLANK_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_VIDEO_FMT 16:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_CTRL_VIDEO_FMT_SW_CONTROLLED 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_VIDEO_FMT_HW_CONTROLLED 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_INFO_CTRL_VIDEO_FMT_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_STATUS(i,j) (0x000E0004-0x000E0000+(i)*1024+(j)*64) /* R--4A */ +#define NVC971_SF_HDMI_INFO_STATUS__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_STATUS__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_STATUS_SENT 0:0 /* R--VF */ +#define NVC971_SF_HDMI_INFO_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC971_SF_HDMI_INFO_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC971_SF_HDMI_INFO_HEADER(i,j) (0x000E0008-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_HEADER__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_HEADER__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_HEADER_HB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_HEADER_HB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_HEADER_HB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW(i,j) (0x000E000C-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH(i,j) (0x000E0010-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW(i,j) (0x000E0014-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH(i,j) (0x000E0018-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW(i,j) (0x000E001C-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH(i,j) (0x000E0020-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB18 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB18_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB19 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB19_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB20 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK2_HIGH_PB20_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW(i,j) (0x000E0024-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB21 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB21_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB22 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB22_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB23 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB23_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB24 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_LOW_PB24_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH(i,j) (0x000E0028-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH__SIZE_2 3 /* */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB25 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB25_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB26 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB26_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB27 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_INFO_SUBPACK3_HIGH_PB27_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x000E0000-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x000E0004-0x000E0000+(i)*1024) /* R--4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R-IVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x000E0008-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x000E000C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x000E0010-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x000E0014-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x000E0018-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW(i) (0x000E001C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVC971_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_CTRL(i) (0x000E0040-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_GCP_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_GCP_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_GCP_STATUS(i) (0x000E0044-0x000E0000+(i)*1024) /* R--4A */ +#define NVC971_SF_HDMI_GCP_STATUS__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_GCP_STATUS_SENT 0:0 /* R-IVF */ +#define NVC971_SF_HDMI_GCP_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVC971_SF_HDMI_GCP_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVC971_SF_HDMI_GCP_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK(i) (0x000E004C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_HDMI_GCP_SUBPACK__SIZE_1 8 /* */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB0 7:0 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB0_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB0_SET_AVMUTE 0x00000001 /* RW--V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB0_CLR_AVMUTE 0x00000010 /* RW--V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1 15:8 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB2 23:16 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_CTRL 24:24 /* RWIVF */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_CTRL_INIT 0x00000001 /* RWI-V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_CTRL_SW 0x00000000 /* RW--V */ +#define NVC971_SF_HDMI_GCP_SUBPACK_SB1_CTRL_HW 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL(i,j) (0x000E0130-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL__SIZE_2 10 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE 3:1 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ALWAYS 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ONCE 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ALWAYS 0x00000002 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ONCE 0x00000003 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_TRIGGER 0x00000004 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_LOC 5:4 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_LOC_VBLANK 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_LOC_VSYNC 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_LOC_LINE 0x00000002 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_OFFSET 10:6 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SIZE 18:14 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SIZE_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_BUSY 22:22 /* R-IVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_BUSY_NO 0x00000000 /* R-I-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_BUSY_YES 0x00000001 /* R---V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SENT 23:23 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SENT_NO 0x00000000 /* R-I-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SENT_YES 0x00000001 /* R---V */ +#define NVC971_SF_GENERIC_INFOFRAME_CTRL_SENT_CLEAR 0x00000001 /* -W--C */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG(i,j) (0x000E0134-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG__SIZE_2 10 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_FID 7:0 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_FID_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID 23:8 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED 24:24 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_YES 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN 25:25 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_YES 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM 29:29 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_NO 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_YES 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW 30:30 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW_INIT 0x00000000 /* R-I-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW_DONE 0x00000000 /* R---V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW_PENDING 0x00000001 /* R---T */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_NEW_TRIGGER 0x00000001 /* -W--T */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL 31:31 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ACT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ARM 0x00000001 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_CTRL(i) (0x000E03F0-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET 4:0 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA(i) (0x000E03F4-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE0 7:0 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE0_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE1 15:8 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE1_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE2 23:16 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE2_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE3 31:24 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_DATA_BYTE3_INIT 0x00000000 /* RWI-V */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL(i) (0x000E03F8-0x000E0000+(i)*1024) /* RW-4A */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL__SIZE_1 8 /* */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY 1:1 /* RWIVF */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_HIGH 0x00000000 /* RW--V */ +#define NVC971_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_LOW 0x00000001 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _clc971_h_ diff --git a/userspace/sdks/nv570/inc/class/clc973.h b/userspace/sdks/nv570/inc/class/clc973.h new file mode 100644 index 0000000..f770493 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc973.h @@ -0,0 +1,379 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc973_h_ +#define _clc973_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC973_DISP_CAPABILITIES 0xC973 + +#define NVC973_SYS_CAP 0x0 /* RW-4R */ +#define NVC973_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVC973_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVC973_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVC973_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVC973_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVC973_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVC973_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVC973_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVC973_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVC973_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVC973_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVC973_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVC973_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVC973_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI0_EXISTS 20:20 /* RWIVF */ +#define NVC973_SYS_CAP_DSI0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI1_EXISTS 21:21 /* RWIVF */ +#define NVC973_SYS_CAP_DSI1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI2_EXISTS 22:22 /* RWIVF */ +#define NVC973_SYS_CAP_DSI2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI3_EXISTS 23:23 /* RWIVF */ +#define NVC973_SYS_CAP_DSI3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_SYS_CAP_DSI_EXISTS(i) (20+(i)):(20+(i)) /* RWIVF */ +#define NVC973_SYS_CAP_DSI_EXISTS__SIZE_1 4 /* */ +#define NVC973_SYS_CAP_DSI_EXISTS_NO 0x00000000 /* RW--V */ +#define NVC973_SYS_CAP_DSI_EXISTS_YES 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA 0x10 /* RW-4R */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES 15:0 /* RWIUF */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH 17:16 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_32B 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_64B 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_128B 0x00000002 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_256B 0x00000003 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_ROTATION 18:18 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_ROTATION_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_ROTATION_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_PLANAR 19:19 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_PLANAR_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_VGA 20:20 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION 21:21 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MSCG 22:22 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MSCG_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MSCG_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH 23:23 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT 26:26 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_SUPPORT_LATENCY_EVENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION 31:30 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_32B 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_64B 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_128B 0x00000002 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_256B 0x00000003 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC 0x18 /* RW-4R */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE 1:0 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_32B 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_64B 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_128B 0x00000002 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_256B 0x00000003 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED 6:4 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_NONE 0x00000000 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_TWO 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_FOUR 0x00000002 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_EIGHT 0x00000003 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_SIXTEEN 0x00000004 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR 11:11 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_FALSE 0x00000000 /* RWI-V */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP 12:12 /* RWIVF */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_FALSE 0x00000000 /* RWI-V */ +#define NVC973_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA(i) (0x680+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPA__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC0_PRESENT 16:16 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC1_PRESENT 17:17 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_SCLR_PRESENT 18:18 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_HCLPF_PRESENT 19:19 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_DTH_PRESENT 20:20 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_DTH_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_DTH_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OSCAN_PRESENT 21:21 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_DSC_PRESENT 22:22 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_DSC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_DSC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_VFILTER_PRESENT 23:23 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB(i) (0x684+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPB__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPB_VGA 0:0 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_VGA_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_VGA_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_SZ 12:1 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_LOGNR 15:13 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD 17:17 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_DIRECT 18:18 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPB_OLUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC(i) (0x688+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPC__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC0_PRECISION 4:0 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC1_PRECISION 12:8 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP 13:13 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_SF_PRECISION 20:16 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_CI_PRECISION 24:21 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB 25:25 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPD(i) (0x68c+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPD__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPE(i) (0x690+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPE__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE422 16:16 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE422_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE422_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE420 17:17 /* RWIVF */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE420_TRUE 0x00000001 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPE_DSC_NATIVE420_FALSE 0x00000000 /* RW--V */ +#define NVC973_POSTCOMP_HDR_CAPF(i) (0x694+(i)*32) /* RW-4A */ +#define NVC973_POSTCOMP_HDR_CAPF__SIZE_1 8 /* */ +#define NVC973_POSTCOMP_HDR_CAPF_VFILTER_MAX_PIXELS 15:0 /* RWIVF */ +#define NVC973_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVC973_SOR_CAP__SIZE_1 8 /* */ +#define NVC973_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVC973_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVC973_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVC973_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVC973_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVC973_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVC973_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVC973_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVC973_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVC973_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVC973_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVC973_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVC973_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVC973_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVC973_SOR_CAP_HDMI_FRL 28:28 /* RWIVF */ +#define NVC973_SOR_CAP_HDMI_FRL_FALSE 0x00000000 /* RW--V */ +#define NVC973_SOR_CAP_HDMI_FRL_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA(i) (0x780+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH 13:10 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT 16:16 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT 17:17 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT 18:18 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT 19:19 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT 20:20 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT 21:21 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT 22:22 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT 23:23 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT 24:24 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB(i) (0x784+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION 4:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ 9:6 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR 12:10 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD 14:14 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT 15:15 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC(i) (0x788+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION 4:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT 15:15 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION 20:16 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD(i) (0x78c+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ 3:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR 6:4 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD 8:8 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT 9:9 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION 16:12 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION 20:17 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB 21:21 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA 22:22 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE(i) (0x790+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION 4:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT 15:15 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION 20:16 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPF(i) (0x794+(i)*32) /* RW-4A */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPF__SIZE_1 32 /* */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVC973_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clc973_h_ diff --git a/userspace/sdks/nv570/inc/class/clc97a.h b/userspace/sdks/nv570/inc/class/clc97a.h new file mode 100644 index 0000000..fd26c95 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc97a.h @@ -0,0 +1,168 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc97a__h_ +#define _clc97a__h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC97A_CURSOR_IMM_CHANNEL_PIO (0x0000C97A) + +#define NVC97A_FREE (0x00000008) +#define NVC97A_FREE_COUNT 5:0 +#define NVC97A_UPDATE (0x00000200) +#define NVC97A_SET_INTERLOCK_FLAGS (0x00000204) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC97A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC97A_SET_CURSOR_HOT_SPOT_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC97A_SET_CURSOR_HOT_SPOT_POINT_OUT_X 15:0 +#define NVC97A_SET_CURSOR_HOT_SPOT_POINT_OUT_Y 31:16 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS (0x00000210) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC97A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc97a_h diff --git a/userspace/sdks/nv570/inc/class/clc97b.h b/userspace/sdks/nv570/inc/class/clc97b.h new file mode 100644 index 0000000..40c1e10 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc97b.h @@ -0,0 +1,64 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc97b_h_ +#define _clc97b_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC97B_WINDOW_IMM_CHANNEL_DMA (0x0000C97B) + +// dma opcode instructions +#define NVC97B_DMA +#define NVC97B_DMA_OPCODE 31:29 +#define NVC97B_DMA_OPCODE_METHOD 0x00000000 +#define NVC97B_DMA_OPCODE_JUMP 0x00000001 +#define NVC97B_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC97B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC97B_DMA_METHOD_COUNT 27:18 +#define NVC97B_DMA_METHOD_OFFSET 15:2 +#define NVC97B_DMA_DATA 31:0 +#define NVC97B_DMA_DATA_NOP 0x00000000 +#define NVC97B_DMA_JUMP_OFFSET 15:2 +#define NVC97B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC97B_PUT (0x00000000) +#define NVC97B_PUT_PTR 9:0 +#define NVC97B_GET (0x00000004) +#define NVC97B_GET_PTR 9:0 +#define NVC97B_UPDATE (0x00000200) +#define NVC97B_UPDATE_INTERLOCK_WITH_WINDOW 1:1 +#define NVC97B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC97B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC97B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVC97B_SET_POINT_OUT_X 15:0 +#define NVC97B_SET_POINT_OUT_Y 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc97b_h diff --git a/userspace/sdks/nv570/inc/class/clc97d.h b/userspace/sdks/nv570/inc/class/clc97d.h new file mode 100644 index 0000000..69254b4 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc97d.h @@ -0,0 +1,1377 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc97d_h_ +#define _clc97d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC97D_CORE_CHANNEL_DMA (0x0000C97D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVC97D_DMA +#define NVC97D_DMA_OPCODE 31:29 +#define NVC97D_DMA_OPCODE_METHOD 0x00000000 +#define NVC97D_DMA_OPCODE_JUMP 0x00000001 +#define NVC97D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC97D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC97D_DMA_METHOD_COUNT 27:18 +#define NVC97D_DMA_METHOD_OFFSET 15:2 +#define NVC97D_DMA_DATA 31:0 +#define NVC97D_DMA_DATA_NOP 0x00000000 +#define NVC97D_DMA_JUMP_OFFSET 15:2 +#define NVC97D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + + +// class methods +#define NVC97D_PUT (0x00000000) +#define NVC97D_PUT_PTR 9:0 +#define NVC97D_GET (0x00000004) +#define NVC97D_GET_PTR 9:0 +#define NVC97D_UPDATE (0x00000200) +#define NVC97D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVC97D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVC97D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVC97D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVC97D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVC97D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVC97D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVC97D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVC97D_UPDATE_RELEASE_ELV 0:0 +#define NVC97D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC97D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC97D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVC97D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC97D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC97D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC97D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVC97D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVC97D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL (0x00000210) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVC97D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC97D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC97D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC97D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVC97D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVC97D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVC97D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVC97D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVC97D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVC97D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVC97D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVC97D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVC97D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVC97D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVC97D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) +#define NVC97D_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000260) +#define NVC97D_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000264) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVC97D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) + +#define NVC97D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC97D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_HDMI_FRL (0x0000000C) +#define NVC97D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVC97D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVC97D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC97D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC97D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVC97D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVC97D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVC97D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVC97D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVC97D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVC97D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVC97D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVC97D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVC97D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVC97D_DSI_SET_CONTROL(a) (0x00000500 + (a)*0x00000020) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK 7:0 +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVC97D_DSI_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVC97D_DSI_SET_CUSTOM_REASON(a) (0x00000504 + (a)*0x00000020) +#define NVC97D_DSI_SET_CUSTOM_REASON_CODE 31:0 +#define NVC97D_DSI_SET_SW_SPARE_A(a) (0x00000508 + (a)*0x00000020) +#define NVC97D_DSI_SET_SW_SPARE_A_CODE 31:0 +#define NVC97D_DSI_SET_SW_SPARE_B(a) (0x0000050C + (a)*0x00000020) +#define NVC97D_DSI_SET_SW_SPARE_B_CODE 31:0 + +#define NVC97D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVC97D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVC97D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVC97D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC97D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED 16:16 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED 28:28 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED 30:30 +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC97D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) + +#define NVC97D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000800) +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVC97D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_DOWN_V 4:4 +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVC97D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVC97D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_444 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444NP (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN 31:26 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN0 (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN1 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN2 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN3 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN4 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN5 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN6 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN7 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN8 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN9 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN10 (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN11 (0x0000000B) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN12 (0x0000000C) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN13 (0x0000000D) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN14 (0x0000000E) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN15 (0x0000000F) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN16 (0x00000010) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN17 (0x00000011) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN18 (0x00000012) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN19 (0x00000013) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN20 (0x00000014) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN21 (0x00000015) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN22 (0x00000016) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN23 (0x00000017) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN24 (0x00000018) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN25 (0x00000019) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN26 (0x0000001A) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN27 (0x0000001B) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN28 (0x0000001C) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN29 (0x0000001D) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN30 (0x0000001E) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN31 (0x0000001F) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_NONE (0x0000003F) +#define NVC97D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVC97D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVC97D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_YUV420PACKER 3:3 +#define NVC97D_HEAD_SET_CONTROL_YUV420PACKER_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_YUV420PACKER_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE 11:10 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN 8:4 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_LOCKOUT_WINDOW 15:12 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_MODE 23:22 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_NO_LOCK (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN 20:16 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_HEAD_SET_CONTROL_MASTER_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE 30:30 +#define NVC97D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_SLAVE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE 31:31 +#define NVC97D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_MASTER_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000800) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC97D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVC97D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVC97D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVC97D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVC97D_HEAD_SET_DITHER_CONTROL_MODE_ROUND (0x00000005) +#define NVC97D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000800) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVC97D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000800) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVC97D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000800) +#define NVC97D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVC97D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000800) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED 4:4 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_FALSE (0x00000000) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_TRUE (0x00000001) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS 14:12 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED 16:16 +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVC97D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000800) +#define NVC97D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVC97D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVC97D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVC97D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVC97D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVC97D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_STALL_LOCK_UNSTALL_SYNC_ADVANCE 25:16 +#define NVC97D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000800) +#define NVC97D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVC97D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000800) +#define NVC97D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVC97D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000800) +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000800) +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVC97D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVC97D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000800) +#define NVC97D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVC97D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVC97D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_SIZE_WIDTH 15:0 +#define NVC97D_HEAD_SET_RASTER_SIZE_HEIGHT 31:16 +#define NVC97D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVC97D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVC97D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVC97D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVC97D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVC97D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVC97D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVC97D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVC97D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVC97D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000800) +#define NVC97D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVC97D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVC97D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVC97D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000800) +#define NVC97D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVC97D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVC97D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVC97D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVC97D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVC97D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000800) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVC97D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS 20:20 +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI(a) (0x000020C0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_HERTZ 3:0 +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_MAX(a) (0x000020C4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_MAX_HERTZ 3:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE(a,b) (0x00002110 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE_ADDRESS_HI 31:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE(a,b) (0x00002130 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ADDRESS_LO 31:4 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET 3:2 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE 0:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_CRC(a) (0x00002150 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_CRC_ADDRESS_HI 31:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC(a) (0x00002154 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ADDRESS_LO 31:4 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET 3:2 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_IOVA (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE 0:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT(a) (0x00002158 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT_ADDRESS_HI 31:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT(a) (0x0000215C + (a)*0x00000800) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ADDRESS_LO 31:4 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET 3:2 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_IOVA (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE 0:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR(a,b) (0x00002170 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR_ADDRESS_HI 31:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR(a,b) (0x00002178 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ADDRESS_LO 31:4 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET 3:2 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_IOVA (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND 1:1 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_PITCH (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_BLOCKLINEAR (0x00000001) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE 0:0 +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 5:0 +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_0 (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_1 (0x00000001) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_2 (0x00000002) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_3 (0x00000003) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_4 (0x00000004) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_5 (0x00000005) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_6 (0x00000006) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_7 (0x00000007) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_8 (0x00000008) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_9 (0x00000009) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_10 (0x0000000A) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_11 (0x0000000B) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_12 (0x0000000C) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_13 (0x0000000D) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_14 (0x0000000E) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_15 (0x0000000F) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_16 (0x00000010) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_17 (0x00000011) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_18 (0x00000012) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_19 (0x00000013) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_20 (0x00000014) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_21 (0x00000015) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_22 (0x00000016) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_23 (0x00000017) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_24 (0x00000018) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_25 (0x00000019) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_26 (0x0000001A) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_27 (0x0000001B) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_28 (0x0000001C) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_29 (0x0000001D) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_30 (0x0000001E) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_31 (0x0000001F) +#define NVC97D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000020) +#define NVC97D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVC97D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVC97D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVC97D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVC97D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVC97D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000800) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVC97D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVC97D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVC97D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVC97D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000800) +#define NVC97D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVC97D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVC97D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DISPLAY_RATE_RUN_MODE 1:0 +#define NVC97D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVC97D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVC97D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVC97D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVC97D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL(a,b) (0x000021CC + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE 10:10 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_ONE_TIME (0x00000000) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_CONTINUOUS (0x00000001) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RASTER_LINE 31:16 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_VALUE(a,b) (0x000021EC + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_VALUE 31:0 +#define NVC97D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE(a) (0x00002214 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC97D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC97D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000800) +#define NVC97D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVC97D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 +#define NVC97D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED(a) (0x00002220 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_ALPHA 7:0 +#define NVC97D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_RED 31:16 +#define NVC97D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE(a) (0x00002224 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_GREEN 15:0 +#define NVC97D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_BLUE 31:16 +#define NVC97D_HEAD_SET_CURSOR_COLOR_NORM_SCALE(a) (0x00002228 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CURSOR_COLOR_NORM_SCALE_VALUE 15:0 +#define NVC97D_HEAD_SET_XOR_BLEND_FACTOR(a) (0x0000222C + (a)*0x00000800) +#define NVC97D_HEAD_SET_XOR_BLEND_FACTOR_LOG2PEAK_LUMINANCE 3:0 +#define NVC97D_HEAD_SET_XOR_BLEND_FACTOR_S1 16:4 +#define NVC97D_HEAD_SET_XOR_BLEND_FACTOR_S2 30:18 +#define NVC97D_HEAD_SET_CLAMP_RANGE_GREEN(a) (0x00002238 + (a)*0x00000800) +#define NVC97D_HEAD_SET_CLAMP_RANGE_GREEN_LOW 11:0 +#define NVC97D_HEAD_SET_CLAMP_RANGE_GREEN_HIGH 27:16 +#define NVC97D_HEAD_SET_CLAMP_RANGE_RED_BLUE(a) (0x0000223C + (a)*0x00000800) +#define NVC97D_HEAD_SET_CLAMP_RANGE_RED_BLUE_LOW 11:0 +#define NVC97D_HEAD_SET_CLAMP_RANGE_RED_BLUE_HIGH 27:16 +#define NVC97D_HEAD_SET_OCSC0CONTROL(a) (0x00002240 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_OCSC0CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_OCSC0CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C00(a) (0x00002244 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C00_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C01(a) (0x00002248 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C01_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C02(a) (0x0000224C + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C02_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C03(a) (0x00002250 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C03_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C10(a) (0x00002254 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C10_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C11(a) (0x00002258 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C11_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C12(a) (0x0000225C + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C12_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C13(a) (0x00002260 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C13_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C20(a) (0x00002264 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C20_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C21(a) (0x00002268 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C21_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C22(a) (0x0000226C + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C22_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C23(a) (0x00002270 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC0COEFFICIENT_C23_VALUE 20:0 +#define NVC97D_HEAD_SET_OLUT_CONTROL(a) (0x00002280 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OLUT_CONTROL_INTERPOLATE 0:0 +#define NVC97D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MIRROR 1:1 +#define NVC97D_HEAD_SET_OLUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MODE 3:2 +#define NVC97D_HEAD_SET_OLUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC97D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC97D_HEAD_SET_OLUT_CONTROL_SIZE 18:8 +#define NVC97D_HEAD_SET_OLUT_FP_NORM_SCALE(a) (0x00002284 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OLUT_FP_NORM_SCALE_VALUE 31:0 +#define NVC97D_HEAD_SET_OCSC1CONTROL(a) (0x0000229C + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_OCSC1CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_OCSC1CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C00(a) (0x000022A0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C00_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C01(a) (0x000022A4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C01_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C02(a) (0x000022A8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C02_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C03(a) (0x000022AC + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C03_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C10(a) (0x000022B0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C10_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C11(a) (0x000022B4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C11_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C12(a) (0x000022B8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C12_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C13(a) (0x000022BC + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C13_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C20(a) (0x000022C0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C20_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C21(a) (0x000022C4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C21_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C22(a) (0x000022C8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C22_VALUE 20:0 +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C23(a) (0x000022CC + (a)*0x00000800) +#define NVC97D_HEAD_SET_OCSC1COEFFICIENT_C23_VALUE 20:0 +#define NVC97D_HEAD_SET_HEAD_POSITION(a) (0x000022D0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_HEAD_POSITION_X 2:0 +#define NVC97D_HEAD_SET_HEAD_POSITION_Y 6:4 +#define NVC97D_HEAD_SET_DSC_CONTROL(a) (0x000022D4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_DSC_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC97D_HEAD_SET_DSC_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_DSC_CONTROL_AUTO_RESET 3:3 +#define NVC97D_HEAD_SET_DSC_CONTROL_AUTO_RESET_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DSC_CONTROL_AUTO_RESET_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION 4:4 +#define NVC97D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_DISABLE (0x00000000) +#define NVC97D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_ENABLE (0x00000001) +#define NVC97D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET 5:5 +#define NVC97D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_FALSE (0x00000000) +#define NVC97D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_TRUE (0x00000001) +#define NVC97D_HEAD_SET_DSC_CONTROL_FLATNESS_DET_THRESH 15:6 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL(a) (0x000022D8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_ENABLE 0:0 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_FALSE (0x00000000) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_TRUE (0x00000001) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_LOCATION 2:1 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VBLANK (0x00000000) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VSYNC (0x00000001) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_SIZE 10:3 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY 11:11 +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC97D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC97D_HEAD_SET_DSC_PPS_HEAD(a) (0x000022DC + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_HEAD_BYTE0 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_HEAD_BYTE1 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_HEAD_BYTE2 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_HEAD_BYTE3 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0(a) (0x000022E0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MINOR 3:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MAJOR 7:4 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_PPS_IDENTIFIER 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_RESERVED 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_LINEBUF_DEPTH 27:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA0_BITS_PER_COMPONENT 31:28 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1(a) (0x000022E4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_HIGH 1:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_VBR_ENABLE 2:2 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_SIMPLE422 3:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_CONVERT_RGB 4:4 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_BLOCK_PRED_ENABLE 5:5 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_RESERVED 7:6 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA2(a) (0x000022E8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA3(a) (0x000022EC + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4(a) (0x000022F0 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_HIGH 1:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_RESERVED 7:2 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5(a) (0x000022F4 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_RESERVED0 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_INITIAL_SCALE_VALUE 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_RESERVED1 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6(a) (0x000022F8 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_HIGH 3:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_RESERVED0 7:4 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_RESERVED1 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_FIRST_LINE_BPG_OFFSET 28:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA6_RESERVED2 31:29 +#define NVC97D_HEAD_SET_DSC_PPS_DATA7(a) (0x000022FC + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA8(a) (0x00002300 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9(a) (0x00002304 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MIN_QP 4:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_RESERVED0 7:5 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MAX_QP 12:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_RESERVED1 15:13 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_LOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10(a) (0x00002308 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_EDGE_FACTOR 3:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RESERVED0 7:4 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT0 12:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RESERVED1 15:13 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT1 20:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RESERVED2 23:21 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_LO 27:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_HI 31:28 +#define NVC97D_HEAD_SET_DSC_PPS_DATA11(a) (0x0000230C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH0 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH1 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH2 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH3 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA12(a) (0x00002310 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH4 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH5 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH6 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH7 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA13(a) (0x00002314 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH8 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH9 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH10 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH11 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14(a) (0x00002318 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH12 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH13 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_HIGH0 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MIN_QP0 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_BPG_OFFSET0 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_LOW0 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15(a) (0x0000231C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH1 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP1 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET1 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW1 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH2 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP2 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET2 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW2 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16(a) (0x00002320 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH3 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP3 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET3 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW3 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH4 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP4 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET4 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW4 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17(a) (0x00002324 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH5 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP5 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET5 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW5 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH6 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP6 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET6 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW6 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18(a) (0x00002328 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH7 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP7 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET7 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW7 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH8 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP8 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET8 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW8 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19(a) (0x0000232C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH9 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP9 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET9 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW9 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH10 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP10 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET10 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW10 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20(a) (0x00002330 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH11 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP11 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET11 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW11 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH12 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP12 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET12 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW12 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21(a) (0x00002334 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH13 2:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP13 7:3 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET13 13:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW13 15:14 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH14 18:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP14 23:19 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET14 29:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW14 31:30 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22(a) (0x00002338 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_NATIVE422 0:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_NATIVE420 1:1 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_RESERVED0 7:2 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_SECOND_LINE_BPG_OFFSET 12:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_RESERVED1 15:13 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSET_HIGH 23:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSETLOW 31:24 +#define NVC97D_HEAD_SET_DSC_PPS_DATA23(a) (0x0000233C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_HIGH 7:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_LOW 15:8 +#define NVC97D_HEAD_SET_DSC_PPS_DATA23_RESERVED 31:16 +#define NVC97D_HEAD_SET_DSC_PPS_DATA24(a) (0x00002340 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA24_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA25(a) (0x00002344 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA25_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA26(a) (0x00002348 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA26_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA27(a) (0x0000234C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA27_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA28(a) (0x00002350 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA28_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA29(a) (0x00002354 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA29_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA30(a) (0x00002358 + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA30_RESERVED 31:0 +#define NVC97D_HEAD_SET_DSC_PPS_DATA31(a) (0x0000235C + (a)*0x00000800) +#define NVC97D_HEAD_SET_DSC_PPS_DATA31_RESERVED 31:0 +#define NVC97D_HEAD_SET_RASTER_HBLANK_DELAY(a) (0x00002364 + (a)*0x00000800) +#define NVC97D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_START 15:0 +#define NVC97D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_END 31:16 +#define NVC97D_HEAD_SET_HDMI_DSC_HCACTIVE(a) (0x00002368 + (a)*0x00000800) +#define NVC97D_HEAD_SET_HDMI_DSC_HCACTIVE_BYTES 15:0 +#define NVC97D_HEAD_SET_HDMI_DSC_HCACTIVE_TRI_BYTES 31:16 +#define NVC97D_HEAD_SET_HDMI_DSC_HCBLANK(a) (0x0000236C + (a)*0x00000800) +#define NVC97D_HEAD_SET_HDMI_DSC_HCBLANK_WIDTH 15:0 +#define NVC97D_HEAD_SW_RESERVED(a,b) (0x00002370 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SW_RESERVED_VALUE 31:0 +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI(a,b) (0x00002380 + (a)*0x00000800 + (b)*0x00000004) +#define NVC97D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI_VALUE 31:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc97d_h diff --git a/userspace/sdks/nv570/inc/class/clc97dswspare.h b/userspace/sdks/nv570/inc/class/clc97dswspare.h new file mode 100644 index 0000000..918da10 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc97dswspare.h @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2023-2025, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc97d_sw_spare_h_ +#define _clc97d_sw_spare_h_ + +/* This file is *not* auto-generated. */ + +// +// Quadro Sync is a mechanism used to synchronize scanout and flips between +// GPUs in different systems (e.g., to drive large video walls, such as in a +// planetarium). Special FPGA boards (e.g., P2060 or P2061) are added to the +// system to provide the reference frame lock signal. The VPLL_REF field below +// is set to "QSYNC" on the head which is selected to be driven by the external +// reference signal. As with any HEAD_SET_SW_SPARE method, changing the value +// of a field will trigger a supervisor interrupt sequence. +// +#define NVC97D_HEAD_SET_SW_SPARE_A_CODE_VPLL_REF 1:0 +#define NVC97D_HEAD_SET_SW_SPARE_A_CODE_VPLL_REF_NO_PREF (0x00000000) +#define NVC97D_HEAD_SET_SW_SPARE_A_CODE_VPLL_REF_QSYNC (0x00000001) + +// +// DRR (Dynamic Refresh Rate) is a power saving feature that lowers the refresh +// rate when a high flip rate is not required. A modeset is required in order +// to change the target refresh rate for DRR purposes. Such a modeset +// (indicated by the DRR_MODESET bit) does not change any IMP-relevant +// parameters except back porch (and vertical total), so IMP can optimize such +// modesets by, for example, skipping disablement of mclk switch. +// +// If any head has the DRR_MODESET bit set, no other head that is changing is +// allowed to execute a non-DRR transition as part of the same modeset. +// +#define NVC97D_HEAD_SET_SW_RESERVED_DRR_MODESET 31:31 +#define NVC97D_HEAD_SET_SW_RESERVED_DRR_MODESET_FALSE (0x00000000) +#define NVC97D_HEAD_SET_SW_RESERVED_DRR_MODESET_TRUE (0x00000001) + +#endif // _clc97d_sw_spare_h_ diff --git a/userspace/sdks/nv570/inc/class/clc97e.h b/userspace/sdks/nv570/inc/class/clc97e.h new file mode 100644 index 0000000..78aa9d7 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc97e.h @@ -0,0 +1,751 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc97e_h_ +#define _clc97e_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVC97E_WINDOW_CHANNEL_DMA (0x0000C97E) + +// dma opcode instructions +#define NVC97E_DMA +#define NVC97E_DMA_OPCODE 31:29 +#define NVC97E_DMA_OPCODE_METHOD 0x00000000 +#define NVC97E_DMA_OPCODE_JUMP 0x00000001 +#define NVC97E_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVC97E_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVC97E_DMA_METHOD_COUNT 27:18 +#define NVC97E_DMA_METHOD_OFFSET 15:2 +#define NVC97E_DMA_DATA 31:0 +#define NVC97E_DMA_DATA_NOP 0x00000000 +#define NVC97E_DMA_JUMP_OFFSET 15:2 +#define NVC97E_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVC97E_PUT (0x00000000) +#define NVC97E_PUT_PTR 9:0 +#define NVC97E_GET (0x00000004) +#define NVC97E_GET_PTR 9:0 +#define NVC97E_UPDATE (0x00000200) +#define NVC97E_UPDATE_RELEASE_ELV 0:0 +#define NVC97E_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVC97E_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVC97E_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVC97E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVC97E_UPDATE_INTERLOCK_WITH_WIN_IMM 12:12 +#define NVC97E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000) +#define NVC97E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001) +#define NVC97E_SET_SEMAPHORE_ACQUIRE_HI (0x00000204) +#define NVC97E_SET_SEMAPHORE_ACQUIRE_HI_VALUE 31:0 +#define NVC97E_GET_LINE (0x00000208) +#define NVC97E_GET_LINE_LINE 15:0 +#define NVC97E_SET_SEMAPHORE_CONTROL (0x0000020C) +#define NVC97E_SET_SEMAPHORE_CONTROL_SKIP_ACQ 11:11 +#define NVC97E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_FALSE (0x00000000) +#define NVC97E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_TRUE (0x00000001) +#define NVC97E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC97E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC97E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC97E_SET_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVC97E_SET_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVC97E_SET_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVC97E_SET_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVC97E_SET_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVC97E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVC97E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC97E_SET_SEMAPHORE_ACQUIRE (0x00000210) +#define NVC97E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0 +#define NVC97E_SET_SEMAPHORE_RELEASE (0x00000214) +#define NVC97E_SET_SEMAPHORE_RELEASE_VALUE 31:0 +#define NVC97E_SET_NOTIFIER_CONTROL (0x00000220) +#define NVC97E_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVC97E_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVC97E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVC97E_SET_SIZE (0x00000224) +#define NVC97E_SET_SIZE_WIDTH 15:0 +#define NVC97E_SET_SIZE_HEIGHT 31:16 +#define NVC97E_SET_STORAGE (0x00000228) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVC97E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVC97E_SET_PARAMS (0x0000022C) +#define NVC97E_SET_PARAMS_FORMAT 7:0 +#define NVC97E_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NVC97E_SET_PARAMS_FORMAT_R4G4B4A4 (0x0000002F) +#define NVC97E_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NVC97E_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NVC97E_SET_PARAMS_FORMAT_R5G5B5A1 (0x0000002E) +#define NVC97E_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NVC97E_SET_PARAMS_FORMAT_X8R8G8B8 (0x000000E6) +#define NVC97E_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NVC97E_SET_PARAMS_FORMAT_X8B8G8R8 (0x000000F9) +#define NVC97E_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NVC97E_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NVC97E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NVC97E_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NVC97E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NVC97E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422 (0x00000028) +#define NVC97E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422 (0x00000029) +#define NVC97E_SET_PARAMS_FORMAT_Y8___U8V8_N444 (0x00000035) +#define NVC97E_SET_PARAMS_FORMAT_Y8___U8V8_N422 (0x00000036) +#define NVC97E_SET_PARAMS_FORMAT_Y8___V8U8_N420 (0x00000038) +#define NVC97E_SET_PARAMS_FORMAT_Y8___U8___V8_N444 (0x0000003A) +#define NVC97E_SET_PARAMS_FORMAT_Y8___U8___V8_N420 (0x0000003B) +#define NVC97E_SET_PARAMS_FORMAT_Y10___U10V10_N444 (0x00000055) +#define NVC97E_SET_PARAMS_FORMAT_Y10___U10V10_N422 (0x00000056) +#define NVC97E_SET_PARAMS_FORMAT_Y10___V10U10_N420 (0x00000058) +#define NVC97E_SET_PARAMS_FORMAT_Y12___U12V12_N444 (0x00000075) +#define NVC97E_SET_PARAMS_FORMAT_Y12___U12V12_N422 (0x00000076) +#define NVC97E_SET_PARAMS_FORMAT_Y12___V12U12_N420 (0x00000078) +#define NVC97E_SET_PARAMS_CLAMP_BEFORE_BLEND 18:18 +#define NVC97E_SET_PARAMS_CLAMP_BEFORE_BLEND_DISABLE (0x00000000) +#define NVC97E_SET_PARAMS_CLAMP_BEFORE_BLEND_ENABLE (0x00000001) +#define NVC97E_SET_PARAMS_SWAP_UV 19:19 +#define NVC97E_SET_PARAMS_SWAP_UV_DISABLE (0x00000000) +#define NVC97E_SET_PARAMS_SWAP_UV_ENABLE (0x00000001) +#define NVC97E_SET_PARAMS_FMT_ROUNDING_MODE 22:22 +#define NVC97E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_TO_NEAREST (0x00000000) +#define NVC97E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_DOWN (0x00000001) +#define NVC97E_SET_PLANAR_STORAGE(b) (0x00000230 + (b)*0x00000004) +#define NVC97E_SET_PLANAR_STORAGE_PITCH 12:0 +#define NVC97E_SET_SEMAPHORE_RELEASE_HI (0x0000023C) +#define NVC97E_SET_SEMAPHORE_RELEASE_HI_VALUE 31:0 +#define NVC97E_SET_POINT_IN(b) (0x00000290 + (b)*0x00000004) +#define NVC97E_SET_POINT_IN_X 15:0 +#define NVC97E_SET_POINT_IN_Y 31:16 +#define NVC97E_SET_SIZE_IN (0x00000298) +#define NVC97E_SET_SIZE_IN_WIDTH 15:0 +#define NVC97E_SET_SIZE_IN_HEIGHT 31:16 +#define NVC97E_SET_SIZE_OUT (0x000002A4) +#define NVC97E_SET_SIZE_OUT_WIDTH 15:0 +#define NVC97E_SET_SIZE_OUT_HEIGHT 31:16 +#define NVC97E_SET_CONTROL_INPUT_SCALER (0x000002A8) +#define NVC97E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVC97E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVC97E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVC97E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVC97E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVC97E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVC97E_SET_INPUT_SCALER_COEFF_VALUE (0x000002AC) +#define NVC97E_SET_INPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVC97E_SET_INPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVC97E_SET_COMPOSITION_CONTROL (0x000002EC) +#define NVC97E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVC97E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVC97E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVC97E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVC97E_SET_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVC97E_SET_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVC97E_SET_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVC97E_SET_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVC97E_SET_COMPOSITION_CONSTANT_ALPHA (0x000002F0) +#define NVC97E_SET_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVC97E_SET_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT (0x000002F4) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVC97E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVC97E_SET_KEY_ALPHA (0x000002F8) +#define NVC97E_SET_KEY_ALPHA_MIN 15:0 +#define NVC97E_SET_KEY_ALPHA_MAX 31:16 +#define NVC97E_SET_KEY_RED_CR (0x000002FC) +#define NVC97E_SET_KEY_RED_CR_MIN 15:0 +#define NVC97E_SET_KEY_RED_CR_MAX 31:16 +#define NVC97E_SET_KEY_GREEN_Y (0x00000300) +#define NVC97E_SET_KEY_GREEN_Y_MIN 15:0 +#define NVC97E_SET_KEY_GREEN_Y_MAX 31:16 +#define NVC97E_SET_KEY_BLUE_CB (0x00000304) +#define NVC97E_SET_KEY_BLUE_CB_MIN 15:0 +#define NVC97E_SET_KEY_BLUE_CB_MAX 31:16 +#define NVC97E_SET_PRESENT_CONTROL (0x00000308) +#define NVC97E_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NVC97E_SET_PRESENT_CONTROL_BEGIN_MODE 6:4 +#define NVC97E_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000) +#define NVC97E_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001) +#define NVC97E_SET_PRESENT_CONTROL_TIMESTAMP_MODE 8:8 +#define NVC97E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_DISABLE (0x00000000) +#define NVC97E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_ENABLE (0x00000001) +#define NVC97E_SET_PRESENT_CONTROL_STEREO_MODE 13:12 +#define NVC97E_SET_PRESENT_CONTROL_STEREO_MODE_MONO (0x00000000) +#define NVC97E_SET_PRESENT_CONTROL_STEREO_MODE_PAIR_FLIP (0x00000001) +#define NVC97E_SET_PRESENT_CONTROL_STEREO_MODE_AT_ANY_FRAME (0x00000002) +#define NVC97E_SET_ACQ_SEMAPHORE_VALUE_HI (0x0000030C) +#define NVC97E_SET_ACQ_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL (0x00000330) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVC97E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVC97E_SET_ACQ_SEMAPHORE_VALUE (0x00000334) +#define NVC97E_SET_ACQ_SEMAPHORE_VALUE_VALUE 31:0 +#define NVC97E_SET_SCAN_DIRECTION (0x0000033C) +#define NVC97E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION 0:0 +#define NVC97E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_LEFT (0x00000000) +#define NVC97E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_RIGHT (0x00000001) +#define NVC97E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION 1:1 +#define NVC97E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_TOP (0x00000000) +#define NVC97E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_BOTTOM (0x00000001) +#define NVC97E_SET_SCAN_DIRECTION_COLUMN_ORDER 2:2 +#define NVC97E_SET_SCAN_DIRECTION_COLUMN_ORDER_FALSE (0x00000000) +#define NVC97E_SET_SCAN_DIRECTION_COLUMN_ORDER_TRUE (0x00000001) +#define NVC97E_SET_TIMESTAMP_ORIGIN_LO (0x00000340) +#define NVC97E_SET_TIMESTAMP_ORIGIN_LO_TIMESTAMP_LO 31:0 +#define NVC97E_SET_TIMESTAMP_ORIGIN_HI (0x00000344) +#define NVC97E_SET_TIMESTAMP_ORIGIN_HI_TIMESTAMP_HI 31:0 +#define NVC97E_SET_UPDATE_TIMESTAMP_LO (0x00000348) +#define NVC97E_SET_UPDATE_TIMESTAMP_LO_TIMESTAMP_LO 31:0 +#define NVC97E_SET_UPDATE_TIMESTAMP_HI (0x0000034C) +#define NVC97E_SET_UPDATE_TIMESTAMP_HI_TIMESTAMP_HI 31:0 +#define NVC97E_SET_INTERLOCK_FLAGS (0x00000370) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 0:0 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+1):((i)+1) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 1:1 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 2:2 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 3:3 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 4:4 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 5:5 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 6:6 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 7:7 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 8:8 +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVC97E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS (0x00000374) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVC97E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL (0x00000398) +#define NVC97E_SET_EXT_PACKET_CONTROL_ENABLE 0:0 +#define NVC97E_SET_EXT_PACKET_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_EXT_PACKET_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL_LOCATION 4:4 +#define NVC97E_SET_EXT_PACKET_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVC97E_SET_EXT_PACKET_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL_FREQUENCY 8:8 +#define NVC97E_SET_EXT_PACKET_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVC97E_SET_EXT_PACKET_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE 12:12 +#define NVC97E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_DISABLE (0x00000000) +#define NVC97E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_ENABLE (0x00000001) +#define NVC97E_SET_EXT_PACKET_CONTROL_SIZE 27:16 +#define NVC97E_SET_EXT_PACKET_DATA (0x0000039C) +#define NVC97E_SET_EXT_PACKET_DATA_DB0 7:0 +#define NVC97E_SET_EXT_PACKET_DATA_DB1 15:8 +#define NVC97E_SET_EXT_PACKET_DATA_DB2 23:16 +#define NVC97E_SET_EXT_PACKET_DATA_DB3 31:24 +#define NVC97E_SET_FMT_COEFFICIENT_C00 (0x00000400) +#define NVC97E_SET_FMT_COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C01 (0x00000404) +#define NVC97E_SET_FMT_COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C02 (0x00000408) +#define NVC97E_SET_FMT_COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C03 (0x0000040C) +#define NVC97E_SET_FMT_COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C10 (0x00000410) +#define NVC97E_SET_FMT_COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C11 (0x00000414) +#define NVC97E_SET_FMT_COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C12 (0x00000418) +#define NVC97E_SET_FMT_COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C13 (0x0000041C) +#define NVC97E_SET_FMT_COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C20 (0x00000420) +#define NVC97E_SET_FMT_COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C21 (0x00000424) +#define NVC97E_SET_FMT_COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C22 (0x00000428) +#define NVC97E_SET_FMT_COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_FMT_COEFFICIENT_C23 (0x0000042C) +#define NVC97E_SET_FMT_COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_ILUT_CONTROL (0x00000440) +#define NVC97E_SET_ILUT_CONTROL_INTERPOLATE 0:0 +#define NVC97E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97E_SET_ILUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97E_SET_ILUT_CONTROL_MIRROR 1:1 +#define NVC97E_SET_ILUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC97E_SET_ILUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC97E_SET_ILUT_CONTROL_MODE 3:2 +#define NVC97E_SET_ILUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVC97E_SET_ILUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVC97E_SET_ILUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVC97E_SET_ILUT_CONTROL_SIZE 18:8 +#define NVC97E_SET_CSC00CONTROL (0x0000045C) +#define NVC97E_SET_CSC00CONTROL_ENABLE 0:0 +#define NVC97E_SET_CSC00CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC00CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC00COEFFICIENT_C00 (0x00000460) +#define NVC97E_SET_CSC00COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C01 (0x00000464) +#define NVC97E_SET_CSC00COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C02 (0x00000468) +#define NVC97E_SET_CSC00COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C03 (0x0000046C) +#define NVC97E_SET_CSC00COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C10 (0x00000470) +#define NVC97E_SET_CSC00COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C11 (0x00000474) +#define NVC97E_SET_CSC00COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C12 (0x00000478) +#define NVC97E_SET_CSC00COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C13 (0x0000047C) +#define NVC97E_SET_CSC00COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C20 (0x00000480) +#define NVC97E_SET_CSC00COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C21 (0x00000484) +#define NVC97E_SET_CSC00COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C22 (0x00000488) +#define NVC97E_SET_CSC00COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_CSC00COEFFICIENT_C23 (0x0000048C) +#define NVC97E_SET_CSC00COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_CSC0LUT_CONTROL (0x000004A0) +#define NVC97E_SET_CSC0LUT_CONTROL_INTERPOLATE 0:0 +#define NVC97E_SET_CSC0LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97E_SET_CSC0LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97E_SET_CSC0LUT_CONTROL_MIRROR 1:1 +#define NVC97E_SET_CSC0LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC97E_SET_CSC0LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC97E_SET_CSC0LUT_CONTROL_ENABLE 4:4 +#define NVC97E_SET_CSC0LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC0LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC01CONTROL (0x000004BC) +#define NVC97E_SET_CSC01CONTROL_ENABLE 0:0 +#define NVC97E_SET_CSC01CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC01CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC01COEFFICIENT_C00 (0x000004C0) +#define NVC97E_SET_CSC01COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C01 (0x000004C4) +#define NVC97E_SET_CSC01COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C02 (0x000004C8) +#define NVC97E_SET_CSC01COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C03 (0x000004CC) +#define NVC97E_SET_CSC01COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C10 (0x000004D0) +#define NVC97E_SET_CSC01COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C11 (0x000004D4) +#define NVC97E_SET_CSC01COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C12 (0x000004D8) +#define NVC97E_SET_CSC01COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C13 (0x000004DC) +#define NVC97E_SET_CSC01COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C20 (0x000004E0) +#define NVC97E_SET_CSC01COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C21 (0x000004E4) +#define NVC97E_SET_CSC01COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C22 (0x000004E8) +#define NVC97E_SET_CSC01COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_CSC01COEFFICIENT_C23 (0x000004EC) +#define NVC97E_SET_CSC01COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_TMO_CONTROL (0x00000500) +#define NVC97E_SET_TMO_CONTROL_INTERPOLATE 0:0 +#define NVC97E_SET_TMO_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97E_SET_TMO_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97E_SET_TMO_CONTROL_SAT_MODE 3:2 +#define NVC97E_SET_TMO_CONTROL_SIZE 18:8 +#define NVC97E_SET_TMO_LOW_INTENSITY_ZONE (0x00000508) +#define NVC97E_SET_TMO_LOW_INTENSITY_ZONE_END 29:16 +#define NVC97E_SET_TMO_LOW_INTENSITY_VALUE (0x0000050C) +#define NVC97E_SET_TMO_LOW_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC97E_SET_TMO_LOW_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC97E_SET_TMO_LOW_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_ZONE (0x00000510) +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_ZONE_START 13:0 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_ZONE_END 29:16 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_VALUE (0x00000514) +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC97E_SET_TMO_MEDIUM_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC97E_SET_TMO_HIGH_INTENSITY_ZONE (0x00000518) +#define NVC97E_SET_TMO_HIGH_INTENSITY_ZONE_START 13:0 +#define NVC97E_SET_TMO_HIGH_INTENSITY_VALUE (0x0000051C) +#define NVC97E_SET_TMO_HIGH_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVC97E_SET_TMO_HIGH_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVC97E_SET_TMO_HIGH_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVC97E_SET_CSC10CONTROL (0x0000053C) +#define NVC97E_SET_CSC10CONTROL_ENABLE 0:0 +#define NVC97E_SET_CSC10CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC10CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC10COEFFICIENT_C00 (0x00000540) +#define NVC97E_SET_CSC10COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C01 (0x00000544) +#define NVC97E_SET_CSC10COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C02 (0x00000548) +#define NVC97E_SET_CSC10COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C03 (0x0000054C) +#define NVC97E_SET_CSC10COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C10 (0x00000550) +#define NVC97E_SET_CSC10COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C11 (0x00000554) +#define NVC97E_SET_CSC10COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C12 (0x00000558) +#define NVC97E_SET_CSC10COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C13 (0x0000055C) +#define NVC97E_SET_CSC10COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C20 (0x00000560) +#define NVC97E_SET_CSC10COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C21 (0x00000564) +#define NVC97E_SET_CSC10COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C22 (0x00000568) +#define NVC97E_SET_CSC10COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_CSC10COEFFICIENT_C23 (0x0000056C) +#define NVC97E_SET_CSC10COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_CSC1LUT_CONTROL (0x00000580) +#define NVC97E_SET_CSC1LUT_CONTROL_INTERPOLATE 0:0 +#define NVC97E_SET_CSC1LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVC97E_SET_CSC1LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVC97E_SET_CSC1LUT_CONTROL_MIRROR 1:1 +#define NVC97E_SET_CSC1LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVC97E_SET_CSC1LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVC97E_SET_CSC1LUT_CONTROL_ENABLE 4:4 +#define NVC97E_SET_CSC1LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC1LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC11CONTROL (0x0000059C) +#define NVC97E_SET_CSC11CONTROL_ENABLE 0:0 +#define NVC97E_SET_CSC11CONTROL_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_CSC11CONTROL_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_CSC11COEFFICIENT_C00 (0x000005A0) +#define NVC97E_SET_CSC11COEFFICIENT_C00_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C01 (0x000005A4) +#define NVC97E_SET_CSC11COEFFICIENT_C01_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C02 (0x000005A8) +#define NVC97E_SET_CSC11COEFFICIENT_C02_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C03 (0x000005AC) +#define NVC97E_SET_CSC11COEFFICIENT_C03_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C10 (0x000005B0) +#define NVC97E_SET_CSC11COEFFICIENT_C10_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C11 (0x000005B4) +#define NVC97E_SET_CSC11COEFFICIENT_C11_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C12 (0x000005B8) +#define NVC97E_SET_CSC11COEFFICIENT_C12_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C13 (0x000005BC) +#define NVC97E_SET_CSC11COEFFICIENT_C13_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C20 (0x000005C0) +#define NVC97E_SET_CSC11COEFFICIENT_C20_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C21 (0x000005C4) +#define NVC97E_SET_CSC11COEFFICIENT_C21_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C22 (0x000005C8) +#define NVC97E_SET_CSC11COEFFICIENT_C22_VALUE 20:0 +#define NVC97E_SET_CSC11COEFFICIENT_C23 (0x000005CC) +#define NVC97E_SET_CSC11COEFFICIENT_C23_VALUE 20:0 +#define NVC97E_SET_CLAMP_RANGE (0x000005D0) +#define NVC97E_SET_CLAMP_RANGE_LOW 15:0 +#define NVC97E_SET_CLAMP_RANGE_HIGH 31:16 +#define NVC97E_SW_RESERVED(b) (0x000005D4 + (b)*0x00000004) +#define NVC97E_SW_RESERVED_VALUE 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_HI_SEMAPHORE (0x00000640) +#define NVC97E_SET_SURFACE_ADDRESS_HI_SEMAPHORE_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE (0x00000644) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE (0x00000648) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE (0x0000064C) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000650) +#define NVC97E_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000654) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ISO(b) (0x00000658 + (b)*0x00000004) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ISO_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO(b) (0x00000670 + (b)*0x00000004) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_KIND 1:1 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_KIND_PITCH (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_KIND_BLOCKLINEAR (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ILUT (0x00000688) +#define NVC97E_SET_SURFACE_ADDRESS_HI_ILUT_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT (0x0000068C) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_HI_TMO_LUT (0x00000690) +#define NVC97E_SET_SURFACE_ADDRESS_HI_TMO_LUT_ADDRESS_HI 31:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT (0x00000694) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ADDRESS_LO 31:4 +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET 3:2 +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_IOVA (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE 0:0 +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_DISABLE (0x00000000) +#define NVC97E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_ENABLE (0x00000001) +#define NVC97E_SET_TELLTALE_CRC_REGION(b) (0x00000698 + (b)*0x00000004) +#define NVC97E_SET_TELLTALE_CRC_REGION_INDEX0 7:0 +#define NVC97E_SET_TELLTALE_CRC_REGION_INDEX1 15:8 +#define NVC97E_SET_TELLTALE_CRC_REGION_INDEX2 23:16 +#define NVC97E_SET_TELLTALE_CRC_REGION_INDEX3 31:24 +#define NVC97E_SET_TELLTALE_GOLDEN_CRC_LOWER(b) (0x000006A8 + (b)*0x00000004) +#define NVC97E_SET_TELLTALE_GOLDEN_CRC_LOWER_CRC 31:0 +#define NVC97E_SET_TELLTALE_GOLDEN_CRC_UPPER(b) (0x000006E8 + (b)*0x00000004) +#define NVC97E_SET_TELLTALE_GOLDEN_CRC_UPPER_CRC 31:0 +#define NVC97E_SET_TELLTALE_CRC_CONTROL (0x00000728) +#define NVC97E_SET_TELLTALE_CRC_CONTROL_REGION_ENABLE 15:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clc97e_h diff --git a/userspace/sdks/nv570/inc/class/clc997.h b/userspace/sdks/nv570/inc/class/clc997.h new file mode 100644 index 0000000..81607be --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc997.h @@ -0,0 +1,4481 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_ada_a_h_ +#define _cl_ada_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl ada_a */ + +#include "nvtypes.h" + +#define ADA_A 0xC997 + +#define NVC997_SET_OBJECT 0x0000 +#define NVC997_SET_OBJECT_CLASS_ID 15:0 +#define NVC997_SET_OBJECT_ENGINE_ID 20:16 + +#define NVC997_NO_OPERATION 0x0100 +#define NVC997_NO_OPERATION_V 31:0 + +#define NVC997_SET_NOTIFY_A 0x0104 +#define NVC997_SET_NOTIFY_A_ADDRESS_UPPER 7:0 + +#define NVC997_SET_NOTIFY_B 0x0108 +#define NVC997_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVC997_NOTIFY 0x010c +#define NVC997_NOTIFY_TYPE 31:0 +#define NVC997_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVC997_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVC997_WAIT_FOR_IDLE 0x0110 +#define NVC997_WAIT_FOR_IDLE_V 31:0 + +#define NVC997_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVC997_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVC997_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVC997_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVC997_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVC997_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVC997_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVC997_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVC997_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVC997_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVC997_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVC997_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVC997_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVC997_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVC997_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVC997_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVC997_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVC997_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVC997_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVC997_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVC997_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVC997_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVC997_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC997_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC997_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC997_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC997_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC997_SEND_GO_IDLE 0x013c +#define NVC997_SEND_GO_IDLE_V 31:0 + +#define NVC997_PM_TRIGGER 0x0140 +#define NVC997_PM_TRIGGER_V 31:0 + +#define NVC997_PM_TRIGGER_WFI 0x0144 +#define NVC997_PM_TRIGGER_WFI_V 31:0 + +#define NVC997_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVC997_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVC997_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVC997_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVC997_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVC997_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVC997_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVC997_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVC997_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER 0x0158 +#define NVC997_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER_PAYLOAD_LOWER 31:0 + +#define NVC997_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER 0x015c +#define NVC997_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER_PAYLOAD_UPPER 31:0 + +#define NVC997_SET_REPORT_SEMAPHORE_ADDRESS_LOWER 0x0160 +#define NVC997_SET_REPORT_SEMAPHORE_ADDRESS_LOWER_LOWER 31:0 + +#define NVC997_SET_REPORT_SEMAPHORE_ADDRESS_UPPER 0x0164 +#define NVC997_SET_REPORT_SEMAPHORE_ADDRESS_UPPER_UPPER 7:0 + +#define NVC997_REPORT_SEMAPHORE_EXECUTE 0x0168 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_OPERATION 1:0 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_OPERATION_RELEASE 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_OPERATION_ACQUIRE 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_OPERATION_REPORT_ONLY 0x00000002 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_OPERATION_TRAP 0x00000003 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION 5:2 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_NONE 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_VPC 0x00000004 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_ALL 0x0000000F +#define NVC997_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE 6:6 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT 11:7 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_NONE 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_VS_INVOCATIONS 0x00000005 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_TI_INVOCATIONS 0x0000001B +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_TS_INVOCATIONS 0x0000001D +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_GS_INVOCATIONS 0x00000007 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_SCG_CLOCKS 0x00000008 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS0 0x0000000A +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS1 0x0000000C +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS2 0x0000000E +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS3 0x00000010 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_PS_INVOCATIONS 0x00000013 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REPORT_TIMESTAMP 0x00000014 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE 14:13 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_SUB_REPORT 17:15 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE 19:19 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_ROP_FLUSH_DISABLE 18:18 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_ROP_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_ROP_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE 20:20 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP 23:21 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_INC 0x00000003 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_AND 0x00000005 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_OR 0x00000006 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT 25:24 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64 27:27 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_FALSE 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_TRUE 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE 29:28 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVC997_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 + +#define NVC997_LINE_LENGTH_IN 0x0180 +#define NVC997_LINE_LENGTH_IN_VALUE 31:0 + +#define NVC997_LINE_COUNT 0x0184 +#define NVC997_LINE_COUNT_VALUE 31:0 + +#define NVC997_OFFSET_OUT_UPPER 0x0188 +#define NVC997_OFFSET_OUT_UPPER_VALUE 7:0 + +#define NVC997_OFFSET_OUT 0x018c +#define NVC997_OFFSET_OUT_VALUE 31:0 + +#define NVC997_PITCH_OUT 0x0190 +#define NVC997_PITCH_OUT_VALUE 31:0 + +#define NVC997_SET_DST_BLOCK_SIZE 0x0194 +#define NVC997_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVC997_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC997_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVC997_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC997_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC997_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC997_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC997_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC997_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC997_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVC997_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVC997_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVC997_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVC997_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC997_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC997_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVC997_SET_DST_WIDTH 0x0198 +#define NVC997_SET_DST_WIDTH_V 31:0 + +#define NVC997_SET_DST_HEIGHT 0x019c +#define NVC997_SET_DST_HEIGHT_V 31:0 + +#define NVC997_SET_DST_DEPTH 0x01a0 +#define NVC997_SET_DST_DEPTH_V 31:0 + +#define NVC997_SET_DST_LAYER 0x01a4 +#define NVC997_SET_DST_LAYER_V 31:0 + +#define NVC997_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVC997_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVC997_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVC997_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVC997_LAUNCH_DMA 0x01b0 +#define NVC997_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVC997_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC997_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC997_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVC997_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVC997_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVC997_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVC997_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVC997_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVC997_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVC997_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVC997_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVC997_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVC997_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVC997_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC997_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC997_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVC997_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC997_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC997_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC997_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVC997_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC997_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVC997_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVC997_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC997_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVC997_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC997_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC997_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVC997_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVC997_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVC997_LOAD_INLINE_DATA 0x01b4 +#define NVC997_LOAD_INLINE_DATA_V 31:0 + +#define NVC997_SET_I2M_SEMAPHORE_A 0x01dc +#define NVC997_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVC997_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVC997_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC997_SET_MME_SWITCH_STATE 0x01ec +#define NVC997_SET_MME_SWITCH_STATE_VALID 0:0 +#define NVC997_SET_MME_SWITCH_STATE_VALID_FALSE 0x00000000 +#define NVC997_SET_MME_SWITCH_STATE_VALID_TRUE 0x00000001 +#define NVC997_SET_MME_SWITCH_STATE_SAVE_MACRO 11:4 +#define NVC997_SET_MME_SWITCH_STATE_RESTORE_MACRO 19:12 + +#define NVC997_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVC997_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVC997_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVC997_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVC997_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVC997_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVC997_SET_I2M_SPARE_NOOP03 0x01fc +#define NVC997_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVC997_RUN_DS_NOW 0x0200 +#define NVC997_RUN_DS_NOW_V 31:0 + +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVC997_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVC997_SET_GS_MODE 0x0208 +#define NVC997_SET_GS_MODE_TYPE 0:0 +#define NVC997_SET_GS_MODE_TYPE_ANY 0x00000000 +#define NVC997_SET_GS_MODE_TYPE_FAST_GS 0x00000001 + +#define NVC997_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVC997_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVC997_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVC997_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVC997_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVC997_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVC997_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVC997_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_GS_DM_FIFO 0x0214 +#define NVC997_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVC997_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVC997_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVC997_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVC997_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC997_INVALIDATE_SHADER_CACHES 0x021c +#define NVC997_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVC997_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVC997_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVC997_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVC997_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVC997_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVC997_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVC997_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVC997_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVC997_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVC997_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVC997_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVC997_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVC997_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVC997_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVC997_SET_INSTANCE_COUNT 0x0220 +#define NVC997_SET_INSTANCE_COUNT_V 31:0 + +#define NVC997_SET_POSITION_W_SCALED_OFFSET_ENABLE 0x0224 +#define NVC997_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE 0:0 +#define NVC997_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_GO_IDLE_TIMEOUT 0x022c +#define NVC997_SET_GO_IDLE_TIMEOUT_V 31:0 + +#define NVC997_SET_MME_VERSION 0x0234 +#define NVC997_SET_MME_VERSION_MAJOR 7:0 + +#define NVC997_SET_INDEX_BUFFER_SIZE_A 0x0238 +#define NVC997_SET_INDEX_BUFFER_SIZE_A_UPPER 7:0 + +#define NVC997_SET_INDEX_BUFFER_SIZE_B 0x023c +#define NVC997_SET_INDEX_BUFFER_SIZE_B_LOWER 31:0 + +#define NVC997_SET_ROOT_TABLE_VISIBILITY(i) (0x0240+(i)*4) +#define NVC997_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP0_ENABLE 1:0 +#define NVC997_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP1_ENABLE 5:4 +#define NVC997_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP2_ENABLE 9:8 +#define NVC997_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP3_ENABLE 13:12 +#define NVC997_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP4_ENABLE 17:16 + +#define NVC997_SET_DRAW_CONTROL_A 0x0260 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY 3:0 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_POINTS 0x00000000 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_LINES 0x00000001 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_QUADS 0x00000007 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_POLYGON 0x00000009 +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_SET_DRAW_CONTROL_A_TOPOLOGY_PATCH 0x0000000E +#define NVC997_SET_DRAW_CONTROL_A_PRIMITIVE_ID 4:4 +#define NVC997_SET_DRAW_CONTROL_A_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC997_SET_DRAW_CONTROL_A_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC997_SET_DRAW_CONTROL_A_INSTANCE_ID 6:5 +#define NVC997_SET_DRAW_CONTROL_A_INSTANCE_ID_FIRST 0x00000000 +#define NVC997_SET_DRAW_CONTROL_A_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC997_SET_DRAW_CONTROL_A_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC997_SET_DRAW_CONTROL_A_SPLIT_MODE 8:7 +#define NVC997_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC997_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC997_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC997_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC997_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE 9:9 +#define NVC997_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 +#define NVC997_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX 10:10 +#define NVC997_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_FALSE 0x00000000 +#define NVC997_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_TRUE 0x00000001 +#define NVC997_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX 11:11 +#define NVC997_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_FALSE 0x00000000 +#define NVC997_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_TRUE 0x00000001 + +#define NVC997_SET_DRAW_CONTROL_B 0x0264 +#define NVC997_SET_DRAW_CONTROL_B_INSTANCE_COUNT 31:0 + +#define NVC997_DRAW_INDEX_BUFFER_BEGIN_END_A 0x0268 +#define NVC997_DRAW_INDEX_BUFFER_BEGIN_END_A_FIRST 31:0 + +#define NVC997_DRAW_INDEX_BUFFER_BEGIN_END_B 0x026c +#define NVC997_DRAW_INDEX_BUFFER_BEGIN_END_B_COUNT 31:0 + +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_A 0x0270 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_A_START 31:0 + +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_B 0x0274 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_B_COUNT 31:0 + +#define NVC997_INVALIDATE_RASTER_CACHE_NO_WFI 0x027c +#define NVC997_INVALIDATE_RASTER_CACHE_NO_WFI_V 0:0 + +#define NVC997_SET_COLOR_RENDER_TO_ZETA_SURFACE 0x02b8 +#define NVC997_SET_COLOR_RENDER_TO_ZETA_SURFACE_V 0:0 +#define NVC997_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_FALSE 0x00000000 +#define NVC997_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_TRUE 0x00000001 + +#define NVC997_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION 0x02bc +#define NVC997_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V 0:0 +#define NVC997_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_FALSE 0x00000000 +#define NVC997_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_TRUE 0x00000001 + +#define NVC997_INCREMENT_SYNC_POINT 0x02c8 +#define NVC997_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVC997_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVC997_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVC997_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVC997_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVC997_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVC997_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVC997_SET_ROOT_TABLE_PREFETCH 0x02d0 +#define NVC997_SET_ROOT_TABLE_PREFETCH_STAGE_ENABLES 5:0 + +#define NVC997_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVC997_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVC997_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC997_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVC997_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVC997_DECOMPRESS_SURFACE 0x02e0 +#define NVC997_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVC997_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVC997_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVC997_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVC997_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVC997_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVC997_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVC997_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVC997_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVC997_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVC997_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVC997_SET_ZCULL_SUBREGION 0x02e8 +#define NVC997_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVC997_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVC997_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVC997_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVC997_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVC997_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVC997_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVC997_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVC997_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVC997_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVC997_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVC997_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVC997_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVC997_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVC997_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVC997_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVC997_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVC997_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVC997_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVC997_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVC997_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVC997_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVC997_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVC997_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVC997_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC997_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVC997_DRAW_ZERO_INDEX 0x0304 +#define NVC997_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVC997_SET_L1_CONFIGURATION 0x0308 +#define NVC997_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVC997_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVC997_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVC997_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVC997_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVC997_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVC997_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVC997_SET_SPA_VERSION 0x0310 +#define NVC997_SET_SPA_VERSION_MINOR 7:0 +#define NVC997_SET_SPA_VERSION_MAJOR 15:8 + +#define NVC997_SET_TIMESLICE_BATCH_LIMIT 0x0314 +#define NVC997_SET_TIMESLICE_BATCH_LIMIT_BATCH_LIMIT 15:0 + +#define NVC997_SET_SNAP_GRID_LINE 0x0318 +#define NVC997_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC997_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC997_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC997_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC997_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC997_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC997_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC997_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC997_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC997_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVC997_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC997_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC997_SET_SNAP_GRID_NON_LINE 0x031c +#define NVC997_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVC997_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVC997_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVC997_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVC997_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVC997_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVC997_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVC997_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVC997_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVC997_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVC997_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVC997_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVC997_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVC997_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVC997_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVC997_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVC997_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVC997_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVC997_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVC997_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVC997_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVC997_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVC997_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVC997_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVC997_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVC997_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVC997_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVC997_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVC997_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVC997_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVC997_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVC997_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVC997_SET_TESSELLATION_LOD_V1 0x0330 +#define NVC997_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVC997_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVC997_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVC997_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVC997_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVC997_RESERVED_TG07 0x033c +#define NVC997_RESERVED_TG07_V 0:0 + +#define NVC997_RESERVED_TG08 0x0340 +#define NVC997_RESERVED_TG08_V 0:0 + +#define NVC997_RESERVED_TG09 0x0344 +#define NVC997_RESERVED_TG09_V 0:0 + +#define NVC997_RESERVED_TG10 0x0348 +#define NVC997_RESERVED_TG10_V 0:0 + +#define NVC997_RESERVED_TG11 0x034c +#define NVC997_RESERVED_TG11_V 0:0 + +#define NVC997_RESERVED_TG12 0x0350 +#define NVC997_RESERVED_TG12_V 0:0 + +#define NVC997_RESERVED_TG13 0x0354 +#define NVC997_RESERVED_TG13_V 0:0 + +#define NVC997_RESERVED_TG14 0x0358 +#define NVC997_RESERVED_TG14_V 0:0 + +#define NVC997_RESERVED_TG15 0x035c +#define NVC997_RESERVED_TG15_V 0:0 + +#define NVC997_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVC997_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVC997_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVC997_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVC997_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVC997_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVC997_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVC997_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVC997_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVC997_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVC997_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVC997_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVC997_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVC997_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVC997_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVC997_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVC997_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVC997_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVC997_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE 8:8 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE 9:9 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVC997_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVC997_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVC997_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVC997_SET_RASTER_ENABLE 0x037c +#define NVC997_SET_RASTER_ENABLE_V 0:0 +#define NVC997_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVC997_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVC997_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVC997_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVC997_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVC997_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVC997_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVC997_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVC997_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVC997_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVC997_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVC997_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVC997_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVC997_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVC997_SET_POSITION_W_SCALED_OFFSET_SCALE_A(j) (0x0400+(j)*16) +#define NVC997_SET_POSITION_W_SCALED_OFFSET_SCALE_A_V 31:0 + +#define NVC997_SET_POSITION_W_SCALED_OFFSET_SCALE_B(j) (0x0404+(j)*16) +#define NVC997_SET_POSITION_W_SCALED_OFFSET_SCALE_B_V 31:0 + +#define NVC997_SET_POSITION_W_SCALED_OFFSET_RESERVED_A(j) (0x0408+(j)*16) +#define NVC997_SET_POSITION_W_SCALED_OFFSET_RESERVED_A_V 31:0 + +#define NVC997_SET_POSITION_W_SCALED_OFFSET_RESERVED_B(j) (0x040c+(j)*16) +#define NVC997_SET_POSITION_W_SCALED_OFFSET_RESERVED_B_V 31:0 + +#define NVC997_SET_Z_ROP_SLICE_MAP 0x0500 +#define NVC997_SET_Z_ROP_SLICE_MAP_VIRTUAL_ADDRESS_MASK 31:0 + +#define NVC997_SET_ROOT_TABLE_SELECTOR 0x0504 +#define NVC997_SET_ROOT_TABLE_SELECTOR_ROOT_TABLE 2:0 +#define NVC997_SET_ROOT_TABLE_SELECTOR_OFFSET 15:8 + +#define NVC997_LOAD_ROOT_TABLE 0x0508 +#define NVC997_LOAD_ROOT_TABLE_V 31:0 + +#define NVC997_SET_MME_MEM_ADDRESS_A 0x0550 +#define NVC997_SET_MME_MEM_ADDRESS_A_UPPER 16:0 + +#define NVC997_SET_MME_MEM_ADDRESS_B 0x0554 +#define NVC997_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NVC997_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NVC997_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NVC997_MME_DMA_READ 0x055c +#define NVC997_MME_DMA_READ_LENGTH 31:0 + +#define NVC997_MME_DMA_READ_FIFOED 0x0560 +#define NVC997_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NVC997_MME_DMA_WRITE 0x0564 +#define NVC997_MME_DMA_WRITE_LENGTH 31:0 + +#define NVC997_MME_DMA_REDUCTION 0x0568 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NVC997_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NVC997_MME_DMA_SYSMEMBAR 0x056c +#define NVC997_MME_DMA_SYSMEMBAR_V 0:0 + +#define NVC997_MME_DMA_SYNC 0x0570 +#define NVC997_MME_DMA_SYNC_VALUE 31:0 + +#define NVC997_SET_MME_DATA_FIFO_CONFIG 0x0574 +#define NVC997_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 +#define NVC997_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 +#define NVC997_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 +#define NVC997_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 +#define NVC997_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 +#define NVC997_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 + +#define NVC997_SET_VERTEX_STREAM_SIZE_A(j) (0x0600+(j)*8) +#define NVC997_SET_VERTEX_STREAM_SIZE_A_UPPER 7:0 + +#define NVC997_SET_VERTEX_STREAM_SIZE_B(j) (0x0604+(j)*8) +#define NVC997_SET_VERTEX_STREAM_SIZE_B_LOWER 31:0 + +#define NVC997_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVC997_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVC997_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVC997_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVC997_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVC997_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVC997_SET_RASTER_INPUT 0x0740 +#define NVC997_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVC997_SET_STREAM_OUTPUT 0x0744 +#define NVC997_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVC997_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVC997_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVC997_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVC997_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVC997_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVC997_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVC997_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 +#define NVC997_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES_EXTENDED 5:5 + +#define NVC997_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVC997_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVC997_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVC997_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVC997_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVC997_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVC997_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVC997_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 5:0 + +#define NVC997_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVC997_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVC997_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVC997_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVC997_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVC997_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC997_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVC997_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC997_SET_STENCIL_ZERO_BANDWIDTH_CLEAR 0x07b0 +#define NVC997_SET_STENCIL_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVC997_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVC997_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVC997_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVC997_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVC997_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVC997_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVC997_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVC997_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVC997_SET_CULL_BEFORE_FETCH 0x07dc +#define NVC997_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVC997_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVC997_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVC997_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVC997_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVC997_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVC997_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVC997_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVC997_SET_ZCULL_STORAGE_A 0x07e8 +#define NVC997_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVC997_SET_ZCULL_STORAGE_B 0x07ec +#define NVC997_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVC997_SET_ZCULL_STORAGE_C 0x07f0 +#define NVC997_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVC997_SET_ZCULL_STORAGE_D 0x07f4 +#define NVC997_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVC997_SET_ZT_READ_ONLY 0x07f8 +#define NVC997_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVC997_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVC997_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVC997_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVC997_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVC997_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVC997_THROTTLE_SM 0x07fc +#define NVC997_THROTTLE_SM_MULTIPLY_ADD 0:0 +#define NVC997_THROTTLE_SM_MULTIPLY_ADD_FALSE 0x00000000 +#define NVC997_THROTTLE_SM_MULTIPLY_ADD_TRUE 0x00000001 + +#define NVC997_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVC997_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVC997_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVC997_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVC997_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVC997_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVC997_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVC997_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVC997_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVC997_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVC997_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVC997_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVC997_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVC997_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVC997_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVC997_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVC997_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVC997_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVC997_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVC997_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVC997_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVC997_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVC997_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVC997_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVC997_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVC997_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC997_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVC997_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVC997_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVC997_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVC997_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVC997_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVC997_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVC997_SET_COLOR_TARGET_C_ROP_SLICE_MAP(j) (0x0824+(j)*64) +#define NVC997_SET_COLOR_TARGET_C_ROP_SLICE_MAP_VIRTUAL_ADDRESS_MASK 31:0 + +#define NVC997_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVC997_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVC997_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVC997_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVC997_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVC997_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVC997_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVC997_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVC997_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVC997_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVC997_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVC997_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE(j) (0x0a18+(j)*32) +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_X 2:0 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X 0x00000000 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X 0x00000001 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y 0x00000002 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y 0x00000003 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z 0x00000004 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z 0x00000005 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W 0x00000006 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W 0x00000007 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Y 6:4 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X 0x00000000 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X 0x00000001 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y 0x00000002 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y 0x00000003 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z 0x00000004 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z 0x00000005 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W 0x00000006 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W 0x00000007 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Z 10:8 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X 0x00000000 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X 0x00000001 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y 0x00000002 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y 0x00000003 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z 0x00000004 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z 0x00000005 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W 0x00000006 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W 0x00000007 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_W 14:12 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X 0x00000000 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X 0x00000001 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y 0x00000002 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y 0x00000003 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z 0x00000004 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z 0x00000005 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W 0x00000006 +#define NVC997_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W 0x00000007 + +#define NVC997_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(j) (0x0a1c+(j)*32) +#define NVC997_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_X_BITS 4:0 +#define NVC997_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_Y_BITS 12:8 + +#define NVC997_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVC997_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVC997_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC997_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVC997_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVC997_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC997_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVC997_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVC997_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVC997_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVC997_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVC997_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVC997_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVC997_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVC997_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVC997_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVC997_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVC997_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVC997_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVC997_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVC997_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVC997_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVC997_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVC997_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC997_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVC997_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVC997_SET_STATISTICS_COUNTER 0x0d68 +#define NVC997_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVC997_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVC997_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVC997_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVC997_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVC997_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVC997_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVC997_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVC997_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVC997_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVC997_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVC997_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVC997_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVC997_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVC997_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVC997_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVC997_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 +#define NVC997_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE 16:16 +#define NVC997_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVC997_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC997_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC997_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVC997_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC997_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC997_SET_VERTEX_ARRAY_START 0x0d74 +#define NVC997_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVC997_DRAW_VERTEX_ARRAY 0x0d78 +#define NVC997_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVC997_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVC997_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVC997_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVC997_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVC997_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVC997_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVC997_SET_Z_CLEAR_VALUE 0x0d90 +#define NVC997_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVC997_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVC997_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVC997_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVC997_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVC997_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVC997_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVC997_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVC997_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVC997_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVC997_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVC997_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVC997_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVC997_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVC997_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVC997_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVC997_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVC997_SET_FRONT_POLYGON_MODE 0x0dac +#define NVC997_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVC997_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC997_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC997_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC997_SET_BACK_POLYGON_MODE 0x0db0 +#define NVC997_SET_BACK_POLYGON_MODE_V 31:0 +#define NVC997_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVC997_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVC997_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVC997_SET_POLY_SMOOTH 0x0db4 +#define NVC997_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVC997_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVC997_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVC997_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVC997_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVC997_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVC997_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVC997_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVC997_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVC997_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVC997_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVC997_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVC997_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVC997_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVC997_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVC997_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVC997_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVC997_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVC997_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_PATCH 0x0dcc +#define NVC997_SET_PATCH_SIZE 7:0 + +#define NVC997_SET_ITERATED_BLEND 0x0dd0 +#define NVC997_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVC997_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVC997_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVC997_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVC997_SET_ZCULL_CRITERION 0x0dd8 +#define NVC997_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVC997_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVC997_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVC997_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVC997_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVC997_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVC997_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVC997_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVC997_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVC997_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVC997_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVC997_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVC997_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVC997_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVC997_SET_ZCULL_CRITERION_SREF 23:16 +#define NVC997_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVC997_PIXEL_SHADER_BARRIER 0x0de0 +#define NVC997_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVC997_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVC997_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 +#define NVC997_PIXEL_SHADER_BARRIER_BARRIER_LOCATION 1:1 +#define NVC997_PIXEL_SHADER_BARRIER_BARRIER_LOCATION_BLOCK_BEFORE_PS 0x00000000 +#define NVC997_PIXEL_SHADER_BARRIER_BARRIER_LOCATION_BLOCK_BEFORE_PS_AND_ZTEST 0x00000001 + +#define NVC997_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVC997_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVC997_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVC997_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVC997_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVC997_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVC997_MME_DMA_WRITE_METHOD_BARRIER 0x0dec +#define NVC997_MME_DMA_WRITE_METHOD_BARRIER_V 0:0 + +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVC997_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVC997_SET_WINDOW_OFFSET_X 0x0df8 +#define NVC997_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVC997_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVC997_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVC997_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVC997_SET_SCISSOR_ENABLE_V 0:0 +#define NVC997_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVC997_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVC997_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVC997_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVC997_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVC997_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVC997_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVC997_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVC997_SET_VPC_PERF_KNOB 0x0f14 +#define NVC997_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVC997_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVC997_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVC997_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVC997_PM_LOCAL_TRIGGER 0x0f18 +#define NVC997_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVC997_SET_POST_Z_PS_IMASK 0x0f1c +#define NVC997_SET_POST_Z_PS_IMASK_ENABLE 0:0 +#define NVC997_SET_POST_Z_PS_IMASK_ENABLE_FALSE 0x00000000 +#define NVC997_SET_POST_Z_PS_IMASK_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVC997_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVC997_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVC997_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVC997_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVC997_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVC997_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVC997_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVC997_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVC997_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVC997_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVC997_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVC997_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVC997_SET_BACK_STENCIL_MASK 0x0f58 +#define NVC997_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVC997_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVC997_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVC997_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVC997_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVC997_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVC997_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVC997_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVC997_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVC997_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVC997_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVC997_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVC997_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVC997_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC997_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVC997_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVC997_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVC997_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVC997_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVC997_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVC997_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVC997_SET_SAMPLE_MASK 0x0fa4 +#define NVC997_SET_SAMPLE_MASK_RASTER_OUT_ENABLE 0:0 +#define NVC997_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE 0x00000001 +#define NVC997_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE 4:4 +#define NVC997_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE 0x00000000 +#define NVC997_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_COLOR_TARGET_SAMPLE_MASK 0x0fa8 +#define NVC997_SET_COLOR_TARGET_SAMPLE_MASK_V 15:0 + +#define NVC997_SET_CT_MRT_ENABLE 0x0fac +#define NVC997_SET_CT_MRT_ENABLE_V 0:0 +#define NVC997_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVC997_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVC997_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVC997_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVC997_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVC997_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVC997_SET_TIR 0x0fb4 +#define NVC997_SET_TIR_MODE 1:0 +#define NVC997_SET_TIR_MODE_DISABLED 0x00000000 +#define NVC997_SET_TIR_MODE_RASTER_N_TARGET_M 0x00000001 + +#define NVC997_SET_ANTI_ALIAS_RASTER 0x0fb8 +#define NVC997_SET_ANTI_ALIAS_RASTER_SAMPLES 2:0 +#define NVC997_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1 0x00000000 +#define NVC997_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2 0x00000002 +#define NVC997_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC997_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC997_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4 0x00000006 + +#define NVC997_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVC997_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVC997_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVC997_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVC997_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVC997_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVC997_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVC997_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVC997_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVC997_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVC997_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_TIR_MODULATION 0x0fd4 +#define NVC997_SET_TIR_MODULATION_COMPONENT_SELECT 1:0 +#define NVC997_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION 0x00000000 +#define NVC997_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB 0x00000001 +#define NVC997_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY 0x00000002 +#define NVC997_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA 0x00000003 + +#define NVC997_SET_TIR_MODULATION_FUNCTION 0x0fd8 +#define NVC997_SET_TIR_MODULATION_FUNCTION_SELECT 0:0 +#define NVC997_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR 0x00000000 +#define NVC997_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE 0x00000001 + +#define NVC997_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVC997_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVC997_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVC997_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVC997_SET_ZT_A 0x0fe0 +#define NVC997_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_ZT_B 0x0fe4 +#define NVC997_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_ZT_FORMAT 0x0fe8 +#define NVC997_SET_ZT_FORMAT_V 4:0 +#define NVC997_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVC997_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVC997_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVC997_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVC997_SET_ZT_FORMAT_V_S8 0x00000017 +#define NVC997_SET_ZT_FORMAT_V_V8Z24 0x00000018 +#define NVC997_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVC997_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 +#define NVC997_SET_ZT_FORMAT_V_X8Z24_X16V8S8 0x0000001D +#define NVC997_SET_ZT_FORMAT_V_ZF32_X16V8X8 0x0000001E +#define NVC997_SET_ZT_FORMAT_V_ZF32_X16V8S8 0x0000001F + +#define NVC997_SET_ZT_BLOCK_SIZE 0x0fec +#define NVC997_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVC997_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVC997_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVC997_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVC997_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVC997_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVC997_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVC997_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVC997_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVC997_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVC997_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVC997_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVC997_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVC997_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVC997_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVC997_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVC997_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVC997_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVC997_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVC997_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC997_SET_VIEWPORT_MULTICAST 0x1004 +#define NVC997_SET_VIEWPORT_MULTICAST_ORDER 0:0 +#define NVC997_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER 0x00000000 +#define NVC997_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER 0x00000001 + +#define NVC997_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVC997_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVC997_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVC997_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVC997_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVC997_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVC997_SET_RESERVED_SW_METHOD00 0x1014 +#define NVC997_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVC997_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVC997_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC997_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVC997_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC997_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVC997_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVC997_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVC997_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVC997_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_RESERVED_SW_METHOD01 0x1028 +#define NVC997_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD02 0x102c +#define NVC997_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVC997_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) (0x1030+(i)*4) +#define NVC997_SET_TIR_MODULATION_COEFFICIENT_TABLE_V0 7:0 +#define NVC997_SET_TIR_MODULATION_COEFFICIENT_TABLE_V1 15:8 +#define NVC997_SET_TIR_MODULATION_COEFFICIENT_TABLE_V2 23:16 +#define NVC997_SET_TIR_MODULATION_COEFFICIENT_TABLE_V3 31:24 + +#define NVC997_SET_SPARE_NOOP01 0x1044 +#define NVC997_SET_SPARE_NOOP01_V 31:0 + +#define NVC997_SET_SPARE_NOOP02 0x1048 +#define NVC997_SET_SPARE_NOOP02_V 31:0 + +#define NVC997_SET_SPARE_NOOP03 0x104c +#define NVC997_SET_SPARE_NOOP03_V 31:0 + +#define NVC997_SET_SPARE_NOOP04 0x1050 +#define NVC997_SET_SPARE_NOOP04_V 31:0 + +#define NVC997_SET_SPARE_NOOP05 0x1054 +#define NVC997_SET_SPARE_NOOP05_V 31:0 + +#define NVC997_SET_SPARE_NOOP06 0x1058 +#define NVC997_SET_SPARE_NOOP06_V 31:0 + +#define NVC997_SET_SPARE_NOOP07 0x105c +#define NVC997_SET_SPARE_NOOP07_V 31:0 + +#define NVC997_SET_SPARE_NOOP08 0x1060 +#define NVC997_SET_SPARE_NOOP08_V 31:0 + +#define NVC997_SET_SPARE_NOOP09 0x1064 +#define NVC997_SET_SPARE_NOOP09_V 31:0 + +#define NVC997_SET_SPARE_NOOP10 0x1068 +#define NVC997_SET_SPARE_NOOP10_V 31:0 + +#define NVC997_SET_SPARE_NOOP11 0x106c +#define NVC997_SET_SPARE_NOOP11_V 31:0 + +#define NVC997_SET_SPARE_NOOP12 0x1070 +#define NVC997_SET_SPARE_NOOP12_V 31:0 + +#define NVC997_SET_SPARE_NOOP13 0x1074 +#define NVC997_SET_SPARE_NOOP13_V 31:0 + +#define NVC997_SET_SPARE_NOOP14 0x1078 +#define NVC997_SET_SPARE_NOOP14_V 31:0 + +#define NVC997_SET_SPARE_NOOP15 0x107c +#define NVC997_SET_SPARE_NOOP15_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVC997_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVC997_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVC997_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD06 0x10bc +#define NVC997_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVC997_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVC997_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVC997_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVC997_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVC997_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVC997_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVC997_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD13 0x10dc +#define NVC997_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVC997_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVC997_UNBIND_ALL 0x10f4 +#define NVC997_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVC997_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVC997_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVC997_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVC997_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC997_SET_RESERVED_SW_METHOD14 0x1100 +#define NVC997_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVC997_SET_RESERVED_SW_METHOD15 0x1104 +#define NVC997_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVC997_NO_OPERATION_DATA_HI 0x110c +#define NVC997_NO_OPERATION_DATA_HI_V 31:0 + +#define NVC997_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVC997_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVC997_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVC997_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVC997_PM_TRIGGER_END 0x1114 +#define NVC997_PM_TRIGGER_END_V 31:0 + +#define NVC997_SET_VERTEX_ID_BASE 0x1118 +#define NVC997_SET_VERTEX_ID_BASE_V 31:0 + +#define NVC997_SET_STENCIL_COMPRESSION 0x111c +#define NVC997_SET_STENCIL_COMPRESSION_ENABLE 0:0 +#define NVC997_SET_STENCIL_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STENCIL_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVC997_SET_TIR_CONTROL 0x1130 +#define NVC997_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES 0:0 +#define NVC997_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC997_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC997_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES 4:4 +#define NVC997_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVC997_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVC997_SET_TIR_CONTROL_REDUCE_COVERAGE 1:1 +#define NVC997_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE 0x00000000 +#define NVC997_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE 0x00000001 +#define NVC997_SET_TIR_CONTROL_REDUCTION_MODE 2:2 +#define NVC997_SET_TIR_CONTROL_REDUCTION_MODE_AFFINITY_MAP 0x00000000 +#define NVC997_SET_TIR_CONTROL_REDUCTION_MODE_TRUNCATION 0x00000001 + +#define NVC997_SET_MUTABLE_METHOD_CONTROL 0x1134 +#define NVC997_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT 0:0 +#define NVC997_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE 0x00000000 +#define NVC997_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE 0x00000001 + +#define NVC997_SET_POST_PS_INITIAL_COVERAGE 0x1138 +#define NVC997_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE 0:0 +#define NVC997_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE 0x00000000 +#define NVC997_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE 0x00000001 + +#define NVC997_SET_FILL_VIA_TRIANGLE 0x113c +#define NVC997_SET_FILL_VIA_TRIANGLE_MODE 1:0 +#define NVC997_SET_FILL_VIA_TRIANGLE_MODE_DISABLED 0x00000000 +#define NVC997_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL 0x00000001 +#define NVC997_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX 0x00000002 + +#define NVC997_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVC997_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVC997_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVC997_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVC997_FLUSH_PENDING_WRITES 0x1144 +#define NVC997_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVC997_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVC997_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC997_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC997_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC997_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVC997_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVC997_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVC997_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVC997_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) (0x11e0+(i)*4) +#define NVC997_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X0 3:0 +#define NVC997_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y0 7:4 +#define NVC997_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X1 11:8 +#define NVC997_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y1 15:12 +#define NVC997_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X2 19:16 +#define NVC997_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y2 23:20 +#define NVC997_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X3 27:24 +#define NVC997_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y3 31:28 + +#define NVC997_SET_OFFSET_RENDER_TARGET_INDEX 0x11f0 +#define NVC997_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX 0:0 +#define NVC997_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE 0x00000000 +#define NVC997_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE 0x00000001 + +#define NVC997_FORCE_HEAVYWEIGHT_METHOD_SYNC 0x11f4 +#define NVC997_FORCE_HEAVYWEIGHT_METHOD_SYNC_V 31:0 + +#define NVC997_SET_COVERAGE_TO_COLOR 0x11f8 +#define NVC997_SET_COVERAGE_TO_COLOR_ENABLE 0:0 +#define NVC997_SET_COVERAGE_TO_COLOR_ENABLE_FALSE 0x00000000 +#define NVC997_SET_COVERAGE_TO_COLOR_ENABLE_TRUE 0x00000001 +#define NVC997_SET_COVERAGE_TO_COLOR_CT_SELECT 6:4 + +#define NVC997_DECOMPRESS_ZETA_SURFACE 0x11fc +#define NVC997_DECOMPRESS_ZETA_SURFACE_Z_ENABLE 0:0 +#define NVC997_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC997_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC997_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE 4:4 +#define NVC997_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC997_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_SCREEN_STATE_MASK 0x1204 +#define NVC997_SET_SCREEN_STATE_MASK_MASK 3:0 + +#define NVC997_SET_ZT_SPARSE 0x1208 +#define NVC997_SET_ZT_SPARSE_ENABLE 0:0 +#define NVC997_SET_ZT_SPARSE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZT_SPARSE_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ZT_SPARSE_UNMAPPED_COMPARE 1:1 +#define NVC997_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 0x00000000 +#define NVC997_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS 0x00000001 + +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC997_SET_CT_SELECT 0x121c +#define NVC997_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVC997_SET_CT_SELECT_TARGET0 6:4 +#define NVC997_SET_CT_SELECT_TARGET1 9:7 +#define NVC997_SET_CT_SELECT_TARGET2 12:10 +#define NVC997_SET_CT_SELECT_TARGET3 15:13 +#define NVC997_SET_CT_SELECT_TARGET4 18:16 +#define NVC997_SET_CT_SELECT_TARGET5 21:19 +#define NVC997_SET_CT_SELECT_TARGET6 24:22 +#define NVC997_SET_CT_SELECT_TARGET7 27:25 + +#define NVC997_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVC997_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL 0x1224 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE 1:0 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT 0x00000000 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE 0x00000001 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL 0x00000002 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE 2:2 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 0x00000000 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 0x00000001 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER 3:3 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED 0x00000000 +#define NVC997_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED 0x00000001 + +#define NVC997_SET_ZT_SIZE_A 0x1228 +#define NVC997_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVC997_SET_ZT_SIZE_B 0x122c +#define NVC997_SET_ZT_SIZE_B_HEIGHT 17:0 + +#define NVC997_SET_ZT_SIZE_C 0x1230 +#define NVC997_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVC997_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVC997_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVC997_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVC997_SET_SAMPLER_BINDING 0x1234 +#define NVC997_SET_SAMPLER_BINDING_V 0:0 +#define NVC997_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVC997_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVC997_DRAW_AUTO 0x123c +#define NVC997_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVC997_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) (0x1240+(i)*4) +#define NVC997_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK_V 31:0 + +#define NVC997_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE 0x1260 +#define NVC997_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_INDEX 7:0 +#define NVC997_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_VALUE 23:8 + +#define NVC997_SET_BACK_END_COPY_A 0x1264 +#define NVC997_SET_BACK_END_COPY_A_DWORDS 7:0 +#define NVC997_SET_BACK_END_COPY_A_SATURATE32_ENABLE 8:8 +#define NVC997_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE 0x00000000 +#define NVC997_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE 0x00000001 +#define NVC997_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE 12:12 +#define NVC997_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE 0x00000000 +#define NVC997_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_BACK_END_COPY_B 0x1268 +#define NVC997_SET_BACK_END_COPY_B_SRC_ADDRESS_UPPER 7:0 + +#define NVC997_SET_BACK_END_COPY_C 0x126c +#define NVC997_SET_BACK_END_COPY_C_SRC_ADDRESS_LOWER 31:0 + +#define NVC997_SET_BACK_END_COPY_D 0x1270 +#define NVC997_SET_BACK_END_COPY_D_DEST_ADDRESS_UPPER 7:0 + +#define NVC997_SET_BACK_END_COPY_E 0x1274 +#define NVC997_SET_BACK_END_COPY_E_DEST_ADDRESS_LOWER 31:0 + +#define NVC997_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVC997_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 19:0 + +#define NVC997_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVC997_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVC997_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC997_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVC997_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVC997_CLEAR_ZCULL_REGION 0x12c8 +#define NVC997_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVC997_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVC997_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVC997_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVC997_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC997_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC997_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVC997_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVC997_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVC997_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVC997_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVC997_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVC997_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVC997_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVC997_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVC997_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVC997_SET_DEPTH_TEST 0x12cc +#define NVC997_SET_DEPTH_TEST_ENABLE 0:0 +#define NVC997_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVC997_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_FILL_MODE 0x12d0 +#define NVC997_SET_FILL_MODE_V 31:0 +#define NVC997_SET_FILL_MODE_V_POINT 0x00000001 +#define NVC997_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVC997_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVC997_SET_SHADE_MODE 0x12d4 +#define NVC997_SET_SHADE_MODE_V 31:0 +#define NVC997_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVC997_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVC997_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVC997_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVC997_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVC997_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVC997_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVC997_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVC997_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVC997_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVC997_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVC997_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVC997_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVC997_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_DEPTH_WRITE 0x12e8 +#define NVC997_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVC997_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_ALPHA_TEST 0x12ec +#define NVC997_SET_ALPHA_TEST_ENABLE 0:0 +#define NVC997_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVC997_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVC997_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVC997_DRAW_INLINE_INDEX4X8 0x1304 +#define NVC997_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVC997_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVC997_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVC997_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVC997_D3D_SET_CULL_MODE 0x1308 +#define NVC997_D3D_SET_CULL_MODE_V 31:0 +#define NVC997_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVC997_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVC997_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVC997_SET_DEPTH_FUNC 0x130c +#define NVC997_SET_DEPTH_FUNC_V 31:0 +#define NVC997_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVC997_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVC997_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC997_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC997_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVC997_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC997_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC997_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC997_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVC997_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVC997_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC997_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC997_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVC997_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC997_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC997_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC997_SET_ALPHA_REF 0x1310 +#define NVC997_SET_ALPHA_REF_V 31:0 + +#define NVC997_SET_ALPHA_FUNC 0x1314 +#define NVC997_SET_ALPHA_FUNC_V 31:0 +#define NVC997_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVC997_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVC997_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC997_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC997_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVC997_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC997_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC997_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC997_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVC997_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVC997_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC997_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC997_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVC997_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC997_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC997_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC997_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVC997_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVC997_SET_BLEND_CONST_RED 0x131c +#define NVC997_SET_BLEND_CONST_RED_V 31:0 + +#define NVC997_SET_BLEND_CONST_GREEN 0x1320 +#define NVC997_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVC997_SET_BLEND_CONST_BLUE 0x1324 +#define NVC997_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVC997_SET_BLEND_CONST_ALPHA 0x1328 +#define NVC997_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVC997_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVC997_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVC997_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVC997_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVC997_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVC997_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVC997_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVC997_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC997_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC997_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_BLEND_COLOR_OP 0x1340 +#define NVC997_SET_BLEND_COLOR_OP_V 31:0 +#define NVC997_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC997_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC997_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC997_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC997_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC997_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC997_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC997_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC997_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC997_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC997_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC997_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC997_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC997_SET_BLEND_ALPHA_OP 0x134c +#define NVC997_SET_BLEND_ALPHA_OP_V 31:0 +#define NVC997_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC997_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC997_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC997_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC997_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC997_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC997_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC997_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC997_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC997_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC997_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC997_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVC997_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVC997_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVC997_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC997_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC997_SET_SINGLE_ROP_CONTROL 0x135c +#define NVC997_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVC997_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVC997_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_BLEND(i) (0x1360+(i)*4) +#define NVC997_SET_BLEND_ENABLE 0:0 +#define NVC997_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVC997_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_STENCIL_TEST 0x1380 +#define NVC997_SET_STENCIL_TEST_ENABLE 0:0 +#define NVC997_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC997_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_STENCIL_OP_FAIL 0x1384 +#define NVC997_SET_STENCIL_OP_FAIL_V 31:0 +#define NVC997_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC997_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC997_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC997_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC997_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC997_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC997_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC997_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC997_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC997_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC997_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC997_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC997_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC997_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC997_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC997_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC997_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVC997_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC997_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC997_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC997_SET_STENCIL_OP_ZPASS 0x138c +#define NVC997_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVC997_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC997_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC997_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC997_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC997_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC997_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC997_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC997_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC997_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC997_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC997_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC997_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC997_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC997_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC997_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC997_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC997_SET_STENCIL_FUNC 0x1390 +#define NVC997_SET_STENCIL_FUNC_V 31:0 +#define NVC997_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC997_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC997_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC997_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC997_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC997_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC997_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC997_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC997_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC997_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC997_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC997_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC997_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC997_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC997_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC997_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC997_SET_STENCIL_FUNC_REF 0x1394 +#define NVC997_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVC997_SET_STENCIL_FUNC_MASK 0x1398 +#define NVC997_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVC997_SET_STENCIL_MASK 0x139c +#define NVC997_SET_STENCIL_MASK_V 7:0 + +#define NVC997_SET_DRAW_AUTO_START 0x13a4 +#define NVC997_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVC997_SET_PS_SATURATE 0x13a8 +#define NVC997_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVC997_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVC997_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC997_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVC997_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVC997_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC997_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVC997_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVC997_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC997_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVC997_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVC997_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC997_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVC997_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVC997_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC997_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVC997_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVC997_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC997_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVC997_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVC997_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVC997_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVC997_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVC997_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVC997_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVC997_SET_WINDOW_ORIGIN 0x13ac +#define NVC997_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVC997_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVC997_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVC997_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVC997_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVC997_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVC997_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVC997_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC997_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVC997_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVC997_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVC997_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVC997_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVC997_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVC997_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVC997_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC997_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC997_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVC997_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVC997_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVC997_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVC997_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVC997_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVC997_SET_PS_WARP_WATERMARKS 0x1450 +#define NVC997_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVC997_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVC997_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVC997_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVC997_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVC997_STORE_ZCULL 0x1464 +#define NVC997_STORE_ZCULL_V 0:0 + +#define NVC997_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVC997_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVC997_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVC997_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVC997_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVC997_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVC997_LOAD_ZCULL 0x1500 +#define NVC997_LOAD_ZCULL_V 0:0 + +#define NVC997_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVC997_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVC997_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVC997_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVC997_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVC997_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVC997_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVC997_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVC997_SET_USER_CLIP_ENABLE 0x1510 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVC997_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVC997_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVC997_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVC997_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_POINT_SIZE 0x1518 +#define NVC997_SET_POINT_SIZE_V 31:0 + +#define NVC997_SET_ZCULL_STATS 0x151c +#define NVC997_SET_ZCULL_STATS_ENABLE 0:0 +#define NVC997_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_POINT_SPRITE 0x1520 +#define NVC997_SET_POINT_SPRITE_ENABLE 0:0 +#define NVC997_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_SHADER_EXCEPTIONS 0x1528 +#define NVC997_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVC997_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVC997_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVC997_CLEAR_REPORT_VALUE 0x1530 +#define NVC997_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVC997_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVC997_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVC997_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVC997_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVC997_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVC997_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC997_CLEAR_REPORT_VALUE_TYPE_SCG_CLOCKS 0x00000009 + +#define NVC997_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVC997_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVC997_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVC997_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVC997_SET_ZT_SELECT 0x1538 +#define NVC997_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVC997_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVC997_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVC997_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVC997_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVC997_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVC997_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVC997_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVC997_SET_RENDER_ENABLE_A 0x1550 +#define NVC997_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_RENDER_ENABLE_B 0x1554 +#define NVC997_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_RENDER_ENABLE_C 0x1558 +#define NVC997_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVC997_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVC997_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVC997_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVC997_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVC997_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVC997_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVC997_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVC997_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVC997_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVC997_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVC997_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVC997_SET_ANTI_ALIASED_LINE 0x1570 +#define NVC997_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVC997_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_TEX_HEADER_POOL_A 0x1574 +#define NVC997_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_TEX_HEADER_POOL_B 0x1578 +#define NVC997_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_TEX_HEADER_POOL_C 0x157c +#define NVC997_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVC997_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVC997_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVC997_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVC997_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVC997_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVC997_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVC997_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVC997_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVC997_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVC997_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVC997_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVC997_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVC997_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVC997_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVC997_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVC997_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVC997_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVC997_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVC997_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVC997_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVC997_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVC997_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVC997_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVC997_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVC997_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVC997_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVC997_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVC997_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVC997_SET_SRGB_WRITE 0x15b8 +#define NVC997_SET_SRGB_WRITE_ENABLE 0:0 +#define NVC997_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_DEPTH_BIAS 0x15bc +#define NVC997_SET_DEPTH_BIAS_V 31:0 + +#define NVC997_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVC997_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVC997_SET_RT_LAYER 0x15cc +#define NVC997_SET_RT_LAYER_V 15:0 +#define NVC997_SET_RT_LAYER_CONTROL 16:16 +#define NVC997_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVC997_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVC997_SET_ANTI_ALIAS 0x15d0 +#define NVC997_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVC997_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVC997_SET_EDGE_FLAG 0x15e4 +#define NVC997_SET_EDGE_FLAG_V 0:0 +#define NVC997_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVC997_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVC997_DRAW_INLINE_INDEX 0x15e8 +#define NVC997_DRAW_INLINE_INDEX_V 31:0 + +#define NVC997_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVC997_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVC997_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVC997_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVC997_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVC997_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVC997_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVC997_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVC997_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVC997_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVC997_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVC997_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVC997_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVC997_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVC997_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVC997_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVC997_SET_POINT_SPRITE_SELECT 0x1604 +#define NVC997_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVC997_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVC997_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVC997_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVC997_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVC997_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVC997_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVC997_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVC997_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVC997_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVC997_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVC997_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVC997_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVC997_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVC997_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVC997_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVC997_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVC997_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVC997_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVC997_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVC997_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVC997_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVC997_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVC997_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVC997_END 0x1614 +#define NVC997_END_V 0:0 + +#define NVC997_BEGIN 0x1618 +#define NVC997_BEGIN_OP 15:0 +#define NVC997_BEGIN_OP_POINTS 0x00000000 +#define NVC997_BEGIN_OP_LINES 0x00000001 +#define NVC997_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVC997_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVC997_BEGIN_OP_TRIANGLES 0x00000004 +#define NVC997_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVC997_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVC997_BEGIN_OP_QUADS 0x00000007 +#define NVC997_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVC997_BEGIN_OP_POLYGON 0x00000009 +#define NVC997_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVC997_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVC997_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_BEGIN_OP_PATCH 0x0000000E +#define NVC997_BEGIN_PRIMITIVE_ID 24:24 +#define NVC997_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVC997_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVC997_BEGIN_INSTANCE_ID 27:26 +#define NVC997_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVC997_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVC997_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVC997_BEGIN_SPLIT_MODE 30:29 +#define NVC997_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVC997_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVC997_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVC997_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVC997_BEGIN_INSTANCE_ITERATE_ENABLE 31:31 +#define NVC997_BEGIN_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVC997_BEGIN_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_VERTEX_ID_COPY 0x161c +#define NVC997_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVC997_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVC997_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVC997_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVC997_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVC997_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVC997_LOAD_PRIMITIVE_ID 0x1624 +#define NVC997_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVC997_SET_SHADER_BASED_CULL 0x162c +#define NVC997_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVC997_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVC997_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVC997_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVC997_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVC997_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_CLASS_VERSION 0x1638 +#define NVC997_SET_CLASS_VERSION_CURRENT 15:0 +#define NVC997_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC997_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVC997_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVC997_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVC997_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVC997_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVC997_SET_DA_OUTPUT 0x164c +#define NVC997_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVC997_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVC997_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVC997_SET_ANTI_ALIASED_POINT 0x1658 +#define NVC997_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVC997_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_POINT_CENTER_MODE 0x165c +#define NVC997_SET_POINT_CENTER_MODE_V 31:0 +#define NVC997_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVC997_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVC997_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVC997_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVC997_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVC997_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVC997_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVC997_SET_LINE_STIPPLE 0x166c +#define NVC997_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVC997_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVC997_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVC997_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVC997_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVC997_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVC997_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVC997_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVC997_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVC997_SET_PROVOKING_VERTEX 0x1684 +#define NVC997_SET_PROVOKING_VERTEX_V 0:0 +#define NVC997_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVC997_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVC997_SET_TWO_SIDED_LIGHT 0x1688 +#define NVC997_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVC997_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_POLYGON_STIPPLE 0x168c +#define NVC997_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVC997_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_SHADER_CONTROL 0x1690 +#define NVC997_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVC997_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVC997_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVC997_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVC997_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVC997_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVC997_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVC997_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVC997_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVC997_CHECK_CLASS_VERSION 0x16a0 +#define NVC997_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVC997_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC997_SET_SPH_VERSION 0x16a4 +#define NVC997_SET_SPH_VERSION_CURRENT 15:0 +#define NVC997_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC997_CHECK_SPH_VERSION 0x16a8 +#define NVC997_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVC997_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC997_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVC997_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVC997_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVC997_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVC997_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVC997_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVC997_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVC997_SET_SCG_GRAPHICS_PRIORITY 0x16bc +#define NVC997_SET_SCG_GRAPHICS_PRIORITY_PRIORITY 5:0 + +#define NVC997_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS(i) (0x16c0+(i)*4) +#define NVC997_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS_V 31:0 + +#define NVC997_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVC997_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVC997_SET_AAM_VERSION 0x1790 +#define NVC997_SET_AAM_VERSION_CURRENT 15:0 +#define NVC997_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC997_CHECK_AAM_VERSION 0x1794 +#define NVC997_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVC997_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVC997_SET_ZT_LAYER 0x179c +#define NVC997_SET_ZT_LAYER_OFFSET 15:0 + +#define NVC997_SET_INDEX_BUFFER_A 0x17c8 +#define NVC997_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVC997_SET_INDEX_BUFFER_B 0x17cc +#define NVC997_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVC997_SET_INDEX_BUFFER_E 0x17d8 +#define NVC997_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVC997_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVC997_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVC997_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVC997_SET_INDEX_BUFFER_F 0x17dc +#define NVC997_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVC997_DRAW_INDEX_BUFFER 0x17e0 +#define NVC997_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVC997_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVC997_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVC997_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVC997_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVC997_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVC997_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVC997_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVC997_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVC997_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVC997_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVC997_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVC997_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVC997_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVC997_OGL_SET_CULL 0x1918 +#define NVC997_OGL_SET_CULL_ENABLE 0:0 +#define NVC997_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVC997_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVC997_OGL_SET_FRONT_FACE 0x191c +#define NVC997_OGL_SET_FRONT_FACE_V 31:0 +#define NVC997_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVC997_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVC997_OGL_SET_CULL_FACE 0x1920 +#define NVC997_OGL_SET_CULL_FACE_V 31:0 +#define NVC997_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVC997_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVC997_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVC997_SET_VIEWPORT_PIXEL 0x1924 +#define NVC997_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVC997_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVC997_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVC997_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVC997_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVC997_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVC997_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE 17:16 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_USE_FIELD_MIN_Z_ZERO_MAX_Z_ONE 0x00000000 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MIN_Z_MAX_Z 0x00000001 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_ZERO_ONE 0x00000002 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MINUS_INF_PLUS_INF 0x00000003 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP 0x00000006 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVC997_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVC997_SET_USER_CLIP_OP 0x1940 +#define NVC997_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVC997_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVC997_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVC997_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVC997_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVC997_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVC997_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVC997_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVC997_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVC997_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVC997_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVC997_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVC997_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVC997_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVC997_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVC997_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVC997_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVC997_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVC997_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVC997_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVC997_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVC997_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVC997_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVC997_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVC997_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVC997_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVC997_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVC997_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVC997_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVC997_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVC997_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVC997_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVC997_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVC997_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVC997_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVC997_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVC997_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVC997_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVC997_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVC997_INVALIDATE_ZCULL 0x1958 +#define NVC997_INVALIDATE_ZCULL_V 31:0 +#define NVC997_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVC997_SET_ZCULL 0x1968 +#define NVC997_SET_ZCULL_Z_ENABLE 0:0 +#define NVC997_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVC997_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_ZCULL_BOUNDS 0x196c +#define NVC997_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVC997_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVC997_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVC997_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVC997_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVC997_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVC997_ZCULL_SYNC 0x1978 +#define NVC997_ZCULL_SYNC_V 31:0 + +#define NVC997_SET_CLIP_ID_TEST 0x197c +#define NVC997_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVC997_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVC997_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVC997_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVC997_SET_CLIP_ID 0x1984 +#define NVC997_SET_CLIP_ID_V 31:0 + +#define NVC997_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVC997_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVC997_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVC997_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVC997_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVC997_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVC997_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVC997_SET_LOGIC_OP 0x19c4 +#define NVC997_SET_LOGIC_OP_ENABLE 0:0 +#define NVC997_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVC997_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_LOGIC_OP_FUNC 0x19c8 +#define NVC997_SET_LOGIC_OP_FUNC_V 31:0 +#define NVC997_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVC997_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVC997_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVC997_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVC997_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVC997_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVC997_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVC997_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVC997_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVC997_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVC997_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVC997_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVC997_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVC997_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVC997_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVC997_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVC997_SET_Z_COMPRESSION 0x19cc +#define NVC997_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVC997_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC997_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC997_CLEAR_SURFACE 0x19d0 +#define NVC997_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVC997_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVC997_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVC997_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVC997_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVC997_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVC997_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVC997_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVC997_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVC997_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVC997_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVC997_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVC997_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVC997_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVC997_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVC997_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVC997_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVC997_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVC997_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVC997_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVC997_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVC997_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVC997_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVC997_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVC997_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVC997_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVC997_SET_CT_WRITE_R_ENABLE 0:0 +#define NVC997_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVC997_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVC997_SET_CT_WRITE_G_ENABLE 4:4 +#define NVC997_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVC997_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVC997_SET_CT_WRITE_B_ENABLE 8:8 +#define NVC997_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVC997_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVC997_SET_CT_WRITE_A_ENABLE 12:12 +#define NVC997_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVC997_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVC997_PIPE_NOP 0x1a2c +#define NVC997_PIPE_NOP_V 31:0 + +#define NVC997_SET_SPARE00 0x1a30 +#define NVC997_SET_SPARE00_V 31:0 + +#define NVC997_SET_SPARE01 0x1a34 +#define NVC997_SET_SPARE01_V 31:0 + +#define NVC997_SET_SPARE02 0x1a38 +#define NVC997_SET_SPARE02_V 31:0 + +#define NVC997_SET_SPARE03 0x1a3c +#define NVC997_SET_SPARE03_V 31:0 + +#define NVC997_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVC997_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVC997_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVC997_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVC997_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVC997_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVC997_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVC997_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVC997_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVC997_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVC997_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVC997_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVC997_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVC997_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVC997_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_SCG_CLOCKS 0x00000008 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_TIMESTAMP 0x00000014 +#define NVC997_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVC997_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVC997_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVC997_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVC997_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVC997_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVC997_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVC997_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVC997_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVC997_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVC997_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVC997_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVC997_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVC997_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVC997_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVC997_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVC997_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVC997_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVC997_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVC997_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVC997_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVC997_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVC997_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVC997_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVC997_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVC997_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVC997_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVC997_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVC997_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC997_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVC997_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVC997_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVC997_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVC997_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVC997_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVC997_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVC997_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVC997_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVC997_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVC997_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVC997_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVC997_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVC997_SET_PIPELINE_RESERVED_B(j) (0x2004+(j)*64) +#define NVC997_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVC997_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVC997_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVC997_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVC997_SET_PIPELINE_REGISTER_COUNT_V 8:0 + +#define NVC997_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVC997_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVC997_SET_PIPELINE_PROGRAM_ADDRESS_A(j) (0x2014+(j)*64) +#define NVC997_SET_PIPELINE_PROGRAM_ADDRESS_A_UPPER 7:0 + +#define NVC997_SET_PIPELINE_PROGRAM_ADDRESS_B(j) (0x2018+(j)*64) +#define NVC997_SET_PIPELINE_PROGRAM_ADDRESS_B_LOWER 31:0 + +#define NVC997_SET_PIPELINE_PROGRAM_PREFETCH(j) (0x201c+(j)*64) +#define NVC997_SET_PIPELINE_PROGRAM_PREFETCH_SIZE_IN_BLOCKS 6:0 + +#define NVC997_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVC997_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVC997_SET_FALCON00 0x2300 +#define NVC997_SET_FALCON00_V 31:0 + +#define NVC997_SET_FALCON01 0x2304 +#define NVC997_SET_FALCON01_V 31:0 + +#define NVC997_SET_FALCON02 0x2308 +#define NVC997_SET_FALCON02_V 31:0 + +#define NVC997_SET_FALCON03 0x230c +#define NVC997_SET_FALCON03_V 31:0 + +#define NVC997_SET_FALCON04 0x2310 +#define NVC997_SET_FALCON04_V 31:0 + +#define NVC997_SET_FALCON05 0x2314 +#define NVC997_SET_FALCON05_V 31:0 + +#define NVC997_SET_FALCON06 0x2318 +#define NVC997_SET_FALCON06_V 31:0 + +#define NVC997_SET_FALCON07 0x231c +#define NVC997_SET_FALCON07_V 31:0 + +#define NVC997_SET_FALCON08 0x2320 +#define NVC997_SET_FALCON08_V 31:0 + +#define NVC997_SET_FALCON09 0x2324 +#define NVC997_SET_FALCON09_V 31:0 + +#define NVC997_SET_FALCON10 0x2328 +#define NVC997_SET_FALCON10_V 31:0 + +#define NVC997_SET_FALCON11 0x232c +#define NVC997_SET_FALCON11_V 31:0 + +#define NVC997_SET_FALCON12 0x2330 +#define NVC997_SET_FALCON12_V 31:0 + +#define NVC997_SET_FALCON13 0x2334 +#define NVC997_SET_FALCON13_V 31:0 + +#define NVC997_SET_FALCON14 0x2338 +#define NVC997_SET_FALCON14_V 31:0 + +#define NVC997_SET_FALCON15 0x233c +#define NVC997_SET_FALCON15_V 31:0 + +#define NVC997_SET_FALCON16 0x2340 +#define NVC997_SET_FALCON16_V 31:0 + +#define NVC997_SET_FALCON17 0x2344 +#define NVC997_SET_FALCON17_V 31:0 + +#define NVC997_SET_FALCON18 0x2348 +#define NVC997_SET_FALCON18_V 31:0 + +#define NVC997_SET_FALCON19 0x234c +#define NVC997_SET_FALCON19_V 31:0 + +#define NVC997_SET_FALCON20 0x2350 +#define NVC997_SET_FALCON20_V 31:0 + +#define NVC997_SET_FALCON21 0x2354 +#define NVC997_SET_FALCON21_V 31:0 + +#define NVC997_SET_FALCON22 0x2358 +#define NVC997_SET_FALCON22_V 31:0 + +#define NVC997_SET_FALCON23 0x235c +#define NVC997_SET_FALCON23_V 31:0 + +#define NVC997_SET_FALCON24 0x2360 +#define NVC997_SET_FALCON24_V 31:0 + +#define NVC997_SET_FALCON25 0x2364 +#define NVC997_SET_FALCON25_V 31:0 + +#define NVC997_SET_FALCON26 0x2368 +#define NVC997_SET_FALCON26_V 31:0 + +#define NVC997_SET_FALCON27 0x236c +#define NVC997_SET_FALCON27_V 31:0 + +#define NVC997_SET_FALCON28 0x2370 +#define NVC997_SET_FALCON28_V 31:0 + +#define NVC997_SET_FALCON29 0x2374 +#define NVC997_SET_FALCON29_V 31:0 + +#define NVC997_SET_FALCON30 0x2378 +#define NVC997_SET_FALCON30_V 31:0 + +#define NVC997_SET_FALCON31 0x237c +#define NVC997_SET_FALCON31_V 31:0 + +#define NVC997_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVC997_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVC997_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVC997_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVC997_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVC997_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVC997_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVC997_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVC997_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVC997_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVC997_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVC997_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVC997_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVC997_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVC997_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVC997_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVC997_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVC997_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVC997_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVC997_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVC997_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVC997_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVC997_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVC997_SET_TRAP_HANDLER_A 0x25f8 +#define NVC997_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVC997_SET_TRAP_HANDLER_B 0x25fc +#define NVC997_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVC997_SET_COLOR_CLAMP 0x2600 +#define NVC997_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVC997_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVC997_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVC997_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVC997_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVC997_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVC997_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVC997_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVC997_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVC997_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVC997_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVC997_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC997_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVC997_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC997_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVC997_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVC997_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVC997_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC997_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVC997_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVC997_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVC997_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVC997_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVC997_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVC997_CALL_MME_MACRO_V 31:0 + +#define NVC997_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVC997_CALL_MME_DATA_V 31:0 + +#endif /* _cl_ada_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clc9b0.h b/userspace/sdks/nv570/inc/class/clc9b0.h new file mode 100644 index 0000000..604fe53 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc9b0.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc9b0_h_ +#define _clc9b0_h_ + +#define NVC9B0_VIDEO_DECODER (0x0000C9B0) + +#endif diff --git a/userspace/sdks/nv570/inc/class/clc9b5.h b/userspace/sdks/nv570/inc/class/clc9b5.h new file mode 100644 index 0000000..d9871f8 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc9b5.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_clc9b5_h__ +#define __gb100_clc9b5_h__ + +#define BLACKWELL_DMA_COPY_A (0x0000C9B5) + +#endif // __gb100_clc9b5_h__ diff --git a/userspace/sdks/nv570/inc/class/clc9b7.h b/userspace/sdks/nv570/inc/class/clc9b7.h new file mode 100644 index 0000000..6a0caef --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc9b7.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc9b7_h_ +#define _clc9b7_h_ + +#define NVC9B7_VIDEO_ENCODER (0x0000C9B7) + +#endif diff --git a/userspace/sdks/nv570/inc/class/clc9c0.h b/userspace/sdks/nv570/inc/class/clc9c0.h new file mode 100644 index 0000000..35da97f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc9c0.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clc9c0_h_ +#define _clc9c0_h_ + +#define ADA_COMPUTE_A 0xC9C0 + +#endif diff --git a/userspace/sdks/nv570/inc/class/clc9d1.h b/userspace/sdks/nv570/inc/class/clc9d1.h new file mode 100644 index 0000000..6849f96 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc9d1.h @@ -0,0 +1,31 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _clc9d1_h_ +#define _clc9d1_h_ + +#define NVC9D1_VIDEO_NVJPG (0x0000C9D1) + +#endif // _clc9d1_h diff --git a/userspace/sdks/nv570/inc/class/clc9fa.h b/userspace/sdks/nv570/inc/class/clc9fa.h new file mode 100644 index 0000000..6b4a20a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clc9fa.h @@ -0,0 +1,32 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _clc9fa_h_ +#define _clc9fa_h_ + +#define NVC9FA_VIDEO_OFA (0x0000C9FA) + +#endif // _clc9fa_h + diff --git a/userspace/sdks/nv570/inc/class/clca6f.h b/userspace/sdks/nv570/inc/class/clca6f.h new file mode 100644 index 0000000..a41c22e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clca6f.h @@ -0,0 +1,74 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb202_clca6f_h__ +#define __gb202_clca6f_h__ + +typedef volatile struct Nvca6fControl_struct { + NvU32 Ignored00[0x23]; /* 0000-008b*/ + NvU32 GPPut; /* GP FIFO put offset 008c-008f*/ + NvU32 Ignored01[0x5c]; +} Nvca6fControl, BlackwellBControlGPFifo; + +#define BLACKWELL_CHANNEL_GPFIFO_B (0x0000CA6F) + +#define NVCA6F_SET_OBJECT (0x00000000) +#define NVCA6F_SEM_ADDR_LO (0x0000005c) +#define NVCA6F_SEM_ADDR_LO_OFFSET 31:2 +#define NVCA6F_SEM_ADDR_HI (0x00000060) +#define NVCA6F_SEM_ADDR_HI_OFFSET 24:0 +#define NVCA6F_SEM_PAYLOAD_LO (0x00000064) +#define NVCA6F_SEM_PAYLOAD_HI (0x00000068) +#define NVCA6F_SEM_EXECUTE (0x0000006c) +#define NVCA6F_SEM_EXECUTE_OPERATION 2:0 +#define NVCA6F_SEM_EXECUTE_OPERATION_ACQUIRE 0x00000000 +#define NVCA6F_SEM_EXECUTE_OPERATION_RELEASE 0x00000001 +#define NVCA6F_SEM_EXECUTE_RELEASE_WFI 20:20 +#define NVCA6F_SEM_EXECUTE_RELEASE_WFI_DIS 0x00000000 +#define NVCA6F_SEM_EXECUTE_PAYLOAD_SIZE 24:24 +#define NVCA6F_SEM_EXECUTE_PAYLOAD_SIZE_32BIT 0x00000000 + +/* GPFIFO entry format */ +#define NVCA6F_GP_ENTRY__SIZE 8 +#define NVCA6F_GP_ENTRY0_FETCH 0:0 +#define NVCA6F_GP_ENTRY0_FETCH_UNCONDITIONAL 0x00000000 +#define NVCA6F_GP_ENTRY0_FETCH_CONDITIONAL 0x00000001 +#define NVCA6F_GP_ENTRY0_GET 31:2 +#define NVCA6F_GP_ENTRY0_OPERAND 31:0 +#define NVCA6F_GP_ENTRY0_PB_EXTENDED_BASE_OPERAND 24:8 +#define NVCA6F_GP_ENTRY1_GET_HI 7:0 +#define NVCA6F_GP_ENTRY1_LEVEL 9:9 +#define NVCA6F_GP_ENTRY1_LEVEL_MAIN 0x00000000 +#define NVCA6F_GP_ENTRY1_LEVEL_SUBROUTINE 0x00000001 +#define NVCA6F_GP_ENTRY1_LENGTH 30:10 +#define NVCA6F_GP_ENTRY1_SYNC 31:31 +#define NVCA6F_GP_ENTRY1_SYNC_PROCEED 0x00000000 +#define NVCA6F_GP_ENTRY1_SYNC_WAIT 0x00000001 +#define NVCA6F_GP_ENTRY1_OPCODE 7:0 +#define NVCA6F_GP_ENTRY1_OPCODE_NOP 0x00000000 +#define NVCA6F_GP_ENTRY1_OPCODE_ILLEGAL 0x00000001 +#define NVCA6F_GP_ENTRY1_OPCODE_GP_CRC 0x00000002 +#define NVCA6F_GP_ENTRY1_OPCODE_PB_CRC 0x00000003 +#define NVCA6F_GP_ENTRY1_OPCODE_SET_PB_SEGMENT_EXTENDED_BASE 0x00000004 + +#endif // __gb202_clca6f_h__ diff --git a/userspace/sdks/nv570/inc/class/clca6fsw.h b/userspace/sdks/nv570/inc/class/clca6fsw.h new file mode 100644 index 0000000..469f54a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clca6fsw.h @@ -0,0 +1,45 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + /* This file is *not* auto-generated. */ + +#ifndef _clca6f_sw_h_ +#define _clca6f_sw_h_ + +#define NVCA6F_NOTIFIERS_RC (0) +#define NVCA6F_NOTIFIERS_REFCNT (1) +#define NVCA6F_NOTIFIERS_NONSTALL (2) +#define NVCA6F_NOTIFIERS_EVENTBUFFER (3) +#define NVCA6F_NOTIFIERS_IDLECHANNEL (4) +#define NVCA6F_NOTIFIERS_ENDCTX (5) +#define NVCA6F_NOTIFIERS_SW (6) +#define NVCA6F_NOTIFIERS_GR_DEBUG_INTR (7) +#define NVCA6F_NOTIFIERS_REPLAYABLE_FAULT (8) +#define NVCA6F_NOTIFIERS_KEY_ROTATION (9) +#define NVCA6F_NOTIFIERS_MAXCOUNT (10) + +/* NvNotification[] fields and values */ +#define NVCA6F_NOTIFICATION_STATUS_ERROR_BAD_ARGUMENT (0x2000) +#define NVCA6F_NOTIFICATION_STATUS_ERROR_PROTECTION_FAULT (0x4000) + +#endif /* _clca6f_sw_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clca70.h b/userspace/sdks/nv570/inc/class/clca70.h new file mode 100644 index 0000000..647051d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clca70.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clca70.finn +// + +#define NVCA70_DISPLAY (0xca70U) /* finn: Evaluated from "NVCA70_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NVCA70_ALLOCATION_PARAMETERS_MESSAGE_ID (0xca70U) + +typedef struct NVCA70_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numDsis; // Number of DSIs in this chip/display +} NVCA70_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clca71.h b/userspace/sdks/nv570/inc/class/clca71.h new file mode 100644 index 0000000..80668b1 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clca71.h @@ -0,0 +1,186 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clca71_h_ +#define _clca71_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCA71_DISP_SF_USER (0x000CA71) + +typedef volatile struct _clca71_tag0 { + NvU32 dispSfUserOffset[0x400]; /* NV_PDISP_SF_USER 0x000D0FFF:0x000D0000 */ +} _NvCA71DispSfUser, NvCA71DispSfUserMap; + +#define NVCA71_SF_HDMI_INFO_CTRL(i,j) (0x000E0000-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVCA71_SF_HDMI_INFO_CTRL__SIZE_1 8 /* */ +#define NVCA71_SF_HDMI_INFO_CTRL__SIZE_2 3 /* */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x000E0000-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x000E0004-0x000E0000+(i)*1024) /* R--4A */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 8 /* */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R-IVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x000E0008-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 8 /* */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x000E000C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x000E0010-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x000E0014-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x000E0018-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW(i) (0x000E001C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVCA71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL(i,j) (0x000E0130-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL__SIZE_2 10 /* */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE 3:1 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ALWAYS 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ONCE 0x00000001 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ALWAYS 0x00000002 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ONCE 0x00000003 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_TRIGGER 0x00000004 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_LOC 5:4 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_LOC_VBLANK 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_LOC_VSYNC 0x00000001 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_LOC_LINE 0x00000002 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_OFFSET 10:6 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_SIZE 18:14 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_SIZE_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_BUSY 22:22 /* R-IVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_BUSY_NO 0x00000000 /* R-I-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_BUSY_YES 0x00000001 /* R---V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_SENT 23:23 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_SENT_NO 0x00000000 /* R-I-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_SENT_YES 0x00000001 /* R---V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CTRL_SENT_CLEAR 0x00000001 /* -W--C */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG(i,j) (0x000E0134-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG__SIZE_1 8 /* */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG__SIZE_2 10 /* */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_FID 7:0 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_FID_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID 23:8 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED 24:24 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_NO 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_YES 0x00000001 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN 25:25 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_NO 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_YES 0x00000001 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM 29:29 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_NO 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_YES 0x00000001 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_NEW 30:30 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_NEW_INIT 0x00000000 /* R-I-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_NEW_DONE 0x00000000 /* R---V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_NEW_PENDING 0x00000001 /* R---T */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_NEW_TRIGGER 0x00000001 /* -W--T */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL 31:31 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ACT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ARM 0x00000001 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_CTRL(i) (0x000E03F0-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_CTRL__SIZE_1 8 /* */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET 4:0 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA(i) (0x000E03F4-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA__SIZE_1 8 /* */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_BYTE0 7:0 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_BYTE0_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_BYTE1 15:8 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_BYTE1_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_BYTE2 23:16 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_BYTE2_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_BYTE3 31:24 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_DATA_BYTE3_INIT 0x00000000 /* RWI-V */ +#define NVCA71_SF_GENERIC_INFOFRAME_MISC_CTRL(i) (0x000E03F8-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCA71_SF_GENERIC_INFOFRAME_MISC_CTRL__SIZE_1 8 /* */ +#define NVCA71_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY 1:1 /* RWIVF */ +#define NVCA71_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_HIGH 0x00000000 /* RW--V */ +#define NVCA71_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_LOW 0x00000001 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _clca71_h_ diff --git a/userspace/sdks/nv570/inc/class/clca73.h b/userspace/sdks/nv570/inc/class/clca73.h new file mode 100644 index 0000000..d30e957 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clca73.h @@ -0,0 +1,915 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clca73_h_ +#define _clca73_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCA73_DISP_CAPABILITIES 0xCA73 + +typedef volatile struct _clca73_tag0 { + NvU32 dispCapabilities[0x400]; +} _NvCA73DispCapabilities,NvCA73DispCapabilities_Map ; + + +#define NVCA73_SYS_CAP 0x0 /* RW-4R */ +#define NVCA73_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVCA73_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVCA73_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVCA73_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVCA73_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVCA73_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVCA73_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVCA73_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVCA73_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCA73_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVCA73_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVCA73_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVCA73_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVCA73_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVCA73_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVCA73_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVCA73_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVCA73_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVCA73_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVCA73_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVCA73_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_RISCV0_EXISTS 16:16 /* RWIVF */ +#define NVCA73_SYS_CAP_RISCV0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_RISCV0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_DSI0_EXISTS 20:20 /* RWIVF */ +#define NVCA73_SYS_CAP_DSI0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_DSI0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_DSI1_EXISTS 21:21 /* RWIVF */ +#define NVCA73_SYS_CAP_DSI1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_DSI1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_DSI2_EXISTS 22:22 /* RWIVF */ +#define NVCA73_SYS_CAP_DSI2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_DSI2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_DSI3_EXISTS 23:23 /* RWIVF */ +#define NVCA73_SYS_CAP_DSI3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_DSI3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAP_DSI_EXISTS(i) (20+(i)):(20+(i)) /* RWIVF */ +#define NVCA73_SYS_CAP_DSI_EXISTS__SIZE_1 4 /* */ +#define NVCA73_SYS_CAP_DSI_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAP_DSI_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB 0x4 /* RW-4R */ +#define NVCA73_SYS_CAPB_WINDOW0_EXISTS 0:0 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW1_EXISTS 1:1 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW2_EXISTS 2:2 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW3_EXISTS 3:3 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW4_EXISTS 4:4 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW5_EXISTS 5:5 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW6_EXISTS 6:6 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW7_EXISTS 7:7 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW8_EXISTS 8:8 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW9_EXISTS 9:9 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW10_EXISTS 10:10 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW11_EXISTS 11:11 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW12_EXISTS 12:12 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW13_EXISTS 13:13 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW14_EXISTS 14:14 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW15_EXISTS 15:15 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW16_EXISTS 16:16 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW17_EXISTS 17:17 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW18_EXISTS 18:18 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW19_EXISTS 19:19 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW20_EXISTS 20:20 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW21_EXISTS 21:21 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW22_EXISTS 22:22 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW23_EXISTS 23:23 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW24_EXISTS 24:24 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW25_EXISTS 25:25 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW26_EXISTS 26:26 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW27_EXISTS 27:27 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW28_EXISTS 28:28 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW29_EXISTS 29:29 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW30_EXISTS 30:30 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW31_EXISTS 31:31 /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCA73_SYS_CAPB_WINDOW_EXISTS__SIZE_1 32 /* */ +#define NVCA73_SYS_CAPB_WINDOW_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPB_WINDOW_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC 0x20 /* RW-4R */ +#define NVCA73_SYS_CAPC_TILE0_EXISTS 0:0 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE1_EXISTS 1:1 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE2_EXISTS 2:2 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE3_EXISTS 3:3 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE4_EXISTS 4:4 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE5_EXISTS 5:5 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE6_EXISTS 6:6 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE7_EXISTS 7:7 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE_EXISTS__SIZE_1 8 /* */ +#define NVCA73_SYS_CAPC_TILE_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE0_SUPPORT_MULTI_TILE 8:8 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE0_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE0_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE1_SUPPORT_MULTI_TILE 9:9 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE1_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE1_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE2_SUPPORT_MULTI_TILE 10:10 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE2_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE2_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE3_SUPPORT_MULTI_TILE 11:11 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE3_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE3_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE4_SUPPORT_MULTI_TILE 12:12 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE4_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE4_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE5_SUPPORT_MULTI_TILE 13:13 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE5_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE5_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE6_SUPPORT_MULTI_TILE 14:14 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE6_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE6_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE7_SUPPORT_MULTI_TILE 15:15 /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE7_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE7_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVCA73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE__SIZE_1 8 /* */ +#define NVCA73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPC_MERGER_TILE_BUFFER_SIZE 31:16 /* RWIUF */ +#define NVCA73_SYS_CAPD 0x2c /* RW-4R */ +#define NVCA73_SYS_CAPD_NUM_TELLTALE_REGIONS 4:0 /* RWIUF */ +#define NVCA73_SYS_CAPD_NUM_FROZEN_FRAME_REGIONS 12:8 /* RWIUF */ +#define NVCA73_SYS_CAPD_NUM_ROI 20:16 /* RWIUF */ +#define NVCA73_SYS_CAPD_AE_SDP_EXISTS 30:30 /* RWIVF */ +#define NVCA73_SYS_CAPD_AE_SDP_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPD_AE_SDP_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPD_AMSS_EXISTS 31:31 /* RWIVF */ +#define NVCA73_SYS_CAPD_AMSS_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPD_AMSS_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE 0x34 /* RW-4R */ +#define NVCA73_SYS_CAPE_VIRWIN0_EXISTS 0:0 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN1_EXISTS 1:1 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN2_EXISTS 2:2 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN3_EXISTS 3:3 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN4_EXISTS 4:4 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN5_EXISTS 5:5 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN6_EXISTS 6:6 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN7_EXISTS 7:7 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN8_EXISTS 8:8 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN9_EXISTS 9:9 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN10_EXISTS 10:10 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN11_EXISTS 11:11 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN12_EXISTS 12:12 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN13_EXISTS 13:13 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN14_EXISTS 14:14 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN15_EXISTS 15:15 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN16_EXISTS 16:16 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN17_EXISTS 17:17 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN18_EXISTS 18:18 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN19_EXISTS 19:19 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN20_EXISTS 20:20 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN21_EXISTS 21:21 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN22_EXISTS 22:22 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN23_EXISTS 23:23 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN24_EXISTS 24:24 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN25_EXISTS 25:25 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN26_EXISTS 26:26 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN27_EXISTS 27:27 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN28_EXISTS 28:28 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN29_EXISTS 29:29 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN30_EXISTS 30:30 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN31_EXISTS 31:31 /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCA73_SYS_CAPE_VIRWIN_EXISTS__SIZE_1 32 /* */ +#define NVCA73_SYS_CAPE_VIRWIN_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_SYS_CAPE_VIRWIN_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_MISC_CAPA_NUM_VMS 17:13 /* RWIUF */ +#define NVCA73_LINK_CAP 0x30 /* RW-4R */ +#define NVCA73_LINK_CAP_PHYCTRL0_EXISTS 0:0 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL1_EXISTS 1:1 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL2_EXISTS 2:2 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL3_EXISTS 3:3 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL4_EXISTS 4:4 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL5_EXISTS 5:5 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL6_EXISTS 6:6 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL7_EXISTS 7:7 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL8_EXISTS 8:8 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL9_EXISTS 9:9 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL10_EXISTS 10:10 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL11_EXISTS 11:11 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL12_EXISTS 12:12 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL13_EXISTS 13:13 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL14_EXISTS 14:14 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL15_EXISTS 15:15 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL16_EXISTS 16:16 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL17_EXISTS 17:17 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL18_EXISTS 18:18 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL19_EXISTS 19:19 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL20_EXISTS 20:20 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL21_EXISTS 21:21 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL22_EXISTS 22:22 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL23_EXISTS 23:23 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL24_EXISTS 24:24 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL25_EXISTS 25:25 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL26_EXISTS 26:26 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL27_EXISTS 27:27 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL28_EXISTS 28:28 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL29_EXISTS 29:29 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL30_EXISTS 30:30 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL31_EXISTS 31:31 /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCA73_LINK_CAP_PHYCTRL_EXISTS__SIZE_1 32 /* */ +#define NVCA73_LINK_CAP_PHYCTRL_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCA73_LINK_CAP_PHYCTRL_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA 0x10 /* RW-4R */ +#define NVCA73_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES 15:0 /* RWIUF */ +#define NVCA73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH 17:16 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_32B 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_64B 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_128B 0x00000002 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_256B 0x00000003 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_ROTATION 18:18 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_ROTATION_FALSE 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_ROTATION_TRUE 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_PLANAR 19:19 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_PLANAR_FALSE 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_VGA 20:20 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_VGA_FALSE 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_VGA_TRUE 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION 21:21 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_TRUE 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MSCG 22:22 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MSCG_FALSE 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MSCG_TRUE 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH 23:23 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_FALSE 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_TRUE 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MSCG_LPS 26:26 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MSCG_LPS_FALSE 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_SUPPORT_MSCG_LPS_TRUE 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION 31:30 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_32B 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_64B 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_128B 0x00000002 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_256B 0x00000003 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC 0x18 /* RW-4R */ +#define NVCA73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE 1:0 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_32B 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_64B 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_128B 0x00000002 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_256B 0x00000003 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED 6:4 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_NONE 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_TWO 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_FOUR 0x00000002 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_EIGHT 0x00000003 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_SIXTEEN 0x00000004 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR 11:11 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_FALSE 0x00000000 /* RWI-V */ +#define NVCA73_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP 12:12 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_FALSE 0x00000000 /* RWI-V */ +#define NVCA73_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_TRUE 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_SUPPORT_MEMPOOL_YUV_COMPRESSION 13:13 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPC_SUPPORT_MEMPOOL_YUV_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPC_SUPPORT_MEMPOOL_YUV_COMPRESSION_TRUE 0x00000001 /* RWI-V */ +#define NVCA73_IHUB_COMMON_CAPE 0x24 /* RW-4R */ +#define NVCA73_IHUB_COMMON_CAPE_PHYWIN_BUFFER_SIZE 15:0 /* RWIUF */ +#define NVCA73_IHUB_COMMON_CAPF 0x28 /* RW-4R */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN0_SUPPORT_MULTI_TILE 0:0 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN0_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN0_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN1_SUPPORT_MULTI_TILE 1:1 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN1_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN1_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN2_SUPPORT_MULTI_TILE 2:2 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN2_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN2_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN3_SUPPORT_MULTI_TILE 3:3 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN3_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN3_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN4_SUPPORT_MULTI_TILE 4:4 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN4_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN4_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN5_SUPPORT_MULTI_TILE 5:5 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN5_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN5_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN6_SUPPORT_MULTI_TILE 6:6 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN6_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN6_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN7_SUPPORT_MULTI_TILE 7:7 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN7_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN7_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN8_SUPPORT_MULTI_TILE 8:8 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN8_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN8_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN9_SUPPORT_MULTI_TILE 9:9 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN9_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN9_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN10_SUPPORT_MULTI_TILE 10:10 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN10_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN10_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN11_SUPPORT_MULTI_TILE 11:11 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN11_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN11_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN12_SUPPORT_MULTI_TILE 12:12 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN12_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN12_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN13_SUPPORT_MULTI_TILE 13:13 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN13_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN13_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN14_SUPPORT_MULTI_TILE 14:14 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN14_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN14_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN15_SUPPORT_MULTI_TILE 15:15 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN15_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN15_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN16_SUPPORT_MULTI_TILE 16:16 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN16_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN16_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN17_SUPPORT_MULTI_TILE 17:17 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN17_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN17_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN18_SUPPORT_MULTI_TILE 18:18 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN18_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN18_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN19_SUPPORT_MULTI_TILE 19:19 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN19_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN19_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN20_SUPPORT_MULTI_TILE 20:20 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN20_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN20_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN21_SUPPORT_MULTI_TILE 21:21 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN21_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN21_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN22_SUPPORT_MULTI_TILE 22:22 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN22_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN22_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN23_SUPPORT_MULTI_TILE 23:23 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN23_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN23_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN24_SUPPORT_MULTI_TILE 24:24 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN24_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN24_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN25_SUPPORT_MULTI_TILE 25:25 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN25_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN25_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN26_SUPPORT_MULTI_TILE 26:26 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN26_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN26_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN27_SUPPORT_MULTI_TILE 27:27 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN27_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN27_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN28_SUPPORT_MULTI_TILE 28:28 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN28_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN28_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN29_SUPPORT_MULTI_TILE 29:29 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN29_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN29_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN30_SUPPORT_MULTI_TILE 30:30 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN30_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN30_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN31_SUPPORT_MULTI_TILE 31:31 /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN31_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN31_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE__SIZE_1 32 /* */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCA73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA(i) (0x680+(i)*32) /* RW-4A */ +#define NVCA73_POSTCOMP_HDR_CAPA__SIZE_1 8 /* */ +#define NVCA73_POSTCOMP_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_OCSC0_PRESENT 16:16 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_OCSC1_PRESENT 17:17 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_SCLR_PRESENT 18:18 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_HCLPF_PRESENT 19:19 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_DTH_PRESENT 20:20 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_DTH_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_DTH_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_OSCAN_PRESENT 21:21 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_DSC_PRESENT 22:22 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_DSC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_DSC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_VFILTER_PRESENT 23:23 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_LTM_PRESENT 25:25 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPA_LTM_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPA_LTM_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPB(i) (0x684+(i)*32) /* RW-4A */ +#define NVCA73_POSTCOMP_HDR_CAPB__SIZE_1 8 /* */ +#define NVCA73_POSTCOMP_HDR_CAPB_VGA 0:0 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPB_VGA_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPB_VGA_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPB_OLUT_SZ 12:1 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPB_OLUT_LOGNR 15:13 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD 17:17 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPB_OLUT_DIRECT 18:18 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPB_OLUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPB_OLUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC(i) (0x688+(i)*32) /* RW-4A */ +#define NVCA73_POSTCOMP_HDR_CAPC__SIZE_1 8 /* */ +#define NVCA73_POSTCOMP_HDR_CAPC_OCSC0_PRECISION 4:0 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC_OCSC1_PRECISION 12:8 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP 13:13 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_SF_PRECISION 20:16 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_CI_PRECISION 24:21 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB 25:25 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPD(i) (0x68c+(i)*32) /* RW-4A */ +#define NVCA73_POSTCOMP_HDR_CAPD__SIZE_1 8 /* */ +#define NVCA73_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPE(i) (0x690+(i)*32) /* RW-4A */ +#define NVCA73_POSTCOMP_HDR_CAPE__SIZE_1 8 /* */ +#define NVCA73_POSTCOMP_HDR_CAPE_DSC_MAXLINEWIDTH 15:0 /* RWIUF */ +#define NVCA73_POSTCOMP_HDR_CAPE_DSC_NATIVE422 16:16 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPE_DSC_NATIVE422_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_DSC_NATIVE422_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_DSC_NATIVE420 17:17 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPE_DSC_NATIVE420_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_DSC_NATIVE420_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_PRESENT 18:18 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE 21:19 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_9x9x9 0x00000000 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_17x17x17 0x00000001 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_25x25x25 0x00000002 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_33x33x33 0x00000003 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_4 0x00000004 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_5 0x00000005 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_6 0x00000006 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_7 0x00000007 /* RW--V */ +#define NVCA73_POSTCOMP_HDR_CAPE_3DLUT_NUM_CURVES 23:22 /* RWIUF */ +#define NVCA73_POSTCOMP_HDR_CAPF(i) (0x694+(i)*32) /* RW-4A */ +#define NVCA73_POSTCOMP_HDR_CAPF__SIZE_1 8 /* */ +#define NVCA73_POSTCOMP_HDR_CAPF_VFILTER_MAX_PIXELS 15:0 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPF_LTM_MAX_PIXELS 31:16 /* RWIVF */ +#define NVCA73_POSTCOMP_HDR_CAPG(i) (0x698+(i)*32) /* RW-4A */ +#define NVCA73_POSTCOMP_HDR_CAPG__SIZE_1 8 /* */ +#define NVCA73_POSTCOMP_HDR_CAPG_CMI_SZ 11:0 /* RWIUF */ +#define NVCA73_POSTCOMP_HDR_CAPG_CMI_LOGNR 14:12 /* RWIUF */ +#define NVCA73_POSTCOMP_HDR_CAPG_CMO_SZ 26:15 /* RWIUF */ +#define NVCA73_POSTCOMP_HDR_CAPG_CMO_LOGNR 29:27 /* RWIUF */ +#define NVCA73_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVCA73_SOR_CAP__SIZE_1 8 /* */ +#define NVCA73_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVCA73_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVCA73_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVCA73_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVCA73_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DP_DUAL_MODE 4:4 /* RWIVF */ +#define NVCA73_SOR_CAP_DP_DUAL_MODE_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DP_DUAL_MODE_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVCA73_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVCA73_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVCA73_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVCA73_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DP_TUNNELING_OVER_USB4 15:15 /* RWIVF */ +#define NVCA73_SOR_CAP_DP_TUNNELING_OVER_USB4_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DP_TUNNELING_OVER_USB4_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVCA73_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DP_DUAL_MST 23:23 /* RWIVF */ +#define NVCA73_SOR_CAP_DP_DUAL_MST_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DP_DUAL_MST_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVCA73_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVCA73_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVCA73_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVCA73_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_HDMI_FRL 28:28 /* RWIVF */ +#define NVCA73_SOR_CAP_HDMI_FRL_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_HDMI_FRL_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_HDMI_FRL_YUV422 29:29 /* RWIVF */ +#define NVCA73_SOR_CAP_HDMI_FRL_YUV422_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_HDMI_FRL_YUV422_TRUE 0x00000001 /* RW--V */ +#define NVCA73_SOR_CAP_DP_128B132B 30:30 /* RWIVF */ +#define NVCA73_SOR_CAP_DP_128B132B_FALSE 0x00000000 /* RW--V */ +#define NVCA73_SOR_CAP_DP_128B132B_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA(i) (0x780+(i)*32) /* RW-4A */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA__SIZE_1 32 /* */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH 13:10 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT 16:16 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT 17:17 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT 18:18 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT 19:19 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT 20:20 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT 21:21 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT 22:22 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT 23:23 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT 24:24 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB(i) (0x784+(i)*32) /* RW-4A */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB__SIZE_1 32 /* */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION 4:0 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ 9:6 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR 12:10 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD 14:14 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT 15:15 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC(i) (0x788+(i)*32) /* RW-4A */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC__SIZE_1 32 /* */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION 4:0 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_FVLUT 13:13 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_FVLUT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_FVLUT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT 15:15 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION 20:16 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD(i) (0x78c+(i)*32) /* RW-4A */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD__SIZE_1 32 /* */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ 3:0 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR 6:4 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD 8:8 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT 9:9 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION 16:12 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION 20:17 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB 21:21 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA 22:22 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE(i) (0x790+(i)*32) /* RW-4A */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE__SIZE_1 32 /* */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION 4:0 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_FVLUT 13:13 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_FVLUT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_FVLUT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT 15:15 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION 20:16 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPF(i) (0x794+(i)*32) /* RW-4A */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPF__SIZE_1 32 /* */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVCA73_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVCA73_SOR_CLK_CAP(i) (0x608+(i)*4) /* RW-4A */ +#define NVCA73_SOR_CLK_CAP__SIZE_1 8 /* */ +#define NVCA73_SOR_CLK_CAP_DP_MAX 7:0 /* RWIUF */ +#define NVCA73_SOR_CLK_CAP_TMDS_MAX 23:16 /* RWIUF */ +#define NVCA73_SOR_CLK_CAP_LVDS_MAX 31:24 /* RWIUF */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clca73_h_ diff --git a/userspace/sdks/nv570/inc/class/clca7a.h b/userspace/sdks/nv570/inc/class/clca7a.h new file mode 100644 index 0000000..8049aec --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clca7a.h @@ -0,0 +1,216 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clca7a__h_ +#define _clca7a__h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCA7A_CURSOR_IMM_CHANNEL_PIO (0x0000CA7A) + +typedef volatile struct _clca7a_tag0 { + NvV32 Reserved00[0x2]; + NvV32 Free; // 0x00000008 - 0x0000000B + NvV32 Reserved01[0x7D]; + NvV32 Update; // 0x00000200 - 0x00000203 + NvV32 SetInterlockFlags; // 0x00000204 - 0x00000207 + NvV32 SetCursorHotSpotPointOut[2]; // 0x00000208 - 0x0000020F + NvV32 SetWindowInterlockFlags; // 0x00000210 - 0x00000213 + NvV32 Reserved02[0x3F7B]; +} NVCA7ADispCursorImmControlPio; + +#define NVCA7A_FREE (0x00000008) +#define NVCA7A_FREE_COUNT 5:0 +#define NVCA7A_UPDATE (0x00000200) +#define NVCA7A_UPDATE_RELEASE_ELV 0:0 +#define NVCA7A_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCA7A_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCA7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCA7A_UPDATE_FORCE_FULLSCREEN 12:12 +#define NVCA7A_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCA7A_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCA7A_SET_INTERLOCK_FLAGS (0x00000204) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVCA7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVCA7A_SET_CURSOR_HOT_SPOT_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVCA7A_SET_CURSOR_HOT_SPOT_POINT_OUT_X 15:0 +#define NVCA7A_SET_CURSOR_HOT_SPOT_POINT_OUT_Y 31:16 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS (0x00000210) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVCA7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clca7a_h + diff --git a/userspace/sdks/nv570/inc/class/clca7b.h b/userspace/sdks/nv570/inc/class/clca7b.h new file mode 100644 index 0000000..44f4017 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clca7b.h @@ -0,0 +1,70 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clca7b_h_ +#define _clca7b_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCA7B_WINDOW_IMM_CHANNEL_DMA (0x0000CA7B) + +// dma opcode instructions +#define NVCA7B_DMA +#define NVCA7B_DMA_OPCODE 31:29 +#define NVCA7B_DMA_OPCODE_METHOD 0x00000000 +#define NVCA7B_DMA_OPCODE_JUMP 0x00000001 +#define NVCA7B_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVCA7B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVCA7B_DMA_METHOD_COUNT 27:18 +#define NVCA7B_DMA_METHOD_OFFSET 15:2 +#define NVCA7B_DMA_DATA 31:0 +#define NVCA7B_DMA_DATA_NOP 0x00000000 +#define NVCA7B_DMA_JUMP_OFFSET 15:2 +#define NVCA7B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVCA7B_PUT (0x00000000) +#define NVCA7B_PUT_PTR 13:0 +#define NVCA7B_GET (0x00000004) +#define NVCA7B_GET_PTR 13:0 +#define NVCA7B_UPDATE (0x00000200) +#define NVCA7B_UPDATE_RELEASE_ELV 0:0 +#define NVCA7B_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCA7B_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCA7B_UPDATE_INTERLOCK_WITH_WINDOW 1:1 +#define NVCA7B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVCA7B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVCA7B_UPDATE_FORCE_FULLSCREEN 4:4 +#define NVCA7B_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCA7B_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCA7B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVCA7B_SET_POINT_OUT_X 15:0 +#define NVCA7B_SET_POINT_OUT_Y 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clca7b_h diff --git a/userspace/sdks/nv570/inc/class/clca7d.h b/userspace/sdks/nv570/inc/class/clca7d.h new file mode 100644 index 0000000..b890f4c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clca7d.h @@ -0,0 +1,2007 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clca7d_h_ +#define _clca7d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCA7D_CORE_CHANNEL_DMA (0x0000CA7D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVCA7D_DMA +#define NVCA7D_DMA_OPCODE 31:29 +#define NVCA7D_DMA_OPCODE_METHOD 0x00000000 +#define NVCA7D_DMA_OPCODE_JUMP 0x00000001 +#define NVCA7D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVCA7D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVCA7D_DMA_METHOD_COUNT 27:18 +#define NVCA7D_DMA_METHOD_OFFSET 15:2 +#define NVCA7D_DMA_DATA 31:0 +#define NVCA7D_DMA_DATA_NOP 0x00000000 +#define NVCA7D_DMA_JUMP_OFFSET 15:2 +#define NVCA7D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + +// class methods +#define NVCA7D_PUT (0x00000000) +#define NVCA7D_PUT_PTR 13:0 +#define NVCA7D_GET (0x00000004) +#define NVCA7D_GET_PTR 13:0 +#define NVCA7D_UPDATE (0x00000200) +#define NVCA7D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVCA7D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVCA7D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVCA7D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVCA7D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVCA7D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVCA7D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVCA7D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVCA7D_UPDATE_RELEASE_ELV 0:0 +#define NVCA7D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCA7D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCA7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCA7D_UPDATE_FORCE_FULLSCREEN 28:28 +#define NVCA7D_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCA7D_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCA7D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVCA7D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVCA7D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVCA7D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCA7D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVCA7D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVCA7D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVCA7D_SET_CONTROL (0x00000210) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVCA7D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVCA7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVCA7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVCA7D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVCA7D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVCA7D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVCA7D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVCA7D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVCA7D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVCA7D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVCA7D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVCA7D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVCA7D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVCA7D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVCA7D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) +#define NVCA7D_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000260) +#define NVCA7D_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000264) +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVCA7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) + +#define NVCA7D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVCA7D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVCA7D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVCA7D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVCA7D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVCA7D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVCA7D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVCA7D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVCA7D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVCA7D_SOR_SET_CONTROL_PROTOCOL_HDMI_FRL (0x0000000C) +#define NVCA7D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVCA7D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVCA7D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVCA7D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCA7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVCA7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVCA7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVCA7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVCA7D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVCA7D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVCA7D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVCA7D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVCA7D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVCA7D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVCA7D_DSI_SET_CONTROL(a) (0x00000500 + (a)*0x00000020) +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK 7:0 +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVCA7D_DSI_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVCA7D_DSI_SET_CUSTOM_REASON(a) (0x00000504 + (a)*0x00000020) +#define NVCA7D_DSI_SET_CUSTOM_REASON_CODE 31:0 +#define NVCA7D_DSI_SET_SW_SPARE_A(a) (0x00000508 + (a)*0x00000020) +#define NVCA7D_DSI_SET_SW_SPARE_A_CODE 31:0 +#define NVCA7D_DSI_SET_SW_SPARE_B(a) (0x0000050C + (a)*0x00000020) +#define NVCA7D_DSI_SET_SW_SPARE_B_CODE 31:0 + +#define NVCA7D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVCA7D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVCA7D_WINDOW_SET_CONTROL_HIDE 8:8 +#define NVCA7D_WINDOW_SET_CONTROL_HIDE_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_CONTROL_HIDE_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_CONTROL_DISABLE_PHYSICAL_FLIPS 9:9 +#define NVCA7D_WINDOW_SET_CONTROL_DISABLE_PHYSICAL_FLIPS_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_CONTROL_DISABLE_PHYSICAL_FLIPS_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_CONTROL_ALLOW_SUPERFRAME 10:10 +#define NVCA7D_WINDOW_SET_CONTROL_ALLOW_SUPERFRAME_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_CONTROL_ALLOW_SUPERFRAME_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVCA7D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED 16:16 +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED 28:28 +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED 30:30 +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT 26:25 +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT_PITCH_BLOCKLINEAR (0x00000000) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT_PITCH (0x00000001) +#define NVCA7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT_BLOCKLINEAR (0x00000002) +#define NVCA7D_WINDOW_SET_PHYSICAL(a) (0x00001014 + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW 31:0 +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_NONE (0x00000000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW0 (0x00000001) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW1 (0x00000002) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW2 (0x00000004) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW3 (0x00000008) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW4 (0x00000010) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW5 (0x00000020) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW6 (0x00000040) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW7 (0x00000080) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW8 (0x00000100) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW9 (0x00000200) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW10 (0x00000400) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW11 (0x00000800) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW12 (0x00001000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW13 (0x00002000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW14 (0x00004000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW15 (0x00008000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW16 (0x00010000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW17 (0x00020000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW18 (0x00040000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW19 (0x00080000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW20 (0x00100000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW21 (0x00200000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW22 (0x00400000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW23 (0x00800000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW24 (0x01000000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW25 (0x02000000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW26 (0x04000000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW27 (0x08000000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW28 (0x10000000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW29 (0x20000000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW30 (0x40000000) +#define NVCA7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW31 (0x80000000) +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES(a) (0x00001024 + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_SIZE_OUT 0:0 +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_SIZE_OUT_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_SIZE_OUT_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONTROL 1:1 +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONTROL_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONTROL_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONSTANT_ALPHA 2:2 +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONSTANT_ALPHA_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONSTANT_ALPHA_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_FACTOR_SELECT 3:3 +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_FACTOR_SELECT_FALSE (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_FACTOR_SELECT_TRUE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_SIZE_OUT(a) (0x00001028 + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_GUEST_SIZE_OUT_WIDTH 15:0 +#define NVCA7D_WINDOW_SET_GUEST_SIZE_OUT_HEIGHT 31:16 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL(a) (0x0000102C + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONSTANT_ALPHA(a) (0x00001030 + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT(a) (0x00001034 + (a)*0x00000080) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCA7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) + +#define NVCA7D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVCA7D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVCA7D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVCA7D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVCA7D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVCA7D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVCA7D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_PROCAMP_CHROMA_DOWN_V 4:4 +#define NVCA7D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVCA7D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVCA7D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_444 (0x00000009) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444NP (0x0000000A) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN 31:26 +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN0 (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN1 (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN2 (0x00000002) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN3 (0x00000003) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN4 (0x00000004) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN5 (0x00000005) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN6 (0x00000006) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN7 (0x00000007) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN8 (0x00000008) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN9 (0x00000009) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN10 (0x0000000A) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN11 (0x0000000B) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN12 (0x0000000C) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN13 (0x0000000D) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN14 (0x0000000E) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN15 (0x0000000F) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN16 (0x00000010) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN17 (0x00000011) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN18 (0x00000012) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN19 (0x00000013) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN20 (0x00000014) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN21 (0x00000015) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN22 (0x00000016) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN23 (0x00000017) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN24 (0x00000018) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN25 (0x00000019) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN26 (0x0000001A) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN27 (0x0000001B) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN28 (0x0000001C) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN29 (0x0000001D) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN30 (0x0000001E) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN31 (0x0000001F) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_NONE (0x0000003F) +#define NVCA7D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVCA7D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVCA7D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_YUV420PACKER 3:3 +#define NVCA7D_HEAD_SET_CONTROL_YUV420PACKER_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_YUV420PACKER_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_MODE 11:10 +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_MODE_NO_LOCK (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN 8:4 +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCA7D_HEAD_SET_CONTROL_SINK_LOCKOUT_WINDOW 15:12 +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE 23:22 +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN 20:16 +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCA7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCA7D_HEAD_SET_CONTROL_SINK_STEREO_LOCK_MODE 30:30 +#define NVCA7D_HEAD_SET_CONTROL_SINK_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_SINK_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_STEREO_LOCK_MODE 31:31 +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_SOURCE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVCA7D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVCA7D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVCA7D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVCA7D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_MODE_ROUND (0x00000005) +#define NVCA7D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVCA7D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVCA7D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED 4:4 +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_LTM_ALLOWED 5:5 +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_LTM_ALLOWED_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_LTM_ALLOWED_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS 14:12 +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED 16:16 +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_HEAD_USAGE_BOUNDS_ELV_START 31:17 +#define NVCA7D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVCA7D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVCA7D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVCA7D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCA7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCA7D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVCA7D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVCA7D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVCA7D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVCA7D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVCA7D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_STALL_LOCK_UNSTALL_SYNC_ADVANCE 25:16 +#define NVCA7D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVCA7D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVCA7D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVCA7D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVCA7D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVCA7D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVCA7D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVCA7D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVCA7D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVCA7D_HEAD_SET_TILE_MASK(a) (0x00002060 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_TILE_MASK_TILE 7:0 +#define NVCA7D_HEAD_SET_TILE_MASK_TILE_NONE (0x00000000) +#define NVCA7D_HEAD_SET_TILE_MASK_TILE_TILE0 (0x00000001) +#define NVCA7D_HEAD_SET_TILE_MASK_TILE_TILE1 (0x00000002) +#define NVCA7D_HEAD_SET_TILE_MASK_TILE_TILE2 (0x00000004) +#define NVCA7D_HEAD_SET_TILE_MASK_TILE_TILE3 (0x00000008) +#define NVCA7D_HEAD_SET_TILE_MASK_TILE_TILE4 (0x00000010) +#define NVCA7D_HEAD_SET_TILE_MASK_TILE_TILE5 (0x00000020) +#define NVCA7D_HEAD_SET_TILE_MASK_TILE_TILE6 (0x00000040) +#define NVCA7D_HEAD_SET_TILE_MASK_TILE_TILE7 (0x00000080) +#define NVCA7D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RASTER_SIZE_WIDTH 15:0 +#define NVCA7D_HEAD_SET_RASTER_SIZE_HEIGHT 31:16 +#define NVCA7D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVCA7D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVCA7D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVCA7D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVCA7D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVCA7D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVCA7D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVCA7D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVCA7D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVCA7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVCA7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVCA7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVCA7D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVCA7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVCA7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVCA7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVCA7D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVCA7D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVCA7D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVCA7D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS 20:20 +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL(a) (0x000020A4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL_INTERPOLATE 1:1 +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL_MIRROR 2:2 +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CMI_LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CMI_FP_NORM_SCALE(a) (0x000020A8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CMI_FP_NORM_SCALE_FPNORM 31:0 +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL(a) (0x000020AC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL_INTERPOLATE 1:1 +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL_MIRROR 2:2 +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CMO_LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CM3D0CONTROL(a) (0x000020B8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CM3D0CONTROL_MODE 0:0 +#define NVCA7D_HEAD_SET_CM3D0CONTROL_MODE_GAMUT_MAPPING (0x00000000) +#define NVCA7D_HEAD_SET_CM3D0CONTROL_MODE_PANEL_CORR (0x00000001) +#define NVCA7D_HEAD_SET_CM3D0CONTROL_ROUND 1:1 +#define NVCA7D_HEAD_SET_CM3D0CONTROL_ROUND_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CM3D0CONTROL_ROUND_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CM3D0CONTROL_LAST_ENTRY_ADD1 2:2 +#define NVCA7D_HEAD_SET_CM3D0CONTROL_LAST_ENTRY_ADD1_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CM3D0CONTROL_LAST_ENTRY_ADD1_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CM3D0CONTROL_SIZE 3:3 +#define NVCA7D_HEAD_SET_CM3D0CONTROL_SIZE_SIZE_9X9X9 (0x00000000) +#define NVCA7D_HEAD_SET_CM3D0CONTROL_SIZE_SIZE_17X17X17 (0x00000001) +#define NVCA7D_HEAD_SET_CM3D0CONTROL_RANGE_SCALE 8:6 +#define NVCA7D_HEAD_SET_CM3D0CONTROL_CONTENT_OFFSET 22:9 +#define NVCA7D_HEAD_SET_CM3D1CONTROL(a) (0x000020BC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CM3D1CONTROL_MODE 0:0 +#define NVCA7D_HEAD_SET_CM3D1CONTROL_MODE_GAMUT_MAPPING (0x00000000) +#define NVCA7D_HEAD_SET_CM3D1CONTROL_MODE_PANEL_CORR (0x00000001) +#define NVCA7D_HEAD_SET_CM3D1CONTROL_ROUND 1:1 +#define NVCA7D_HEAD_SET_CM3D1CONTROL_ROUND_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CM3D1CONTROL_ROUND_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CM3D1CONTROL_LAST_ENTRY_ADD1 2:2 +#define NVCA7D_HEAD_SET_CM3D1CONTROL_LAST_ENTRY_ADD1_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CM3D1CONTROL_LAST_ENTRY_ADD1_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CM3D1CONTROL_SIZE 3:3 +#define NVCA7D_HEAD_SET_CM3D1CONTROL_SIZE_SIZE_9X9X9 (0x00000000) +#define NVCA7D_HEAD_SET_CM3D1CONTROL_SIZE_SIZE_17X17X17 (0x00000001) +#define NVCA7D_HEAD_SET_CM3D1CONTROL_RANGE_SCALE 8:6 +#define NVCA7D_HEAD_SET_CM3D1CONTROL_CONTENT_OFFSET 22:9 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI(a) (0x000020C0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_HERTZ 3:0 +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_MAX(a) (0x000020C4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_MAX_HERTZ 3:0 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE(a,b) (0x000020C8 + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW 15:10 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN0 (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN1 (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN2 (0x00000002) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN3 (0x00000003) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN4 (0x00000004) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN5 (0x00000005) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN6 (0x00000006) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN7 (0x00000007) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN8 (0x00000008) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN9 (0x00000009) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN10 (0x0000000A) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN11 (0x0000000B) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN12 (0x0000000C) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN13 (0x0000000D) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN14 (0x0000000E) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN15 (0x0000000F) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN16 (0x00000010) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN17 (0x00000011) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN18 (0x00000012) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN19 (0x00000013) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN20 (0x00000014) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN21 (0x00000015) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN22 (0x00000016) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN23 (0x00000017) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN24 (0x00000018) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN25 (0x00000019) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN26 (0x0000001A) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN27 (0x0000001B) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN28 (0x0000001C) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN29 (0x0000001D) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN30 (0x0000001E) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN31 (0x0000001F) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_NONE (0x0000003F) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_INDEX 1:1 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_ENABLE 0:0 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_OVERRIDE 2:2 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_OVERRIDE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_OVERRIDE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION 9:8 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_VBLANK (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_VSYNC (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_LINE (0x00000002) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID 30:16 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID_REVERSED 31:31 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB0OVERRIDE 4:4 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB0OVERRIDE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB0OVERRIDE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB1OVERRIDE 5:5 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB1OVERRIDE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB1OVERRIDE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB2OVERRIDE 6:6 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB2OVERRIDE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB2OVERRIDE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB3OVERRIDE 7:7 +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB3OVERRIDE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_OVERRIDE_HB3OVERRIDE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE(a,b) (0x000020D0 + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB0 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB1 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB2 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB3 31:24 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE(a,b) (0x00002110 + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE_ADDRESS_HI 31:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE(a,b) (0x00002130 + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ADDRESS_LO 31:4 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET 3:2 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE 0:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_CRC(a) (0x00002150 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_CRC_ADDRESS_HI 31:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC(a) (0x00002154 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ADDRESS_LO 31:4 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET 3:2 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_IOVA (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE 0:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT(a) (0x00002158 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT_ADDRESS_HI 31:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT(a) (0x0000215C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ADDRESS_LO 31:4 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET 3:2 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_IOVA (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE 0:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D0(a) (0x00002160 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D0_ADDRESS_HI 31:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0(a) (0x00002164 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ADDRESS_LO 31:4 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET 3:2 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_IOVA (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ENABLE 0:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D1(a) (0x00002168 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D1_ADDRESS_HI 31:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1(a) (0x0000216C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ADDRESS_LO 31:4 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET 3:2 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_IOVA (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ENABLE 0:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR(a,b) (0x00002170 + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR_ADDRESS_HI 31:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR(a,b) (0x00002178 + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ADDRESS_LO 31:4 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET 3:2 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_IOVA (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND 1:1 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_PITCH (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_BLOCKLINEAR (0x00000001) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE 0:0 +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 5:0 +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_0 (0x00000000) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_1 (0x00000001) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_2 (0x00000002) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_3 (0x00000003) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_4 (0x00000004) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_5 (0x00000005) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_6 (0x00000006) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_7 (0x00000007) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_8 (0x00000008) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_9 (0x00000009) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_10 (0x0000000A) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_11 (0x0000000B) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_12 (0x0000000C) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_13 (0x0000000D) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_14 (0x0000000E) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_15 (0x0000000F) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_16 (0x00000010) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_17 (0x00000011) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_18 (0x00000012) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_19 (0x00000013) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_20 (0x00000014) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_21 (0x00000015) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_22 (0x00000016) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_23 (0x00000017) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_24 (0x00000018) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_25 (0x00000019) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_26 (0x0000001A) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_27 (0x0000001B) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_28 (0x0000001C) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_29 (0x0000001D) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_30 (0x0000001E) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_31 (0x0000001F) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000020) +#define NVCA7D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVCA7D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVCA7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVCA7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVCA7D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVCA7D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVCA7D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVCA7D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVCA7D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVCA7D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVCA7D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DISPLAY_RATE_RUN_MODE 1:0 +#define NVCA7D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVCA7D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVCA7D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT_SELF_REFRESH (0x00000002) +#define NVCA7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVCA7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVCA7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL(a,b) (0x000021CC + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE 10:10 +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_ONE_TIME (0x00000000) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_CONTINUOUS (0x00000001) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RASTER_LINE 31:16 +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE(a,b) (0x000021EC + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_VALUE 31:0 +#define NVCA7D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE(a) (0x00002214 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVCA7D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVCA7D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVCA7D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 +#define NVCA7D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED(a) (0x00002220 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_ALPHA 7:0 +#define NVCA7D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_RED 31:16 +#define NVCA7D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE(a) (0x00002224 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_GREEN 15:0 +#define NVCA7D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_BLUE 31:16 +#define NVCA7D_HEAD_SET_CURSOR_COLOR_NORM_SCALE(a) (0x00002228 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CURSOR_COLOR_NORM_SCALE_VALUE 15:0 +#define NVCA7D_HEAD_SET_XOR_BLEND_FACTOR(a) (0x0000222C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_XOR_BLEND_FACTOR_LOG2PEAK_LUMINANCE 3:0 +#define NVCA7D_HEAD_SET_XOR_BLEND_FACTOR_S1 16:4 +#define NVCA7D_HEAD_SET_XOR_BLEND_FACTOR_S2 30:18 +#define NVCA7D_HEAD_SET_CLAMP_RANGE_GREEN(a) (0x00002238 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CLAMP_RANGE_GREEN_LOW 11:0 +#define NVCA7D_HEAD_SET_CLAMP_RANGE_GREEN_HIGH 27:16 +#define NVCA7D_HEAD_SET_CLAMP_RANGE_RED_BLUE(a) (0x0000223C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CLAMP_RANGE_RED_BLUE_LOW 11:0 +#define NVCA7D_HEAD_SET_CLAMP_RANGE_RED_BLUE_HIGH 27:16 +#define NVCA7D_HEAD_SET_OCSC0CONTROL(a) (0x00002240 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0CONTROL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_OCSC0CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_OCSC0CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C00(a) (0x00002244 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C00_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C01(a) (0x00002248 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C01_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C02(a) (0x0000224C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C02_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C03(a) (0x00002250 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C03_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C10(a) (0x00002254 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C10_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C11(a) (0x00002258 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C11_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C12(a) (0x0000225C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C12_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C13(a) (0x00002260 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C13_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C20(a) (0x00002264 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C20_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C21(a) (0x00002268 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C21_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C22(a) (0x0000226C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C22_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C23(a) (0x00002270 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC0COEFFICIENT_C23_VALUE 20:0 +#define NVCA7D_HEAD_SET_OLUT_CONTROL(a) (0x00002280 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_INTERPOLATE 0:0 +#define NVCA7D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_MIRROR 1:1 +#define NVCA7D_HEAD_SET_OLUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_MODE 3:2 +#define NVCA7D_HEAD_SET_OLUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_SIZE 18:8 +#define NVCA7D_HEAD_SET_OLUT_CONTROL_DIRECT_ROUND 4:4 +#define NVCA7D_HEAD_SET_OLUT_CONTROL_DIRECT_ROUND_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_DIRECT_ROUND_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_LEVEL 25:20 +#define NVCA7D_HEAD_SET_OLUT_CONTROL_SEGMENT_SIZE_BITS 5:5 +#define NVCA7D_HEAD_SET_OLUT_CONTROL_SEGMENT_SIZE_BITS_SIZE_3BITS (0x00000000) +#define NVCA7D_HEAD_SET_OLUT_CONTROL_SEGMENT_SIZE_BITS_SIZE_4BITS (0x00000001) +#define NVCA7D_HEAD_SET_OLUT_FP_NORM_SCALE(a) (0x00002284 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OLUT_FP_NORM_SCALE_VALUE 31:0 +#define NVCA7D_HEAD_SET_OCSC1CONTROL(a) (0x0000229C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1CONTROL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_OCSC1CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_OCSC1CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C00(a) (0x000022A0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C00_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C01(a) (0x000022A4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C01_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C02(a) (0x000022A8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C02_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C03(a) (0x000022AC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C03_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C10(a) (0x000022B0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C10_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C11(a) (0x000022B4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C11_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C12(a) (0x000022B8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C12_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C13(a) (0x000022BC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C13_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C20(a) (0x000022C0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C20_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C21(a) (0x000022C4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C21_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C22(a) (0x000022C8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C22_VALUE 20:0 +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C23(a) (0x000022CC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_OCSC1COEFFICIENT_C23_VALUE 20:0 +#define NVCA7D_HEAD_SET_HEAD_POSITION(a) (0x000022D0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_HEAD_POSITION_X 2:0 +#define NVCA7D_HEAD_SET_HEAD_POSITION_Y 6:4 +#define NVCA7D_HEAD_SET_DSC_CONTROL(a) (0x000022D4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_CONTROL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_DSC_CONTROL_ENABLE_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_DSC_CONTROL_ENABLE_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_DSC_CONTROL_AUTO_RESET 3:3 +#define NVCA7D_HEAD_SET_DSC_CONTROL_AUTO_RESET_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_DSC_CONTROL_AUTO_RESET_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION 4:4 +#define NVCA7D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET 5:5 +#define NVCA7D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_DSC_CONTROL_FLATNESS_DET_THRESH 15:6 +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL(a) (0x000022D8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION 2:1 +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VBLANK (0x00000000) +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VSYNC (0x00000001) +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_LINE (0x00000002) +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_SIZE 10:3 +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY 11:11 +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID 26:12 +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID_REVERSED 27:27 +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_DSC_PPS_HEAD(a) (0x000022DC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_HEAD_BYTE0 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_HEAD_BYTE1 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_HEAD_BYTE2 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_HEAD_BYTE3 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA0(a) (0x000022E0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MINOR 3:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MAJOR 7:4 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA0_PPS_IDENTIFIER 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA0_RESERVED 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA0_LINEBUF_DEPTH 27:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA0_BITS_PER_COMPONENT 31:28 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1(a) (0x000022E4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_HIGH 1:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1_VBR_ENABLE 2:2 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1_SIMPLE422 3:3 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1_CONVERT_RGB 4:4 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1_BLOCK_PRED_ENABLE 5:5 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1_RESERVED 7:6 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_LOW 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_HIGH 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_LOW 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA2(a) (0x000022E8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_HIGH 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_LOW 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_HIGH 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_LOW 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA3(a) (0x000022EC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_HIGH 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_LOW 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_HIGH 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_LOW 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA4(a) (0x000022F0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_HIGH 1:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA4_RESERVED 7:2 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_LOW 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_HIGH 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_LOW 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA5(a) (0x000022F4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA5_RESERVED0 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA5_INITIAL_SCALE_VALUE 13:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA5_RESERVED1 15:14 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_HIGH 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_LOW 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA6(a) (0x000022F8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_HIGH 3:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA6_RESERVED0 7:4 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_LOW 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA6_RESERVED1 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA6_FIRST_LINE_BPG_OFFSET 28:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA6_RESERVED2 31:29 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA7(a) (0x000022FC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_HIGH 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_LOW 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_HIGH 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_LOW 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA8(a) (0x00002300 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_HIGH 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_LOW 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_HIGH 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_LOW 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA9(a) (0x00002304 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MIN_QP 4:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA9_RESERVED0 7:5 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MAX_QP 12:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA9_RESERVED1 15:13 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_HIGH 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_LOW 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA10(a) (0x00002308 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA10_RC_EDGE_FACTOR 3:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA10_RESERVED0 7:4 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT0 12:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA10_RESERVED1 15:13 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT1 20:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA10_RESERVED2 23:21 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_LO 27:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_HI 31:28 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA11(a) (0x0000230C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH0 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH1 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH2 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH3 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA12(a) (0x00002310 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH4 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH5 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH6 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH7 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA13(a) (0x00002314 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH8 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH9 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH10 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH11 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA14(a) (0x00002318 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH12 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH13 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_HIGH0 18:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MIN_QP0 23:19 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_BPG_OFFSET0 29:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_LOW0 31:30 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA15(a) (0x0000231C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH1 2:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP1 7:3 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET1 13:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW1 15:14 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH2 18:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP2 23:19 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET2 29:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW2 31:30 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA16(a) (0x00002320 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH3 2:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP3 7:3 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET3 13:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW3 15:14 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH4 18:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP4 23:19 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET4 29:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW4 31:30 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA17(a) (0x00002324 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH5 2:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP5 7:3 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET5 13:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW5 15:14 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH6 18:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP6 23:19 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET6 29:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW6 31:30 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA18(a) (0x00002328 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH7 2:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP7 7:3 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET7 13:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW7 15:14 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH8 18:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP8 23:19 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET8 29:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW8 31:30 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA19(a) (0x0000232C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH9 2:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP9 7:3 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET9 13:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW9 15:14 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH10 18:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP10 23:19 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET10 29:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW10 31:30 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA20(a) (0x00002330 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH11 2:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP11 7:3 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET11 13:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW11 15:14 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH12 18:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP12 23:19 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET12 29:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW12 31:30 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA21(a) (0x00002334 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH13 2:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP13 7:3 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET13 13:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW13 15:14 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH14 18:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP14 23:19 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET14 29:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW14 31:30 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA22(a) (0x00002338 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA22_NATIVE422 0:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA22_NATIVE420 1:1 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA22_RESERVED0 7:2 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA22_SECOND_LINE_BPG_OFFSET 12:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA22_RESERVED1 15:13 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSET_HIGH 23:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSETLOW 31:24 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA23(a) (0x0000233C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_HIGH 7:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_LOW 15:8 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA23_RESERVED 31:16 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA24(a) (0x00002340 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA24_RESERVED 31:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA25(a) (0x00002344 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA25_RESERVED 31:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA26(a) (0x00002348 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA26_RESERVED 31:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA27(a) (0x0000234C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA27_RESERVED 31:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA28(a) (0x00002350 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA28_RESERVED 31:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA29(a) (0x00002354 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA29_RESERVED 31:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA30(a) (0x00002358 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA30_RESERVED 31:0 +#define NVCA7D_HEAD_SET_DSC_PPS_DATA31(a) (0x0000235C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DSC_PPS_DATA31_RESERVED 31:0 +#define NVCA7D_HEAD_SET_RASTER_HBLANK_DELAY(a) (0x00002364 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_START 15:0 +#define NVCA7D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_END 31:16 +#define NVCA7D_HEAD_SET_HDMI_DSC_HCACTIVE(a) (0x00002368 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_HDMI_DSC_HCACTIVE_BYTES 15:0 +#define NVCA7D_HEAD_SET_HDMI_DSC_HCACTIVE_TRI_BYTES 31:16 +#define NVCA7D_HEAD_SET_HDMI_DSC_HCBLANK(a) (0x0000236C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_HDMI_DSC_HCBLANK_WIDTH 15:0 +#define NVCA7D_HEAD_SW_RESERVED(a,b) (0x00002370 + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SW_RESERVED_VALUE 31:0 +#define NVCA7D_HEAD_SET_DP_CTRL(a) (0x0000237C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DP_CTRL_EFFECTIVE_BITS_PER_PIXEL_ADJ 9:0 +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI(a,b) (0x00002380 + (a)*0x00000800 + (b)*0x00000004) +#define NVCA7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVCA7D_HEAD_SET_HEAD_INFOFRAME(a) (0x000023A0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_HEAD_INFOFRAME_FID 7:0 +#define NVCA7D_HEAD_SET_HEAD_INFOFRAME_EN 16:16 +#define NVCA7D_HEAD_SET_HEAD_INFOFRAME_EN_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_HEAD_INFOFRAME_EN_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL(a) (0x000023A4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_MODE 1:0 +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_MODE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_MODE_EMP_VTEM_QMS (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_MODE_EMP_OTHERS (0x00000002) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY 12:12 +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY_ONCE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_LOCATION 5:4 +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_LOCATION_VBLANK (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_LOCATION_VSYNC (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_LOCATION_LINE (0x00000002) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID 30:16 +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID_REVERSED 31:31 +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL 14:14 +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL_ACTIVE (0x00000000) +#define NVCA7D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL_ARM (0x00000001) +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER(a) (0x000023A8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER_HB0 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER_HB1 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER_HB2 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_HEADER_HB3 31:24 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA0(a) (0x000023AC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_DATA0_DB0 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA0_DB1 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA0_DB2 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA0_DB3 31:24 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA1(a) (0x000023B0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_DATA1_DB4 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA1_DB5 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA1_DB6 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA1_DB7 31:24 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA2(a) (0x000023B4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_DATA2_DB8 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA2_DB9 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA2_DB10 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA2_DB11 31:24 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA3(a) (0x000023B8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_DATA3_DB12 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA3_DB13 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA3_DB14 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA3_DB15 31:24 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA4(a) (0x000023BC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_DATA4_DB16 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA4_DB17 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA4_DB18 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA4_DB19 31:24 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA5(a) (0x000023C0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_DATA5_DB20 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA5_DB21 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA5_DB22 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA5_DB23 31:24 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA6(a) (0x000023C4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_DATA6_DB24 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA6_DB25 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA6_DB26 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA6_DB27 31:24 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA7(a) (0x000023C8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_INFOFRAME_DATA7_DB28 7:0 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA7_DB29 15:8 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA7_DB30 23:16 +#define NVCA7D_HEAD_SET_INFOFRAME_DATA7_DB31 31:24 +#define NVCA7D_HEAD_SET_RASTER_SIZE_FRACTION(a) (0x000023CC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RASTER_SIZE_FRACTION_HEIGHT 15:0 +#define NVCA7D_HEAD_SET_LTM_CONTROL(a) (0x000023D0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_CONTROL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_LTM_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_MODE 1:1 +#define NVCA7D_HEAD_SET_LTM_CONTROL_MODE_TMO (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_MODE_LTM (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_TONE_SELECT 2:2 +#define NVCA7D_HEAD_SET_LTM_CONTROL_TONE_SELECT_INTENSITY (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_TONE_SELECT_CDB (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_SKIN_TONE_ENABLE 3:3 +#define NVCA7D_HEAD_SET_LTM_CONTROL_SKIN_TONE_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_SKIN_TONE_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_INTERPOLATE 4:4 +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT8 5:5 +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT8_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT8_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT10 6:6 +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT10_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT10_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT_ROUND 7:7 +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT_ROUND_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT_ROUND_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE 9:8 +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_MAX_RGB (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_LIN_I (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_PQI (0x00000002) +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_CDB (0x00000003) +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_RANGE 11:10 +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_10000 (0x00000000) +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_5000 (0x00000001) +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_2500 (0x00000002) +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_1250 (0x00000003) +#define NVCA7D_HEAD_SET_LTM_CONTROL_HIST_END_LINE 31:16 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C00(a) (0x000023D4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C00_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C01(a) (0x000023D8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C01_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C02(a) (0x000023DC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C02_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C03(a) (0x000023E0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C03_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C10(a) (0x000023E4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C10_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C11(a) (0x000023E8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C11_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C12(a) (0x000023EC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C12_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C13(a) (0x000023F0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C13_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C20(a) (0x000023F4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C20_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C21(a) (0x000023F8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C21_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C22(a) (0x000023FC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C22_VALUE 20:0 +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C23(a) (0x00002400 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_COEFF_C23_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C00(a) (0x00002404 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C00_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C01(a) (0x00002408 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C01_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C02(a) (0x0000240C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C02_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C03(a) (0x00002410 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C03_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C10(a) (0x00002414 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C10_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C11(a) (0x00002418 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C11_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C12(a) (0x0000241C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C12_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C13(a) (0x00002420 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C13_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C20(a) (0x00002424 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C20_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C21(a) (0x00002428 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C21_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C22(a) (0x0000242C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C22_VALUE 20:0 +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C23(a) (0x00002430 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_COEFF_C23_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_MAX_SELECTIVE_UPDATE(a) (0x00002434 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_MAX_SELECTIVE_UPDATE_SIZE 31:0 +#define NVCA7D_HEAD_SET_SELF_REFRESH_OVERRIDE(a) (0x00002438 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SELF_REFRESH_OVERRIDE_FRAME_RELEASE 0:0 +#define NVCA7D_HEAD_SET_SELF_REFRESH_OVERRIDE_FRAME_RELEASE_AUTOMATIC (0x00000000) +#define NVCA7D_HEAD_SET_SELF_REFRESH_OVERRIDE_FRAME_RELEASE_MANUAL (0x00000001) +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE(a) (0x0000243C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE_ENABLE 0:0 +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE_EARLY_REGION 1:1 +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE_EARLY_REGION_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE_EARLY_REGION_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_CURSOR_DIRTY(a) (0x00002440 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_CURSOR_DIRTY_STATE 0:0 +#define NVCA7D_HEAD_SET_CURSOR_DIRTY_STATE_FALSE (0x00000000) +#define NVCA7D_HEAD_SET_CURSOR_DIRTY_STATE_TRUE (0x00000001) +#define NVCA7D_HEAD_SET_DPM_CONTROL(a) (0x00002444 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_DPM_CONTROL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_DPM_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_DPM_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_DPM_CONTROL_ALPM 1:1 +#define NVCA7D_HEAD_SET_DPM_CONTROL_ALPM_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_DPM_CONTROL_ALPM_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_DPM_CONTROL_ALPM_TYPE 2:2 +#define NVCA7D_HEAD_SET_DPM_CONTROL_ALPM_TYPE_AUX_LESS (0x00000000) +#define NVCA7D_HEAD_SET_DPM_CONTROL_AS_SDP 3:3 +#define NVCA7D_HEAD_SET_DPM_CONTROL_AS_SDP_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_DPM_CONTROL_AS_SDP_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL(a) (0x00002448 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_ENABLE 0:0 +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_ENABLE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_ENABLE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_SELF_REFRESH 1:1 +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_SELF_REFRESH_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_SELF_REFRESH_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_MODE 3:2 +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_MODE_PSR1 (0x00000000) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_MODE_PANEL_REPLAY (0x00000002) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_CRC 4:4 +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_CRC_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_CRC_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_LOCATION 7:6 +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_LOCATION_VBLANK (0x00000000) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_LOCATION_VSYNC (0x00000001) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_LOCATION_LINE (0x00000002) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_LINE_ID 22:8 +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_CAPTURE_INDICATOR 23:23 +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_CAPTURE_INDICATOR_SAME (0x00000000) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_CAPTURE_INDICATOR_EARLY (0x00000001) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_IDLE_SDP 24:24 +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_IDLE_SDP_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_IDLE_SDP_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_OVERRIDE_SU_VSC 25:25 +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_OVERRIDE_SU_VSC_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_VSC_SDP_CTRL_OVERRIDE_SU_VSC_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_VSC_SDP_HEADER(a) (0x0000244C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_HEADER_HEADER_BYTE 31:0 +#define NVCA7D_HEAD_SET_VSC_SDP_DATA0(a) (0x00002450 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_DATA0_DATA_BYTE 31:0 +#define NVCA7D_HEAD_SET_VSC_SDP_DATA1(a) (0x00002454 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_DATA1_DATA_BYTE 31:0 +#define NVCA7D_HEAD_SET_VSC_SDP_DATA2(a) (0x00002458 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_DATA2_DATA_BYTE 31:0 +#define NVCA7D_HEAD_SET_VSC_SDP_DATA3(a) (0x0000245C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_DATA3_DATA_BYTE 31:0 +#define NVCA7D_HEAD_SET_VSC_SDP_DATA4(a) (0x00002460 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_DATA4_DATA_BYTE 31:0 +#define NVCA7D_HEAD_SET_VSC_SDP_DATA5(a) (0x00002464 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_DATA5_DATA_BYTE 31:0 +#define NVCA7D_HEAD_SET_VSC_SDP_DATA6(a) (0x00002468 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_DATA6_DATA_BYTE 31:0 +#define NVCA7D_HEAD_SET_VSC_SDP_DATA7(a) (0x0000246C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_VSC_SDP_DATA7_DATA_BYTE 31:0 +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL(a) (0x00002470 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_INPUT_MATRIX 0:0 +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_INPUT_MATRIX_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_INPUT_MATRIX_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_FVLUT 1:1 +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_FVLUT_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_FVLUT_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_INTERPOLATE 4:4 +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_MIRROR 5:5 +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_MIRROR_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_MIRROR_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE 7:6 +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE_CSCLUT_PQ (0x00000000) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE_CSCLUT_HLG (0x00000001) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_OUTPUT_MATRIX 2:2 +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_OUTPUT_MATRIX_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_OUTPUT_MATRIX_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_RGB2ITP_LUT_FP_NORM_SCALE(a) (0x00002474 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_RGB2ITP_LUT_FP_NORM_SCALE_VALUE 31:0 +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL(a) (0x00002478 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_INPUT_MATRIX 0:0 +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_INPUT_MATRIX_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_INPUT_MATRIX_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_FVLUT 1:1 +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_FVLUT_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_FVLUT_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_INTERPOLATE 4:4 +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_MIRROR 5:5 +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_MIRROR_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_MIRROR_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE 7:6 +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE_CSCLUT_PQ (0x00000000) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE_CSCLUT_HLG (0x00000001) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_OUTPUT_MATRIX 2:2 +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_OUTPUT_MATRIX_DISABLE (0x00000000) +#define NVCA7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_OUTPUT_MATRIX_ENABLE (0x00000001) +#define NVCA7D_HEAD_SET_ITP2RGB_LUT_FP_SCALE(a) (0x0000247C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_ITP2RGB_LUT_FP_SCALE_VALUE 15:0 +#define NVCA7D_HEAD_SET_BLANK_OUTPUT_COLOR(a) (0x00002484 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_BLANK_OUTPUT_COLOR_RED_CR 9:0 +#define NVCA7D_HEAD_SET_BLANK_OUTPUT_COLOR_GREEN_Y 19:10 +#define NVCA7D_HEAD_SET_BLANK_OUTPUT_COLOR_BLUE_CB 29:20 +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE_GRANULARITY(a) (0x0000249C + (a)*0x00000800) +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE_GRANULARITY_X 15:0 +#define NVCA7D_HEAD_SET_SELECTIVE_UPDATE_GRANULARITY_Y 31:16 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C00(a) (0x000024A0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C00_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C01(a) (0x000024A4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C01_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C02(a) (0x000024A8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C02_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C03(a) (0x000024AC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C03_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C10(a) (0x000024B0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C10_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C11(a) (0x000024B4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C11_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C12(a) (0x000024B8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C12_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C13(a) (0x000024BC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C13_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C20(a) (0x000024C0 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C20_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C21(a) (0x000024C4 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C21_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C22(a) (0x000024C8 + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C22_VALUE 20:0 +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C23(a) (0x000024CC + (a)*0x00000800) +#define NVCA7D_HEAD_SET_LTM_HIST_COEFF_C23_VALUE 20:0 + +#define NVCA7D_TILE_SET_TILE_SIZE(a) (0x00006000 + (a)*0x00000200) +#define NVCA7D_TILE_SET_TILE_SIZE_START 14:0 +#define NVCA7D_TILE_SET_TILE_SIZE_WIDTH 30:16 +#define NVCA7D_TILE_SET_CMI_LUT_SEGMENT_SIZE(a) (0x00006074 + (a)*0x00000200) +#define NVCA7D_TILE_SET_CMI_LUT_SEGMENT_SIZE_IDX 5:0 +#define NVCA7D_TILE_SET_CMI_LUT_SEGMENT_SIZE_VALUE 8:6 +#define NVCA7D_TILE_SET_CMI_LUT_ENTRY(a) (0x00006078 + (a)*0x00000200) +#define NVCA7D_TILE_SET_CMI_LUT_ENTRY_IDX 10:0 +#define NVCA7D_TILE_SET_CMI_LUT_ENTRY_VALUE 24:11 +#define NVCA7D_TILE_SET_CMI_LUT_ENTRY_LAST 25:25 +#define NVCA7D_TILE_SET_CMI_LUT_ENTRY_LAST_FALSE (0x00000000) +#define NVCA7D_TILE_SET_CMI_LUT_ENTRY_LAST_TRUE (0x00000001) +#define NVCA7D_TILE_SET_CMO_LUT_SEGMENT_SIZE(a) (0x0000607C + (a)*0x00000200) +#define NVCA7D_TILE_SET_CMO_LUT_SEGMENT_SIZE_IDX 5:0 +#define NVCA7D_TILE_SET_CMO_LUT_SEGMENT_SIZE_VALUE 8:6 +#define NVCA7D_TILE_SET_CMO_LUT_ENTRY(a) (0x00006080 + (a)*0x00000200) +#define NVCA7D_TILE_SET_CMO_LUT_ENTRY_IDX 10:0 +#define NVCA7D_TILE_SET_CMO_LUT_ENTRY_VALUE 26:11 +#define NVCA7D_TILE_SET_CMO_LUT_ENTRY_LAST 27:27 +#define NVCA7D_TILE_SET_CMO_LUT_ENTRY_LAST_FALSE (0x00000000) +#define NVCA7D_TILE_SET_CMO_LUT_ENTRY_LAST_TRUE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clca7d_h diff --git a/userspace/sdks/nv570/inc/class/clca7e.h b/userspace/sdks/nv570/inc/class/clca7e.h new file mode 100644 index 0000000..bd672e3 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clca7e.h @@ -0,0 +1,906 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clca7e_h_ +#define _clca7e_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCA7E_WINDOW_CHANNEL_DMA (0x0000CA7E) + +// dma opcode instructions +#define NVCA7E_DMA +#define NVCA7E_DMA_OPCODE 31:29 +#define NVCA7E_DMA_OPCODE_METHOD 0x00000000 +#define NVCA7E_DMA_OPCODE_JUMP 0x00000001 +#define NVCA7E_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVCA7E_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVCA7E_DMA_METHOD_COUNT 27:18 +#define NVCA7E_DMA_METHOD_OFFSET 15:2 +#define NVCA7E_DMA_DATA 31:0 +#define NVCA7E_DMA_DATA_NOP 0x00000000 +#define NVCA7E_DMA_JUMP_OFFSET 15:2 +#define NVCA7E_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVCA7E_PUT (0x00000000) +#define NVCA7E_PUT_PTR 13:0 +#define NVCA7E_GET (0x00000004) +#define NVCA7E_GET_PTR 13:0 +#define NVCA7E_UPDATE (0x00000200) +#define NVCA7E_UPDATE_RELEASE_ELV 0:0 +#define NVCA7E_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCA7E_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCA7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCA7E_UPDATE_INTERLOCK_WITH_WIN_IMM 12:12 +#define NVCA7E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000) +#define NVCA7E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001) +#define NVCA7E_UPDATE_FORCE_FULLSCREEN 16:16 +#define NVCA7E_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCA7E_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCA7E_SET_SEMAPHORE_ACQUIRE_HI (0x00000204) +#define NVCA7E_SET_SEMAPHORE_ACQUIRE_HI_VALUE 31:0 +#define NVCA7E_GET_LINE (0x00000208) +#define NVCA7E_GET_LINE_LINE 15:0 +#define NVCA7E_SET_SEMAPHORE_CONTROL (0x0000020C) +#define NVCA7E_SET_SEMAPHORE_CONTROL_SKIP_ACQ 11:11 +#define NVCA7E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_FALSE (0x00000000) +#define NVCA7E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_TRUE (0x00000001) +#define NVCA7E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVCA7E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVCA7E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVCA7E_SET_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVCA7E_SET_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVCA7E_SET_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVCA7E_SET_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVCA7E_SET_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVCA7E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVCA7E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCA7E_SET_SEMAPHORE_ACQUIRE (0x00000210) +#define NVCA7E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0 +#define NVCA7E_SET_SEMAPHORE_RELEASE (0x00000214) +#define NVCA7E_SET_SEMAPHORE_RELEASE_VALUE 31:0 +#define NVCA7E_SET_NOTIFIER_CONTROL (0x00000220) +#define NVCA7E_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVCA7E_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVCA7E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCA7E_SET_SIZE (0x00000224) +#define NVCA7E_SET_SIZE_WIDTH 15:0 +#define NVCA7E_SET_SIZE_HEIGHT 31:16 +#define NVCA7E_SET_STORAGE (0x00000228) +#define NVCA7E_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NVCA7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NVCA7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NVCA7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NVCA7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVCA7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVCA7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVCA7E_SET_PARAMS (0x0000022C) +#define NVCA7E_SET_PARAMS_FORMAT 7:0 +#define NVCA7E_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NVCA7E_SET_PARAMS_FORMAT_R4G4B4A4 (0x0000002F) +#define NVCA7E_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NVCA7E_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NVCA7E_SET_PARAMS_FORMAT_R5G5B5A1 (0x0000002E) +#define NVCA7E_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NVCA7E_SET_PARAMS_FORMAT_X8R8G8B8 (0x000000E6) +#define NVCA7E_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NVCA7E_SET_PARAMS_FORMAT_X8B8G8R8 (0x000000F9) +#define NVCA7E_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NVCA7E_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NVCA7E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NVCA7E_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NVCA7E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NVCA7E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422 (0x00000028) +#define NVCA7E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422 (0x00000029) +#define NVCA7E_SET_PARAMS_FORMAT_Y8___U8V8_N444 (0x00000035) +#define NVCA7E_SET_PARAMS_FORMAT_Y8___U8V8_N422 (0x00000036) +#define NVCA7E_SET_PARAMS_FORMAT_Y8___V8U8_N420 (0x00000038) +#define NVCA7E_SET_PARAMS_FORMAT_Y8___U8___V8_N444 (0x0000003A) +#define NVCA7E_SET_PARAMS_FORMAT_Y8___U8___V8_N420 (0x0000003B) +#define NVCA7E_SET_PARAMS_FORMAT_Y10___U10V10_N444 (0x00000055) +#define NVCA7E_SET_PARAMS_FORMAT_Y10___U10V10_N422 (0x00000056) +#define NVCA7E_SET_PARAMS_FORMAT_Y10___V10U10_N420 (0x00000058) +#define NVCA7E_SET_PARAMS_FORMAT_Y12___U12V12_N444 (0x00000075) +#define NVCA7E_SET_PARAMS_FORMAT_Y12___U12V12_N422 (0x00000076) +#define NVCA7E_SET_PARAMS_FORMAT_Y12___V12U12_N420 (0x00000078) +#define NVCA7E_SET_PARAMS_CLAMP_BEFORE_BLEND 18:18 +#define NVCA7E_SET_PARAMS_CLAMP_BEFORE_BLEND_DISABLE (0x00000000) +#define NVCA7E_SET_PARAMS_CLAMP_BEFORE_BLEND_ENABLE (0x00000001) +#define NVCA7E_SET_PARAMS_SWAP_UV 19:19 +#define NVCA7E_SET_PARAMS_SWAP_UV_DISABLE (0x00000000) +#define NVCA7E_SET_PARAMS_SWAP_UV_ENABLE (0x00000001) +#define NVCA7E_SET_PARAMS_FMT_ROUNDING_MODE 22:22 +#define NVCA7E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_TO_NEAREST (0x00000000) +#define NVCA7E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_DOWN (0x00000001) +#define NVCA7E_SET_PLANAR_STORAGE(b) (0x00000230 + (b)*0x00000004) +#define NVCA7E_SET_PLANAR_STORAGE_PITCH 12:0 +#define NVCA7E_SET_SEMAPHORE_RELEASE_HI (0x0000023C) +#define NVCA7E_SET_SEMAPHORE_RELEASE_HI_VALUE 31:0 +#define NVCA7E_SET_SURFACE_ADDRESS_HI_BEGUN_SEMAPHORE_ARRAY (0x00000240) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_BEGUN_SEMAPHORE_ARRAY_ADDRESS_HI 31:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY (0x00000244) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ADDRESS_LO 31:4 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET 3:2 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_IOVA (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ENABLE 0:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_FINISH_SEMAPHORE_ARRAY (0x00000248) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_FINISH_SEMAPHORE_ARRAY_ADDRESS_HI 31:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY (0x0000024C) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ADDRESS_LO 31:4 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET 3:2 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_IOVA (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ENABLE 0:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_POINT_IN(b) (0x00000290 + (b)*0x00000004) +#define NVCA7E_SET_POINT_IN_X 15:0 +#define NVCA7E_SET_POINT_IN_Y 31:16 +#define NVCA7E_SET_SIZE_IN (0x00000298) +#define NVCA7E_SET_SIZE_IN_WIDTH 15:0 +#define NVCA7E_SET_SIZE_IN_HEIGHT 31:16 +#define NVCA7E_SET_SIZE_OUT (0x000002A4) +#define NVCA7E_SET_SIZE_OUT_WIDTH 15:0 +#define NVCA7E_SET_SIZE_OUT_HEIGHT 31:16 +#define NVCA7E_SET_CONTROL_INPUT_SCALER (0x000002A8) +#define NVCA7E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVCA7E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVCA7E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVCA7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVCA7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVCA7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVCA7E_SET_CONTROL_INPUT_SCALER_VERTICAL_FORCE_ENABLE 8:8 +#define NVCA7E_SET_CONTROL_INPUT_SCALER_VERTICAL_FORCE_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_CONTROL_INPUT_SCALER_VERTICAL_FORCE_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_FORCE_ENABLE 9:9 +#define NVCA7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_FORCE_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_FORCE_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_INPUT_SCALER_COEFF_VALUE (0x000002AC) +#define NVCA7E_SET_INPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVCA7E_SET_INPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVCA7E_SET_COMPOSITION_CONTROL (0x000002EC) +#define NVCA7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVCA7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVCA7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVCA7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVCA7E_SET_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVCA7E_SET_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVCA7E_SET_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVCA7E_SET_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVCA7E_SET_COMPOSITION_CONSTANT_ALPHA (0x000002F0) +#define NVCA7E_SET_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVCA7E_SET_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT (0x000002F4) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCA7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCA7E_SET_KEY_ALPHA (0x000002F8) +#define NVCA7E_SET_KEY_ALPHA_MIN 15:0 +#define NVCA7E_SET_KEY_ALPHA_MAX 31:16 +#define NVCA7E_SET_KEY_RED_CR (0x000002FC) +#define NVCA7E_SET_KEY_RED_CR_MIN 15:0 +#define NVCA7E_SET_KEY_RED_CR_MAX 31:16 +#define NVCA7E_SET_KEY_GREEN_Y (0x00000300) +#define NVCA7E_SET_KEY_GREEN_Y_MIN 15:0 +#define NVCA7E_SET_KEY_GREEN_Y_MAX 31:16 +#define NVCA7E_SET_KEY_BLUE_CB (0x00000304) +#define NVCA7E_SET_KEY_BLUE_CB_MIN 15:0 +#define NVCA7E_SET_KEY_BLUE_CB_MAX 31:16 +#define NVCA7E_SET_PRESENT_CONTROL (0x00000308) +#define NVCA7E_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NVCA7E_SET_PRESENT_CONTROL_BEGIN_MODE 6:4 +#define NVCA7E_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000) +#define NVCA7E_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001) +#define NVCA7E_SET_PRESENT_CONTROL_TIMESTAMP_MODE 8:8 +#define NVCA7E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_DISABLE (0x00000000) +#define NVCA7E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_ENABLE (0x00000001) +#define NVCA7E_SET_PRESENT_CONTROL_STEREO_MODE 13:12 +#define NVCA7E_SET_PRESENT_CONTROL_STEREO_MODE_MONO (0x00000000) +#define NVCA7E_SET_PRESENT_CONTROL_STEREO_MODE_PAIR_FLIP (0x00000001) +#define NVCA7E_SET_PRESENT_CONTROL_STEREO_MODE_AT_ANY_FRAME (0x00000002) +#define NVCA7E_SET_ACQ_SEMAPHORE_VALUE_HI (0x0000030C) +#define NVCA7E_SET_ACQ_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVCA7E_SET_ACQ_SEMAPHORE_CONTROL (0x00000330) +#define NVCA7E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVCA7E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVCA7E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVCA7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVCA7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVCA7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVCA7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVCA7E_SET_ACQ_SEMAPHORE_VALUE (0x00000334) +#define NVCA7E_SET_ACQ_SEMAPHORE_VALUE_VALUE 31:0 +#define NVCA7E_SET_SCAN_DIRECTION (0x0000033C) +#define NVCA7E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION 0:0 +#define NVCA7E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_LEFT (0x00000000) +#define NVCA7E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_RIGHT (0x00000001) +#define NVCA7E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION 1:1 +#define NVCA7E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_TOP (0x00000000) +#define NVCA7E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_BOTTOM (0x00000001) +#define NVCA7E_SET_SCAN_DIRECTION_COLUMN_ORDER 2:2 +#define NVCA7E_SET_SCAN_DIRECTION_COLUMN_ORDER_FALSE (0x00000000) +#define NVCA7E_SET_SCAN_DIRECTION_COLUMN_ORDER_TRUE (0x00000001) +#define NVCA7E_SET_TIMESTAMP_ORIGIN_LO (0x00000340) +#define NVCA7E_SET_TIMESTAMP_ORIGIN_LO_TIMESTAMP_LO 31:0 +#define NVCA7E_SET_TIMESTAMP_ORIGIN_HI (0x00000344) +#define NVCA7E_SET_TIMESTAMP_ORIGIN_HI_TIMESTAMP_HI 31:0 +#define NVCA7E_SET_UPDATE_TIMESTAMP_LO (0x00000348) +#define NVCA7E_SET_UPDATE_TIMESTAMP_LO_TIMESTAMP_LO 31:0 +#define NVCA7E_SET_UPDATE_TIMESTAMP_HI (0x0000034C) +#define NVCA7E_SET_UPDATE_TIMESTAMP_HI_TIMESTAMP_HI 31:0 +#define NVCA7E_SET_INTERLOCK_FLAGS (0x00000370) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 0:0 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+1):((i)+1) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 1:1 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 2:2 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 3:3 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 4:4 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 5:5 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 6:6 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 7:7 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 8:8 +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVCA7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS (0x00000374) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVCA7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVCA7E_SET_CHROMA_VER (0x00000378) +#define NVCA7E_SET_CHROMA_VER_POSITION 1:0 +#define NVCA7E_SET_CHROMA_VER_POSITION_TOP (0x00000000) +#define NVCA7E_SET_CHROMA_VER_POSITION_CENTER (0x00000001) +#define NVCA7E_SET_CHROMA_VER_POSITION_BOTTOM (0x00000002) +#define NVCA7E_SET_CHROMA_VER_USE_SWPOSITION 2:2 +#define NVCA7E_SET_CHROMA_VER_USE_SWPOSITION_FALSE (0x00000000) +#define NVCA7E_SET_CHROMA_VER_USE_SWPOSITION_TRUE (0x00000001) +#define NVCA7E_SET_CHROMA_VER_WEIGHT_ODD 4:3 +#define NVCA7E_SET_CHROMA_VER_WEIGHT_ODD_WT_0 (0x00000000) +#define NVCA7E_SET_CHROMA_VER_WEIGHT_ODD_WT_QUARTER (0x00000001) +#define NVCA7E_SET_CHROMA_VER_WEIGHT_ODD_WT_HALF (0x00000002) +#define NVCA7E_SET_CHROMA_VER_WEIGHT_ODD_WT_THREE_QUARTER (0x00000003) +#define NVCA7E_SET_CHROMA_VER_WEIGHT_EVEN 6:5 +#define NVCA7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_0 (0x00000000) +#define NVCA7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_QUARTER (0x00000001) +#define NVCA7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_HALF (0x00000002) +#define NVCA7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_THREE_QUARTER (0x00000003) +#define NVCA7E_SET_CHROMA_VER_USE_SWWEIGHTS 7:7 +#define NVCA7E_SET_CHROMA_VER_USE_SWWEIGHTS_FALSE (0x00000000) +#define NVCA7E_SET_CHROMA_VER_USE_SWWEIGHTS_TRUE (0x00000001) +#define NVCA7E_SET_CHROMA_HOR (0x0000037C) +#define NVCA7E_SET_CHROMA_HOR_REPLACE_ODD 0:0 +#define NVCA7E_SET_CHROMA_HOR_REPLACE_ODD_DISABLE (0x00000000) +#define NVCA7E_SET_CHROMA_HOR_REPLACE_ODD_ENABLE (0x00000001) +#define NVCA7E_SET_CHROMA_HOR_REPLACE_EVEN 1:1 +#define NVCA7E_SET_CHROMA_HOR_REPLACE_EVEN_DISABLE (0x00000000) +#define NVCA7E_SET_CHROMA_HOR_REPLACE_EVEN_ENABLE (0x00000001) +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_ODD 3:2 +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_0 (0x00000000) +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_QUARTER (0x00000001) +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_HALF (0x00000002) +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_THREE_QUARTER (0x00000003) +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_EVEN 5:4 +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_0 (0x00000000) +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_QUARTER (0x00000001) +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_HALF (0x00000002) +#define NVCA7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_THREE_QUARTER (0x00000003) +#define NVCA7E_SET_CHROMA_HOR_USE_SWWEIGHTS 6:6 +#define NVCA7E_SET_CHROMA_HOR_USE_SWWEIGHTS_FALSE (0x00000000) +#define NVCA7E_SET_CHROMA_HOR_USE_SWWEIGHTS_TRUE (0x00000001) +#define NVCA7E_SET_EXT_PACKET_CONTROL (0x00000398) +#define NVCA7E_SET_EXT_PACKET_CONTROL_ENABLE 0:0 +#define NVCA7E_SET_EXT_PACKET_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_EXT_PACKET_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_EXT_PACKET_CONTROL_LOCATION 4:4 +#define NVCA7E_SET_EXT_PACKET_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVCA7E_SET_EXT_PACKET_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVCA7E_SET_EXT_PACKET_CONTROL_FREQUENCY 8:8 +#define NVCA7E_SET_EXT_PACKET_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVCA7E_SET_EXT_PACKET_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVCA7E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE 12:12 +#define NVCA7E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_DISABLE (0x00000000) +#define NVCA7E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_ENABLE (0x00000001) +#define NVCA7E_SET_EXT_PACKET_CONTROL_SIZE 27:16 +#define NVCA7E_SET_EXT_PACKET_DATA (0x0000039C) +#define NVCA7E_SET_EXT_PACKET_DATA_DB0 7:0 +#define NVCA7E_SET_EXT_PACKET_DATA_DB1 15:8 +#define NVCA7E_SET_EXT_PACKET_DATA_DB2 23:16 +#define NVCA7E_SET_EXT_PACKET_DATA_DB3 31:24 +#define NVCA7E_SET_WIN_INFOFRAME (0x000003A0) +#define NVCA7E_SET_WIN_INFOFRAME_FID 7:0 +#define NVCA7E_SET_WIN_INFOFRAME_EN 16:16 +#define NVCA7E_SET_WIN_INFOFRAME_EN_DISABLE (0x00000000) +#define NVCA7E_SET_WIN_INFOFRAME_EN_ENABLE (0x00000001) +#define NVCA7E_SET_FMT_COEFFICIENT_C00 (0x00000400) +#define NVCA7E_SET_FMT_COEFFICIENT_C00_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C01 (0x00000404) +#define NVCA7E_SET_FMT_COEFFICIENT_C01_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C02 (0x00000408) +#define NVCA7E_SET_FMT_COEFFICIENT_C02_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C03 (0x0000040C) +#define NVCA7E_SET_FMT_COEFFICIENT_C03_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C10 (0x00000410) +#define NVCA7E_SET_FMT_COEFFICIENT_C10_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C11 (0x00000414) +#define NVCA7E_SET_FMT_COEFFICIENT_C11_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C12 (0x00000418) +#define NVCA7E_SET_FMT_COEFFICIENT_C12_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C13 (0x0000041C) +#define NVCA7E_SET_FMT_COEFFICIENT_C13_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C20 (0x00000420) +#define NVCA7E_SET_FMT_COEFFICIENT_C20_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C21 (0x00000424) +#define NVCA7E_SET_FMT_COEFFICIENT_C21_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C22 (0x00000428) +#define NVCA7E_SET_FMT_COEFFICIENT_C22_VALUE 20:0 +#define NVCA7E_SET_FMT_COEFFICIENT_C23 (0x0000042C) +#define NVCA7E_SET_FMT_COEFFICIENT_C23_VALUE 20:0 +#define NVCA7E_SET_ILUT_CONTROL (0x00000440) +#define NVCA7E_SET_ILUT_CONTROL_INTERPOLATE 0:0 +#define NVCA7E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7E_SET_ILUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7E_SET_ILUT_CONTROL_MIRROR 1:1 +#define NVCA7E_SET_ILUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCA7E_SET_ILUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCA7E_SET_ILUT_CONTROL_MODE 3:2 +#define NVCA7E_SET_ILUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVCA7E_SET_ILUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVCA7E_SET_ILUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVCA7E_SET_ILUT_CONTROL_SIZE 18:8 +#define NVCA7E_SET_CSC00CONTROL (0x0000045C) +#define NVCA7E_SET_CSC00CONTROL_ENABLE 0:0 +#define NVCA7E_SET_CSC00CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_CSC00CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_CSC00COEFFICIENT_C00 (0x00000460) +#define NVCA7E_SET_CSC00COEFFICIENT_C00_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C01 (0x00000464) +#define NVCA7E_SET_CSC00COEFFICIENT_C01_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C02 (0x00000468) +#define NVCA7E_SET_CSC00COEFFICIENT_C02_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C03 (0x0000046C) +#define NVCA7E_SET_CSC00COEFFICIENT_C03_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C10 (0x00000470) +#define NVCA7E_SET_CSC00COEFFICIENT_C10_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C11 (0x00000474) +#define NVCA7E_SET_CSC00COEFFICIENT_C11_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C12 (0x00000478) +#define NVCA7E_SET_CSC00COEFFICIENT_C12_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C13 (0x0000047C) +#define NVCA7E_SET_CSC00COEFFICIENT_C13_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C20 (0x00000480) +#define NVCA7E_SET_CSC00COEFFICIENT_C20_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C21 (0x00000484) +#define NVCA7E_SET_CSC00COEFFICIENT_C21_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C22 (0x00000488) +#define NVCA7E_SET_CSC00COEFFICIENT_C22_VALUE 20:0 +#define NVCA7E_SET_CSC00COEFFICIENT_C23 (0x0000048C) +#define NVCA7E_SET_CSC00COEFFICIENT_C23_VALUE 20:0 +#define NVCA7E_SET_CSC0LUT_FP_NORM_SCALE (0x00000490) +#define NVCA7E_SET_CSC0LUT_FP_NORM_SCALE_VALUE 31:0 +#define NVCA7E_SET_CSC0LUT_CONTROL (0x000004A0) +#define NVCA7E_SET_CSC0LUT_CONTROL_INTERPOLATE 0:0 +#define NVCA7E_SET_CSC0LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7E_SET_CSC0LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7E_SET_CSC0LUT_CONTROL_MIRROR 1:1 +#define NVCA7E_SET_CSC0LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCA7E_SET_CSC0LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCA7E_SET_CSC0LUT_CONTROL_ENABLE 4:4 +#define NVCA7E_SET_CSC0LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_CSC0LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_CSC0LUT_CONTROL_CURVE 6:5 +#define NVCA7E_SET_CSC0LUT_CONTROL_CURVE_CSCLUT_PQ (0x00000000) +#define NVCA7E_SET_CSC0LUT_CONTROL_CURVE_CSCLUT_HLG (0x00000001) +#define NVCA7E_SET_CSC0LUT_CONTROL_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCA7E_SET_CSC01CONTROL (0x000004BC) +#define NVCA7E_SET_CSC01CONTROL_ENABLE 0:0 +#define NVCA7E_SET_CSC01CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_CSC01CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_CSC01COEFFICIENT_C00 (0x000004C0) +#define NVCA7E_SET_CSC01COEFFICIENT_C00_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C01 (0x000004C4) +#define NVCA7E_SET_CSC01COEFFICIENT_C01_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C02 (0x000004C8) +#define NVCA7E_SET_CSC01COEFFICIENT_C02_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C03 (0x000004CC) +#define NVCA7E_SET_CSC01COEFFICIENT_C03_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C10 (0x000004D0) +#define NVCA7E_SET_CSC01COEFFICIENT_C10_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C11 (0x000004D4) +#define NVCA7E_SET_CSC01COEFFICIENT_C11_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C12 (0x000004D8) +#define NVCA7E_SET_CSC01COEFFICIENT_C12_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C13 (0x000004DC) +#define NVCA7E_SET_CSC01COEFFICIENT_C13_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C20 (0x000004E0) +#define NVCA7E_SET_CSC01COEFFICIENT_C20_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C21 (0x000004E4) +#define NVCA7E_SET_CSC01COEFFICIENT_C21_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C22 (0x000004E8) +#define NVCA7E_SET_CSC01COEFFICIENT_C22_VALUE 20:0 +#define NVCA7E_SET_CSC01COEFFICIENT_C23 (0x000004EC) +#define NVCA7E_SET_CSC01COEFFICIENT_C23_VALUE 20:0 +#define NVCA7E_SET_TMO_CONTROL (0x00000500) +#define NVCA7E_SET_TMO_CONTROL_INTERPOLATE 0:0 +#define NVCA7E_SET_TMO_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7E_SET_TMO_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7E_SET_TMO_CONTROL_SAT_MODE 3:2 +#define NVCA7E_SET_TMO_CONTROL_SIZE 18:8 +#define NVCA7E_SET_TMO_LOW_INTENSITY_ZONE (0x00000508) +#define NVCA7E_SET_TMO_LOW_INTENSITY_ZONE_END 29:16 +#define NVCA7E_SET_TMO_LOW_INTENSITY_VALUE (0x0000050C) +#define NVCA7E_SET_TMO_LOW_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVCA7E_SET_TMO_LOW_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVCA7E_SET_TMO_LOW_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVCA7E_SET_TMO_MEDIUM_INTENSITY_ZONE (0x00000510) +#define NVCA7E_SET_TMO_MEDIUM_INTENSITY_ZONE_START 13:0 +#define NVCA7E_SET_TMO_MEDIUM_INTENSITY_ZONE_END 29:16 +#define NVCA7E_SET_TMO_MEDIUM_INTENSITY_VALUE (0x00000514) +#define NVCA7E_SET_TMO_MEDIUM_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVCA7E_SET_TMO_MEDIUM_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVCA7E_SET_TMO_MEDIUM_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVCA7E_SET_TMO_HIGH_INTENSITY_ZONE (0x00000518) +#define NVCA7E_SET_TMO_HIGH_INTENSITY_ZONE_START 13:0 +#define NVCA7E_SET_TMO_HIGH_INTENSITY_VALUE (0x0000051C) +#define NVCA7E_SET_TMO_HIGH_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVCA7E_SET_TMO_HIGH_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVCA7E_SET_TMO_HIGH_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVCA7E_SET_CSC10CONTROL (0x0000053C) +#define NVCA7E_SET_CSC10CONTROL_ENABLE 0:0 +#define NVCA7E_SET_CSC10CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_CSC10CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_CSC10COEFFICIENT_C00 (0x00000540) +#define NVCA7E_SET_CSC10COEFFICIENT_C00_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C01 (0x00000544) +#define NVCA7E_SET_CSC10COEFFICIENT_C01_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C02 (0x00000548) +#define NVCA7E_SET_CSC10COEFFICIENT_C02_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C03 (0x0000054C) +#define NVCA7E_SET_CSC10COEFFICIENT_C03_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C10 (0x00000550) +#define NVCA7E_SET_CSC10COEFFICIENT_C10_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C11 (0x00000554) +#define NVCA7E_SET_CSC10COEFFICIENT_C11_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C12 (0x00000558) +#define NVCA7E_SET_CSC10COEFFICIENT_C12_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C13 (0x0000055C) +#define NVCA7E_SET_CSC10COEFFICIENT_C13_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C20 (0x00000560) +#define NVCA7E_SET_CSC10COEFFICIENT_C20_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C21 (0x00000564) +#define NVCA7E_SET_CSC10COEFFICIENT_C21_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C22 (0x00000568) +#define NVCA7E_SET_CSC10COEFFICIENT_C22_VALUE 20:0 +#define NVCA7E_SET_CSC10COEFFICIENT_C23 (0x0000056C) +#define NVCA7E_SET_CSC10COEFFICIENT_C23_VALUE 20:0 +#define NVCA7E_SET_CSC1LUT_FP_SCALE (0x00000570) +#define NVCA7E_SET_CSC1LUT_FP_SCALE_VALUE 15:0 +#define NVCA7E_SET_CSC1LUT_CONTROL (0x00000580) +#define NVCA7E_SET_CSC1LUT_CONTROL_INTERPOLATE 0:0 +#define NVCA7E_SET_CSC1LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCA7E_SET_CSC1LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCA7E_SET_CSC1LUT_CONTROL_MIRROR 1:1 +#define NVCA7E_SET_CSC1LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCA7E_SET_CSC1LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCA7E_SET_CSC1LUT_CONTROL_ENABLE 4:4 +#define NVCA7E_SET_CSC1LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_CSC1LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_CSC1LUT_CONTROL_CURVE 6:5 +#define NVCA7E_SET_CSC1LUT_CONTROL_CURVE_CSCLUT_PQ (0x00000000) +#define NVCA7E_SET_CSC1LUT_CONTROL_CURVE_CSCLUT_HLG (0x00000001) +#define NVCA7E_SET_CSC1LUT_CONTROL_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCA7E_SET_CSC11CONTROL (0x0000059C) +#define NVCA7E_SET_CSC11CONTROL_ENABLE 0:0 +#define NVCA7E_SET_CSC11CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_CSC11CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_CSC11CONTROL_LEVEL 7:2 +#define NVCA7E_SET_CSC11COEFFICIENT_C00 (0x000005A0) +#define NVCA7E_SET_CSC11COEFFICIENT_C00_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C01 (0x000005A4) +#define NVCA7E_SET_CSC11COEFFICIENT_C01_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C02 (0x000005A8) +#define NVCA7E_SET_CSC11COEFFICIENT_C02_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C03 (0x000005AC) +#define NVCA7E_SET_CSC11COEFFICIENT_C03_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C10 (0x000005B0) +#define NVCA7E_SET_CSC11COEFFICIENT_C10_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C11 (0x000005B4) +#define NVCA7E_SET_CSC11COEFFICIENT_C11_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C12 (0x000005B8) +#define NVCA7E_SET_CSC11COEFFICIENT_C12_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C13 (0x000005BC) +#define NVCA7E_SET_CSC11COEFFICIENT_C13_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C20 (0x000005C0) +#define NVCA7E_SET_CSC11COEFFICIENT_C20_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C21 (0x000005C4) +#define NVCA7E_SET_CSC11COEFFICIENT_C21_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C22 (0x000005C8) +#define NVCA7E_SET_CSC11COEFFICIENT_C22_VALUE 20:0 +#define NVCA7E_SET_CSC11COEFFICIENT_C23 (0x000005CC) +#define NVCA7E_SET_CSC11COEFFICIENT_C23_VALUE 20:0 +#define NVCA7E_SET_CLAMP_RANGE (0x000005D0) +#define NVCA7E_SET_CLAMP_RANGE_LOW 15:0 +#define NVCA7E_SET_CLAMP_RANGE_HIGH 31:16 +#define NVCA7E_SW_RESERVED(b) (0x000005D4 + (b)*0x00000004) +#define NVCA7E_SW_RESERVED_VALUE 31:0 +#define NVCA7E_SET_DIRTY_RECT_SIZE (0x000005E4) +#define NVCA7E_SET_DIRTY_RECT_SIZE_WIDTH 15:0 +#define NVCA7E_SET_DIRTY_RECT_SIZE_HEIGHT 31:16 +#define NVCA7E_SET_DIRTY_RECT_POSITION (0x000005E8) +#define NVCA7E_SET_DIRTY_RECT_POSITION_X 15:0 +#define NVCA7E_SET_DIRTY_RECT_POSITION_Y 31:16 +#define NVCA7E_SET_SUPERFRAME (0x000005EC) +#define NVCA7E_SET_SUPERFRAME_ENABLE 0:0 +#define NVCA7E_SET_SUPERFRAME_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_SUPERFRAME_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_SUPERFRAME_MODE 2:1 +#define NVCA7E_SET_SUPERFRAME_MODE_FIXED (0x00000000) +#define NVCA7E_SET_SUPERFRAME_MODE_DYNAMIC (0x00000001) +#define NVCA7E_SET_SUPERFRAME_MODE_SW (0x00000003) +#define NVCA7E_SET_SUPERFRAME_RATIO_IN 15:8 +#define NVCA7E_SET_SUPERFRAME_RATIO_OUT 23:16 +#define NVCA7E_SET_SUPERFRAME_START_COUNT 31:24 +#define NVCA7E_SET_INFOFRAME_CTRL(b) (0x000005F0 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_CTRL_ENABLE 0:0 +#define NVCA7E_SET_INFOFRAME_CTRL_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_INFOFRAME_CTRL_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_INFOFRAME_CTRL_LOCATION 5:4 +#define NVCA7E_SET_INFOFRAME_CTRL_LOCATION_VBLANK (0x00000000) +#define NVCA7E_SET_INFOFRAME_CTRL_LOCATION_VSYNC (0x00000001) +#define NVCA7E_SET_INFOFRAME_CTRL_LOCATION_LINE (0x00000002) +#define NVCA7E_SET_INFOFRAME_CTRL_LINE_ID 30:16 +#define NVCA7E_SET_INFOFRAME_CTRL_LINE_ID_REVERSED 31:31 +#define NVCA7E_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCA7E_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCA7E_SET_INFOFRAME_HEADER(b) (0x000005F8 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_HEADER_HB0 7:0 +#define NVCA7E_SET_INFOFRAME_HEADER_HB1 15:8 +#define NVCA7E_SET_INFOFRAME_HEADER_HB2 23:16 +#define NVCA7E_SET_INFOFRAME_HEADER_HB3 31:24 +#define NVCA7E_SET_INFOFRAME_DATA0(b) (0x00000600 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_DATA0_DB0 7:0 +#define NVCA7E_SET_INFOFRAME_DATA0_DB1 15:8 +#define NVCA7E_SET_INFOFRAME_DATA0_DB2 23:16 +#define NVCA7E_SET_INFOFRAME_DATA0_DB3 31:24 +#define NVCA7E_SET_INFOFRAME_DATA1(b) (0x00000608 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_DATA1_DB4 7:0 +#define NVCA7E_SET_INFOFRAME_DATA1_DB5 15:8 +#define NVCA7E_SET_INFOFRAME_DATA1_DB6 23:16 +#define NVCA7E_SET_INFOFRAME_DATA1_DB7 31:24 +#define NVCA7E_SET_INFOFRAME_DATA2(b) (0x00000610 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_DATA2_DB8 7:0 +#define NVCA7E_SET_INFOFRAME_DATA2_DB9 15:8 +#define NVCA7E_SET_INFOFRAME_DATA2_DB10 23:16 +#define NVCA7E_SET_INFOFRAME_DATA2_DB11 31:24 +#define NVCA7E_SET_INFOFRAME_DATA3(b) (0x00000618 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_DATA3_DB12 7:0 +#define NVCA7E_SET_INFOFRAME_DATA3_DB13 15:8 +#define NVCA7E_SET_INFOFRAME_DATA3_DB14 23:16 +#define NVCA7E_SET_INFOFRAME_DATA3_DB15 31:24 +#define NVCA7E_SET_INFOFRAME_DATA4(b) (0x00000620 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_DATA4_DB16 7:0 +#define NVCA7E_SET_INFOFRAME_DATA4_DB17 15:8 +#define NVCA7E_SET_INFOFRAME_DATA4_DB18 23:16 +#define NVCA7E_SET_INFOFRAME_DATA4_DB19 31:24 +#define NVCA7E_SET_INFOFRAME_DATA5(b) (0x00000628 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_DATA5_DB20 7:0 +#define NVCA7E_SET_INFOFRAME_DATA5_DB21 15:8 +#define NVCA7E_SET_INFOFRAME_DATA5_DB22 23:16 +#define NVCA7E_SET_INFOFRAME_DATA5_DB23 31:24 +#define NVCA7E_SET_INFOFRAME_DATA6(b) (0x00000630 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_DATA6_DB24 7:0 +#define NVCA7E_SET_INFOFRAME_DATA6_DB25 15:8 +#define NVCA7E_SET_INFOFRAME_DATA6_DB26 23:16 +#define NVCA7E_SET_INFOFRAME_DATA6_DB27 31:24 +#define NVCA7E_SET_INFOFRAME_DATA7(b) (0x00000638 + (b)*0x00000004) +#define NVCA7E_SET_INFOFRAME_DATA7_DB28 7:0 +#define NVCA7E_SET_INFOFRAME_DATA7_DB29 15:8 +#define NVCA7E_SET_INFOFRAME_DATA7_DB30 23:16 +#define NVCA7E_SET_INFOFRAME_DATA7_DB31 31:24 +#define NVCA7E_SET_SURFACE_ADDRESS_HI_SEMAPHORE (0x00000640) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_SEMAPHORE_ADDRESS_HI 31:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE (0x00000644) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ADDRESS_LO 31:4 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET 3:2 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE 0:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE (0x00000648) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE_ADDRESS_HI 31:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE (0x0000064C) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ADDRESS_LO 31:4 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET 3:2 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE 0:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000650) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000654) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_ISO(b) (0x00000658 + (b)*0x00000004) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_ISO_ADDRESS_HI 31:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO(b) (0x00000670 + (b)*0x00000004) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_ADDRESS_LO 31:4 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET 3:2 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_IOVA (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_KIND 1:1 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_KIND_PITCH (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_KIND_BLOCKLINEAR (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE 0:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_ILUT (0x00000688) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_ILUT_ADDRESS_HI 31:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT (0x0000068C) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT_ADDRESS_LO 31:4 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET 3:2 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_IOVA (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE 0:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_ENABLE (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_TMO_LUT (0x00000690) +#define NVCA7E_SET_SURFACE_ADDRESS_HI_TMO_LUT_ADDRESS_HI 31:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT (0x00000694) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ADDRESS_LO 31:4 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET 3:2 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_IOVA (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE 0:0 +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_DISABLE (0x00000000) +#define NVCA7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clca7e_h diff --git a/userspace/sdks/nv570/inc/class/clcab5.h b/userspace/sdks/nv570/inc/class/clcab5.h new file mode 100644 index 0000000..bd23835 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcab5.h @@ -0,0 +1,44 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcab5_h_ +#define _clcab5_h_ + +#define BLACKWELL_DMA_COPY_B (0x0000CAB5) + +#define NVCAB5_LAUNCH_DMA (0x00000300) +#define NVCAB5_LAUNCH_DMA_DATA_TRANSFER_TYPE 1:0 +#define NVCAB5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NONE (0x00000000) +#define NVCAB5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PIPELINED (0x00000001) +#define NVCAB5_LAUNCH_DMA_DATA_TRANSFER_TYPE_NON_PIPELINED (0x00000002) +#define NVCAB5_LAUNCH_DMA_DATA_TRANSFER_TYPE_PREFETCH (0x00000003) + +#define NVCAB5_REQ_ATTR (0x00000754) +#define NVCAB5_REQ_ATTR_PREFETCH_L2_CLASS 1:0 +#define NVCAB5_REQ_ATTR_PREFETCH_L2_CLASS_EVICT_FIRST (0x00000000) +#define NVCAB5_REQ_ATTR_PREFETCH_L2_CLASS_EVICT_NORMAL (0x00000001) +#define NVCAB5_REQ_ATTR_PREFETCH_L2_CLASS_EVICT_LAST (0x00000002) +#define NVCAB5_REQ_ATTR_PREFETCH_L2_CLASS_EVICT_DEMOTE (0x00000003) + +#endif /* _clcab5_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/clcb33.h b/userspace/sdks/nv570/inc/class/clcb33.h new file mode 100644 index 0000000..c0e1934 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb33.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clcb33.finn +// + +#define NV_CONFIDENTIAL_COMPUTE (0xcb33U) /* finn: Evaluated from "NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS_MESSAGE_ID" */ + +#define NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS_MESSAGE_ID (0xcb33U) + +typedef struct NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS { + NvHandle hClient; +} NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS; + diff --git a/userspace/sdks/nv570/inc/class/clcb70.h b/userspace/sdks/nv570/inc/class/clcb70.h new file mode 100644 index 0000000..86a14ea --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb70.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clcb70.finn +// + +#define NVCB70_DISPLAY (0xcb70U) /* finn: Evaluated from "NVCB70_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NVCB70_ALLOCATION_PARAMETERS_MESSAGE_ID (0xcb70U) + +typedef struct NVCB70_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numDsis; // Number of DSIs in this chip/display +} NVCB70_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clcb71.h b/userspace/sdks/nv570/inc/class/clcb71.h new file mode 100644 index 0000000..bdeda14 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb71.h @@ -0,0 +1,186 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcb71_h_ +#define _clcb71_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCB71_DISP_SF_USER (0x000CB71) + +typedef volatile struct _clcb71_tag0 { + NvU32 dispSfUserOffset[0x400]; /* NV_PDISP_SF_USER 0x000D0FFF:0x000D0000 */ +} _NvCB71DispSfUser, NvCB71DispSfUserMap; + +#define NVCB71_SF_HDMI_INFO_CTRL(i,j) (0x000E0000-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVCB71_SF_HDMI_INFO_CTRL__SIZE_1 8 /* */ +#define NVCB71_SF_HDMI_INFO_CTRL__SIZE_2 3 /* */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x000E0000-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x000E0004-0x000E0000+(i)*1024) /* R--4A */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 8 /* */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R-IVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x000E0008-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 8 /* */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x000E000C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x000E0010-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x000E0014-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x000E0018-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW(i) (0x000E001C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVCB71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL(i,j) (0x000E0130-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL__SIZE_2 10 /* */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE 3:1 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ALWAYS 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ONCE 0x00000001 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ALWAYS 0x00000002 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ONCE 0x00000003 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_TRIGGER 0x00000004 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_LOC 5:4 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_LOC_VBLANK 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_LOC_VSYNC 0x00000001 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_LOC_LINE 0x00000002 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_OFFSET 10:6 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_SIZE 18:14 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_SIZE_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_BUSY 22:22 /* R-IVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_BUSY_NO 0x00000000 /* R-I-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_BUSY_YES 0x00000001 /* R---V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_SENT 23:23 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_SENT_NO 0x00000000 /* R-I-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_SENT_YES 0x00000001 /* R---V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CTRL_SENT_CLEAR 0x00000001 /* -W--C */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG(i,j) (0x000E0134-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG__SIZE_1 8 /* */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG__SIZE_2 10 /* */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_FID 7:0 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_FID_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID 23:8 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED 24:24 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_NO 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_YES 0x00000001 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN 25:25 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_NO 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_YES 0x00000001 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM 29:29 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_NO 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_YES 0x00000001 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_NEW 30:30 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_NEW_INIT 0x00000000 /* R-I-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_NEW_DONE 0x00000000 /* R---V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_NEW_PENDING 0x00000001 /* R---T */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_NEW_TRIGGER 0x00000001 /* -W--T */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL 31:31 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ACT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ARM 0x00000001 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_CTRL(i) (0x000E03F0-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_CTRL__SIZE_1 8 /* */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET 4:0 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA(i) (0x000E03F4-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA__SIZE_1 8 /* */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_BYTE0 7:0 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_BYTE0_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_BYTE1 15:8 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_BYTE1_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_BYTE2 23:16 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_BYTE2_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_BYTE3 31:24 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_DATA_BYTE3_INIT 0x00000000 /* RWI-V */ +#define NVCB71_SF_GENERIC_INFOFRAME_MISC_CTRL(i) (0x000E03F8-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCB71_SF_GENERIC_INFOFRAME_MISC_CTRL__SIZE_1 8 /* */ +#define NVCB71_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY 1:1 /* RWIVF */ +#define NVCB71_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_HIGH 0x00000000 /* RW--V */ +#define NVCB71_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_LOW 0x00000001 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _clcb71_h_ diff --git a/userspace/sdks/nv570/inc/class/clcb73.h b/userspace/sdks/nv570/inc/class/clcb73.h new file mode 100644 index 0000000..f15d092 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb73.h @@ -0,0 +1,915 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcb73_h_ +#define _clcb73_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCB73_DISP_CAPABILITIES 0xCB73 + +typedef volatile struct _clcb73_tag0 { + NvU32 dispCapabilities[0x400]; +} _NvCB73DispCapabilities,NvCB73DispCapabilities_Map ; + + +#define NVCB73_SYS_CAP 0x0 /* RW-4R */ +#define NVCB73_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVCB73_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVCB73_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVCB73_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVCB73_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVCB73_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVCB73_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVCB73_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVCB73_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCB73_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVCB73_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVCB73_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVCB73_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVCB73_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVCB73_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVCB73_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVCB73_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVCB73_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVCB73_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVCB73_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVCB73_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_RISCV0_EXISTS 16:16 /* RWIVF */ +#define NVCB73_SYS_CAP_RISCV0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_RISCV0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_DSI0_EXISTS 20:20 /* RWIVF */ +#define NVCB73_SYS_CAP_DSI0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_DSI0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_DSI1_EXISTS 21:21 /* RWIVF */ +#define NVCB73_SYS_CAP_DSI1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_DSI1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_DSI2_EXISTS 22:22 /* RWIVF */ +#define NVCB73_SYS_CAP_DSI2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_DSI2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_DSI3_EXISTS 23:23 /* RWIVF */ +#define NVCB73_SYS_CAP_DSI3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_DSI3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAP_DSI_EXISTS(i) (20+(i)):(20+(i)) /* RWIVF */ +#define NVCB73_SYS_CAP_DSI_EXISTS__SIZE_1 4 /* */ +#define NVCB73_SYS_CAP_DSI_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAP_DSI_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB 0x4 /* RW-4R */ +#define NVCB73_SYS_CAPB_WINDOW0_EXISTS 0:0 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW1_EXISTS 1:1 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW2_EXISTS 2:2 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW3_EXISTS 3:3 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW4_EXISTS 4:4 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW5_EXISTS 5:5 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW6_EXISTS 6:6 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW7_EXISTS 7:7 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW8_EXISTS 8:8 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW9_EXISTS 9:9 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW10_EXISTS 10:10 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW11_EXISTS 11:11 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW12_EXISTS 12:12 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW13_EXISTS 13:13 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW14_EXISTS 14:14 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW15_EXISTS 15:15 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW16_EXISTS 16:16 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW17_EXISTS 17:17 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW18_EXISTS 18:18 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW19_EXISTS 19:19 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW20_EXISTS 20:20 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW21_EXISTS 21:21 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW22_EXISTS 22:22 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW23_EXISTS 23:23 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW24_EXISTS 24:24 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW25_EXISTS 25:25 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW26_EXISTS 26:26 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW27_EXISTS 27:27 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW28_EXISTS 28:28 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW29_EXISTS 29:29 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW30_EXISTS 30:30 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW31_EXISTS 31:31 /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCB73_SYS_CAPB_WINDOW_EXISTS__SIZE_1 32 /* */ +#define NVCB73_SYS_CAPB_WINDOW_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPB_WINDOW_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC 0x20 /* RW-4R */ +#define NVCB73_SYS_CAPC_TILE0_EXISTS 0:0 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE1_EXISTS 1:1 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE2_EXISTS 2:2 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE3_EXISTS 3:3 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE4_EXISTS 4:4 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE5_EXISTS 5:5 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE6_EXISTS 6:6 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE7_EXISTS 7:7 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE_EXISTS__SIZE_1 8 /* */ +#define NVCB73_SYS_CAPC_TILE_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE0_SUPPORT_MULTI_TILE 8:8 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE0_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE0_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE1_SUPPORT_MULTI_TILE 9:9 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE1_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE1_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE2_SUPPORT_MULTI_TILE 10:10 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE2_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE2_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE3_SUPPORT_MULTI_TILE 11:11 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE3_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE3_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE4_SUPPORT_MULTI_TILE 12:12 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE4_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE4_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE5_SUPPORT_MULTI_TILE 13:13 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE5_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE5_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE6_SUPPORT_MULTI_TILE 14:14 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE6_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE6_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE7_SUPPORT_MULTI_TILE 15:15 /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE7_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE7_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVCB73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE__SIZE_1 8 /* */ +#define NVCB73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPC_MERGER_TILE_BUFFER_SIZE 31:16 /* RWIUF */ +#define NVCB73_SYS_CAPD 0x2c /* RW-4R */ +#define NVCB73_SYS_CAPD_NUM_TELLTALE_REGIONS 4:0 /* RWIUF */ +#define NVCB73_SYS_CAPD_NUM_FROZEN_FRAME_REGIONS 12:8 /* RWIUF */ +#define NVCB73_SYS_CAPD_NUM_ROI 20:16 /* RWIUF */ +#define NVCB73_SYS_CAPD_AE_SDP_EXISTS 30:30 /* RWIVF */ +#define NVCB73_SYS_CAPD_AE_SDP_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPD_AE_SDP_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPD_AMSS_EXISTS 31:31 /* RWIVF */ +#define NVCB73_SYS_CAPD_AMSS_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPD_AMSS_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE 0x34 /* RW-4R */ +#define NVCB73_SYS_CAPE_VIRWIN0_EXISTS 0:0 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN1_EXISTS 1:1 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN2_EXISTS 2:2 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN3_EXISTS 3:3 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN4_EXISTS 4:4 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN5_EXISTS 5:5 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN6_EXISTS 6:6 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN7_EXISTS 7:7 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN8_EXISTS 8:8 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN9_EXISTS 9:9 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN10_EXISTS 10:10 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN11_EXISTS 11:11 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN12_EXISTS 12:12 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN13_EXISTS 13:13 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN14_EXISTS 14:14 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN15_EXISTS 15:15 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN16_EXISTS 16:16 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN17_EXISTS 17:17 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN18_EXISTS 18:18 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN19_EXISTS 19:19 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN20_EXISTS 20:20 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN21_EXISTS 21:21 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN22_EXISTS 22:22 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN23_EXISTS 23:23 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN24_EXISTS 24:24 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN25_EXISTS 25:25 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN26_EXISTS 26:26 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN27_EXISTS 27:27 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN28_EXISTS 28:28 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN29_EXISTS 29:29 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN30_EXISTS 30:30 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN31_EXISTS 31:31 /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCB73_SYS_CAPE_VIRWIN_EXISTS__SIZE_1 32 /* */ +#define NVCB73_SYS_CAPE_VIRWIN_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_SYS_CAPE_VIRWIN_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_MISC_CAPA_NUM_VMS 17:13 /* RWIUF */ +#define NVCB73_LINK_CAP 0x30 /* RW-4R */ +#define NVCB73_LINK_CAP_PHYCTRL0_EXISTS 0:0 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL1_EXISTS 1:1 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL2_EXISTS 2:2 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL3_EXISTS 3:3 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL4_EXISTS 4:4 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL5_EXISTS 5:5 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL6_EXISTS 6:6 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL7_EXISTS 7:7 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL8_EXISTS 8:8 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL9_EXISTS 9:9 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL10_EXISTS 10:10 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL11_EXISTS 11:11 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL12_EXISTS 12:12 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL13_EXISTS 13:13 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL14_EXISTS 14:14 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL15_EXISTS 15:15 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL16_EXISTS 16:16 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL17_EXISTS 17:17 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL18_EXISTS 18:18 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL19_EXISTS 19:19 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL20_EXISTS 20:20 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL21_EXISTS 21:21 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL22_EXISTS 22:22 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL23_EXISTS 23:23 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL24_EXISTS 24:24 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL25_EXISTS 25:25 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL26_EXISTS 26:26 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL27_EXISTS 27:27 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL28_EXISTS 28:28 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL29_EXISTS 29:29 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL30_EXISTS 30:30 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL31_EXISTS 31:31 /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCB73_LINK_CAP_PHYCTRL_EXISTS__SIZE_1 32 /* */ +#define NVCB73_LINK_CAP_PHYCTRL_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCB73_LINK_CAP_PHYCTRL_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA 0x10 /* RW-4R */ +#define NVCB73_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES 15:0 /* RWIUF */ +#define NVCB73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH 17:16 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_32B 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_64B 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_128B 0x00000002 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_256B 0x00000003 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_ROTATION 18:18 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_ROTATION_FALSE 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_ROTATION_TRUE 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_PLANAR 19:19 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_PLANAR_FALSE 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_VGA 20:20 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_VGA_FALSE 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_VGA_TRUE 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION 21:21 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_TRUE 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MSCG 22:22 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MSCG_FALSE 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MSCG_TRUE 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH 23:23 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_FALSE 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_TRUE 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MSCG_LPS 26:26 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MSCG_LPS_FALSE 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_SUPPORT_MSCG_LPS_TRUE 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION 31:30 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_32B 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_64B 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_128B 0x00000002 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_256B 0x00000003 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC 0x18 /* RW-4R */ +#define NVCB73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE 1:0 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_32B 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_64B 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_128B 0x00000002 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_256B 0x00000003 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED 6:4 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_NONE 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_TWO 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_FOUR 0x00000002 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_EIGHT 0x00000003 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_SIXTEEN 0x00000004 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR 11:11 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_FALSE 0x00000000 /* RWI-V */ +#define NVCB73_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP 12:12 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_FALSE 0x00000000 /* RWI-V */ +#define NVCB73_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_TRUE 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_SUPPORT_MEMPOOL_YUV_COMPRESSION 13:13 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPC_SUPPORT_MEMPOOL_YUV_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPC_SUPPORT_MEMPOOL_YUV_COMPRESSION_TRUE 0x00000001 /* RWI-V */ +#define NVCB73_IHUB_COMMON_CAPE 0x24 /* RW-4R */ +#define NVCB73_IHUB_COMMON_CAPE_PHYWIN_BUFFER_SIZE 15:0 /* RWIUF */ +#define NVCB73_IHUB_COMMON_CAPF 0x28 /* RW-4R */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN0_SUPPORT_MULTI_TILE 0:0 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN0_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN0_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN1_SUPPORT_MULTI_TILE 1:1 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN1_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN1_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN2_SUPPORT_MULTI_TILE 2:2 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN2_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN2_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN3_SUPPORT_MULTI_TILE 3:3 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN3_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN3_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN4_SUPPORT_MULTI_TILE 4:4 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN4_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN4_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN5_SUPPORT_MULTI_TILE 5:5 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN5_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN5_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN6_SUPPORT_MULTI_TILE 6:6 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN6_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN6_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN7_SUPPORT_MULTI_TILE 7:7 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN7_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN7_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN8_SUPPORT_MULTI_TILE 8:8 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN8_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN8_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN9_SUPPORT_MULTI_TILE 9:9 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN9_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN9_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN10_SUPPORT_MULTI_TILE 10:10 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN10_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN10_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN11_SUPPORT_MULTI_TILE 11:11 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN11_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN11_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN12_SUPPORT_MULTI_TILE 12:12 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN12_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN12_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN13_SUPPORT_MULTI_TILE 13:13 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN13_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN13_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN14_SUPPORT_MULTI_TILE 14:14 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN14_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN14_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN15_SUPPORT_MULTI_TILE 15:15 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN15_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN15_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN16_SUPPORT_MULTI_TILE 16:16 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN16_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN16_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN17_SUPPORT_MULTI_TILE 17:17 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN17_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN17_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN18_SUPPORT_MULTI_TILE 18:18 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN18_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN18_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN19_SUPPORT_MULTI_TILE 19:19 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN19_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN19_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN20_SUPPORT_MULTI_TILE 20:20 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN20_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN20_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN21_SUPPORT_MULTI_TILE 21:21 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN21_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN21_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN22_SUPPORT_MULTI_TILE 22:22 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN22_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN22_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN23_SUPPORT_MULTI_TILE 23:23 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN23_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN23_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN24_SUPPORT_MULTI_TILE 24:24 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN24_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN24_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN25_SUPPORT_MULTI_TILE 25:25 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN25_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN25_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN26_SUPPORT_MULTI_TILE 26:26 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN26_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN26_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN27_SUPPORT_MULTI_TILE 27:27 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN27_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN27_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN28_SUPPORT_MULTI_TILE 28:28 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN28_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN28_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN29_SUPPORT_MULTI_TILE 29:29 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN29_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN29_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN30_SUPPORT_MULTI_TILE 30:30 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN30_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN30_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN31_SUPPORT_MULTI_TILE 31:31 /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN31_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN31_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE__SIZE_1 32 /* */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCB73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA(i) (0x680+(i)*32) /* RW-4A */ +#define NVCB73_POSTCOMP_HDR_CAPA__SIZE_1 8 /* */ +#define NVCB73_POSTCOMP_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_OCSC0_PRESENT 16:16 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_OCSC1_PRESENT 17:17 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_SCLR_PRESENT 18:18 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_HCLPF_PRESENT 19:19 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_DTH_PRESENT 20:20 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_DTH_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_DTH_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_OSCAN_PRESENT 21:21 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_DSC_PRESENT 22:22 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_DSC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_DSC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_VFILTER_PRESENT 23:23 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_LTM_PRESENT 25:25 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPA_LTM_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPA_LTM_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPB(i) (0x684+(i)*32) /* RW-4A */ +#define NVCB73_POSTCOMP_HDR_CAPB__SIZE_1 8 /* */ +#define NVCB73_POSTCOMP_HDR_CAPB_VGA 0:0 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPB_VGA_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPB_VGA_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPB_OLUT_SZ 12:1 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPB_OLUT_LOGNR 15:13 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD 17:17 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPB_OLUT_DIRECT 18:18 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPB_OLUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPB_OLUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC(i) (0x688+(i)*32) /* RW-4A */ +#define NVCB73_POSTCOMP_HDR_CAPC__SIZE_1 8 /* */ +#define NVCB73_POSTCOMP_HDR_CAPC_OCSC0_PRECISION 4:0 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC_OCSC1_PRECISION 12:8 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP 13:13 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_SF_PRECISION 20:16 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_CI_PRECISION 24:21 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB 25:25 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPD(i) (0x68c+(i)*32) /* RW-4A */ +#define NVCB73_POSTCOMP_HDR_CAPD__SIZE_1 8 /* */ +#define NVCB73_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPE(i) (0x690+(i)*32) /* RW-4A */ +#define NVCB73_POSTCOMP_HDR_CAPE__SIZE_1 8 /* */ +#define NVCB73_POSTCOMP_HDR_CAPE_DSC_MAXLINEWIDTH 15:0 /* RWIUF */ +#define NVCB73_POSTCOMP_HDR_CAPE_DSC_NATIVE422 16:16 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPE_DSC_NATIVE422_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_DSC_NATIVE422_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_DSC_NATIVE420 17:17 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPE_DSC_NATIVE420_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_DSC_NATIVE420_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_PRESENT 18:18 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE 21:19 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_9x9x9 0x00000000 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_17x17x17 0x00000001 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_25x25x25 0x00000002 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_33x33x33 0x00000003 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_4 0x00000004 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_5 0x00000005 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_6 0x00000006 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_7 0x00000007 /* RW--V */ +#define NVCB73_POSTCOMP_HDR_CAPE_3DLUT_NUM_CURVES 23:22 /* RWIUF */ +#define NVCB73_POSTCOMP_HDR_CAPF(i) (0x694+(i)*32) /* RW-4A */ +#define NVCB73_POSTCOMP_HDR_CAPF__SIZE_1 8 /* */ +#define NVCB73_POSTCOMP_HDR_CAPF_VFILTER_MAX_PIXELS 15:0 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPF_LTM_MAX_PIXELS 31:16 /* RWIVF */ +#define NVCB73_POSTCOMP_HDR_CAPG(i) (0x698+(i)*32) /* RW-4A */ +#define NVCB73_POSTCOMP_HDR_CAPG__SIZE_1 8 /* */ +#define NVCB73_POSTCOMP_HDR_CAPG_CMI_SZ 11:0 /* RWIUF */ +#define NVCB73_POSTCOMP_HDR_CAPG_CMI_LOGNR 14:12 /* RWIUF */ +#define NVCB73_POSTCOMP_HDR_CAPG_CMO_SZ 26:15 /* RWIUF */ +#define NVCB73_POSTCOMP_HDR_CAPG_CMO_LOGNR 29:27 /* RWIUF */ +#define NVCB73_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVCB73_SOR_CAP__SIZE_1 8 /* */ +#define NVCB73_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVCB73_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVCB73_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVCB73_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVCB73_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DP_DUAL_MODE 4:4 /* RWIVF */ +#define NVCB73_SOR_CAP_DP_DUAL_MODE_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DP_DUAL_MODE_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVCB73_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVCB73_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVCB73_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVCB73_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DP_TUNNELING_OVER_USB4 15:15 /* RWIVF */ +#define NVCB73_SOR_CAP_DP_TUNNELING_OVER_USB4_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DP_TUNNELING_OVER_USB4_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVCB73_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DP_DUAL_MST 23:23 /* RWIVF */ +#define NVCB73_SOR_CAP_DP_DUAL_MST_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DP_DUAL_MST_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVCB73_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVCB73_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVCB73_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVCB73_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_HDMI_FRL 28:28 /* RWIVF */ +#define NVCB73_SOR_CAP_HDMI_FRL_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_HDMI_FRL_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_HDMI_FRL_YUV422 29:29 /* RWIVF */ +#define NVCB73_SOR_CAP_HDMI_FRL_YUV422_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_HDMI_FRL_YUV422_TRUE 0x00000001 /* RW--V */ +#define NVCB73_SOR_CAP_DP_128B132B 30:30 /* RWIVF */ +#define NVCB73_SOR_CAP_DP_128B132B_FALSE 0x00000000 /* RW--V */ +#define NVCB73_SOR_CAP_DP_128B132B_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA(i) (0x780+(i)*32) /* RW-4A */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA__SIZE_1 32 /* */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH 13:10 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT 16:16 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT 17:17 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT 18:18 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT 19:19 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT 20:20 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT 21:21 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT 22:22 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT 23:23 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT 24:24 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB(i) (0x784+(i)*32) /* RW-4A */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB__SIZE_1 32 /* */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION 4:0 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ 9:6 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR 12:10 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD 14:14 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT 15:15 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC(i) (0x788+(i)*32) /* RW-4A */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC__SIZE_1 32 /* */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION 4:0 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_FVLUT 13:13 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_FVLUT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_FVLUT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT 15:15 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION 20:16 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD(i) (0x78c+(i)*32) /* RW-4A */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD__SIZE_1 32 /* */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ 3:0 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR 6:4 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD 8:8 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT 9:9 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION 16:12 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION 20:17 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB 21:21 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA 22:22 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE(i) (0x790+(i)*32) /* RW-4A */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE__SIZE_1 32 /* */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION 4:0 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_FVLUT 13:13 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_FVLUT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_FVLUT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT 15:15 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION 20:16 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPF(i) (0x794+(i)*32) /* RW-4A */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPF__SIZE_1 32 /* */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVCB73_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVCB73_SOR_CLK_CAP(i) (0x608+(i)*4) /* RW-4A */ +#define NVCB73_SOR_CLK_CAP__SIZE_1 8 /* */ +#define NVCB73_SOR_CLK_CAP_DP_MAX 7:0 /* RWIUF */ +#define NVCB73_SOR_CLK_CAP_TMDS_MAX 23:16 /* RWIUF */ +#define NVCB73_SOR_CLK_CAP_LVDS_MAX 31:24 /* RWIUF */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clcb73_h_ diff --git a/userspace/sdks/nv570/inc/class/clcb7a.h b/userspace/sdks/nv570/inc/class/clcb7a.h new file mode 100644 index 0000000..49ff6af --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb7a.h @@ -0,0 +1,216 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcb7a__h_ +#define _clcb7a__h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCB7A_CURSOR_IMM_CHANNEL_PIO (0x0000CB7A) + +typedef volatile struct _clcb7a_tag0 { + NvV32 Reserved00[0x2]; + NvV32 Free; // 0x00000008 - 0x0000000B + NvV32 Reserved01[0x7D]; + NvV32 Update; // 0x00000200 - 0x00000203 + NvV32 SetInterlockFlags; // 0x00000204 - 0x00000207 + NvV32 SetCursorHotSpotPointOut[2]; // 0x00000208 - 0x0000020F + NvV32 SetWindowInterlockFlags; // 0x00000210 - 0x00000213 + NvV32 Reserved02[0x3F7B]; +} NVCB7ADispCursorImmControlPio; + +#define NVCB7A_FREE (0x00000008) +#define NVCB7A_FREE_COUNT 5:0 +#define NVCB7A_UPDATE (0x00000200) +#define NVCB7A_UPDATE_RELEASE_ELV 0:0 +#define NVCB7A_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCB7A_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCB7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCB7A_UPDATE_FORCE_FULLSCREEN 12:12 +#define NVCB7A_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCB7A_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCB7A_SET_INTERLOCK_FLAGS (0x00000204) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVCB7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVCB7A_SET_CURSOR_HOT_SPOT_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVCB7A_SET_CURSOR_HOT_SPOT_POINT_OUT_X 15:0 +#define NVCB7A_SET_CURSOR_HOT_SPOT_POINT_OUT_Y 31:16 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS (0x00000210) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVCB7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clcb7a_h + diff --git a/userspace/sdks/nv570/inc/class/clcb7b.h b/userspace/sdks/nv570/inc/class/clcb7b.h new file mode 100644 index 0000000..5e33f0a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb7b.h @@ -0,0 +1,70 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcb7b_h_ +#define _clcb7b_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCB7B_WINDOW_IMM_CHANNEL_DMA (0x0000CB7B) + +// dma opcode instructions +#define NVCB7B_DMA +#define NVCB7B_DMA_OPCODE 31:29 +#define NVCB7B_DMA_OPCODE_METHOD 0x00000000 +#define NVCB7B_DMA_OPCODE_JUMP 0x00000001 +#define NVCB7B_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVCB7B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVCB7B_DMA_METHOD_COUNT 27:18 +#define NVCB7B_DMA_METHOD_OFFSET 15:2 +#define NVCB7B_DMA_DATA 31:0 +#define NVCB7B_DMA_DATA_NOP 0x00000000 +#define NVCB7B_DMA_JUMP_OFFSET 15:2 +#define NVCB7B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVCB7B_PUT (0x00000000) +#define NVCB7B_PUT_PTR 13:0 +#define NVCB7B_GET (0x00000004) +#define NVCB7B_GET_PTR 13:0 +#define NVCB7B_UPDATE (0x00000200) +#define NVCB7B_UPDATE_RELEASE_ELV 0:0 +#define NVCB7B_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCB7B_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCB7B_UPDATE_INTERLOCK_WITH_WINDOW 1:1 +#define NVCB7B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVCB7B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVCB7B_UPDATE_FORCE_FULLSCREEN 4:4 +#define NVCB7B_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCB7B_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCB7B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVCB7B_SET_POINT_OUT_X 15:0 +#define NVCB7B_SET_POINT_OUT_Y 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clcb7b_h diff --git a/userspace/sdks/nv570/inc/class/clcb7d.h b/userspace/sdks/nv570/inc/class/clcb7d.h new file mode 100644 index 0000000..aea7dab --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb7d.h @@ -0,0 +1,2007 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcb7d_h_ +#define _clcb7d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCB7D_CORE_CHANNEL_DMA (0x0000CB7D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVCB7D_DMA +#define NVCB7D_DMA_OPCODE 31:29 +#define NVCB7D_DMA_OPCODE_METHOD 0x00000000 +#define NVCB7D_DMA_OPCODE_JUMP 0x00000001 +#define NVCB7D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVCB7D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVCB7D_DMA_METHOD_COUNT 27:18 +#define NVCB7D_DMA_METHOD_OFFSET 15:2 +#define NVCB7D_DMA_DATA 31:0 +#define NVCB7D_DMA_DATA_NOP 0x00000000 +#define NVCB7D_DMA_JUMP_OFFSET 15:2 +#define NVCB7D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + +// class methods +#define NVCB7D_PUT (0x00000000) +#define NVCB7D_PUT_PTR 13:0 +#define NVCB7D_GET (0x00000004) +#define NVCB7D_GET_PTR 13:0 +#define NVCB7D_UPDATE (0x00000200) +#define NVCB7D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVCB7D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVCB7D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVCB7D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVCB7D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVCB7D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVCB7D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVCB7D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVCB7D_UPDATE_RELEASE_ELV 0:0 +#define NVCB7D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCB7D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCB7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCB7D_UPDATE_FORCE_FULLSCREEN 28:28 +#define NVCB7D_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCB7D_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCB7D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVCB7D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVCB7D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVCB7D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCB7D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVCB7D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVCB7D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVCB7D_SET_CONTROL (0x00000210) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVCB7D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVCB7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVCB7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVCB7D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVCB7D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVCB7D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVCB7D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVCB7D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVCB7D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVCB7D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVCB7D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVCB7D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVCB7D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVCB7D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVCB7D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) +#define NVCB7D_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000260) +#define NVCB7D_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000264) +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVCB7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) + +#define NVCB7D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVCB7D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVCB7D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVCB7D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVCB7D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVCB7D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVCB7D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVCB7D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVCB7D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVCB7D_SOR_SET_CONTROL_PROTOCOL_HDMI_FRL (0x0000000C) +#define NVCB7D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVCB7D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVCB7D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVCB7D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCB7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVCB7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVCB7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVCB7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVCB7D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVCB7D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVCB7D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVCB7D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVCB7D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVCB7D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVCB7D_DSI_SET_CONTROL(a) (0x00000500 + (a)*0x00000020) +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK 7:0 +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVCB7D_DSI_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVCB7D_DSI_SET_CUSTOM_REASON(a) (0x00000504 + (a)*0x00000020) +#define NVCB7D_DSI_SET_CUSTOM_REASON_CODE 31:0 +#define NVCB7D_DSI_SET_SW_SPARE_A(a) (0x00000508 + (a)*0x00000020) +#define NVCB7D_DSI_SET_SW_SPARE_A_CODE 31:0 +#define NVCB7D_DSI_SET_SW_SPARE_B(a) (0x0000050C + (a)*0x00000020) +#define NVCB7D_DSI_SET_SW_SPARE_B_CODE 31:0 + +#define NVCB7D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVCB7D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVCB7D_WINDOW_SET_CONTROL_HIDE 8:8 +#define NVCB7D_WINDOW_SET_CONTROL_HIDE_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_CONTROL_HIDE_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_CONTROL_DISABLE_PHYSICAL_FLIPS 9:9 +#define NVCB7D_WINDOW_SET_CONTROL_DISABLE_PHYSICAL_FLIPS_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_CONTROL_DISABLE_PHYSICAL_FLIPS_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_CONTROL_ALLOW_SUPERFRAME 10:10 +#define NVCB7D_WINDOW_SET_CONTROL_ALLOW_SUPERFRAME_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_CONTROL_ALLOW_SUPERFRAME_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVCB7D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED 16:16 +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED 28:28 +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED 30:30 +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT 26:25 +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT_PITCH_BLOCKLINEAR (0x00000000) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT_PITCH (0x00000001) +#define NVCB7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT_BLOCKLINEAR (0x00000002) +#define NVCB7D_WINDOW_SET_PHYSICAL(a) (0x00001014 + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW 31:0 +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_NONE (0x00000000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW0 (0x00000001) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW1 (0x00000002) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW2 (0x00000004) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW3 (0x00000008) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW4 (0x00000010) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW5 (0x00000020) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW6 (0x00000040) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW7 (0x00000080) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW8 (0x00000100) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW9 (0x00000200) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW10 (0x00000400) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW11 (0x00000800) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW12 (0x00001000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW13 (0x00002000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW14 (0x00004000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW15 (0x00008000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW16 (0x00010000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW17 (0x00020000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW18 (0x00040000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW19 (0x00080000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW20 (0x00100000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW21 (0x00200000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW22 (0x00400000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW23 (0x00800000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW24 (0x01000000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW25 (0x02000000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW26 (0x04000000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW27 (0x08000000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW28 (0x10000000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW29 (0x20000000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW30 (0x40000000) +#define NVCB7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW31 (0x80000000) +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES(a) (0x00001024 + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_SIZE_OUT 0:0 +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_SIZE_OUT_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_SIZE_OUT_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONTROL 1:1 +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONTROL_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONTROL_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONSTANT_ALPHA 2:2 +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONSTANT_ALPHA_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONSTANT_ALPHA_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_FACTOR_SELECT 3:3 +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_FACTOR_SELECT_FALSE (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_FACTOR_SELECT_TRUE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_SIZE_OUT(a) (0x00001028 + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_GUEST_SIZE_OUT_WIDTH 15:0 +#define NVCB7D_WINDOW_SET_GUEST_SIZE_OUT_HEIGHT 31:16 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL(a) (0x0000102C + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONSTANT_ALPHA(a) (0x00001030 + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT(a) (0x00001034 + (a)*0x00000080) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCB7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) + +#define NVCB7D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVCB7D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVCB7D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVCB7D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVCB7D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVCB7D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVCB7D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_PROCAMP_CHROMA_DOWN_V 4:4 +#define NVCB7D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVCB7D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVCB7D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_444 (0x00000009) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444NP (0x0000000A) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN 31:26 +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN0 (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN1 (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN2 (0x00000002) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN3 (0x00000003) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN4 (0x00000004) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN5 (0x00000005) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN6 (0x00000006) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN7 (0x00000007) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN8 (0x00000008) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN9 (0x00000009) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN10 (0x0000000A) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN11 (0x0000000B) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN12 (0x0000000C) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN13 (0x0000000D) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN14 (0x0000000E) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN15 (0x0000000F) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN16 (0x00000010) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN17 (0x00000011) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN18 (0x00000012) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN19 (0x00000013) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN20 (0x00000014) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN21 (0x00000015) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN22 (0x00000016) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN23 (0x00000017) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN24 (0x00000018) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN25 (0x00000019) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN26 (0x0000001A) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN27 (0x0000001B) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN28 (0x0000001C) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN29 (0x0000001D) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN30 (0x0000001E) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN31 (0x0000001F) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_NONE (0x0000003F) +#define NVCB7D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVCB7D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVCB7D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_YUV420PACKER 3:3 +#define NVCB7D_HEAD_SET_CONTROL_YUV420PACKER_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_YUV420PACKER_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_MODE 11:10 +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_MODE_NO_LOCK (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN 8:4 +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCB7D_HEAD_SET_CONTROL_SINK_LOCKOUT_WINDOW 15:12 +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE 23:22 +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN 20:16 +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCB7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCB7D_HEAD_SET_CONTROL_SINK_STEREO_LOCK_MODE 30:30 +#define NVCB7D_HEAD_SET_CONTROL_SINK_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_SINK_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_STEREO_LOCK_MODE 31:31 +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_SOURCE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVCB7D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVCB7D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVCB7D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVCB7D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_MODE_ROUND (0x00000005) +#define NVCB7D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVCB7D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVCB7D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED 4:4 +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_LTM_ALLOWED 5:5 +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_LTM_ALLOWED_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_LTM_ALLOWED_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS 14:12 +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED 16:16 +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_HEAD_USAGE_BOUNDS_ELV_START 31:17 +#define NVCB7D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVCB7D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVCB7D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVCB7D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCB7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCB7D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVCB7D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVCB7D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVCB7D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVCB7D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVCB7D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_STALL_LOCK_UNSTALL_SYNC_ADVANCE 25:16 +#define NVCB7D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVCB7D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVCB7D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVCB7D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVCB7D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVCB7D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVCB7D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVCB7D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVCB7D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVCB7D_HEAD_SET_TILE_MASK(a) (0x00002060 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_TILE_MASK_TILE 7:0 +#define NVCB7D_HEAD_SET_TILE_MASK_TILE_NONE (0x00000000) +#define NVCB7D_HEAD_SET_TILE_MASK_TILE_TILE0 (0x00000001) +#define NVCB7D_HEAD_SET_TILE_MASK_TILE_TILE1 (0x00000002) +#define NVCB7D_HEAD_SET_TILE_MASK_TILE_TILE2 (0x00000004) +#define NVCB7D_HEAD_SET_TILE_MASK_TILE_TILE3 (0x00000008) +#define NVCB7D_HEAD_SET_TILE_MASK_TILE_TILE4 (0x00000010) +#define NVCB7D_HEAD_SET_TILE_MASK_TILE_TILE5 (0x00000020) +#define NVCB7D_HEAD_SET_TILE_MASK_TILE_TILE6 (0x00000040) +#define NVCB7D_HEAD_SET_TILE_MASK_TILE_TILE7 (0x00000080) +#define NVCB7D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RASTER_SIZE_WIDTH 15:0 +#define NVCB7D_HEAD_SET_RASTER_SIZE_HEIGHT 31:16 +#define NVCB7D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVCB7D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVCB7D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVCB7D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVCB7D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVCB7D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVCB7D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVCB7D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVCB7D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVCB7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVCB7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVCB7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVCB7D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVCB7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVCB7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVCB7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVCB7D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVCB7D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVCB7D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVCB7D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS 20:20 +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL(a) (0x000020A4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL_INTERPOLATE 1:1 +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL_MIRROR 2:2 +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CMI_LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CMI_FP_NORM_SCALE(a) (0x000020A8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CMI_FP_NORM_SCALE_FPNORM 31:0 +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL(a) (0x000020AC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL_INTERPOLATE 1:1 +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL_MIRROR 2:2 +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CMO_LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CM3D0CONTROL(a) (0x000020B8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CM3D0CONTROL_MODE 0:0 +#define NVCB7D_HEAD_SET_CM3D0CONTROL_MODE_GAMUT_MAPPING (0x00000000) +#define NVCB7D_HEAD_SET_CM3D0CONTROL_MODE_PANEL_CORR (0x00000001) +#define NVCB7D_HEAD_SET_CM3D0CONTROL_ROUND 1:1 +#define NVCB7D_HEAD_SET_CM3D0CONTROL_ROUND_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CM3D0CONTROL_ROUND_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CM3D0CONTROL_LAST_ENTRY_ADD1 2:2 +#define NVCB7D_HEAD_SET_CM3D0CONTROL_LAST_ENTRY_ADD1_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CM3D0CONTROL_LAST_ENTRY_ADD1_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CM3D0CONTROL_SIZE 3:3 +#define NVCB7D_HEAD_SET_CM3D0CONTROL_SIZE_SIZE_9X9X9 (0x00000000) +#define NVCB7D_HEAD_SET_CM3D0CONTROL_SIZE_SIZE_17X17X17 (0x00000001) +#define NVCB7D_HEAD_SET_CM3D0CONTROL_RANGE_SCALE 8:6 +#define NVCB7D_HEAD_SET_CM3D0CONTROL_CONTENT_OFFSET 22:9 +#define NVCB7D_HEAD_SET_CM3D1CONTROL(a) (0x000020BC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CM3D1CONTROL_MODE 0:0 +#define NVCB7D_HEAD_SET_CM3D1CONTROL_MODE_GAMUT_MAPPING (0x00000000) +#define NVCB7D_HEAD_SET_CM3D1CONTROL_MODE_PANEL_CORR (0x00000001) +#define NVCB7D_HEAD_SET_CM3D1CONTROL_ROUND 1:1 +#define NVCB7D_HEAD_SET_CM3D1CONTROL_ROUND_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CM3D1CONTROL_ROUND_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CM3D1CONTROL_LAST_ENTRY_ADD1 2:2 +#define NVCB7D_HEAD_SET_CM3D1CONTROL_LAST_ENTRY_ADD1_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CM3D1CONTROL_LAST_ENTRY_ADD1_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CM3D1CONTROL_SIZE 3:3 +#define NVCB7D_HEAD_SET_CM3D1CONTROL_SIZE_SIZE_9X9X9 (0x00000000) +#define NVCB7D_HEAD_SET_CM3D1CONTROL_SIZE_SIZE_17X17X17 (0x00000001) +#define NVCB7D_HEAD_SET_CM3D1CONTROL_RANGE_SCALE 8:6 +#define NVCB7D_HEAD_SET_CM3D1CONTROL_CONTENT_OFFSET 22:9 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI(a) (0x000020C0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_HERTZ 3:0 +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_MAX(a) (0x000020C4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_MAX_HERTZ 3:0 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE(a,b) (0x000020C8 + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW 15:10 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN0 (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN1 (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN2 (0x00000002) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN3 (0x00000003) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN4 (0x00000004) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN5 (0x00000005) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN6 (0x00000006) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN7 (0x00000007) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN8 (0x00000008) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN9 (0x00000009) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN10 (0x0000000A) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN11 (0x0000000B) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN12 (0x0000000C) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN13 (0x0000000D) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN14 (0x0000000E) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN15 (0x0000000F) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN16 (0x00000010) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN17 (0x00000011) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN18 (0x00000012) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN19 (0x00000013) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN20 (0x00000014) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN21 (0x00000015) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN22 (0x00000016) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN23 (0x00000017) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN24 (0x00000018) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN25 (0x00000019) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN26 (0x0000001A) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN27 (0x0000001B) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN28 (0x0000001C) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN29 (0x0000001D) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN30 (0x0000001E) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN31 (0x0000001F) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_NONE (0x0000003F) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_INDEX 1:1 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_ENABLE 0:0 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_OVERRIDE 2:2 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_OVERRIDE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_OVERRIDE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION 9:8 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_VBLANK (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_VSYNC (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_LINE (0x00000002) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID 30:16 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID_REVERSED 31:31 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB0OVERRIDE 4:4 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB0OVERRIDE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB0OVERRIDE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB1OVERRIDE 5:5 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB1OVERRIDE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB1OVERRIDE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB2OVERRIDE 6:6 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB2OVERRIDE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB2OVERRIDE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB3OVERRIDE 7:7 +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB3OVERRIDE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_OVERRIDE_HB3OVERRIDE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE(a,b) (0x000020D0 + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB0 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB1 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB2 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB3 31:24 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE(a,b) (0x00002110 + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE_ADDRESS_HI 31:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE(a,b) (0x00002130 + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ADDRESS_LO 31:4 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET 3:2 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE 0:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_CRC(a) (0x00002150 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_CRC_ADDRESS_HI 31:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC(a) (0x00002154 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ADDRESS_LO 31:4 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET 3:2 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_IOVA (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE 0:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT(a) (0x00002158 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT_ADDRESS_HI 31:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT(a) (0x0000215C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ADDRESS_LO 31:4 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET 3:2 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_IOVA (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE 0:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D0(a) (0x00002160 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D0_ADDRESS_HI 31:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0(a) (0x00002164 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ADDRESS_LO 31:4 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET 3:2 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_IOVA (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ENABLE 0:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D1(a) (0x00002168 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D1_ADDRESS_HI 31:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1(a) (0x0000216C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ADDRESS_LO 31:4 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET 3:2 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_IOVA (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ENABLE 0:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR(a,b) (0x00002170 + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR_ADDRESS_HI 31:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR(a,b) (0x00002178 + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ADDRESS_LO 31:4 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET 3:2 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_IOVA (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND 1:1 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_PITCH (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_BLOCKLINEAR (0x00000001) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE 0:0 +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 5:0 +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_0 (0x00000000) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_1 (0x00000001) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_2 (0x00000002) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_3 (0x00000003) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_4 (0x00000004) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_5 (0x00000005) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_6 (0x00000006) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_7 (0x00000007) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_8 (0x00000008) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_9 (0x00000009) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_10 (0x0000000A) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_11 (0x0000000B) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_12 (0x0000000C) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_13 (0x0000000D) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_14 (0x0000000E) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_15 (0x0000000F) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_16 (0x00000010) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_17 (0x00000011) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_18 (0x00000012) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_19 (0x00000013) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_20 (0x00000014) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_21 (0x00000015) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_22 (0x00000016) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_23 (0x00000017) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_24 (0x00000018) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_25 (0x00000019) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_26 (0x0000001A) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_27 (0x0000001B) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_28 (0x0000001C) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_29 (0x0000001D) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_30 (0x0000001E) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_31 (0x0000001F) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000020) +#define NVCB7D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVCB7D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVCB7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVCB7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVCB7D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVCB7D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVCB7D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVCB7D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVCB7D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVCB7D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVCB7D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DISPLAY_RATE_RUN_MODE 1:0 +#define NVCB7D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVCB7D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVCB7D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT_SELF_REFRESH (0x00000002) +#define NVCB7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVCB7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVCB7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL(a,b) (0x000021CC + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE 10:10 +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_ONE_TIME (0x00000000) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_CONTINUOUS (0x00000001) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RASTER_LINE 31:16 +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE(a,b) (0x000021EC + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_VALUE 31:0 +#define NVCB7D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE(a) (0x00002214 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVCB7D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVCB7D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVCB7D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 +#define NVCB7D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED(a) (0x00002220 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_ALPHA 7:0 +#define NVCB7D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_RED 31:16 +#define NVCB7D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE(a) (0x00002224 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_GREEN 15:0 +#define NVCB7D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_BLUE 31:16 +#define NVCB7D_HEAD_SET_CURSOR_COLOR_NORM_SCALE(a) (0x00002228 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CURSOR_COLOR_NORM_SCALE_VALUE 15:0 +#define NVCB7D_HEAD_SET_XOR_BLEND_FACTOR(a) (0x0000222C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_XOR_BLEND_FACTOR_LOG2PEAK_LUMINANCE 3:0 +#define NVCB7D_HEAD_SET_XOR_BLEND_FACTOR_S1 16:4 +#define NVCB7D_HEAD_SET_XOR_BLEND_FACTOR_S2 30:18 +#define NVCB7D_HEAD_SET_CLAMP_RANGE_GREEN(a) (0x00002238 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CLAMP_RANGE_GREEN_LOW 11:0 +#define NVCB7D_HEAD_SET_CLAMP_RANGE_GREEN_HIGH 27:16 +#define NVCB7D_HEAD_SET_CLAMP_RANGE_RED_BLUE(a) (0x0000223C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CLAMP_RANGE_RED_BLUE_LOW 11:0 +#define NVCB7D_HEAD_SET_CLAMP_RANGE_RED_BLUE_HIGH 27:16 +#define NVCB7D_HEAD_SET_OCSC0CONTROL(a) (0x00002240 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0CONTROL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_OCSC0CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_OCSC0CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C00(a) (0x00002244 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C00_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C01(a) (0x00002248 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C01_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C02(a) (0x0000224C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C02_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C03(a) (0x00002250 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C03_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C10(a) (0x00002254 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C10_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C11(a) (0x00002258 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C11_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C12(a) (0x0000225C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C12_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C13(a) (0x00002260 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C13_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C20(a) (0x00002264 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C20_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C21(a) (0x00002268 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C21_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C22(a) (0x0000226C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C22_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C23(a) (0x00002270 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC0COEFFICIENT_C23_VALUE 20:0 +#define NVCB7D_HEAD_SET_OLUT_CONTROL(a) (0x00002280 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_INTERPOLATE 0:0 +#define NVCB7D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_MIRROR 1:1 +#define NVCB7D_HEAD_SET_OLUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_MODE 3:2 +#define NVCB7D_HEAD_SET_OLUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_SIZE 18:8 +#define NVCB7D_HEAD_SET_OLUT_CONTROL_DIRECT_ROUND 4:4 +#define NVCB7D_HEAD_SET_OLUT_CONTROL_DIRECT_ROUND_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_DIRECT_ROUND_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_LEVEL 25:20 +#define NVCB7D_HEAD_SET_OLUT_CONTROL_SEGMENT_SIZE_BITS 5:5 +#define NVCB7D_HEAD_SET_OLUT_CONTROL_SEGMENT_SIZE_BITS_SIZE_3BITS (0x00000000) +#define NVCB7D_HEAD_SET_OLUT_CONTROL_SEGMENT_SIZE_BITS_SIZE_4BITS (0x00000001) +#define NVCB7D_HEAD_SET_OLUT_FP_NORM_SCALE(a) (0x00002284 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OLUT_FP_NORM_SCALE_VALUE 31:0 +#define NVCB7D_HEAD_SET_OCSC1CONTROL(a) (0x0000229C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1CONTROL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_OCSC1CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_OCSC1CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C00(a) (0x000022A0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C00_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C01(a) (0x000022A4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C01_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C02(a) (0x000022A8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C02_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C03(a) (0x000022AC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C03_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C10(a) (0x000022B0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C10_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C11(a) (0x000022B4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C11_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C12(a) (0x000022B8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C12_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C13(a) (0x000022BC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C13_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C20(a) (0x000022C0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C20_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C21(a) (0x000022C4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C21_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C22(a) (0x000022C8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C22_VALUE 20:0 +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C23(a) (0x000022CC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_OCSC1COEFFICIENT_C23_VALUE 20:0 +#define NVCB7D_HEAD_SET_HEAD_POSITION(a) (0x000022D0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_HEAD_POSITION_X 2:0 +#define NVCB7D_HEAD_SET_HEAD_POSITION_Y 6:4 +#define NVCB7D_HEAD_SET_DSC_CONTROL(a) (0x000022D4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_CONTROL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_DSC_CONTROL_ENABLE_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_DSC_CONTROL_ENABLE_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_DSC_CONTROL_AUTO_RESET 3:3 +#define NVCB7D_HEAD_SET_DSC_CONTROL_AUTO_RESET_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_DSC_CONTROL_AUTO_RESET_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION 4:4 +#define NVCB7D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET 5:5 +#define NVCB7D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_DSC_CONTROL_FLATNESS_DET_THRESH 15:6 +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL(a) (0x000022D8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION 2:1 +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VBLANK (0x00000000) +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VSYNC (0x00000001) +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_LINE (0x00000002) +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_SIZE 10:3 +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY 11:11 +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID 26:12 +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID_REVERSED 27:27 +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_DSC_PPS_HEAD(a) (0x000022DC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_HEAD_BYTE0 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_HEAD_BYTE1 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_HEAD_BYTE2 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_HEAD_BYTE3 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA0(a) (0x000022E0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MINOR 3:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MAJOR 7:4 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA0_PPS_IDENTIFIER 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA0_RESERVED 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA0_LINEBUF_DEPTH 27:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA0_BITS_PER_COMPONENT 31:28 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1(a) (0x000022E4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_HIGH 1:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1_VBR_ENABLE 2:2 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1_SIMPLE422 3:3 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1_CONVERT_RGB 4:4 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1_BLOCK_PRED_ENABLE 5:5 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1_RESERVED 7:6 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_LOW 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_HIGH 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_LOW 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA2(a) (0x000022E8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_HIGH 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_LOW 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_HIGH 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_LOW 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA3(a) (0x000022EC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_HIGH 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_LOW 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_HIGH 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_LOW 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA4(a) (0x000022F0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_HIGH 1:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA4_RESERVED 7:2 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_LOW 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_HIGH 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_LOW 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA5(a) (0x000022F4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA5_RESERVED0 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA5_INITIAL_SCALE_VALUE 13:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA5_RESERVED1 15:14 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_HIGH 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_LOW 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA6(a) (0x000022F8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_HIGH 3:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA6_RESERVED0 7:4 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_LOW 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA6_RESERVED1 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA6_FIRST_LINE_BPG_OFFSET 28:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA6_RESERVED2 31:29 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA7(a) (0x000022FC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_HIGH 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_LOW 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_HIGH 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_LOW 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA8(a) (0x00002300 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_HIGH 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_LOW 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_HIGH 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_LOW 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA9(a) (0x00002304 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MIN_QP 4:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA9_RESERVED0 7:5 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MAX_QP 12:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA9_RESERVED1 15:13 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_HIGH 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_LOW 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA10(a) (0x00002308 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA10_RC_EDGE_FACTOR 3:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA10_RESERVED0 7:4 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT0 12:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA10_RESERVED1 15:13 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT1 20:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA10_RESERVED2 23:21 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_LO 27:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_HI 31:28 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA11(a) (0x0000230C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH0 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH1 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH2 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH3 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA12(a) (0x00002310 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH4 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH5 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH6 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH7 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA13(a) (0x00002314 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH8 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH9 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH10 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH11 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA14(a) (0x00002318 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH12 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH13 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_HIGH0 18:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MIN_QP0 23:19 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_BPG_OFFSET0 29:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_LOW0 31:30 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA15(a) (0x0000231C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH1 2:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP1 7:3 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET1 13:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW1 15:14 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH2 18:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP2 23:19 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET2 29:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW2 31:30 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA16(a) (0x00002320 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH3 2:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP3 7:3 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET3 13:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW3 15:14 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH4 18:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP4 23:19 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET4 29:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW4 31:30 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA17(a) (0x00002324 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH5 2:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP5 7:3 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET5 13:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW5 15:14 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH6 18:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP6 23:19 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET6 29:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW6 31:30 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA18(a) (0x00002328 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH7 2:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP7 7:3 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET7 13:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW7 15:14 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH8 18:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP8 23:19 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET8 29:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW8 31:30 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA19(a) (0x0000232C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH9 2:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP9 7:3 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET9 13:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW9 15:14 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH10 18:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP10 23:19 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET10 29:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW10 31:30 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA20(a) (0x00002330 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH11 2:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP11 7:3 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET11 13:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW11 15:14 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH12 18:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP12 23:19 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET12 29:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW12 31:30 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA21(a) (0x00002334 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH13 2:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP13 7:3 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET13 13:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW13 15:14 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH14 18:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP14 23:19 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET14 29:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW14 31:30 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA22(a) (0x00002338 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA22_NATIVE422 0:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA22_NATIVE420 1:1 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA22_RESERVED0 7:2 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA22_SECOND_LINE_BPG_OFFSET 12:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA22_RESERVED1 15:13 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSET_HIGH 23:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSETLOW 31:24 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA23(a) (0x0000233C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_HIGH 7:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_LOW 15:8 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA23_RESERVED 31:16 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA24(a) (0x00002340 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA24_RESERVED 31:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA25(a) (0x00002344 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA25_RESERVED 31:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA26(a) (0x00002348 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA26_RESERVED 31:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA27(a) (0x0000234C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA27_RESERVED 31:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA28(a) (0x00002350 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA28_RESERVED 31:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA29(a) (0x00002354 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA29_RESERVED 31:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA30(a) (0x00002358 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA30_RESERVED 31:0 +#define NVCB7D_HEAD_SET_DSC_PPS_DATA31(a) (0x0000235C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DSC_PPS_DATA31_RESERVED 31:0 +#define NVCB7D_HEAD_SET_RASTER_HBLANK_DELAY(a) (0x00002364 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_START 15:0 +#define NVCB7D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_END 31:16 +#define NVCB7D_HEAD_SET_HDMI_DSC_HCACTIVE(a) (0x00002368 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_HDMI_DSC_HCACTIVE_BYTES 15:0 +#define NVCB7D_HEAD_SET_HDMI_DSC_HCACTIVE_TRI_BYTES 31:16 +#define NVCB7D_HEAD_SET_HDMI_DSC_HCBLANK(a) (0x0000236C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_HDMI_DSC_HCBLANK_WIDTH 15:0 +#define NVCB7D_HEAD_SW_RESERVED(a,b) (0x00002370 + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SW_RESERVED_VALUE 31:0 +#define NVCB7D_HEAD_SET_DP_CTRL(a) (0x0000237C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DP_CTRL_EFFECTIVE_BITS_PER_PIXEL_ADJ 9:0 +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI(a,b) (0x00002380 + (a)*0x00000800 + (b)*0x00000004) +#define NVCB7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVCB7D_HEAD_SET_HEAD_INFOFRAME(a) (0x000023A0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_HEAD_INFOFRAME_FID 7:0 +#define NVCB7D_HEAD_SET_HEAD_INFOFRAME_EN 16:16 +#define NVCB7D_HEAD_SET_HEAD_INFOFRAME_EN_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_HEAD_INFOFRAME_EN_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL(a) (0x000023A4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_MODE 1:0 +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_MODE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_MODE_EMP_VTEM_QMS (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_MODE_EMP_OTHERS (0x00000002) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY 12:12 +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY_ONCE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_LOCATION 5:4 +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_LOCATION_VBLANK (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_LOCATION_VSYNC (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_LOCATION_LINE (0x00000002) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID 30:16 +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID_REVERSED 31:31 +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL 14:14 +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL_ACTIVE (0x00000000) +#define NVCB7D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL_ARM (0x00000001) +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER(a) (0x000023A8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER_HB0 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER_HB1 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER_HB2 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_HEADER_HB3 31:24 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA0(a) (0x000023AC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_DATA0_DB0 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA0_DB1 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA0_DB2 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA0_DB3 31:24 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA1(a) (0x000023B0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_DATA1_DB4 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA1_DB5 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA1_DB6 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA1_DB7 31:24 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA2(a) (0x000023B4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_DATA2_DB8 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA2_DB9 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA2_DB10 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA2_DB11 31:24 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA3(a) (0x000023B8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_DATA3_DB12 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA3_DB13 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA3_DB14 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA3_DB15 31:24 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA4(a) (0x000023BC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_DATA4_DB16 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA4_DB17 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA4_DB18 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA4_DB19 31:24 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA5(a) (0x000023C0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_DATA5_DB20 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA5_DB21 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA5_DB22 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA5_DB23 31:24 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA6(a) (0x000023C4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_DATA6_DB24 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA6_DB25 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA6_DB26 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA6_DB27 31:24 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA7(a) (0x000023C8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_INFOFRAME_DATA7_DB28 7:0 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA7_DB29 15:8 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA7_DB30 23:16 +#define NVCB7D_HEAD_SET_INFOFRAME_DATA7_DB31 31:24 +#define NVCB7D_HEAD_SET_RASTER_SIZE_FRACTION(a) (0x000023CC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RASTER_SIZE_FRACTION_HEIGHT 15:0 +#define NVCB7D_HEAD_SET_LTM_CONTROL(a) (0x000023D0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_CONTROL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_LTM_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_MODE 1:1 +#define NVCB7D_HEAD_SET_LTM_CONTROL_MODE_TMO (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_MODE_LTM (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_TONE_SELECT 2:2 +#define NVCB7D_HEAD_SET_LTM_CONTROL_TONE_SELECT_INTENSITY (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_TONE_SELECT_CDB (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_SKIN_TONE_ENABLE 3:3 +#define NVCB7D_HEAD_SET_LTM_CONTROL_SKIN_TONE_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_SKIN_TONE_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_INTERPOLATE 4:4 +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT8 5:5 +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT8_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT8_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT10 6:6 +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT10_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT10_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT_ROUND 7:7 +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT_ROUND_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT_ROUND_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE 9:8 +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_MAX_RGB (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_LIN_I (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_PQI (0x00000002) +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_CDB (0x00000003) +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_RANGE 11:10 +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_10000 (0x00000000) +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_5000 (0x00000001) +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_2500 (0x00000002) +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_1250 (0x00000003) +#define NVCB7D_HEAD_SET_LTM_CONTROL_HIST_END_LINE 31:16 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C00(a) (0x000023D4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C00_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C01(a) (0x000023D8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C01_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C02(a) (0x000023DC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C02_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C03(a) (0x000023E0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C03_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C10(a) (0x000023E4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C10_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C11(a) (0x000023E8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C11_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C12(a) (0x000023EC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C12_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C13(a) (0x000023F0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C13_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C20(a) (0x000023F4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C20_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C21(a) (0x000023F8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C21_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C22(a) (0x000023FC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C22_VALUE 20:0 +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C23(a) (0x00002400 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_COEFF_C23_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C00(a) (0x00002404 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C00_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C01(a) (0x00002408 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C01_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C02(a) (0x0000240C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C02_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C03(a) (0x00002410 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C03_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C10(a) (0x00002414 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C10_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C11(a) (0x00002418 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C11_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C12(a) (0x0000241C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C12_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C13(a) (0x00002420 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C13_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C20(a) (0x00002424 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C20_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C21(a) (0x00002428 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C21_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C22(a) (0x0000242C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C22_VALUE 20:0 +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C23(a) (0x00002430 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_COEFF_C23_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_MAX_SELECTIVE_UPDATE(a) (0x00002434 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_MAX_SELECTIVE_UPDATE_SIZE 31:0 +#define NVCB7D_HEAD_SET_SELF_REFRESH_OVERRIDE(a) (0x00002438 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SELF_REFRESH_OVERRIDE_FRAME_RELEASE 0:0 +#define NVCB7D_HEAD_SET_SELF_REFRESH_OVERRIDE_FRAME_RELEASE_AUTOMATIC (0x00000000) +#define NVCB7D_HEAD_SET_SELF_REFRESH_OVERRIDE_FRAME_RELEASE_MANUAL (0x00000001) +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE(a) (0x0000243C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE_ENABLE 0:0 +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE_EARLY_REGION 1:1 +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE_EARLY_REGION_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE_EARLY_REGION_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_CURSOR_DIRTY(a) (0x00002440 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_CURSOR_DIRTY_STATE 0:0 +#define NVCB7D_HEAD_SET_CURSOR_DIRTY_STATE_FALSE (0x00000000) +#define NVCB7D_HEAD_SET_CURSOR_DIRTY_STATE_TRUE (0x00000001) +#define NVCB7D_HEAD_SET_DPM_CONTROL(a) (0x00002444 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_DPM_CONTROL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_DPM_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_DPM_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_DPM_CONTROL_ALPM 1:1 +#define NVCB7D_HEAD_SET_DPM_CONTROL_ALPM_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_DPM_CONTROL_ALPM_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_DPM_CONTROL_ALPM_TYPE 2:2 +#define NVCB7D_HEAD_SET_DPM_CONTROL_ALPM_TYPE_AUX_LESS (0x00000000) +#define NVCB7D_HEAD_SET_DPM_CONTROL_AS_SDP 3:3 +#define NVCB7D_HEAD_SET_DPM_CONTROL_AS_SDP_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_DPM_CONTROL_AS_SDP_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL(a) (0x00002448 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_ENABLE 0:0 +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_ENABLE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_ENABLE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_SELF_REFRESH 1:1 +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_SELF_REFRESH_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_SELF_REFRESH_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_MODE 3:2 +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_MODE_PSR1 (0x00000000) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_MODE_PANEL_REPLAY (0x00000002) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_CRC 4:4 +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_CRC_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_CRC_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_LOCATION 7:6 +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_LOCATION_VBLANK (0x00000000) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_LOCATION_VSYNC (0x00000001) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_LOCATION_LINE (0x00000002) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_LINE_ID 22:8 +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_CAPTURE_INDICATOR 23:23 +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_CAPTURE_INDICATOR_SAME (0x00000000) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_CAPTURE_INDICATOR_EARLY (0x00000001) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_IDLE_SDP 24:24 +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_IDLE_SDP_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_IDLE_SDP_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_OVERRIDE_SU_VSC 25:25 +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_OVERRIDE_SU_VSC_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_VSC_SDP_CTRL_OVERRIDE_SU_VSC_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_VSC_SDP_HEADER(a) (0x0000244C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_HEADER_HEADER_BYTE 31:0 +#define NVCB7D_HEAD_SET_VSC_SDP_DATA0(a) (0x00002450 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_DATA0_DATA_BYTE 31:0 +#define NVCB7D_HEAD_SET_VSC_SDP_DATA1(a) (0x00002454 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_DATA1_DATA_BYTE 31:0 +#define NVCB7D_HEAD_SET_VSC_SDP_DATA2(a) (0x00002458 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_DATA2_DATA_BYTE 31:0 +#define NVCB7D_HEAD_SET_VSC_SDP_DATA3(a) (0x0000245C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_DATA3_DATA_BYTE 31:0 +#define NVCB7D_HEAD_SET_VSC_SDP_DATA4(a) (0x00002460 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_DATA4_DATA_BYTE 31:0 +#define NVCB7D_HEAD_SET_VSC_SDP_DATA5(a) (0x00002464 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_DATA5_DATA_BYTE 31:0 +#define NVCB7D_HEAD_SET_VSC_SDP_DATA6(a) (0x00002468 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_DATA6_DATA_BYTE 31:0 +#define NVCB7D_HEAD_SET_VSC_SDP_DATA7(a) (0x0000246C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_VSC_SDP_DATA7_DATA_BYTE 31:0 +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL(a) (0x00002470 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_INPUT_MATRIX 0:0 +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_INPUT_MATRIX_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_INPUT_MATRIX_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_FVLUT 1:1 +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_FVLUT_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_FVLUT_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_INTERPOLATE 4:4 +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_MIRROR 5:5 +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_MIRROR_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_MIRROR_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE 7:6 +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE_CSCLUT_PQ (0x00000000) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE_CSCLUT_HLG (0x00000001) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_OUTPUT_MATRIX 2:2 +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_OUTPUT_MATRIX_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_OUTPUT_MATRIX_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_RGB2ITP_LUT_FP_NORM_SCALE(a) (0x00002474 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_RGB2ITP_LUT_FP_NORM_SCALE_VALUE 31:0 +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL(a) (0x00002478 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_INPUT_MATRIX 0:0 +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_INPUT_MATRIX_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_INPUT_MATRIX_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_FVLUT 1:1 +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_FVLUT_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_FVLUT_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_INTERPOLATE 4:4 +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_MIRROR 5:5 +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_MIRROR_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_MIRROR_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE 7:6 +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE_CSCLUT_PQ (0x00000000) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE_CSCLUT_HLG (0x00000001) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_OUTPUT_MATRIX 2:2 +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_OUTPUT_MATRIX_DISABLE (0x00000000) +#define NVCB7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_OUTPUT_MATRIX_ENABLE (0x00000001) +#define NVCB7D_HEAD_SET_ITP2RGB_LUT_FP_SCALE(a) (0x0000247C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_ITP2RGB_LUT_FP_SCALE_VALUE 15:0 +#define NVCB7D_HEAD_SET_BLANK_OUTPUT_COLOR(a) (0x00002484 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_BLANK_OUTPUT_COLOR_RED_CR 9:0 +#define NVCB7D_HEAD_SET_BLANK_OUTPUT_COLOR_GREEN_Y 19:10 +#define NVCB7D_HEAD_SET_BLANK_OUTPUT_COLOR_BLUE_CB 29:20 +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE_GRANULARITY(a) (0x0000249C + (a)*0x00000800) +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE_GRANULARITY_X 15:0 +#define NVCB7D_HEAD_SET_SELECTIVE_UPDATE_GRANULARITY_Y 31:16 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C00(a) (0x000024A0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C00_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C01(a) (0x000024A4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C01_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C02(a) (0x000024A8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C02_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C03(a) (0x000024AC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C03_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C10(a) (0x000024B0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C10_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C11(a) (0x000024B4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C11_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C12(a) (0x000024B8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C12_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C13(a) (0x000024BC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C13_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C20(a) (0x000024C0 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C20_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C21(a) (0x000024C4 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C21_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C22(a) (0x000024C8 + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C22_VALUE 20:0 +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C23(a) (0x000024CC + (a)*0x00000800) +#define NVCB7D_HEAD_SET_LTM_HIST_COEFF_C23_VALUE 20:0 + +#define NVCB7D_TILE_SET_TILE_SIZE(a) (0x00006000 + (a)*0x00000200) +#define NVCB7D_TILE_SET_TILE_SIZE_START 14:0 +#define NVCB7D_TILE_SET_TILE_SIZE_WIDTH 30:16 +#define NVCB7D_TILE_SET_CMI_LUT_SEGMENT_SIZE(a) (0x00006074 + (a)*0x00000200) +#define NVCB7D_TILE_SET_CMI_LUT_SEGMENT_SIZE_IDX 5:0 +#define NVCB7D_TILE_SET_CMI_LUT_SEGMENT_SIZE_VALUE 8:6 +#define NVCB7D_TILE_SET_CMI_LUT_ENTRY(a) (0x00006078 + (a)*0x00000200) +#define NVCB7D_TILE_SET_CMI_LUT_ENTRY_IDX 10:0 +#define NVCB7D_TILE_SET_CMI_LUT_ENTRY_VALUE 24:11 +#define NVCB7D_TILE_SET_CMI_LUT_ENTRY_LAST 25:25 +#define NVCB7D_TILE_SET_CMI_LUT_ENTRY_LAST_FALSE (0x00000000) +#define NVCB7D_TILE_SET_CMI_LUT_ENTRY_LAST_TRUE (0x00000001) +#define NVCB7D_TILE_SET_CMO_LUT_SEGMENT_SIZE(a) (0x0000607C + (a)*0x00000200) +#define NVCB7D_TILE_SET_CMO_LUT_SEGMENT_SIZE_IDX 5:0 +#define NVCB7D_TILE_SET_CMO_LUT_SEGMENT_SIZE_VALUE 8:6 +#define NVCB7D_TILE_SET_CMO_LUT_ENTRY(a) (0x00006080 + (a)*0x00000200) +#define NVCB7D_TILE_SET_CMO_LUT_ENTRY_IDX 10:0 +#define NVCB7D_TILE_SET_CMO_LUT_ENTRY_VALUE 26:11 +#define NVCB7D_TILE_SET_CMO_LUT_ENTRY_LAST 27:27 +#define NVCB7D_TILE_SET_CMO_LUT_ENTRY_LAST_FALSE (0x00000000) +#define NVCB7D_TILE_SET_CMO_LUT_ENTRY_LAST_TRUE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clcb7d_h diff --git a/userspace/sdks/nv570/inc/class/clcb7e.h b/userspace/sdks/nv570/inc/class/clcb7e.h new file mode 100644 index 0000000..de38e2e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb7e.h @@ -0,0 +1,906 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcb7e_h_ +#define _clcb7e_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCB7E_WINDOW_CHANNEL_DMA (0x0000CB7E) + +// dma opcode instructions +#define NVCB7E_DMA +#define NVCB7E_DMA_OPCODE 31:29 +#define NVCB7E_DMA_OPCODE_METHOD 0x00000000 +#define NVCB7E_DMA_OPCODE_JUMP 0x00000001 +#define NVCB7E_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVCB7E_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVCB7E_DMA_METHOD_COUNT 27:18 +#define NVCB7E_DMA_METHOD_OFFSET 15:2 +#define NVCB7E_DMA_DATA 31:0 +#define NVCB7E_DMA_DATA_NOP 0x00000000 +#define NVCB7E_DMA_JUMP_OFFSET 15:2 +#define NVCB7E_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVCB7E_PUT (0x00000000) +#define NVCB7E_PUT_PTR 13:0 +#define NVCB7E_GET (0x00000004) +#define NVCB7E_GET_PTR 13:0 +#define NVCB7E_UPDATE (0x00000200) +#define NVCB7E_UPDATE_RELEASE_ELV 0:0 +#define NVCB7E_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCB7E_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCB7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCB7E_UPDATE_INTERLOCK_WITH_WIN_IMM 12:12 +#define NVCB7E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000) +#define NVCB7E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001) +#define NVCB7E_UPDATE_FORCE_FULLSCREEN 16:16 +#define NVCB7E_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCB7E_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCB7E_SET_SEMAPHORE_ACQUIRE_HI (0x00000204) +#define NVCB7E_SET_SEMAPHORE_ACQUIRE_HI_VALUE 31:0 +#define NVCB7E_GET_LINE (0x00000208) +#define NVCB7E_GET_LINE_LINE 15:0 +#define NVCB7E_SET_SEMAPHORE_CONTROL (0x0000020C) +#define NVCB7E_SET_SEMAPHORE_CONTROL_SKIP_ACQ 11:11 +#define NVCB7E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_FALSE (0x00000000) +#define NVCB7E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_TRUE (0x00000001) +#define NVCB7E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVCB7E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVCB7E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVCB7E_SET_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVCB7E_SET_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVCB7E_SET_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVCB7E_SET_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVCB7E_SET_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVCB7E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVCB7E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCB7E_SET_SEMAPHORE_ACQUIRE (0x00000210) +#define NVCB7E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0 +#define NVCB7E_SET_SEMAPHORE_RELEASE (0x00000214) +#define NVCB7E_SET_SEMAPHORE_RELEASE_VALUE 31:0 +#define NVCB7E_SET_NOTIFIER_CONTROL (0x00000220) +#define NVCB7E_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVCB7E_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVCB7E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCB7E_SET_SIZE (0x00000224) +#define NVCB7E_SET_SIZE_WIDTH 15:0 +#define NVCB7E_SET_SIZE_HEIGHT 31:16 +#define NVCB7E_SET_STORAGE (0x00000228) +#define NVCB7E_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NVCB7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NVCB7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NVCB7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NVCB7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVCB7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVCB7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVCB7E_SET_PARAMS (0x0000022C) +#define NVCB7E_SET_PARAMS_FORMAT 7:0 +#define NVCB7E_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NVCB7E_SET_PARAMS_FORMAT_R4G4B4A4 (0x0000002F) +#define NVCB7E_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NVCB7E_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NVCB7E_SET_PARAMS_FORMAT_R5G5B5A1 (0x0000002E) +#define NVCB7E_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NVCB7E_SET_PARAMS_FORMAT_X8R8G8B8 (0x000000E6) +#define NVCB7E_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NVCB7E_SET_PARAMS_FORMAT_X8B8G8R8 (0x000000F9) +#define NVCB7E_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NVCB7E_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NVCB7E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NVCB7E_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NVCB7E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NVCB7E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422 (0x00000028) +#define NVCB7E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422 (0x00000029) +#define NVCB7E_SET_PARAMS_FORMAT_Y8___U8V8_N444 (0x00000035) +#define NVCB7E_SET_PARAMS_FORMAT_Y8___U8V8_N422 (0x00000036) +#define NVCB7E_SET_PARAMS_FORMAT_Y8___V8U8_N420 (0x00000038) +#define NVCB7E_SET_PARAMS_FORMAT_Y8___U8___V8_N444 (0x0000003A) +#define NVCB7E_SET_PARAMS_FORMAT_Y8___U8___V8_N420 (0x0000003B) +#define NVCB7E_SET_PARAMS_FORMAT_Y10___U10V10_N444 (0x00000055) +#define NVCB7E_SET_PARAMS_FORMAT_Y10___U10V10_N422 (0x00000056) +#define NVCB7E_SET_PARAMS_FORMAT_Y10___V10U10_N420 (0x00000058) +#define NVCB7E_SET_PARAMS_FORMAT_Y12___U12V12_N444 (0x00000075) +#define NVCB7E_SET_PARAMS_FORMAT_Y12___U12V12_N422 (0x00000076) +#define NVCB7E_SET_PARAMS_FORMAT_Y12___V12U12_N420 (0x00000078) +#define NVCB7E_SET_PARAMS_CLAMP_BEFORE_BLEND 18:18 +#define NVCB7E_SET_PARAMS_CLAMP_BEFORE_BLEND_DISABLE (0x00000000) +#define NVCB7E_SET_PARAMS_CLAMP_BEFORE_BLEND_ENABLE (0x00000001) +#define NVCB7E_SET_PARAMS_SWAP_UV 19:19 +#define NVCB7E_SET_PARAMS_SWAP_UV_DISABLE (0x00000000) +#define NVCB7E_SET_PARAMS_SWAP_UV_ENABLE (0x00000001) +#define NVCB7E_SET_PARAMS_FMT_ROUNDING_MODE 22:22 +#define NVCB7E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_TO_NEAREST (0x00000000) +#define NVCB7E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_DOWN (0x00000001) +#define NVCB7E_SET_PLANAR_STORAGE(b) (0x00000230 + (b)*0x00000004) +#define NVCB7E_SET_PLANAR_STORAGE_PITCH 12:0 +#define NVCB7E_SET_SEMAPHORE_RELEASE_HI (0x0000023C) +#define NVCB7E_SET_SEMAPHORE_RELEASE_HI_VALUE 31:0 +#define NVCB7E_SET_SURFACE_ADDRESS_HI_BEGUN_SEMAPHORE_ARRAY (0x00000240) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_BEGUN_SEMAPHORE_ARRAY_ADDRESS_HI 31:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY (0x00000244) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ADDRESS_LO 31:4 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET 3:2 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_IOVA (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ENABLE 0:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_FINISH_SEMAPHORE_ARRAY (0x00000248) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_FINISH_SEMAPHORE_ARRAY_ADDRESS_HI 31:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY (0x0000024C) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ADDRESS_LO 31:4 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET 3:2 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_IOVA (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ENABLE 0:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_POINT_IN(b) (0x00000290 + (b)*0x00000004) +#define NVCB7E_SET_POINT_IN_X 15:0 +#define NVCB7E_SET_POINT_IN_Y 31:16 +#define NVCB7E_SET_SIZE_IN (0x00000298) +#define NVCB7E_SET_SIZE_IN_WIDTH 15:0 +#define NVCB7E_SET_SIZE_IN_HEIGHT 31:16 +#define NVCB7E_SET_SIZE_OUT (0x000002A4) +#define NVCB7E_SET_SIZE_OUT_WIDTH 15:0 +#define NVCB7E_SET_SIZE_OUT_HEIGHT 31:16 +#define NVCB7E_SET_CONTROL_INPUT_SCALER (0x000002A8) +#define NVCB7E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVCB7E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVCB7E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVCB7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVCB7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVCB7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVCB7E_SET_CONTROL_INPUT_SCALER_VERTICAL_FORCE_ENABLE 8:8 +#define NVCB7E_SET_CONTROL_INPUT_SCALER_VERTICAL_FORCE_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_CONTROL_INPUT_SCALER_VERTICAL_FORCE_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_FORCE_ENABLE 9:9 +#define NVCB7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_FORCE_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_FORCE_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_INPUT_SCALER_COEFF_VALUE (0x000002AC) +#define NVCB7E_SET_INPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVCB7E_SET_INPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVCB7E_SET_COMPOSITION_CONTROL (0x000002EC) +#define NVCB7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVCB7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVCB7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVCB7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVCB7E_SET_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVCB7E_SET_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVCB7E_SET_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVCB7E_SET_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVCB7E_SET_COMPOSITION_CONSTANT_ALPHA (0x000002F0) +#define NVCB7E_SET_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVCB7E_SET_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT (0x000002F4) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCB7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCB7E_SET_KEY_ALPHA (0x000002F8) +#define NVCB7E_SET_KEY_ALPHA_MIN 15:0 +#define NVCB7E_SET_KEY_ALPHA_MAX 31:16 +#define NVCB7E_SET_KEY_RED_CR (0x000002FC) +#define NVCB7E_SET_KEY_RED_CR_MIN 15:0 +#define NVCB7E_SET_KEY_RED_CR_MAX 31:16 +#define NVCB7E_SET_KEY_GREEN_Y (0x00000300) +#define NVCB7E_SET_KEY_GREEN_Y_MIN 15:0 +#define NVCB7E_SET_KEY_GREEN_Y_MAX 31:16 +#define NVCB7E_SET_KEY_BLUE_CB (0x00000304) +#define NVCB7E_SET_KEY_BLUE_CB_MIN 15:0 +#define NVCB7E_SET_KEY_BLUE_CB_MAX 31:16 +#define NVCB7E_SET_PRESENT_CONTROL (0x00000308) +#define NVCB7E_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NVCB7E_SET_PRESENT_CONTROL_BEGIN_MODE 6:4 +#define NVCB7E_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000) +#define NVCB7E_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001) +#define NVCB7E_SET_PRESENT_CONTROL_TIMESTAMP_MODE 8:8 +#define NVCB7E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_DISABLE (0x00000000) +#define NVCB7E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_ENABLE (0x00000001) +#define NVCB7E_SET_PRESENT_CONTROL_STEREO_MODE 13:12 +#define NVCB7E_SET_PRESENT_CONTROL_STEREO_MODE_MONO (0x00000000) +#define NVCB7E_SET_PRESENT_CONTROL_STEREO_MODE_PAIR_FLIP (0x00000001) +#define NVCB7E_SET_PRESENT_CONTROL_STEREO_MODE_AT_ANY_FRAME (0x00000002) +#define NVCB7E_SET_ACQ_SEMAPHORE_VALUE_HI (0x0000030C) +#define NVCB7E_SET_ACQ_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVCB7E_SET_ACQ_SEMAPHORE_CONTROL (0x00000330) +#define NVCB7E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVCB7E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVCB7E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVCB7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVCB7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVCB7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVCB7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVCB7E_SET_ACQ_SEMAPHORE_VALUE (0x00000334) +#define NVCB7E_SET_ACQ_SEMAPHORE_VALUE_VALUE 31:0 +#define NVCB7E_SET_SCAN_DIRECTION (0x0000033C) +#define NVCB7E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION 0:0 +#define NVCB7E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_LEFT (0x00000000) +#define NVCB7E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_RIGHT (0x00000001) +#define NVCB7E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION 1:1 +#define NVCB7E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_TOP (0x00000000) +#define NVCB7E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_BOTTOM (0x00000001) +#define NVCB7E_SET_SCAN_DIRECTION_COLUMN_ORDER 2:2 +#define NVCB7E_SET_SCAN_DIRECTION_COLUMN_ORDER_FALSE (0x00000000) +#define NVCB7E_SET_SCAN_DIRECTION_COLUMN_ORDER_TRUE (0x00000001) +#define NVCB7E_SET_TIMESTAMP_ORIGIN_LO (0x00000340) +#define NVCB7E_SET_TIMESTAMP_ORIGIN_LO_TIMESTAMP_LO 31:0 +#define NVCB7E_SET_TIMESTAMP_ORIGIN_HI (0x00000344) +#define NVCB7E_SET_TIMESTAMP_ORIGIN_HI_TIMESTAMP_HI 31:0 +#define NVCB7E_SET_UPDATE_TIMESTAMP_LO (0x00000348) +#define NVCB7E_SET_UPDATE_TIMESTAMP_LO_TIMESTAMP_LO 31:0 +#define NVCB7E_SET_UPDATE_TIMESTAMP_HI (0x0000034C) +#define NVCB7E_SET_UPDATE_TIMESTAMP_HI_TIMESTAMP_HI 31:0 +#define NVCB7E_SET_INTERLOCK_FLAGS (0x00000370) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 0:0 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+1):((i)+1) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 1:1 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 2:2 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 3:3 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 4:4 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 5:5 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 6:6 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 7:7 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 8:8 +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVCB7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS (0x00000374) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVCB7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVCB7E_SET_CHROMA_VER (0x00000378) +#define NVCB7E_SET_CHROMA_VER_POSITION 1:0 +#define NVCB7E_SET_CHROMA_VER_POSITION_TOP (0x00000000) +#define NVCB7E_SET_CHROMA_VER_POSITION_CENTER (0x00000001) +#define NVCB7E_SET_CHROMA_VER_POSITION_BOTTOM (0x00000002) +#define NVCB7E_SET_CHROMA_VER_USE_SWPOSITION 2:2 +#define NVCB7E_SET_CHROMA_VER_USE_SWPOSITION_FALSE (0x00000000) +#define NVCB7E_SET_CHROMA_VER_USE_SWPOSITION_TRUE (0x00000001) +#define NVCB7E_SET_CHROMA_VER_WEIGHT_ODD 4:3 +#define NVCB7E_SET_CHROMA_VER_WEIGHT_ODD_WT_0 (0x00000000) +#define NVCB7E_SET_CHROMA_VER_WEIGHT_ODD_WT_QUARTER (0x00000001) +#define NVCB7E_SET_CHROMA_VER_WEIGHT_ODD_WT_HALF (0x00000002) +#define NVCB7E_SET_CHROMA_VER_WEIGHT_ODD_WT_THREE_QUARTER (0x00000003) +#define NVCB7E_SET_CHROMA_VER_WEIGHT_EVEN 6:5 +#define NVCB7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_0 (0x00000000) +#define NVCB7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_QUARTER (0x00000001) +#define NVCB7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_HALF (0x00000002) +#define NVCB7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_THREE_QUARTER (0x00000003) +#define NVCB7E_SET_CHROMA_VER_USE_SWWEIGHTS 7:7 +#define NVCB7E_SET_CHROMA_VER_USE_SWWEIGHTS_FALSE (0x00000000) +#define NVCB7E_SET_CHROMA_VER_USE_SWWEIGHTS_TRUE (0x00000001) +#define NVCB7E_SET_CHROMA_HOR (0x0000037C) +#define NVCB7E_SET_CHROMA_HOR_REPLACE_ODD 0:0 +#define NVCB7E_SET_CHROMA_HOR_REPLACE_ODD_DISABLE (0x00000000) +#define NVCB7E_SET_CHROMA_HOR_REPLACE_ODD_ENABLE (0x00000001) +#define NVCB7E_SET_CHROMA_HOR_REPLACE_EVEN 1:1 +#define NVCB7E_SET_CHROMA_HOR_REPLACE_EVEN_DISABLE (0x00000000) +#define NVCB7E_SET_CHROMA_HOR_REPLACE_EVEN_ENABLE (0x00000001) +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_ODD 3:2 +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_0 (0x00000000) +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_QUARTER (0x00000001) +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_HALF (0x00000002) +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_THREE_QUARTER (0x00000003) +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_EVEN 5:4 +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_0 (0x00000000) +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_QUARTER (0x00000001) +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_HALF (0x00000002) +#define NVCB7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_THREE_QUARTER (0x00000003) +#define NVCB7E_SET_CHROMA_HOR_USE_SWWEIGHTS 6:6 +#define NVCB7E_SET_CHROMA_HOR_USE_SWWEIGHTS_FALSE (0x00000000) +#define NVCB7E_SET_CHROMA_HOR_USE_SWWEIGHTS_TRUE (0x00000001) +#define NVCB7E_SET_EXT_PACKET_CONTROL (0x00000398) +#define NVCB7E_SET_EXT_PACKET_CONTROL_ENABLE 0:0 +#define NVCB7E_SET_EXT_PACKET_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_EXT_PACKET_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_EXT_PACKET_CONTROL_LOCATION 4:4 +#define NVCB7E_SET_EXT_PACKET_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVCB7E_SET_EXT_PACKET_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVCB7E_SET_EXT_PACKET_CONTROL_FREQUENCY 8:8 +#define NVCB7E_SET_EXT_PACKET_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVCB7E_SET_EXT_PACKET_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVCB7E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE 12:12 +#define NVCB7E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_DISABLE (0x00000000) +#define NVCB7E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_ENABLE (0x00000001) +#define NVCB7E_SET_EXT_PACKET_CONTROL_SIZE 27:16 +#define NVCB7E_SET_EXT_PACKET_DATA (0x0000039C) +#define NVCB7E_SET_EXT_PACKET_DATA_DB0 7:0 +#define NVCB7E_SET_EXT_PACKET_DATA_DB1 15:8 +#define NVCB7E_SET_EXT_PACKET_DATA_DB2 23:16 +#define NVCB7E_SET_EXT_PACKET_DATA_DB3 31:24 +#define NVCB7E_SET_WIN_INFOFRAME (0x000003A0) +#define NVCB7E_SET_WIN_INFOFRAME_FID 7:0 +#define NVCB7E_SET_WIN_INFOFRAME_EN 16:16 +#define NVCB7E_SET_WIN_INFOFRAME_EN_DISABLE (0x00000000) +#define NVCB7E_SET_WIN_INFOFRAME_EN_ENABLE (0x00000001) +#define NVCB7E_SET_FMT_COEFFICIENT_C00 (0x00000400) +#define NVCB7E_SET_FMT_COEFFICIENT_C00_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C01 (0x00000404) +#define NVCB7E_SET_FMT_COEFFICIENT_C01_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C02 (0x00000408) +#define NVCB7E_SET_FMT_COEFFICIENT_C02_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C03 (0x0000040C) +#define NVCB7E_SET_FMT_COEFFICIENT_C03_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C10 (0x00000410) +#define NVCB7E_SET_FMT_COEFFICIENT_C10_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C11 (0x00000414) +#define NVCB7E_SET_FMT_COEFFICIENT_C11_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C12 (0x00000418) +#define NVCB7E_SET_FMT_COEFFICIENT_C12_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C13 (0x0000041C) +#define NVCB7E_SET_FMT_COEFFICIENT_C13_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C20 (0x00000420) +#define NVCB7E_SET_FMT_COEFFICIENT_C20_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C21 (0x00000424) +#define NVCB7E_SET_FMT_COEFFICIENT_C21_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C22 (0x00000428) +#define NVCB7E_SET_FMT_COEFFICIENT_C22_VALUE 20:0 +#define NVCB7E_SET_FMT_COEFFICIENT_C23 (0x0000042C) +#define NVCB7E_SET_FMT_COEFFICIENT_C23_VALUE 20:0 +#define NVCB7E_SET_ILUT_CONTROL (0x00000440) +#define NVCB7E_SET_ILUT_CONTROL_INTERPOLATE 0:0 +#define NVCB7E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7E_SET_ILUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7E_SET_ILUT_CONTROL_MIRROR 1:1 +#define NVCB7E_SET_ILUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCB7E_SET_ILUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCB7E_SET_ILUT_CONTROL_MODE 3:2 +#define NVCB7E_SET_ILUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVCB7E_SET_ILUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVCB7E_SET_ILUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVCB7E_SET_ILUT_CONTROL_SIZE 18:8 +#define NVCB7E_SET_CSC00CONTROL (0x0000045C) +#define NVCB7E_SET_CSC00CONTROL_ENABLE 0:0 +#define NVCB7E_SET_CSC00CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_CSC00CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_CSC00COEFFICIENT_C00 (0x00000460) +#define NVCB7E_SET_CSC00COEFFICIENT_C00_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C01 (0x00000464) +#define NVCB7E_SET_CSC00COEFFICIENT_C01_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C02 (0x00000468) +#define NVCB7E_SET_CSC00COEFFICIENT_C02_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C03 (0x0000046C) +#define NVCB7E_SET_CSC00COEFFICIENT_C03_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C10 (0x00000470) +#define NVCB7E_SET_CSC00COEFFICIENT_C10_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C11 (0x00000474) +#define NVCB7E_SET_CSC00COEFFICIENT_C11_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C12 (0x00000478) +#define NVCB7E_SET_CSC00COEFFICIENT_C12_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C13 (0x0000047C) +#define NVCB7E_SET_CSC00COEFFICIENT_C13_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C20 (0x00000480) +#define NVCB7E_SET_CSC00COEFFICIENT_C20_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C21 (0x00000484) +#define NVCB7E_SET_CSC00COEFFICIENT_C21_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C22 (0x00000488) +#define NVCB7E_SET_CSC00COEFFICIENT_C22_VALUE 20:0 +#define NVCB7E_SET_CSC00COEFFICIENT_C23 (0x0000048C) +#define NVCB7E_SET_CSC00COEFFICIENT_C23_VALUE 20:0 +#define NVCB7E_SET_CSC0LUT_FP_NORM_SCALE (0x00000490) +#define NVCB7E_SET_CSC0LUT_FP_NORM_SCALE_VALUE 31:0 +#define NVCB7E_SET_CSC0LUT_CONTROL (0x000004A0) +#define NVCB7E_SET_CSC0LUT_CONTROL_INTERPOLATE 0:0 +#define NVCB7E_SET_CSC0LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7E_SET_CSC0LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7E_SET_CSC0LUT_CONTROL_MIRROR 1:1 +#define NVCB7E_SET_CSC0LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCB7E_SET_CSC0LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCB7E_SET_CSC0LUT_CONTROL_ENABLE 4:4 +#define NVCB7E_SET_CSC0LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_CSC0LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_CSC0LUT_CONTROL_CURVE 6:5 +#define NVCB7E_SET_CSC0LUT_CONTROL_CURVE_CSCLUT_PQ (0x00000000) +#define NVCB7E_SET_CSC0LUT_CONTROL_CURVE_CSCLUT_HLG (0x00000001) +#define NVCB7E_SET_CSC0LUT_CONTROL_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCB7E_SET_CSC01CONTROL (0x000004BC) +#define NVCB7E_SET_CSC01CONTROL_ENABLE 0:0 +#define NVCB7E_SET_CSC01CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_CSC01CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_CSC01COEFFICIENT_C00 (0x000004C0) +#define NVCB7E_SET_CSC01COEFFICIENT_C00_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C01 (0x000004C4) +#define NVCB7E_SET_CSC01COEFFICIENT_C01_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C02 (0x000004C8) +#define NVCB7E_SET_CSC01COEFFICIENT_C02_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C03 (0x000004CC) +#define NVCB7E_SET_CSC01COEFFICIENT_C03_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C10 (0x000004D0) +#define NVCB7E_SET_CSC01COEFFICIENT_C10_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C11 (0x000004D4) +#define NVCB7E_SET_CSC01COEFFICIENT_C11_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C12 (0x000004D8) +#define NVCB7E_SET_CSC01COEFFICIENT_C12_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C13 (0x000004DC) +#define NVCB7E_SET_CSC01COEFFICIENT_C13_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C20 (0x000004E0) +#define NVCB7E_SET_CSC01COEFFICIENT_C20_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C21 (0x000004E4) +#define NVCB7E_SET_CSC01COEFFICIENT_C21_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C22 (0x000004E8) +#define NVCB7E_SET_CSC01COEFFICIENT_C22_VALUE 20:0 +#define NVCB7E_SET_CSC01COEFFICIENT_C23 (0x000004EC) +#define NVCB7E_SET_CSC01COEFFICIENT_C23_VALUE 20:0 +#define NVCB7E_SET_TMO_CONTROL (0x00000500) +#define NVCB7E_SET_TMO_CONTROL_INTERPOLATE 0:0 +#define NVCB7E_SET_TMO_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7E_SET_TMO_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7E_SET_TMO_CONTROL_SAT_MODE 3:2 +#define NVCB7E_SET_TMO_CONTROL_SIZE 18:8 +#define NVCB7E_SET_TMO_LOW_INTENSITY_ZONE (0x00000508) +#define NVCB7E_SET_TMO_LOW_INTENSITY_ZONE_END 29:16 +#define NVCB7E_SET_TMO_LOW_INTENSITY_VALUE (0x0000050C) +#define NVCB7E_SET_TMO_LOW_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVCB7E_SET_TMO_LOW_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVCB7E_SET_TMO_LOW_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVCB7E_SET_TMO_MEDIUM_INTENSITY_ZONE (0x00000510) +#define NVCB7E_SET_TMO_MEDIUM_INTENSITY_ZONE_START 13:0 +#define NVCB7E_SET_TMO_MEDIUM_INTENSITY_ZONE_END 29:16 +#define NVCB7E_SET_TMO_MEDIUM_INTENSITY_VALUE (0x00000514) +#define NVCB7E_SET_TMO_MEDIUM_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVCB7E_SET_TMO_MEDIUM_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVCB7E_SET_TMO_MEDIUM_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVCB7E_SET_TMO_HIGH_INTENSITY_ZONE (0x00000518) +#define NVCB7E_SET_TMO_HIGH_INTENSITY_ZONE_START 13:0 +#define NVCB7E_SET_TMO_HIGH_INTENSITY_VALUE (0x0000051C) +#define NVCB7E_SET_TMO_HIGH_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVCB7E_SET_TMO_HIGH_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVCB7E_SET_TMO_HIGH_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVCB7E_SET_CSC10CONTROL (0x0000053C) +#define NVCB7E_SET_CSC10CONTROL_ENABLE 0:0 +#define NVCB7E_SET_CSC10CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_CSC10CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_CSC10COEFFICIENT_C00 (0x00000540) +#define NVCB7E_SET_CSC10COEFFICIENT_C00_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C01 (0x00000544) +#define NVCB7E_SET_CSC10COEFFICIENT_C01_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C02 (0x00000548) +#define NVCB7E_SET_CSC10COEFFICIENT_C02_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C03 (0x0000054C) +#define NVCB7E_SET_CSC10COEFFICIENT_C03_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C10 (0x00000550) +#define NVCB7E_SET_CSC10COEFFICIENT_C10_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C11 (0x00000554) +#define NVCB7E_SET_CSC10COEFFICIENT_C11_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C12 (0x00000558) +#define NVCB7E_SET_CSC10COEFFICIENT_C12_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C13 (0x0000055C) +#define NVCB7E_SET_CSC10COEFFICIENT_C13_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C20 (0x00000560) +#define NVCB7E_SET_CSC10COEFFICIENT_C20_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C21 (0x00000564) +#define NVCB7E_SET_CSC10COEFFICIENT_C21_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C22 (0x00000568) +#define NVCB7E_SET_CSC10COEFFICIENT_C22_VALUE 20:0 +#define NVCB7E_SET_CSC10COEFFICIENT_C23 (0x0000056C) +#define NVCB7E_SET_CSC10COEFFICIENT_C23_VALUE 20:0 +#define NVCB7E_SET_CSC1LUT_FP_SCALE (0x00000570) +#define NVCB7E_SET_CSC1LUT_FP_SCALE_VALUE 15:0 +#define NVCB7E_SET_CSC1LUT_CONTROL (0x00000580) +#define NVCB7E_SET_CSC1LUT_CONTROL_INTERPOLATE 0:0 +#define NVCB7E_SET_CSC1LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCB7E_SET_CSC1LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCB7E_SET_CSC1LUT_CONTROL_MIRROR 1:1 +#define NVCB7E_SET_CSC1LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCB7E_SET_CSC1LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCB7E_SET_CSC1LUT_CONTROL_ENABLE 4:4 +#define NVCB7E_SET_CSC1LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_CSC1LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_CSC1LUT_CONTROL_CURVE 6:5 +#define NVCB7E_SET_CSC1LUT_CONTROL_CURVE_CSCLUT_PQ (0x00000000) +#define NVCB7E_SET_CSC1LUT_CONTROL_CURVE_CSCLUT_HLG (0x00000001) +#define NVCB7E_SET_CSC1LUT_CONTROL_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCB7E_SET_CSC11CONTROL (0x0000059C) +#define NVCB7E_SET_CSC11CONTROL_ENABLE 0:0 +#define NVCB7E_SET_CSC11CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_CSC11CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_CSC11CONTROL_LEVEL 7:2 +#define NVCB7E_SET_CSC11COEFFICIENT_C00 (0x000005A0) +#define NVCB7E_SET_CSC11COEFFICIENT_C00_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C01 (0x000005A4) +#define NVCB7E_SET_CSC11COEFFICIENT_C01_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C02 (0x000005A8) +#define NVCB7E_SET_CSC11COEFFICIENT_C02_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C03 (0x000005AC) +#define NVCB7E_SET_CSC11COEFFICIENT_C03_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C10 (0x000005B0) +#define NVCB7E_SET_CSC11COEFFICIENT_C10_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C11 (0x000005B4) +#define NVCB7E_SET_CSC11COEFFICIENT_C11_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C12 (0x000005B8) +#define NVCB7E_SET_CSC11COEFFICIENT_C12_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C13 (0x000005BC) +#define NVCB7E_SET_CSC11COEFFICIENT_C13_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C20 (0x000005C0) +#define NVCB7E_SET_CSC11COEFFICIENT_C20_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C21 (0x000005C4) +#define NVCB7E_SET_CSC11COEFFICIENT_C21_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C22 (0x000005C8) +#define NVCB7E_SET_CSC11COEFFICIENT_C22_VALUE 20:0 +#define NVCB7E_SET_CSC11COEFFICIENT_C23 (0x000005CC) +#define NVCB7E_SET_CSC11COEFFICIENT_C23_VALUE 20:0 +#define NVCB7E_SET_CLAMP_RANGE (0x000005D0) +#define NVCB7E_SET_CLAMP_RANGE_LOW 15:0 +#define NVCB7E_SET_CLAMP_RANGE_HIGH 31:16 +#define NVCB7E_SW_RESERVED(b) (0x000005D4 + (b)*0x00000004) +#define NVCB7E_SW_RESERVED_VALUE 31:0 +#define NVCB7E_SET_DIRTY_RECT_SIZE (0x000005E4) +#define NVCB7E_SET_DIRTY_RECT_SIZE_WIDTH 15:0 +#define NVCB7E_SET_DIRTY_RECT_SIZE_HEIGHT 31:16 +#define NVCB7E_SET_DIRTY_RECT_POSITION (0x000005E8) +#define NVCB7E_SET_DIRTY_RECT_POSITION_X 15:0 +#define NVCB7E_SET_DIRTY_RECT_POSITION_Y 31:16 +#define NVCB7E_SET_SUPERFRAME (0x000005EC) +#define NVCB7E_SET_SUPERFRAME_ENABLE 0:0 +#define NVCB7E_SET_SUPERFRAME_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_SUPERFRAME_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_SUPERFRAME_MODE 2:1 +#define NVCB7E_SET_SUPERFRAME_MODE_FIXED (0x00000000) +#define NVCB7E_SET_SUPERFRAME_MODE_DYNAMIC (0x00000001) +#define NVCB7E_SET_SUPERFRAME_MODE_SW (0x00000003) +#define NVCB7E_SET_SUPERFRAME_RATIO_IN 15:8 +#define NVCB7E_SET_SUPERFRAME_RATIO_OUT 23:16 +#define NVCB7E_SET_SUPERFRAME_START_COUNT 31:24 +#define NVCB7E_SET_INFOFRAME_CTRL(b) (0x000005F0 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_CTRL_ENABLE 0:0 +#define NVCB7E_SET_INFOFRAME_CTRL_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_INFOFRAME_CTRL_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_INFOFRAME_CTRL_LOCATION 5:4 +#define NVCB7E_SET_INFOFRAME_CTRL_LOCATION_VBLANK (0x00000000) +#define NVCB7E_SET_INFOFRAME_CTRL_LOCATION_VSYNC (0x00000001) +#define NVCB7E_SET_INFOFRAME_CTRL_LOCATION_LINE (0x00000002) +#define NVCB7E_SET_INFOFRAME_CTRL_LINE_ID 30:16 +#define NVCB7E_SET_INFOFRAME_CTRL_LINE_ID_REVERSED 31:31 +#define NVCB7E_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCB7E_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCB7E_SET_INFOFRAME_HEADER(b) (0x000005F8 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_HEADER_HB0 7:0 +#define NVCB7E_SET_INFOFRAME_HEADER_HB1 15:8 +#define NVCB7E_SET_INFOFRAME_HEADER_HB2 23:16 +#define NVCB7E_SET_INFOFRAME_HEADER_HB3 31:24 +#define NVCB7E_SET_INFOFRAME_DATA0(b) (0x00000600 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_DATA0_DB0 7:0 +#define NVCB7E_SET_INFOFRAME_DATA0_DB1 15:8 +#define NVCB7E_SET_INFOFRAME_DATA0_DB2 23:16 +#define NVCB7E_SET_INFOFRAME_DATA0_DB3 31:24 +#define NVCB7E_SET_INFOFRAME_DATA1(b) (0x00000608 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_DATA1_DB4 7:0 +#define NVCB7E_SET_INFOFRAME_DATA1_DB5 15:8 +#define NVCB7E_SET_INFOFRAME_DATA1_DB6 23:16 +#define NVCB7E_SET_INFOFRAME_DATA1_DB7 31:24 +#define NVCB7E_SET_INFOFRAME_DATA2(b) (0x00000610 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_DATA2_DB8 7:0 +#define NVCB7E_SET_INFOFRAME_DATA2_DB9 15:8 +#define NVCB7E_SET_INFOFRAME_DATA2_DB10 23:16 +#define NVCB7E_SET_INFOFRAME_DATA2_DB11 31:24 +#define NVCB7E_SET_INFOFRAME_DATA3(b) (0x00000618 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_DATA3_DB12 7:0 +#define NVCB7E_SET_INFOFRAME_DATA3_DB13 15:8 +#define NVCB7E_SET_INFOFRAME_DATA3_DB14 23:16 +#define NVCB7E_SET_INFOFRAME_DATA3_DB15 31:24 +#define NVCB7E_SET_INFOFRAME_DATA4(b) (0x00000620 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_DATA4_DB16 7:0 +#define NVCB7E_SET_INFOFRAME_DATA4_DB17 15:8 +#define NVCB7E_SET_INFOFRAME_DATA4_DB18 23:16 +#define NVCB7E_SET_INFOFRAME_DATA4_DB19 31:24 +#define NVCB7E_SET_INFOFRAME_DATA5(b) (0x00000628 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_DATA5_DB20 7:0 +#define NVCB7E_SET_INFOFRAME_DATA5_DB21 15:8 +#define NVCB7E_SET_INFOFRAME_DATA5_DB22 23:16 +#define NVCB7E_SET_INFOFRAME_DATA5_DB23 31:24 +#define NVCB7E_SET_INFOFRAME_DATA6(b) (0x00000630 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_DATA6_DB24 7:0 +#define NVCB7E_SET_INFOFRAME_DATA6_DB25 15:8 +#define NVCB7E_SET_INFOFRAME_DATA6_DB26 23:16 +#define NVCB7E_SET_INFOFRAME_DATA6_DB27 31:24 +#define NVCB7E_SET_INFOFRAME_DATA7(b) (0x00000638 + (b)*0x00000004) +#define NVCB7E_SET_INFOFRAME_DATA7_DB28 7:0 +#define NVCB7E_SET_INFOFRAME_DATA7_DB29 15:8 +#define NVCB7E_SET_INFOFRAME_DATA7_DB30 23:16 +#define NVCB7E_SET_INFOFRAME_DATA7_DB31 31:24 +#define NVCB7E_SET_SURFACE_ADDRESS_HI_SEMAPHORE (0x00000640) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_SEMAPHORE_ADDRESS_HI 31:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE (0x00000644) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ADDRESS_LO 31:4 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET 3:2 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE 0:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE (0x00000648) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE_ADDRESS_HI 31:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE (0x0000064C) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ADDRESS_LO 31:4 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET 3:2 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE 0:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000650) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000654) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_ISO(b) (0x00000658 + (b)*0x00000004) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_ISO_ADDRESS_HI 31:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO(b) (0x00000670 + (b)*0x00000004) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_ADDRESS_LO 31:4 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET 3:2 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_IOVA (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_KIND 1:1 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_KIND_PITCH (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_KIND_BLOCKLINEAR (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE 0:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_ILUT (0x00000688) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_ILUT_ADDRESS_HI 31:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT (0x0000068C) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT_ADDRESS_LO 31:4 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET 3:2 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_IOVA (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE 0:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_ENABLE (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_TMO_LUT (0x00000690) +#define NVCB7E_SET_SURFACE_ADDRESS_HI_TMO_LUT_ADDRESS_HI 31:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT (0x00000694) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ADDRESS_LO 31:4 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET 3:2 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_IOVA (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE 0:0 +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_DISABLE (0x00000000) +#define NVCB7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clcb7e_h diff --git a/userspace/sdks/nv570/inc/class/clcb97.h b/userspace/sdks/nv570/inc/class/clcb97.h new file mode 100644 index 0000000..7528a2d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb97.h @@ -0,0 +1,4480 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cl_hopper_a_h_ +#define _cl_hopper_a_h_ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ +/* Command: ../../../../class/bin/sw_header.pl hopper_a */ + +#include "nvtypes.h" + +#define HOPPER_A 0xCB97 + +#define NVCB97_SET_OBJECT 0x0000 +#define NVCB97_SET_OBJECT_CLASS_ID 15:0 +#define NVCB97_SET_OBJECT_ENGINE_ID 20:16 + +#define NVCB97_NO_OPERATION 0x0100 +#define NVCB97_NO_OPERATION_V 31:0 + +#define NVCB97_SET_NOTIFY_A 0x0104 +#define NVCB97_SET_NOTIFY_A_ADDRESS_UPPER 24:0 + +#define NVCB97_SET_NOTIFY_B 0x0108 +#define NVCB97_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVCB97_NOTIFY 0x010c +#define NVCB97_NOTIFY_TYPE 31:0 +#define NVCB97_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVCB97_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVCB97_WAIT_FOR_IDLE 0x0110 +#define NVCB97_WAIT_FOR_IDLE_V 31:0 + +#define NVCB97_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVCB97_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVCB97_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVCB97_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVCB97_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVCB97_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVCB97_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVCB97_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVCB97_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVCB97_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVCB97_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVCB97_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVCB97_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVCB97_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVCB97_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER 0x0128 +#define NVCB97_PEER_SEMAPHORE_RELEASE_OFFSET_UPPER_V 7:0 + +#define NVCB97_PEER_SEMAPHORE_RELEASE_OFFSET 0x012c +#define NVCB97_PEER_SEMAPHORE_RELEASE_OFFSET_V 31:0 + +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVCB97_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVCB97_SEND_GO_IDLE 0x013c +#define NVCB97_SEND_GO_IDLE_V 31:0 + +#define NVCB97_PM_TRIGGER 0x0140 +#define NVCB97_PM_TRIGGER_V 31:0 + +#define NVCB97_PM_TRIGGER_WFI 0x0144 +#define NVCB97_PM_TRIGGER_WFI_V 31:0 + +#define NVCB97_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVCB97_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVCB97_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVCB97_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVCB97_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVCB97_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVCB97_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVCB97_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVCB97_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER 0x0158 +#define NVCB97_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER_PAYLOAD_LOWER 31:0 + +#define NVCB97_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER 0x015c +#define NVCB97_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER_PAYLOAD_UPPER 31:0 + +#define NVCB97_SET_REPORT_SEMAPHORE_ADDRESS_LOWER 0x0160 +#define NVCB97_SET_REPORT_SEMAPHORE_ADDRESS_LOWER_LOWER 31:0 + +#define NVCB97_SET_REPORT_SEMAPHORE_ADDRESS_UPPER 0x0164 +#define NVCB97_SET_REPORT_SEMAPHORE_ADDRESS_UPPER_UPPER 24:0 + +#define NVCB97_REPORT_SEMAPHORE_EXECUTE 0x0168 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_OPERATION 1:0 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_OPERATION_RELEASE 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_OPERATION_ACQUIRE 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_OPERATION_REPORT_ONLY 0x00000002 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_OPERATION_TRAP 0x00000003 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION 5:2 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_NONE 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_VPC 0x00000004 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PIPELINE_LOCATION_ALL 0x0000000F +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE 6:6 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT 11:7 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_NONE 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_VS_INVOCATIONS 0x00000005 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_TI_INVOCATIONS 0x0000001B +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_TS_INVOCATIONS 0x0000001D +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_GS_INVOCATIONS 0x00000007 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_SCG_CLOCKS 0x00000008 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS0 0x0000000A +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS1 0x0000000C +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS2 0x0000000E +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_ZCULL_STATS3 0x00000010 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_PS_INVOCATIONS 0x00000013 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REPORT_TIMESTAMP 0x00000014 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE 14:13 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_SUB_REPORT 17:15 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE 19:19 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_FALSE 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_TRUE 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_ROP_FLUSH_DISABLE 18:18 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_ROP_FLUSH_DISABLE_FALSE 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_ROP_FLUSH_DISABLE_TRUE 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE 20:20 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP 23:21 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_INC 0x00000003 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_AND 0x00000005 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_OR 0x00000006 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT 25:24 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64 27:27 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_FALSE 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_TRUE 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE 29:28 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVCB97_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 + +#define NVCB97_LINE_LENGTH_IN 0x0180 +#define NVCB97_LINE_LENGTH_IN_VALUE 31:0 + +#define NVCB97_LINE_COUNT 0x0184 +#define NVCB97_LINE_COUNT_VALUE 31:0 + +#define NVCB97_OFFSET_OUT_UPPER 0x0188 +#define NVCB97_OFFSET_OUT_UPPER_VALUE 24:0 + +#define NVCB97_OFFSET_OUT 0x018c +#define NVCB97_OFFSET_OUT_VALUE 31:0 + +#define NVCB97_PITCH_OUT 0x0190 +#define NVCB97_PITCH_OUT_VALUE 31:0 + +#define NVCB97_SET_DST_BLOCK_SIZE 0x0194 +#define NVCB97_SET_DST_BLOCK_SIZE_WIDTH 3:0 +#define NVCB97_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVCB97_SET_DST_BLOCK_SIZE_HEIGHT 7:4 +#define NVCB97_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVCB97_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVCB97_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVCB97_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVCB97_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVCB97_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_SET_DST_BLOCK_SIZE_DEPTH 11:8 +#define NVCB97_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 +#define NVCB97_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001 +#define NVCB97_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002 +#define NVCB97_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003 +#define NVCB97_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVCB97_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005 + +#define NVCB97_SET_DST_WIDTH 0x0198 +#define NVCB97_SET_DST_WIDTH_V 31:0 + +#define NVCB97_SET_DST_HEIGHT 0x019c +#define NVCB97_SET_DST_HEIGHT_V 31:0 + +#define NVCB97_SET_DST_DEPTH 0x01a0 +#define NVCB97_SET_DST_DEPTH_V 31:0 + +#define NVCB97_SET_DST_LAYER 0x01a4 +#define NVCB97_SET_DST_LAYER_V 31:0 + +#define NVCB97_SET_DST_ORIGIN_BYTES_X 0x01a8 +#define NVCB97_SET_DST_ORIGIN_BYTES_X_V 20:0 + +#define NVCB97_SET_DST_ORIGIN_SAMPLES_Y 0x01ac +#define NVCB97_SET_DST_ORIGIN_SAMPLES_Y_V 16:0 + +#define NVCB97_LAUNCH_DMA 0x01b0 +#define NVCB97_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVCB97_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVCB97_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVCB97_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVCB97_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVCB97_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVCB97_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVCB97_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVCB97_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVCB97_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVCB97_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVCB97_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVCB97_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVCB97_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVCB97_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCB97_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCB97_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVCB97_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCB97_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCB97_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCB97_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVCB97_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCB97_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVCB97_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVCB97_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCB97_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVCB97_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVCB97_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVCB97_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVCB97_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVCB97_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVCB97_LOAD_INLINE_DATA 0x01b4 +#define NVCB97_LOAD_INLINE_DATA_V 31:0 + +#define NVCB97_SET_I2M_SEMAPHORE_A 0x01dc +#define NVCB97_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 24:0 + +#define NVCB97_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVCB97_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVCB97_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVCB97_SET_MME_SWITCH_STATE 0x01ec +#define NVCB97_SET_MME_SWITCH_STATE_VALID 0:0 +#define NVCB97_SET_MME_SWITCH_STATE_VALID_FALSE 0x00000000 +#define NVCB97_SET_MME_SWITCH_STATE_VALID_TRUE 0x00000001 +#define NVCB97_SET_MME_SWITCH_STATE_SAVE_MACRO 11:4 +#define NVCB97_SET_MME_SWITCH_STATE_RESTORE_MACRO 19:12 + +#define NVCB97_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVCB97_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVCB97_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVCB97_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVCB97_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVCB97_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVCB97_SET_I2M_SPARE_NOOP03 0x01fc +#define NVCB97_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVCB97_RUN_DS_NOW 0x0200 +#define NVCB97_RUN_DS_NOW_V 31:0 + +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS 0x0204 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD 4:0 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_INSTANTANEOUS 0x00000000 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16 0x00000001 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32 0x00000002 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__64 0x00000003 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__128 0x00000004 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__256 0x00000005 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__512 0x00000006 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1024 0x00000007 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2048 0x00000008 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4096 0x00000009 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__8192 0x0000000A +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__16384 0x0000000B +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__32768 0x0000000C +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__65536 0x0000000D +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__131072 0x0000000E +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__262144 0x0000000F +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__524288 0x00000010 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__1048576 0x00000011 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__2097152 0x00000012 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD__4194304 0x00000013 +#define NVCB97_SET_OPPORTUNISTIC_EARLY_Z_HYSTERESIS_ACCUMULATED_PRIM_AREA_THRESHOLD_LATEZ_ALWAYS 0x0000001F + +#define NVCB97_SET_GS_MODE 0x0208 +#define NVCB97_SET_GS_MODE_TYPE 0:0 +#define NVCB97_SET_GS_MODE_TYPE_ANY 0x00000000 +#define NVCB97_SET_GS_MODE_TYPE_FAST_GS 0x00000001 + +#define NVCB97_SET_ALIASED_LINE_WIDTH_ENABLE 0x020c +#define NVCB97_SET_ALIASED_LINE_WIDTH_ENABLE_V 0:0 +#define NVCB97_SET_ALIASED_LINE_WIDTH_ENABLE_V_FALSE 0x00000000 +#define NVCB97_SET_ALIASED_LINE_WIDTH_ENABLE_V_TRUE 0x00000001 + +#define NVCB97_SET_API_MANDATED_EARLY_Z 0x0210 +#define NVCB97_SET_API_MANDATED_EARLY_Z_ENABLE 0:0 +#define NVCB97_SET_API_MANDATED_EARLY_Z_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_API_MANDATED_EARLY_Z_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_GS_DM_FIFO 0x0214 +#define NVCB97_SET_GS_DM_FIFO_SIZE_RASTER_ON 12:0 +#define NVCB97_SET_GS_DM_FIFO_SIZE_RASTER_OFF 28:16 +#define NVCB97_SET_GS_DM_FIFO_SPILL_ENABLED 31:31 +#define NVCB97_SET_GS_DM_FIFO_SPILL_ENABLED_FALSE 0x00000000 +#define NVCB97_SET_GS_DM_FIFO_SPILL_ENABLED_TRUE 0x00000001 + +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS 0x0218 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY 5:4 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_PREFETCH_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVCB97_INVALIDATE_SHADER_CACHES 0x021c +#define NVCB97_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVCB97_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVCB97_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVCB97_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVCB97_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVCB97_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVCB97_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVCB97_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVCB97_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVCB97_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVCB97_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVCB97_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVCB97_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVCB97_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVCB97_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVCB97_SET_INSTANCE_COUNT 0x0220 +#define NVCB97_SET_INSTANCE_COUNT_V 31:0 + +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_ENABLE 0x0224 +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE 0:0 +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_ENABLE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_GO_IDLE_TIMEOUT 0x022c +#define NVCB97_SET_GO_IDLE_TIMEOUT_V 31:0 + +#define NVCB97_SET_MME_VERSION 0x0234 +#define NVCB97_SET_MME_VERSION_MAJOR 7:0 + +#define NVCB97_SET_INDEX_BUFFER_SIZE_A 0x0238 +#define NVCB97_SET_INDEX_BUFFER_SIZE_A_UPPER 7:0 + +#define NVCB97_SET_INDEX_BUFFER_SIZE_B 0x023c +#define NVCB97_SET_INDEX_BUFFER_SIZE_B_LOWER 31:0 + +#define NVCB97_SET_ROOT_TABLE_VISIBILITY(i) (0x0240+(i)*4) +#define NVCB97_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP0_ENABLE 1:0 +#define NVCB97_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP1_ENABLE 5:4 +#define NVCB97_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP2_ENABLE 9:8 +#define NVCB97_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP3_ENABLE 13:12 +#define NVCB97_SET_ROOT_TABLE_VISIBILITY_BINDING_GROUP4_ENABLE 17:16 + +#define NVCB97_SET_DRAW_CONTROL_A 0x0260 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY 3:0 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_POINTS 0x00000000 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_LINES 0x00000001 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLES 0x00000004 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_QUADS 0x00000007 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_POLYGON 0x00000009 +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_SET_DRAW_CONTROL_A_TOPOLOGY_PATCH 0x0000000E +#define NVCB97_SET_DRAW_CONTROL_A_PRIMITIVE_ID 4:4 +#define NVCB97_SET_DRAW_CONTROL_A_PRIMITIVE_ID_FIRST 0x00000000 +#define NVCB97_SET_DRAW_CONTROL_A_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVCB97_SET_DRAW_CONTROL_A_INSTANCE_ID 6:5 +#define NVCB97_SET_DRAW_CONTROL_A_INSTANCE_ID_FIRST 0x00000000 +#define NVCB97_SET_DRAW_CONTROL_A_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVCB97_SET_DRAW_CONTROL_A_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVCB97_SET_DRAW_CONTROL_A_SPLIT_MODE 8:7 +#define NVCB97_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVCB97_SET_DRAW_CONTROL_A_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVCB97_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVCB97_SET_DRAW_CONTROL_A_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVCB97_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE 9:9 +#define NVCB97_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_DRAW_CONTROL_A_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX 10:10 +#define NVCB97_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_FALSE 0x00000000 +#define NVCB97_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_VERTEX_INDEX_TRUE 0x00000001 +#define NVCB97_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX 11:11 +#define NVCB97_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_FALSE 0x00000000 +#define NVCB97_SET_DRAW_CONTROL_A_IGNORE_GLOBAL_BASE_INSTANCE_INDEX_TRUE 0x00000001 + +#define NVCB97_SET_DRAW_CONTROL_B 0x0264 +#define NVCB97_SET_DRAW_CONTROL_B_INSTANCE_COUNT 31:0 + +#define NVCB97_DRAW_INDEX_BUFFER_BEGIN_END_A 0x0268 +#define NVCB97_DRAW_INDEX_BUFFER_BEGIN_END_A_FIRST 31:0 + +#define NVCB97_DRAW_INDEX_BUFFER_BEGIN_END_B 0x026c +#define NVCB97_DRAW_INDEX_BUFFER_BEGIN_END_B_COUNT 31:0 + +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_A 0x0270 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_A_START 31:0 + +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_B 0x0274 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_B_COUNT 31:0 + +#define NVCB97_INVALIDATE_RASTER_CACHE_NO_WFI 0x027c +#define NVCB97_INVALIDATE_RASTER_CACHE_NO_WFI_V 0:0 + +#define NVCB97_SET_COLOR_RENDER_TO_ZETA_SURFACE 0x02b8 +#define NVCB97_SET_COLOR_RENDER_TO_ZETA_SURFACE_V 0:0 +#define NVCB97_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_FALSE 0x00000000 +#define NVCB97_SET_COLOR_RENDER_TO_ZETA_SURFACE_V_TRUE 0x00000001 + +#define NVCB97_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION 0x02bc +#define NVCB97_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V 0:0 +#define NVCB97_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_VISIBLE_PRIM_OPTIMIZATION_V_TRUE 0x00000001 + +#define NVCB97_INCREMENT_SYNC_POINT 0x02c8 +#define NVCB97_INCREMENT_SYNC_POINT_INDEX 11:0 +#define NVCB97_INCREMENT_SYNC_POINT_CLEAN_L2 16:16 +#define NVCB97_INCREMENT_SYNC_POINT_CLEAN_L2_FALSE 0x00000000 +#define NVCB97_INCREMENT_SYNC_POINT_CLEAN_L2_TRUE 0x00000001 +#define NVCB97_INCREMENT_SYNC_POINT_CONDITION 20:20 +#define NVCB97_INCREMENT_SYNC_POINT_CONDITION_STREAM_OUT_WRITES_DONE 0x00000000 +#define NVCB97_INCREMENT_SYNC_POINT_CONDITION_ROP_WRITES_DONE 0x00000001 + +#define NVCB97_SET_ROOT_TABLE_PREFETCH 0x02d0 +#define NVCB97_SET_ROOT_TABLE_PREFETCH_STAGE_ENABLES 5:0 + +#define NVCB97_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE 0x02d4 +#define NVCB97_FLUSH_AND_INVALIDATE_ROP_MINI_CACHE_V 0:0 + +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE 0x02d8 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH 3:0 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT 7:4 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH 11:8 +#define NVCB97_SET_SURFACE_CLIP_ID_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVCB97_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc +#define NVCB97_SET_ALPHA_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 13:0 + +#define NVCB97_DECOMPRESS_SURFACE 0x02e0 +#define NVCB97_DECOMPRESS_SURFACE_MRT_SELECT 2:0 +#define NVCB97_DECOMPRESS_SURFACE_RT_ARRAY_INDEX 19:4 + +#define NVCB97_SET_ZCULL_ROP_BYPASS 0x02e4 +#define NVCB97_SET_ZCULL_ROP_BYPASS_ENABLE 0:0 +#define NVCB97_SET_ZCULL_ROP_BYPASS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_ROP_BYPASS_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_ROP_BYPASS_NO_STALL 4:4 +#define NVCB97_SET_ZCULL_ROP_BYPASS_NO_STALL_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_ROP_BYPASS_NO_STALL_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING 8:8 +#define NVCB97_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_ROP_BYPASS_CULL_EVERYTHING_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_ROP_BYPASS_THRESHOLD 15:12 + +#define NVCB97_SET_ZCULL_SUBREGION 0x02e8 +#define NVCB97_SET_ZCULL_SUBREGION_ENABLE 0:0 +#define NVCB97_SET_ZCULL_SUBREGION_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_SUBREGION_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_SUBREGION_NORMALIZED_ALIQUOTS 27:4 + +#define NVCB97_SET_RASTER_BOUNDING_BOX 0x02ec +#define NVCB97_SET_RASTER_BOUNDING_BOX_MODE 0:0 +#define NVCB97_SET_RASTER_BOUNDING_BOX_MODE_BOUNDING_BOX 0x00000000 +#define NVCB97_SET_RASTER_BOUNDING_BOX_MODE_FULL_VIEWPORT 0x00000001 +#define NVCB97_SET_RASTER_BOUNDING_BOX_PAD 11:4 + +#define NVCB97_PEER_SEMAPHORE_RELEASE 0x02f0 +#define NVCB97_PEER_SEMAPHORE_RELEASE_V 31:0 + +#define NVCB97_SET_ITERATED_BLEND_OPTIMIZATION 0x02f4 +#define NVCB97_SET_ITERATED_BLEND_OPTIMIZATION_NOOP 1:0 +#define NVCB97_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_NEVER 0x00000000 +#define NVCB97_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0000 0x00000001 +#define NVCB97_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_ALPHA_0 0x00000002 +#define NVCB97_SET_ITERATED_BLEND_OPTIMIZATION_NOOP_SOURCE_RGBA_0001 0x00000003 + +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION 0x02f8 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_SUBREGION_ID 7:0 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_ALIQUOTS 23:8 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT 27:24 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16X2_4X4 0x00000000 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X16_4X4 0x00000001 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X2 0x00000002 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_2X4 0x00000003 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X8_4X4 0x00000004 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_4X2 0x00000005 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_8X8_2X4 0x00000006 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_16X16_4X8 0x00000007 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_2X2 0x00000008 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_4X2 0x00000009 +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_16X8_2X4 0x0000000A +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_ZS_8X8_2X2 0x0000000B +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_Z_4X8_1X1 0x0000000C +#define NVCB97_SET_ZCULL_SUBREGION_ALLOCATION_FORMAT_NONE 0x0000000F + +#define NVCB97_ASSIGN_ZCULL_SUBREGIONS 0x02fc +#define NVCB97_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM 1:0 +#define NVCB97_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Static 0x00000000 +#define NVCB97_ASSIGN_ZCULL_SUBREGIONS_ALGORITHM_Adaptive 0x00000001 + +#define NVCB97_SET_PS_OUTPUT_SAMPLE_MASK_USAGE 0x0300 +#define NVCB97_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE 0:0 +#define NVCB97_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE 1:1 +#define NVCB97_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVCB97_SET_PS_OUTPUT_SAMPLE_MASK_USAGE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 + +#define NVCB97_DRAW_ZERO_INDEX 0x0304 +#define NVCB97_DRAW_ZERO_INDEX_COUNT 31:0 + +#define NVCB97_SET_L1_CONFIGURATION 0x0308 +#define NVCB97_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY 2:0 +#define NVCB97_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_16KB 0x00000001 +#define NVCB97_SET_L1_CONFIGURATION_DIRECTLY_ADDRESSABLE_MEMORY_SIZE_48KB 0x00000003 + +#define NVCB97_SET_RENDER_ENABLE_CONTROL 0x030c +#define NVCB97_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER 0:0 +#define NVCB97_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_FALSE 0x00000000 +#define NVCB97_SET_RENDER_ENABLE_CONTROL_CONDITIONAL_LOAD_CONSTANT_BUFFER_TRUE 0x00000001 + +#define NVCB97_SET_SPA_VERSION 0x0310 +#define NVCB97_SET_SPA_VERSION_MINOR 7:0 +#define NVCB97_SET_SPA_VERSION_MAJOR 15:8 + +#define NVCB97_SET_TIMESLICE_BATCH_LIMIT 0x0314 +#define NVCB97_SET_TIMESLICE_BATCH_LIMIT_BATCH_LIMIT 15:0 + +#define NVCB97_SET_SNAP_GRID_LINE 0x0318 +#define NVCB97_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVCB97_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVCB97_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVCB97_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVCB97_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVCB97_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVCB97_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVCB97_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVCB97_SET_SNAP_GRID_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVCB97_SET_SNAP_GRID_LINE_ROUNDING_MODE 8:8 +#define NVCB97_SET_SNAP_GRID_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVCB97_SET_SNAP_GRID_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVCB97_SET_SNAP_GRID_NON_LINE 0x031c +#define NVCB97_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL 3:0 +#define NVCB97_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__2X2 0x00000001 +#define NVCB97_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__4X4 0x00000002 +#define NVCB97_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__8X8 0x00000003 +#define NVCB97_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__16X16 0x00000004 +#define NVCB97_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__32X32 0x00000005 +#define NVCB97_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__64X64 0x00000006 +#define NVCB97_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__128X128 0x00000007 +#define NVCB97_SET_SNAP_GRID_NON_LINE_LOCATIONS_PER_PIXEL__256X256 0x00000008 +#define NVCB97_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE 8:8 +#define NVCB97_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_RTNE 0x00000000 +#define NVCB97_SET_SNAP_GRID_NON_LINE_ROUNDING_MODE_TESLA 0x00000001 + +#define NVCB97_SET_TESSELLATION_PARAMETERS 0x0320 +#define NVCB97_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE 1:0 +#define NVCB97_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_ISOLINE 0x00000000 +#define NVCB97_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_TRIANGLE 0x00000001 +#define NVCB97_SET_TESSELLATION_PARAMETERS_DOMAIN_TYPE_QUAD 0x00000002 +#define NVCB97_SET_TESSELLATION_PARAMETERS_SPACING 5:4 +#define NVCB97_SET_TESSELLATION_PARAMETERS_SPACING_INTEGER 0x00000000 +#define NVCB97_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_ODD 0x00000001 +#define NVCB97_SET_TESSELLATION_PARAMETERS_SPACING_FRACTIONAL_EVEN 0x00000002 +#define NVCB97_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES 9:8 +#define NVCB97_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_POINTS 0x00000000 +#define NVCB97_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_LINES 0x00000001 +#define NVCB97_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CW 0x00000002 +#define NVCB97_SET_TESSELLATION_PARAMETERS_OUTPUT_PRIMITIVES_TRIANGLES_CCW 0x00000003 + +#define NVCB97_SET_TESSELLATION_LOD_U0_OR_DENSITY 0x0324 +#define NVCB97_SET_TESSELLATION_LOD_U0_OR_DENSITY_V 31:0 + +#define NVCB97_SET_TESSELLATION_LOD_V0_OR_DETAIL 0x0328 +#define NVCB97_SET_TESSELLATION_LOD_V0_OR_DETAIL_V 31:0 + +#define NVCB97_SET_TESSELLATION_LOD_U1_OR_W0 0x032c +#define NVCB97_SET_TESSELLATION_LOD_U1_OR_W0_V 31:0 + +#define NVCB97_SET_TESSELLATION_LOD_V1 0x0330 +#define NVCB97_SET_TESSELLATION_LOD_V1_V 31:0 + +#define NVCB97_SET_TG_LOD_INTERIOR_U 0x0334 +#define NVCB97_SET_TG_LOD_INTERIOR_U_V 31:0 + +#define NVCB97_SET_TG_LOD_INTERIOR_V 0x0338 +#define NVCB97_SET_TG_LOD_INTERIOR_V_V 31:0 + +#define NVCB97_RESERVED_TG07 0x033c +#define NVCB97_RESERVED_TG07_V 0:0 + +#define NVCB97_RESERVED_TG08 0x0340 +#define NVCB97_RESERVED_TG08_V 0:0 + +#define NVCB97_RESERVED_TG09 0x0344 +#define NVCB97_RESERVED_TG09_V 0:0 + +#define NVCB97_RESERVED_TG10 0x0348 +#define NVCB97_RESERVED_TG10_V 0:0 + +#define NVCB97_RESERVED_TG11 0x034c +#define NVCB97_RESERVED_TG11_V 0:0 + +#define NVCB97_RESERVED_TG12 0x0350 +#define NVCB97_RESERVED_TG12_V 0:0 + +#define NVCB97_RESERVED_TG13 0x0354 +#define NVCB97_RESERVED_TG13_V 0:0 + +#define NVCB97_RESERVED_TG14 0x0358 +#define NVCB97_RESERVED_TG14_V 0:0 + +#define NVCB97_RESERVED_TG15 0x035c +#define NVCB97_RESERVED_TG15_V 0:0 + +#define NVCB97_SET_SUBTILING_PERF_KNOB_A 0x0360 +#define NVCB97_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_REGISTER_FILE_PER_SUBTILE 7:0 +#define NVCB97_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_PIXEL_OUTPUT_BUFFER_PER_SUBTILE 15:8 +#define NVCB97_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_SPM_TRIANGLE_RAM_PER_SUBTILE 23:16 +#define NVCB97_SET_SUBTILING_PERF_KNOB_A_FRACTION_OF_MAX_QUADS_PER_SUBTILE 31:24 + +#define NVCB97_SET_SUBTILING_PERF_KNOB_B 0x0364 +#define NVCB97_SET_SUBTILING_PERF_KNOB_B_FRACTION_OF_MAX_PRIMITIVES_PER_SUBTILE 7:0 + +#define NVCB97_SET_SUBTILING_PERF_KNOB_C 0x0368 +#define NVCB97_SET_SUBTILING_PERF_KNOB_C_RESERVED 0:0 + +#define NVCB97_SET_ZCULL_SUBREGION_TO_REPORT 0x036c +#define NVCB97_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE 0:0 +#define NVCB97_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_SUBREGION_TO_REPORT_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_SUBREGION_TO_REPORT_SUBREGION_ID 11:4 + +#define NVCB97_SET_ZCULL_SUBREGION_REPORT_TYPE 0x0370 +#define NVCB97_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE 0:0 +#define NVCB97_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_SUBREGION_REPORT_TYPE_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE 6:4 +#define NVCB97_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST 0x00000000 +#define NVCB97_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_NO_ACCEPT 0x00000001 +#define NVCB97_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_DEPTH_TEST_LATE_Z 0x00000002 +#define NVCB97_SET_ZCULL_SUBREGION_REPORT_TYPE_TYPE_STENCIL_TEST 0x00000003 + +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD 0x0374 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE 0:0 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE 4:4 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_IN_TIMESLICED_MODE_TRUE 0x00000001 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE 8:8 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_FALSE 0x00000000 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_UNPARTITIONED_MODE_TRUE 0x00000001 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE 9:9 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_FALSE 0x00000000 +#define NVCB97_SET_BALANCED_PRIMITIVE_WORKLOAD_BY_PES_IN_TIMESLICED_MODE_TRUE 0x00000001 + +#define NVCB97_SET_MAX_PATCHES_PER_BATCH 0x0378 +#define NVCB97_SET_MAX_PATCHES_PER_BATCH_V 5:0 + +#define NVCB97_SET_RASTER_ENABLE 0x037c +#define NVCB97_SET_RASTER_ENABLE_V 0:0 +#define NVCB97_SET_RASTER_ENABLE_V_FALSE 0x00000000 +#define NVCB97_SET_RASTER_ENABLE_V_TRUE 0x00000001 + +#define NVCB97_SET_STREAM_OUT_BUFFER_ENABLE(j) (0x0380+(j)*32) +#define NVCB97_SET_STREAM_OUT_BUFFER_ENABLE_V 0:0 +#define NVCB97_SET_STREAM_OUT_BUFFER_ENABLE_V_FALSE 0x00000000 +#define NVCB97_SET_STREAM_OUT_BUFFER_ENABLE_V_TRUE 0x00000001 + +#define NVCB97_SET_STREAM_OUT_BUFFER_ADDRESS_A(j) (0x0384+(j)*32) +#define NVCB97_SET_STREAM_OUT_BUFFER_ADDRESS_A_UPPER 7:0 + +#define NVCB97_SET_STREAM_OUT_BUFFER_ADDRESS_B(j) (0x0388+(j)*32) +#define NVCB97_SET_STREAM_OUT_BUFFER_ADDRESS_B_LOWER 31:0 + +#define NVCB97_SET_STREAM_OUT_BUFFER_SIZE(j) (0x038c+(j)*32) +#define NVCB97_SET_STREAM_OUT_BUFFER_SIZE_BYTES 31:0 + +#define NVCB97_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER(j) (0x0390+(j)*32) +#define NVCB97_SET_STREAM_OUT_BUFFER_LOAD_WRITE_POINTER_START_OFFSET 31:0 + +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_SCALE_A(j) (0x0400+(j)*16) +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_SCALE_A_V 31:0 + +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_SCALE_B(j) (0x0404+(j)*16) +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_SCALE_B_V 31:0 + +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_RESERVED_A(j) (0x0408+(j)*16) +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_RESERVED_A_V 31:0 + +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_RESERVED_B(j) (0x040c+(j)*16) +#define NVCB97_SET_POSITION_W_SCALED_OFFSET_RESERVED_B_V 31:0 + +#define NVCB97_SET_Z_ROP_SLICE_MAP 0x0500 +#define NVCB97_SET_Z_ROP_SLICE_MAP_VIRTUAL_ADDRESS_MASK 31:0 + +#define NVCB97_SET_ROOT_TABLE_SELECTOR 0x0504 +#define NVCB97_SET_ROOT_TABLE_SELECTOR_ROOT_TABLE 2:0 +#define NVCB97_SET_ROOT_TABLE_SELECTOR_OFFSET 15:8 + +#define NVCB97_LOAD_ROOT_TABLE 0x0508 +#define NVCB97_LOAD_ROOT_TABLE_V 31:0 + +#define NVCB97_SET_MME_MEM_ADDRESS_A 0x0550 +#define NVCB97_SET_MME_MEM_ADDRESS_A_UPPER 24:0 + +#define NVCB97_SET_MME_MEM_ADDRESS_B 0x0554 +#define NVCB97_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NVCB97_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NVCB97_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NVCB97_MME_DMA_READ 0x055c +#define NVCB97_MME_DMA_READ_LENGTH 31:0 + +#define NVCB97_MME_DMA_READ_FIFOED 0x0560 +#define NVCB97_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NVCB97_MME_DMA_WRITE 0x0564 +#define NVCB97_MME_DMA_WRITE_LENGTH 31:0 + +#define NVCB97_MME_DMA_REDUCTION 0x0568 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NVCB97_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NVCB97_MME_DMA_SYSMEMBAR 0x056c +#define NVCB97_MME_DMA_SYSMEMBAR_V 0:0 + +#define NVCB97_MME_DMA_SYNC 0x0570 +#define NVCB97_MME_DMA_SYNC_VALUE 31:0 + +#define NVCB97_SET_MME_DATA_FIFO_CONFIG 0x0574 +#define NVCB97_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE 2:0 +#define NVCB97_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_0KB 0x00000000 +#define NVCB97_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_4KB 0x00000001 +#define NVCB97_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_8KB 0x00000002 +#define NVCB97_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_12KB 0x00000003 +#define NVCB97_SET_MME_DATA_FIFO_CONFIG_FIFO_SIZE_SIZE_16KB 0x00000004 + +#define NVCB97_SET_VERTEX_STREAM_SIZE_A(j) (0x0600+(j)*8) +#define NVCB97_SET_VERTEX_STREAM_SIZE_A_UPPER 7:0 + +#define NVCB97_SET_VERTEX_STREAM_SIZE_B(j) (0x0604+(j)*8) +#define NVCB97_SET_VERTEX_STREAM_SIZE_B_LOWER 31:0 + +#define NVCB97_SET_STREAM_OUT_CONTROL_STREAM(j) (0x0700+(j)*16) +#define NVCB97_SET_STREAM_OUT_CONTROL_STREAM_SELECT 1:0 + +#define NVCB97_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT(j) (0x0704+(j)*16) +#define NVCB97_SET_STREAM_OUT_CONTROL_COMPONENT_COUNT_MAX 7:0 + +#define NVCB97_SET_STREAM_OUT_CONTROL_STRIDE(j) (0x0708+(j)*16) +#define NVCB97_SET_STREAM_OUT_CONTROL_STRIDE_BYTES 31:0 + +#define NVCB97_SET_RASTER_INPUT 0x0740 +#define NVCB97_SET_RASTER_INPUT_STREAM_SELECT 1:0 + +#define NVCB97_SET_STREAM_OUTPUT 0x0744 +#define NVCB97_SET_STREAM_OUTPUT_ENABLE 0:0 +#define NVCB97_SET_STREAM_OUTPUT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STREAM_OUTPUT_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE 0x0748 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE 0:0 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_TOPOLOGY_CHANGE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_HYBRID_ANTI_ALIAS_CONTROL 0x0754 +#define NVCB97_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES 3:0 +#define NVCB97_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID 4:4 +#define NVCB97_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_FRAGMENT 0x00000000 +#define NVCB97_SET_HYBRID_ANTI_ALIAS_CONTROL_CENTROID_PER_PASS 0x00000001 +#define NVCB97_SET_HYBRID_ANTI_ALIAS_CONTROL_PASSES_EXTENDED 5:5 + +#define NVCB97_SET_SHADER_LOCAL_MEMORY_WINDOW 0x077c +#define NVCB97_SET_SHADER_LOCAL_MEMORY_WINDOW_BASE_ADDRESS 31:0 + +#define NVCB97_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVCB97_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 7:0 + +#define NVCB97_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVCB97_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVCB97_SET_SHADER_LOCAL_MEMORY_C 0x0798 +#define NVCB97_SET_SHADER_LOCAL_MEMORY_C_SIZE_UPPER 6:0 + +#define NVCB97_SET_SHADER_LOCAL_MEMORY_D 0x079c +#define NVCB97_SET_SHADER_LOCAL_MEMORY_D_SIZE_LOWER 31:0 + +#define NVCB97_SET_SHADER_LOCAL_MEMORY_E 0x07a0 +#define NVCB97_SET_SHADER_LOCAL_MEMORY_E_DEFAULT_SIZE_PER_WARP 25:0 + +#define NVCB97_SET_COLOR_ZERO_BANDWIDTH_CLEAR 0x07a4 +#define NVCB97_SET_COLOR_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVCB97_SET_Z_ZERO_BANDWIDTH_CLEAR 0x07a8 +#define NVCB97_SET_Z_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVCB97_SET_TEXTURE_HEADER_VERSION 0x07ac +#define NVCB97_SET_TEXTURE_HEADER_VERSION_MAJOR 7:0 + +#define NVCB97_SET_STENCIL_ZERO_BANDWIDTH_CLEAR 0x07b0 +#define NVCB97_SET_STENCIL_ZERO_BANDWIDTH_CLEAR_SLOT_DISABLE_MASK 14:0 + +#define NVCB97_SET_ZCULL_REGION_SIZE_A 0x07c0 +#define NVCB97_SET_ZCULL_REGION_SIZE_A_WIDTH 15:0 + +#define NVCB97_SET_ZCULL_REGION_SIZE_B 0x07c4 +#define NVCB97_SET_ZCULL_REGION_SIZE_B_HEIGHT 15:0 + +#define NVCB97_SET_ZCULL_REGION_SIZE_C 0x07c8 +#define NVCB97_SET_ZCULL_REGION_SIZE_C_DEPTH 15:0 + +#define NVCB97_SET_ZCULL_REGION_PIXEL_OFFSET_C 0x07cc +#define NVCB97_SET_ZCULL_REGION_PIXEL_OFFSET_C_DEPTH 15:0 + +#define NVCB97_SET_CULL_BEFORE_FETCH 0x07dc +#define NVCB97_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE 0:0 +#define NVCB97_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_FALSE 0x00000000 +#define NVCB97_SET_CULL_BEFORE_FETCH_FETCH_STREAMS_ONCE_TRUE 0x00000001 + +#define NVCB97_SET_ZCULL_REGION_LOCATION 0x07e0 +#define NVCB97_SET_ZCULL_REGION_LOCATION_START_ALIQUOT 15:0 +#define NVCB97_SET_ZCULL_REGION_LOCATION_ALIQUOT_COUNT 31:16 + +#define NVCB97_SET_ZCULL_REGION_ALIQUOTS 0x07e4 +#define NVCB97_SET_ZCULL_REGION_ALIQUOTS_PER_LAYER 15:0 + +#define NVCB97_SET_ZCULL_STORAGE_A 0x07e8 +#define NVCB97_SET_ZCULL_STORAGE_A_ADDRESS_UPPER 7:0 + +#define NVCB97_SET_ZCULL_STORAGE_B 0x07ec +#define NVCB97_SET_ZCULL_STORAGE_B_ADDRESS_LOWER 31:0 + +#define NVCB97_SET_ZCULL_STORAGE_C 0x07f0 +#define NVCB97_SET_ZCULL_STORAGE_C_LIMIT_ADDRESS_UPPER 7:0 + +#define NVCB97_SET_ZCULL_STORAGE_D 0x07f4 +#define NVCB97_SET_ZCULL_STORAGE_D_LIMIT_ADDRESS_LOWER 31:0 + +#define NVCB97_SET_ZT_READ_ONLY 0x07f8 +#define NVCB97_SET_ZT_READ_ONLY_ENABLE_Z 0:0 +#define NVCB97_SET_ZT_READ_ONLY_ENABLE_Z_FALSE 0x00000000 +#define NVCB97_SET_ZT_READ_ONLY_ENABLE_Z_TRUE 0x00000001 +#define NVCB97_SET_ZT_READ_ONLY_ENABLE_STENCIL 4:4 +#define NVCB97_SET_ZT_READ_ONLY_ENABLE_STENCIL_FALSE 0x00000000 +#define NVCB97_SET_ZT_READ_ONLY_ENABLE_STENCIL_TRUE 0x00000001 + +#define NVCB97_THROTTLE_SM 0x07fc +#define NVCB97_THROTTLE_SM_MULTIPLY_ADD 0:0 +#define NVCB97_THROTTLE_SM_MULTIPLY_ADD_FALSE 0x00000000 +#define NVCB97_THROTTLE_SM_MULTIPLY_ADD_TRUE 0x00000001 + +#define NVCB97_SET_COLOR_TARGET_A(j) (0x0800+(j)*64) +#define NVCB97_SET_COLOR_TARGET_A_OFFSET_UPPER 7:0 + +#define NVCB97_SET_COLOR_TARGET_B(j) (0x0804+(j)*64) +#define NVCB97_SET_COLOR_TARGET_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_COLOR_TARGET_WIDTH(j) (0x0808+(j)*64) +#define NVCB97_SET_COLOR_TARGET_WIDTH_V 27:0 + +#define NVCB97_SET_COLOR_TARGET_HEIGHT(j) (0x080c+(j)*64) +#define NVCB97_SET_COLOR_TARGET_HEIGHT_V 16:0 + +#define NVCB97_SET_COLOR_TARGET_FORMAT(j) (0x0810+(j)*64) +#define NVCB97_SET_COLOR_TARGET_FORMAT_V 7:0 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_DISABLED 0x00000000 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_AS32 0x000000C1 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_AU32 0x000000C2 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RS32_GS32_BS32_X32 0x000000C4 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RU32_GU32_BU32_X32 0x000000C5 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_R16_G16_B16_A16 0x000000C6 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RS16_GS16_BS16_AS16 0x000000C8 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RU16_GU16_BU16_AU16 0x000000C9 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF32_GF32 0x000000CB +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RS32_GS32 0x000000CC +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RU32_GU32 0x000000CD +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A8R8G8B8 0x000000CF +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A8RL8GL8BL8 0x000000D0 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A2B10G10R10 0x000000D1 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_AU2BU10GU10RU10 0x000000D2 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A8B8G8R8 0x000000D5 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A8BL8GL8RL8 0x000000D6 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_AN8BN8GN8RN8 0x000000D7 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_AS8BS8GS8RS8 0x000000D8 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_AU8BU8GU8RU8 0x000000D9 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_R16_G16 0x000000DA +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RN16_GN16 0x000000DB +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RS16_GS16 0x000000DC +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RU16_GU16 0x000000DD +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF16_GF16 0x000000DE +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A2R10G10B10 0x000000DF +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_BF10GF11RF11 0x000000E0 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RS32 0x000000E3 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RU32 0x000000E4 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF32 0x000000E5 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_X8R8G8B8 0x000000E6 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_X8RL8GL8BL8 0x000000E7 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_R5G6B5 0x000000E8 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A1R5G5B5 0x000000E9 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_G8R8 0x000000EA +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_GN8RN8 0x000000EB +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_GS8RS8 0x000000EC +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_GU8RU8 0x000000ED +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_R16 0x000000EE +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RN16 0x000000EF +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RS16 0x000000F0 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RU16 0x000000F1 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF16 0x000000F2 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_R8 0x000000F3 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RN8 0x000000F4 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RS8 0x000000F5 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RU8 0x000000F6 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A8 0x000000F7 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_X1R5G5B5 0x000000F8 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_X8B8G8R8 0x000000F9 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_X8BL8GL8RL8 0x000000FA +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_Z1R5G5B5 0x000000FB +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_O1R5G5B5 0x000000FC +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_Z8R8G8B8 0x000000FD +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_O8R8G8B8 0x000000FE +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_R32 0x000000FF +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A16 0x00000040 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_AF16 0x00000041 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_AF32 0x00000042 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_A8R8 0x00000043 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_R16_A16 0x00000044 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF16_AF16 0x00000045 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_RF32_AF32 0x00000046 +#define NVCB97_SET_COLOR_TARGET_FORMAT_V_B8G8R8A8 0x00000047 + +#define NVCB97_SET_COLOR_TARGET_MEMORY(j) (0x0814+(j)*64) +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH 3:0 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT 7:4 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH 11:8 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVCB97_SET_COLOR_TARGET_MEMORY_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_SET_COLOR_TARGET_MEMORY_LAYOUT 12:12 +#define NVCB97_SET_COLOR_TARGET_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVCB97_SET_COLOR_TARGET_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVCB97_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL 16:16 +#define NVCB97_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVCB97_SET_COLOR_TARGET_MEMORY_THIRD_DIMENSION_CONTROL_THIRD_DIMENSION_DEFINES_DEPTH_SIZE 0x00000001 + +#define NVCB97_SET_COLOR_TARGET_THIRD_DIMENSION(j) (0x0818+(j)*64) +#define NVCB97_SET_COLOR_TARGET_THIRD_DIMENSION_V 27:0 + +#define NVCB97_SET_COLOR_TARGET_ARRAY_PITCH(j) (0x081c+(j)*64) +#define NVCB97_SET_COLOR_TARGET_ARRAY_PITCH_V 31:0 + +#define NVCB97_SET_COLOR_TARGET_LAYER(j) (0x0820+(j)*64) +#define NVCB97_SET_COLOR_TARGET_LAYER_OFFSET 15:0 + +#define NVCB97_SET_COLOR_TARGET_C_ROP_SLICE_MAP(j) (0x0824+(j)*64) +#define NVCB97_SET_COLOR_TARGET_C_ROP_SLICE_MAP_VIRTUAL_ADDRESS_MASK 31:0 + +#define NVCB97_SET_VIEWPORT_SCALE_X(j) (0x0a00+(j)*32) +#define NVCB97_SET_VIEWPORT_SCALE_X_V 31:0 + +#define NVCB97_SET_VIEWPORT_SCALE_Y(j) (0x0a04+(j)*32) +#define NVCB97_SET_VIEWPORT_SCALE_Y_V 31:0 + +#define NVCB97_SET_VIEWPORT_SCALE_Z(j) (0x0a08+(j)*32) +#define NVCB97_SET_VIEWPORT_SCALE_Z_V 31:0 + +#define NVCB97_SET_VIEWPORT_OFFSET_X(j) (0x0a0c+(j)*32) +#define NVCB97_SET_VIEWPORT_OFFSET_X_V 31:0 + +#define NVCB97_SET_VIEWPORT_OFFSET_Y(j) (0x0a10+(j)*32) +#define NVCB97_SET_VIEWPORT_OFFSET_Y_V 31:0 + +#define NVCB97_SET_VIEWPORT_OFFSET_Z(j) (0x0a14+(j)*32) +#define NVCB97_SET_VIEWPORT_OFFSET_Z_V 31:0 + +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE(j) (0x0a18+(j)*32) +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_X 2:0 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_X 0x00000000 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_X 0x00000001 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Y 0x00000002 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Y 0x00000003 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_Z 0x00000004 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_Z 0x00000005 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_X_POS_W 0x00000006 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_X_NEG_W 0x00000007 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Y 6:4 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_X 0x00000000 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_X 0x00000001 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Y 0x00000002 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Y 0x00000003 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_Z 0x00000004 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_Z 0x00000005 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_POS_W 0x00000006 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Y_NEG_W 0x00000007 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Z 10:8 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_X 0x00000000 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_X 0x00000001 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Y 0x00000002 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Y 0x00000003 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_Z 0x00000004 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_Z 0x00000005 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_POS_W 0x00000006 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_Z_NEG_W 0x00000007 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_W 14:12 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_X 0x00000000 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_X 0x00000001 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Y 0x00000002 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Y 0x00000003 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_Z 0x00000004 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_Z 0x00000005 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_W_POS_W 0x00000006 +#define NVCB97_SET_VIEWPORT_COORDINATE_SWIZZLE_W_NEG_W 0x00000007 + +#define NVCB97_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION(j) (0x0a1c+(j)*32) +#define NVCB97_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_X_BITS 4:0 +#define NVCB97_SET_VIEWPORT_INCREASE_SNAP_GRID_PRECISION_Y_BITS 12:8 + +#define NVCB97_SET_VIEWPORT_CLIP_HORIZONTAL(j) (0x0c00+(j)*16) +#define NVCB97_SET_VIEWPORT_CLIP_HORIZONTAL_X0 15:0 +#define NVCB97_SET_VIEWPORT_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVCB97_SET_VIEWPORT_CLIP_VERTICAL(j) (0x0c04+(j)*16) +#define NVCB97_SET_VIEWPORT_CLIP_VERTICAL_Y0 15:0 +#define NVCB97_SET_VIEWPORT_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVCB97_SET_VIEWPORT_CLIP_MIN_Z(j) (0x0c08+(j)*16) +#define NVCB97_SET_VIEWPORT_CLIP_MIN_Z_V 31:0 + +#define NVCB97_SET_VIEWPORT_CLIP_MAX_Z(j) (0x0c0c+(j)*16) +#define NVCB97_SET_VIEWPORT_CLIP_MAX_Z_V 31:0 + +#define NVCB97_SET_WINDOW_CLIP_HORIZONTAL(j) (0x0d00+(j)*8) +#define NVCB97_SET_WINDOW_CLIP_HORIZONTAL_XMIN 15:0 +#define NVCB97_SET_WINDOW_CLIP_HORIZONTAL_XMAX 31:16 + +#define NVCB97_SET_WINDOW_CLIP_VERTICAL(j) (0x0d04+(j)*8) +#define NVCB97_SET_WINDOW_CLIP_VERTICAL_YMIN 15:0 +#define NVCB97_SET_WINDOW_CLIP_VERTICAL_YMAX 31:16 + +#define NVCB97_SET_CLIP_ID_EXTENT_X(j) (0x0d40+(j)*8) +#define NVCB97_SET_CLIP_ID_EXTENT_X_MINX 15:0 +#define NVCB97_SET_CLIP_ID_EXTENT_X_WIDTH 31:16 + +#define NVCB97_SET_CLIP_ID_EXTENT_Y(j) (0x0d44+(j)*8) +#define NVCB97_SET_CLIP_ID_EXTENT_Y_MINY 15:0 +#define NVCB97_SET_CLIP_ID_EXTENT_Y_HEIGHT 31:16 + +#define NVCB97_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK 0x0d60 +#define NVCB97_SET_MAX_STREAM_OUTPUT_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT 0x0d64 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V 3:0 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V__0 0x00000000 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V__1 0x00000001 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V__2 0x00000002 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V__4 0x00000003 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V__8 0x00000004 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V__16 0x00000005 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V__32 0x00000006 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V__64 0x00000007 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V__128 0x00000008 +#define NVCB97_SET_API_VISIBLE_CALL_LIMIT_V_NO_CHECK 0x0000000F + +#define NVCB97_SET_STATISTICS_COUNTER 0x0d68 +#define NVCB97_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE 0:0 +#define NVCB97_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_DA_VERTICES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE 1:1 +#define NVCB97_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_DA_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE 2:2 +#define NVCB97_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_VS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE 3:3 +#define NVCB97_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_GS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE 4:4 +#define NVCB97_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_GS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE 5:5 +#define NVCB97_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE 6:6 +#define NVCB97_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_STREAMING_PRIMITIVES_NEEDED_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE 7:7 +#define NVCB97_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_CLIPPER_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE 8:8 +#define NVCB97_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_CLIPPER_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE 9:9 +#define NVCB97_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_PS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE 11:11 +#define NVCB97_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_TI_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE 12:12 +#define NVCB97_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_TS_INVOCATIONS_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE 13:13 +#define NVCB97_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_TS_PRIMITIVES_GENERATED_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE 14:14 +#define NVCB97_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_TOTAL_STREAMING_PRIMITIVES_NEEDED_SUCCEEDED_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE 10:10 +#define NVCB97_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_VTG_PRIMITIVES_OUT_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE 15:15 +#define NVCB97_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_ALPHA_BETA_CLOCKS_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE 16:16 +#define NVCB97_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STATISTICS_COUNTER_SCG_CLOCKS_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_CLEAR_RECT_HORIZONTAL 0x0d6c +#define NVCB97_SET_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVCB97_SET_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVCB97_SET_CLEAR_RECT_VERTICAL 0x0d70 +#define NVCB97_SET_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVCB97_SET_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVCB97_SET_VERTEX_ARRAY_START 0x0d74 +#define NVCB97_SET_VERTEX_ARRAY_START_V 31:0 + +#define NVCB97_DRAW_VERTEX_ARRAY 0x0d78 +#define NVCB97_DRAW_VERTEX_ARRAY_COUNT 31:0 + +#define NVCB97_SET_VIEWPORT_Z_CLIP 0x0d7c +#define NVCB97_SET_VIEWPORT_Z_CLIP_RANGE 0:0 +#define NVCB97_SET_VIEWPORT_Z_CLIP_RANGE_NEGATIVE_W_TO_POSITIVE_W 0x00000000 +#define NVCB97_SET_VIEWPORT_Z_CLIP_RANGE_ZERO_TO_POSITIVE_W 0x00000001 + +#define NVCB97_SET_COLOR_CLEAR_VALUE(i) (0x0d80+(i)*4) +#define NVCB97_SET_COLOR_CLEAR_VALUE_V 31:0 + +#define NVCB97_SET_Z_CLEAR_VALUE 0x0d90 +#define NVCB97_SET_Z_CLEAR_VALUE_V 31:0 + +#define NVCB97_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVCB97_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVCB97_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVCB97_FORCE_TRANSITION_TO_BETA 0x0d98 +#define NVCB97_FORCE_TRANSITION_TO_BETA_V 0:0 + +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_ENABLE 0x0d9c +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V 0:0 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_FALSE 0x00000000 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_ENABLE_V_TRUE 0x00000001 + +#define NVCB97_SET_STENCIL_CLEAR_VALUE 0x0da0 +#define NVCB97_SET_STENCIL_CLEAR_VALUE_V 7:0 + +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI 0x0da4 +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVCB97_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVCB97_SET_ZCULL_SERIALIZATION 0x0da8 +#define NVCB97_SET_ZCULL_SERIALIZATION_ENABLE 0:0 +#define NVCB97_SET_ZCULL_SERIALIZATION_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_SERIALIZATION_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_SERIALIZATION_APPLIED 5:4 +#define NVCB97_SET_ZCULL_SERIALIZATION_APPLIED_ALWAYS 0x00000000 +#define NVCB97_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z 0x00000001 +#define NVCB97_SET_ZCULL_SERIALIZATION_APPLIED_OUT_OF_GAMUT_Z 0x00000002 +#define NVCB97_SET_ZCULL_SERIALIZATION_APPLIED_LATE_Z_OR_OUT_OF_GAMUT_Z 0x00000003 + +#define NVCB97_SET_FRONT_POLYGON_MODE 0x0dac +#define NVCB97_SET_FRONT_POLYGON_MODE_V 31:0 +#define NVCB97_SET_FRONT_POLYGON_MODE_V_POINT 0x00001B00 +#define NVCB97_SET_FRONT_POLYGON_MODE_V_LINE 0x00001B01 +#define NVCB97_SET_FRONT_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVCB97_SET_BACK_POLYGON_MODE 0x0db0 +#define NVCB97_SET_BACK_POLYGON_MODE_V 31:0 +#define NVCB97_SET_BACK_POLYGON_MODE_V_POINT 0x00001B00 +#define NVCB97_SET_BACK_POLYGON_MODE_V_LINE 0x00001B01 +#define NVCB97_SET_BACK_POLYGON_MODE_V_FILL 0x00001B02 + +#define NVCB97_SET_POLY_SMOOTH 0x0db4 +#define NVCB97_SET_POLY_SMOOTH_ENABLE 0:0 +#define NVCB97_SET_POLY_SMOOTH_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_POLY_SMOOTH_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_ZCULL_DIR_FORMAT 0x0dbc +#define NVCB97_SET_ZCULL_DIR_FORMAT_ZDIR 15:0 +#define NVCB97_SET_ZCULL_DIR_FORMAT_ZDIR_LESS 0x00000000 +#define NVCB97_SET_ZCULL_DIR_FORMAT_ZDIR_GREATER 0x00000001 +#define NVCB97_SET_ZCULL_DIR_FORMAT_ZFORMAT 31:16 +#define NVCB97_SET_ZCULL_DIR_FORMAT_ZFORMAT_MSB 0x00000000 +#define NVCB97_SET_ZCULL_DIR_FORMAT_ZFORMAT_FP 0x00000001 +#define NVCB97_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZTRICK 0x00000002 +#define NVCB97_SET_ZCULL_DIR_FORMAT_ZFORMAT_ZF32_1 0x00000003 + +#define NVCB97_SET_POLY_OFFSET_POINT 0x0dc0 +#define NVCB97_SET_POLY_OFFSET_POINT_ENABLE 0:0 +#define NVCB97_SET_POLY_OFFSET_POINT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_POLY_OFFSET_POINT_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_POLY_OFFSET_LINE 0x0dc4 +#define NVCB97_SET_POLY_OFFSET_LINE_ENABLE 0:0 +#define NVCB97_SET_POLY_OFFSET_LINE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_POLY_OFFSET_LINE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_POLY_OFFSET_FILL 0x0dc8 +#define NVCB97_SET_POLY_OFFSET_FILL_ENABLE 0:0 +#define NVCB97_SET_POLY_OFFSET_FILL_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_POLY_OFFSET_FILL_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_PATCH 0x0dcc +#define NVCB97_SET_PATCH_SIZE 7:0 + +#define NVCB97_SET_ITERATED_BLEND 0x0dd0 +#define NVCB97_SET_ITERATED_BLEND_ENABLE 0:0 +#define NVCB97_SET_ITERATED_BLEND_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ITERATED_BLEND_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ITERATED_BLEND_ALPHA_ENABLE 1:1 +#define NVCB97_SET_ITERATED_BLEND_ALPHA_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ITERATED_BLEND_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_ITERATED_BLEND_PASS 0x0dd4 +#define NVCB97_SET_ITERATED_BLEND_PASS_COUNT 7:0 + +#define NVCB97_SET_ZCULL_CRITERION 0x0dd8 +#define NVCB97_SET_ZCULL_CRITERION_SFUNC 7:0 +#define NVCB97_SET_ZCULL_CRITERION_SFUNC_NEVER 0x00000000 +#define NVCB97_SET_ZCULL_CRITERION_SFUNC_LESS 0x00000001 +#define NVCB97_SET_ZCULL_CRITERION_SFUNC_EQUAL 0x00000002 +#define NVCB97_SET_ZCULL_CRITERION_SFUNC_LEQUAL 0x00000003 +#define NVCB97_SET_ZCULL_CRITERION_SFUNC_GREATER 0x00000004 +#define NVCB97_SET_ZCULL_CRITERION_SFUNC_NOTEQUAL 0x00000005 +#define NVCB97_SET_ZCULL_CRITERION_SFUNC_GEQUAL 0x00000006 +#define NVCB97_SET_ZCULL_CRITERION_SFUNC_ALWAYS 0x00000007 +#define NVCB97_SET_ZCULL_CRITERION_NO_INVALIDATE 8:8 +#define NVCB97_SET_ZCULL_CRITERION_NO_INVALIDATE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_CRITERION_NO_INVALIDATE_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_CRITERION_FORCE_MATCH 9:9 +#define NVCB97_SET_ZCULL_CRITERION_FORCE_MATCH_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_CRITERION_FORCE_MATCH_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_CRITERION_SREF 23:16 +#define NVCB97_SET_ZCULL_CRITERION_SMASK 31:24 + +#define NVCB97_PIXEL_SHADER_BARRIER 0x0de0 +#define NVCB97_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE 0:0 +#define NVCB97_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_FALSE 0x00000000 +#define NVCB97_PIXEL_SHADER_BARRIER_SYSMEMBAR_ENABLE_TRUE 0x00000001 +#define NVCB97_PIXEL_SHADER_BARRIER_BARRIER_LOCATION 1:1 +#define NVCB97_PIXEL_SHADER_BARRIER_BARRIER_LOCATION_BLOCK_BEFORE_PS 0x00000000 +#define NVCB97_PIXEL_SHADER_BARRIER_BARRIER_LOCATION_BLOCK_BEFORE_PS_AND_ZTEST 0x00000001 + +#define NVCB97_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVCB97_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVCB97_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY 0x0de8 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE 0:0 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_VERTEX_ARRAY_ENABLE_TRUE 0x00000001 + +#define NVCB97_MME_DMA_WRITE_METHOD_BARRIER 0x0dec +#define NVCB97_MME_DMA_WRITE_METHOD_BARRIER_V 0:0 + +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER 0x0df0 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_POINTER_V 7:0 + +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION 0x0df4 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC 2:0 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_FALSE 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_TRUE 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_EQ 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_NE 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LT 0x00000004 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_LE 0x00000005 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GT 0x00000006 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_TEST_CC_GE 0x00000007 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION 5:3 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD_PRODUCTS 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUB_PRODUCTS 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MIN 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_MAX 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_RCP 0x00000004 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_ADD 0x00000005 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERATION_SUBTRACT 0x00000006 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT 8:6 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT0 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT1 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT2 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT3 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT4 0x00000004 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT5 0x00000005 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT6 0x00000006 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_CONSTANT_INPUT_SELECT_CONSTANT7 0x00000007 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT 11:9 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_RGB 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_RGB 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_SRC_AAA 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_DEST_AAA 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP0_RGB 0x00000004 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP1_RGB 0x00000005 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_TEMP2_RGB 0x00000006 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_A_SELECT_PBR_RGB 0x00000007 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT 15:12 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_RGB 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_SRC_AAA 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_RGB 0x00000005 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_DEST_AAA 0x00000006 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP0_RGB 0x00000009 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP1_RGB 0x0000000A +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_TEMP2_RGB 0x0000000B +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_PBR_RGB 0x0000000C +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_CONSTANT_RGB 0x0000000D +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_B_SELECT_ZERO_A_TIMES_B 0x0000000E +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT 18:16 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_RGB 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_RGB 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_SRC_AAA 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_DEST_AAA 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP0_RGB 0x00000004 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP1_RGB 0x00000005 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_TEMP2_RGB 0x00000006 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_C_SELECT_PBR_RGB 0x00000007 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT 22:19 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_RGB 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_SRC_AAA 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_SRC_AAA 0x00000004 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_RGB 0x00000005 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_DEST_AAA 0x00000006 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ONE_MINUS_DEST_AAA 0x00000007 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP0_RGB 0x00000009 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP1_RGB 0x0000000A +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_TEMP2_RGB 0x0000000B +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_PBR_RGB 0x0000000C +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_CONSTANT_RGB 0x0000000D +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OPERAND_D_SELECT_ZERO_C_TIMES_D 0x0000000E +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE 25:23 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RGB 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GBR 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_RRR 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_GGG 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_BBB 0x00000004 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_SWIZZLE_R_TO_A 0x00000005 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK 27:26 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_RGB 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_R_ONLY 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_G_ONLY 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_OUTPUT_WRITE_MASK_B_ONLY 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT 29:28 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP0 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP1 0x00000001 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_TEMP2 0x00000002 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_PASS_OUTPUT_NONE 0x00000003 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC 31:31 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_FALSE 0x00000000 +#define NVCB97_LOAD_ITERATED_BLEND_INSTRUCTION_SET_CC_TRUE 0x00000001 + +#define NVCB97_SET_WINDOW_OFFSET_X 0x0df8 +#define NVCB97_SET_WINDOW_OFFSET_X_V 16:0 + +#define NVCB97_SET_WINDOW_OFFSET_Y 0x0dfc +#define NVCB97_SET_WINDOW_OFFSET_Y_V 17:0 + +#define NVCB97_SET_SCISSOR_ENABLE(j) (0x0e00+(j)*16) +#define NVCB97_SET_SCISSOR_ENABLE_V 0:0 +#define NVCB97_SET_SCISSOR_ENABLE_V_FALSE 0x00000000 +#define NVCB97_SET_SCISSOR_ENABLE_V_TRUE 0x00000001 + +#define NVCB97_SET_SCISSOR_HORIZONTAL(j) (0x0e04+(j)*16) +#define NVCB97_SET_SCISSOR_HORIZONTAL_XMIN 15:0 +#define NVCB97_SET_SCISSOR_HORIZONTAL_XMAX 31:16 + +#define NVCB97_SET_SCISSOR_VERTICAL(j) (0x0e08+(j)*16) +#define NVCB97_SET_SCISSOR_VERTICAL_YMIN 15:0 +#define NVCB97_SET_SCISSOR_VERTICAL_YMAX 31:16 + +#define NVCB97_SET_VPC_PERF_KNOB 0x0f14 +#define NVCB97_SET_VPC_PERF_KNOB_CULLED_SMALL_LINES 7:0 +#define NVCB97_SET_VPC_PERF_KNOB_CULLED_SMALL_TRIANGLES 15:8 +#define NVCB97_SET_VPC_PERF_KNOB_NONCULLED_LINES_AND_POINTS 23:16 +#define NVCB97_SET_VPC_PERF_KNOB_NONCULLED_TRIANGLES 31:24 + +#define NVCB97_PM_LOCAL_TRIGGER 0x0f18 +#define NVCB97_PM_LOCAL_TRIGGER_BOOKMARK 15:0 + +#define NVCB97_SET_POST_Z_PS_IMASK 0x0f1c +#define NVCB97_SET_POST_Z_PS_IMASK_ENABLE 0:0 +#define NVCB97_SET_POST_Z_PS_IMASK_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_POST_Z_PS_IMASK_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_CONSTANT_COLOR_RENDERING 0x0f40 +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_ENABLE 0:0 +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_RED 0x0f44 +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_RED_V 31:0 + +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_GREEN 0x0f48 +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_GREEN_V 31:0 + +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_BLUE 0x0f4c +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_BLUE_V 31:0 + +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_ALPHA 0x0f50 +#define NVCB97_SET_CONSTANT_COLOR_RENDERING_ALPHA_V 31:0 + +#define NVCB97_SET_BACK_STENCIL_FUNC_REF 0x0f54 +#define NVCB97_SET_BACK_STENCIL_FUNC_REF_V 7:0 + +#define NVCB97_SET_BACK_STENCIL_MASK 0x0f58 +#define NVCB97_SET_BACK_STENCIL_MASK_V 7:0 + +#define NVCB97_SET_BACK_STENCIL_FUNC_MASK 0x0f5c +#define NVCB97_SET_BACK_STENCIL_FUNC_MASK_V 7:0 + +#define NVCB97_SET_VERTEX_STREAM_SUBSTITUTE_A 0x0f84 +#define NVCB97_SET_VERTEX_STREAM_SUBSTITUTE_A_ADDRESS_UPPER 7:0 + +#define NVCB97_SET_VERTEX_STREAM_SUBSTITUTE_B 0x0f88 +#define NVCB97_SET_VERTEX_STREAM_SUBSTITUTE_B_ADDRESS_LOWER 31:0 + +#define NVCB97_SET_LINE_MODE_POLYGON_CLIP 0x0f8c +#define NVCB97_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE 0:0 +#define NVCB97_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DRAW_LINE 0x00000000 +#define NVCB97_SET_LINE_MODE_POLYGON_CLIP_GENERATED_EDGE_DO_NOT_DRAW_LINE 0x00000001 + +#define NVCB97_SET_SINGLE_CT_WRITE_CONTROL 0x0f90 +#define NVCB97_SET_SINGLE_CT_WRITE_CONTROL_ENABLE 0:0 +#define NVCB97_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_SINGLE_CT_WRITE_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_VTG_WARP_WATERMARKS 0x0f98 +#define NVCB97_SET_VTG_WARP_WATERMARKS_LOW 15:0 +#define NVCB97_SET_VTG_WARP_WATERMARKS_HIGH 31:16 + +#define NVCB97_SET_DEPTH_BOUNDS_MIN 0x0f9c +#define NVCB97_SET_DEPTH_BOUNDS_MIN_V 31:0 + +#define NVCB97_SET_DEPTH_BOUNDS_MAX 0x0fa0 +#define NVCB97_SET_DEPTH_BOUNDS_MAX_V 31:0 + +#define NVCB97_SET_SAMPLE_MASK 0x0fa4 +#define NVCB97_SET_SAMPLE_MASK_RASTER_OUT_ENABLE 0:0 +#define NVCB97_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_SAMPLE_MASK_RASTER_OUT_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE 4:4 +#define NVCB97_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_SAMPLE_MASK_COLOR_TARGET_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_COLOR_TARGET_SAMPLE_MASK 0x0fa8 +#define NVCB97_SET_COLOR_TARGET_SAMPLE_MASK_V 15:0 + +#define NVCB97_SET_CT_MRT_ENABLE 0x0fac +#define NVCB97_SET_CT_MRT_ENABLE_V 0:0 +#define NVCB97_SET_CT_MRT_ENABLE_V_FALSE 0x00000000 +#define NVCB97_SET_CT_MRT_ENABLE_V_TRUE 0x00000001 + +#define NVCB97_SET_NONMULTISAMPLED_Z 0x0fb0 +#define NVCB97_SET_NONMULTISAMPLED_Z_V 0:0 +#define NVCB97_SET_NONMULTISAMPLED_Z_V_PER_SAMPLE 0x00000000 +#define NVCB97_SET_NONMULTISAMPLED_Z_V_AT_PIXEL_CENTER 0x00000001 + +#define NVCB97_SET_TIR 0x0fb4 +#define NVCB97_SET_TIR_MODE 1:0 +#define NVCB97_SET_TIR_MODE_DISABLED 0x00000000 +#define NVCB97_SET_TIR_MODE_RASTER_N_TARGET_M 0x00000001 + +#define NVCB97_SET_ANTI_ALIAS_RASTER 0x0fb8 +#define NVCB97_SET_ANTI_ALIAS_RASTER_SAMPLES 2:0 +#define NVCB97_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_1X1 0x00000000 +#define NVCB97_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X2 0x00000002 +#define NVCB97_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVCB97_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVCB97_SET_ANTI_ALIAS_RASTER_SAMPLES_MODE_4X4 0x00000006 + +#define NVCB97_SET_SAMPLE_MASK_X0_Y0 0x0fbc +#define NVCB97_SET_SAMPLE_MASK_X0_Y0_V 15:0 + +#define NVCB97_SET_SAMPLE_MASK_X1_Y0 0x0fc0 +#define NVCB97_SET_SAMPLE_MASK_X1_Y0_V 15:0 + +#define NVCB97_SET_SAMPLE_MASK_X0_Y1 0x0fc4 +#define NVCB97_SET_SAMPLE_MASK_X0_Y1_V 15:0 + +#define NVCB97_SET_SAMPLE_MASK_X1_Y1 0x0fc8 +#define NVCB97_SET_SAMPLE_MASK_X1_Y1_V 15:0 + +#define NVCB97_SET_SURFACE_CLIP_ID_MEMORY_A 0x0fcc +#define NVCB97_SET_SURFACE_CLIP_ID_MEMORY_A_OFFSET_UPPER 7:0 + +#define NVCB97_SET_SURFACE_CLIP_ID_MEMORY_B 0x0fd0 +#define NVCB97_SET_SURFACE_CLIP_ID_MEMORY_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_TIR_MODULATION 0x0fd4 +#define NVCB97_SET_TIR_MODULATION_COMPONENT_SELECT 1:0 +#define NVCB97_SET_TIR_MODULATION_COMPONENT_SELECT_NO_MODULATION 0x00000000 +#define NVCB97_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGB 0x00000001 +#define NVCB97_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_ALPHA_ONLY 0x00000002 +#define NVCB97_SET_TIR_MODULATION_COMPONENT_SELECT_MODULATE_RGBA 0x00000003 + +#define NVCB97_SET_TIR_MODULATION_FUNCTION 0x0fd8 +#define NVCB97_SET_TIR_MODULATION_FUNCTION_SELECT 0:0 +#define NVCB97_SET_TIR_MODULATION_FUNCTION_SELECT_LINEAR 0x00000000 +#define NVCB97_SET_TIR_MODULATION_FUNCTION_SELECT_TABLE 0x00000001 + +#define NVCB97_SET_BLEND_OPT_CONTROL 0x0fdc +#define NVCB97_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS 0:0 +#define NVCB97_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_FALSE 0x00000000 +#define NVCB97_SET_BLEND_OPT_CONTROL_ALLOW_FLOAT_PIXEL_KILLS_TRUE 0x00000001 + +#define NVCB97_SET_ZT_A 0x0fe0 +#define NVCB97_SET_ZT_A_OFFSET_UPPER 7:0 + +#define NVCB97_SET_ZT_B 0x0fe4 +#define NVCB97_SET_ZT_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_ZT_FORMAT 0x0fe8 +#define NVCB97_SET_ZT_FORMAT_V 4:0 +#define NVCB97_SET_ZT_FORMAT_V_Z16 0x00000013 +#define NVCB97_SET_ZT_FORMAT_V_Z24S8 0x00000014 +#define NVCB97_SET_ZT_FORMAT_V_X8Z24 0x00000015 +#define NVCB97_SET_ZT_FORMAT_V_S8Z24 0x00000016 +#define NVCB97_SET_ZT_FORMAT_V_S8 0x00000017 +#define NVCB97_SET_ZT_FORMAT_V_ZF32 0x0000000A +#define NVCB97_SET_ZT_FORMAT_V_ZF32_X24S8 0x00000019 + +#define NVCB97_SET_ZT_BLOCK_SIZE 0x0fec +#define NVCB97_SET_ZT_BLOCK_SIZE_WIDTH 3:0 +#define NVCB97_SET_ZT_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000 +#define NVCB97_SET_ZT_BLOCK_SIZE_HEIGHT 7:4 +#define NVCB97_SET_ZT_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000 +#define NVCB97_SET_ZT_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001 +#define NVCB97_SET_ZT_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002 +#define NVCB97_SET_ZT_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVCB97_SET_ZT_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVCB97_SET_ZT_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_SET_ZT_BLOCK_SIZE_DEPTH 11:8 +#define NVCB97_SET_ZT_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000 + +#define NVCB97_SET_ZT_ARRAY_PITCH 0x0ff0 +#define NVCB97_SET_ZT_ARRAY_PITCH_V 31:0 + +#define NVCB97_SET_SURFACE_CLIP_HORIZONTAL 0x0ff4 +#define NVCB97_SET_SURFACE_CLIP_HORIZONTAL_X 15:0 +#define NVCB97_SET_SURFACE_CLIP_HORIZONTAL_WIDTH 31:16 + +#define NVCB97_SET_SURFACE_CLIP_VERTICAL 0x0ff8 +#define NVCB97_SET_SURFACE_CLIP_VERTICAL_Y 15:0 +#define NVCB97_SET_SURFACE_CLIP_VERTICAL_HEIGHT 31:16 + +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS 0x1000 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE 0:0 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_FALSE 0x00000000 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_SYSTEM_MEMORY_VOLATILE_TRUE 0x00000001 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY 5:4 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_VAF_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVCB97_SET_VIEWPORT_MULTICAST 0x1004 +#define NVCB97_SET_VIEWPORT_MULTICAST_ORDER 0:0 +#define NVCB97_SET_VIEWPORT_MULTICAST_ORDER_VIEWPORT_ORDER 0x00000000 +#define NVCB97_SET_VIEWPORT_MULTICAST_ORDER_PRIMITIVE_ORDER 0x00000001 + +#define NVCB97_SET_TESSELLATION_CUT_HEIGHT 0x1008 +#define NVCB97_SET_TESSELLATION_CUT_HEIGHT_V 4:0 + +#define NVCB97_SET_MAX_GS_INSTANCES_PER_TASK 0x100c +#define NVCB97_SET_MAX_GS_INSTANCES_PER_TASK_V 10:0 + +#define NVCB97_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK 0x1010 +#define NVCB97_SET_MAX_GS_OUTPUT_VERTICES_PER_TASK_V 15:0 + +#define NVCB97_SET_RESERVED_SW_METHOD00 0x1014 +#define NVCB97_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVCB97_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER 0x1018 +#define NVCB97_SET_GS_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVCB97_SET_BETA_CB_STORAGE_CONSTRAINT 0x101c +#define NVCB97_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVCB97_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_BETA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER 0x1020 +#define NVCB97_SET_TI_OUTPUT_CB_STORAGE_MULTIPLIER_V 9:0 + +#define NVCB97_SET_ALPHA_CB_STORAGE_CONSTRAINT 0x1024 +#define NVCB97_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE 0:0 +#define NVCB97_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ALPHA_CB_STORAGE_CONSTRAINT_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_RESERVED_SW_METHOD01 0x1028 +#define NVCB97_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD02 0x102c +#define NVCB97_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVCB97_SET_TIR_MODULATION_COEFFICIENT_TABLE(i) (0x1030+(i)*4) +#define NVCB97_SET_TIR_MODULATION_COEFFICIENT_TABLE_V0 7:0 +#define NVCB97_SET_TIR_MODULATION_COEFFICIENT_TABLE_V1 15:8 +#define NVCB97_SET_TIR_MODULATION_COEFFICIENT_TABLE_V2 23:16 +#define NVCB97_SET_TIR_MODULATION_COEFFICIENT_TABLE_V3 31:24 + +#define NVCB97_SET_SPARE_NOOP01 0x1044 +#define NVCB97_SET_SPARE_NOOP01_V 31:0 + +#define NVCB97_SET_SPARE_NOOP02 0x1048 +#define NVCB97_SET_SPARE_NOOP02_V 31:0 + +#define NVCB97_SET_SPARE_NOOP03 0x104c +#define NVCB97_SET_SPARE_NOOP03_V 31:0 + +#define NVCB97_SET_SPARE_NOOP04 0x1050 +#define NVCB97_SET_SPARE_NOOP04_V 31:0 + +#define NVCB97_SET_SPARE_NOOP05 0x1054 +#define NVCB97_SET_SPARE_NOOP05_V 31:0 + +#define NVCB97_SET_SPARE_NOOP06 0x1058 +#define NVCB97_SET_SPARE_NOOP06_V 31:0 + +#define NVCB97_SET_SPARE_NOOP07 0x105c +#define NVCB97_SET_SPARE_NOOP07_V 31:0 + +#define NVCB97_SET_SPARE_NOOP08 0x1060 +#define NVCB97_SET_SPARE_NOOP08_V 31:0 + +#define NVCB97_SET_SPARE_NOOP09 0x1064 +#define NVCB97_SET_SPARE_NOOP09_V 31:0 + +#define NVCB97_SET_SPARE_NOOP10 0x1068 +#define NVCB97_SET_SPARE_NOOP10_V 31:0 + +#define NVCB97_SET_SPARE_NOOP11 0x106c +#define NVCB97_SET_SPARE_NOOP11_V 31:0 + +#define NVCB97_SET_SPARE_NOOP12 0x1070 +#define NVCB97_SET_SPARE_NOOP12_V 31:0 + +#define NVCB97_SET_SPARE_NOOP13 0x1074 +#define NVCB97_SET_SPARE_NOOP13_V 31:0 + +#define NVCB97_SET_SPARE_NOOP14 0x1078 +#define NVCB97_SET_SPARE_NOOP14_V 31:0 + +#define NVCB97_SET_SPARE_NOOP15 0x107c +#define NVCB97_SET_SPARE_NOOP15_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD03 0x10b0 +#define NVCB97_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD04 0x10b4 +#define NVCB97_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD05 0x10b8 +#define NVCB97_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD06 0x10bc +#define NVCB97_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD07 0x10c0 +#define NVCB97_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD08 0x10c4 +#define NVCB97_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD09 0x10c8 +#define NVCB97_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_UNORM8 0x10cc +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_UNORM8_ALL_COVERED 23:16 + +#define NVCB97_SET_RESERVED_SW_METHOD10 0x10d0 +#define NVCB97_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD11 0x10d4 +#define NVCB97_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD12 0x10d8 +#define NVCB97_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD13 0x10dc +#define NVCB97_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_UNORM10 0x10e0 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_UNORM10_ALL_COVERED 23:16 + +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_UNORM16 0x10e4 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_UNORM16_ALL_COVERED 23:16 + +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_FP11 0x10e8 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED_ALL_HIT_ONCE 5:0 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_FP11_ALL_COVERED 21:16 + +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_FP16 0x10ec +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_FP16_ALL_COVERED 23:16 + +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_SRGB8 0x10f0 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED_ALL_HIT_ONCE 7:0 +#define NVCB97_SET_REDUCE_COLOR_THRESHOLDS_SRGB8_ALL_COVERED 23:16 + +#define NVCB97_UNBIND_ALL 0x10f4 +#define NVCB97_UNBIND_ALL_CONSTANT_BUFFERS 8:8 +#define NVCB97_UNBIND_ALL_CONSTANT_BUFFERS_FALSE 0x00000000 +#define NVCB97_UNBIND_ALL_CONSTANT_BUFFERS_TRUE 0x00000001 + +#define NVCB97_SET_CLEAR_SURFACE_CONTROL 0x10f8 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK 0:0 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_FALSE 0x00000000 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_RESPECT_STENCIL_MASK_TRUE 0x00000001 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT 4:4 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0 8:8 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_FALSE 0x00000000 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_USE_SCISSOR0_TRUE 0x00000001 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0 12:12 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_FALSE 0x00000000 +#define NVCB97_SET_CLEAR_SURFACE_CONTROL_USE_VIEWPORT_CLIP0_TRUE 0x00000001 + +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS 0x10fc +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVCB97_SET_RESERVED_SW_METHOD14 0x1100 +#define NVCB97_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVCB97_SET_RESERVED_SW_METHOD15 0x1104 +#define NVCB97_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVCB97_NO_OPERATION_DATA_HI 0x110c +#define NVCB97_NO_OPERATION_DATA_HI_V 31:0 + +#define NVCB97_SET_DEPTH_BIAS_CONTROL 0x1110 +#define NVCB97_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT 0:0 +#define NVCB97_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_FALSE 0x00000000 +#define NVCB97_SET_DEPTH_BIAS_CONTROL_DEPTH_FORMAT_DEPENDENT_TRUE 0x00000001 + +#define NVCB97_PM_TRIGGER_END 0x1114 +#define NVCB97_PM_TRIGGER_END_V 31:0 + +#define NVCB97_SET_VERTEX_ID_BASE 0x1118 +#define NVCB97_SET_VERTEX_ID_BASE_V 31:0 + +#define NVCB97_SET_STENCIL_COMPRESSION 0x111c +#define NVCB97_SET_STENCIL_COMPRESSION_ENABLE 0:0 +#define NVCB97_SET_STENCIL_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STENCIL_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A(i) (0x1120+(i)*4) +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0 0:0 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1 1:1 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2 2:2 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3 3:3 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0 4:4 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1 5:5 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2 6:6 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3 7:7 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0 8:8 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1 9:9 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2 10:10 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3 11:11 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0 12:12 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1 13:13 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2 14:14 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3 15:15 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0 16:16 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1 17:17 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2 18:18 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3 19:19 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0 20:20 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1 21:21 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2 22:22 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3 23:23 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0 24:24 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1 25:25 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2 26:26 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3 27:27 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0 28:28 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1 29:29 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2 30:30 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3 31:31 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_A_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B(i) (0x1128+(i)*4) +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0 0:0 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1 1:1 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2 2:2 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3 3:3 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE0_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0 4:4 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1 5:5 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2 6:6 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3 7:7 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE1_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0 8:8 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1 9:9 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2 10:10 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3 11:11 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE2_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0 12:12 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1 13:13 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2 14:14 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3 15:15 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE3_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0 16:16 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1 17:17 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2 18:18 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3 19:19 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE4_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0 20:20 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1 21:21 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2 22:22 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3 23:23 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE5_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0 24:24 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1 25:25 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2 26:26 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3 27:27 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE6_COMP3_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0 28:28 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP0_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1 29:29 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP1_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2 30:30 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP2_TRUE 0x00000001 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3 31:31 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_ATTRIBUTE_SKIP_MASK_B_ATTRIBUTE7_COMP3_TRUE 0x00000001 + +#define NVCB97_SET_TIR_CONTROL 0x1130 +#define NVCB97_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES 0:0 +#define NVCB97_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVCB97_SET_TIR_CONTROL_Z_PASS_PIXEL_COUNT_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVCB97_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES 4:4 +#define NVCB97_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_DISABLE 0x00000000 +#define NVCB97_SET_TIR_CONTROL_ALPHA_TO_COVERAGE_USE_RASTER_SAMPLES_ENABLE 0x00000001 +#define NVCB97_SET_TIR_CONTROL_REDUCE_COVERAGE 1:1 +#define NVCB97_SET_TIR_CONTROL_REDUCE_COVERAGE_DISABLE 0x00000000 +#define NVCB97_SET_TIR_CONTROL_REDUCE_COVERAGE_ENABLE 0x00000001 +#define NVCB97_SET_TIR_CONTROL_REDUCTION_MODE 2:2 +#define NVCB97_SET_TIR_CONTROL_REDUCTION_MODE_AFFINITY_MAP 0x00000000 +#define NVCB97_SET_TIR_CONTROL_REDUCTION_MODE_TRUNCATION 0x00000001 + +#define NVCB97_SET_MUTABLE_METHOD_CONTROL 0x1134 +#define NVCB97_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT 0:0 +#define NVCB97_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_FALSE 0x00000000 +#define NVCB97_SET_MUTABLE_METHOD_CONTROL_TREAT_MUTABLE_AS_HEAVYWEIGHT_TRUE 0x00000001 + +#define NVCB97_SET_POST_PS_INITIAL_COVERAGE 0x1138 +#define NVCB97_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE 0:0 +#define NVCB97_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_FALSE 0x00000000 +#define NVCB97_SET_POST_PS_INITIAL_COVERAGE_USE_PRE_PS_COVERAGE_TRUE 0x00000001 + +#define NVCB97_SET_FILL_VIA_TRIANGLE 0x113c +#define NVCB97_SET_FILL_VIA_TRIANGLE_MODE 1:0 +#define NVCB97_SET_FILL_VIA_TRIANGLE_MODE_DISABLED 0x00000000 +#define NVCB97_SET_FILL_VIA_TRIANGLE_MODE_FILL_ALL 0x00000001 +#define NVCB97_SET_FILL_VIA_TRIANGLE_MODE_FILL_BBOX 0x00000002 + +#define NVCB97_SET_BLEND_PER_FORMAT_ENABLE 0x1140 +#define NVCB97_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16 4:4 +#define NVCB97_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_FALSE 0x00000000 +#define NVCB97_SET_BLEND_PER_FORMAT_ENABLE_SNORM8_UNORM16_SNORM16_TRUE 0x00000001 + +#define NVCB97_FLUSH_PENDING_WRITES 0x1144 +#define NVCB97_FLUSH_PENDING_WRITES_SM_DOES_GLOBAL_STORE 0:0 + +#define NVCB97_SET_VERTEX_ATTRIBUTE_A(i) (0x1160+(i)*4) +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_STREAM 4:0 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_SOURCE 6:6 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_SOURCE_ACTIVE 0x00000000 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_SOURCE_INACTIVE 0x00000001 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_OFFSET 20:7 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS 26:21 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE 29:27 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B 31:31 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_FALSE 0x00000000 +#define NVCB97_SET_VERTEX_ATTRIBUTE_A_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVCB97_SET_VERTEX_ATTRIBUTE_B(i) (0x11a0+(i)*4) +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_STREAM 4:0 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_SOURCE 6:6 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_SOURCE_ACTIVE 0x00000000 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_SOURCE_INACTIVE 0x00000001 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_OFFSET 20:7 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS 26:21 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32_A32 0x00000001 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32_B32 0x00000002 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16_A16 0x00000003 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32_G32 0x00000004 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16_B16 0x00000005 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8B8G8R8 0x0000002F +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8_A8 0x0000000A +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_X8B8G8R8 0x00000033 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A2B10G10R10 0x00000030 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_B10G11R11 0x00000031 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16_G16 0x0000000F +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R32 0x00000012 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8_B8 0x00000013 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_G8R8 0x00000032 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8_G8 0x00000018 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R16 0x0000001B +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_R8 0x0000001D +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_COMPONENT_BIT_WIDTHS_A8 0x00000034 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE 29:27 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_UNUSED_ENUM_DO_NOT_USE_BECAUSE_IT_WILL_GO_AWAY 0x00000000 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SINT 0x00000003 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_UINT 0x00000004 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_USCALED 0x00000005 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_SSCALED 0x00000006 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_NUMERICAL_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B 31:31 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_FALSE 0x00000000 +#define NVCB97_SET_VERTEX_ATTRIBUTE_B_SWAP_R_AND_B_TRUE 0x00000001 + +#define NVCB97_SET_ANTI_ALIAS_SAMPLE_POSITIONS(i) (0x11e0+(i)*4) +#define NVCB97_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X0 3:0 +#define NVCB97_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y0 7:4 +#define NVCB97_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X1 11:8 +#define NVCB97_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y1 15:12 +#define NVCB97_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X2 19:16 +#define NVCB97_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y2 23:20 +#define NVCB97_SET_ANTI_ALIAS_SAMPLE_POSITIONS_X3 27:24 +#define NVCB97_SET_ANTI_ALIAS_SAMPLE_POSITIONS_Y3 31:28 + +#define NVCB97_SET_OFFSET_RENDER_TARGET_INDEX 0x11f0 +#define NVCB97_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX 0:0 +#define NVCB97_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_FALSE 0x00000000 +#define NVCB97_SET_OFFSET_RENDER_TARGET_INDEX_BY_VIEWPORT_INDEX_TRUE 0x00000001 + +#define NVCB97_FORCE_HEAVYWEIGHT_METHOD_SYNC 0x11f4 +#define NVCB97_FORCE_HEAVYWEIGHT_METHOD_SYNC_V 31:0 + +#define NVCB97_SET_COVERAGE_TO_COLOR 0x11f8 +#define NVCB97_SET_COVERAGE_TO_COLOR_ENABLE 0:0 +#define NVCB97_SET_COVERAGE_TO_COLOR_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_COVERAGE_TO_COLOR_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_COVERAGE_TO_COLOR_CT_SELECT 6:4 + +#define NVCB97_DECOMPRESS_ZETA_SURFACE 0x11fc +#define NVCB97_DECOMPRESS_ZETA_SURFACE_Z_ENABLE 0:0 +#define NVCB97_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVCB97_DECOMPRESS_ZETA_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVCB97_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE 4:4 +#define NVCB97_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVCB97_DECOMPRESS_ZETA_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_SCREEN_STATE_MASK 0x1204 +#define NVCB97_SET_SCREEN_STATE_MASK_MASK 3:0 + +#define NVCB97_SET_ZT_SPARSE 0x1208 +#define NVCB97_SET_ZT_SPARSE_ENABLE 0:0 +#define NVCB97_SET_ZT_SPARSE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZT_SPARSE_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ZT_SPARSE_UNMAPPED_COMPARE 1:1 +#define NVCB97_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_UNMAPPED_0 0x00000000 +#define NVCB97_SET_ZT_SPARSE_UNMAPPED_COMPARE_ZT_SPARSE_FAIL_ALWAYS 0x00000001 + +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST 0x1214 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_START_INDEX 15:0 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT 0x1218 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_START_INDEX 15:0 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_DRAW_VERTEX_ARRAY_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVCB97_SET_CT_SELECT 0x121c +#define NVCB97_SET_CT_SELECT_TARGET_COUNT 3:0 +#define NVCB97_SET_CT_SELECT_TARGET0 6:4 +#define NVCB97_SET_CT_SELECT_TARGET1 9:7 +#define NVCB97_SET_CT_SELECT_TARGET2 12:10 +#define NVCB97_SET_CT_SELECT_TARGET3 15:13 +#define NVCB97_SET_CT_SELECT_TARGET4 18:16 +#define NVCB97_SET_CT_SELECT_TARGET5 21:19 +#define NVCB97_SET_CT_SELECT_TARGET6 24:22 +#define NVCB97_SET_CT_SELECT_TARGET7 27:25 + +#define NVCB97_SET_COMPRESSION_THRESHOLD 0x1220 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES 3:0 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__0 0x00000000 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__1 0x00000001 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__2 0x00000002 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__4 0x00000003 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__8 0x00000004 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__16 0x00000005 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__32 0x00000006 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__64 0x00000007 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__128 0x00000008 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__256 0x00000009 +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__512 0x0000000A +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__1024 0x0000000B +#define NVCB97_SET_COMPRESSION_THRESHOLD_SAMPLES__2048 0x0000000C + +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL 0x1224 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE 1:0 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_NO_CONFLICT_DETECT 0x00000000 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_SAMPLE 0x00000001 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_MODE_CONFLICT_DETECT_PIXEL 0x00000002 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE 2:2 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_16X16 0x00000000 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_TILE_SIZE_TC_TILE_SIZE_8X8 0x00000001 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER 3:3 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_ORDERED 0x00000000 +#define NVCB97_SET_PIXEL_SHADER_INTERLOCK_CONTROL_TILE_COALESCER_FRAGMENT_ORDER_TC_FRAGMENT_UNORDERED 0x00000001 + +#define NVCB97_SET_ZT_SIZE_A 0x1228 +#define NVCB97_SET_ZT_SIZE_A_WIDTH 27:0 + +#define NVCB97_SET_ZT_SIZE_B 0x122c +#define NVCB97_SET_ZT_SIZE_B_HEIGHT 17:0 + +#define NVCB97_SET_ZT_SIZE_C 0x1230 +#define NVCB97_SET_ZT_SIZE_C_THIRD_DIMENSION 15:0 +#define NVCB97_SET_ZT_SIZE_C_CONTROL 16:16 +#define NVCB97_SET_ZT_SIZE_C_CONTROL_THIRD_DIMENSION_DEFINES_ARRAY_SIZE 0x00000000 +#define NVCB97_SET_ZT_SIZE_C_CONTROL_ARRAY_SIZE_IS_ONE 0x00000001 + +#define NVCB97_SET_SAMPLER_BINDING 0x1234 +#define NVCB97_SET_SAMPLER_BINDING_V 0:0 +#define NVCB97_SET_SAMPLER_BINDING_V_INDEPENDENTLY 0x00000000 +#define NVCB97_SET_SAMPLER_BINDING_V_VIA_HEADER_BINDING 0x00000001 + +#define NVCB97_DRAW_AUTO 0x123c +#define NVCB97_DRAW_AUTO_BYTE_COUNT 31:0 + +#define NVCB97_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK(i) (0x1240+(i)*4) +#define NVCB97_SET_POST_VTG_SHADER_ATTRIBUTE_SKIP_MASK_V 31:0 + +#define NVCB97_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE 0x1260 +#define NVCB97_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_INDEX 7:0 +#define NVCB97_SET_PIXEL_SHADER_TICKET_DISPENSER_VALUE_TICKET_DISPENSER_VALUE 23:8 + +#define NVCB97_SET_BACK_END_COPY_A 0x1264 +#define NVCB97_SET_BACK_END_COPY_A_DWORDS 7:0 +#define NVCB97_SET_BACK_END_COPY_A_SATURATE32_ENABLE 8:8 +#define NVCB97_SET_BACK_END_COPY_A_SATURATE32_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_BACK_END_COPY_A_SATURATE32_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE 12:12 +#define NVCB97_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_BACK_END_COPY_A_TIMESTAMP_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_BACK_END_COPY_B 0x1268 +#define NVCB97_SET_BACK_END_COPY_B_SRC_ADDRESS_UPPER 7:0 + +#define NVCB97_SET_BACK_END_COPY_C 0x126c +#define NVCB97_SET_BACK_END_COPY_C_SRC_ADDRESS_LOWER 31:0 + +#define NVCB97_SET_BACK_END_COPY_D 0x1270 +#define NVCB97_SET_BACK_END_COPY_D_DEST_ADDRESS_UPPER 7:0 + +#define NVCB97_SET_BACK_END_COPY_E 0x1274 +#define NVCB97_SET_BACK_END_COPY_E_DEST_ADDRESS_LOWER 31:0 + +#define NVCB97_SET_CIRCULAR_BUFFER_SIZE 0x1280 +#define NVCB97_SET_CIRCULAR_BUFFER_SIZE_CACHE_LINES_PER_SM 19:0 + +#define NVCB97_SET_VTG_REGISTER_WATERMARKS 0x1284 +#define NVCB97_SET_VTG_REGISTER_WATERMARKS_LOW 15:0 +#define NVCB97_SET_VTG_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS 0x1290 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY 5:4 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_READ_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVCB97_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE 0x12a4 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_INDEX_TOPOLOGY_CHANGE_V 31:0 + +#define NVCB97_CLEAR_ZCULL_REGION 0x12c8 +#define NVCB97_CLEAR_ZCULL_REGION_Z_ENABLE 0:0 +#define NVCB97_CLEAR_ZCULL_REGION_Z_ENABLE_FALSE 0x00000000 +#define NVCB97_CLEAR_ZCULL_REGION_Z_ENABLE_TRUE 0x00000001 +#define NVCB97_CLEAR_ZCULL_REGION_STENCIL_ENABLE 4:4 +#define NVCB97_CLEAR_ZCULL_REGION_STENCIL_ENABLE_FALSE 0x00000000 +#define NVCB97_CLEAR_ZCULL_REGION_STENCIL_ENABLE_TRUE 0x00000001 +#define NVCB97_CLEAR_ZCULL_REGION_USE_CLEAR_RECT 1:1 +#define NVCB97_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_FALSE 0x00000000 +#define NVCB97_CLEAR_ZCULL_REGION_USE_CLEAR_RECT_TRUE 0x00000001 +#define NVCB97_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX 2:2 +#define NVCB97_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_FALSE 0x00000000 +#define NVCB97_CLEAR_ZCULL_REGION_USE_RT_ARRAY_INDEX_TRUE 0x00000001 +#define NVCB97_CLEAR_ZCULL_REGION_RT_ARRAY_INDEX 20:5 +#define NVCB97_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE 3:3 +#define NVCB97_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_FALSE 0x00000000 +#define NVCB97_CLEAR_ZCULL_REGION_MAKE_CONSERVATIVE_TRUE 0x00000001 + +#define NVCB97_SET_DEPTH_TEST 0x12cc +#define NVCB97_SET_DEPTH_TEST_ENABLE 0:0 +#define NVCB97_SET_DEPTH_TEST_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_DEPTH_TEST_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_FILL_MODE 0x12d0 +#define NVCB97_SET_FILL_MODE_V 31:0 +#define NVCB97_SET_FILL_MODE_V_POINT 0x00000001 +#define NVCB97_SET_FILL_MODE_V_WIREFRAME 0x00000002 +#define NVCB97_SET_FILL_MODE_V_SOLID 0x00000003 + +#define NVCB97_SET_SHADE_MODE 0x12d4 +#define NVCB97_SET_SHADE_MODE_V 31:0 +#define NVCB97_SET_SHADE_MODE_V_FLAT 0x00000001 +#define NVCB97_SET_SHADE_MODE_V_GOURAUD 0x00000002 +#define NVCB97_SET_SHADE_MODE_V_OGL_FLAT 0x00001D00 +#define NVCB97_SET_SHADE_MODE_V_OGL_SMOOTH 0x00001D01 + +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS 0x12d8 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_NONINTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS 0x12dc +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY 5:4 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_FIRST 0x00000000 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_NORMAL 0x00000001 +#define NVCB97_SET_L2_CACHE_CONTROL_FOR_ROP_INTERLOCKED_WRITE_REQUESTS_POLICY_EVICT_LAST 0x00000002 + +#define NVCB97_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL 0x12e0 +#define NVCB97_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT 3:0 +#define NVCB97_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1 0x00000000 +#define NVCB97_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_2X2 0x00000001 +#define NVCB97_SET_ALPHA_TO_COVERAGE_DITHER_CONTROL_DITHER_FOOTPRINT_PIXELS_1X1_VIRTUAL_SAMPLES 0x00000002 + +#define NVCB97_SET_BLEND_STATE_PER_TARGET 0x12e4 +#define NVCB97_SET_BLEND_STATE_PER_TARGET_ENABLE 0:0 +#define NVCB97_SET_BLEND_STATE_PER_TARGET_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_BLEND_STATE_PER_TARGET_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_DEPTH_WRITE 0x12e8 +#define NVCB97_SET_DEPTH_WRITE_ENABLE 0:0 +#define NVCB97_SET_DEPTH_WRITE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_DEPTH_WRITE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_ALPHA_TEST 0x12ec +#define NVCB97_SET_ALPHA_TEST_ENABLE 0:0 +#define NVCB97_SET_ALPHA_TEST_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ALPHA_TEST_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_INLINE_INDEX4X8_ALIGN 0x1300 +#define NVCB97_SET_INLINE_INDEX4X8_ALIGN_COUNT 29:0 +#define NVCB97_SET_INLINE_INDEX4X8_ALIGN_START 31:30 + +#define NVCB97_DRAW_INLINE_INDEX4X8 0x1304 +#define NVCB97_DRAW_INLINE_INDEX4X8_INDEX0 7:0 +#define NVCB97_DRAW_INLINE_INDEX4X8_INDEX1 15:8 +#define NVCB97_DRAW_INLINE_INDEX4X8_INDEX2 23:16 +#define NVCB97_DRAW_INLINE_INDEX4X8_INDEX3 31:24 + +#define NVCB97_D3D_SET_CULL_MODE 0x1308 +#define NVCB97_D3D_SET_CULL_MODE_V 31:0 +#define NVCB97_D3D_SET_CULL_MODE_V_NONE 0x00000001 +#define NVCB97_D3D_SET_CULL_MODE_V_CW 0x00000002 +#define NVCB97_D3D_SET_CULL_MODE_V_CCW 0x00000003 + +#define NVCB97_SET_DEPTH_FUNC 0x130c +#define NVCB97_SET_DEPTH_FUNC_V 31:0 +#define NVCB97_SET_DEPTH_FUNC_V_OGL_NEVER 0x00000200 +#define NVCB97_SET_DEPTH_FUNC_V_OGL_LESS 0x00000201 +#define NVCB97_SET_DEPTH_FUNC_V_OGL_EQUAL 0x00000202 +#define NVCB97_SET_DEPTH_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVCB97_SET_DEPTH_FUNC_V_OGL_GREATER 0x00000204 +#define NVCB97_SET_DEPTH_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVCB97_SET_DEPTH_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVCB97_SET_DEPTH_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVCB97_SET_DEPTH_FUNC_V_D3D_NEVER 0x00000001 +#define NVCB97_SET_DEPTH_FUNC_V_D3D_LESS 0x00000002 +#define NVCB97_SET_DEPTH_FUNC_V_D3D_EQUAL 0x00000003 +#define NVCB97_SET_DEPTH_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVCB97_SET_DEPTH_FUNC_V_D3D_GREATER 0x00000005 +#define NVCB97_SET_DEPTH_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVCB97_SET_DEPTH_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVCB97_SET_DEPTH_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVCB97_SET_ALPHA_REF 0x1310 +#define NVCB97_SET_ALPHA_REF_V 31:0 + +#define NVCB97_SET_ALPHA_FUNC 0x1314 +#define NVCB97_SET_ALPHA_FUNC_V 31:0 +#define NVCB97_SET_ALPHA_FUNC_V_OGL_NEVER 0x00000200 +#define NVCB97_SET_ALPHA_FUNC_V_OGL_LESS 0x00000201 +#define NVCB97_SET_ALPHA_FUNC_V_OGL_EQUAL 0x00000202 +#define NVCB97_SET_ALPHA_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVCB97_SET_ALPHA_FUNC_V_OGL_GREATER 0x00000204 +#define NVCB97_SET_ALPHA_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVCB97_SET_ALPHA_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVCB97_SET_ALPHA_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVCB97_SET_ALPHA_FUNC_V_D3D_NEVER 0x00000001 +#define NVCB97_SET_ALPHA_FUNC_V_D3D_LESS 0x00000002 +#define NVCB97_SET_ALPHA_FUNC_V_D3D_EQUAL 0x00000003 +#define NVCB97_SET_ALPHA_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVCB97_SET_ALPHA_FUNC_V_D3D_GREATER 0x00000005 +#define NVCB97_SET_ALPHA_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVCB97_SET_ALPHA_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVCB97_SET_ALPHA_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVCB97_SET_DRAW_AUTO_STRIDE 0x1318 +#define NVCB97_SET_DRAW_AUTO_STRIDE_V 11:0 + +#define NVCB97_SET_BLEND_CONST_RED 0x131c +#define NVCB97_SET_BLEND_CONST_RED_V 31:0 + +#define NVCB97_SET_BLEND_CONST_GREEN 0x1320 +#define NVCB97_SET_BLEND_CONST_GREEN_V 31:0 + +#define NVCB97_SET_BLEND_CONST_BLUE 0x1324 +#define NVCB97_SET_BLEND_CONST_BLUE_V 31:0 + +#define NVCB97_SET_BLEND_CONST_ALPHA 0x1328 +#define NVCB97_SET_BLEND_CONST_ALPHA_V 31:0 + +#define NVCB97_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVCB97_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVCB97_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVCB97_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVCB97_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVCB97_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVCB97_SET_BLEND_SEPARATE_FOR_ALPHA 0x133c +#define NVCB97_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVCB97_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_BLEND_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_BLEND_COLOR_OP 0x1340 +#define NVCB97_SET_BLEND_COLOR_OP_V 31:0 +#define NVCB97_SET_BLEND_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVCB97_SET_BLEND_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVCB97_SET_BLEND_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVCB97_SET_BLEND_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVCB97_SET_BLEND_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVCB97_SET_BLEND_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVCB97_SET_BLEND_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVCB97_SET_BLEND_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVCB97_SET_BLEND_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVCB97_SET_BLEND_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF 0x1344 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V 31:0 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVCB97_SET_BLEND_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF 0x1348 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V 31:0 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVCB97_SET_BLEND_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVCB97_SET_BLEND_ALPHA_OP 0x134c +#define NVCB97_SET_BLEND_ALPHA_OP_V 31:0 +#define NVCB97_SET_BLEND_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVCB97_SET_BLEND_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVCB97_SET_BLEND_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVCB97_SET_BLEND_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVCB97_SET_BLEND_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVCB97_SET_BLEND_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVCB97_SET_BLEND_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVCB97_SET_BLEND_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVCB97_SET_BLEND_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVCB97_SET_BLEND_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF 0x1350 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V 31:0 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVCB97_SET_BLEND_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVCB97_SET_GLOBAL_COLOR_KEY 0x1354 +#define NVCB97_SET_GLOBAL_COLOR_KEY_ENABLE 0:0 +#define NVCB97_SET_GLOBAL_COLOR_KEY_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_GLOBAL_COLOR_KEY_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF 0x1358 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V 31:0 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVCB97_SET_BLEND_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVCB97_SET_SINGLE_ROP_CONTROL 0x135c +#define NVCB97_SET_SINGLE_ROP_CONTROL_ENABLE 0:0 +#define NVCB97_SET_SINGLE_ROP_CONTROL_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_SINGLE_ROP_CONTROL_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_BLEND(i) (0x1360+(i)*4) +#define NVCB97_SET_BLEND_ENABLE 0:0 +#define NVCB97_SET_BLEND_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_BLEND_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_STENCIL_TEST 0x1380 +#define NVCB97_SET_STENCIL_TEST_ENABLE 0:0 +#define NVCB97_SET_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_STENCIL_OP_FAIL 0x1384 +#define NVCB97_SET_STENCIL_OP_FAIL_V 31:0 +#define NVCB97_SET_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVCB97_SET_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVCB97_SET_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVCB97_SET_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVCB97_SET_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVCB97_SET_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVCB97_SET_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVCB97_SET_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVCB97_SET_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVCB97_SET_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVCB97_SET_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVCB97_SET_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVCB97_SET_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVCB97_SET_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVCB97_SET_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVCB97_SET_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVCB97_SET_STENCIL_OP_ZFAIL 0x1388 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V 31:0 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVCB97_SET_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVCB97_SET_STENCIL_OP_ZPASS 0x138c +#define NVCB97_SET_STENCIL_OP_ZPASS_V 31:0 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVCB97_SET_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVCB97_SET_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVCB97_SET_STENCIL_FUNC 0x1390 +#define NVCB97_SET_STENCIL_FUNC_V 31:0 +#define NVCB97_SET_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVCB97_SET_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVCB97_SET_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVCB97_SET_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVCB97_SET_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVCB97_SET_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVCB97_SET_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVCB97_SET_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVCB97_SET_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVCB97_SET_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVCB97_SET_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVCB97_SET_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVCB97_SET_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVCB97_SET_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVCB97_SET_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVCB97_SET_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVCB97_SET_STENCIL_FUNC_REF 0x1394 +#define NVCB97_SET_STENCIL_FUNC_REF_V 7:0 + +#define NVCB97_SET_STENCIL_FUNC_MASK 0x1398 +#define NVCB97_SET_STENCIL_FUNC_MASK_V 7:0 + +#define NVCB97_SET_STENCIL_MASK 0x139c +#define NVCB97_SET_STENCIL_MASK_V 7:0 + +#define NVCB97_SET_DRAW_AUTO_START 0x13a4 +#define NVCB97_SET_DRAW_AUTO_START_BYTE_COUNT 31:0 + +#define NVCB97_SET_PS_SATURATE 0x13a8 +#define NVCB97_SET_PS_SATURATE_OUTPUT0 0:0 +#define NVCB97_SET_PS_SATURATE_OUTPUT0_FALSE 0x00000000 +#define NVCB97_SET_PS_SATURATE_OUTPUT0_TRUE 0x00000001 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE0 1:1 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE0_ZERO_TO_PLUS_ONE 0x00000000 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE0_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVCB97_SET_PS_SATURATE_OUTPUT1 4:4 +#define NVCB97_SET_PS_SATURATE_OUTPUT1_FALSE 0x00000000 +#define NVCB97_SET_PS_SATURATE_OUTPUT1_TRUE 0x00000001 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE1 5:5 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE1_ZERO_TO_PLUS_ONE 0x00000000 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE1_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVCB97_SET_PS_SATURATE_OUTPUT2 8:8 +#define NVCB97_SET_PS_SATURATE_OUTPUT2_FALSE 0x00000000 +#define NVCB97_SET_PS_SATURATE_OUTPUT2_TRUE 0x00000001 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE2 9:9 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE2_ZERO_TO_PLUS_ONE 0x00000000 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE2_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVCB97_SET_PS_SATURATE_OUTPUT3 12:12 +#define NVCB97_SET_PS_SATURATE_OUTPUT3_FALSE 0x00000000 +#define NVCB97_SET_PS_SATURATE_OUTPUT3_TRUE 0x00000001 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE3 13:13 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE3_ZERO_TO_PLUS_ONE 0x00000000 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE3_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVCB97_SET_PS_SATURATE_OUTPUT4 16:16 +#define NVCB97_SET_PS_SATURATE_OUTPUT4_FALSE 0x00000000 +#define NVCB97_SET_PS_SATURATE_OUTPUT4_TRUE 0x00000001 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE4 17:17 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE4_ZERO_TO_PLUS_ONE 0x00000000 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE4_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVCB97_SET_PS_SATURATE_OUTPUT5 20:20 +#define NVCB97_SET_PS_SATURATE_OUTPUT5_FALSE 0x00000000 +#define NVCB97_SET_PS_SATURATE_OUTPUT5_TRUE 0x00000001 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE5 21:21 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE5_ZERO_TO_PLUS_ONE 0x00000000 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE5_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVCB97_SET_PS_SATURATE_OUTPUT6 24:24 +#define NVCB97_SET_PS_SATURATE_OUTPUT6_FALSE 0x00000000 +#define NVCB97_SET_PS_SATURATE_OUTPUT6_TRUE 0x00000001 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE6 25:25 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE6_ZERO_TO_PLUS_ONE 0x00000000 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE6_MINUS_ONE_TO_PLUS_ONE 0x00000001 +#define NVCB97_SET_PS_SATURATE_OUTPUT7 28:28 +#define NVCB97_SET_PS_SATURATE_OUTPUT7_FALSE 0x00000000 +#define NVCB97_SET_PS_SATURATE_OUTPUT7_TRUE 0x00000001 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE7 29:29 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE7_ZERO_TO_PLUS_ONE 0x00000000 +#define NVCB97_SET_PS_SATURATE_CLAMP_RANGE7_MINUS_ONE_TO_PLUS_ONE 0x00000001 + +#define NVCB97_SET_WINDOW_ORIGIN 0x13ac +#define NVCB97_SET_WINDOW_ORIGIN_MODE 0:0 +#define NVCB97_SET_WINDOW_ORIGIN_MODE_UPPER_LEFT 0x00000000 +#define NVCB97_SET_WINDOW_ORIGIN_MODE_LOWER_LEFT 0x00000001 +#define NVCB97_SET_WINDOW_ORIGIN_FLIP_Y 4:4 +#define NVCB97_SET_WINDOW_ORIGIN_FLIP_Y_FALSE 0x00000000 +#define NVCB97_SET_WINDOW_ORIGIN_FLIP_Y_TRUE 0x00000001 + +#define NVCB97_SET_LINE_WIDTH_FLOAT 0x13b0 +#define NVCB97_SET_LINE_WIDTH_FLOAT_V 31:0 + +#define NVCB97_SET_ALIASED_LINE_WIDTH_FLOAT 0x13b4 +#define NVCB97_SET_ALIASED_LINE_WIDTH_FLOAT_V 31:0 + +#define NVCB97_SET_LINE_MULTISAMPLE_OVERRIDE 0x1418 +#define NVCB97_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE 0:0 +#define NVCB97_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_LINE_MULTISAMPLE_OVERRIDE_ENABLE_TRUE 0x00000001 + +#define NVCB97_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVCB97_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVCB97_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVCB97_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVCB97_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x1428 +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVCB97_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVCB97_SET_GLOBAL_BASE_VERTEX_INDEX 0x1434 +#define NVCB97_SET_GLOBAL_BASE_VERTEX_INDEX_V 31:0 + +#define NVCB97_SET_GLOBAL_BASE_INSTANCE_INDEX 0x1438 +#define NVCB97_SET_GLOBAL_BASE_INSTANCE_INDEX_V 31:0 + +#define NVCB97_SET_PS_WARP_WATERMARKS 0x1450 +#define NVCB97_SET_PS_WARP_WATERMARKS_LOW 15:0 +#define NVCB97_SET_PS_WARP_WATERMARKS_HIGH 31:16 + +#define NVCB97_SET_PS_REGISTER_WATERMARKS 0x1454 +#define NVCB97_SET_PS_REGISTER_WATERMARKS_LOW 15:0 +#define NVCB97_SET_PS_REGISTER_WATERMARKS_HIGH 31:16 + +#define NVCB97_STORE_ZCULL 0x1464 +#define NVCB97_STORE_ZCULL_V 0:0 + +#define NVCB97_SET_ITERATED_BLEND_CONSTANT_RED(j) (0x1480+(j)*16) +#define NVCB97_SET_ITERATED_BLEND_CONSTANT_RED_V 15:0 + +#define NVCB97_SET_ITERATED_BLEND_CONSTANT_GREEN(j) (0x1484+(j)*16) +#define NVCB97_SET_ITERATED_BLEND_CONSTANT_GREEN_V 15:0 + +#define NVCB97_SET_ITERATED_BLEND_CONSTANT_BLUE(j) (0x1488+(j)*16) +#define NVCB97_SET_ITERATED_BLEND_CONSTANT_BLUE_V 15:0 + +#define NVCB97_LOAD_ZCULL 0x1500 +#define NVCB97_LOAD_ZCULL_V 0:0 + +#define NVCB97_SET_SURFACE_CLIP_ID_HEIGHT 0x1504 +#define NVCB97_SET_SURFACE_CLIP_ID_HEIGHT_V 31:0 + +#define NVCB97_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL 0x1508 +#define NVCB97_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMIN 15:0 +#define NVCB97_SET_CLIP_ID_CLEAR_RECT_HORIZONTAL_XMAX 31:16 + +#define NVCB97_SET_CLIP_ID_CLEAR_RECT_VERTICAL 0x150c +#define NVCB97_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMIN 15:0 +#define NVCB97_SET_CLIP_ID_CLEAR_RECT_VERTICAL_YMAX 31:16 + +#define NVCB97_SET_USER_CLIP_ENABLE 0x1510 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE0 0:0 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE0_FALSE 0x00000000 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE0_TRUE 0x00000001 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE1 1:1 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE1_FALSE 0x00000000 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE1_TRUE 0x00000001 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE2 2:2 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE2_FALSE 0x00000000 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE2_TRUE 0x00000001 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE3 3:3 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE3_FALSE 0x00000000 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE3_TRUE 0x00000001 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE4 4:4 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE4_FALSE 0x00000000 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE4_TRUE 0x00000001 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE5 5:5 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE5_FALSE 0x00000000 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE5_TRUE 0x00000001 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE6 6:6 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE6_FALSE 0x00000000 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE6_TRUE 0x00000001 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE7 7:7 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE7_FALSE 0x00000000 +#define NVCB97_SET_USER_CLIP_ENABLE_PLANE7_TRUE 0x00000001 + +#define NVCB97_SET_ZPASS_PIXEL_COUNT 0x1514 +#define NVCB97_SET_ZPASS_PIXEL_COUNT_ENABLE 0:0 +#define NVCB97_SET_ZPASS_PIXEL_COUNT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZPASS_PIXEL_COUNT_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_POINT_SIZE 0x1518 +#define NVCB97_SET_POINT_SIZE_V 31:0 + +#define NVCB97_SET_ZCULL_STATS 0x151c +#define NVCB97_SET_ZCULL_STATS_ENABLE 0:0 +#define NVCB97_SET_ZCULL_STATS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_STATS_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_POINT_SPRITE 0x1520 +#define NVCB97_SET_POINT_SPRITE_ENABLE 0:0 +#define NVCB97_SET_POINT_SPRITE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_POINT_SPRITE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_SHADER_EXCEPTIONS 0x1528 +#define NVCB97_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVCB97_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVCB97_CLEAR_REPORT_VALUE 0x1530 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE 4:0 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_DA_VERTICES_GENERATED 0x00000012 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_DA_PRIMITIVES_GENERATED 0x00000013 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_VS_INVOCATIONS 0x00000015 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_TI_INVOCATIONS 0x00000016 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_TS_INVOCATIONS 0x00000017 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_TS_PRIMITIVES_GENERATED 0x00000018 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_GS_INVOCATIONS 0x0000001A +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_GS_PRIMITIVES_GENERATED 0x0000001B +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_VTG_PRIMITIVES_OUT 0x0000001F +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_SUCCEEDED 0x00000010 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_STREAMING_PRIMITIVES_NEEDED 0x00000011 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000003 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_CLIPPER_INVOCATIONS 0x0000001C +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_CLIPPER_PRIMITIVES_GENERATED 0x0000001D +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_ZCULL_STATS 0x00000002 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_PS_INVOCATIONS 0x0000001E +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_ZPASS_PIXEL_CNT 0x00000001 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_ALPHA_BETA_CLOCKS 0x00000004 +#define NVCB97_CLEAR_REPORT_VALUE_TYPE_SCG_CLOCKS 0x00000009 + +#define NVCB97_SET_ANTI_ALIAS_ENABLE 0x1534 +#define NVCB97_SET_ANTI_ALIAS_ENABLE_V 0:0 +#define NVCB97_SET_ANTI_ALIAS_ENABLE_V_FALSE 0x00000000 +#define NVCB97_SET_ANTI_ALIAS_ENABLE_V_TRUE 0x00000001 + +#define NVCB97_SET_ZT_SELECT 0x1538 +#define NVCB97_SET_ZT_SELECT_TARGET_COUNT 0:0 + +#define NVCB97_SET_ANTI_ALIAS_ALPHA_CONTROL 0x153c +#define NVCB97_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE 0:0 +#define NVCB97_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_DISABLE 0x00000000 +#define NVCB97_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_COVERAGE_ENABLE 0x00000001 +#define NVCB97_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE 4:4 +#define NVCB97_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_DISABLE 0x00000000 +#define NVCB97_SET_ANTI_ALIAS_ALPHA_CONTROL_ALPHA_TO_ONE_ENABLE 0x00000001 + +#define NVCB97_SET_RENDER_ENABLE_A 0x1550 +#define NVCB97_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVCB97_SET_RENDER_ENABLE_B 0x1554 +#define NVCB97_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_RENDER_ENABLE_C 0x1558 +#define NVCB97_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVCB97_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVCB97_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVCB97_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVCB97_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVCB97_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVCB97_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVCB97_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 7:0 + +#define NVCB97_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVCB97_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVCB97_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 19:0 + +#define NVCB97_SET_SLOPE_SCALE_DEPTH_BIAS 0x156c +#define NVCB97_SET_SLOPE_SCALE_DEPTH_BIAS_V 31:0 + +#define NVCB97_SET_ANTI_ALIASED_LINE 0x1570 +#define NVCB97_SET_ANTI_ALIASED_LINE_ENABLE 0:0 +#define NVCB97_SET_ANTI_ALIASED_LINE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ANTI_ALIASED_LINE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_TEX_HEADER_POOL_A 0x1574 +#define NVCB97_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 7:0 + +#define NVCB97_SET_TEX_HEADER_POOL_B 0x1578 +#define NVCB97_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_TEX_HEADER_POOL_C 0x157c +#define NVCB97_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 21:0 + +#define NVCB97_SET_ACTIVE_ZCULL_REGION 0x1590 +#define NVCB97_SET_ACTIVE_ZCULL_REGION_ID 5:0 + +#define NVCB97_SET_TWO_SIDED_STENCIL_TEST 0x1594 +#define NVCB97_SET_TWO_SIDED_STENCIL_TEST_ENABLE 0:0 +#define NVCB97_SET_TWO_SIDED_STENCIL_TEST_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_TWO_SIDED_STENCIL_TEST_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_BACK_STENCIL_OP_FAIL 0x1598 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V 31:0 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_OGL_KEEP 0x00001E00 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_OGL_ZERO 0x00000000 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_OGL_REPLACE 0x00001E01 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCRSAT 0x00001E02 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECRSAT 0x00001E03 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_OGL_INVERT 0x0000150A +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_OGL_INCR 0x00008507 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_OGL_DECR 0x00008508 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_D3D_KEEP 0x00000001 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_D3D_ZERO 0x00000002 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_D3D_REPLACE 0x00000003 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCRSAT 0x00000004 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECRSAT 0x00000005 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_D3D_INVERT 0x00000006 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_D3D_INCR 0x00000007 +#define NVCB97_SET_BACK_STENCIL_OP_FAIL_V_D3D_DECR 0x00000008 + +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL 0x159c +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V 31:0 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_KEEP 0x00001E00 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_ZERO 0x00000000 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_REPLACE 0x00001E01 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCRSAT 0x00001E02 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECRSAT 0x00001E03 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INVERT 0x0000150A +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_INCR 0x00008507 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_OGL_DECR 0x00008508 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_KEEP 0x00000001 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_ZERO 0x00000002 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_REPLACE 0x00000003 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCRSAT 0x00000004 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECRSAT 0x00000005 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INVERT 0x00000006 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_INCR 0x00000007 +#define NVCB97_SET_BACK_STENCIL_OP_ZFAIL_V_D3D_DECR 0x00000008 + +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS 0x15a0 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V 31:0 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_OGL_KEEP 0x00001E00 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_OGL_ZERO 0x00000000 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_OGL_REPLACE 0x00001E01 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCRSAT 0x00001E02 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECRSAT 0x00001E03 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INVERT 0x0000150A +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_OGL_INCR 0x00008507 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_OGL_DECR 0x00008508 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_D3D_KEEP 0x00000001 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_D3D_ZERO 0x00000002 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_D3D_REPLACE 0x00000003 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCRSAT 0x00000004 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECRSAT 0x00000005 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INVERT 0x00000006 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_D3D_INCR 0x00000007 +#define NVCB97_SET_BACK_STENCIL_OP_ZPASS_V_D3D_DECR 0x00000008 + +#define NVCB97_SET_BACK_STENCIL_FUNC 0x15a4 +#define NVCB97_SET_BACK_STENCIL_FUNC_V 31:0 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_OGL_NEVER 0x00000200 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_OGL_LESS 0x00000201 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_OGL_EQUAL 0x00000202 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_OGL_LEQUAL 0x00000203 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_OGL_GREATER 0x00000204 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_OGL_NOTEQUAL 0x00000205 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_OGL_GEQUAL 0x00000206 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_OGL_ALWAYS 0x00000207 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_D3D_NEVER 0x00000001 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_D3D_LESS 0x00000002 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_D3D_EQUAL 0x00000003 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_D3D_LESSEQUAL 0x00000004 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_D3D_GREATER 0x00000005 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_D3D_NOTEQUAL 0x00000006 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_D3D_GREATEREQUAL 0x00000007 +#define NVCB97_SET_BACK_STENCIL_FUNC_V_D3D_ALWAYS 0x00000008 + +#define NVCB97_SET_SRGB_WRITE 0x15b8 +#define NVCB97_SET_SRGB_WRITE_ENABLE 0:0 +#define NVCB97_SET_SRGB_WRITE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_SRGB_WRITE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_DEPTH_BIAS 0x15bc +#define NVCB97_SET_DEPTH_BIAS_V 31:0 + +#define NVCB97_SET_ZCULL_REGION_FORMAT 0x15c8 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE 3:0 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X4 0x00000000 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_ZS_4X4 0x00000001 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X2 0x00000002 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_Z_2X4 0x00000003 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X8_4X4 0x00000004 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_4X2 0x00000005 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_Z_8X8_2X4 0x00000006 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_Z_16X16_4X8 0x00000007 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_2X2 0x00000008 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_4X2 0x00000009 +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_ZS_16X8_2X4 0x0000000A +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_ZS_8X8_2X2 0x0000000B +#define NVCB97_SET_ZCULL_REGION_FORMAT_TYPE_Z_4X8_1X1 0x0000000C + +#define NVCB97_SET_RT_LAYER 0x15cc +#define NVCB97_SET_RT_LAYER_V 15:0 +#define NVCB97_SET_RT_LAYER_CONTROL 16:16 +#define NVCB97_SET_RT_LAYER_CONTROL_V_SELECTS_LAYER 0x00000000 +#define NVCB97_SET_RT_LAYER_CONTROL_GEOMETRY_SHADER_SELECTS_LAYER 0x00000001 + +#define NVCB97_SET_ANTI_ALIAS 0x15d0 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES 3:0 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_1X1 0x00000000 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_2X1 0x00000001 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_2X2 0x00000002 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_4X2 0x00000003 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_D3D 0x00000004 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_2X1_D3D 0x00000005 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_4X4 0x00000006 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_4 0x00000008 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_2X2_VC_12 0x00000009 +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_8 0x0000000A +#define NVCB97_SET_ANTI_ALIAS_SAMPLES_MODE_4X2_VC_24 0x0000000B + +#define NVCB97_SET_EDGE_FLAG 0x15e4 +#define NVCB97_SET_EDGE_FLAG_V 0:0 +#define NVCB97_SET_EDGE_FLAG_V_FALSE 0x00000000 +#define NVCB97_SET_EDGE_FLAG_V_TRUE 0x00000001 + +#define NVCB97_DRAW_INLINE_INDEX 0x15e8 +#define NVCB97_DRAW_INLINE_INDEX_V 31:0 + +#define NVCB97_SET_INLINE_INDEX2X16_ALIGN 0x15ec +#define NVCB97_SET_INLINE_INDEX2X16_ALIGN_COUNT 30:0 +#define NVCB97_SET_INLINE_INDEX2X16_ALIGN_START_ODD 31:31 +#define NVCB97_SET_INLINE_INDEX2X16_ALIGN_START_ODD_FALSE 0x00000000 +#define NVCB97_SET_INLINE_INDEX2X16_ALIGN_START_ODD_TRUE 0x00000001 + +#define NVCB97_DRAW_INLINE_INDEX2X16 0x15f0 +#define NVCB97_DRAW_INLINE_INDEX2X16_EVEN 15:0 +#define NVCB97_DRAW_INLINE_INDEX2X16_ODD 31:16 + +#define NVCB97_SET_VERTEX_GLOBAL_BASE_OFFSET_A 0x15f4 +#define NVCB97_SET_VERTEX_GLOBAL_BASE_OFFSET_A_UPPER 7:0 + +#define NVCB97_SET_VERTEX_GLOBAL_BASE_OFFSET_B 0x15f8 +#define NVCB97_SET_VERTEX_GLOBAL_BASE_OFFSET_B_LOWER 31:0 + +#define NVCB97_SET_ZCULL_REGION_PIXEL_OFFSET_A 0x15fc +#define NVCB97_SET_ZCULL_REGION_PIXEL_OFFSET_A_WIDTH 15:0 + +#define NVCB97_SET_ZCULL_REGION_PIXEL_OFFSET_B 0x1600 +#define NVCB97_SET_ZCULL_REGION_PIXEL_OFFSET_B_HEIGHT 15:0 + +#define NVCB97_SET_POINT_SPRITE_SELECT 0x1604 +#define NVCB97_SET_POINT_SPRITE_SELECT_RMODE 1:0 +#define NVCB97_SET_POINT_SPRITE_SELECT_RMODE_ZERO 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_RMODE_FROM_R 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_RMODE_FROM_S 0x00000002 +#define NVCB97_SET_POINT_SPRITE_SELECT_ORIGIN 2:2 +#define NVCB97_SET_POINT_SPRITE_SELECT_ORIGIN_BOTTOM 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_ORIGIN_TOP 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE0 3:3 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE0_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE0_GENERATE 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE1 4:4 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE1_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE1_GENERATE 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE2 5:5 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE2_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE2_GENERATE 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE3 6:6 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE3_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE3_GENERATE 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE4 7:7 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE4_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE4_GENERATE 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE5 8:8 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE5_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE5_GENERATE 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE6 9:9 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE6_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE6_GENERATE 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE7 10:10 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE7_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE7_GENERATE 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE8 11:11 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE8_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE8_GENERATE 0x00000001 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE9 12:12 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE9_PASSTHROUGH 0x00000000 +#define NVCB97_SET_POINT_SPRITE_SELECT_TEXTURE9_GENERATE 0x00000001 + +#define NVCB97_SET_ATTRIBUTE_DEFAULT 0x1610 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE 0:0 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_0001 0x00000000 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_DIFFUSE_VECTOR_1111 0x00000001 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR 1:1 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0000 0x00000000 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_COLOR_FRONT_SPECULAR_VECTOR_0001 0x00000001 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR 2:2 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0000 0x00000000 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_GENERIC_VECTOR_VECTOR_0001 0x00000001 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE 3:3 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0000 0x00000000 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_FIXED_FNC_TEXTURE_VECTOR_0001 0x00000001 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0 4:4 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_0001 0x00000000 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_DX9_COLOR0_VECTOR_1111 0x00000001 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15 5:5 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0000 0x00000000 +#define NVCB97_SET_ATTRIBUTE_DEFAULT_DX9_COLOR1_TO_COLOR15_VECTOR_0001 0x00000001 + +#define NVCB97_END 0x1614 +#define NVCB97_END_V 0:0 + +#define NVCB97_BEGIN 0x1618 +#define NVCB97_BEGIN_OP 15:0 +#define NVCB97_BEGIN_OP_POINTS 0x00000000 +#define NVCB97_BEGIN_OP_LINES 0x00000001 +#define NVCB97_BEGIN_OP_LINE_LOOP 0x00000002 +#define NVCB97_BEGIN_OP_LINE_STRIP 0x00000003 +#define NVCB97_BEGIN_OP_TRIANGLES 0x00000004 +#define NVCB97_BEGIN_OP_TRIANGLE_STRIP 0x00000005 +#define NVCB97_BEGIN_OP_TRIANGLE_FAN 0x00000006 +#define NVCB97_BEGIN_OP_QUADS 0x00000007 +#define NVCB97_BEGIN_OP_QUAD_STRIP 0x00000008 +#define NVCB97_BEGIN_OP_POLYGON 0x00000009 +#define NVCB97_BEGIN_OP_LINELIST_ADJCY 0x0000000A +#define NVCB97_BEGIN_OP_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_BEGIN_OP_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_BEGIN_OP_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_BEGIN_OP_PATCH 0x0000000E +#define NVCB97_BEGIN_PRIMITIVE_ID 24:24 +#define NVCB97_BEGIN_PRIMITIVE_ID_FIRST 0x00000000 +#define NVCB97_BEGIN_PRIMITIVE_ID_UNCHANGED 0x00000001 +#define NVCB97_BEGIN_INSTANCE_ID 27:26 +#define NVCB97_BEGIN_INSTANCE_ID_FIRST 0x00000000 +#define NVCB97_BEGIN_INSTANCE_ID_SUBSEQUENT 0x00000001 +#define NVCB97_BEGIN_INSTANCE_ID_UNCHANGED 0x00000002 +#define NVCB97_BEGIN_SPLIT_MODE 30:29 +#define NVCB97_BEGIN_SPLIT_MODE_NORMAL_BEGIN_NORMAL_END 0x00000000 +#define NVCB97_BEGIN_SPLIT_MODE_NORMAL_BEGIN_OPEN_END 0x00000001 +#define NVCB97_BEGIN_SPLIT_MODE_OPEN_BEGIN_OPEN_END 0x00000002 +#define NVCB97_BEGIN_SPLIT_MODE_OPEN_BEGIN_NORMAL_END 0x00000003 +#define NVCB97_BEGIN_INSTANCE_ITERATE_ENABLE 31:31 +#define NVCB97_BEGIN_INSTANCE_ITERATE_ENABLE_FALSE 0x00000000 +#define NVCB97_BEGIN_INSTANCE_ITERATE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_VERTEX_ID_COPY 0x161c +#define NVCB97_SET_VERTEX_ID_COPY_ENABLE 0:0 +#define NVCB97_SET_VERTEX_ID_COPY_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_VERTEX_ID_COPY_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_VERTEX_ID_COPY_ATTRIBUTE_SLOT 11:4 + +#define NVCB97_ADD_TO_PRIMITIVE_ID 0x1620 +#define NVCB97_ADD_TO_PRIMITIVE_ID_V 31:0 + +#define NVCB97_LOAD_PRIMITIVE_ID 0x1624 +#define NVCB97_LOAD_PRIMITIVE_ID_V 31:0 + +#define NVCB97_SET_SHADER_BASED_CULL 0x162c +#define NVCB97_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE 1:1 +#define NVCB97_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_SHADER_BASED_CULL_BATCH_CULL_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE 0:0 +#define NVCB97_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_SHADER_BASED_CULL_BEFORE_FETCH_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_CLASS_VERSION 0x1638 +#define NVCB97_SET_CLASS_VERSION_CURRENT 15:0 +#define NVCB97_SET_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCB97_SET_DA_PRIMITIVE_RESTART 0x1644 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_ENABLE 0:0 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_DA_PRIMITIVE_RESTART_INDEX 0x1648 +#define NVCB97_SET_DA_PRIMITIVE_RESTART_INDEX_V 31:0 + +#define NVCB97_SET_DA_OUTPUT 0x164c +#define NVCB97_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START 12:12 +#define NVCB97_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_FALSE 0x00000000 +#define NVCB97_SET_DA_OUTPUT_VERTEX_ID_USES_ARRAY_START_TRUE 0x00000001 + +#define NVCB97_SET_ANTI_ALIASED_POINT 0x1658 +#define NVCB97_SET_ANTI_ALIASED_POINT_ENABLE 0:0 +#define NVCB97_SET_ANTI_ALIASED_POINT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ANTI_ALIASED_POINT_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_POINT_CENTER_MODE 0x165c +#define NVCB97_SET_POINT_CENTER_MODE_V 31:0 +#define NVCB97_SET_POINT_CENTER_MODE_V_OGL 0x00000000 +#define NVCB97_SET_POINT_CENTER_MODE_V_D3D 0x00000001 + +#define NVCB97_SET_LINE_SMOOTH_PARAMETERS 0x1668 +#define NVCB97_SET_LINE_SMOOTH_PARAMETERS_FALLOFF 31:0 +#define NVCB97_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_00 0x00000000 +#define NVCB97_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_33 0x00000001 +#define NVCB97_SET_LINE_SMOOTH_PARAMETERS_FALLOFF__1_60 0x00000002 + +#define NVCB97_SET_LINE_STIPPLE 0x166c +#define NVCB97_SET_LINE_STIPPLE_ENABLE 0:0 +#define NVCB97_SET_LINE_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_LINE_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_LINE_SMOOTH_EDGE_TABLE(i) (0x1670+(i)*4) +#define NVCB97_SET_LINE_SMOOTH_EDGE_TABLE_V0 7:0 +#define NVCB97_SET_LINE_SMOOTH_EDGE_TABLE_V1 15:8 +#define NVCB97_SET_LINE_SMOOTH_EDGE_TABLE_V2 23:16 +#define NVCB97_SET_LINE_SMOOTH_EDGE_TABLE_V3 31:24 + +#define NVCB97_SET_LINE_STIPPLE_PARAMETERS 0x1680 +#define NVCB97_SET_LINE_STIPPLE_PARAMETERS_FACTOR 7:0 +#define NVCB97_SET_LINE_STIPPLE_PARAMETERS_PATTERN 23:8 + +#define NVCB97_SET_PROVOKING_VERTEX 0x1684 +#define NVCB97_SET_PROVOKING_VERTEX_V 0:0 +#define NVCB97_SET_PROVOKING_VERTEX_V_FIRST 0x00000000 +#define NVCB97_SET_PROVOKING_VERTEX_V_LAST 0x00000001 + +#define NVCB97_SET_TWO_SIDED_LIGHT 0x1688 +#define NVCB97_SET_TWO_SIDED_LIGHT_ENABLE 0:0 +#define NVCB97_SET_TWO_SIDED_LIGHT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_TWO_SIDED_LIGHT_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_POLYGON_STIPPLE 0x168c +#define NVCB97_SET_POLYGON_STIPPLE_ENABLE 0:0 +#define NVCB97_SET_POLYGON_STIPPLE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_POLYGON_STIPPLE_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_SHADER_CONTROL 0x1690 +#define NVCB97_SET_SHADER_CONTROL_DEFAULT_PARTIAL 0:0 +#define NVCB97_SET_SHADER_CONTROL_DEFAULT_PARTIAL_ZERO 0x00000000 +#define NVCB97_SET_SHADER_CONTROL_DEFAULT_PARTIAL_INFINITY 0x00000001 +#define NVCB97_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR 1:1 +#define NVCB97_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_LEGACY 0x00000000 +#define NVCB97_SET_SHADER_CONTROL_FP32_NAN_BEHAVIOR_FP64_COMPATIBLE 0x00000001 +#define NVCB97_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR 2:2 +#define NVCB97_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_ZERO 0x00000000 +#define NVCB97_SET_SHADER_CONTROL_FP32_F2I_NAN_BEHAVIOR_PASS_INDEFINITE 0x00000001 + +#define NVCB97_CHECK_CLASS_VERSION 0x16a0 +#define NVCB97_CHECK_CLASS_VERSION_CURRENT 15:0 +#define NVCB97_CHECK_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCB97_SET_SPH_VERSION 0x16a4 +#define NVCB97_SET_SPH_VERSION_CURRENT 15:0 +#define NVCB97_SET_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCB97_CHECK_SPH_VERSION 0x16a8 +#define NVCB97_CHECK_SPH_VERSION_CURRENT 15:0 +#define NVCB97_CHECK_SPH_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCB97_SET_ALPHA_TO_COVERAGE_OVERRIDE 0x16b4 +#define NVCB97_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE 0:0 +#define NVCB97_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_DISABLE 0x00000000 +#define NVCB97_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_ANTI_ALIAS_ENABLE_ENABLE 0x00000001 +#define NVCB97_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT 1:1 +#define NVCB97_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_DISABLE 0x00000000 +#define NVCB97_SET_ALPHA_TO_COVERAGE_OVERRIDE_QUALIFY_BY_PS_SAMPLE_MASK_OUTPUT_ENABLE 0x00000001 + +#define NVCB97_SET_SCG_GRAPHICS_PRIORITY 0x16bc +#define NVCB97_SET_SCG_GRAPHICS_PRIORITY_PRIORITY 5:0 + +#define NVCB97_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS(i) (0x16c0+(i)*4) +#define NVCB97_SET_SCG_GRAPHICS_SCHEDULING_PARAMETERS_V 31:0 + +#define NVCB97_SET_POLYGON_STIPPLE_PATTERN(i) (0x1700+(i)*4) +#define NVCB97_SET_POLYGON_STIPPLE_PATTERN_V 31:0 + +#define NVCB97_SET_AAM_VERSION 0x1790 +#define NVCB97_SET_AAM_VERSION_CURRENT 15:0 +#define NVCB97_SET_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCB97_CHECK_AAM_VERSION 0x1794 +#define NVCB97_CHECK_AAM_VERSION_CURRENT 15:0 +#define NVCB97_CHECK_AAM_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCB97_SET_ZT_LAYER 0x179c +#define NVCB97_SET_ZT_LAYER_OFFSET 15:0 + +#define NVCB97_SET_INDEX_BUFFER_A 0x17c8 +#define NVCB97_SET_INDEX_BUFFER_A_ADDRESS_UPPER 7:0 + +#define NVCB97_SET_INDEX_BUFFER_B 0x17cc +#define NVCB97_SET_INDEX_BUFFER_B_ADDRESS_LOWER 31:0 + +#define NVCB97_SET_INDEX_BUFFER_E 0x17d8 +#define NVCB97_SET_INDEX_BUFFER_E_INDEX_SIZE 1:0 +#define NVCB97_SET_INDEX_BUFFER_E_INDEX_SIZE_ONE_BYTE 0x00000000 +#define NVCB97_SET_INDEX_BUFFER_E_INDEX_SIZE_TWO_BYTES 0x00000001 +#define NVCB97_SET_INDEX_BUFFER_E_INDEX_SIZE_FOUR_BYTES 0x00000002 + +#define NVCB97_SET_INDEX_BUFFER_F 0x17dc +#define NVCB97_SET_INDEX_BUFFER_F_FIRST 31:0 + +#define NVCB97_DRAW_INDEX_BUFFER 0x17e0 +#define NVCB97_DRAW_INDEX_BUFFER_COUNT 31:0 + +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST 0x17e4 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST 0x17e8 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST 0x17ec +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_FIRST 15:0 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_COUNT 27:16 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY 31:28 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POINTS 0x00000000 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINES 0x00000001 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLES 0x00000004 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUADS 0x00000007 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_POLYGON 0x00000009 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_FIRST_TOPOLOGY_PATCH 0x0000000E + +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f0 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_DRAW_INDEX_BUFFER32_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f4 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_DRAW_INDEX_BUFFER16_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT 0x17f8 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_FIRST 15:0 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_COUNT 27:16 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY 31:28 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POINTS 0x00000000 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINES 0x00000001 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_LOOP 0x00000002 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINE_STRIP 0x00000003 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLES 0x00000004 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_STRIP 0x00000005 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLE_FAN 0x00000006 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUADS 0x00000007 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_QUAD_STRIP 0x00000008 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_POLYGON 0x00000009 +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINELIST_ADJCY 0x0000000A +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_DRAW_INDEX_BUFFER8_BEGIN_END_INSTANCE_SUBSEQUENT_TOPOLOGY_PATCH 0x0000000E + +#define NVCB97_SET_DEPTH_BIAS_CLAMP 0x187c +#define NVCB97_SET_DEPTH_BIAS_CLAMP_V 31:0 + +#define NVCB97_SET_VERTEX_STREAM_INSTANCE_A(i) (0x1880+(i)*4) +#define NVCB97_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED 0:0 +#define NVCB97_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_FALSE 0x00000000 +#define NVCB97_SET_VERTEX_STREAM_INSTANCE_A_IS_INSTANCED_TRUE 0x00000001 + +#define NVCB97_SET_VERTEX_STREAM_INSTANCE_B(i) (0x18c0+(i)*4) +#define NVCB97_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED 0:0 +#define NVCB97_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_FALSE 0x00000000 +#define NVCB97_SET_VERTEX_STREAM_INSTANCE_B_IS_INSTANCED_TRUE 0x00000001 + +#define NVCB97_SET_ATTRIBUTE_POINT_SIZE 0x1910 +#define NVCB97_SET_ATTRIBUTE_POINT_SIZE_ENABLE 0:0 +#define NVCB97_SET_ATTRIBUTE_POINT_SIZE_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ATTRIBUTE_POINT_SIZE_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ATTRIBUTE_POINT_SIZE_SLOT 11:4 + +#define NVCB97_OGL_SET_CULL 0x1918 +#define NVCB97_OGL_SET_CULL_ENABLE 0:0 +#define NVCB97_OGL_SET_CULL_ENABLE_FALSE 0x00000000 +#define NVCB97_OGL_SET_CULL_ENABLE_TRUE 0x00000001 + +#define NVCB97_OGL_SET_FRONT_FACE 0x191c +#define NVCB97_OGL_SET_FRONT_FACE_V 31:0 +#define NVCB97_OGL_SET_FRONT_FACE_V_CW 0x00000900 +#define NVCB97_OGL_SET_FRONT_FACE_V_CCW 0x00000901 + +#define NVCB97_OGL_SET_CULL_FACE 0x1920 +#define NVCB97_OGL_SET_CULL_FACE_V 31:0 +#define NVCB97_OGL_SET_CULL_FACE_V_FRONT 0x00000404 +#define NVCB97_OGL_SET_CULL_FACE_V_BACK 0x00000405 +#define NVCB97_OGL_SET_CULL_FACE_V_FRONT_AND_BACK 0x00000408 + +#define NVCB97_SET_VIEWPORT_PIXEL 0x1924 +#define NVCB97_SET_VIEWPORT_PIXEL_CENTER 0:0 +#define NVCB97_SET_VIEWPORT_PIXEL_CENTER_AT_HALF_INTEGERS 0x00000000 +#define NVCB97_SET_VIEWPORT_PIXEL_CENTER_AT_INTEGERS 0x00000001 + +#define NVCB97_SET_VIEWPORT_SCALE_OFFSET 0x192c +#define NVCB97_SET_VIEWPORT_SCALE_OFFSET_ENABLE 0:0 +#define NVCB97_SET_VIEWPORT_SCALE_OFFSET_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_VIEWPORT_SCALE_OFFSET_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL 0x193c +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE 0:0 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_FALSE 0x00000000 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_MIN_Z_ZERO_MAX_Z_ONE_TRUE 0x00000001 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE 17:16 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_USE_FIELD_MIN_Z_ZERO_MAX_Z_ONE 0x00000000 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MIN_Z_MAX_Z 0x00000001 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_ZERO_ONE 0x00000002 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_Z_CLIP_RANGE_MINUS_INF_PLUS_INF 0x00000003 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z 3:3 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLIP 0x00000000 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MIN_Z_CLAMP 0x00000001 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z 4:4 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLIP 0x00000000 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_PIXEL_MAX_Z_CLAMP 0x00000001 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND 7:7 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_256 0x00000000 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_SCALE_1 0x00000001 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND 10:10 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_256 0x00000000 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_LINE_POINT_CULL_GUARDBAND_SCALE_1 0x00000001 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP 13:11 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP 0x00000000 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_PASSTHRU 0x00000001 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XY_CLIP 0x00000002 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_XYZ_CLIP 0x00000003 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_CLIP_NO_Z_CULL 0x00000004 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_FRUSTUM_Z_CLIP 0x00000005 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_CLIP_WZERO_TRI_FILL_OR_CLIP 0x00000006 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z 2:1 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND 0x00000000 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_256 0x00000001 +#define NVCB97_SET_VIEWPORT_CLIP_CONTROL_GEOMETRY_GUARDBAND_Z_SCALE_1 0x00000002 + +#define NVCB97_SET_USER_CLIP_OP 0x1940 +#define NVCB97_SET_USER_CLIP_OP_PLANE0 0:0 +#define NVCB97_SET_USER_CLIP_OP_PLANE0_CLIP 0x00000000 +#define NVCB97_SET_USER_CLIP_OP_PLANE0_CULL 0x00000001 +#define NVCB97_SET_USER_CLIP_OP_PLANE1 4:4 +#define NVCB97_SET_USER_CLIP_OP_PLANE1_CLIP 0x00000000 +#define NVCB97_SET_USER_CLIP_OP_PLANE1_CULL 0x00000001 +#define NVCB97_SET_USER_CLIP_OP_PLANE2 8:8 +#define NVCB97_SET_USER_CLIP_OP_PLANE2_CLIP 0x00000000 +#define NVCB97_SET_USER_CLIP_OP_PLANE2_CULL 0x00000001 +#define NVCB97_SET_USER_CLIP_OP_PLANE3 12:12 +#define NVCB97_SET_USER_CLIP_OP_PLANE3_CLIP 0x00000000 +#define NVCB97_SET_USER_CLIP_OP_PLANE3_CULL 0x00000001 +#define NVCB97_SET_USER_CLIP_OP_PLANE4 16:16 +#define NVCB97_SET_USER_CLIP_OP_PLANE4_CLIP 0x00000000 +#define NVCB97_SET_USER_CLIP_OP_PLANE4_CULL 0x00000001 +#define NVCB97_SET_USER_CLIP_OP_PLANE5 20:20 +#define NVCB97_SET_USER_CLIP_OP_PLANE5_CLIP 0x00000000 +#define NVCB97_SET_USER_CLIP_OP_PLANE5_CULL 0x00000001 +#define NVCB97_SET_USER_CLIP_OP_PLANE6 24:24 +#define NVCB97_SET_USER_CLIP_OP_PLANE6_CLIP 0x00000000 +#define NVCB97_SET_USER_CLIP_OP_PLANE6_CULL 0x00000001 +#define NVCB97_SET_USER_CLIP_OP_PLANE7 28:28 +#define NVCB97_SET_USER_CLIP_OP_PLANE7_CLIP 0x00000000 +#define NVCB97_SET_USER_CLIP_OP_PLANE7_CULL 0x00000001 + +#define NVCB97_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVCB97_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVCB97_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVCB97_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVCB97_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_CONTROL 0x1948 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE 0:0 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_TOPOLOGY_IN_BEGIN_METHODS 0x00000000 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_CONTROL_OVERRIDE_USE_SEPARATE_TOPOLOGY_STATE 0x00000001 + +#define NVCB97_SET_WINDOW_CLIP_ENABLE 0x194c +#define NVCB97_SET_WINDOW_CLIP_ENABLE_V 0:0 +#define NVCB97_SET_WINDOW_CLIP_ENABLE_V_FALSE 0x00000000 +#define NVCB97_SET_WINDOW_CLIP_ENABLE_V_TRUE 0x00000001 + +#define NVCB97_SET_WINDOW_CLIP_TYPE 0x1950 +#define NVCB97_SET_WINDOW_CLIP_TYPE_V 1:0 +#define NVCB97_SET_WINDOW_CLIP_TYPE_V_INCLUSIVE 0x00000000 +#define NVCB97_SET_WINDOW_CLIP_TYPE_V_EXCLUSIVE 0x00000001 +#define NVCB97_SET_WINDOW_CLIP_TYPE_V_CLIPALL 0x00000002 + +#define NVCB97_INVALIDATE_ZCULL 0x1958 +#define NVCB97_INVALIDATE_ZCULL_V 31:0 +#define NVCB97_INVALIDATE_ZCULL_V_INVALIDATE 0x00000000 + +#define NVCB97_SET_ZCULL 0x1968 +#define NVCB97_SET_ZCULL_Z_ENABLE 0:0 +#define NVCB97_SET_ZCULL_Z_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_Z_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_STENCIL_ENABLE 4:4 +#define NVCB97_SET_ZCULL_STENCIL_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_STENCIL_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_ZCULL_BOUNDS 0x196c +#define NVCB97_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE 0:0 +#define NVCB97_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_BOUNDS_Z_MIN_UNBOUNDED_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE 4:4 +#define NVCB97_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_ZCULL_BOUNDS_Z_MAX_UNBOUNDED_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_PRIMITIVE_TOPOLOGY 0x1970 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V 15:0 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_POINTLIST 0x00000001 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LINELIST 0x00000002 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP 0x00000003 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST 0x00000004 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP 0x00000005 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LINELIST_ADJCY 0x0000000A +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LINESTRIP_ADJCY 0x0000000B +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLELIST_ADJCY 0x0000000C +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_TRIANGLESTRIP_ADJCY 0x0000000D +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_PATCHLIST 0x0000000E +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_POINTS 0x00001001 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST 0x00001002 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST 0x00001003 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST 0x0000100F +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINESTRIP 0x00001010 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINESTRIP 0x00001011 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLELIST 0x00001012 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLESTRIP 0x00001013 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLESTRIP 0x00001014 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN 0x00001015 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLEFAN 0x00001016 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_TRIANGLEFAN_IMM 0x00001017 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_LINELIST_IMM 0x00001018 +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDTRIANGLELIST2 0x0000101A +#define NVCB97_SET_PRIMITIVE_TOPOLOGY_V_LEGACY_INDEXEDLINELIST2 0x0000101B + +#define NVCB97_ZCULL_SYNC 0x1978 +#define NVCB97_ZCULL_SYNC_V 31:0 + +#define NVCB97_SET_CLIP_ID_TEST 0x197c +#define NVCB97_SET_CLIP_ID_TEST_ENABLE 0:0 +#define NVCB97_SET_CLIP_ID_TEST_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_CLIP_ID_TEST_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_SURFACE_CLIP_ID_WIDTH 0x1980 +#define NVCB97_SET_SURFACE_CLIP_ID_WIDTH_V 31:0 + +#define NVCB97_SET_CLIP_ID 0x1984 +#define NVCB97_SET_CLIP_ID_V 31:0 + +#define NVCB97_SET_DEPTH_BOUNDS_TEST 0x19bc +#define NVCB97_SET_DEPTH_BOUNDS_TEST_ENABLE 0:0 +#define NVCB97_SET_DEPTH_BOUNDS_TEST_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_DEPTH_BOUNDS_TEST_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_BLEND_FLOAT_OPTION 0x19c0 +#define NVCB97_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO 0:0 +#define NVCB97_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_FALSE 0x00000000 +#define NVCB97_SET_BLEND_FLOAT_OPTION_ZERO_TIMES_ANYTHING_IS_ZERO_TRUE 0x00000001 + +#define NVCB97_SET_LOGIC_OP 0x19c4 +#define NVCB97_SET_LOGIC_OP_ENABLE 0:0 +#define NVCB97_SET_LOGIC_OP_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_LOGIC_OP_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_LOGIC_OP_FUNC 0x19c8 +#define NVCB97_SET_LOGIC_OP_FUNC_V 31:0 +#define NVCB97_SET_LOGIC_OP_FUNC_V_CLEAR 0x00001500 +#define NVCB97_SET_LOGIC_OP_FUNC_V_AND 0x00001501 +#define NVCB97_SET_LOGIC_OP_FUNC_V_AND_REVERSE 0x00001502 +#define NVCB97_SET_LOGIC_OP_FUNC_V_COPY 0x00001503 +#define NVCB97_SET_LOGIC_OP_FUNC_V_AND_INVERTED 0x00001504 +#define NVCB97_SET_LOGIC_OP_FUNC_V_NOOP 0x00001505 +#define NVCB97_SET_LOGIC_OP_FUNC_V_XOR 0x00001506 +#define NVCB97_SET_LOGIC_OP_FUNC_V_OR 0x00001507 +#define NVCB97_SET_LOGIC_OP_FUNC_V_NOR 0x00001508 +#define NVCB97_SET_LOGIC_OP_FUNC_V_EQUIV 0x00001509 +#define NVCB97_SET_LOGIC_OP_FUNC_V_INVERT 0x0000150A +#define NVCB97_SET_LOGIC_OP_FUNC_V_OR_REVERSE 0x0000150B +#define NVCB97_SET_LOGIC_OP_FUNC_V_COPY_INVERTED 0x0000150C +#define NVCB97_SET_LOGIC_OP_FUNC_V_OR_INVERTED 0x0000150D +#define NVCB97_SET_LOGIC_OP_FUNC_V_NAND 0x0000150E +#define NVCB97_SET_LOGIC_OP_FUNC_V_SET 0x0000150F + +#define NVCB97_SET_Z_COMPRESSION 0x19cc +#define NVCB97_SET_Z_COMPRESSION_ENABLE 0:0 +#define NVCB97_SET_Z_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_Z_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVCB97_CLEAR_SURFACE 0x19d0 +#define NVCB97_CLEAR_SURFACE_Z_ENABLE 0:0 +#define NVCB97_CLEAR_SURFACE_Z_ENABLE_FALSE 0x00000000 +#define NVCB97_CLEAR_SURFACE_Z_ENABLE_TRUE 0x00000001 +#define NVCB97_CLEAR_SURFACE_STENCIL_ENABLE 1:1 +#define NVCB97_CLEAR_SURFACE_STENCIL_ENABLE_FALSE 0x00000000 +#define NVCB97_CLEAR_SURFACE_STENCIL_ENABLE_TRUE 0x00000001 +#define NVCB97_CLEAR_SURFACE_R_ENABLE 2:2 +#define NVCB97_CLEAR_SURFACE_R_ENABLE_FALSE 0x00000000 +#define NVCB97_CLEAR_SURFACE_R_ENABLE_TRUE 0x00000001 +#define NVCB97_CLEAR_SURFACE_G_ENABLE 3:3 +#define NVCB97_CLEAR_SURFACE_G_ENABLE_FALSE 0x00000000 +#define NVCB97_CLEAR_SURFACE_G_ENABLE_TRUE 0x00000001 +#define NVCB97_CLEAR_SURFACE_B_ENABLE 4:4 +#define NVCB97_CLEAR_SURFACE_B_ENABLE_FALSE 0x00000000 +#define NVCB97_CLEAR_SURFACE_B_ENABLE_TRUE 0x00000001 +#define NVCB97_CLEAR_SURFACE_A_ENABLE 5:5 +#define NVCB97_CLEAR_SURFACE_A_ENABLE_FALSE 0x00000000 +#define NVCB97_CLEAR_SURFACE_A_ENABLE_TRUE 0x00000001 +#define NVCB97_CLEAR_SURFACE_MRT_SELECT 9:6 +#define NVCB97_CLEAR_SURFACE_RT_ARRAY_INDEX 25:10 + +#define NVCB97_CLEAR_CLIP_ID_SURFACE 0x19d4 +#define NVCB97_CLEAR_CLIP_ID_SURFACE_V 31:0 + +#define NVCB97_SET_COLOR_COMPRESSION(i) (0x19e0+(i)*4) +#define NVCB97_SET_COLOR_COMPRESSION_ENABLE 0:0 +#define NVCB97_SET_COLOR_COMPRESSION_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_COLOR_COMPRESSION_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_CT_WRITE(i) (0x1a00+(i)*4) +#define NVCB97_SET_CT_WRITE_R_ENABLE 0:0 +#define NVCB97_SET_CT_WRITE_R_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_CT_WRITE_R_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_CT_WRITE_G_ENABLE 4:4 +#define NVCB97_SET_CT_WRITE_G_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_CT_WRITE_G_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_CT_WRITE_B_ENABLE 8:8 +#define NVCB97_SET_CT_WRITE_B_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_CT_WRITE_B_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_CT_WRITE_A_ENABLE 12:12 +#define NVCB97_SET_CT_WRITE_A_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_CT_WRITE_A_ENABLE_TRUE 0x00000001 + +#define NVCB97_PIPE_NOP 0x1a2c +#define NVCB97_PIPE_NOP_V 31:0 + +#define NVCB97_SET_SPARE00 0x1a30 +#define NVCB97_SET_SPARE00_V 31:0 + +#define NVCB97_SET_SPARE01 0x1a34 +#define NVCB97_SET_SPARE01_V 31:0 + +#define NVCB97_SET_SPARE02 0x1a38 +#define NVCB97_SET_SPARE02_V 31:0 + +#define NVCB97_SET_SPARE03 0x1a3c +#define NVCB97_SET_SPARE03_V 31:0 + +#define NVCB97_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVCB97_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 24:0 + +#define NVCB97_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVCB97_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVCB97_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVCB97_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVCB97_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVCB97_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_OPERATION_ACQUIRE 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_OPERATION_REPORT_ONLY 0x00000002 +#define NVCB97_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVCB97_SET_REPORT_SEMAPHORE_D_RELEASE 4:4 +#define NVCB97_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_READS_COMPLETE 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_RELEASE_AFTER_ALL_PRECEEDING_WRITES_COMPLETE 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_ACQUIRE 8:8 +#define NVCB97_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_WRITES_START 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_ACQUIRE_BEFORE_ANY_FOLLOWING_READS_START 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION 15:12 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_NONE 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DATA_ASSEMBLER 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VERTEX_SHADER 0x00000002 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_INIT_SHADER 0x00000008 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_TESSELATION_SHADER 0x00000009 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_GEOMETRY_SHADER 0x00000006 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_STREAMING_OUTPUT 0x00000005 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_VPC 0x00000004 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ZCULL 0x00000007 +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_PIXEL_SHADER 0x0000000A +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_DEPTH_TEST 0x0000000C +#define NVCB97_SET_REPORT_SEMAPHORE_D_PIPELINE_LOCATION_ALL 0x0000000F +#define NVCB97_SET_REPORT_SEMAPHORE_D_COMPARISON 16:16 +#define NVCB97_SET_REPORT_SEMAPHORE_D_COMPARISON_EQ 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_COMPARISON_GE 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVCB97_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT 27:23 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_NONE 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_DA_VERTICES_GENERATED 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_DA_PRIMITIVES_GENERATED 0x00000003 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_VS_INVOCATIONS 0x00000005 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_TI_INVOCATIONS 0x0000001B +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_TS_INVOCATIONS 0x0000001D +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_TS_PRIMITIVES_GENERATED 0x0000001F +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_GS_INVOCATIONS 0x00000007 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_GS_PRIMITIVES_GENERATED 0x00000009 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_ALPHA_BETA_CLOCKS 0x00000004 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_SCG_CLOCKS 0x00000008 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_VTG_PRIMITIVES_OUT 0x00000012 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_TOTAL_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x0000001E +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_SUCCEEDED 0x0000000B +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED 0x0000000D +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_PRIMITIVES_NEEDED_MINUS_SUCCEEDED 0x00000006 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_STREAMING_BYTE_COUNT 0x0000001A +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_INVOCATIONS 0x0000000F +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_CLIPPER_PRIMITIVES_GENERATED 0x00000011 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS0 0x0000000A +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS1 0x0000000C +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS2 0x0000000E +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_ZCULL_STATS3 0x00000010 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_PS_INVOCATIONS 0x00000013 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT 0x00000002 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_ZPASS_PIXEL_CNT64 0x00000015 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_TILED_ZPASS_PIXEL_CNT64 0x00000017 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_COLOR_TARGET 0x00000018 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_IEEE_CLEAN_ZETA_TARGET 0x00000019 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_BOUNDING_RECTANGLE 0x0000001C +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_TIMESTAMP 0x00000014 +#define NVCB97_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVCB97_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_SUB_REPORT 7:5 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REPORT_DWORD_NUMBER 21:21 +#define NVCB97_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVCB97_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVCB97_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVCB97_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVCB97_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVCB97_SET_VERTEX_STREAM_A_FORMAT(j) (0x1c00+(j)*16) +#define NVCB97_SET_VERTEX_STREAM_A_FORMAT_STRIDE 11:0 +#define NVCB97_SET_VERTEX_STREAM_A_FORMAT_ENABLE 12:12 +#define NVCB97_SET_VERTEX_STREAM_A_FORMAT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_VERTEX_STREAM_A_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_VERTEX_STREAM_A_LOCATION_A(j) (0x1c04+(j)*16) +#define NVCB97_SET_VERTEX_STREAM_A_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVCB97_SET_VERTEX_STREAM_A_LOCATION_B(j) (0x1c08+(j)*16) +#define NVCB97_SET_VERTEX_STREAM_A_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_VERTEX_STREAM_A_FREQUENCY(j) (0x1c0c+(j)*16) +#define NVCB97_SET_VERTEX_STREAM_A_FREQUENCY_V 31:0 + +#define NVCB97_SET_VERTEX_STREAM_B_FORMAT(j) (0x1d00+(j)*16) +#define NVCB97_SET_VERTEX_STREAM_B_FORMAT_STRIDE 11:0 +#define NVCB97_SET_VERTEX_STREAM_B_FORMAT_ENABLE 12:12 +#define NVCB97_SET_VERTEX_STREAM_B_FORMAT_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_VERTEX_STREAM_B_FORMAT_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_VERTEX_STREAM_B_LOCATION_A(j) (0x1d04+(j)*16) +#define NVCB97_SET_VERTEX_STREAM_B_LOCATION_A_OFFSET_UPPER 7:0 + +#define NVCB97_SET_VERTEX_STREAM_B_LOCATION_B(j) (0x1d08+(j)*16) +#define NVCB97_SET_VERTEX_STREAM_B_LOCATION_B_OFFSET_LOWER 31:0 + +#define NVCB97_SET_VERTEX_STREAM_B_FREQUENCY(j) (0x1d0c+(j)*16) +#define NVCB97_SET_VERTEX_STREAM_B_FREQUENCY_V 31:0 + +#define NVCB97_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA(j) (0x1e00+(j)*32) +#define NVCB97_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE 0:0 +#define NVCB97_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_BLEND_PER_TARGET_SEPARATE_FOR_ALPHA_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP(j) (0x1e04+(j)*32) +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V 31:0 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MIN 0x00008007 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_OGL_MAX 0x00008008 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_ADD 0x00000001 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_SUBTRACT 0x00000002 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MIN 0x00000004 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_OP_V_D3D_MAX 0x00000005 + +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF(j) (0x1e08+(j)*32) +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V 31:0 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF(j) (0x1e0c+(j)*32) +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V 31:0 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVCB97_SET_BLEND_PER_TARGET_COLOR_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP(j) (0x1e10+(j)*32) +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V 31:0 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_SUBTRACT 0x0000800A +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_REVERSE_SUBTRACT 0x0000800B +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_FUNC_ADD 0x00008006 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MIN 0x00008007 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_OGL_MAX 0x00008008 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_ADD 0x00000001 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_SUBTRACT 0x00000002 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_REVSUBTRACT 0x00000003 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MIN 0x00000004 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_OP_V_D3D_MAX 0x00000005 + +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF(j) (0x1e14+(j)*32) +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V 31:0 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ZERO 0x00004000 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE 0x00004001 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ZERO 0x00000001 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_ONE 0x00000002 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHSRCALPHA 0x0000000C +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BOTHINVSRCALPHA 0x0000000D +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_SOURCE_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF(j) (0x1e18+(j)*32) +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V 31:0 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ZERO 0x00004000 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE 0x00004001 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_COLOR 0x00004300 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_COLOR 0x00004301 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA 0x00004302 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_SRC_ALPHA 0x00004303 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_ALPHA 0x00004304 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_ALPHA 0x00004305 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_DST_COLOR 0x00004306 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_DST_COLOR 0x00004307 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC_ALPHA_SATURATE 0x00004308 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_COLOR 0x0000C001 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_COLOR 0x0000C002 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_CONSTANT_ALPHA 0x0000C003 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_ONE_MINUS_CONSTANT_ALPHA 0x0000C004 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1COLOR 0x0000C900 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1COLOR 0x0000C901 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_SRC1ALPHA 0x0000C902 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_OGL_INVSRC1ALPHA 0x0000C903 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ZERO 0x00000001 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_ONE 0x00000002 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCCOLOR 0x00000003 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCCOLOR 0x00000004 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHA 0x00000005 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRCALPHA 0x00000006 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTALPHA 0x00000007 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTALPHA 0x00000008 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_DESTCOLOR 0x00000009 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVDESTCOLOR 0x0000000A +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRCALPHASAT 0x0000000B +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_BLENDFACTOR 0x0000000E +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVBLENDFACTOR 0x0000000F +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1COLOR 0x00000010 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1COLOR 0x00000011 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_SRC1ALPHA 0x00000012 +#define NVCB97_SET_BLEND_PER_TARGET_ALPHA_DEST_COEFF_V_D3D_INVSRC1ALPHA 0x00000013 + +#define NVCB97_SET_PIPELINE_SHADER(j) (0x2000+(j)*64) +#define NVCB97_SET_PIPELINE_SHADER_ENABLE 0:0 +#define NVCB97_SET_PIPELINE_SHADER_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_PIPELINE_SHADER_ENABLE_TRUE 0x00000001 +#define NVCB97_SET_PIPELINE_SHADER_TYPE 7:4 +#define NVCB97_SET_PIPELINE_SHADER_TYPE_VERTEX_CULL_BEFORE_FETCH 0x00000000 +#define NVCB97_SET_PIPELINE_SHADER_TYPE_VERTEX 0x00000001 +#define NVCB97_SET_PIPELINE_SHADER_TYPE_TESSELLATION_INIT 0x00000002 +#define NVCB97_SET_PIPELINE_SHADER_TYPE_TESSELLATION 0x00000003 +#define NVCB97_SET_PIPELINE_SHADER_TYPE_GEOMETRY 0x00000004 +#define NVCB97_SET_PIPELINE_SHADER_TYPE_PIXEL 0x00000005 + +#define NVCB97_SET_PIPELINE_RESERVED_B(j) (0x2004+(j)*64) +#define NVCB97_SET_PIPELINE_RESERVED_B_V 0:0 + +#define NVCB97_SET_PIPELINE_RESERVED_A(j) (0x2008+(j)*64) +#define NVCB97_SET_PIPELINE_RESERVED_A_V 0:0 + +#define NVCB97_SET_PIPELINE_REGISTER_COUNT(j) (0x200c+(j)*64) +#define NVCB97_SET_PIPELINE_REGISTER_COUNT_V 8:0 + +#define NVCB97_SET_PIPELINE_BINDING(j) (0x2010+(j)*64) +#define NVCB97_SET_PIPELINE_BINDING_GROUP 2:0 + +#define NVCB97_SET_PIPELINE_PROGRAM_ADDRESS_A(j) (0x2014+(j)*64) +#define NVCB97_SET_PIPELINE_PROGRAM_ADDRESS_A_UPPER 7:0 + +#define NVCB97_SET_PIPELINE_PROGRAM_ADDRESS_B(j) (0x2018+(j)*64) +#define NVCB97_SET_PIPELINE_PROGRAM_ADDRESS_B_LOWER 31:0 + +#define NVCB97_SET_PIPELINE_PROGRAM_PREFETCH(j) (0x201c+(j)*64) +#define NVCB97_SET_PIPELINE_PROGRAM_PREFETCH_SIZE_IN_BLOCKS 6:0 + +#define NVCB97_SET_PIPELINE_RESERVED_E(j) (0x2020+(j)*64) +#define NVCB97_SET_PIPELINE_RESERVED_E_V 0:0 + +#define NVCB97_SET_FALCON00 0x2300 +#define NVCB97_SET_FALCON00_V 31:0 + +#define NVCB97_SET_FALCON01 0x2304 +#define NVCB97_SET_FALCON01_V 31:0 + +#define NVCB97_SET_FALCON02 0x2308 +#define NVCB97_SET_FALCON02_V 31:0 + +#define NVCB97_SET_FALCON03 0x230c +#define NVCB97_SET_FALCON03_V 31:0 + +#define NVCB97_SET_FALCON04 0x2310 +#define NVCB97_SET_FALCON04_V 31:0 + +#define NVCB97_SET_FALCON05 0x2314 +#define NVCB97_SET_FALCON05_V 31:0 + +#define NVCB97_SET_FALCON06 0x2318 +#define NVCB97_SET_FALCON06_V 31:0 + +#define NVCB97_SET_FALCON07 0x231c +#define NVCB97_SET_FALCON07_V 31:0 + +#define NVCB97_SET_FALCON08 0x2320 +#define NVCB97_SET_FALCON08_V 31:0 + +#define NVCB97_SET_FALCON09 0x2324 +#define NVCB97_SET_FALCON09_V 31:0 + +#define NVCB97_SET_FALCON10 0x2328 +#define NVCB97_SET_FALCON10_V 31:0 + +#define NVCB97_SET_FALCON11 0x232c +#define NVCB97_SET_FALCON11_V 31:0 + +#define NVCB97_SET_FALCON12 0x2330 +#define NVCB97_SET_FALCON12_V 31:0 + +#define NVCB97_SET_FALCON13 0x2334 +#define NVCB97_SET_FALCON13_V 31:0 + +#define NVCB97_SET_FALCON14 0x2338 +#define NVCB97_SET_FALCON14_V 31:0 + +#define NVCB97_SET_FALCON15 0x233c +#define NVCB97_SET_FALCON15_V 31:0 + +#define NVCB97_SET_FALCON16 0x2340 +#define NVCB97_SET_FALCON16_V 31:0 + +#define NVCB97_SET_FALCON17 0x2344 +#define NVCB97_SET_FALCON17_V 31:0 + +#define NVCB97_SET_FALCON18 0x2348 +#define NVCB97_SET_FALCON18_V 31:0 + +#define NVCB97_SET_FALCON19 0x234c +#define NVCB97_SET_FALCON19_V 31:0 + +#define NVCB97_SET_FALCON20 0x2350 +#define NVCB97_SET_FALCON20_V 31:0 + +#define NVCB97_SET_FALCON21 0x2354 +#define NVCB97_SET_FALCON21_V 31:0 + +#define NVCB97_SET_FALCON22 0x2358 +#define NVCB97_SET_FALCON22_V 31:0 + +#define NVCB97_SET_FALCON23 0x235c +#define NVCB97_SET_FALCON23_V 31:0 + +#define NVCB97_SET_FALCON24 0x2360 +#define NVCB97_SET_FALCON24_V 31:0 + +#define NVCB97_SET_FALCON25 0x2364 +#define NVCB97_SET_FALCON25_V 31:0 + +#define NVCB97_SET_FALCON26 0x2368 +#define NVCB97_SET_FALCON26_V 31:0 + +#define NVCB97_SET_FALCON27 0x236c +#define NVCB97_SET_FALCON27_V 31:0 + +#define NVCB97_SET_FALCON28 0x2370 +#define NVCB97_SET_FALCON28_V 31:0 + +#define NVCB97_SET_FALCON29 0x2374 +#define NVCB97_SET_FALCON29_V 31:0 + +#define NVCB97_SET_FALCON30 0x2378 +#define NVCB97_SET_FALCON30_V 31:0 + +#define NVCB97_SET_FALCON31 0x237c +#define NVCB97_SET_FALCON31_V 31:0 + +#define NVCB97_SET_CONSTANT_BUFFER_SELECTOR_A 0x2380 +#define NVCB97_SET_CONSTANT_BUFFER_SELECTOR_A_SIZE 16:0 + +#define NVCB97_SET_CONSTANT_BUFFER_SELECTOR_B 0x2384 +#define NVCB97_SET_CONSTANT_BUFFER_SELECTOR_B_ADDRESS_UPPER 7:0 + +#define NVCB97_SET_CONSTANT_BUFFER_SELECTOR_C 0x2388 +#define NVCB97_SET_CONSTANT_BUFFER_SELECTOR_C_ADDRESS_LOWER 31:0 + +#define NVCB97_LOAD_CONSTANT_BUFFER_OFFSET 0x238c +#define NVCB97_LOAD_CONSTANT_BUFFER_OFFSET_V 15:0 + +#define NVCB97_LOAD_CONSTANT_BUFFER(i) (0x2390+(i)*4) +#define NVCB97_LOAD_CONSTANT_BUFFER_V 31:0 + +#define NVCB97_BIND_GROUP_RESERVED_A(j) (0x2400+(j)*32) +#define NVCB97_BIND_GROUP_RESERVED_A_V 0:0 + +#define NVCB97_BIND_GROUP_RESERVED_B(j) (0x2404+(j)*32) +#define NVCB97_BIND_GROUP_RESERVED_B_V 0:0 + +#define NVCB97_BIND_GROUP_RESERVED_C(j) (0x2408+(j)*32) +#define NVCB97_BIND_GROUP_RESERVED_C_V 0:0 + +#define NVCB97_BIND_GROUP_RESERVED_D(j) (0x240c+(j)*32) +#define NVCB97_BIND_GROUP_RESERVED_D_V 0:0 + +#define NVCB97_BIND_GROUP_CONSTANT_BUFFER(j) (0x2410+(j)*32) +#define NVCB97_BIND_GROUP_CONSTANT_BUFFER_VALID 0:0 +#define NVCB97_BIND_GROUP_CONSTANT_BUFFER_VALID_FALSE 0x00000000 +#define NVCB97_BIND_GROUP_CONSTANT_BUFFER_VALID_TRUE 0x00000001 +#define NVCB97_BIND_GROUP_CONSTANT_BUFFER_SHADER_SLOT 8:4 + +#define NVCB97_SET_TRAP_HANDLER_A 0x25f8 +#define NVCB97_SET_TRAP_HANDLER_A_ADDRESS_UPPER 16:0 + +#define NVCB97_SET_TRAP_HANDLER_B 0x25fc +#define NVCB97_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVCB97_SET_COLOR_CLAMP 0x2600 +#define NVCB97_SET_COLOR_CLAMP_ENABLE 0:0 +#define NVCB97_SET_COLOR_CLAMP_ENABLE_FALSE 0x00000000 +#define NVCB97_SET_COLOR_CLAMP_ENABLE_TRUE 0x00000001 + +#define NVCB97_SET_STREAM_OUT_LAYOUT_SELECT(i,j) (0x2800+(i)*128+(j)*4) +#define NVCB97_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER00 7:0 +#define NVCB97_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER01 15:8 +#define NVCB97_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER02 23:16 +#define NVCB97_SET_STREAM_OUT_LAYOUT_SELECT_ATTRIBUTE_NUMBER03 31:24 + +#define NVCB97_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVCB97_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVCB97_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVCB97_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVCB97_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVCB97_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVCB97_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVCB97_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVCB97_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVCB97_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVCB97_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVCB97_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVCB97_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVCB97_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVCB97_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVCB97_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVCB97_CALL_MME_MACRO_V 31:0 + +#define NVCB97_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVCB97_CALL_MME_DATA_V 31:0 + +#endif /* _cl_hopper_a_h_ */ diff --git a/userspace/sdks/nv570/inc/class/clcb97tex.h b/userspace/sdks/nv570/inc/class/clcb97tex.h new file mode 100644 index 0000000..f9871b7 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcb97tex.h @@ -0,0 +1,2437 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2001-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/* AUTO GENERATED FILE -- DO NOT EDIT */ + +#ifndef __CLCB97TEX_H__ +#define __CLCB97TEX_H__ + +/* +** Texture Header State Blocklinear + */ + +#define NVCB97_TEXHEAD_BL_COMPONENTS MW(6:0) +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R32 0x0000000f +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R16 0x0000001b +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R8 0x0000001d +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_R1 0x0000001f +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_EAC 0x00000019 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_Z16 0x0000003a +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVCB97_TEXHEAD_BL_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVCB97_TEXHEAD_BL_R_DATA_TYPE MW(9:7) +#define NVCB97_TEXHEAD_BL_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_BL_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_BL_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_BL_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_BL_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_BL_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_BL_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BL_G_DATA_TYPE MW(12:10) +#define NVCB97_TEXHEAD_BL_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_BL_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_BL_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_BL_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_BL_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_BL_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_BL_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BL_B_DATA_TYPE MW(15:13) +#define NVCB97_TEXHEAD_BL_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_BL_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_BL_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_BL_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_BL_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_BL_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_BL_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BL_A_DATA_TYPE MW(18:16) +#define NVCB97_TEXHEAD_BL_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_BL_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_BL_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_BL_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_BL_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_BL_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_BL_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BL_X_SOURCE MW(21:19) +#define NVCB97_TEXHEAD_BL_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_BL_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_BL_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_BL_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_BL_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_BL_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_BL_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BL_Y_SOURCE MW(24:22) +#define NVCB97_TEXHEAD_BL_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_BL_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_BL_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_BL_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_BL_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_BL_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_BL_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BL_Z_SOURCE MW(27:25) +#define NVCB97_TEXHEAD_BL_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_BL_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_BL_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_BL_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_BL_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_BL_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_BL_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BL_W_SOURCE MW(30:28) +#define NVCB97_TEXHEAD_BL_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_BL_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_BL_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_BL_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_BL_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_BL_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_BL_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BL_PACK_COMPONENTS MW(31:31) +#define NVCB97_TEXHEAD_BL_RESERVED1Y MW(36:32) +#define NVCB97_TEXHEAD_BL_GOB_DEPTH_OFFSET MW(38:37) +#define NVCB97_TEXHEAD_BL_RESERVED1X MW(40:39) +#define NVCB97_TEXHEAD_BL_ADDRESS_BITS31TO9 MW(63:41) +#define NVCB97_TEXHEAD_BL_ADDRESS_BITS48TO32 MW(80:64) +#define NVCB97_TEXHEAD_BL_RESERVED_ADDRESS MW(84:81) +#define NVCB97_TEXHEAD_BL_HEADER_VERSION MW(87:85) +#define NVCB97_TEXHEAD_BL_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVCB97_TEXHEAD_BL_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVCB97_TEXHEAD_BL_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVCB97_TEXHEAD_BL_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVCB97_TEXHEAD_BL_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVCB97_TEXHEAD_BL_RESERVED_HEADER_VERSION MW(88:88) +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVCB97_TEXHEAD_BL_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVCB97_TEXHEAD_BL_RESERVED2A MW(95:93) +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_WIDTH MW(98:96) +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT MW(101:99) +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH MW(104:102) +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_BL_GOBS_PER_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_BL_RESERVED3Y MW(105:105) +#define NVCB97_TEXHEAD_BL_TILE_WIDTH_IN_GOBS MW(108:106) +#define NVCB97_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_BL_TILE_WIDTH_IN_GOBS_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_BL_GOB3D MW(109:109) +#define NVCB97_TEXHEAD_BL_RESERVED3Z MW(111:110) +#define NVCB97_TEXHEAD_BL_LOD_ANISO_QUALITY2 MW(112:112) +#define NVCB97_TEXHEAD_BL_LOD_ANISO_QUALITY MW(113:113) +#define NVCB97_TEXHEAD_BL_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_BL_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_BL_LOD_ISO_QUALITY MW(114:114) +#define NVCB97_TEXHEAD_BL_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_BL_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER MW(116:115) +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_BL_ANISO_SPREAD_SCALE MW(121:117) +#define NVCB97_TEXHEAD_BL_USE_HEADER_OPT_CONTROL MW(122:122) +#define NVCB97_TEXHEAD_BL_DEPTH_TEXTURE MW(123:123) +#define NVCB97_TEXHEAD_BL_MAX_MIP_LEVEL MW(127:124) +#define NVCB97_TEXHEAD_BL_WIDTH_MINUS_ONE MW(144:128) +#define NVCB97_TEXHEAD_BL_DEPTH_MINUS_ONE_BIT14 MW(145:145) +#define NVCB97_TEXHEAD_BL_HEIGHT_MINUS_ONE_BIT16 MW(146:146) +#define NVCB97_TEXHEAD_BL_ANISO_SPREAD_MAX_LOG2 MW(149:147) +#define NVCB97_TEXHEAD_BL_S_R_G_B_CONVERSION MW(150:150) +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE MW(154:151) +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVCB97_TEXHEAD_BL_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVCB97_TEXHEAD_BL_SECTOR_PROMOTION MW(156:155) +#define NVCB97_TEXHEAD_BL_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_BL_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_BL_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_BL_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_BL_BORDER_SIZE MW(159:157) +#define NVCB97_TEXHEAD_BL_BORDER_SIZE_BORDER_SIZE_ONE 0x00000000 +#define NVCB97_TEXHEAD_BL_BORDER_SIZE_BORDER_SIZE_TWO 0x00000001 +#define NVCB97_TEXHEAD_BL_BORDER_SIZE_BORDER_SIZE_FOUR 0x00000002 +#define NVCB97_TEXHEAD_BL_BORDER_SIZE_BORDER_SIZE_EIGHT 0x00000003 +#define NVCB97_TEXHEAD_BL_BORDER_SIZE_BORDER_SAMPLER_COLOR 0x00000007 +#define NVCB97_TEXHEAD_BL_HEIGHT_MINUS_ONE MW(175:160) +#define NVCB97_TEXHEAD_BL_DEPTH_MINUS_ONE MW(189:176) +#define NVCB97_TEXHEAD_BL_RESERVED5A MW(190:190) +#define NVCB97_TEXHEAD_BL_NORMALIZED_COORDS MW(191:191) +#define NVCB97_TEXHEAD_BL_RESERVED6Y MW(192:192) +#define NVCB97_TEXHEAD_BL_TRILIN_OPT MW(197:193) +#define NVCB97_TEXHEAD_BL_MIP_LOD_BIAS MW(210:198) +#define NVCB97_TEXHEAD_BL_ANISO_BIAS MW(214:211) +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_BL_MAX_ANISOTROPY MW(221:219) +#define NVCB97_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVCB97_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVCB97_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVCB97_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVCB97_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVCB97_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVCB97_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVCB97_TEXHEAD_BL_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_BL_RES_VIEW_MIN_MIP_LEVEL MW(227:224) +#define NVCB97_TEXHEAD_BL_RES_VIEW_MAX_MIP_LEVEL MW(231:228) +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT MW(235:232) +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_1X1 0x00000000 +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X1 0x00000001 +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X2 0x00000002 +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X2 0x00000003 +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X2_D3D 0x00000004 +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X1_D3D 0x00000005 +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X4 0x00000006 +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X2_VC_4 0x00000008 +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_2X2_VC_12 0x00000009 +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X2_VC_8 0x0000000a +#define NVCB97_TEXHEAD_BL_MULTI_SAMPLE_COUNT_MODE_4X2_VC_24 0x0000000b +#define NVCB97_TEXHEAD_BL_MIN_LOD_CLAMP MW(247:236) +#define NVCB97_TEXHEAD_BL_RESERVED7Y MW(255:248) + + +/* +** Texture Header State Blocklinear Color Key + */ + +#define NVCB97_TEXHEAD_BLCK_COMPONENTS MW(6:0) +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R32 0x0000000f +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R16 0x0000001b +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R8 0x0000001d +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_R1 0x0000001f +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_EAC 0x00000019 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_Z16 0x0000003a +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVCB97_TEXHEAD_BLCK_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVCB97_TEXHEAD_BLCK_R_DATA_TYPE MW(9:7) +#define NVCB97_TEXHEAD_BLCK_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_BLCK_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_BLCK_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_BLCK_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_BLCK_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_BLCK_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_BLCK_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BLCK_G_DATA_TYPE MW(12:10) +#define NVCB97_TEXHEAD_BLCK_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_BLCK_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_BLCK_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_BLCK_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_BLCK_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_BLCK_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_BLCK_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BLCK_B_DATA_TYPE MW(15:13) +#define NVCB97_TEXHEAD_BLCK_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_BLCK_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_BLCK_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_BLCK_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_BLCK_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_BLCK_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_BLCK_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BLCK_A_DATA_TYPE MW(18:16) +#define NVCB97_TEXHEAD_BLCK_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_BLCK_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_BLCK_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_BLCK_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_BLCK_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_BLCK_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_BLCK_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BLCK_X_SOURCE MW(21:19) +#define NVCB97_TEXHEAD_BLCK_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_BLCK_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_BLCK_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_BLCK_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_BLCK_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_BLCK_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_BLCK_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BLCK_Y_SOURCE MW(24:22) +#define NVCB97_TEXHEAD_BLCK_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_BLCK_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_BLCK_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_BLCK_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_BLCK_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_BLCK_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_BLCK_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BLCK_Z_SOURCE MW(27:25) +#define NVCB97_TEXHEAD_BLCK_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_BLCK_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_BLCK_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_BLCK_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_BLCK_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_BLCK_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_BLCK_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BLCK_W_SOURCE MW(30:28) +#define NVCB97_TEXHEAD_BLCK_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_BLCK_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_BLCK_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_BLCK_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_BLCK_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_BLCK_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_BLCK_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_BLCK_PACK_COMPONENTS MW(31:31) +#define NVCB97_TEXHEAD_BLCK_RESERVED1Y MW(36:32) +#define NVCB97_TEXHEAD_BLCK_GOB_DEPTH_OFFSET MW(38:37) +#define NVCB97_TEXHEAD_BLCK_RESERVED1X MW(40:39) +#define NVCB97_TEXHEAD_BLCK_ADDRESS_BITS31TO9 MW(63:41) +#define NVCB97_TEXHEAD_BLCK_ADDRESS_BITS48TO32 MW(80:64) +#define NVCB97_TEXHEAD_BLCK_RESERVED_ADDRESS MW(84:81) +#define NVCB97_TEXHEAD_BLCK_HEADER_VERSION MW(87:85) +#define NVCB97_TEXHEAD_BLCK_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVCB97_TEXHEAD_BLCK_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVCB97_TEXHEAD_BLCK_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVCB97_TEXHEAD_BLCK_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVCB97_TEXHEAD_BLCK_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVCB97_TEXHEAD_BLCK_RESERVED_HEADER_VERSION MW(88:88) +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVCB97_TEXHEAD_BLCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVCB97_TEXHEAD_BLCK_RESERVED2A MW(95:93) +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_WIDTH MW(98:96) +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT MW(101:99) +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH MW(104:102) +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_BLCK_GOBS_PER_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_BLCK_RESERVED3Y MW(105:105) +#define NVCB97_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS MW(108:106) +#define NVCB97_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_BLCK_TILE_WIDTH_IN_GOBS_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_BLCK_GOB3D MW(109:109) +#define NVCB97_TEXHEAD_BLCK_RESERVED3Z MW(111:110) +#define NVCB97_TEXHEAD_BLCK_LOD_ANISO_QUALITY2 MW(112:112) +#define NVCB97_TEXHEAD_BLCK_LOD_ANISO_QUALITY MW(113:113) +#define NVCB97_TEXHEAD_BLCK_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_BLCK_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_BLCK_LOD_ISO_QUALITY MW(114:114) +#define NVCB97_TEXHEAD_BLCK_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_BLCK_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER MW(116:115) +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_BLCK_ANISO_SPREAD_SCALE MW(121:117) +#define NVCB97_TEXHEAD_BLCK_USE_HEADER_OPT_CONTROL MW(122:122) +#define NVCB97_TEXHEAD_BLCK_DEPTH_TEXTURE MW(123:123) +#define NVCB97_TEXHEAD_BLCK_MAX_MIP_LEVEL MW(127:124) +#define NVCB97_TEXHEAD_BLCK_WIDTH_MINUS_ONE MW(144:128) +#define NVCB97_TEXHEAD_BLCK_DEPTH_MINUS_ONE_BIT14 MW(145:145) +#define NVCB97_TEXHEAD_BLCK_HEIGHT_MINUS_ONE_BIT16 MW(146:146) +#define NVCB97_TEXHEAD_BLCK_ANISO_SPREAD_MAX_LOG2 MW(149:147) +#define NVCB97_TEXHEAD_BLCK_S_R_G_B_CONVERSION MW(150:150) +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE MW(154:151) +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVCB97_TEXHEAD_BLCK_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVCB97_TEXHEAD_BLCK_SECTOR_PROMOTION MW(156:155) +#define NVCB97_TEXHEAD_BLCK_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_BLCK_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_BLCK_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_BLCK_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_BLCK_BORDER_SIZE MW(159:157) +#define NVCB97_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SIZE_ONE 0x00000000 +#define NVCB97_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SIZE_TWO 0x00000001 +#define NVCB97_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SIZE_FOUR 0x00000002 +#define NVCB97_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SIZE_EIGHT 0x00000003 +#define NVCB97_TEXHEAD_BLCK_BORDER_SIZE_BORDER_SAMPLER_COLOR 0x00000007 +#define NVCB97_TEXHEAD_BLCK_HEIGHT_MINUS_ONE MW(175:160) +#define NVCB97_TEXHEAD_BLCK_DEPTH_MINUS_ONE MW(189:176) +#define NVCB97_TEXHEAD_BLCK_RESERVED5A MW(190:190) +#define NVCB97_TEXHEAD_BLCK_NORMALIZED_COORDS MW(191:191) +#define NVCB97_TEXHEAD_BLCK_COLOR_KEY_OP MW(192:192) +#define NVCB97_TEXHEAD_BLCK_TRILIN_OPT MW(197:193) +#define NVCB97_TEXHEAD_BLCK_MIP_LOD_BIAS MW(210:198) +#define NVCB97_TEXHEAD_BLCK_ANISO_BIAS MW(214:211) +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_BLCK_MAX_ANISOTROPY MW(221:219) +#define NVCB97_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVCB97_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVCB97_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVCB97_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVCB97_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVCB97_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVCB97_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVCB97_TEXHEAD_BLCK_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_BLCK_COLOR_KEY_VALUE MW(255:224) + + +/* +** Texture Header State One-D Buffer + */ + +#define NVCB97_TEXHEAD_1D_COMPONENTS MW(6:0) +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R32 0x0000000f +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R16 0x0000001b +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R8 0x0000001d +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_R1 0x0000001f +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_EAC 0x00000019 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_Z16 0x0000003a +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVCB97_TEXHEAD_1D_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVCB97_TEXHEAD_1D_R_DATA_TYPE MW(9:7) +#define NVCB97_TEXHEAD_1D_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_1D_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_1D_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_1D_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_1D_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_1D_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_1D_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_1D_G_DATA_TYPE MW(12:10) +#define NVCB97_TEXHEAD_1D_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_1D_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_1D_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_1D_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_1D_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_1D_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_1D_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_1D_B_DATA_TYPE MW(15:13) +#define NVCB97_TEXHEAD_1D_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_1D_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_1D_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_1D_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_1D_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_1D_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_1D_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_1D_A_DATA_TYPE MW(18:16) +#define NVCB97_TEXHEAD_1D_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_1D_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_1D_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_1D_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_1D_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_1D_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_1D_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_1D_X_SOURCE MW(21:19) +#define NVCB97_TEXHEAD_1D_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_1D_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_1D_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_1D_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_1D_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_1D_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_1D_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_1D_Y_SOURCE MW(24:22) +#define NVCB97_TEXHEAD_1D_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_1D_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_1D_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_1D_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_1D_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_1D_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_1D_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_1D_Z_SOURCE MW(27:25) +#define NVCB97_TEXHEAD_1D_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_1D_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_1D_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_1D_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_1D_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_1D_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_1D_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_1D_W_SOURCE MW(30:28) +#define NVCB97_TEXHEAD_1D_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_1D_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_1D_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_1D_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_1D_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_1D_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_1D_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_1D_PACK_COMPONENTS MW(31:31) +#define NVCB97_TEXHEAD_1D_ADDRESS_BITS31TO0 MW(63:32) +#define NVCB97_TEXHEAD_1D_ADDRESS_BITS48TO32 MW(80:64) +#define NVCB97_TEXHEAD_1D_RESERVED_ADDRESS MW(84:81) +#define NVCB97_TEXHEAD_1D_HEADER_VERSION MW(87:85) +#define NVCB97_TEXHEAD_1D_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVCB97_TEXHEAD_1D_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVCB97_TEXHEAD_1D_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVCB97_TEXHEAD_1D_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVCB97_TEXHEAD_1D_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVCB97_TEXHEAD_1D_RESERVED_HEADER_VERSION MW(88:88) +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVCB97_TEXHEAD_1D_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVCB97_TEXHEAD_1D_RESERVED2A MW(95:93) +#define NVCB97_TEXHEAD_1D_WIDTH_MINUS_ONE_BITS31TO16 MW(111:96) +#define NVCB97_TEXHEAD_1D_RESERVED3X MW(127:112) +#define NVCB97_TEXHEAD_1D_WIDTH_MINUS_ONE_BITS15TO0 MW(143:128) +#define NVCB97_TEXHEAD_1D_RESERVED4X MW(149:144) +#define NVCB97_TEXHEAD_1D_S_R_G_B_CONVERSION MW(150:150) +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE MW(154:151) +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVCB97_TEXHEAD_1D_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVCB97_TEXHEAD_1D_SECTOR_PROMOTION MW(156:155) +#define NVCB97_TEXHEAD_1D_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_1D_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_1D_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_1D_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_1D_RESERVED4Y MW(159:157) +#define NVCB97_TEXHEAD_1D_RESERVED5X MW(189:160) +#define NVCB97_TEXHEAD_1D_RESERVED5A MW(190:190) +#define NVCB97_TEXHEAD_1D_RESERVED5Y MW(191:191) +#define NVCB97_TEXHEAD_1D_RESERVED6X MW(223:192) +#define NVCB97_TEXHEAD_1D_RESERVED7X MW(255:224) + + +/* +** Texture Header State Pitch + */ + +#define NVCB97_TEXHEAD_PITCH_COMPONENTS MW(6:0) +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R32 0x0000000f +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R16 0x0000001b +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R8 0x0000001d +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_R1 0x0000001f +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_EAC 0x00000019 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_Z16 0x0000003a +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVCB97_TEXHEAD_PITCH_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVCB97_TEXHEAD_PITCH_R_DATA_TYPE MW(9:7) +#define NVCB97_TEXHEAD_PITCH_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_PITCH_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_PITCH_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_PITCH_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_PITCH_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_PITCH_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_PITCH_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCH_G_DATA_TYPE MW(12:10) +#define NVCB97_TEXHEAD_PITCH_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_PITCH_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_PITCH_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_PITCH_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_PITCH_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_PITCH_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_PITCH_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCH_B_DATA_TYPE MW(15:13) +#define NVCB97_TEXHEAD_PITCH_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_PITCH_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_PITCH_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_PITCH_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_PITCH_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_PITCH_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_PITCH_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCH_A_DATA_TYPE MW(18:16) +#define NVCB97_TEXHEAD_PITCH_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_PITCH_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_PITCH_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_PITCH_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_PITCH_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_PITCH_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_PITCH_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCH_X_SOURCE MW(21:19) +#define NVCB97_TEXHEAD_PITCH_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_PITCH_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_PITCH_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_PITCH_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_PITCH_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_PITCH_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_PITCH_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCH_Y_SOURCE MW(24:22) +#define NVCB97_TEXHEAD_PITCH_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_PITCH_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_PITCH_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_PITCH_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_PITCH_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_PITCH_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_PITCH_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCH_Z_SOURCE MW(27:25) +#define NVCB97_TEXHEAD_PITCH_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_PITCH_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_PITCH_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_PITCH_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_PITCH_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_PITCH_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_PITCH_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCH_W_SOURCE MW(30:28) +#define NVCB97_TEXHEAD_PITCH_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_PITCH_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_PITCH_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_PITCH_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_PITCH_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_PITCH_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_PITCH_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCH_PACK_COMPONENTS MW(31:31) +#define NVCB97_TEXHEAD_PITCH_RESERVED1A MW(36:32) +#define NVCB97_TEXHEAD_PITCH_ADDRESS_BITS31TO5 MW(63:37) +#define NVCB97_TEXHEAD_PITCH_ADDRESS_BITS48TO32 MW(80:64) +#define NVCB97_TEXHEAD_PITCH_RESERVED_ADDRESS MW(84:81) +#define NVCB97_TEXHEAD_PITCH_HEADER_VERSION MW(87:85) +#define NVCB97_TEXHEAD_PITCH_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVCB97_TEXHEAD_PITCH_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVCB97_TEXHEAD_PITCH_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVCB97_TEXHEAD_PITCH_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVCB97_TEXHEAD_PITCH_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVCB97_TEXHEAD_PITCH_RESERVED_HEADER_VERSION MW(88:88) +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVCB97_TEXHEAD_PITCH_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVCB97_TEXHEAD_PITCH_RESERVED2A MW(95:93) +#define NVCB97_TEXHEAD_PITCH_PITCH_BITS20TO5 MW(111:96) +#define NVCB97_TEXHEAD_PITCH_LOD_ANISO_QUALITY2 MW(112:112) +#define NVCB97_TEXHEAD_PITCH_LOD_ANISO_QUALITY MW(113:113) +#define NVCB97_TEXHEAD_PITCH_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_PITCH_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_PITCH_LOD_ISO_QUALITY MW(114:114) +#define NVCB97_TEXHEAD_PITCH_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_PITCH_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER MW(116:115) +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_PITCH_ANISO_SPREAD_SCALE MW(121:117) +#define NVCB97_TEXHEAD_PITCH_USE_HEADER_OPT_CONTROL MW(122:122) +#define NVCB97_TEXHEAD_PITCH_DEPTH_TEXTURE MW(123:123) +#define NVCB97_TEXHEAD_PITCH_MAX_MIP_LEVEL MW(127:124) +#define NVCB97_TEXHEAD_PITCH_WIDTH_MINUS_ONE MW(144:128) +#define NVCB97_TEXHEAD_PITCH_PITCH_BIT21 MW(145:145) +#define NVCB97_TEXHEAD_PITCH_HEIGHT_MINUS_ONE_BIT16 MW(146:146) +#define NVCB97_TEXHEAD_PITCH_ANISO_SPREAD_MAX_LOG2 MW(149:147) +#define NVCB97_TEXHEAD_PITCH_S_R_G_B_CONVERSION MW(150:150) +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE MW(154:151) +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVCB97_TEXHEAD_PITCH_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVCB97_TEXHEAD_PITCH_SECTOR_PROMOTION MW(156:155) +#define NVCB97_TEXHEAD_PITCH_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_PITCH_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_PITCH_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_PITCH_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_PITCH_BORDER_SIZE MW(159:157) +#define NVCB97_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SIZE_ONE 0x00000000 +#define NVCB97_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SIZE_TWO 0x00000001 +#define NVCB97_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SIZE_FOUR 0x00000002 +#define NVCB97_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SIZE_EIGHT 0x00000003 +#define NVCB97_TEXHEAD_PITCH_BORDER_SIZE_BORDER_SAMPLER_COLOR 0x00000007 +#define NVCB97_TEXHEAD_PITCH_HEIGHT_MINUS_ONE MW(175:160) +#define NVCB97_TEXHEAD_PITCH_DEPTH_MINUS_ONE MW(189:176) +#define NVCB97_TEXHEAD_PITCH_RESERVED5A MW(190:190) +#define NVCB97_TEXHEAD_PITCH_NORMALIZED_COORDS MW(191:191) +#define NVCB97_TEXHEAD_PITCH_RESERVED6Y MW(192:192) +#define NVCB97_TEXHEAD_PITCH_TRILIN_OPT MW(197:193) +#define NVCB97_TEXHEAD_PITCH_MIP_LOD_BIAS MW(210:198) +#define NVCB97_TEXHEAD_PITCH_ANISO_BIAS MW(214:211) +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_PITCH_MAX_ANISOTROPY MW(221:219) +#define NVCB97_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVCB97_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVCB97_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVCB97_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVCB97_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVCB97_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVCB97_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVCB97_TEXHEAD_PITCH_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_PITCH_RES_VIEW_MIN_MIP_LEVEL MW(227:224) +#define NVCB97_TEXHEAD_PITCH_RES_VIEW_MAX_MIP_LEVEL MW(231:228) +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT MW(235:232) +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_1X1 0x00000000 +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X1 0x00000001 +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X2 0x00000002 +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2 0x00000003 +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2_D3D 0x00000004 +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X1_D3D 0x00000005 +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X4 0x00000006 +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X2_VC_4 0x00000008 +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_2X2_VC_12 0x00000009 +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2_VC_8 0x0000000a +#define NVCB97_TEXHEAD_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2_VC_24 0x0000000b +#define NVCB97_TEXHEAD_PITCH_MIN_LOD_CLAMP MW(247:236) +#define NVCB97_TEXHEAD_PITCH_RESERVED7Y MW(255:248) + + +/* +** Texture Header State Pitch Color Key + */ + +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS MW(6:0) +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R32 0x0000000f +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R16 0x0000001b +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R8 0x0000001d +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_R1 0x0000001f +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_EAC 0x00000019 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_Z16 0x0000003a +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVCB97_TEXHEAD_PITCHCK_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVCB97_TEXHEAD_PITCHCK_R_DATA_TYPE MW(9:7) +#define NVCB97_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_R_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_G_DATA_TYPE MW(12:10) +#define NVCB97_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_G_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_B_DATA_TYPE MW(15:13) +#define NVCB97_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_B_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_A_DATA_TYPE MW(18:16) +#define NVCB97_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_SNORM 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_UNORM 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_SINT 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_UINT 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_SNORM_FORCE_FP16 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_UNORM_FORCE_FP16 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_A_DATA_TYPE_NUM_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_X_SOURCE MW(21:19) +#define NVCB97_TEXHEAD_PITCHCK_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_Y_SOURCE MW(24:22) +#define NVCB97_TEXHEAD_PITCHCK_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_Z_SOURCE MW(27:25) +#define NVCB97_TEXHEAD_PITCHCK_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_W_SOURCE MW(30:28) +#define NVCB97_TEXHEAD_PITCHCK_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_PACK_COMPONENTS MW(31:31) +#define NVCB97_TEXHEAD_PITCHCK_RESERVED1A MW(36:32) +#define NVCB97_TEXHEAD_PITCHCK_ADDRESS_BITS31TO5 MW(63:37) +#define NVCB97_TEXHEAD_PITCHCK_ADDRESS_BITS48TO32 MW(80:64) +#define NVCB97_TEXHEAD_PITCHCK_RESERVED_ADDRESS MW(84:81) +#define NVCB97_TEXHEAD_PITCHCK_HEADER_VERSION MW(87:85) +#define NVCB97_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_ONE_D_BUFFER 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_PITCH_COLOR_KEY 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_PITCH 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_BLOCKLINEAR 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_RESERVED_HEADER_VERSION MW(88:88) +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH MW(92:89) +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_0 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_1 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_2 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_3 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_4 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_5 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_6 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_7 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_8 0x00000008 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_9 0x00000009 +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_10 0x0000000a +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_11 0x0000000b +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_12 0x0000000c +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_13 0x0000000d +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_ALIASED_14 0x0000000e +#define NVCB97_TEXHEAD_PITCHCK_RESOURCE_VIEW_COHERENCY_HASH_HASH_UNALIASED 0x0000000f +#define NVCB97_TEXHEAD_PITCHCK_RESERVED2A MW(95:93) +#define NVCB97_TEXHEAD_PITCHCK_PITCH_BITS20TO5 MW(111:96) +#define NVCB97_TEXHEAD_PITCHCK_LOD_ANISO_QUALITY2 MW(112:112) +#define NVCB97_TEXHEAD_PITCHCK_LOD_ANISO_QUALITY MW(113:113) +#define NVCB97_TEXHEAD_PITCHCK_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_LOD_ISO_QUALITY MW(114:114) +#define NVCB97_TEXHEAD_PITCHCK_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER MW(116:115) +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_SPREAD_SCALE MW(121:117) +#define NVCB97_TEXHEAD_PITCHCK_USE_HEADER_OPT_CONTROL MW(122:122) +#define NVCB97_TEXHEAD_PITCHCK_DEPTH_TEXTURE MW(123:123) +#define NVCB97_TEXHEAD_PITCHCK_MAX_MIP_LEVEL MW(127:124) +#define NVCB97_TEXHEAD_PITCHCK_WIDTH_MINUS_ONE MW(144:128) +#define NVCB97_TEXHEAD_PITCHCK_PITCH_BIT21 MW(145:145) +#define NVCB97_TEXHEAD_PITCHCK_HEIGHT_MINUS_ONE_BIT16 MW(146:146) +#define NVCB97_TEXHEAD_PITCHCK_ANISO_SPREAD_MAX_LOG2 MW(149:147) +#define NVCB97_TEXHEAD_PITCHCK_S_R_G_B_CONVERSION MW(150:150) +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE MW(154:151) +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVCB97_TEXHEAD_PITCHCK_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVCB97_TEXHEAD_PITCHCK_SECTOR_PROMOTION MW(156:155) +#define NVCB97_TEXHEAD_PITCHCK_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_BORDER_SIZE MW(159:157) +#define NVCB97_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SIZE_ONE 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SIZE_TWO 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SIZE_FOUR 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SIZE_EIGHT 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_BORDER_SIZE_BORDER_SAMPLER_COLOR 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_HEIGHT_MINUS_ONE MW(175:160) +#define NVCB97_TEXHEAD_PITCHCK_DEPTH_MINUS_ONE MW(189:176) +#define NVCB97_TEXHEAD_PITCHCK_RESERVED5A MW(190:190) +#define NVCB97_TEXHEAD_PITCHCK_NORMALIZED_COORDS MW(191:191) +#define NVCB97_TEXHEAD_PITCHCK_COLOR_KEY_OP MW(192:192) +#define NVCB97_TEXHEAD_PITCHCK_TRILIN_OPT MW(197:193) +#define NVCB97_TEXHEAD_PITCHCK_MIP_LOD_BIAS MW(210:198) +#define NVCB97_TEXHEAD_PITCHCK_ANISO_BIAS MW(214:211) +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_MAX_ANISOTROPY MW(221:219) +#define NVCB97_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVCB97_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVCB97_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVCB97_TEXHEAD_PITCHCK_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_PITCHCK_COLOR_KEY_VALUE MW(255:224) + + +/* +** Texture Header V2 Blocklinear + */ + +#define NVCB97_TEXHEAD_V2_BL_RESERVED0A MW(3:0) +#define NVCB97_TEXHEAD_V2_BL_GOB_DEPTH_OFFSET MW(8:4) +#define NVCB97_TEXHEAD_V2_BL_ADDRESS_BITS31TO9 MW(31:9) +#define NVCB97_TEXHEAD_V2_BL_ADDRESS_BITS56TO32 MW(56:32) +#define NVCB97_TEXHEAD_V2_BL_RESERVED1A MW(63:57) +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_WIDTH MW(66:64) +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_HEIGHT MW(69:67) +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_DEPTH MW(72:70) +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_GOBS_PER_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_RESERVED3Y MW(73:73) +#define NVCB97_TEXHEAD_V2_BL_TILE_WIDTH_IN_GOBS MW(76:74) +#define NVCB97_TEXHEAD_V2_BL_TILE_WIDTH_IN_GOBS_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_TILE_WIDTH_IN_GOBS_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_TILE_WIDTH_IN_GOBS_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_TILE_WIDTH_IN_GOBS_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_TILE_WIDTH_IN_GOBS_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_TILE_WIDTH_IN_GOBS_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_GOB3D MW(77:77) +#define NVCB97_TEXHEAD_V2_BL_RESERVED2Z MW(79:78) +#define NVCB97_TEXHEAD_V2_BL_LOD_ANISO_QUALITY2 MW(80:80) +#define NVCB97_TEXHEAD_V2_BL_LOD_ANISO_QUALITY MW(81:81) +#define NVCB97_TEXHEAD_V2_BL_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_LOD_ISO_QUALITY MW(82:82) +#define NVCB97_TEXHEAD_V2_BL_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_MODIFIER MW(84:83) +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_ANISO_SPREAD_SCALE MW(89:85) +#define NVCB97_TEXHEAD_V2_BL_USE_HEADER_OPT_CONTROL MW(90:90) +#define NVCB97_TEXHEAD_V2_BL_DEPTH_TEXTURE MW(91:91) +#define NVCB97_TEXHEAD_V2_BL_MAX_MIP_LEVEL MW(95:92) +#define NVCB97_TEXHEAD_V2_BL_X_SOURCE MW(98:96) +#define NVCB97_TEXHEAD_V2_BL_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_BL_Y_SOURCE MW(101:99) +#define NVCB97_TEXHEAD_V2_BL_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_BL_Z_SOURCE MW(104:102) +#define NVCB97_TEXHEAD_V2_BL_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_BL_W_SOURCE MW(107:105) +#define NVCB97_TEXHEAD_V2_BL_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE MW(111:108) +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_UNORM 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_SNORM 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_FLOAT 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_SGNRGB 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_SGNA 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_DSDT 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_UINT 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_SINT 0x00000007 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_ZS 0x00000008 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_SZ 0x00000009 +#define NVCB97_TEXHEAD_V2_BL_DATA_TYPE_TEX_DATA_TYPE_ZFS 0x0000000a +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS MW(118:112) +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R32 0x0000000f +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R16 0x0000001b +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R8 0x0000001d +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_R1 0x0000001f +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_EAC 0x00000019 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_Z16 0x0000003a +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVCB97_TEXHEAD_V2_BL_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVCB97_TEXHEAD_V2_BL_PACK_COMPONENTS MW(119:119) +#define NVCB97_TEXHEAD_V2_BL_RESERVED3A MW(123:120) +#define NVCB97_TEXHEAD_V2_BL_HEADER_VERSION MW(127:124) +#define NVCB97_TEXHEAD_V2_BL_HEADER_VERSION_SELECT_PITCH_COLOR_KEY_V2 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_HEADER_VERSION_SELECT_PITCH_V2 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_HEADER_VERSION_SELECT_BLOCKLINEAR_V2 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY_V2 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_HEADER_VERSION_SELECT_ONE_D_RAW_TYPED 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_HEADER_VERSION_SELECT_ONE_D_STRUCT_BUF 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_WIDTH_MINUS_ONE MW(144:128) +#define NVCB97_TEXHEAD_V2_BL_NORMALIZED_COORDS MW(145:145) +#define NVCB97_TEXHEAD_V2_BL_ANISO_SPREAD_MAX_LOG2 MW(148:146) +#define NVCB97_TEXHEAD_V2_BL_S_R_G_B_CONVERSION MW(149:149) +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE MW(153:150) +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVCB97_TEXHEAD_V2_BL_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVCB97_TEXHEAD_V2_BL_SECTOR_PROMOTION MW(155:154) +#define NVCB97_TEXHEAD_V2_BL_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_BORDER_SOURCE MW(156:156) +#define NVCB97_TEXHEAD_V2_BL_BORDER_SOURCE_BORDER_TEXTURE 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_BORDER_SOURCE_BORDER_COLOR 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_RESERVED4A MW(159:157) +#define NVCB97_TEXHEAD_V2_BL_HEIGHT_MINUS_ONE MW(176:160) +#define NVCB97_TEXHEAD_V2_BL_DEPTH_MINUS_ONE MW(191:177) +#define NVCB97_TEXHEAD_V2_BL_RESERVED6Y MW(192:192) +#define NVCB97_TEXHEAD_V2_BL_TRILIN_OPT MW(197:193) +#define NVCB97_TEXHEAD_V2_BL_MIP_LOD_BIAS MW(210:198) +#define NVCB97_TEXHEAD_V2_BL_ANISO_BIAS MW(214:211) +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_MAX_ANISOTROPY MW(221:219) +#define NVCB97_TEXHEAD_V2_BL_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_RES_VIEW_MIN_MIP_LEVEL MW(227:224) +#define NVCB97_TEXHEAD_V2_BL_RES_VIEW_MAX_MIP_LEVEL MW(231:228) +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT MW(235:232) +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_1X1 0x00000000 +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_2X1 0x00000001 +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_2X2 0x00000002 +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_4X2 0x00000003 +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_4X2_D3D 0x00000004 +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_2X1_D3D 0x00000005 +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_4X4 0x00000006 +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_2X2_VC_4 0x00000008 +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_2X2_VC_12 0x00000009 +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_4X2_VC_8 0x0000000a +#define NVCB97_TEXHEAD_V2_BL_MULTI_SAMPLE_COUNT_MODE_4X2_VC_24 0x0000000b +#define NVCB97_TEXHEAD_V2_BL_MIN_LOD_CLAMP MW(247:236) +#define NVCB97_TEXHEAD_V2_BL_RESERVED7Y MW(255:248) + + +/* +** Texture Header V2 Blocklinear Color Key + */ + +#define NVCB97_TEXHEAD_V2_BLCK_RESERVED0A MW(3:0) +#define NVCB97_TEXHEAD_V2_BLCK_GOB_DEPTH_OFFSET MW(8:4) +#define NVCB97_TEXHEAD_V2_BLCK_ADDRESS_BITS31TO9 MW(31:9) +#define NVCB97_TEXHEAD_V2_BLCK_ADDRESS_BITS56TO32 MW(56:32) +#define NVCB97_TEXHEAD_V2_BLCK_RESERVED1A MW(63:57) +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_WIDTH MW(66:64) +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_WIDTH_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_HEIGHT MW(69:67) +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_HEIGHT_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_HEIGHT_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_HEIGHT_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_HEIGHT_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_HEIGHT_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_HEIGHT_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_DEPTH MW(72:70) +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_DEPTH_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_DEPTH_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_DEPTH_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_DEPTH_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_DEPTH_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_GOBS_PER_BLOCK_DEPTH_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_RESERVED3Y MW(73:73) +#define NVCB97_TEXHEAD_V2_BLCK_TILE_WIDTH_IN_GOBS MW(76:74) +#define NVCB97_TEXHEAD_V2_BLCK_TILE_WIDTH_IN_GOBS_ONE_GOB 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_TILE_WIDTH_IN_GOBS_TWO_GOBS 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_TILE_WIDTH_IN_GOBS_FOUR_GOBS 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_TILE_WIDTH_IN_GOBS_EIGHT_GOBS 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_TILE_WIDTH_IN_GOBS_SIXTEEN_GOBS 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_TILE_WIDTH_IN_GOBS_THIRTYTWO_GOBS 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_GOB3D MW(77:77) +#define NVCB97_TEXHEAD_V2_BLCK_RESERVED2Z MW(79:78) +#define NVCB97_TEXHEAD_V2_BLCK_LOD_ANISO_QUALITY2 MW(80:80) +#define NVCB97_TEXHEAD_V2_BLCK_LOD_ANISO_QUALITY MW(81:81) +#define NVCB97_TEXHEAD_V2_BLCK_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_LOD_ISO_QUALITY MW(82:82) +#define NVCB97_TEXHEAD_V2_BLCK_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_MODIFIER MW(84:83) +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_SPREAD_SCALE MW(89:85) +#define NVCB97_TEXHEAD_V2_BLCK_USE_HEADER_OPT_CONTROL MW(90:90) +#define NVCB97_TEXHEAD_V2_BLCK_DEPTH_TEXTURE MW(91:91) +#define NVCB97_TEXHEAD_V2_BLCK_MAX_MIP_LEVEL MW(95:92) +#define NVCB97_TEXHEAD_V2_BLCK_X_SOURCE MW(98:96) +#define NVCB97_TEXHEAD_V2_BLCK_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_BLCK_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_BLCK_Y_SOURCE MW(101:99) +#define NVCB97_TEXHEAD_V2_BLCK_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_BLCK_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_BLCK_Z_SOURCE MW(104:102) +#define NVCB97_TEXHEAD_V2_BLCK_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_BLCK_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_BLCK_W_SOURCE MW(107:105) +#define NVCB97_TEXHEAD_V2_BLCK_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_BLCK_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE MW(111:108) +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_UNORM 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_SNORM 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_FLOAT 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_SGNRGB 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_SGNA 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_DSDT 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_UINT 0x00000006 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_SINT 0x00000007 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_ZS 0x00000008 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_SZ 0x00000009 +#define NVCB97_TEXHEAD_V2_BLCK_DATA_TYPE_TEX_DATA_TYPE_ZFS 0x0000000a +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS MW(118:112) +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R32 0x0000000f +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R16 0x0000001b +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R8 0x0000001d +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_R1 0x0000001f +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_EAC 0x00000019 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_Z16 0x0000003a +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVCB97_TEXHEAD_V2_BLCK_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVCB97_TEXHEAD_V2_BLCK_PACK_COMPONENTS MW(119:119) +#define NVCB97_TEXHEAD_V2_BLCK_RESERVED3A MW(123:120) +#define NVCB97_TEXHEAD_V2_BLCK_HEADER_VERSION MW(127:124) +#define NVCB97_TEXHEAD_V2_BLCK_HEADER_VERSION_SELECT_PITCH_COLOR_KEY_V2 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_HEADER_VERSION_SELECT_PITCH_V2 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_HEADER_VERSION_SELECT_BLOCKLINEAR_V2 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY_V2 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_HEADER_VERSION_SELECT_ONE_D_RAW_TYPED 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_HEADER_VERSION_SELECT_ONE_D_STRUCT_BUF 0x00000006 +#define NVCB97_TEXHEAD_V2_BLCK_WIDTH_MINUS_ONE MW(144:128) +#define NVCB97_TEXHEAD_V2_BLCK_NORMALIZED_COORDS MW(145:145) +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_SPREAD_MAX_LOG2 MW(148:146) +#define NVCB97_TEXHEAD_V2_BLCK_S_R_G_B_CONVERSION MW(149:149) +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE MW(153:150) +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVCB97_TEXHEAD_V2_BLCK_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVCB97_TEXHEAD_V2_BLCK_SECTOR_PROMOTION MW(155:154) +#define NVCB97_TEXHEAD_V2_BLCK_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_BORDER_SOURCE MW(156:156) +#define NVCB97_TEXHEAD_V2_BLCK_BORDER_SOURCE_BORDER_TEXTURE 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_BORDER_SOURCE_BORDER_COLOR 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_RESERVED4A MW(159:157) +#define NVCB97_TEXHEAD_V2_BLCK_HEIGHT_MINUS_ONE MW(176:160) +#define NVCB97_TEXHEAD_V2_BLCK_DEPTH_MINUS_ONE MW(191:177) +#define NVCB97_TEXHEAD_V2_BLCK_COLOR_KEY_OP MW(192:192) +#define NVCB97_TEXHEAD_V2_BLCK_TRILIN_OPT MW(197:193) +#define NVCB97_TEXHEAD_V2_BLCK_MIP_LOD_BIAS MW(210:198) +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_BIAS MW(214:211) +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_MAX_ANISOTROPY MW(221:219) +#define NVCB97_TEXHEAD_V2_BLCK_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVCB97_TEXHEAD_V2_BLCK_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVCB97_TEXHEAD_V2_BLCK_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVCB97_TEXHEAD_V2_BLCK_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_BLCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_V2_BLCK_COLOR_KEY_VALUE MW(255:224) + + +/* +** Texture Header V2 One-D Raw Typed + */ + +#define NVCB97_TEXHEAD_V2_1DRT_ADDRESS_BITS31TO0 MW(31:0) +#define NVCB97_TEXHEAD_V2_1DRT_ADDRESS_BITS63TO32 MW(63:32) +#define NVCB97_TEXHEAD_V2_1DRT_WIDTH_MINUS_ONE MW(95:64) +#define NVCB97_TEXHEAD_V2_1DRT_X_SOURCE MW(98:96) +#define NVCB97_TEXHEAD_V2_1DRT_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_1DRT_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_1DRT_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_1DRT_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_1DRT_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_1DRT_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_1DRT_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_1DRT_Y_SOURCE MW(101:99) +#define NVCB97_TEXHEAD_V2_1DRT_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_1DRT_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_1DRT_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_1DRT_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_1DRT_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_1DRT_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_1DRT_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_1DRT_Z_SOURCE MW(104:102) +#define NVCB97_TEXHEAD_V2_1DRT_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_1DRT_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_1DRT_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_1DRT_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_1DRT_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_1DRT_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_1DRT_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_1DRT_W_SOURCE MW(107:105) +#define NVCB97_TEXHEAD_V2_1DRT_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_1DRT_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_1DRT_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_1DRT_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_1DRT_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_1DRT_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_1DRT_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE MW(111:108) +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_UNORM 0x00000000 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_SNORM 0x00000001 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_FLOAT 0x00000002 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_SGNRGB 0x00000003 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_SGNA 0x00000004 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_DSDT 0x00000005 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_UINT 0x00000006 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_SINT 0x00000007 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_ZS 0x00000008 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_SZ 0x00000009 +#define NVCB97_TEXHEAD_V2_1DRT_DATA_TYPE_TEX_DATA_TYPE_ZFS 0x0000000a +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS MW(117:112) +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_INVALID 0x00000000 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_G8R24 0x0000000d +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_G24R8 0x0000000e +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R32 0x0000000f +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_G8R8 0x00000018 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R16 0x0000001b +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R8 0x0000001d +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_G4R4 0x0000001e +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_X8B8G8R8_SRGB 0x00000031 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_A8B8G8R8_SRGB 0x00000032 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_G8R8_SRGB 0x00000033 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZES_1D_R8_SRGB 0x00000034 +#define NVCB97_TEXHEAD_V2_1DRT_COMPONENTS_SIZESV2_CS_BITFIELD_SIZE 0x0000003f +#define NVCB97_TEXHEAD_V2_1DRT_SECTOR_PROMOTION MW(119:118) +#define NVCB97_TEXHEAD_V2_1DRT_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_V2_1DRT_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_V2_1DRT_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_V2_1DRT_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_V2_1DRT_RESERVED3A MW(123:120) +#define NVCB97_TEXHEAD_V2_1DRT_HEADER_VERSION MW(127:124) +#define NVCB97_TEXHEAD_V2_1DRT_HEADER_VERSION_SELECT_PITCH_COLOR_KEY_V2 0x00000001 +#define NVCB97_TEXHEAD_V2_1DRT_HEADER_VERSION_SELECT_PITCH_V2 0x00000002 +#define NVCB97_TEXHEAD_V2_1DRT_HEADER_VERSION_SELECT_BLOCKLINEAR_V2 0x00000003 +#define NVCB97_TEXHEAD_V2_1DRT_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY_V2 0x00000004 +#define NVCB97_TEXHEAD_V2_1DRT_HEADER_VERSION_SELECT_ONE_D_RAW_TYPED 0x00000005 +#define NVCB97_TEXHEAD_V2_1DRT_HEADER_VERSION_SELECT_ONE_D_STRUCT_BUF 0x00000006 +#define NVCB97_TEXHEAD_V2_1DRT_RESERVED4X MW(156:128) +#define NVCB97_TEXHEAD_V2_1DRT_RESERVED4A MW(159:157) +#define NVCB97_TEXHEAD_V2_1DRT_RESERVED5X MW(191:160) +#define NVCB97_TEXHEAD_V2_1DRT_RESERVED6X MW(223:192) +#define NVCB97_TEXHEAD_V2_1DRT_RESERVED7X MW(255:224) + + +/* +** Texture Header V2 One-D Structured Buffer + */ + +#define NVCB97_TEXHEAD_V2_1DSB_ADDRESS_BITS31TO0 MW(31:0) +#define NVCB97_TEXHEAD_V2_1DSB_ADDRESS_BITS63TO32 MW(63:32) +#define NVCB97_TEXHEAD_V2_1DSB_WIDTH_MINUS_ONE MW(95:64) +#define NVCB97_TEXHEAD_V2_1DSB_STRIDE MW(107:96) +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE MW(111:108) +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_UNORM 0x00000000 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_SNORM 0x00000001 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_FLOAT 0x00000002 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_SGNRGB 0x00000003 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_SGNA 0x00000004 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_DSDT 0x00000005 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_UINT 0x00000006 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_SINT 0x00000007 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_ZS 0x00000008 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_SZ 0x00000009 +#define NVCB97_TEXHEAD_V2_1DSB_DATA_TYPE_TEX_DATA_TYPE_ZFS 0x0000000a +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS MW(117:112) +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_INVALID 0x00000000 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_G8R24 0x0000000d +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_G24R8 0x0000000e +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R32 0x0000000f +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_G8R8 0x00000018 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R16 0x0000001b +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R8 0x0000001d +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_G4R4 0x0000001e +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_X8B8G8R8_SRGB 0x00000031 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_A8B8G8R8_SRGB 0x00000032 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_G8R8_SRGB 0x00000033 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZES_1D_R8_SRGB 0x00000034 +#define NVCB97_TEXHEAD_V2_1DSB_COMPONENTS_SIZESV2_CS_BITFIELD_SIZE 0x0000003f +#define NVCB97_TEXHEAD_V2_1DSB_SECTOR_PROMOTION MW(119:118) +#define NVCB97_TEXHEAD_V2_1DSB_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_V2_1DSB_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_V2_1DSB_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_V2_1DSB_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_V2_1DSB_RESERVED3A MW(123:120) +#define NVCB97_TEXHEAD_V2_1DSB_HEADER_VERSION MW(127:124) +#define NVCB97_TEXHEAD_V2_1DSB_HEADER_VERSION_SELECT_PITCH_COLOR_KEY_V2 0x00000001 +#define NVCB97_TEXHEAD_V2_1DSB_HEADER_VERSION_SELECT_PITCH_V2 0x00000002 +#define NVCB97_TEXHEAD_V2_1DSB_HEADER_VERSION_SELECT_BLOCKLINEAR_V2 0x00000003 +#define NVCB97_TEXHEAD_V2_1DSB_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY_V2 0x00000004 +#define NVCB97_TEXHEAD_V2_1DSB_HEADER_VERSION_SELECT_ONE_D_RAW_TYPED 0x00000005 +#define NVCB97_TEXHEAD_V2_1DSB_HEADER_VERSION_SELECT_ONE_D_STRUCT_BUF 0x00000006 +#define NVCB97_TEXHEAD_V2_1DSB_RESERVED4X MW(156:128) +#define NVCB97_TEXHEAD_V2_1DSB_RESERVED4A MW(159:157) +#define NVCB97_TEXHEAD_V2_1DSB_RESERVED5X MW(191:160) +#define NVCB97_TEXHEAD_V2_1DSB_RESERVED6X MW(223:192) +#define NVCB97_TEXHEAD_V2_1DSB_RESERVED7X MW(255:224) + + +/* +** Texture Header V2 Pitch + */ + +#define NVCB97_TEXHEAD_V2_PITCH_RESERVED0A MW(3:0) +#define NVCB97_TEXHEAD_V2_PITCH_RESERVED0X MW(4:4) +#define NVCB97_TEXHEAD_V2_PITCH_ADDRESS_BITS31TO5 MW(31:5) +#define NVCB97_TEXHEAD_V2_PITCH_ADDRESS_BITS56TO32 MW(56:32) +#define NVCB97_TEXHEAD_V2_PITCH_RESERVED1A MW(63:57) +#define NVCB97_TEXHEAD_V2_PITCH_PITCH_BITS21TO5 MW(80:64) +#define NVCB97_TEXHEAD_V2_PITCH_LOD_ANISO_QUALITY2 MW(81:81) +#define NVCB97_TEXHEAD_V2_PITCH_LOD_ANISO_QUALITY MW(82:82) +#define NVCB97_TEXHEAD_V2_PITCH_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_LOD_ISO_QUALITY MW(83:83) +#define NVCB97_TEXHEAD_V2_PITCH_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_MODIFIER MW(85:84) +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_SPREAD_SCALE MW(90:86) +#define NVCB97_TEXHEAD_V2_PITCH_DEPTH_TEXTURE MW(91:91) +#define NVCB97_TEXHEAD_V2_PITCH_MAX_MIP_LEVEL MW(95:92) +#define NVCB97_TEXHEAD_V2_PITCH_X_SOURCE MW(98:96) +#define NVCB97_TEXHEAD_V2_PITCH_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCH_Y_SOURCE MW(101:99) +#define NVCB97_TEXHEAD_V2_PITCH_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCH_Z_SOURCE MW(104:102) +#define NVCB97_TEXHEAD_V2_PITCH_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCH_W_SOURCE MW(107:105) +#define NVCB97_TEXHEAD_V2_PITCH_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE MW(111:108) +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_UNORM 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_SNORM 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_FLOAT 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_SGNRGB 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_SGNA 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_DSDT 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_UINT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_SINT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_ZS 0x00000008 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_SZ 0x00000009 +#define NVCB97_TEXHEAD_V2_PITCH_DATA_TYPE_TEX_DATA_TYPE_ZFS 0x0000000a +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS MW(118:112) +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R32 0x0000000f +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R16 0x0000001b +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R8 0x0000001d +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_R1 0x0000001f +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_EAC 0x00000019 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_Z16 0x0000003a +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVCB97_TEXHEAD_V2_PITCH_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVCB97_TEXHEAD_V2_PITCH_PACK_COMPONENTS MW(119:119) +#define NVCB97_TEXHEAD_V2_PITCH_RESERVED3A MW(123:120) +#define NVCB97_TEXHEAD_V2_PITCH_HEADER_VERSION MW(127:124) +#define NVCB97_TEXHEAD_V2_PITCH_HEADER_VERSION_SELECT_PITCH_COLOR_KEY_V2 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_HEADER_VERSION_SELECT_PITCH_V2 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_HEADER_VERSION_SELECT_BLOCKLINEAR_V2 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY_V2 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_HEADER_VERSION_SELECT_ONE_D_RAW_TYPED 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_HEADER_VERSION_SELECT_ONE_D_STRUCT_BUF 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_WIDTH_MINUS_ONE MW(144:128) +#define NVCB97_TEXHEAD_V2_PITCH_NORMALIZED_COORDS MW(145:145) +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_SPREAD_MAX_LOG2 MW(148:146) +#define NVCB97_TEXHEAD_V2_PITCH_S_R_G_B_CONVERSION MW(149:149) +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE MW(153:150) +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVCB97_TEXHEAD_V2_PITCH_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVCB97_TEXHEAD_V2_PITCH_SECTOR_PROMOTION MW(155:154) +#define NVCB97_TEXHEAD_V2_PITCH_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_BORDER_SOURCE MW(156:156) +#define NVCB97_TEXHEAD_V2_PITCH_BORDER_SOURCE_BORDER_TEXTURE 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_BORDER_SOURCE_BORDER_COLOR 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_RESERVED4A MW(159:157) +#define NVCB97_TEXHEAD_V2_PITCH_HEIGHT_MINUS_ONE MW(176:160) +#define NVCB97_TEXHEAD_V2_PITCH_RESERVED5Y MW(191:177) +#define NVCB97_TEXHEAD_V2_PITCH_RESERVED6Y MW(192:192) +#define NVCB97_TEXHEAD_V2_PITCH_TRILIN_OPT MW(197:193) +#define NVCB97_TEXHEAD_V2_PITCH_MIP_LOD_BIAS MW(210:198) +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_BIAS MW(214:211) +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_MAX_ANISOTROPY MW(221:219) +#define NVCB97_TEXHEAD_V2_PITCH_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_RES_VIEW_MIN_MIP_LEVEL MW(227:224) +#define NVCB97_TEXHEAD_V2_PITCH_RES_VIEW_MAX_MIP_LEVEL MW(231:228) +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT MW(235:232) +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_1X1 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_2X1 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_2X2 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2_D3D 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_2X1_D3D 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_4X4 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_2X2_VC_4 0x00000008 +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_2X2_VC_12 0x00000009 +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2_VC_8 0x0000000a +#define NVCB97_TEXHEAD_V2_PITCH_MULTI_SAMPLE_COUNT_MODE_4X2_VC_24 0x0000000b +#define NVCB97_TEXHEAD_V2_PITCH_MIN_LOD_CLAMP MW(247:236) +#define NVCB97_TEXHEAD_V2_PITCH_RESERVED7Y MW(255:248) + + +/* +** Texture Header V2 Pitch Color Key + */ + +#define NVCB97_TEXHEAD_V2_PITCHCK_RESERVED0A MW(3:0) +#define NVCB97_TEXHEAD_V2_PITCHCK_RESERVED0X MW(4:4) +#define NVCB97_TEXHEAD_V2_PITCHCK_ADDRESS_BITS31TO5 MW(31:5) +#define NVCB97_TEXHEAD_V2_PITCHCK_ADDRESS_BITS56TO32 MW(56:32) +#define NVCB97_TEXHEAD_V2_PITCHCK_RESERVED1A MW(63:57) +#define NVCB97_TEXHEAD_V2_PITCHCK_PITCH_BITS21TO5 MW(80:64) +#define NVCB97_TEXHEAD_V2_PITCHCK_LOD_ANISO_QUALITY2 MW(81:81) +#define NVCB97_TEXHEAD_V2_PITCHCK_LOD_ANISO_QUALITY MW(82:82) +#define NVCB97_TEXHEAD_V2_PITCHCK_LOD_ANISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_LOD_ANISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_LOD_ISO_QUALITY MW(83:83) +#define NVCB97_TEXHEAD_V2_PITCHCK_LOD_ISO_QUALITY_LOD_QUALITY_LOW 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_LOD_ISO_QUALITY_LOD_QUALITY_HIGH 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER MW(85:84) +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_SPREAD_SCALE MW(90:86) +#define NVCB97_TEXHEAD_V2_PITCHCK_DEPTH_TEXTURE MW(91:91) +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_MIP_LEVEL MW(95:92) +#define NVCB97_TEXHEAD_V2_PITCHCK_X_SOURCE MW(98:96) +#define NVCB97_TEXHEAD_V2_PITCHCK_X_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_X_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_X_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_X_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCHCK_X_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCHCK_X_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCHCK_X_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCHCK_Y_SOURCE MW(101:99) +#define NVCB97_TEXHEAD_V2_PITCHCK_Y_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_Y_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_Y_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_Y_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCHCK_Y_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCHCK_Y_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCHCK_Y_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCHCK_Z_SOURCE MW(104:102) +#define NVCB97_TEXHEAD_V2_PITCHCK_Z_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_Z_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_Z_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_Z_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCHCK_Z_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCHCK_Z_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCHCK_Z_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCHCK_W_SOURCE MW(107:105) +#define NVCB97_TEXHEAD_V2_PITCHCK_W_SOURCE_IN_ZERO 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_W_SOURCE_IN_R 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_W_SOURCE_IN_G 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_W_SOURCE_IN_B 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCHCK_W_SOURCE_IN_A 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCHCK_W_SOURCE_IN_ONE_INT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCHCK_W_SOURCE_IN_ONE_FLOAT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE MW(111:108) +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_UNORM 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_SNORM 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_FLOAT 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_SGNRGB 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_SGNA 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_DSDT 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_UINT 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_SINT 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_ZS 0x00000008 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_SZ 0x00000009 +#define NVCB97_TEXHEAD_V2_PITCHCK_DATA_TYPE_TEX_DATA_TYPE_ZFS 0x0000000a +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS MW(118:112) +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_INVALID 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R32_G32_B32_A32 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R32_G32_B32 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R16_G16_B16_A16 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R32_G32 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R32_B24G8 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_X8B8G8R8 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_A8B8G8R8 0x00000008 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_A2B10G10R10 0x00000009 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R16_G16 0x0000000c +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_G8R24 0x0000000d +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_G24R8 0x0000000e +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R32 0x0000000f +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_A4B4G4R4 0x00000012 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_A5B5G5R1 0x00000013 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_A1B5G5R5 0x00000014 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_B5G6R5 0x00000015 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_B6G5R5 0x00000016 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_G8R8 0x00000018 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R16 0x0000001b +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_Y8_VIDEO 0x0000001c +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R8 0x0000001d +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_G4R4 0x0000001e +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_R1 0x0000001f +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_E5B9G9R9_SHAREDEXP 0x00000020 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_BF10GF11RF11 0x00000021 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_G8B8G8R8 0x00000022 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_B8G8R8G8 0x00000023 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_DXT1 0x00000024 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_DXT23 0x00000025 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_DXT45 0x00000026 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_DXN1 0x00000027 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_DXN2 0x00000028 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_BC6H_SF16 0x00000010 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_BC6H_UF16 0x00000011 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_BC7U 0x00000017 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ETC2_RGB 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ETC2_RGB_PTA 0x0000000a +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ETC2_RGBA 0x0000000b +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_EAC 0x00000019 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_EACX2 0x0000001a +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_Z24S8 0x00000029 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_X8Z24 0x0000002a +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_S8Z24 0x0000002b +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ZF32 0x0000002f +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ZF32_X24S8 0x00000030 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_Z16 0x0000003a +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_4X4 0x00000040 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_5X4 0x00000050 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_5X5 0x00000041 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_6X5 0x00000051 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_6X6 0x00000042 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_8X5 0x00000055 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_8X6 0x00000052 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_8X8 0x00000044 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X5 0x00000056 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X6 0x00000057 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X8 0x00000053 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_10X10 0x00000045 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_12X10 0x00000054 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_ASTC_2D_12X12 0x00000046 +#define NVCB97_TEXHEAD_V2_PITCHCK_COMPONENTS_SIZES_CS_BITFIELD_SIZE 0x0000007f +#define NVCB97_TEXHEAD_V2_PITCHCK_PACK_COMPONENTS MW(119:119) +#define NVCB97_TEXHEAD_V2_PITCHCK_RESERVED3A MW(123:120) +#define NVCB97_TEXHEAD_V2_PITCHCK_HEADER_VERSION MW(127:124) +#define NVCB97_TEXHEAD_V2_PITCHCK_HEADER_VERSION_SELECT_PITCH_COLOR_KEY_V2 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_HEADER_VERSION_SELECT_PITCH_V2 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_HEADER_VERSION_SELECT_BLOCKLINEAR_V2 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_HEADER_VERSION_SELECT_BLOCKLINEAR_COLOR_KEY_V2 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCHCK_HEADER_VERSION_SELECT_ONE_D_RAW_TYPED 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCHCK_HEADER_VERSION_SELECT_ONE_D_STRUCT_BUF 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCHCK_WIDTH_MINUS_ONE MW(144:128) +#define NVCB97_TEXHEAD_V2_PITCHCK_NORMALIZED_COORDS MW(145:145) +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_SPREAD_MAX_LOG2 MW(148:146) +#define NVCB97_TEXHEAD_V2_PITCHCK_S_R_G_B_CONVERSION MW(149:149) +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE MW(153:150) +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_ONE_D 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_TWO_D 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_THREE_D 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_CUBEMAP 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_ONE_D_ARRAY 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_TWO_D_ARRAY 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_ONE_D_BUFFER 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_TWO_D_NO_MIPMAP 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_CUBEMAP_ARRAY 0x00000008 +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_HTEX_TWOD 0x0000000a +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_HTEX_THREE_D 0x0000000b +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_HTEX_TWOD_ARRAY 0x0000000e +#define NVCB97_TEXHEAD_V2_PITCHCK_TEXTURE_TYPE_TT_BIT_FIELD_SIZE 0x0000000f +#define NVCB97_TEXHEAD_V2_PITCHCK_SECTOR_PROMOTION MW(155:154) +#define NVCB97_TEXHEAD_V2_PITCHCK_SECTOR_PROMOTION_NO_PROMOTION 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_SECTOR_PROMOTION_PROMOTE_TO_2_V 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_SECTOR_PROMOTION_PROMOTE_TO_2_H 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_SECTOR_PROMOTION_PROMOTE_TO_4 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_BORDER_SOURCE MW(156:156) +#define NVCB97_TEXHEAD_V2_PITCHCK_BORDER_SOURCE_BORDER_TEXTURE 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_BORDER_SOURCE_BORDER_COLOR 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_RESERVED4A MW(159:157) +#define NVCB97_TEXHEAD_V2_PITCHCK_HEIGHT_MINUS_ONE MW(176:160) +#define NVCB97_TEXHEAD_V2_PITCHCK_RESERVED5Y MW(191:177) +#define NVCB97_TEXHEAD_V2_PITCHCK_COLOR_KEY_OP MW(192:192) +#define NVCB97_TEXHEAD_V2_PITCHCK_TRILIN_OPT MW(197:193) +#define NVCB97_TEXHEAD_V2_PITCHCK_MIP_LOD_BIAS MW(210:198) +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_BIAS MW(214:211) +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_FUNC MW(216:215) +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_FUNC MW(218:217) +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_HALF 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_COARSE_SPREAD_FUNC_SPREAD_FUNC_MAX 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_ANISOTROPY MW(221:219) +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVCB97_TEXHEAD_V2_PITCHCK_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_MODIFIER MW(223:222) +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_NONE 0x00000000 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_ONE 0x00000001 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_CONST_TWO 0x00000002 +#define NVCB97_TEXHEAD_V2_PITCHCK_ANISO_FINE_SPREAD_MODIFIER_SPREAD_MODIFIER_SQRT 0x00000003 +#define NVCB97_TEXHEAD_V2_PITCHCK_COLOR_KEY_VALUE MW(255:224) + + +/* +** Texture Sampler State + */ + +#define NVCB97_TEXSAMP0_ADDRESS_U 2:0 +#define NVCB97_TEXSAMP0_ADDRESS_U_WRAP 0x00000000 +#define NVCB97_TEXSAMP0_ADDRESS_U_MIRROR 0x00000001 +#define NVCB97_TEXSAMP0_ADDRESS_U_CLAMP_TO_EDGE 0x00000002 +#define NVCB97_TEXSAMP0_ADDRESS_U_BORDER 0x00000003 +#define NVCB97_TEXSAMP0_ADDRESS_U_CLAMP_OGL 0x00000004 +#define NVCB97_TEXSAMP0_ADDRESS_U_MIRROR_ONCE_CLAMP_TO_EDGE 0x00000005 +#define NVCB97_TEXSAMP0_ADDRESS_U_MIRROR_ONCE_BORDER 0x00000006 +#define NVCB97_TEXSAMP0_ADDRESS_U_MIRROR_ONCE_CLAMP_OGL 0x00000007 +#define NVCB97_TEXSAMP0_ADDRESS_V 5:3 +#define NVCB97_TEXSAMP0_ADDRESS_V_WRAP 0x00000000 +#define NVCB97_TEXSAMP0_ADDRESS_V_MIRROR 0x00000001 +#define NVCB97_TEXSAMP0_ADDRESS_V_CLAMP_TO_EDGE 0x00000002 +#define NVCB97_TEXSAMP0_ADDRESS_V_BORDER 0x00000003 +#define NVCB97_TEXSAMP0_ADDRESS_V_CLAMP_OGL 0x00000004 +#define NVCB97_TEXSAMP0_ADDRESS_V_MIRROR_ONCE_CLAMP_TO_EDGE 0x00000005 +#define NVCB97_TEXSAMP0_ADDRESS_V_MIRROR_ONCE_BORDER 0x00000006 +#define NVCB97_TEXSAMP0_ADDRESS_V_MIRROR_ONCE_CLAMP_OGL 0x00000007 +#define NVCB97_TEXSAMP0_ADDRESS_P 8:6 +#define NVCB97_TEXSAMP0_ADDRESS_P_WRAP 0x00000000 +#define NVCB97_TEXSAMP0_ADDRESS_P_MIRROR 0x00000001 +#define NVCB97_TEXSAMP0_ADDRESS_P_CLAMP_TO_EDGE 0x00000002 +#define NVCB97_TEXSAMP0_ADDRESS_P_BORDER 0x00000003 +#define NVCB97_TEXSAMP0_ADDRESS_P_CLAMP_OGL 0x00000004 +#define NVCB97_TEXSAMP0_ADDRESS_P_MIRROR_ONCE_CLAMP_TO_EDGE 0x00000005 +#define NVCB97_TEXSAMP0_ADDRESS_P_MIRROR_ONCE_BORDER 0x00000006 +#define NVCB97_TEXSAMP0_ADDRESS_P_MIRROR_ONCE_CLAMP_OGL 0x00000007 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE 9:9 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE_FUNC 12:10 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_NEVER 0x00000000 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_LESS 0x00000001 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_EQUAL 0x00000002 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_LEQUAL 0x00000003 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_GREATER 0x00000004 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_NOTEQUAL 0x00000005 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_GEQUAL 0x00000006 +#define NVCB97_TEXSAMP0_DEPTH_COMPARE_FUNC_ZC_ALWAYS 0x00000007 +#define NVCB97_TEXSAMP0_S_R_G_B_CONVERSION 13:13 +#define NVCB97_TEXSAMP0_RESERVED0A 16:14 +#define NVCB97_TEXSAMP0_RESERVED0B 19:17 +#define NVCB97_TEXSAMP0_MAX_ANISOTROPY 22:20 +#define NVCB97_TEXSAMP0_MAX_ANISOTROPY_ANISO_1_TO_1 0x00000000 +#define NVCB97_TEXSAMP0_MAX_ANISOTROPY_ANISO_2_TO_1 0x00000001 +#define NVCB97_TEXSAMP0_MAX_ANISOTROPY_ANISO_4_TO_1 0x00000002 +#define NVCB97_TEXSAMP0_MAX_ANISOTROPY_ANISO_6_TO_1 0x00000003 +#define NVCB97_TEXSAMP0_MAX_ANISOTROPY_ANISO_8_TO_1 0x00000004 +#define NVCB97_TEXSAMP0_MAX_ANISOTROPY_ANISO_10_TO_1 0x00000005 +#define NVCB97_TEXSAMP0_MAX_ANISOTROPY_ANISO_12_TO_1 0x00000006 +#define NVCB97_TEXSAMP0_MAX_ANISOTROPY_ANISO_16_TO_1 0x00000007 +#define NVCB97_TEXSAMP0_FORCED_INVALID 31:31 +#define NVCB97_TEXSAMP1_MAG_FILTER 2:0 +#define NVCB97_TEXSAMP1_MAG_FILTER_MAG_POINT 0x00000001 +#define NVCB97_TEXSAMP1_MAG_FILTER_MAG_LINEAR 0x00000002 +#define NVCB97_TEXSAMP1_MAG_FILTER_VCAA_4_TAP 0x00000003 +#define NVCB97_TEXSAMP1_MAG_FILTER_VCAA_8_TAP 0x00000004 +#define NVCB97_TEXSAMP1_MIN_LOD_CLAMP_BEHAVIOR_FOR_NEAREST_MIP 3:3 +#define NVCB97_TEXSAMP1_MIN_LOD_CLAMP_BEHAVIOR_FOR_NEAREST_MIP_INTEGER_AND_FRACTION 0x00000000 +#define NVCB97_TEXSAMP1_MIN_LOD_CLAMP_BEHAVIOR_FOR_NEAREST_MIP_INTEGER_ONLY 0x00000001 +#define NVCB97_TEXSAMP1_MIN_FILTER 5:4 +#define NVCB97_TEXSAMP1_MIN_FILTER_MIN_POINT 0x00000001 +#define NVCB97_TEXSAMP1_MIN_FILTER_MIN_LINEAR 0x00000002 +#define NVCB97_TEXSAMP1_MIN_FILTER_MIN_ANISO 0x00000003 +#define NVCB97_TEXSAMP1_MIP_FILTER 7:6 +#define NVCB97_TEXSAMP1_MIP_FILTER_MIP_NONE 0x00000001 +#define NVCB97_TEXSAMP1_MIP_FILTER_MIP_POINT 0x00000002 +#define NVCB97_TEXSAMP1_MIP_FILTER_MIP_LINEAR 0x00000003 +#define NVCB97_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING 9:8 +#define NVCB97_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING_USE_WRAP 0x00000000 +#define NVCB97_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING_OVERRIDE_WRAP 0x00000001 +#define NVCB97_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING_AUTO_SPAN_SEAM 0x00000002 +#define NVCB97_TEXSAMP1_CUBEMAP_INTERFACE_FILTERING_AUTO_CROSS_SEAM 0x00000003 +#define NVCB97_TEXSAMP1_REDUCTION_FILTER 11:10 +#define NVCB97_TEXSAMP1_REDUCTION_FILTER_RED_NONE 0x00000000 +#define NVCB97_TEXSAMP1_REDUCTION_FILTER_RED_MINIMUM 0x00000001 +#define NVCB97_TEXSAMP1_REDUCTION_FILTER_RED_MAXIMUM 0x00000002 +#define NVCB97_TEXSAMP1_MIP_LOD_BIAS 24:12 +#define NVCB97_TEXSAMP1_FLOAT_COORD_NORMALIZATION 25:25 +#define NVCB97_TEXSAMP1_FLOAT_COORD_NORMALIZATION_USE_HEADER_SETTING 0x00000000 +#define NVCB97_TEXSAMP1_FLOAT_COORD_NORMALIZATION_FORCE_UNNORMALIZED_COORDS 0x00000001 +#define NVCB97_TEXSAMP1_TRILIN_OPT 30:26 +#define NVCB97_TEXSAMP2_MIN_LOD_CLAMP 11:0 +#define NVCB97_TEXSAMP2_MAX_LOD_CLAMP 23:12 +#define NVCB97_TEXSAMP2_S_R_G_B_BORDER_COLOR_R 31:24 +#define NVCB97_TEXSAMP3_RESERVED12 11:0 +#define NVCB97_TEXSAMP3_S_R_G_B_BORDER_COLOR_G 19:12 +#define NVCB97_TEXSAMP3_S_R_G_B_BORDER_COLOR_B 27:20 +#define NVCB97_TEXSAMP4_BORDER_COLOR_R 31:0 +#define NVCB97_TEXSAMP5_BORDER_COLOR_G 31:0 +#define NVCB97_TEXSAMP6_BORDER_COLOR_B 31:0 +#define NVCB97_TEXSAMP7_BORDER_COLOR_A 31:0 + + + +#endif // #ifndef __CLCB97TEX_H__ diff --git a/userspace/sdks/nv570/inc/class/clcba2.h b/userspace/sdks/nv570/inc/class/clcba2.h new file mode 100644 index 0000000..1917abf --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcba2.h @@ -0,0 +1,159 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "nvtypes.h" + +#ifndef _clcba2_h_ +#define _clcba2_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define HOPPER_SEC2_WORK_LAUNCH_A (0x0000CBA2) + +typedef volatile struct _clcba2_tag0 { + NvV32 Reserved00[0x100]; + NvV32 DecryptCopySrcAddrHi; // 0x00000400 - 0x00000403 + NvV32 DecryptCopySrcAddrLo; // 0x00000404 - 0x00000407 + NvV32 DecryptCopyDstAddrHi; // 0x00000408 - 0x0000040B + NvV32 DecryptCopyDstAddrLo; // 0x0000040c - 0x0000040F + NvU32 DecryptCopySize; // 0x00000410 - 0x00000413 + NvU32 DecryptCopyAuthTagAddrHi; // 0x00000414 - 0x00000417 + NvU32 DecryptCopyAuthTagAddrLo; // 0x00000418 - 0x0000041B + NvV32 DigestAddrHi; // 0x0000041C - 0x0000041F + NvV32 DigestAddrLo; // 0x00000420 - 0x00000423 + NvV32 Reserved01[0x7]; + NvV32 SemaphoreA; // 0x00000440 - 0x00000443 + NvV32 SemaphoreB; // 0x00000444 - 0x00000447 + NvV32 SemaphoreSetPayloadLower; // 0x00000448 - 0x0000044B + NvV32 SemaphoreSetPayloadUppper; // 0x0000044C - 0x0000044F + NvV32 SemaphoreD; // 0x00000450 - 0x00000453 + NvU32 Reserved02[0x7]; + NvV32 Execute; // 0x00000470 - 0x00000473 + NvV32 Reserved03[0x23]; +} NVCBA2_HOPPER_SEC2_WORK_LAUNCH_AControlPio; + +#define NVCBA2_DECRYPT_COPY_SRC_ADDR_HI (0x00000400) +#define NVCBA2_DECRYPT_COPY_SRC_ADDR_HI_DATA 24:0 +#define NVCBA2_DECRYPT_COPY_SRC_ADDR_LO (0x00000404) +#define NVCBA2_DECRYPT_COPY_SRC_ADDR_LO_DATA 31:4 +#define NVCBA2_DECRYPT_COPY_DST_ADDR_HI (0x00000408) +#define NVCBA2_DECRYPT_COPY_DST_ADDR_HI_DATA 24:0 +#define NVCBA2_DECRYPT_COPY_DST_ADDR_LO (0x0000040c) +#define NVCBA2_DECRYPT_COPY_DST_ADDR_LO_DATA 31:4 +#define NVCBA2_DECRYPT_COPY_SIZE (0x00000410) +#define NVCBA2_DECRYPT_COPY_SIZE_DATA 31:2 +#define NVCBA2_DECRYPT_COPY_AUTH_TAG_ADDR_HI (0x00000414) +#define NVCBA2_DECRYPT_COPY_AUTH_TAG_ADDR_HI_DATA 24:0 +#define NVCBA2_DECRYPT_COPY_AUTH_TAG_ADDR_LO (0x00000418) +#define NVCBA2_DECRYPT_COPY_AUTH_TAG_ADDR_LO_DATA 31:4 +#define NVCBA2_METHOD_STREAM_AUTH_TAG_ADDR_HI (0x0000041C) +#define NVCBA2_METHOD_STREAM_AUTH_TAG_ADDR_HI_DATA 24:0 +#define NVCBA2_METHOD_STREAM_AUTH_TAG_ADDR_LO (0x00000420) +#define NVCBA2_METHOD_STREAM_AUTH_TAG_ADDR_LO_DATA 31:4 +#define NVCBA2_SEMAPHORE_A (0x00000440) +#define NVCBA2_SEMAPHORE_A_UPPER 24:0 +#define NVCBA2_SEMAPHORE_B (0x00000444) +#define NVCBA2_SEMAPHORE_B_LOWER 31:2 +#define NVCBA2_SET_SEMAPHORE_PAYLOAD_LOWER (0x00000448) +#define NVCBA2_SET_SEMAPHORE_PAYLOAD_LOWER_DATA 31:0 +#define NVCBA2_SET_SEMAPHORE_PAYLOAD_UPPER (0x0000044C) +#define NVCBA2_SET_SEMAPHORE_PAYLOAD_UPPER_DATA 31:0 +#define NVCBA2_SEMAPHORE_D (0x00000450) +#define NVCBA2_SEMAPHORE_D_NOTIFY_INTR 0:0 +#define NVCBA2_SEMAPHORE_D_NOTIFY_INTR_DISABLE (0x00000000) +#define NVCBA2_SEMAPHORE_D_NOTIFY_INTR_ENABLE (0x00000001) +#define NVCBA2_SEMAPHORE_D_PAYLOAD_SIZE 1:1 +#define NVCBA2_SEMAPHORE_D_PAYLOAD_SIZE_32_BIT (0x00000000) +#define NVCBA2_SEMAPHORE_D_PAYLOAD_SIZE_64_BIT (0x00000001) +#define NVCBA2_SEMAPHORE_D_TIMESTAMP 2:2 +#define NVCBA2_SEMAPHORE_D_TIMESTAMP_DISABLE (0x00000000) +#define NVCBA2_SEMAPHORE_D_TIMESTAMP_ENABLE (0x00000001) +#define NVCBA2_SEMAPHORE_D_FLUSH_DISABLE 3:3 +#define NVCBA2_SEMAPHORE_D_FLUSH_DISABLE_FALSE (0x00000000) +#define NVCBA2_SEMAPHORE_D_FLUSH_DISABLE_TRUE (0x00000001) +#define NVCBA2_EXECUTE (0x00000470) +#define NVCBA2_EXECUTE_NOTIFY 0:0 +#define NVCBA2_EXECUTE_NOTIFY_DISABLE (0x00000000) +#define NVCBA2_EXECUTE_NOTIFY_ENABLE (0x00000001) +#define NVCBA2_EXECUTE_NOTIFY_ON 1:1 +#define NVCBA2_EXECUTE_NOTIFY_ON_END (0x00000000) +#define NVCBA2_EXECUTE_NOTIFY_ON_BEGIN (0x00000001) +#define NVCBA2_EXECUTE_FLUSH_DISABLE 2:2 +#define NVCBA2_EXECUTE_FLUSH_DISABLE_FALSE (0x00000000) +#define NVCBA2_EXECUTE_FLUSH_DISABLE_TRUE (0x00000001) +#define NVCBA2_EXECUTE_NOTIFY_INTR 3:3 +#define NVCBA2_EXECUTE_NOTIFY_INTR_DISABLE (0x00000000) +#define NVCBA2_EXECUTE_NOTIFY_INTR_ENABLE (0x00000001) +#define NVCBA2_EXECUTE_PAYLOAD_SIZE 4:4 +#define NVCBA2_EXECUTE_PAYLOAD_SIZE_32_BIT (0x00000000) +#define NVCBA2_EXECUTE_PAYLOAD_SIZE_64_BIT (0x00000001) +#define NVCBA2_EXECUTE_TIMESTAMP 5:5 +#define NVCBA2_EXECUTE_TIMESTAMP_DISABLE (0x00000000) +#define NVCBA2_EXECUTE_TIMESTAMP_ENABLE (0x00000001) +#define NVCBA2_EXECUTE_PHYSICAL_SCRUBBER 6:6 +#define NVCBA2_EXECUTE_PHYSICAL_SCRUBBER_DISABLE (0x00000000) +#define NVCBA2_EXECUTE_PHYSICAL_SCRUBBER_ENABLE (0x00000001) + +// Class definitions +#define NVCBA2_DECRYPT_COPY_SIZE_MAX_BYTES (2*1024*1024) +#define NVCBA2_DECRYPT_SCRUB_SIZE_MAX_BYTES (1024*1024*1024) + +// Errors +#define NVCBA2_ERROR_NONE (0x00000000) +#define NVCBA2_ERROR_DECRYPT_COPY_SRC_ADDR_MISALIGNED_POINTER (0x00000001) +#define NVCBA2_ERROR_DECRYPT_COPY_DEST_ADDR_MISALIGNED_POINTER (0x00000002) +#define NVCBA2_ERROR_DECRYPT_COPY_AUTH_TAG_ADDR_MISALIGNED_POINTER (0x00000003) +#define NVCBA2_ERROR_DECRYPT_COPY_DMA_NACK (0x00000004) +#define NVCBA2_ERROR_DECRYPT_COPY_AUTH_TAG_MISMATCH (0x00000005) +#define NVCBA2_ERROR_METHOD_STREAM_AUTH_TAG_ADDR_MISALIGNED_POINTER (0x00000006) +#define NVCBA2_ERROR_METHOD_STREAM_AUTH_TAG_ADDR_DMA_NACK (0x00000007) +#define NVCBA2_ERROR_METHOD_STREAM_AUTH_TAG_CHECK_FAILURE (0x00000008) +#define NVCBA2_ERROR_MISALIGNED_SIZE (0x00000009) +#define NVCBA2_ERROR_MISSING_METHODS (0x0000000A) +#define NVCBA2_ERROR_SEMAPHORE_RELEASE_DMA_NACK (0x0000000B) +#define NVCBA2_ERROR_DECRYPT_SIZE_MAX_EXCEEDED (0x0000000C) +#define NVCBA2_ERROR_OS_APPLICATION (0x0000000D) +#define NVCBA2_ERROR_INVALID_CTXSW_REQUEST (0x0000000E) +#define NVCBA2_ERROR_BUFFER_OVERFLOW (0x0000000F) +#define NVCBA2_ERROR_IV_OVERFLOW (0x00000010) +#define NVCBA2_ERROR_INTERNAL_SETUP_FAILURE (0x00000011) +#define NVCBA2_ERROR_DECRYPT_COPY_INTERNAL_DMA_FAILURE (0x00000012) +#define NVCBA2_ERROR_METHOD_STREAM_AUTH_TAG_ADDR_INTERNAL_DMA_FAILURE (0x00000013) +#define NVCBA2_ERROR_METHOD_STREAM_AUTH_TAG_HMAC_CALC_FAILURE (0x00000014) +#define NVCBA2_ERROR_NONCE_OVERFLOW (0x00000015) +#define NVCBA2_ERROR_AES_GCM_DECRYPTION_FAILURE (0x00000016) +#define NVCBA2_ERROR_SEMAPHORE_RELEASE_INTERNAL_DMA_FAILURE (0x00000017) +#define NVCBA2_ERROR_KEY_DERIVATION_FAILURE (0x00000018) +#define NVCBA2_ERROR_SCRUBBER_FAILURE (0x00000019) +#define NVCBA2_ERROR_SCRUBBER_INVALD_ADDRESS (0x0000001a) +#define NVCBA2_ERROR_SCRUBBER_INSUFFICIENT_PERMISSIONS (0x0000001b) +#define NVCBA2_ERROR_SCRUBBER_MUTEX_ACQUIRE_FAILURE (0x0000001c) +#define NVCBA2_ERROR_SCRUB_SIZE_MAX_EXCEEDED (0x0000001d) +#define NVCBA2_ERROR_SIZE_ZERO (0x0000001e) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clcba2_h diff --git a/userspace/sdks/nv570/inc/class/clcbc0.h b/userspace/sdks/nv570/inc/class/clcbc0.h new file mode 100644 index 0000000..bed5e94 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcbc0.h @@ -0,0 +1,27 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gh100_clcbc0_h__ +#define __gh100_clcbc0_h__ +#define HOPPER_COMPUTE_A 0xCBC0 +#endif // __gh100_clcbc0_h__ diff --git a/userspace/sdks/nv570/inc/class/clcbca.h b/userspace/sdks/nv570/inc/class/clcbca.h new file mode 100644 index 0000000..4570cc9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcbca.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _CLCBCA_H_ +#define _CLCBCA_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "nvtypes.h" + +#define NV_COUNTER_COLLECTION_UNIT (0x0000CBCA) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _CLCBCA_H_ diff --git a/userspace/sdks/nv570/inc/class/clcc70.h b/userspace/sdks/nv570/inc/class/clcc70.h new file mode 100644 index 0000000..79aeafc --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcc70.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2024, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clcc70.finn +// + +#define NVCC70_DISPLAY (0xcc70U) /* finn: Evaluated from "NVCC70_ALLOCATION_PARAMETERS_MESSAGE_ID" */ + +#define NVCC70_ALLOCATION_PARAMETERS_MESSAGE_ID (0xcc70U) + +typedef struct NVCC70_ALLOCATION_PARAMETERS { + NvU32 numHeads; // Number of HEADs in this chip/display + NvU32 numSors; // Number of SORs in this chip/display + NvU32 numDsis; // Number of DSIs in this chip/display +} NVCC70_ALLOCATION_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clcc71.h b/userspace/sdks/nv570/inc/class/clcc71.h new file mode 100644 index 0000000..0520145 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcc71.h @@ -0,0 +1,186 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2015-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcc71_h_ +#define _clcc71_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCC71_DISP_SF_USER (0x000CC71) + +typedef volatile struct _clcc71_tag0 { + NvU32 dispSfUserOffset[0x400]; /* NV_PDISP_SF_USER 0x000D0FFF:0x000D0000 */ +} _NvCC71DispSfUser, NvCC71DispSfUserMap; + +#define NVCC71_SF_HDMI_INFO_CTRL(i,j) (0x000E0000-0x000E0000+(i)*1024+(j)*64) /* RW-4A */ +#define NVCC71_SF_HDMI_INFO_CTRL__SIZE_1 8 /* */ +#define NVCC71_SF_HDMI_INFO_CTRL__SIZE_2 3 /* */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL(i) (0x000E0000-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_DIS 0x00000000 /* RW--V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL_ENABLE_EN 0x00000001 /* RW--V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW 9:9 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_ENABLE 0x00000001 /* RW--V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_DISABLE 0x00000000 /* RW--V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_CTRL_CHKSUM_HW_INIT 0x00000001 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_STATUS(i) (0x000E0004-0x000E0000+(i)*1024) /* R--4A */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_STATUS__SIZE_1 8 /* */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT 0:0 /* R-IVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_DONE 0x00000001 /* R---V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_WAITING 0x00000000 /* R---V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_STATUS_SENT_INIT 0x00000000 /* R-I-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_HEADER(i) (0x000E0008-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_HEADER__SIZE_1 8 /* */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_HEADER_HB0 7:0 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_HEADER_HB0_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_HEADER_HB1 15:8 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_HEADER_HB1_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_HEADER_HB2 23:16 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_HEADER_HB2_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW(i) (0x000E000C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW__SIZE_1 8 /* */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0 7:0 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB0_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1 15:8 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB1_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2 23:16 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB2_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3 31:24 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_PB3_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH(i) (0x000E0010-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH__SIZE_1 8 /* */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4 7:0 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB4_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5 15:8 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB5_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6 23:16 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_PB6_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW(i) (0x000E0014-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW__SIZE_1 8 /* */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7 7:0 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB7_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8 15:8 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB8_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9 23:16 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB9_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10 31:24 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_PB10_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH(i) (0x000E0018-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH__SIZE_1 8 /* */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11 7:0 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB11_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12 15:8 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB12_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13 23:16 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_PB13_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW(i) (0x000E001C-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW__SIZE_1 8 /* */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14 7:0 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB14_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15 15:8 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB15_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16 23:16 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB16_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17 31:24 /* RWIVF */ +#define NVCC71_SF_HDMI_AVI_INFOFRAME_SUBPACK2_LOW_PB17_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL(i,j) (0x000E0130-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL__SIZE_1 8 /* */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL__SIZE_2 10 /* */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_ENABLE 0:0 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_ENABLE_NO 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_ENABLE_YES 0x00000001 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE 3:1 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ALWAYS 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_ONCE 0x00000001 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ALWAYS 0x00000002 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_ONCE 0x00000003 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_RUN_MODE_FID_TRIGGER 0x00000004 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_LOC 5:4 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_LOC_VBLANK 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_LOC_VSYNC 0x00000001 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_LOC_LINE 0x00000002 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_OFFSET 10:6 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_SIZE 18:14 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_SIZE_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_BUSY 22:22 /* R-IVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_BUSY_NO 0x00000000 /* R-I-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_BUSY_YES 0x00000001 /* R---V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_SENT 23:23 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_SENT_NO 0x00000000 /* R-I-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_SENT_YES 0x00000001 /* R---V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CTRL_SENT_CLEAR 0x00000001 /* -W--C */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG(i,j) (0x000E0134-0x000E0000+(i)*1024+(j)*8) /* RW-4A */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG__SIZE_1 8 /* */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG__SIZE_2 10 /* */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_FID 7:0 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_FID_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID 23:8 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED 24:24 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_NO 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_LINE_ID_REVERSED_YES 0x00000001 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN 25:25 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_NO 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_AS_SDP_OVERRIDE_EN_YES 0x00000001 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM 29:29 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_NO 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_HW_CHECKSUM_YES 0x00000001 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_NEW 30:30 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_NEW_INIT 0x00000000 /* R-I-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_NEW_DONE 0x00000000 /* R---V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_NEW_PENDING 0x00000001 /* R---T */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_NEW_TRIGGER 0x00000001 /* -W--T */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL 31:31 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ACT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_CONFIG_MTD_STATE_CTRL_ARM 0x00000001 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_CTRL(i) (0x000E03F0-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_CTRL__SIZE_1 8 /* */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET 4:0 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_CTRL_OFFSET_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA(i) (0x000E03F4-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA__SIZE_1 8 /* */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_BYTE0 7:0 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_BYTE0_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_BYTE1 15:8 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_BYTE1_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_BYTE2 23:16 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_BYTE2_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_BYTE3 31:24 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_DATA_BYTE3_INIT 0x00000000 /* RWI-V */ +#define NVCC71_SF_GENERIC_INFOFRAME_MISC_CTRL(i) (0x000E03F8-0x000E0000+(i)*1024) /* RW-4A */ +#define NVCC71_SF_GENERIC_INFOFRAME_MISC_CTRL__SIZE_1 8 /* */ +#define NVCC71_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY 1:1 /* RWIVF */ +#define NVCC71_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_HIGH 0x00000000 /* RW--V */ +#define NVCC71_SF_GENERIC_INFOFRAME_MISC_CTRL_AUDIO_PRIORITY_LOW 0x00000001 /* RWI-V */ + +#ifdef __cplusplus +}; /* extern "C" */ +#endif + +#endif // _clcc71_h_ diff --git a/userspace/sdks/nv570/inc/class/clcc73.h b/userspace/sdks/nv570/inc/class/clcc73.h new file mode 100644 index 0000000..306ae29 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcc73.h @@ -0,0 +1,915 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcc73_h_ +#define _clcc73_h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCC73_DISP_CAPABILITIES 0xCC73 + +typedef volatile struct _clcc73_tag0 { + NvU32 dispCapabilities[0x400]; +} _NvCC73DispCapabilities,NvCC73DispCapabilities_Map ; + + +#define NVCC73_SYS_CAP 0x0 /* RW-4R */ +#define NVCC73_SYS_CAP_HEAD0_EXISTS 0:0 /* RWIVF */ +#define NVCC73_SYS_CAP_HEAD0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD1_EXISTS 1:1 /* RWIVF */ +#define NVCC73_SYS_CAP_HEAD1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD2_EXISTS 2:2 /* RWIVF */ +#define NVCC73_SYS_CAP_HEAD2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD3_EXISTS 3:3 /* RWIVF */ +#define NVCC73_SYS_CAP_HEAD3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD4_EXISTS 4:4 /* RWIVF */ +#define NVCC73_SYS_CAP_HEAD4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD5_EXISTS 5:5 /* RWIVF */ +#define NVCC73_SYS_CAP_HEAD5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD6_EXISTS 6:6 /* RWIVF */ +#define NVCC73_SYS_CAP_HEAD6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD7_EXISTS 7:7 /* RWIVF */ +#define NVCC73_SYS_CAP_HEAD7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCC73_SYS_CAP_HEAD_EXISTS__SIZE_1 8 /* */ +#define NVCC73_SYS_CAP_HEAD_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_HEAD_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_SOR0_EXISTS 8:8 /* RWIVF */ +#define NVCC73_SYS_CAP_SOR0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_SOR0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_SOR1_EXISTS 9:9 /* RWIVF */ +#define NVCC73_SYS_CAP_SOR1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_SOR1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_SOR2_EXISTS 10:10 /* RWIVF */ +#define NVCC73_SYS_CAP_SOR2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_SOR2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_SOR3_EXISTS 11:11 /* RWIVF */ +#define NVCC73_SYS_CAP_SOR3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_SOR3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_SOR4_EXISTS 12:12 /* RWIVF */ +#define NVCC73_SYS_CAP_SOR4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_SOR4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_SOR5_EXISTS 13:13 /* RWIVF */ +#define NVCC73_SYS_CAP_SOR5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_SOR5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_SOR6_EXISTS 14:14 /* RWIVF */ +#define NVCC73_SYS_CAP_SOR6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_SOR6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_SOR7_EXISTS 15:15 /* RWIVF */ +#define NVCC73_SYS_CAP_SOR7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_SOR7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_SOR_EXISTS(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVCC73_SYS_CAP_SOR_EXISTS__SIZE_1 8 /* */ +#define NVCC73_SYS_CAP_SOR_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_SOR_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_RISCV0_EXISTS 16:16 /* RWIVF */ +#define NVCC73_SYS_CAP_RISCV0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_RISCV0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_DSI0_EXISTS 20:20 /* RWIVF */ +#define NVCC73_SYS_CAP_DSI0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_DSI0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_DSI1_EXISTS 21:21 /* RWIVF */ +#define NVCC73_SYS_CAP_DSI1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_DSI1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_DSI2_EXISTS 22:22 /* RWIVF */ +#define NVCC73_SYS_CAP_DSI2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_DSI2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_DSI3_EXISTS 23:23 /* RWIVF */ +#define NVCC73_SYS_CAP_DSI3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_DSI3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAP_DSI_EXISTS(i) (20+(i)):(20+(i)) /* RWIVF */ +#define NVCC73_SYS_CAP_DSI_EXISTS__SIZE_1 4 /* */ +#define NVCC73_SYS_CAP_DSI_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAP_DSI_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB 0x4 /* RW-4R */ +#define NVCC73_SYS_CAPB_WINDOW0_EXISTS 0:0 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW1_EXISTS 1:1 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW2_EXISTS 2:2 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW3_EXISTS 3:3 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW4_EXISTS 4:4 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW5_EXISTS 5:5 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW6_EXISTS 6:6 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW7_EXISTS 7:7 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW8_EXISTS 8:8 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW9_EXISTS 9:9 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW10_EXISTS 10:10 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW11_EXISTS 11:11 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW12_EXISTS 12:12 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW13_EXISTS 13:13 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW14_EXISTS 14:14 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW15_EXISTS 15:15 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW16_EXISTS 16:16 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW17_EXISTS 17:17 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW18_EXISTS 18:18 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW19_EXISTS 19:19 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW20_EXISTS 20:20 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW21_EXISTS 21:21 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW22_EXISTS 22:22 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW23_EXISTS 23:23 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW24_EXISTS 24:24 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW25_EXISTS 25:25 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW26_EXISTS 26:26 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW27_EXISTS 27:27 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW28_EXISTS 28:28 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW29_EXISTS 29:29 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW30_EXISTS 30:30 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW31_EXISTS 31:31 /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCC73_SYS_CAPB_WINDOW_EXISTS__SIZE_1 32 /* */ +#define NVCC73_SYS_CAPB_WINDOW_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPB_WINDOW_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC 0x20 /* RW-4R */ +#define NVCC73_SYS_CAPC_TILE0_EXISTS 0:0 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE1_EXISTS 1:1 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE2_EXISTS 2:2 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE3_EXISTS 3:3 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE4_EXISTS 4:4 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE5_EXISTS 5:5 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE6_EXISTS 6:6 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE7_EXISTS 7:7 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE_EXISTS__SIZE_1 8 /* */ +#define NVCC73_SYS_CAPC_TILE_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE0_SUPPORT_MULTI_TILE 8:8 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE0_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE0_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE1_SUPPORT_MULTI_TILE 9:9 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE1_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE1_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE2_SUPPORT_MULTI_TILE 10:10 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE2_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE2_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE3_SUPPORT_MULTI_TILE 11:11 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE3_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE3_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE4_SUPPORT_MULTI_TILE 12:12 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE4_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE4_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE5_SUPPORT_MULTI_TILE 13:13 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE5_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE5_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE6_SUPPORT_MULTI_TILE 14:14 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE6_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE6_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE7_SUPPORT_MULTI_TILE 15:15 /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE7_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE7_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE(i) (8+(i)):(8+(i)) /* RWIVF */ +#define NVCC73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE__SIZE_1 8 /* */ +#define NVCC73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPC_TILE_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPC_MERGER_TILE_BUFFER_SIZE 31:16 /* RWIUF */ +#define NVCC73_SYS_CAPD 0x2c /* RW-4R */ +#define NVCC73_SYS_CAPD_NUM_TELLTALE_REGIONS 4:0 /* RWIUF */ +#define NVCC73_SYS_CAPD_NUM_FROZEN_FRAME_REGIONS 12:8 /* RWIUF */ +#define NVCC73_SYS_CAPD_NUM_ROI 20:16 /* RWIUF */ +#define NVCC73_SYS_CAPD_AE_SDP_EXISTS 30:30 /* RWIVF */ +#define NVCC73_SYS_CAPD_AE_SDP_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPD_AE_SDP_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPD_AMSS_EXISTS 31:31 /* RWIVF */ +#define NVCC73_SYS_CAPD_AMSS_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPD_AMSS_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE 0x34 /* RW-4R */ +#define NVCC73_SYS_CAPE_VIRWIN0_EXISTS 0:0 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN1_EXISTS 1:1 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN2_EXISTS 2:2 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN3_EXISTS 3:3 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN4_EXISTS 4:4 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN5_EXISTS 5:5 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN6_EXISTS 6:6 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN7_EXISTS 7:7 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN8_EXISTS 8:8 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN9_EXISTS 9:9 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN10_EXISTS 10:10 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN11_EXISTS 11:11 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN12_EXISTS 12:12 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN13_EXISTS 13:13 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN14_EXISTS 14:14 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN15_EXISTS 15:15 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN16_EXISTS 16:16 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN17_EXISTS 17:17 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN18_EXISTS 18:18 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN19_EXISTS 19:19 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN20_EXISTS 20:20 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN21_EXISTS 21:21 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN22_EXISTS 22:22 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN23_EXISTS 23:23 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN24_EXISTS 24:24 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN25_EXISTS 25:25 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN26_EXISTS 26:26 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN27_EXISTS 27:27 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN28_EXISTS 28:28 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN29_EXISTS 29:29 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN30_EXISTS 30:30 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN31_EXISTS 31:31 /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCC73_SYS_CAPE_VIRWIN_EXISTS__SIZE_1 32 /* */ +#define NVCC73_SYS_CAPE_VIRWIN_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_SYS_CAPE_VIRWIN_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_MISC_CAPA_NUM_VMS 17:13 /* RWIUF */ +#define NVCC73_LINK_CAP 0x30 /* RW-4R */ +#define NVCC73_LINK_CAP_PHYCTRL0_EXISTS 0:0 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL0_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL0_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL1_EXISTS 1:1 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL1_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL1_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL2_EXISTS 2:2 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL2_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL2_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL3_EXISTS 3:3 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL3_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL3_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL4_EXISTS 4:4 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL4_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL4_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL5_EXISTS 5:5 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL5_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL5_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL6_EXISTS 6:6 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL6_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL6_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL7_EXISTS 7:7 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL7_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL7_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL8_EXISTS 8:8 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL8_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL8_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL9_EXISTS 9:9 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL9_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL9_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL10_EXISTS 10:10 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL10_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL10_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL11_EXISTS 11:11 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL11_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL11_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL12_EXISTS 12:12 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL12_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL12_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL13_EXISTS 13:13 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL13_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL13_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL14_EXISTS 14:14 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL14_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL14_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL15_EXISTS 15:15 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL15_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL15_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL16_EXISTS 16:16 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL16_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL16_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL17_EXISTS 17:17 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL17_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL17_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL18_EXISTS 18:18 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL18_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL18_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL19_EXISTS 19:19 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL19_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL19_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL20_EXISTS 20:20 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL20_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL20_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL21_EXISTS 21:21 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL21_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL21_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL22_EXISTS 22:22 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL22_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL22_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL23_EXISTS 23:23 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL23_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL23_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL24_EXISTS 24:24 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL24_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL24_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL25_EXISTS 25:25 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL25_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL25_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL26_EXISTS 26:26 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL26_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL26_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL27_EXISTS 27:27 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL27_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL27_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL28_EXISTS 28:28 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL28_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL28_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL29_EXISTS 29:29 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL29_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL29_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL30_EXISTS 30:30 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL30_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL30_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL31_EXISTS 31:31 /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL31_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL31_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL_EXISTS(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCC73_LINK_CAP_PHYCTRL_EXISTS__SIZE_1 32 /* */ +#define NVCC73_LINK_CAP_PHYCTRL_EXISTS_NO 0x00000000 /* RW--V */ +#define NVCC73_LINK_CAP_PHYCTRL_EXISTS_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA 0x10 /* RW-4R */ +#define NVCC73_IHUB_COMMON_CAPA_MEMPOOL_ENTRIES 15:0 /* RWIUF */ +#define NVCC73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH 17:16 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_32B 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_64B 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_128B 0x00000002 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_MEMPOOL_ENTRY_WIDTH_256B 0x00000003 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_ROTATION 18:18 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_ROTATION_FALSE 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_ROTATION_TRUE 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_PLANAR 19:19 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_PLANAR_FALSE 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_VGA 20:20 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_VGA_FALSE 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_VGA_TRUE 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION 21:21 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MEMPOOL_COMPRESSION_TRUE 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MSCG 22:22 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MSCG_FALSE 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MSCG_TRUE 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH 23:23 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_FALSE 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MCLK_SWITCH_TRUE 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MSCG_LPS 26:26 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MSCG_LPS_FALSE 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_SUPPORT_MSCG_LPS_TRUE 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION 31:30 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_32B 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_64B 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_128B 0x00000002 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPA_REQUEST_SIZE_PER_LINE_NON_ROTATION_256B 0x00000003 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC 0x18 /* RW-4R */ +#define NVCC73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE 1:0 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_32B 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_64B 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_128B 0x00000002 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_PITCH_REQUEST_SIZE_256B 0x00000003 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED 6:4 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_NONE 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_TWO 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_FOUR 0x00000002 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_EIGHT 0x00000003 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_MAX_LINES_BUFFERED_SIXTEEN 0x00000004 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR 11:11 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_FALSE 0x00000000 /* RWI-V */ +#define NVCC73_IHUB_COMMON_CAPC_SUPPORT_SEMI_PLANAR_TRUE 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP 12:12 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_FALSE 0x00000000 /* RWI-V */ +#define NVCC73_IHUB_COMMON_CAPC_SUPPORT_HOR_VER_FLIP_TRUE 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_SUPPORT_MEMPOOL_YUV_COMPRESSION 13:13 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPC_SUPPORT_MEMPOOL_YUV_COMPRESSION_FALSE 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPC_SUPPORT_MEMPOOL_YUV_COMPRESSION_TRUE 0x00000001 /* RWI-V */ +#define NVCC73_IHUB_COMMON_CAPE 0x24 /* RW-4R */ +#define NVCC73_IHUB_COMMON_CAPE_PHYWIN_BUFFER_SIZE 15:0 /* RWIUF */ +#define NVCC73_IHUB_COMMON_CAPF 0x28 /* RW-4R */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN0_SUPPORT_MULTI_TILE 0:0 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN0_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN0_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN1_SUPPORT_MULTI_TILE 1:1 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN1_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN1_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN2_SUPPORT_MULTI_TILE 2:2 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN2_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN2_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN3_SUPPORT_MULTI_TILE 3:3 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN3_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN3_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN4_SUPPORT_MULTI_TILE 4:4 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN4_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN4_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN5_SUPPORT_MULTI_TILE 5:5 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN5_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN5_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN6_SUPPORT_MULTI_TILE 6:6 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN6_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN6_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN7_SUPPORT_MULTI_TILE 7:7 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN7_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN7_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN8_SUPPORT_MULTI_TILE 8:8 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN8_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN8_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN9_SUPPORT_MULTI_TILE 9:9 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN9_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN9_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN10_SUPPORT_MULTI_TILE 10:10 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN10_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN10_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN11_SUPPORT_MULTI_TILE 11:11 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN11_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN11_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN12_SUPPORT_MULTI_TILE 12:12 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN12_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN12_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN13_SUPPORT_MULTI_TILE 13:13 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN13_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN13_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN14_SUPPORT_MULTI_TILE 14:14 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN14_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN14_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN15_SUPPORT_MULTI_TILE 15:15 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN15_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN15_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN16_SUPPORT_MULTI_TILE 16:16 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN16_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN16_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN17_SUPPORT_MULTI_TILE 17:17 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN17_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN17_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN18_SUPPORT_MULTI_TILE 18:18 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN18_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN18_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN19_SUPPORT_MULTI_TILE 19:19 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN19_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN19_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN20_SUPPORT_MULTI_TILE 20:20 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN20_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN20_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN21_SUPPORT_MULTI_TILE 21:21 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN21_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN21_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN22_SUPPORT_MULTI_TILE 22:22 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN22_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN22_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN23_SUPPORT_MULTI_TILE 23:23 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN23_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN23_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN24_SUPPORT_MULTI_TILE 24:24 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN24_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN24_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN25_SUPPORT_MULTI_TILE 25:25 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN25_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN25_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN26_SUPPORT_MULTI_TILE 26:26 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN26_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN26_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN27_SUPPORT_MULTI_TILE 27:27 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN27_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN27_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN28_SUPPORT_MULTI_TILE 28:28 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN28_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN28_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN29_SUPPORT_MULTI_TILE 29:29 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN29_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN29_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN30_SUPPORT_MULTI_TILE 30:30 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN30_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN30_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN31_SUPPORT_MULTI_TILE 31:31 /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN31_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN31_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE(i) (0+(i)):(0+(i)) /* RWIVF */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE__SIZE_1 32 /* */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE_NO 0x00000000 /* RW--V */ +#define NVCC73_IHUB_COMMON_CAPF_PHYWIN_SUPPORT_MULTI_TILE_YES 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA(i) (0x680+(i)*32) /* RW-4A */ +#define NVCC73_POSTCOMP_HDR_CAPA__SIZE_1 8 /* */ +#define NVCC73_POSTCOMP_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_OCSC0_PRESENT 16:16 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_OCSC0_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_OCSC1_PRESENT 17:17 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_OCSC1_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_SCLR_PRESENT 18:18 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_HCLPF_PRESENT 19:19 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_HCLPF_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_DTH_PRESENT 20:20 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_DTH_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_DTH_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_OSCAN_PRESENT 21:21 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_OSCAN_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_DSC_PRESENT 22:22 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_DSC_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_DSC_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_VFILTER_PRESENT 23:23 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_VFILTER_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_LTM_PRESENT 25:25 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPA_LTM_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPA_LTM_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPB(i) (0x684+(i)*32) /* RW-4A */ +#define NVCC73_POSTCOMP_HDR_CAPB__SIZE_1 8 /* */ +#define NVCC73_POSTCOMP_HDR_CAPB_VGA 0:0 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPB_VGA_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPB_VGA_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPB_OLUT_SZ 12:1 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPB_OLUT_LOGNR 15:13 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD 17:17 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPB_OLUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPB_OLUT_DIRECT 18:18 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPB_OLUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPB_OLUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC(i) (0x688+(i)*32) /* RW-4A */ +#define NVCC73_POSTCOMP_HDR_CAPC__SIZE_1 8 /* */ +#define NVCC73_POSTCOMP_HDR_CAPC_OCSC0_PRECISION 4:0 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC_OCSC0_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC_OCSC1_PRECISION 12:8 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP 13:13 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC_OCSC1_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_SF_PRECISION 20:16 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_CI_PRECISION 24:21 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB 25:25 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPC_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPD(i) (0x68c+(i)*32) /* RW-4A */ +#define NVCC73_POSTCOMP_HDR_CAPD__SIZE_1 8 /* */ +#define NVCC73_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPD_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPE(i) (0x690+(i)*32) /* RW-4A */ +#define NVCC73_POSTCOMP_HDR_CAPE__SIZE_1 8 /* */ +#define NVCC73_POSTCOMP_HDR_CAPE_DSC_MAXLINEWIDTH 15:0 /* RWIUF */ +#define NVCC73_POSTCOMP_HDR_CAPE_DSC_NATIVE422 16:16 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPE_DSC_NATIVE422_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_DSC_NATIVE422_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_DSC_NATIVE420 17:17 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPE_DSC_NATIVE420_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_DSC_NATIVE420_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_PRESENT 18:18 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE 21:19 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_9x9x9 0x00000000 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_17x17x17 0x00000001 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_25x25x25 0x00000002 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_33x33x33 0x00000003 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_4 0x00000004 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_5 0x00000005 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_6 0x00000006 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_MAX_SIZE_RESERVED_7 0x00000007 /* RW--V */ +#define NVCC73_POSTCOMP_HDR_CAPE_3DLUT_NUM_CURVES 23:22 /* RWIUF */ +#define NVCC73_POSTCOMP_HDR_CAPF(i) (0x694+(i)*32) /* RW-4A */ +#define NVCC73_POSTCOMP_HDR_CAPF__SIZE_1 8 /* */ +#define NVCC73_POSTCOMP_HDR_CAPF_VFILTER_MAX_PIXELS 15:0 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPF_LTM_MAX_PIXELS 31:16 /* RWIVF */ +#define NVCC73_POSTCOMP_HDR_CAPG(i) (0x698+(i)*32) /* RW-4A */ +#define NVCC73_POSTCOMP_HDR_CAPG__SIZE_1 8 /* */ +#define NVCC73_POSTCOMP_HDR_CAPG_CMI_SZ 11:0 /* RWIUF */ +#define NVCC73_POSTCOMP_HDR_CAPG_CMI_LOGNR 14:12 /* RWIUF */ +#define NVCC73_POSTCOMP_HDR_CAPG_CMO_SZ 26:15 /* RWIUF */ +#define NVCC73_POSTCOMP_HDR_CAPG_CMO_LOGNR 29:27 /* RWIUF */ +#define NVCC73_SOR_CAP(i) (0x144+(i)*8) /* RW-4A */ +#define NVCC73_SOR_CAP__SIZE_1 8 /* */ +#define NVCC73_SOR_CAP_SINGLE_LVDS_18 0:0 /* RWIVF */ +#define NVCC73_SOR_CAP_SINGLE_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_SINGLE_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_SINGLE_LVDS_24 1:1 /* RWIVF */ +#define NVCC73_SOR_CAP_SINGLE_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_SINGLE_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DUAL_LVDS_18 2:2 /* RWIVF */ +#define NVCC73_SOR_CAP_DUAL_LVDS_18_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DUAL_LVDS_18_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DUAL_LVDS_24 3:3 /* RWIVF */ +#define NVCC73_SOR_CAP_DUAL_LVDS_24_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DUAL_LVDS_24_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DP_DUAL_MODE 4:4 /* RWIVF */ +#define NVCC73_SOR_CAP_DP_DUAL_MODE_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DP_DUAL_MODE_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_SINGLE_TMDS_A 8:8 /* RWIVF */ +#define NVCC73_SOR_CAP_SINGLE_TMDS_A_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_SINGLE_TMDS_A_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_SINGLE_TMDS_B 9:9 /* RWIVF */ +#define NVCC73_SOR_CAP_SINGLE_TMDS_B_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_SINGLE_TMDS_B_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DUAL_TMDS 11:11 /* RWIVF */ +#define NVCC73_SOR_CAP_DUAL_TMDS_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DUAL_TMDS_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DISPLAY_OVER_PCIE 13:13 /* RWIVF */ +#define NVCC73_SOR_CAP_DISPLAY_OVER_PCIE_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DISPLAY_OVER_PCIE_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DP_TUNNELING_OVER_USB4 15:15 /* RWIVF */ +#define NVCC73_SOR_CAP_DP_TUNNELING_OVER_USB4_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DP_TUNNELING_OVER_USB4_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_SDI 16:16 /* RWIVF */ +#define NVCC73_SOR_CAP_SDI_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_SDI_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DP_DUAL_MST 23:23 /* RWIVF */ +#define NVCC73_SOR_CAP_DP_DUAL_MST_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DP_DUAL_MST_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DP_A 24:24 /* RWIVF */ +#define NVCC73_SOR_CAP_DP_A_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DP_A_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DP_B 25:25 /* RWIVF */ +#define NVCC73_SOR_CAP_DP_B_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DP_B_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DP_INTERLACE 26:26 /* RWIVF */ +#define NVCC73_SOR_CAP_DP_INTERLACE_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DP_INTERLACE_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DP_8_LANES 27:27 /* RWIVF */ +#define NVCC73_SOR_CAP_DP_8_LANES_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DP_8_LANES_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_HDMI_FRL 28:28 /* RWIVF */ +#define NVCC73_SOR_CAP_HDMI_FRL_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_HDMI_FRL_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_HDMI_FRL_YUV422 29:29 /* RWIVF */ +#define NVCC73_SOR_CAP_HDMI_FRL_YUV422_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_HDMI_FRL_YUV422_TRUE 0x00000001 /* RW--V */ +#define NVCC73_SOR_CAP_DP_128B132B 30:30 /* RWIVF */ +#define NVCC73_SOR_CAP_DP_128B132B_FALSE 0x00000000 /* RW--V */ +#define NVCC73_SOR_CAP_DP_128B132B_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA(i) (0x780+(i)*32) /* RW-4A */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA__SIZE_1 32 /* */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_FULL_WIDTH 4:0 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_UNIT_WIDTH 9:5 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_ALPHA_WIDTH 13:10 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT 16:16 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC00_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT 17:17 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC0LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT 18:18 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC01_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT 19:19 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_SCLR_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT 20:20 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_TMO_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT 21:21 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_GMA_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT 22:22 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC10_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT 23:23 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC1LUT_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT 24:24 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPA_CSC11_PRESENT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB(i) (0x784+(i)*32) /* RW-4A */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB__SIZE_1 32 /* */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB_FMT_PRECISION 4:0 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGSZ 9:6 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_LOGNR 12:10 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD 14:14 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT 15:15 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPB_ILUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC(i) (0x788+(i)*32) /* RW-4A */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC__SIZE_1 32 /* */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_PRECISION 4:0 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC00_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_FVLUT 13:13 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_FVLUT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_FVLUT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT 15:15 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC0LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_PRECISION 20:16 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPC_CSC01_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD(i) (0x78c+(i)*32) /* RW-4A */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD__SIZE_1 32 /* */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGSZ 3:0 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_LOGNR 6:4 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD 8:8 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_SFCLOAD_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT 9:9 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_TMO_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_SF_PRECISION 16:12 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_CI_PRECISION 20:17 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB 21:21 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_EXT_RGB_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA 22:22 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_EXT_ALPHA_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR 28:28 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_VS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR 30:30 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_2X 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPD_SCLR_HS_MAX_SCALE_FACTOR_4X 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE(i) (0x790+(i)*32) /* RW-4A */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE__SIZE_1 32 /* */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_PRECISION 4:0 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP 5:5 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC10_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_FVLUT 13:13 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_FVLUT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_FVLUT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT 15:15 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC1LUT_DIRECT_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_PRECISION 20:16 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP 21:21 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_TRUE 0x00000001 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPE_CSC11_UNITY_CLAMP_FALSE 0x00000000 /* RW--V */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPF(i) (0x794+(i)*32) /* RW-4A */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPF__SIZE_1 32 /* */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_2TAP 15:0 /* RWIVF */ +#define NVCC73_PRECOMP_WIN_PIPE_HDR_CAPF_VSCLR_MAX_PIXELS_5TAP 31:16 /* RWIVF */ +#define NVCC73_SOR_CLK_CAP(i) (0x608+(i)*4) /* RW-4A */ +#define NVCC73_SOR_CLK_CAP__SIZE_1 8 /* */ +#define NVCC73_SOR_CLK_CAP_DP_MAX 7:0 /* RWIUF */ +#define NVCC73_SOR_CLK_CAP_TMDS_MAX 23:16 /* RWIUF */ +#define NVCC73_SOR_CLK_CAP_LVDS_MAX 31:24 /* RWIUF */ + +#ifdef __cplusplus +}; +#endif /* extern C */ +#endif //_clcc73_h_ diff --git a/userspace/sdks/nv570/inc/class/clcc7a.h b/userspace/sdks/nv570/inc/class/clcc7a.h new file mode 100644 index 0000000..1596460 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcc7a.h @@ -0,0 +1,216 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcc7a__h_ +#define _clcc7a__h_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCC7A_CURSOR_IMM_CHANNEL_PIO (0x0000CC7A) + +typedef volatile struct _clcc7a_tag0 { + NvV32 Reserved00[0x2]; + NvV32 Free; // 0x00000008 - 0x0000000B + NvV32 Reserved01[0x7D]; + NvV32 Update; // 0x00000200 - 0x00000203 + NvV32 SetInterlockFlags; // 0x00000204 - 0x00000207 + NvV32 SetCursorHotSpotPointOut[2]; // 0x00000208 - 0x0000020F + NvV32 SetWindowInterlockFlags; // 0x00000210 - 0x00000213 + NvV32 Reserved02[0x3F7B]; +} NVCC7ADispCursorImmControlPio; + +#define NVCC7A_FREE (0x00000008) +#define NVCC7A_FREE_COUNT 5:0 +#define NVCC7A_UPDATE (0x00000200) +#define NVCC7A_UPDATE_RELEASE_ELV 0:0 +#define NVCC7A_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCC7A_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCC7A_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCC7A_UPDATE_FORCE_FULLSCREEN 12:12 +#define NVCC7A_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCC7A_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCC7A_SET_INTERLOCK_FLAGS (0x00000204) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVCC7A_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVCC7A_SET_CURSOR_HOT_SPOT_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVCC7A_SET_CURSOR_HOT_SPOT_POINT_OUT_X 15:0 +#define NVCC7A_SET_CURSOR_HOT_SPOT_POINT_OUT_Y 31:16 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS (0x00000210) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVCC7A_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clcc7a_h + \ No newline at end of file diff --git a/userspace/sdks/nv570/inc/class/clcc7b.h b/userspace/sdks/nv570/inc/class/clcc7b.h new file mode 100644 index 0000000..a97a324 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcc7b.h @@ -0,0 +1,70 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcc7b_h_ +#define _clcc7b_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCC7B_WINDOW_IMM_CHANNEL_DMA (0x0000CC7B) + +// dma opcode instructions +#define NVCC7B_DMA +#define NVCC7B_DMA_OPCODE 31:29 +#define NVCC7B_DMA_OPCODE_METHOD 0x00000000 +#define NVCC7B_DMA_OPCODE_JUMP 0x00000001 +#define NVCC7B_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVCC7B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVCC7B_DMA_METHOD_COUNT 27:18 +#define NVCC7B_DMA_METHOD_OFFSET 15:2 +#define NVCC7B_DMA_DATA 31:0 +#define NVCC7B_DMA_DATA_NOP 0x00000000 +#define NVCC7B_DMA_JUMP_OFFSET 15:2 +#define NVCC7B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVCC7B_PUT (0x00000000) +#define NVCC7B_PUT_PTR 13:0 +#define NVCC7B_GET (0x00000004) +#define NVCC7B_GET_PTR 13:0 +#define NVCC7B_UPDATE (0x00000200) +#define NVCC7B_UPDATE_RELEASE_ELV 0:0 +#define NVCC7B_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCC7B_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCC7B_UPDATE_INTERLOCK_WITH_WINDOW 1:1 +#define NVCC7B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVCC7B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVCC7B_UPDATE_FORCE_FULLSCREEN 4:4 +#define NVCC7B_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCC7B_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCC7B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004) +#define NVCC7B_SET_POINT_OUT_X 15:0 +#define NVCC7B_SET_POINT_OUT_Y 31:16 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clcc7b_h diff --git a/userspace/sdks/nv570/inc/class/clcc7d.h b/userspace/sdks/nv570/inc/class/clcc7d.h new file mode 100644 index 0000000..948ca11 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcc7d.h @@ -0,0 +1,2007 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcc7d_h_ +#define _clcc7d_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCC7D_CORE_CHANNEL_DMA (0x0000CC7D) + +#define NV_DISP_NOTIFIER 0x00000000 +#define NV_DISP_NOTIFIER_SIZEOF 0x00000010 +#define NV_DISP_NOTIFIER__0 0x00000000 +#define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 +#define NV_DISP_NOTIFIER__0_FIELD 8:8 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE 9:9 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 +#define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 +#define NV_DISP_NOTIFIER__0_R1 15:10 +#define NV_DISP_NOTIFIER__0_R2 23:16 +#define NV_DISP_NOTIFIER__0_R3 29:24 +#define NV_DISP_NOTIFIER__0_STATUS 31:30 +#define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 +#define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 +#define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 +#define NV_DISP_NOTIFIER__1 0x00000001 +#define NV_DISP_NOTIFIER__1_R4 31:0 +#define NV_DISP_NOTIFIER__2 0x00000002 +#define NV_DISP_NOTIFIER__2_TIMESTAMP_LO 31:0 +#define NV_DISP_NOTIFIER__3 0x00000003 +#define NV_DISP_NOTIFIER__3_TIMESTAMP_HI 31:0 + + +// dma opcode instructions +#define NVCC7D_DMA +#define NVCC7D_DMA_OPCODE 31:29 +#define NVCC7D_DMA_OPCODE_METHOD 0x00000000 +#define NVCC7D_DMA_OPCODE_JUMP 0x00000001 +#define NVCC7D_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVCC7D_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVCC7D_DMA_METHOD_COUNT 27:18 +#define NVCC7D_DMA_METHOD_OFFSET 15:2 +#define NVCC7D_DMA_DATA 31:0 +#define NVCC7D_DMA_DATA_NOP 0x00000000 +#define NVCC7D_DMA_JUMP_OFFSET 15:2 +#define NVCC7D_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// if cap SUPPORT_FLEXIBLE_WIN_MAPPING is FALSE, this define can be used to obtain which head a window is mapped to +#define NVC37D_WINDOW_MAPPED_TO_HEAD(w) ((w)>>1) +#define NVC37D_GET_VALID_WINDOWMASK_FOR_HEAD(h) ((1<<((h)*2)) | (1<<((h)*2+1))) + +// class methods +#define NVCC7D_PUT (0x00000000) +#define NVCC7D_PUT_PTR 13:0 +#define NVCC7D_GET (0x00000004) +#define NVCC7D_GET_PTR 13:0 +#define NVCC7D_UPDATE (0x00000200) +#define NVCC7D_UPDATE_SPECIAL_HANDLING 21:20 +#define NVCC7D_UPDATE_SPECIAL_HANDLING_NONE (0x00000000) +#define NVCC7D_UPDATE_SPECIAL_HANDLING_INTERRUPT_RM (0x00000001) +#define NVCC7D_UPDATE_SPECIAL_HANDLING_MODE_SWITCH (0x00000002) +#define NVCC7D_UPDATE_SPECIAL_HANDLING_REASON 19:12 +#define NVCC7D_UPDATE_INHIBIT_INTERRUPTS 24:24 +#define NVCC7D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000) +#define NVCC7D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001) +#define NVCC7D_UPDATE_RELEASE_ELV 0:0 +#define NVCC7D_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCC7D_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCC7D_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCC7D_UPDATE_FORCE_FULLSCREEN 28:28 +#define NVCC7D_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCC7D_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCC7D_SET_NOTIFIER_CONTROL (0x0000020C) +#define NVCC7D_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVCC7D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVCC7D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCC7D_SET_NOTIFIER_CONTROL_NOTIFY 12:12 +#define NVCC7D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000) +#define NVCC7D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001) +#define NVCC7D_SET_CONTROL (0x00000210) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN(i) ((i)+0):((i)+0) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN__SIZE_1 4 +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN_DISABLE (0x00000000) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN_ENABLE (0x00000001) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN0 0:0 +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN0_DISABLE (0x00000000) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN0_ENABLE (0x00000001) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN1 1:1 +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN1_DISABLE (0x00000000) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN1_ENABLE (0x00000001) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN2 2:2 +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN2_DISABLE (0x00000000) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN2_ENABLE (0x00000001) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN3 3:3 +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN3_DISABLE (0x00000000) +#define NVCC7D_SET_CONTROL_FLIP_LOCK_PIN3_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS (0x00000218) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+0):((i)+0) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 0:0 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 1:1 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 2:2 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 3:3 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 4:4 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 5:5 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 6:6 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 7:7 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 16:16 +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVCC7D_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS (0x0000021C) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVCC7D_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVCC7D_GET_RG_SCAN_LINE(b) (0x00000220 + (b)*0x00000004) +#define NVCC7D_GET_RG_SCAN_LINE_LINE 15:0 +#define NVCC7D_GET_RG_SCAN_LINE_VBLANK 16:16 +#define NVCC7D_GET_RG_SCAN_LINE_VBLANK_FALSE (0x00000000) +#define NVCC7D_GET_RG_SCAN_LINE_VBLANK_TRUE (0x00000001) +#define NVCC7D_SET_GET_BLANKING_CTRL(b) (0x00000240 + (b)*0x00000004) +#define NVCC7D_SET_GET_BLANKING_CTRL_BLANK 0:0 +#define NVCC7D_SET_GET_BLANKING_CTRL_BLANK_NO_CHANGE (0x00000000) +#define NVCC7D_SET_GET_BLANKING_CTRL_BLANK_ENABLE (0x00000001) +#define NVCC7D_SET_GET_BLANKING_CTRL_UNBLANK 1:1 +#define NVCC7D_SET_GET_BLANKING_CTRL_UNBLANK_NO_CHANGE (0x00000000) +#define NVCC7D_SET_GET_BLANKING_CTRL_UNBLANK_ENABLE (0x00000001) +#define NVCC7D_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000260) +#define NVCC7D_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000264) +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVCC7D_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) + +#define NVCC7D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0x00000020) +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK 7:0 +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVCC7D_SOR_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVCC7D_SOR_SET_CONTROL_PROTOCOL 11:8 +#define NVCC7D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM (0x00000000) +#define NVCC7D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_A (0x00000001) +#define NVCC7D_SOR_SET_CONTROL_PROTOCOL_SINGLE_TMDS_B (0x00000002) +#define NVCC7D_SOR_SET_CONTROL_PROTOCOL_DUAL_TMDS (0x00000005) +#define NVCC7D_SOR_SET_CONTROL_PROTOCOL_DP_A (0x00000008) +#define NVCC7D_SOR_SET_CONTROL_PROTOCOL_DP_B (0x00000009) +#define NVCC7D_SOR_SET_CONTROL_PROTOCOL_HDMI_FRL (0x0000000C) +#define NVCC7D_SOR_SET_CONTROL_PROTOCOL_CUSTOM (0x0000000F) +#define NVCC7D_SOR_SET_CONTROL_DE_SYNC_POLARITY 16:16 +#define NVCC7D_SOR_SET_CONTROL_DE_SYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVCC7D_SOR_SET_CONTROL_DE_SYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCC7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE 21:20 +#define NVCC7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_OFF (0x00000000) +#define NVCC7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X2 (0x00000001) +#define NVCC7D_SOR_SET_CONTROL_PIXEL_REPLICATE_MODE_X4 (0x00000002) +#define NVCC7D_SOR_SET_CUSTOM_REASON(a) (0x00000304 + (a)*0x00000020) +#define NVCC7D_SOR_SET_CUSTOM_REASON_CODE 31:0 +#define NVCC7D_SOR_SET_SW_SPARE_A(a) (0x00000308 + (a)*0x00000020) +#define NVCC7D_SOR_SET_SW_SPARE_A_CODE 31:0 +#define NVCC7D_SOR_SET_SW_SPARE_B(a) (0x0000030C + (a)*0x00000020) +#define NVCC7D_SOR_SET_SW_SPARE_B_CODE 31:0 + +#define NVCC7D_DSI_SET_CONTROL(a) (0x00000500 + (a)*0x00000020) +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK 7:0 +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK_NONE (0x00000000) +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK_HEAD0 (0x00000001) +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK_HEAD1 (0x00000002) +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK_HEAD2 (0x00000004) +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK_HEAD3 (0x00000008) +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK_HEAD4 (0x00000010) +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK_HEAD5 (0x00000020) +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK_HEAD6 (0x00000040) +#define NVCC7D_DSI_SET_CONTROL_OWNER_MASK_HEAD7 (0x00000080) +#define NVCC7D_DSI_SET_CUSTOM_REASON(a) (0x00000504 + (a)*0x00000020) +#define NVCC7D_DSI_SET_CUSTOM_REASON_CODE 31:0 +#define NVCC7D_DSI_SET_SW_SPARE_A(a) (0x00000508 + (a)*0x00000020) +#define NVCC7D_DSI_SET_SW_SPARE_A_CODE 31:0 +#define NVCC7D_DSI_SET_SW_SPARE_B(a) (0x0000050C + (a)*0x00000020) +#define NVCC7D_DSI_SET_SW_SPARE_B_CODE 31:0 + +#define NVCC7D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER 3:0 +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD(i) (0x00000000 +(i)) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD__SIZE_1 8 +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD0 (0x00000000) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD1 (0x00000001) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD2 (0x00000002) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD3 (0x00000003) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD4 (0x00000004) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD5 (0x00000005) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD6 (0x00000006) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_HEAD7 (0x00000007) +#define NVCC7D_WINDOW_SET_CONTROL_OWNER_NONE (0x0000000F) +#define NVCC7D_WINDOW_SET_CONTROL_HIDE 8:8 +#define NVCC7D_WINDOW_SET_CONTROL_HIDE_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_CONTROL_HIDE_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_CONTROL_DISABLE_PHYSICAL_FLIPS 9:9 +#define NVCC7D_WINDOW_SET_CONTROL_DISABLE_PHYSICAL_FLIPS_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_CONTROL_DISABLE_PHYSICAL_FLIPS_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_CONTROL_ALLOW_SUPERFRAME 10:10 +#define NVCC7D_WINDOW_SET_CONTROL_ALLOW_SUPERFRAME_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_CONTROL_ALLOW_SUPERFRAME_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP 1:1 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP 2:2 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP 3:3 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_RGB_PACKED8BPP_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422 4:4 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PACKED422_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420 5:5 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR420_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444 6:6 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_PLANAR444_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420 7:7 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422 8:8 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R 9:9 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444 10:10 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420 11:11 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR420_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444 12:12 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_PLANAR444_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420 13:13 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR420_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R 15:15 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422R_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444 16:16 +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR444_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR(a) (0x0000100C + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVCC7D_WINDOW_SET_MAX_INPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0 +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED 16:16 +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_ILUT_ALLOWED_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED 28:28 +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_TMO_LUT_ALLOWED_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS 22:20 +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_INPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED 24:24 +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED 30:30 +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT 26:25 +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT_PITCH_BLOCKLINEAR (0x00000000) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT_PITCH (0x00000001) +#define NVCC7D_WINDOW_SET_WINDOW_USAGE_BOUNDS_LAYOUT_BLOCKLINEAR (0x00000002) +#define NVCC7D_WINDOW_SET_PHYSICAL(a) (0x00001014 + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW 31:0 +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_NONE (0x00000000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW0 (0x00000001) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW1 (0x00000002) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW2 (0x00000004) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW3 (0x00000008) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW4 (0x00000010) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW5 (0x00000020) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW6 (0x00000040) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW7 (0x00000080) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW8 (0x00000100) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW9 (0x00000200) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW10 (0x00000400) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW11 (0x00000800) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW12 (0x00001000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW13 (0x00002000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW14 (0x00004000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW15 (0x00008000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW16 (0x00010000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW17 (0x00020000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW18 (0x00040000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW19 (0x00080000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW20 (0x00100000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW21 (0x00200000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW22 (0x00400000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW23 (0x00800000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW24 (0x01000000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW25 (0x02000000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW26 (0x04000000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW27 (0x08000000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW28 (0x10000000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW29 (0x20000000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW30 (0x40000000) +#define NVCC7D_WINDOW_SET_PHYSICAL_WINDOW_WINDOW31 (0x80000000) +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES(a) (0x00001024 + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_SIZE_OUT 0:0 +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_SIZE_OUT_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_SIZE_OUT_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONTROL 1:1 +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONTROL_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONTROL_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONSTANT_ALPHA 2:2 +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONSTANT_ALPHA_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_CONSTANT_ALPHA_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_FACTOR_SELECT 3:3 +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_FACTOR_SELECT_FALSE (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_OVERRIDES_SET_COMPOSITION_FACTOR_SELECT_TRUE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_SIZE_OUT(a) (0x00001028 + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_GUEST_SIZE_OUT_WIDTH 15:0 +#define NVCC7D_WINDOW_SET_GUEST_SIZE_OUT_HEIGHT 31:16 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL(a) (0x0000102C + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONSTANT_ALPHA(a) (0x00001030 + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT(a) (0x00001034 + (a)*0x00000080) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCC7D_WINDOW_SET_GUEST_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) + +#define NVCC7D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_PROCAMP_COLOR_SPACE 1:0 +#define NVCC7D_HEAD_SET_PROCAMP_COLOR_SPACE_RGB (0x00000000) +#define NVCC7D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_601 (0x00000001) +#define NVCC7D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_709 (0x00000002) +#define NVCC7D_HEAD_SET_PROCAMP_COLOR_SPACE_YUV_2020 (0x00000003) +#define NVCC7D_HEAD_SET_PROCAMP_CHROMA_LPF 3:3 +#define NVCC7D_HEAD_SET_PROCAMP_CHROMA_LPF_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_PROCAMP_CHROMA_LPF_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_PROCAMP_CHROMA_DOWN_V 4:4 +#define NVCC7D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_PROCAMP_CHROMA_DOWN_V_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_PROCAMP_DYNAMIC_RANGE 28:28 +#define NVCC7D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_VESA (0x00000000) +#define NVCC7D_HEAD_SET_PROCAMP_DYNAMIC_RANGE_CEA (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE 1:0 +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_ACTIVE_RASTER (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_COMPLETE_RASTER (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_CRC_MODE_NON_ACTIVE_RASTER (0x00000002) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY 2:2 +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_HSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY 3:3 +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_POSITIVE_TRUE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_VSYNC_POLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH 7:4 +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_422 (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444 (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_20_422 (0x00000002) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_422 (0x00000003) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444 (0x00000004) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444 (0x00000005) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_32_422 (0x00000006) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_36_444 (0x00000007) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_48_444 (0x00000008) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_16_444 (0x00000009) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444NP (0x0000000A) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE 24:24 +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_OVERRIDE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_COLOR_SPACE_FLAG 23:12 +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN 31:26 +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN0 (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN1 (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN2 (0x00000002) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN3 (0x00000003) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN4 (0x00000004) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN5 (0x00000005) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN6 (0x00000006) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN7 (0x00000007) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN8 (0x00000008) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN9 (0x00000009) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN10 (0x0000000A) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN11 (0x0000000B) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN12 (0x0000000C) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN13 (0x0000000D) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN14 (0x0000000E) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN15 (0x0000000F) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN16 (0x00000010) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN17 (0x00000011) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN18 (0x00000012) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN19 (0x00000013) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN20 (0x00000014) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN21 (0x00000015) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN22 (0x00000016) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN23 (0x00000017) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN24 (0x00000018) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN25 (0x00000019) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN26 (0x0000001A) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN27 (0x0000001B) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN28 (0x0000001C) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN29 (0x0000001D) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN30 (0x0000001E) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_WIN31 (0x0000001F) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_EXT_PACKET_WIN_NONE (0x0000003F) +#define NVCC7D_HEAD_SET_CONTROL(a) (0x00002008 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CONTROL_STRUCTURE 1:0 +#define NVCC7D_HEAD_SET_CONTROL_STRUCTURE_PROGRESSIVE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE 2:2 +#define NVCC7D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_NORMAL (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_STEREO3D_STRUCTURE_FRAME_PACKED (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_YUV420PACKER 3:3 +#define NVCC7D_HEAD_SET_CONTROL_YUV420PACKER_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_YUV420PACKER_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_MODE 11:10 +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_MODE_NO_LOCK (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN 8:4 +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCC7D_HEAD_SET_CONTROL_SINK_LOCKOUT_WINDOW 15:12 +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE 23:22 +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE_NO_LOCK (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE_FRAME_LOCK (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_MODE_RASTER_LOCK (0x00000003) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN 20:16 +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN 28:24 +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN__SIZE_1 16 +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_0 (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_1 (0x00000002) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_2 (0x00000003) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_3 (0x00000004) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_4 (0x00000005) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_5 (0x00000006) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_6 (0x00000007) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_7 (0x00000008) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_8 (0x00000009) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_A (0x0000000B) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_B (0x0000000C) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_C (0x0000000D) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_D (0x0000000E) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_E (0x0000000F) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_LOCK_PIN_F (0x00000010) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCC7D_HEAD_SET_CONTROL_STEREO_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCC7D_HEAD_SET_CONTROL_SINK_STEREO_LOCK_MODE 30:30 +#define NVCC7D_HEAD_SET_CONTROL_SINK_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_SINK_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_STEREO_LOCK_MODE 31:31 +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_STEREO_LOCK_MODE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_SOURCE_STEREO_LOCK_MODE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HERTZ 30:0 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001 31:31 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_ADJ1000DIV1001_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_SCALER(a) (0x00002014 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_OUTPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVCC7D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_DITHER_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_BITS 5:4 +#define NVCC7D_HEAD_SET_DITHER_CONTROL_BITS_TO_6_BITS (0x00000000) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_BITS_TO_8_BITS (0x00000001) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_BITS_TO_10_BITS (0x00000002) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_BITS_TO_12_BITS (0x00000003) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE 2:2 +#define NVCC7D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_OFFSET_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_MODE 10:8 +#define NVCC7D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_ERR_ACC (0x00000000) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_ERR_ACC (0x00000001) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_MODE_DYNAMIC_2X2 (0x00000002) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_MODE_STATIC_2X2 (0x00000003) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_MODE_TEMPORAL (0x00000004) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_MODE_ROUND (0x00000005) +#define NVCC7D_HEAD_SET_DITHER_CONTROL_PHASE 13:12 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER 0:0 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_NOT_DRIVER_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING 4:4 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE 9:8 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_VBLANK (0x00000000) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION_HOPPING_MODE_HBLANK (0x00000001) +#define NVCC7D_HEAD_SET_DISPLAY_ID(a,b) (0x00002020 + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_DISPLAY_ID_CODE 31:0 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_HERTZ 30:0 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001 31:31 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX_ADJ1000DIV1001_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR(a) (0x0000202C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_HORIZONTAL 15:0 +#define NVCC7D_HEAD_SET_MAX_OUTPUT_SCALE_FACTOR_VERTICAL 31:16 +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR 2:0 +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_NONE (0x00000000) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W32_H32 (0x00000001) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W64_H64 (0x00000002) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W128_H128 (0x00000003) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_CURSOR_USAGE_W256_H256 (0x00000004) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED 4:4 +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_OLUT_ALLOWED_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_LTM_ALLOWED 5:5 +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_LTM_ALLOWED_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_LTM_ALLOWED_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS 14:12 +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_2 (0x00000001) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_OUTPUT_SCALER_TAPS_TAPS_5 (0x00000004) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED 8:8 +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_UPSCALING_ALLOWED_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED 16:16 +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_OVERFETCH_ENABLED_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_HEAD_USAGE_BOUNDS_ELV_START 31:17 +#define NVCC7D_HEAD_SET_STALL_LOCK(a) (0x00002034 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_STALL_LOCK_ENABLE 0:0 +#define NVCC7D_HEAD_SET_STALL_LOCK_ENABLE_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_STALL_LOCK_ENABLE_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_STALL_LOCK_MODE 2:2 +#define NVCC7D_HEAD_SET_STALL_LOCK_MODE_CONTINUOUS (0x00000000) +#define NVCC7D_HEAD_SET_STALL_LOCK_MODE_ONE_SHOT (0x00000001) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN 8:4 +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCC7D_HEAD_SET_STALL_LOCK_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCC7D_HEAD_SET_STALL_LOCK_UNSTALL_MODE 12:12 +#define NVCC7D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_CRASH_LOCK (0x00000000) +#define NVCC7D_HEAD_SET_STALL_LOCK_UNSTALL_MODE_LINE_LOCK (0x00000001) +#define NVCC7D_HEAD_SET_STALL_LOCK_TEPOLARITY 14:14 +#define NVCC7D_HEAD_SET_STALL_LOCK_TEPOLARITY_POSITIVE_TRUE (0x00000000) +#define NVCC7D_HEAD_SET_STALL_LOCK_TEPOLARITY_NEGATIVE_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_STALL_LOCK_UNSTALL_SYNC_ADVANCE 25:16 +#define NVCC7D_HEAD_SET_LOCK_CHAIN(a) (0x00002044 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LOCK_CHAIN_POSITION 3:0 +#define NVCC7D_HEAD_SET_VIEWPORT_POINT_IN(a) (0x00002048 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VIEWPORT_POINT_IN_X 14:0 +#define NVCC7D_HEAD_SET_VIEWPORT_POINT_IN_Y 30:16 +#define NVCC7D_HEAD_SET_VIEWPORT_SIZE_IN(a) (0x0000204C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VIEWPORT_SIZE_IN_WIDTH 14:0 +#define NVCC7D_HEAD_SET_VIEWPORT_SIZE_IN_HEIGHT 30:16 +#define NVCC7D_HEAD_SET_VIEWPORT_SIZE_OUT(a) (0x00002058 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VIEWPORT_SIZE_OUT_WIDTH 14:0 +#define NVCC7D_HEAD_SET_VIEWPORT_SIZE_OUT_HEIGHT 30:16 +#define NVCC7D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST(a) (0x0000205C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_X 15:0 +#define NVCC7D_HEAD_SET_VIEWPORT_POINT_OUT_ADJUST_Y 31:16 +#define NVCC7D_HEAD_SET_TILE_MASK(a) (0x00002060 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_TILE_MASK_TILE 7:0 +#define NVCC7D_HEAD_SET_TILE_MASK_TILE_NONE (0x00000000) +#define NVCC7D_HEAD_SET_TILE_MASK_TILE_TILE0 (0x00000001) +#define NVCC7D_HEAD_SET_TILE_MASK_TILE_TILE1 (0x00000002) +#define NVCC7D_HEAD_SET_TILE_MASK_TILE_TILE2 (0x00000004) +#define NVCC7D_HEAD_SET_TILE_MASK_TILE_TILE3 (0x00000008) +#define NVCC7D_HEAD_SET_TILE_MASK_TILE_TILE4 (0x00000010) +#define NVCC7D_HEAD_SET_TILE_MASK_TILE_TILE5 (0x00000020) +#define NVCC7D_HEAD_SET_TILE_MASK_TILE_TILE6 (0x00000040) +#define NVCC7D_HEAD_SET_TILE_MASK_TILE_TILE7 (0x00000080) +#define NVCC7D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RASTER_SIZE_WIDTH 15:0 +#define NVCC7D_HEAD_SET_RASTER_SIZE_HEIGHT 31:16 +#define NVCC7D_HEAD_SET_RASTER_SYNC_END(a) (0x00002068 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RASTER_SYNC_END_X 14:0 +#define NVCC7D_HEAD_SET_RASTER_SYNC_END_Y 30:16 +#define NVCC7D_HEAD_SET_RASTER_BLANK_END(a) (0x0000206C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RASTER_BLANK_END_X 14:0 +#define NVCC7D_HEAD_SET_RASTER_BLANK_END_Y 30:16 +#define NVCC7D_HEAD_SET_RASTER_BLANK_START(a) (0x00002070 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RASTER_BLANK_START_X 14:0 +#define NVCC7D_HEAD_SET_RASTER_BLANK_START_Y 30:16 +#define NVCC7D_HEAD_SET_OVERSCAN_COLOR(a) (0x00002078 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OVERSCAN_COLOR_RED_CR 9:0 +#define NVCC7D_HEAD_SET_OVERSCAN_COLOR_GREEN_Y 19:10 +#define NVCC7D_HEAD_SET_OVERSCAN_COLOR_BLUE_CB 29:20 +#define NVCC7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR(a) (0x0000207C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_RED_CR 9:0 +#define NVCC7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_GREEN_Y 19:10 +#define NVCC7D_HEAD_SET_FRAME_PACKED_VACTIVE_COLOR_BLUE_CB 29:20 +#define NVCC7D_HEAD_SET_HDMI_CTRL(a) (0x00002080 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT 2:0 +#define NVCC7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_NORMAL (0x00000000) +#define NVCC7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_EXTENDED (0x00000001) +#define NVCC7D_HEAD_SET_HDMI_CTRL_VIDEO_FORMAT_STEREO3D (0x00000002) +#define NVCC7D_HEAD_SET_HDMI_CTRL_HDMI_VIC 11:4 +#define NVCC7D_HEAD_SET_PRESENT_CONTROL_CURSOR(a) (0x00002098 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE 0:0 +#define NVCC7D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_MONO (0x00000000) +#define NVCC7D_HEAD_SET_PRESENT_CONTROL_CURSOR_MODE_STEREO (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR(a) (0x0000209C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_ENABLE 31:31 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_FORMAT 7:0 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_FORMAT_A1R5G5B5 (0x000000E9) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8 (0x000000CF) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_SIZE 9:8 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32 (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64 (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128 (0x00000002) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256 (0x00000003) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_X 19:12 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_HOT_SPOT_Y 27:20 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION(a) (0x000020A0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_K1 7:0 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT 11:8 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_CURSOR_COLOR_FACTOR_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT 15:12 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_ZERO (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_K1 (0x00000002) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_VIEWPORT_COLOR_FACTOR_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE 16:16 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_BLEND (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_MODE_XOR (0x00000001) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS 20:20 +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CONTROL_CURSOR_COMPOSITION_BYPASS_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL(a) (0x000020A4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL_INTERPOLATE 1:1 +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL_MIRROR 2:2 +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CMI_LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CMI_FP_NORM_SCALE(a) (0x000020A8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CMI_FP_NORM_SCALE_FPNORM 31:0 +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL(a) (0x000020AC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL_INTERPOLATE 1:1 +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL_MIRROR 2:2 +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CMO_LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CM3D0CONTROL(a) (0x000020B8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CM3D0CONTROL_MODE 0:0 +#define NVCC7D_HEAD_SET_CM3D0CONTROL_MODE_GAMUT_MAPPING (0x00000000) +#define NVCC7D_HEAD_SET_CM3D0CONTROL_MODE_PANEL_CORR (0x00000001) +#define NVCC7D_HEAD_SET_CM3D0CONTROL_ROUND 1:1 +#define NVCC7D_HEAD_SET_CM3D0CONTROL_ROUND_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CM3D0CONTROL_ROUND_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CM3D0CONTROL_LAST_ENTRY_ADD1 2:2 +#define NVCC7D_HEAD_SET_CM3D0CONTROL_LAST_ENTRY_ADD1_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CM3D0CONTROL_LAST_ENTRY_ADD1_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CM3D0CONTROL_SIZE 3:3 +#define NVCC7D_HEAD_SET_CM3D0CONTROL_SIZE_SIZE_9X9X9 (0x00000000) +#define NVCC7D_HEAD_SET_CM3D0CONTROL_SIZE_SIZE_17X17X17 (0x00000001) +#define NVCC7D_HEAD_SET_CM3D0CONTROL_RANGE_SCALE 8:6 +#define NVCC7D_HEAD_SET_CM3D0CONTROL_CONTENT_OFFSET 22:9 +#define NVCC7D_HEAD_SET_CM3D1CONTROL(a) (0x000020BC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CM3D1CONTROL_MODE 0:0 +#define NVCC7D_HEAD_SET_CM3D1CONTROL_MODE_GAMUT_MAPPING (0x00000000) +#define NVCC7D_HEAD_SET_CM3D1CONTROL_MODE_PANEL_CORR (0x00000001) +#define NVCC7D_HEAD_SET_CM3D1CONTROL_ROUND 1:1 +#define NVCC7D_HEAD_SET_CM3D1CONTROL_ROUND_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CM3D1CONTROL_ROUND_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CM3D1CONTROL_LAST_ENTRY_ADD1 2:2 +#define NVCC7D_HEAD_SET_CM3D1CONTROL_LAST_ENTRY_ADD1_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CM3D1CONTROL_LAST_ENTRY_ADD1_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CM3D1CONTROL_SIZE 3:3 +#define NVCC7D_HEAD_SET_CM3D1CONTROL_SIZE_SIZE_9X9X9 (0x00000000) +#define NVCC7D_HEAD_SET_CM3D1CONTROL_SIZE_SIZE_17X17X17 (0x00000001) +#define NVCC7D_HEAD_SET_CM3D1CONTROL_RANGE_SCALE 8:6 +#define NVCC7D_HEAD_SET_CM3D1CONTROL_CONTENT_OFFSET 22:9 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI(a) (0x000020C0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_HERTZ 3:0 +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_MAX(a) (0x000020C4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_HI_MAX_HERTZ 3:0 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE(a,b) (0x000020C8 + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW 15:10 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN0 (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN1 (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN2 (0x00000002) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN3 (0x00000003) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN4 (0x00000004) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN5 (0x00000005) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN6 (0x00000006) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN7 (0x00000007) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN8 (0x00000008) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN9 (0x00000009) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN10 (0x0000000A) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN11 (0x0000000B) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN12 (0x0000000C) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN13 (0x0000000D) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN14 (0x0000000E) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN15 (0x0000000F) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN16 (0x00000010) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN17 (0x00000011) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN18 (0x00000012) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN19 (0x00000013) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN20 (0x00000014) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN21 (0x00000015) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN22 (0x00000016) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN23 (0x00000017) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN24 (0x00000018) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN25 (0x00000019) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN26 (0x0000001A) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN27 (0x0000001B) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN28 (0x0000001C) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN29 (0x0000001D) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN30 (0x0000001E) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_WIN31 (0x0000001F) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_WINDOW_NONE (0x0000003F) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_INDEX 1:1 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_ENABLE 0:0 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_OVERRIDE 2:2 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_OVERRIDE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_OVERRIDE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION 9:8 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_VBLANK (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_VSYNC (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LOCATION_LINE (0x00000002) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID 30:16 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID_REVERSED 31:31 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB0OVERRIDE 4:4 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB0OVERRIDE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB0OVERRIDE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB1OVERRIDE 5:5 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB1OVERRIDE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB1OVERRIDE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB2OVERRIDE 6:6 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB2OVERRIDE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB2OVERRIDE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB3OVERRIDE 7:7 +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB3OVERRIDE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_OVERRIDE_HB3OVERRIDE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE(a,b) (0x000020D0 + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB0 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB1 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB2 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER_OVERRIDE_HB3 31:24 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE(a,b) (0x00002110 + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_RG_REL_SEMAPHORE_ADDRESS_HI 31:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE(a,b) (0x00002130 + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ADDRESS_LO 31:4 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET 3:2 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE 0:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_RG_REL_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_CRC(a) (0x00002150 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_CRC_ADDRESS_HI 31:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC(a) (0x00002154 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ADDRESS_LO 31:4 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET 3:2 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_IOVA (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE 0:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CRC_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT(a) (0x00002158 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_OLUT_ADDRESS_HI 31:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT(a) (0x0000215C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ADDRESS_LO 31:4 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET 3:2 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_IOVA (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE 0:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_OLUT_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D0(a) (0x00002160 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D0_ADDRESS_HI 31:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0(a) (0x00002164 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ADDRESS_LO 31:4 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET 3:2 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_IOVA (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ENABLE 0:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D0_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D1(a) (0x00002168 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_CM3D1_ADDRESS_HI 31:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1(a) (0x0000216C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ADDRESS_LO 31:4 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET 3:2 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_IOVA (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ENABLE 0:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CM3D1_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR(a,b) (0x00002170 + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_HI_CURSOR_ADDRESS_HI 31:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR(a,b) (0x00002178 + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ADDRESS_LO 31:4 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET 3:2 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_IOVA (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND 1:1 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_PITCH (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_KIND_BLOCKLINEAR (0x00000001) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE 0:0 +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_SURFACE_ADDRESS_LO_CURSOR_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CRC_CONTROL(a) (0x00002184 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL 5:0 +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_0 (0x00000000) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_1 (0x00000001) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_2 (0x00000002) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_3 (0x00000003) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_4 (0x00000004) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_5 (0x00000005) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_6 (0x00000006) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_7 (0x00000007) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_8 (0x00000008) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_9 (0x00000009) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_10 (0x0000000A) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_11 (0x0000000B) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_12 (0x0000000C) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_13 (0x0000000D) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_14 (0x0000000E) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_15 (0x0000000F) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_16 (0x00000010) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_17 (0x00000011) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_18 (0x00000012) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_19 (0x00000013) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_20 (0x00000014) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_21 (0x00000015) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_22 (0x00000016) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_23 (0x00000017) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_24 (0x00000018) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_25 (0x00000019) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_26 (0x0000001A) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_27 (0x0000001B) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_28 (0x0000001C) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_29 (0x0000001D) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_30 (0x0000001E) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_WIN_31 (0x0000001F) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CONTROLLING_CHANNEL_CORE (0x00000020) +#define NVCC7D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE 8:8 +#define NVCC7D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_CRC_CONTROL_EXPECT_BUFFER_COLLAPSE_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC 19:12 +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_NONE (0x00000000) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SF (0x00000030) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR__SIZE_1 8 +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR0 (0x00000050) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR1 (0x00000051) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR2 (0x00000052) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR3 (0x00000053) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR4 (0x00000054) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR5 (0x00000055) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR6 (0x00000056) +#define NVCC7D_HEAD_SET_CRC_CONTROL_PRIMARY_CRC_SOR7 (0x00000057) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC 27:20 +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_NONE (0x00000000) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SF (0x00000030) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR(i) (0x00000050 +(i)) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR__SIZE_1 8 +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR0 (0x00000050) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR1 (0x00000051) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR2 (0x00000052) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR3 (0x00000053) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR4 (0x00000054) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR5 (0x00000055) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR6 (0x00000056) +#define NVCC7D_HEAD_SET_CRC_CONTROL_SECONDARY_CRC_SOR7 (0x00000057) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE 9:9 +#define NVCC7D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_CRC_CONTROL_CRC_DURING_SNOOZE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_PRESENT_CONTROL(a) (0x0000218C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD 0:0 +#define NVCC7D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_PRESENT_CONTROL_USE_BEGIN_FIELD_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_PRESENT_CONTROL_BEGIN_FIELD 6:4 +#define NVCC7D_HEAD_SET_SW_SPARE_A(a) (0x00002194 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SW_SPARE_A_CODE 31:0 +#define NVCC7D_HEAD_SET_SW_SPARE_B(a) (0x00002198 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SW_SPARE_B_CODE 31:0 +#define NVCC7D_HEAD_SET_SW_SPARE_C(a) (0x0000219C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SW_SPARE_C_CODE 31:0 +#define NVCC7D_HEAD_SET_SW_SPARE_D(a) (0x000021A0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SW_SPARE_D_CODE 31:0 +#define NVCC7D_HEAD_SET_DISPLAY_RATE(a) (0x000021A8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DISPLAY_RATE_RUN_MODE 1:0 +#define NVCC7D_HEAD_SET_DISPLAY_RATE_RUN_MODE_CONTINUOUS (0x00000000) +#define NVCC7D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT (0x00000001) +#define NVCC7D_HEAD_SET_DISPLAY_RATE_RUN_MODE_ONE_SHOT_SELF_REFRESH (0x00000002) +#define NVCC7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_INTERVAL 25:4 +#define NVCC7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH 2:2 +#define NVCC7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_DISPLAY_RATE_MIN_REFRESH_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL(a,b) (0x000021CC + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE 10:10 +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_ONE_TIME (0x00000000) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RUN_MODE_CONTINUOUS (0x00000001) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_CONTROL_RASTER_LINE 31:16 +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE(a,b) (0x000021EC + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_VALUE 31:0 +#define NVCC7D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE(a) (0x00002214 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVCC7D_HEAD_SET_OUTPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVCC7D_HEAD_SET_MIN_FRAME_IDLE(a) (0x00002218 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_MIN_FRAME_IDLE_LEADING_RASTER_LINES 14:0 +#define NVCC7D_HEAD_SET_MIN_FRAME_IDLE_TRAILING_RASTER_LINES 30:16 +#define NVCC7D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED(a) (0x00002220 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_ALPHA 7:0 +#define NVCC7D_HEAD_SET_DESKTOP_COLOR_ALPHA_RED_RED 31:16 +#define NVCC7D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE(a) (0x00002224 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_GREEN 15:0 +#define NVCC7D_HEAD_SET_DESKTOP_COLOR_GREEN_BLUE_BLUE 31:16 +#define NVCC7D_HEAD_SET_CURSOR_COLOR_NORM_SCALE(a) (0x00002228 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CURSOR_COLOR_NORM_SCALE_VALUE 15:0 +#define NVCC7D_HEAD_SET_XOR_BLEND_FACTOR(a) (0x0000222C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_XOR_BLEND_FACTOR_LOG2PEAK_LUMINANCE 3:0 +#define NVCC7D_HEAD_SET_XOR_BLEND_FACTOR_S1 16:4 +#define NVCC7D_HEAD_SET_XOR_BLEND_FACTOR_S2 30:18 +#define NVCC7D_HEAD_SET_CLAMP_RANGE_GREEN(a) (0x00002238 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CLAMP_RANGE_GREEN_LOW 11:0 +#define NVCC7D_HEAD_SET_CLAMP_RANGE_GREEN_HIGH 27:16 +#define NVCC7D_HEAD_SET_CLAMP_RANGE_RED_BLUE(a) (0x0000223C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CLAMP_RANGE_RED_BLUE_LOW 11:0 +#define NVCC7D_HEAD_SET_CLAMP_RANGE_RED_BLUE_HIGH 27:16 +#define NVCC7D_HEAD_SET_OCSC0CONTROL(a) (0x00002240 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0CONTROL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_OCSC0CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_OCSC0CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C00(a) (0x00002244 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C00_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C01(a) (0x00002248 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C01_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C02(a) (0x0000224C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C02_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C03(a) (0x00002250 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C03_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C10(a) (0x00002254 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C10_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C11(a) (0x00002258 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C11_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C12(a) (0x0000225C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C12_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C13(a) (0x00002260 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C13_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C20(a) (0x00002264 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C20_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C21(a) (0x00002268 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C21_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C22(a) (0x0000226C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C22_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C23(a) (0x00002270 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC0COEFFICIENT_C23_VALUE 20:0 +#define NVCC7D_HEAD_SET_OLUT_CONTROL(a) (0x00002280 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_INTERPOLATE 0:0 +#define NVCC7D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_MIRROR 1:1 +#define NVCC7D_HEAD_SET_OLUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_MODE 3:2 +#define NVCC7D_HEAD_SET_OLUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_SIZE 18:8 +#define NVCC7D_HEAD_SET_OLUT_CONTROL_DIRECT_ROUND 4:4 +#define NVCC7D_HEAD_SET_OLUT_CONTROL_DIRECT_ROUND_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_DIRECT_ROUND_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_LEVEL 25:20 +#define NVCC7D_HEAD_SET_OLUT_CONTROL_SEGMENT_SIZE_BITS 5:5 +#define NVCC7D_HEAD_SET_OLUT_CONTROL_SEGMENT_SIZE_BITS_SIZE_3BITS (0x00000000) +#define NVCC7D_HEAD_SET_OLUT_CONTROL_SEGMENT_SIZE_BITS_SIZE_4BITS (0x00000001) +#define NVCC7D_HEAD_SET_OLUT_FP_NORM_SCALE(a) (0x00002284 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OLUT_FP_NORM_SCALE_VALUE 31:0 +#define NVCC7D_HEAD_SET_OCSC1CONTROL(a) (0x0000229C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1CONTROL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_OCSC1CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_OCSC1CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C00(a) (0x000022A0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C00_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C01(a) (0x000022A4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C01_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C02(a) (0x000022A8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C02_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C03(a) (0x000022AC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C03_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C10(a) (0x000022B0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C10_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C11(a) (0x000022B4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C11_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C12(a) (0x000022B8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C12_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C13(a) (0x000022BC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C13_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C20(a) (0x000022C0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C20_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C21(a) (0x000022C4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C21_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C22(a) (0x000022C8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C22_VALUE 20:0 +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C23(a) (0x000022CC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_OCSC1COEFFICIENT_C23_VALUE 20:0 +#define NVCC7D_HEAD_SET_HEAD_POSITION(a) (0x000022D0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_HEAD_POSITION_X 2:0 +#define NVCC7D_HEAD_SET_HEAD_POSITION_Y 6:4 +#define NVCC7D_HEAD_SET_DSC_CONTROL(a) (0x000022D4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_CONTROL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_DSC_CONTROL_ENABLE_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_DSC_CONTROL_ENABLE_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_DSC_CONTROL_AUTO_RESET 3:3 +#define NVCC7D_HEAD_SET_DSC_CONTROL_AUTO_RESET_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_DSC_CONTROL_AUTO_RESET_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION 4:4 +#define NVCC7D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_DSC_CONTROL_FULL_ICH_ERR_PRECISION_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET 5:5 +#define NVCC7D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_DSC_CONTROL_FORCE_ICH_RESET_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_DSC_CONTROL_FLATNESS_DET_THRESH 15:6 +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL(a) (0x000022D8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_ENABLE_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION 2:1 +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VBLANK (0x00000000) +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_VSYNC (0x00000001) +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_LOCATION_LINE (0x00000002) +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_SIZE 10:3 +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY 11:11 +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID 26:12 +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID_REVERSED 27:27 +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_DSC_PPS_CONTROL_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_DSC_PPS_HEAD(a) (0x000022DC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_HEAD_BYTE0 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_HEAD_BYTE1 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_HEAD_BYTE2 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_HEAD_BYTE3 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA0(a) (0x000022E0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MINOR 3:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA0_DSC_VERSION_MAJOR 7:4 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA0_PPS_IDENTIFIER 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA0_RESERVED 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA0_LINEBUF_DEPTH 27:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA0_BITS_PER_COMPONENT 31:28 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1(a) (0x000022E4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_HIGH 1:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1_VBR_ENABLE 2:2 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1_SIMPLE422 3:3 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1_CONVERT_RGB 4:4 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1_BLOCK_PRED_ENABLE 5:5 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1_RESERVED 7:6 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1_BITS_PER_PIXEL_LOW 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_HIGH 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA1_PIC_HEIGHT_LOW 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA2(a) (0x000022E8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_HIGH 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA2_PIC_WIDTH_LOW 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_HIGH 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA2_SLICE_HEIGHT_LOW 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA3(a) (0x000022EC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_HIGH 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA3_SLICE_WIDTH_LOW 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_HIGH 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA3_CHUNK_SIZE_LOW 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA4(a) (0x000022F0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_HIGH 1:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA4_RESERVED 7:2 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_XMIT_DELAY_LOW 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_HIGH 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA4_INITIAL_DEC_DELAY_LOW 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA5(a) (0x000022F4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA5_RESERVED0 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA5_INITIAL_SCALE_VALUE 13:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA5_RESERVED1 15:14 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_HIGH 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA5_SCALE_INCREMENT_INTERVAL_LOW 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA6(a) (0x000022F8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_HIGH 3:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA6_RESERVED0 7:4 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA6_SCALE_DECREMENT_INTERVAL_LOW 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA6_RESERVED1 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA6_FIRST_LINE_BPG_OFFSET 28:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA6_RESERVED2 31:29 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA7(a) (0x000022FC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_HIGH 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA7_NFL_BPG_OFFSET_LOW 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_HIGH 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA7_SLICE_BPG_OFFSET_LOW 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA8(a) (0x00002300 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_HIGH 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA8_INITIAL_OFFSET_LOW 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_HIGH 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA8_FINAL_OFFSET_LOW 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA9(a) (0x00002304 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MIN_QP 4:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA9_RESERVED0 7:5 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA9_FLATNESS_MAX_QP 12:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA9_RESERVED1 15:13 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_HIGH 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA9_RC_MODEL_SIZE_LOW 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA10(a) (0x00002308 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA10_RC_EDGE_FACTOR 3:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA10_RESERVED0 7:4 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT0 12:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA10_RESERVED1 15:13 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA10_RC_QUANT_INCR_LIMIT1 20:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA10_RESERVED2 23:21 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_LO 27:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA10_RC_TGT_OFFSET_HI 31:28 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA11(a) (0x0000230C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH0 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH1 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH2 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA11_RC_BUF_THRESH3 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA12(a) (0x00002310 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH4 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH5 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH6 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA12_RC_BUF_THRESH7 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA13(a) (0x00002314 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH8 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH9 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH10 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA13_RC_BUF_THRESH11 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA14(a) (0x00002318 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH12 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA14_RC_BUF_THRESH13 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_HIGH0 18:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MIN_QP0 23:19 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_BPG_OFFSET0 29:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA14_RC_RANGE_MAX_QP_LOW0 31:30 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA15(a) (0x0000231C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH1 2:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP1 7:3 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET1 13:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW1 15:14 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_HIGH2 18:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MIN_QP2 23:19 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_BPG_OFFSET2 29:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA15_RC_RANGE_MAX_QP_LOW2 31:30 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA16(a) (0x00002320 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH3 2:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP3 7:3 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET3 13:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW3 15:14 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_HIGH4 18:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MIN_QP4 23:19 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_BPG_OFFSET4 29:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA16_RC_RANGE_MAX_QP_LOW4 31:30 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA17(a) (0x00002324 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH5 2:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP5 7:3 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET5 13:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW5 15:14 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_HIGH6 18:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MIN_QP6 23:19 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_BPG_OFFSET6 29:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA17_RC_RANGE_MAX_QP_LOW6 31:30 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA18(a) (0x00002328 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH7 2:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP7 7:3 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET7 13:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW7 15:14 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_HIGH8 18:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MIN_QP8 23:19 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_BPG_OFFSET8 29:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA18_RC_RANGE_MAX_QP_LOW8 31:30 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA19(a) (0x0000232C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH9 2:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP9 7:3 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET9 13:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW9 15:14 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_HIGH10 18:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MIN_QP10 23:19 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_BPG_OFFSET10 29:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA19_RC_RANGE_MAX_QP_LOW10 31:30 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA20(a) (0x00002330 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH11 2:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP11 7:3 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET11 13:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW11 15:14 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_HIGH12 18:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MIN_QP12 23:19 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_BPG_OFFSET12 29:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA20_RC_RANGE_MAX_QP_LOW12 31:30 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA21(a) (0x00002334 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH13 2:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP13 7:3 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET13 13:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW13 15:14 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_HIGH14 18:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MIN_QP14 23:19 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_BPG_OFFSET14 29:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA21_RC_RANGE_MAX_QP_LOW14 31:30 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA22(a) (0x00002338 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA22_NATIVE422 0:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA22_NATIVE420 1:1 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA22_RESERVED0 7:2 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA22_SECOND_LINE_BPG_OFFSET 12:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA22_RESERVED1 15:13 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSET_HIGH 23:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA22_NSL_BPG_OFFSETLOW 31:24 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA23(a) (0x0000233C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_HIGH 7:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA23_SECOND_LINE_OFFSET_ADJ_LOW 15:8 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA23_RESERVED 31:16 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA24(a) (0x00002340 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA24_RESERVED 31:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA25(a) (0x00002344 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA25_RESERVED 31:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA26(a) (0x00002348 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA26_RESERVED 31:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA27(a) (0x0000234C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA27_RESERVED 31:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA28(a) (0x00002350 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA28_RESERVED 31:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA29(a) (0x00002354 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA29_RESERVED 31:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA30(a) (0x00002358 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA30_RESERVED 31:0 +#define NVCC7D_HEAD_SET_DSC_PPS_DATA31(a) (0x0000235C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DSC_PPS_DATA31_RESERVED 31:0 +#define NVCC7D_HEAD_SET_RASTER_HBLANK_DELAY(a) (0x00002364 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_START 15:0 +#define NVCC7D_HEAD_SET_RASTER_HBLANK_DELAY_BLANK_END 31:16 +#define NVCC7D_HEAD_SET_HDMI_DSC_HCACTIVE(a) (0x00002368 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_HDMI_DSC_HCACTIVE_BYTES 15:0 +#define NVCC7D_HEAD_SET_HDMI_DSC_HCACTIVE_TRI_BYTES 31:16 +#define NVCC7D_HEAD_SET_HDMI_DSC_HCBLANK(a) (0x0000236C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_HDMI_DSC_HCBLANK_WIDTH 15:0 +#define NVCC7D_HEAD_SW_RESERVED(a,b) (0x00002370 + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SW_RESERVED_VALUE 31:0 +#define NVCC7D_HEAD_SET_DP_CTRL(a) (0x0000237C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DP_CTRL_EFFECTIVE_BITS_PER_PIXEL_ADJ 9:0 +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI(a,b) (0x00002380 + (a)*0x00000800 + (b)*0x00000004) +#define NVCC7D_HEAD_SET_RG_REL_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVCC7D_HEAD_SET_HEAD_INFOFRAME(a) (0x000023A0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_HEAD_INFOFRAME_FID 7:0 +#define NVCC7D_HEAD_SET_HEAD_INFOFRAME_EN 16:16 +#define NVCC7D_HEAD_SET_HEAD_INFOFRAME_EN_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_HEAD_INFOFRAME_EN_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL(a) (0x000023A4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_MODE 1:0 +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_MODE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_MODE_EMP_VTEM_QMS (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_MODE_EMP_OTHERS (0x00000002) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY 12:12 +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_FREQUENCY_ONCE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_LOCATION 5:4 +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_LOCATION_VBLANK (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_LOCATION_VSYNC (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_LOCATION_LINE (0x00000002) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID 30:16 +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID_REVERSED 31:31 +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL 14:14 +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL_ACTIVE (0x00000000) +#define NVCC7D_HEAD_SET_INFOFRAME_CTRL_MTD_STATE_CTRL_ARM (0x00000001) +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER(a) (0x000023A8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER_HB0 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER_HB1 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER_HB2 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_HEADER_HB3 31:24 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA0(a) (0x000023AC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_DATA0_DB0 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA0_DB1 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA0_DB2 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA0_DB3 31:24 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA1(a) (0x000023B0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_DATA1_DB4 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA1_DB5 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA1_DB6 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA1_DB7 31:24 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA2(a) (0x000023B4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_DATA2_DB8 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA2_DB9 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA2_DB10 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA2_DB11 31:24 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA3(a) (0x000023B8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_DATA3_DB12 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA3_DB13 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA3_DB14 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA3_DB15 31:24 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA4(a) (0x000023BC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_DATA4_DB16 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA4_DB17 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA4_DB18 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA4_DB19 31:24 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA5(a) (0x000023C0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_DATA5_DB20 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA5_DB21 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA5_DB22 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA5_DB23 31:24 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA6(a) (0x000023C4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_DATA6_DB24 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA6_DB25 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA6_DB26 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA6_DB27 31:24 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA7(a) (0x000023C8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_INFOFRAME_DATA7_DB28 7:0 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA7_DB29 15:8 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA7_DB30 23:16 +#define NVCC7D_HEAD_SET_INFOFRAME_DATA7_DB31 31:24 +#define NVCC7D_HEAD_SET_RASTER_SIZE_FRACTION(a) (0x000023CC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RASTER_SIZE_FRACTION_HEIGHT 15:0 +#define NVCC7D_HEAD_SET_LTM_CONTROL(a) (0x000023D0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_CONTROL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_LTM_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_MODE 1:1 +#define NVCC7D_HEAD_SET_LTM_CONTROL_MODE_TMO (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_MODE_LTM (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_TONE_SELECT 2:2 +#define NVCC7D_HEAD_SET_LTM_CONTROL_TONE_SELECT_INTENSITY (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_TONE_SELECT_CDB (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_SKIN_TONE_ENABLE 3:3 +#define NVCC7D_HEAD_SET_LTM_CONTROL_SKIN_TONE_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_SKIN_TONE_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_INTERPOLATE 4:4 +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT8 5:5 +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT8_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT8_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT10 6:6 +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT10_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT10_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT_ROUND 7:7 +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT_ROUND_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_LUT_DIRECT_ROUND_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE 9:8 +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_MAX_RGB (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_LIN_I (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_PQI (0x00000002) +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_SOURCE_CDB (0x00000003) +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_RANGE 11:10 +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_10000 (0x00000000) +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_5000 (0x00000001) +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_2500 (0x00000002) +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_RANGE_RANGE_1250 (0x00000003) +#define NVCC7D_HEAD_SET_LTM_CONTROL_HIST_END_LINE 31:16 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C00(a) (0x000023D4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C00_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C01(a) (0x000023D8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C01_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C02(a) (0x000023DC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C02_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C03(a) (0x000023E0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C03_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C10(a) (0x000023E4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C10_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C11(a) (0x000023E8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C11_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C12(a) (0x000023EC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C12_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C13(a) (0x000023F0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C13_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C20(a) (0x000023F4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C20_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C21(a) (0x000023F8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C21_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C22(a) (0x000023FC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C22_VALUE 20:0 +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C23(a) (0x00002400 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_COEFF_C23_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C00(a) (0x00002404 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C00_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C01(a) (0x00002408 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C01_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C02(a) (0x0000240C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C02_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C03(a) (0x00002410 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C03_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C10(a) (0x00002414 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C10_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C11(a) (0x00002418 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C11_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C12(a) (0x0000241C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C12_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C13(a) (0x00002420 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C13_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C20(a) (0x00002424 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C20_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C21(a) (0x00002428 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C21_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C22(a) (0x0000242C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C22_VALUE 20:0 +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C23(a) (0x00002430 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_COEFF_C23_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_MAX_SELECTIVE_UPDATE(a) (0x00002434 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_MAX_SELECTIVE_UPDATE_SIZE 31:0 +#define NVCC7D_HEAD_SET_SELF_REFRESH_OVERRIDE(a) (0x00002438 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SELF_REFRESH_OVERRIDE_FRAME_RELEASE 0:0 +#define NVCC7D_HEAD_SET_SELF_REFRESH_OVERRIDE_FRAME_RELEASE_AUTOMATIC (0x00000000) +#define NVCC7D_HEAD_SET_SELF_REFRESH_OVERRIDE_FRAME_RELEASE_MANUAL (0x00000001) +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE(a) (0x0000243C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE_ENABLE 0:0 +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE_EARLY_REGION 1:1 +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE_EARLY_REGION_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE_EARLY_REGION_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_CURSOR_DIRTY(a) (0x00002440 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_CURSOR_DIRTY_STATE 0:0 +#define NVCC7D_HEAD_SET_CURSOR_DIRTY_STATE_FALSE (0x00000000) +#define NVCC7D_HEAD_SET_CURSOR_DIRTY_STATE_TRUE (0x00000001) +#define NVCC7D_HEAD_SET_DPM_CONTROL(a) (0x00002444 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_DPM_CONTROL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_DPM_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_DPM_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_DPM_CONTROL_ALPM 1:1 +#define NVCC7D_HEAD_SET_DPM_CONTROL_ALPM_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_DPM_CONTROL_ALPM_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_DPM_CONTROL_ALPM_TYPE 2:2 +#define NVCC7D_HEAD_SET_DPM_CONTROL_ALPM_TYPE_AUX_LESS (0x00000000) +#define NVCC7D_HEAD_SET_DPM_CONTROL_AS_SDP 3:3 +#define NVCC7D_HEAD_SET_DPM_CONTROL_AS_SDP_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_DPM_CONTROL_AS_SDP_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL(a) (0x00002448 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_ENABLE 0:0 +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_ENABLE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_ENABLE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_SELF_REFRESH 1:1 +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_SELF_REFRESH_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_SELF_REFRESH_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_MODE 3:2 +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_MODE_PSR1 (0x00000000) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_MODE_PANEL_REPLAY (0x00000002) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_CRC 4:4 +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_CRC_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_CRC_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_LOCATION 7:6 +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_LOCATION_VBLANK (0x00000000) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_LOCATION_VSYNC (0x00000001) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_LOCATION_LINE (0x00000002) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_LINE_ID 22:8 +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_CAPTURE_INDICATOR 23:23 +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_CAPTURE_INDICATOR_SAME (0x00000000) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_CAPTURE_INDICATOR_EARLY (0x00000001) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_IDLE_SDP 24:24 +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_IDLE_SDP_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_IDLE_SDP_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_OVERRIDE_SU_VSC 25:25 +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_OVERRIDE_SU_VSC_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_VSC_SDP_CTRL_OVERRIDE_SU_VSC_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_VSC_SDP_HEADER(a) (0x0000244C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_HEADER_HEADER_BYTE 31:0 +#define NVCC7D_HEAD_SET_VSC_SDP_DATA0(a) (0x00002450 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_DATA0_DATA_BYTE 31:0 +#define NVCC7D_HEAD_SET_VSC_SDP_DATA1(a) (0x00002454 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_DATA1_DATA_BYTE 31:0 +#define NVCC7D_HEAD_SET_VSC_SDP_DATA2(a) (0x00002458 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_DATA2_DATA_BYTE 31:0 +#define NVCC7D_HEAD_SET_VSC_SDP_DATA3(a) (0x0000245C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_DATA3_DATA_BYTE 31:0 +#define NVCC7D_HEAD_SET_VSC_SDP_DATA4(a) (0x00002460 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_DATA4_DATA_BYTE 31:0 +#define NVCC7D_HEAD_SET_VSC_SDP_DATA5(a) (0x00002464 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_DATA5_DATA_BYTE 31:0 +#define NVCC7D_HEAD_SET_VSC_SDP_DATA6(a) (0x00002468 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_DATA6_DATA_BYTE 31:0 +#define NVCC7D_HEAD_SET_VSC_SDP_DATA7(a) (0x0000246C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_VSC_SDP_DATA7_DATA_BYTE 31:0 +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL(a) (0x00002470 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_INPUT_MATRIX 0:0 +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_INPUT_MATRIX_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_INPUT_MATRIX_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_FVLUT 1:1 +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_FVLUT_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_FVLUT_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_INTERPOLATE 4:4 +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_MIRROR 5:5 +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_MIRROR_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_MIRROR_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE 7:6 +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE_CSCLUT_PQ (0x00000000) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE_CSCLUT_HLG (0x00000001) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_FVLUT_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_OUTPUT_MATRIX 2:2 +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_OUTPUT_MATRIX_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_RGB2ITP_CONTROL_ENABLE_OUTPUT_MATRIX_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_RGB2ITP_LUT_FP_NORM_SCALE(a) (0x00002474 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_RGB2ITP_LUT_FP_NORM_SCALE_VALUE 31:0 +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL(a) (0x00002478 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_INPUT_MATRIX 0:0 +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_INPUT_MATRIX_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_INPUT_MATRIX_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_FVLUT 1:1 +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_FVLUT_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_FVLUT_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_INTERPOLATE 4:4 +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_MIRROR 5:5 +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_MIRROR_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_MIRROR_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE 7:6 +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE_CSCLUT_PQ (0x00000000) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE_CSCLUT_HLG (0x00000001) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_FVLUT_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_OUTPUT_MATRIX 2:2 +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_OUTPUT_MATRIX_DISABLE (0x00000000) +#define NVCC7D_HEAD_SET_ITP2RGB_CONTROL_ENABLE_OUTPUT_MATRIX_ENABLE (0x00000001) +#define NVCC7D_HEAD_SET_ITP2RGB_LUT_FP_SCALE(a) (0x0000247C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_ITP2RGB_LUT_FP_SCALE_VALUE 15:0 +#define NVCC7D_HEAD_SET_BLANK_OUTPUT_COLOR(a) (0x00002484 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_BLANK_OUTPUT_COLOR_RED_CR 9:0 +#define NVCC7D_HEAD_SET_BLANK_OUTPUT_COLOR_GREEN_Y 19:10 +#define NVCC7D_HEAD_SET_BLANK_OUTPUT_COLOR_BLUE_CB 29:20 +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE_GRANULARITY(a) (0x0000249C + (a)*0x00000800) +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE_GRANULARITY_X 15:0 +#define NVCC7D_HEAD_SET_SELECTIVE_UPDATE_GRANULARITY_Y 31:16 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C00(a) (0x000024A0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C00_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C01(a) (0x000024A4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C01_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C02(a) (0x000024A8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C02_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C03(a) (0x000024AC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C03_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C10(a) (0x000024B0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C10_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C11(a) (0x000024B4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C11_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C12(a) (0x000024B8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C12_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C13(a) (0x000024BC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C13_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C20(a) (0x000024C0 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C20_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C21(a) (0x000024C4 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C21_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C22(a) (0x000024C8 + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C22_VALUE 20:0 +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C23(a) (0x000024CC + (a)*0x00000800) +#define NVCC7D_HEAD_SET_LTM_HIST_COEFF_C23_VALUE 20:0 + +#define NVCC7D_TILE_SET_TILE_SIZE(a) (0x00006000 + (a)*0x00000200) +#define NVCC7D_TILE_SET_TILE_SIZE_START 14:0 +#define NVCC7D_TILE_SET_TILE_SIZE_WIDTH 30:16 +#define NVCC7D_TILE_SET_CMI_LUT_SEGMENT_SIZE(a) (0x00006074 + (a)*0x00000200) +#define NVCC7D_TILE_SET_CMI_LUT_SEGMENT_SIZE_IDX 5:0 +#define NVCC7D_TILE_SET_CMI_LUT_SEGMENT_SIZE_VALUE 8:6 +#define NVCC7D_TILE_SET_CMI_LUT_ENTRY(a) (0x00006078 + (a)*0x00000200) +#define NVCC7D_TILE_SET_CMI_LUT_ENTRY_IDX 10:0 +#define NVCC7D_TILE_SET_CMI_LUT_ENTRY_VALUE 24:11 +#define NVCC7D_TILE_SET_CMI_LUT_ENTRY_LAST 25:25 +#define NVCC7D_TILE_SET_CMI_LUT_ENTRY_LAST_FALSE (0x00000000) +#define NVCC7D_TILE_SET_CMI_LUT_ENTRY_LAST_TRUE (0x00000001) +#define NVCC7D_TILE_SET_CMO_LUT_SEGMENT_SIZE(a) (0x0000607C + (a)*0x00000200) +#define NVCC7D_TILE_SET_CMO_LUT_SEGMENT_SIZE_IDX 5:0 +#define NVCC7D_TILE_SET_CMO_LUT_SEGMENT_SIZE_VALUE 8:6 +#define NVCC7D_TILE_SET_CMO_LUT_ENTRY(a) (0x00006080 + (a)*0x00000200) +#define NVCC7D_TILE_SET_CMO_LUT_ENTRY_IDX 10:0 +#define NVCC7D_TILE_SET_CMO_LUT_ENTRY_VALUE 26:11 +#define NVCC7D_TILE_SET_CMO_LUT_ENTRY_LAST 27:27 +#define NVCC7D_TILE_SET_CMO_LUT_ENTRY_LAST_FALSE (0x00000000) +#define NVCC7D_TILE_SET_CMO_LUT_ENTRY_LAST_TRUE (0x00000001) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clcc7d_h diff --git a/userspace/sdks/nv570/inc/class/clcc7e.h b/userspace/sdks/nv570/inc/class/clcc7e.h new file mode 100644 index 0000000..4475183 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcc7e.h @@ -0,0 +1,917 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcc7e_h_ +#define _clcc7e_h_ + + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVCC7E_WINDOW_CHANNEL_DMA (0x0000CC7E) + +// dma opcode instructions +#define NVCC7E_DMA +#define NVCC7E_DMA_OPCODE 31:29 +#define NVCC7E_DMA_OPCODE_METHOD 0x00000000 +#define NVCC7E_DMA_OPCODE_JUMP 0x00000001 +#define NVCC7E_DMA_OPCODE_NONINC_METHOD 0x00000002 +#define NVCC7E_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003 +#define NVCC7E_DMA_METHOD_COUNT 27:18 +#define NVCC7E_DMA_METHOD_OFFSET 15:2 +#define NVCC7E_DMA_DATA 31:0 +#define NVCC7E_DMA_DATA_NOP 0x00000000 +#define NVCC7E_DMA_JUMP_OFFSET 15:2 +#define NVCC7E_DMA_SET_SUBDEVICE_MASK_VALUE 11:0 + +// class methods +#define NVCC7E_PUT (0x00000000) +#define NVCC7E_PUT_PTR 13:0 +#define NVCC7E_GET (0x00000004) +#define NVCC7E_GET_PTR 13:0 +#define NVCC7E_UPDATE (0x00000200) +#define NVCC7E_UPDATE_RELEASE_ELV 0:0 +#define NVCC7E_UPDATE_RELEASE_ELV_FALSE (0x00000000) +#define NVCC7E_UPDATE_RELEASE_ELV_TRUE (0x00000001) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN 8:4 +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_NONE (0x00000000) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN(i) (0x00000001 +(i)) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN__SIZE_1 16 +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_0 (0x00000001) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_1 (0x00000002) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_2 (0x00000003) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_3 (0x00000004) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_4 (0x00000005) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_5 (0x00000006) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_6 (0x00000007) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_7 (0x00000008) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_8 (0x00000009) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_9 (0x0000000A) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_A (0x0000000B) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_B (0x0000000C) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_C (0x0000000D) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_D (0x0000000E) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_E (0x0000000F) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_LOCK_PIN_F (0x00000010) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_0 (0x00000014) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_1 (0x00000015) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_2 (0x00000016) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_FLIP_LOCK_3 (0x00000017) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK(i) (0x00000018 +(i)) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK__SIZE_1 8 +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_0 (0x00000018) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_1 (0x00000019) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_2 (0x0000001A) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_3 (0x0000001B) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_4 (0x0000001C) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_5 (0x0000001D) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_6 (0x0000001E) +#define NVCC7E_UPDATE_FLIP_LOCK_PIN_INTERNAL_SCAN_LOCK_7 (0x0000001F) +#define NVCC7E_UPDATE_INTERLOCK_WITH_WIN_IMM 12:12 +#define NVCC7E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000) +#define NVCC7E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001) +#define NVCC7E_UPDATE_FORCE_FULLSCREEN 16:16 +#define NVCC7E_UPDATE_FORCE_FULLSCREEN_FALSE (0x00000000) +#define NVCC7E_UPDATE_FORCE_FULLSCREEN_TRUE (0x00000001) +#define NVCC7E_SET_SEMAPHORE_ACQUIRE_HI (0x00000204) +#define NVCC7E_SET_SEMAPHORE_ACQUIRE_HI_VALUE 31:0 +#define NVCC7E_GET_LINE (0x00000208) +#define NVCC7E_GET_LINE_LINE 15:0 +#define NVCC7E_SET_SEMAPHORE_CONTROL (0x0000020C) +#define NVCC7E_SET_SEMAPHORE_CONTROL_SKIP_ACQ 11:11 +#define NVCC7E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_FALSE (0x00000000) +#define NVCC7E_SET_SEMAPHORE_CONTROL_SKIP_ACQ_TRUE (0x00000001) +#define NVCC7E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVCC7E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVCC7E_SET_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVCC7E_SET_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVCC7E_SET_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVCC7E_SET_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVCC7E_SET_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVCC7E_SET_SEMAPHORE_CONTROL_REL_MODE 14:14 +#define NVCC7E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE (0x00000000) +#define NVCC7E_SET_SEMAPHORE_CONTROL_REL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCC7E_SET_SEMAPHORE_ACQUIRE (0x00000210) +#define NVCC7E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0 +#define NVCC7E_SET_SEMAPHORE_RELEASE (0x00000214) +#define NVCC7E_SET_SEMAPHORE_RELEASE_VALUE 31:0 +#define NVCC7E_SET_NOTIFIER_CONTROL (0x00000220) +#define NVCC7E_SET_NOTIFIER_CONTROL_MODE 0:0 +#define NVCC7E_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000) +#define NVCC7E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001) +#define NVCC7E_SET_SIZE (0x00000224) +#define NVCC7E_SET_SIZE_WIDTH 15:0 +#define NVCC7E_SET_SIZE_HEIGHT 31:16 +#define NVCC7E_SET_STORAGE (0x00000228) +#define NVCC7E_SET_STORAGE_BLOCK_HEIGHT 3:0 +#define NVCC7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB (0x00000000) +#define NVCC7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS (0x00000001) +#define NVCC7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS (0x00000002) +#define NVCC7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS (0x00000003) +#define NVCC7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS (0x00000004) +#define NVCC7E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS (0x00000005) +#define NVCC7E_SET_PARAMS (0x0000022C) +#define NVCC7E_SET_PARAMS_FORMAT 7:0 +#define NVCC7E_SET_PARAMS_FORMAT_I8 (0x0000001E) +#define NVCC7E_SET_PARAMS_FORMAT_R4G4B4A4 (0x0000002F) +#define NVCC7E_SET_PARAMS_FORMAT_R5G6B5 (0x000000E8) +#define NVCC7E_SET_PARAMS_FORMAT_A1R5G5B5 (0x000000E9) +#define NVCC7E_SET_PARAMS_FORMAT_R5G5B5A1 (0x0000002E) +#define NVCC7E_SET_PARAMS_FORMAT_A8R8G8B8 (0x000000CF) +#define NVCC7E_SET_PARAMS_FORMAT_X8R8G8B8 (0x000000E6) +#define NVCC7E_SET_PARAMS_FORMAT_A8B8G8R8 (0x000000D5) +#define NVCC7E_SET_PARAMS_FORMAT_X8B8G8R8 (0x000000F9) +#define NVCC7E_SET_PARAMS_FORMAT_A2R10G10B10 (0x000000DF) +#define NVCC7E_SET_PARAMS_FORMAT_A2B10G10R10 (0x000000D1) +#define NVCC7E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS (0x00000023) +#define NVCC7E_SET_PARAMS_FORMAT_R16_G16_B16_A16 (0x000000C6) +#define NVCC7E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16 (0x000000CA) +#define NVCC7E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422 (0x00000028) +#define NVCC7E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422 (0x00000029) +#define NVCC7E_SET_PARAMS_FORMAT_Y8___U8V8_N444 (0x00000035) +#define NVCC7E_SET_PARAMS_FORMAT_Y8___U8V8_N422 (0x00000036) +#define NVCC7E_SET_PARAMS_FORMAT_Y8___V8U8_N420 (0x00000038) +#define NVCC7E_SET_PARAMS_FORMAT_Y8___U8___V8_N444 (0x0000003A) +#define NVCC7E_SET_PARAMS_FORMAT_Y8___U8___V8_N420 (0x0000003B) +#define NVCC7E_SET_PARAMS_FORMAT_Y10___U10V10_N444 (0x00000055) +#define NVCC7E_SET_PARAMS_FORMAT_Y10___U10V10_N422 (0x00000056) +#define NVCC7E_SET_PARAMS_FORMAT_Y10___V10U10_N420 (0x00000058) +#define NVCC7E_SET_PARAMS_FORMAT_Y12___U12V12_N444 (0x00000075) +#define NVCC7E_SET_PARAMS_FORMAT_Y12___U12V12_N422 (0x00000076) +#define NVCC7E_SET_PARAMS_FORMAT_Y12___V12U12_N420 (0x00000078) +#define NVCC7E_SET_PARAMS_CLAMP_BEFORE_BLEND 18:18 +#define NVCC7E_SET_PARAMS_CLAMP_BEFORE_BLEND_DISABLE (0x00000000) +#define NVCC7E_SET_PARAMS_CLAMP_BEFORE_BLEND_ENABLE (0x00000001) +#define NVCC7E_SET_PARAMS_SWAP_UV 19:19 +#define NVCC7E_SET_PARAMS_SWAP_UV_DISABLE (0x00000000) +#define NVCC7E_SET_PARAMS_SWAP_UV_ENABLE (0x00000001) +#define NVCC7E_SET_PARAMS_FMT_ROUNDING_MODE 22:22 +#define NVCC7E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_TO_NEAREST (0x00000000) +#define NVCC7E_SET_PARAMS_FMT_ROUNDING_MODE_ROUND_DOWN (0x00000001) +#define NVCC7E_SET_PLANAR_STORAGE(b) (0x00000230 + (b)*0x00000004) +#define NVCC7E_SET_PLANAR_STORAGE_PITCH 12:0 +#define NVCC7E_SET_SEMAPHORE_RELEASE_HI (0x0000023C) +#define NVCC7E_SET_SEMAPHORE_RELEASE_HI_VALUE 31:0 +#define NVCC7E_SET_SURFACE_ADDRESS_HI_BEGUN_SEMAPHORE_ARRAY (0x00000240) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_BEGUN_SEMAPHORE_ARRAY_ADDRESS_HI 31:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY (0x00000244) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ADDRESS_LO 31:4 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET 3:2 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_IOVA (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ENABLE 0:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_BEGUN_SEMAPHORE_ARRAY_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_FINISH_SEMAPHORE_ARRAY (0x00000248) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_FINISH_SEMAPHORE_ARRAY_ADDRESS_HI 31:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY (0x0000024C) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ADDRESS_LO 31:4 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET 3:2 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_IOVA (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ENABLE 0:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_FINISH_SEMAPHORE_ARRAY_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_POINT_IN(b) (0x00000290 + (b)*0x00000004) +#define NVCC7E_SET_POINT_IN_X 15:0 +#define NVCC7E_SET_POINT_IN_Y 31:16 +#define NVCC7E_SET_SIZE_IN (0x00000298) +#define NVCC7E_SET_SIZE_IN_WIDTH 15:0 +#define NVCC7E_SET_SIZE_IN_HEIGHT 31:16 +#define NVCC7E_SET_SIZE_OUT (0x000002A4) +#define NVCC7E_SET_SIZE_OUT_WIDTH 15:0 +#define NVCC7E_SET_SIZE_OUT_HEIGHT 31:16 +#define NVCC7E_SET_CONTROL_INPUT_SCALER (0x000002A8) +#define NVCC7E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS 2:0 +#define NVCC7E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_2 (0x00000001) +#define NVCC7E_SET_CONTROL_INPUT_SCALER_VERTICAL_TAPS_TAPS_5 (0x00000004) +#define NVCC7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS 6:4 +#define NVCC7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_2 (0x00000001) +#define NVCC7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_TAPS_TAPS_5 (0x00000004) +#define NVCC7E_SET_CONTROL_INPUT_SCALER_VERTICAL_FORCE_ENABLE 8:8 +#define NVCC7E_SET_CONTROL_INPUT_SCALER_VERTICAL_FORCE_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_CONTROL_INPUT_SCALER_VERTICAL_FORCE_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_FORCE_ENABLE 9:9 +#define NVCC7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_FORCE_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_CONTROL_INPUT_SCALER_HORIZONTAL_FORCE_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_INPUT_SCALER_COEFF_VALUE (0x000002AC) +#define NVCC7E_SET_INPUT_SCALER_COEFF_VALUE_DATA 9:0 +#define NVCC7E_SET_INPUT_SCALER_COEFF_VALUE_INDEX 19:12 +#define NVCC7E_SET_COMPOSITION_CONTROL (0x000002EC) +#define NVCC7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT 1:0 +#define NVCC7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DISABLE (0x00000000) +#define NVCC7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_SRC (0x00000001) +#define NVCC7E_SET_COMPOSITION_CONTROL_COLOR_KEY_SELECT_DST (0x00000002) +#define NVCC7E_SET_COMPOSITION_CONTROL_DEPTH 11:4 +#define NVCC7E_SET_COMPOSITION_CONTROL_BYPASS 16:16 +#define NVCC7E_SET_COMPOSITION_CONTROL_BYPASS_DISABLE (0x00000000) +#define NVCC7E_SET_COMPOSITION_CONTROL_BYPASS_ENABLE (0x00000001) +#define NVCC7E_SET_COMPOSITION_CONSTANT_ALPHA (0x000002F0) +#define NVCC7E_SET_COMPOSITION_CONSTANT_ALPHA_K1 7:0 +#define NVCC7E_SET_COMPOSITION_CONSTANT_ALPHA_K2 15:8 +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT (0x000002F4) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT 3:0 +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT 7:4 +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_SRC (0x00000005) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT 11:8 +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT 15:12 +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1 (0x00000004) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_K1_TIMES_DST (0x00000006) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_COLOR_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT 19:16 +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K1 (0x00000002) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT 23:20 +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K1 (0x00000002) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_SRC_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_DST (0x00000008) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT 27:24 +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_ONE (0x00000001) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_K2 (0x00000003) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT 31:28 +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ZERO (0x00000000) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_ONE (0x00000001) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_K2 (0x00000003) +#define NVCC7E_SET_COMPOSITION_FACTOR_SELECT_DST_ALPHA_FACTOR_NO_MATCH_SELECT_NEG_K1_TIMES_SRC (0x00000007) +#define NVCC7E_SET_KEY_ALPHA (0x000002F8) +#define NVCC7E_SET_KEY_ALPHA_MIN 15:0 +#define NVCC7E_SET_KEY_ALPHA_MAX 31:16 +#define NVCC7E_SET_KEY_RED_CR (0x000002FC) +#define NVCC7E_SET_KEY_RED_CR_MIN 15:0 +#define NVCC7E_SET_KEY_RED_CR_MAX 31:16 +#define NVCC7E_SET_KEY_GREEN_Y (0x00000300) +#define NVCC7E_SET_KEY_GREEN_Y_MIN 15:0 +#define NVCC7E_SET_KEY_GREEN_Y_MAX 31:16 +#define NVCC7E_SET_KEY_BLUE_CB (0x00000304) +#define NVCC7E_SET_KEY_BLUE_CB_MIN 15:0 +#define NVCC7E_SET_KEY_BLUE_CB_MAX 31:16 +#define NVCC7E_SET_PRESENT_CONTROL (0x00000308) +#define NVCC7E_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 3:0 +#define NVCC7E_SET_PRESENT_CONTROL_BEGIN_MODE 6:4 +#define NVCC7E_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000) +#define NVCC7E_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001) +#define NVCC7E_SET_PRESENT_CONTROL_TIMESTAMP_MODE 8:8 +#define NVCC7E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_DISABLE (0x00000000) +#define NVCC7E_SET_PRESENT_CONTROL_TIMESTAMP_MODE_ENABLE (0x00000001) +#define NVCC7E_SET_PRESENT_CONTROL_STEREO_MODE 13:12 +#define NVCC7E_SET_PRESENT_CONTROL_STEREO_MODE_MONO (0x00000000) +#define NVCC7E_SET_PRESENT_CONTROL_STEREO_MODE_PAIR_FLIP (0x00000001) +#define NVCC7E_SET_PRESENT_CONTROL_STEREO_MODE_AT_ANY_FRAME (0x00000002) +#define NVCC7E_SET_ACQ_SEMAPHORE_VALUE_HI (0x0000030C) +#define NVCC7E_SET_ACQ_SEMAPHORE_VALUE_HI_VALUE 31:0 +#define NVCC7E_SET_ACQ_SEMAPHORE_CONTROL (0x00000330) +#define NVCC7E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE 15:15 +#define NVCC7E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_32BIT (0x00000000) +#define NVCC7E_SET_ACQ_SEMAPHORE_CONTROL_PAYLOAD_SIZE_PAYLOAD_64BIT (0x00000001) +#define NVCC7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE 13:12 +#define NVCC7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_EQ (0x00000000) +#define NVCC7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_CGEQ (0x00000001) +#define NVCC7E_SET_ACQ_SEMAPHORE_CONTROL_ACQ_MODE_STRICT_GEQ (0x00000002) +#define NVCC7E_SET_ACQ_SEMAPHORE_VALUE (0x00000334) +#define NVCC7E_SET_ACQ_SEMAPHORE_VALUE_VALUE 31:0 +#define NVCC7E_SET_SCAN_DIRECTION (0x0000033C) +#define NVCC7E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION 0:0 +#define NVCC7E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_LEFT (0x00000000) +#define NVCC7E_SET_SCAN_DIRECTION_HORIZONTAL_DIRECTION_FROM_RIGHT (0x00000001) +#define NVCC7E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION 1:1 +#define NVCC7E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_TOP (0x00000000) +#define NVCC7E_SET_SCAN_DIRECTION_VERTICAL_DIRECTION_FROM_BOTTOM (0x00000001) +#define NVCC7E_SET_SCAN_DIRECTION_COLUMN_ORDER 2:2 +#define NVCC7E_SET_SCAN_DIRECTION_COLUMN_ORDER_FALSE (0x00000000) +#define NVCC7E_SET_SCAN_DIRECTION_COLUMN_ORDER_TRUE (0x00000001) +#define NVCC7E_SET_TIMESTAMP_ORIGIN_LO (0x00000340) +#define NVCC7E_SET_TIMESTAMP_ORIGIN_LO_TIMESTAMP_LO 31:0 +#define NVCC7E_SET_TIMESTAMP_ORIGIN_HI (0x00000344) +#define NVCC7E_SET_TIMESTAMP_ORIGIN_HI_TIMESTAMP_HI 31:0 +#define NVCC7E_SET_UPDATE_TIMESTAMP_LO (0x00000348) +#define NVCC7E_SET_UPDATE_TIMESTAMP_LO_TIMESTAMP_LO 31:0 +#define NVCC7E_SET_UPDATE_TIMESTAMP_HI (0x0000034C) +#define NVCC7E_SET_UPDATE_TIMESTAMP_HI_TIMESTAMP_HI 31:0 +#define NVCC7E_SET_INTERLOCK_FLAGS (0x00000370) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE 0:0 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CORE_ENABLE (0x00000001) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR(i) ((i)+1):((i)+1) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR__SIZE_1 8 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR_ENABLE (0x00000001) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0 1:1 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1 2:2 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2 3:3 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR2_ENABLE (0x00000001) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3 4:4 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR3_ENABLE (0x00000001) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4 5:5 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR4_ENABLE (0x00000001) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5 6:6 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR5_ENABLE (0x00000001) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6 7:7 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR6_ENABLE (0x00000001) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7 8:8 +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_DISABLE (0x00000000) +#define NVCC7E_SET_INTERLOCK_FLAGS_INTERLOCK_WITH_CURSOR7_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS (0x00000374) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW(i) ((i)+0):((i)+0) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW__SIZE_1 32 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0 0:0 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW0_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1 1:1 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW1_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2 2:2 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW2_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3 3:3 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW3_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4 4:4 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW4_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5 5:5 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW5_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6 6:6 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW6_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7 7:7 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW7_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8 8:8 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW8_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9 9:9 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW9_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10 10:10 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW10_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11 11:11 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW11_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12 12:12 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW12_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13 13:13 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW13_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14 14:14 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW14_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15 15:15 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW15_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16 16:16 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW16_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17 17:17 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW17_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18 18:18 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW18_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19 19:19 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW19_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20 20:20 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW20_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21 21:21 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW21_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22 22:22 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW22_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23 23:23 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW23_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24 24:24 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW24_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25 25:25 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW25_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26 26:26 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW26_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27 27:27 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW27_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28 28:28 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW28_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29 29:29 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW29_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30 30:30 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW30_ENABLE (0x00000001) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31 31:31 +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_DISABLE (0x00000000) +#define NVCC7E_SET_WINDOW_INTERLOCK_FLAGS_INTERLOCK_WITH_WINDOW31_ENABLE (0x00000001) +#define NVCC7E_SET_CHROMA_VER (0x00000378) +#define NVCC7E_SET_CHROMA_VER_POSITION 1:0 +#define NVCC7E_SET_CHROMA_VER_POSITION_TOP (0x00000000) +#define NVCC7E_SET_CHROMA_VER_POSITION_CENTER (0x00000001) +#define NVCC7E_SET_CHROMA_VER_POSITION_BOTTOM (0x00000002) +#define NVCC7E_SET_CHROMA_VER_USE_SWPOSITION 2:2 +#define NVCC7E_SET_CHROMA_VER_USE_SWPOSITION_FALSE (0x00000000) +#define NVCC7E_SET_CHROMA_VER_USE_SWPOSITION_TRUE (0x00000001) +#define NVCC7E_SET_CHROMA_VER_WEIGHT_ODD 4:3 +#define NVCC7E_SET_CHROMA_VER_WEIGHT_ODD_WT_0 (0x00000000) +#define NVCC7E_SET_CHROMA_VER_WEIGHT_ODD_WT_QUARTER (0x00000001) +#define NVCC7E_SET_CHROMA_VER_WEIGHT_ODD_WT_HALF (0x00000002) +#define NVCC7E_SET_CHROMA_VER_WEIGHT_ODD_WT_THREE_QUARTER (0x00000003) +#define NVCC7E_SET_CHROMA_VER_WEIGHT_EVEN 6:5 +#define NVCC7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_0 (0x00000000) +#define NVCC7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_QUARTER (0x00000001) +#define NVCC7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_HALF (0x00000002) +#define NVCC7E_SET_CHROMA_VER_WEIGHT_EVEN_WT_THREE_QUARTER (0x00000003) +#define NVCC7E_SET_CHROMA_VER_USE_SWWEIGHTS 7:7 +#define NVCC7E_SET_CHROMA_VER_USE_SWWEIGHTS_FALSE (0x00000000) +#define NVCC7E_SET_CHROMA_VER_USE_SWWEIGHTS_TRUE (0x00000001) +#define NVCC7E_SET_CHROMA_HOR (0x0000037C) +#define NVCC7E_SET_CHROMA_HOR_REPLACE_ODD 0:0 +#define NVCC7E_SET_CHROMA_HOR_REPLACE_ODD_DISABLE (0x00000000) +#define NVCC7E_SET_CHROMA_HOR_REPLACE_ODD_ENABLE (0x00000001) +#define NVCC7E_SET_CHROMA_HOR_REPLACE_EVEN 1:1 +#define NVCC7E_SET_CHROMA_HOR_REPLACE_EVEN_DISABLE (0x00000000) +#define NVCC7E_SET_CHROMA_HOR_REPLACE_EVEN_ENABLE (0x00000001) +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_ODD 3:2 +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_0 (0x00000000) +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_QUARTER (0x00000001) +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_HALF (0x00000002) +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_ODD_WT_THREE_QUARTER (0x00000003) +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_EVEN 5:4 +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_0 (0x00000000) +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_QUARTER (0x00000001) +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_HALF (0x00000002) +#define NVCC7E_SET_CHROMA_HOR_WEIGHT_EVEN_WT_THREE_QUARTER (0x00000003) +#define NVCC7E_SET_CHROMA_HOR_USE_SWWEIGHTS 6:6 +#define NVCC7E_SET_CHROMA_HOR_USE_SWWEIGHTS_FALSE (0x00000000) +#define NVCC7E_SET_CHROMA_HOR_USE_SWWEIGHTS_TRUE (0x00000001) +#define NVCC7E_SET_EXT_PACKET_CONTROL (0x00000398) +#define NVCC7E_SET_EXT_PACKET_CONTROL_ENABLE 0:0 +#define NVCC7E_SET_EXT_PACKET_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_EXT_PACKET_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_EXT_PACKET_CONTROL_LOCATION 4:4 +#define NVCC7E_SET_EXT_PACKET_CONTROL_LOCATION_VSYNC (0x00000000) +#define NVCC7E_SET_EXT_PACKET_CONTROL_LOCATION_VBLANK (0x00000001) +#define NVCC7E_SET_EXT_PACKET_CONTROL_FREQUENCY 8:8 +#define NVCC7E_SET_EXT_PACKET_CONTROL_FREQUENCY_EVERY_FRAME (0x00000000) +#define NVCC7E_SET_EXT_PACKET_CONTROL_FREQUENCY_ONCE (0x00000001) +#define NVCC7E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE 12:12 +#define NVCC7E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_DISABLE (0x00000000) +#define NVCC7E_SET_EXT_PACKET_CONTROL_HEADER_OVERRIDE_ENABLE (0x00000001) +#define NVCC7E_SET_EXT_PACKET_CONTROL_SIZE 27:16 +#define NVCC7E_SET_EXT_PACKET_DATA (0x0000039C) +#define NVCC7E_SET_EXT_PACKET_DATA_DB0 7:0 +#define NVCC7E_SET_EXT_PACKET_DATA_DB1 15:8 +#define NVCC7E_SET_EXT_PACKET_DATA_DB2 23:16 +#define NVCC7E_SET_EXT_PACKET_DATA_DB3 31:24 +#define NVCC7E_SET_WIN_INFOFRAME (0x000003A0) +#define NVCC7E_SET_WIN_INFOFRAME_FID 7:0 +#define NVCC7E_SET_WIN_INFOFRAME_EN 16:16 +#define NVCC7E_SET_WIN_INFOFRAME_EN_DISABLE (0x00000000) +#define NVCC7E_SET_WIN_INFOFRAME_EN_ENABLE (0x00000001) +#define NVCC7E_SET_FMT_COEFFICIENT_C00 (0x00000400) +#define NVCC7E_SET_FMT_COEFFICIENT_C00_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C01 (0x00000404) +#define NVCC7E_SET_FMT_COEFFICIENT_C01_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C02 (0x00000408) +#define NVCC7E_SET_FMT_COEFFICIENT_C02_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C03 (0x0000040C) +#define NVCC7E_SET_FMT_COEFFICIENT_C03_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C10 (0x00000410) +#define NVCC7E_SET_FMT_COEFFICIENT_C10_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C11 (0x00000414) +#define NVCC7E_SET_FMT_COEFFICIENT_C11_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C12 (0x00000418) +#define NVCC7E_SET_FMT_COEFFICIENT_C12_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C13 (0x0000041C) +#define NVCC7E_SET_FMT_COEFFICIENT_C13_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C20 (0x00000420) +#define NVCC7E_SET_FMT_COEFFICIENT_C20_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C21 (0x00000424) +#define NVCC7E_SET_FMT_COEFFICIENT_C21_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C22 (0x00000428) +#define NVCC7E_SET_FMT_COEFFICIENT_C22_VALUE 20:0 +#define NVCC7E_SET_FMT_COEFFICIENT_C23 (0x0000042C) +#define NVCC7E_SET_FMT_COEFFICIENT_C23_VALUE 20:0 +#define NVCC7E_SET_ILUT_CONTROL (0x00000440) +#define NVCC7E_SET_ILUT_CONTROL_INTERPOLATE 0:0 +#define NVCC7E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7E_SET_ILUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7E_SET_ILUT_CONTROL_MIRROR 1:1 +#define NVCC7E_SET_ILUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCC7E_SET_ILUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCC7E_SET_ILUT_CONTROL_MODE 3:2 +#define NVCC7E_SET_ILUT_CONTROL_MODE_SEGMENTED (0x00000000) +#define NVCC7E_SET_ILUT_CONTROL_MODE_DIRECT8 (0x00000001) +#define NVCC7E_SET_ILUT_CONTROL_MODE_DIRECT10 (0x00000002) +#define NVCC7E_SET_ILUT_CONTROL_SIZE 18:8 +#define NVCC7E_SET_CSC00CONTROL (0x0000045C) +#define NVCC7E_SET_CSC00CONTROL_ENABLE 0:0 +#define NVCC7E_SET_CSC00CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_CSC00CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_CSC00COEFFICIENT_C00 (0x00000460) +#define NVCC7E_SET_CSC00COEFFICIENT_C00_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C01 (0x00000464) +#define NVCC7E_SET_CSC00COEFFICIENT_C01_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C02 (0x00000468) +#define NVCC7E_SET_CSC00COEFFICIENT_C02_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C03 (0x0000046C) +#define NVCC7E_SET_CSC00COEFFICIENT_C03_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C10 (0x00000470) +#define NVCC7E_SET_CSC00COEFFICIENT_C10_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C11 (0x00000474) +#define NVCC7E_SET_CSC00COEFFICIENT_C11_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C12 (0x00000478) +#define NVCC7E_SET_CSC00COEFFICIENT_C12_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C13 (0x0000047C) +#define NVCC7E_SET_CSC00COEFFICIENT_C13_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C20 (0x00000480) +#define NVCC7E_SET_CSC00COEFFICIENT_C20_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C21 (0x00000484) +#define NVCC7E_SET_CSC00COEFFICIENT_C21_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C22 (0x00000488) +#define NVCC7E_SET_CSC00COEFFICIENT_C22_VALUE 20:0 +#define NVCC7E_SET_CSC00COEFFICIENT_C23 (0x0000048C) +#define NVCC7E_SET_CSC00COEFFICIENT_C23_VALUE 20:0 +#define NVCC7E_SET_CSC0LUT_FP_NORM_SCALE (0x00000490) +#define NVCC7E_SET_CSC0LUT_FP_NORM_SCALE_VALUE 31:0 +#define NVCC7E_SET_CSC0LUT_CONTROL (0x000004A0) +#define NVCC7E_SET_CSC0LUT_CONTROL_INTERPOLATE 0:0 +#define NVCC7E_SET_CSC0LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7E_SET_CSC0LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7E_SET_CSC0LUT_CONTROL_MIRROR 1:1 +#define NVCC7E_SET_CSC0LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCC7E_SET_CSC0LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCC7E_SET_CSC0LUT_CONTROL_ENABLE 4:4 +#define NVCC7E_SET_CSC0LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_CSC0LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_CSC0LUT_CONTROL_CURVE 6:5 +#define NVCC7E_SET_CSC0LUT_CONTROL_CURVE_CSCLUT_PQ (0x00000000) +#define NVCC7E_SET_CSC0LUT_CONTROL_CURVE_CSCLUT_HLG (0x00000001) +#define NVCC7E_SET_CSC0LUT_CONTROL_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCC7E_SET_CSC01CONTROL (0x000004BC) +#define NVCC7E_SET_CSC01CONTROL_ENABLE 0:0 +#define NVCC7E_SET_CSC01CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_CSC01CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_CSC01COEFFICIENT_C00 (0x000004C0) +#define NVCC7E_SET_CSC01COEFFICIENT_C00_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C01 (0x000004C4) +#define NVCC7E_SET_CSC01COEFFICIENT_C01_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C02 (0x000004C8) +#define NVCC7E_SET_CSC01COEFFICIENT_C02_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C03 (0x000004CC) +#define NVCC7E_SET_CSC01COEFFICIENT_C03_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C10 (0x000004D0) +#define NVCC7E_SET_CSC01COEFFICIENT_C10_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C11 (0x000004D4) +#define NVCC7E_SET_CSC01COEFFICIENT_C11_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C12 (0x000004D8) +#define NVCC7E_SET_CSC01COEFFICIENT_C12_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C13 (0x000004DC) +#define NVCC7E_SET_CSC01COEFFICIENT_C13_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C20 (0x000004E0) +#define NVCC7E_SET_CSC01COEFFICIENT_C20_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C21 (0x000004E4) +#define NVCC7E_SET_CSC01COEFFICIENT_C21_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C22 (0x000004E8) +#define NVCC7E_SET_CSC01COEFFICIENT_C22_VALUE 20:0 +#define NVCC7E_SET_CSC01COEFFICIENT_C23 (0x000004EC) +#define NVCC7E_SET_CSC01COEFFICIENT_C23_VALUE 20:0 +#define NVCC7E_SET_TMO_CONTROL (0x00000500) +#define NVCC7E_SET_TMO_CONTROL_INTERPOLATE 0:0 +#define NVCC7E_SET_TMO_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7E_SET_TMO_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7E_SET_TMO_CONTROL_SAT_MODE 3:2 +#define NVCC7E_SET_TMO_CONTROL_SIZE 18:8 +#define NVCC7E_SET_TMO_LOW_INTENSITY_ZONE (0x00000508) +#define NVCC7E_SET_TMO_LOW_INTENSITY_ZONE_END 29:16 +#define NVCC7E_SET_TMO_LOW_INTENSITY_VALUE (0x0000050C) +#define NVCC7E_SET_TMO_LOW_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVCC7E_SET_TMO_LOW_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVCC7E_SET_TMO_LOW_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVCC7E_SET_TMO_MEDIUM_INTENSITY_ZONE (0x00000510) +#define NVCC7E_SET_TMO_MEDIUM_INTENSITY_ZONE_START 13:0 +#define NVCC7E_SET_TMO_MEDIUM_INTENSITY_ZONE_END 29:16 +#define NVCC7E_SET_TMO_MEDIUM_INTENSITY_VALUE (0x00000514) +#define NVCC7E_SET_TMO_MEDIUM_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVCC7E_SET_TMO_MEDIUM_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVCC7E_SET_TMO_MEDIUM_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVCC7E_SET_TMO_HIGH_INTENSITY_ZONE (0x00000518) +#define NVCC7E_SET_TMO_HIGH_INTENSITY_ZONE_START 13:0 +#define NVCC7E_SET_TMO_HIGH_INTENSITY_VALUE (0x0000051C) +#define NVCC7E_SET_TMO_HIGH_INTENSITY_VALUE_LIN_WEIGHT 8:0 +#define NVCC7E_SET_TMO_HIGH_INTENSITY_VALUE_NON_LIN_WEIGHT 20:12 +#define NVCC7E_SET_TMO_HIGH_INTENSITY_VALUE_THRESHOLD 31:24 +#define NVCC7E_SET_CSC10CONTROL (0x0000053C) +#define NVCC7E_SET_CSC10CONTROL_ENABLE 0:0 +#define NVCC7E_SET_CSC10CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_CSC10CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_CSC10COEFFICIENT_C00 (0x00000540) +#define NVCC7E_SET_CSC10COEFFICIENT_C00_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C01 (0x00000544) +#define NVCC7E_SET_CSC10COEFFICIENT_C01_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C02 (0x00000548) +#define NVCC7E_SET_CSC10COEFFICIENT_C02_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C03 (0x0000054C) +#define NVCC7E_SET_CSC10COEFFICIENT_C03_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C10 (0x00000550) +#define NVCC7E_SET_CSC10COEFFICIENT_C10_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C11 (0x00000554) +#define NVCC7E_SET_CSC10COEFFICIENT_C11_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C12 (0x00000558) +#define NVCC7E_SET_CSC10COEFFICIENT_C12_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C13 (0x0000055C) +#define NVCC7E_SET_CSC10COEFFICIENT_C13_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C20 (0x00000560) +#define NVCC7E_SET_CSC10COEFFICIENT_C20_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C21 (0x00000564) +#define NVCC7E_SET_CSC10COEFFICIENT_C21_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C22 (0x00000568) +#define NVCC7E_SET_CSC10COEFFICIENT_C22_VALUE 20:0 +#define NVCC7E_SET_CSC10COEFFICIENT_C23 (0x0000056C) +#define NVCC7E_SET_CSC10COEFFICIENT_C23_VALUE 20:0 +#define NVCC7E_SET_CSC1LUT_FP_SCALE (0x00000570) +#define NVCC7E_SET_CSC1LUT_FP_SCALE_VALUE 15:0 +#define NVCC7E_SET_CSC1LUT_CONTROL (0x00000580) +#define NVCC7E_SET_CSC1LUT_CONTROL_INTERPOLATE 0:0 +#define NVCC7E_SET_CSC1LUT_CONTROL_INTERPOLATE_DISABLE (0x00000000) +#define NVCC7E_SET_CSC1LUT_CONTROL_INTERPOLATE_ENABLE (0x00000001) +#define NVCC7E_SET_CSC1LUT_CONTROL_MIRROR 1:1 +#define NVCC7E_SET_CSC1LUT_CONTROL_MIRROR_DISABLE (0x00000000) +#define NVCC7E_SET_CSC1LUT_CONTROL_MIRROR_ENABLE (0x00000001) +#define NVCC7E_SET_CSC1LUT_CONTROL_ENABLE 4:4 +#define NVCC7E_SET_CSC1LUT_CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_CSC1LUT_CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_CSC1LUT_CONTROL_CURVE 6:5 +#define NVCC7E_SET_CSC1LUT_CONTROL_CURVE_CSCLUT_PQ (0x00000000) +#define NVCC7E_SET_CSC1LUT_CONTROL_CURVE_CSCLUT_HLG (0x00000001) +#define NVCC7E_SET_CSC1LUT_CONTROL_CURVE_CSCLUT_DIRECT (0x00000002) +#define NVCC7E_SET_CSC11CONTROL (0x0000059C) +#define NVCC7E_SET_CSC11CONTROL_ENABLE 0:0 +#define NVCC7E_SET_CSC11CONTROL_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_CSC11CONTROL_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_CSC11CONTROL_LEVEL 7:2 +#define NVCC7E_SET_CSC11COEFFICIENT_C00 (0x000005A0) +#define NVCC7E_SET_CSC11COEFFICIENT_C00_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C01 (0x000005A4) +#define NVCC7E_SET_CSC11COEFFICIENT_C01_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C02 (0x000005A8) +#define NVCC7E_SET_CSC11COEFFICIENT_C02_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C03 (0x000005AC) +#define NVCC7E_SET_CSC11COEFFICIENT_C03_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C10 (0x000005B0) +#define NVCC7E_SET_CSC11COEFFICIENT_C10_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C11 (0x000005B4) +#define NVCC7E_SET_CSC11COEFFICIENT_C11_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C12 (0x000005B8) +#define NVCC7E_SET_CSC11COEFFICIENT_C12_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C13 (0x000005BC) +#define NVCC7E_SET_CSC11COEFFICIENT_C13_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C20 (0x000005C0) +#define NVCC7E_SET_CSC11COEFFICIENT_C20_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C21 (0x000005C4) +#define NVCC7E_SET_CSC11COEFFICIENT_C21_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C22 (0x000005C8) +#define NVCC7E_SET_CSC11COEFFICIENT_C22_VALUE 20:0 +#define NVCC7E_SET_CSC11COEFFICIENT_C23 (0x000005CC) +#define NVCC7E_SET_CSC11COEFFICIENT_C23_VALUE 20:0 +#define NVCC7E_SET_CLAMP_RANGE (0x000005D0) +#define NVCC7E_SET_CLAMP_RANGE_LOW 15:0 +#define NVCC7E_SET_CLAMP_RANGE_HIGH 31:16 +#define NVCC7E_SW_RESERVED(b) (0x000005D4 + (b)*0x00000004) +#define NVCC7E_SW_RESERVED_VALUE 31:0 +#define NVCC7E_SET_DIRTY_RECT_SIZE (0x000005E4) +#define NVCC7E_SET_DIRTY_RECT_SIZE_WIDTH 15:0 +#define NVCC7E_SET_DIRTY_RECT_SIZE_HEIGHT 31:16 +#define NVCC7E_SET_DIRTY_RECT_POSITION (0x000005E8) +#define NVCC7E_SET_DIRTY_RECT_POSITION_X 15:0 +#define NVCC7E_SET_DIRTY_RECT_POSITION_Y 31:16 +#define NVCC7E_SET_SUPERFRAME (0x000005EC) +#define NVCC7E_SET_SUPERFRAME_ENABLE 0:0 +#define NVCC7E_SET_SUPERFRAME_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_SUPERFRAME_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_SUPERFRAME_MODE 2:1 +#define NVCC7E_SET_SUPERFRAME_MODE_FIXED (0x00000000) +#define NVCC7E_SET_SUPERFRAME_MODE_DYNAMIC (0x00000001) +#define NVCC7E_SET_SUPERFRAME_MODE_SW (0x00000003) +#define NVCC7E_SET_SUPERFRAME_RATIO_IN 15:8 +#define NVCC7E_SET_SUPERFRAME_RATIO_OUT 23:16 +#define NVCC7E_SET_SUPERFRAME_START_COUNT 31:24 +#define NVCC7E_SET_INFOFRAME_CTRL(b) (0x000005F0 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_CTRL_ENABLE 0:0 +#define NVCC7E_SET_INFOFRAME_CTRL_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_INFOFRAME_CTRL_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_INFOFRAME_CTRL_LOCATION 5:4 +#define NVCC7E_SET_INFOFRAME_CTRL_LOCATION_VBLANK (0x00000000) +#define NVCC7E_SET_INFOFRAME_CTRL_LOCATION_VSYNC (0x00000001) +#define NVCC7E_SET_INFOFRAME_CTRL_LOCATION_LINE (0x00000002) +#define NVCC7E_SET_INFOFRAME_CTRL_LINE_ID 30:16 +#define NVCC7E_SET_INFOFRAME_CTRL_LINE_ID_REVERSED 31:31 +#define NVCC7E_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_DISABLE (0x00000000) +#define NVCC7E_SET_INFOFRAME_CTRL_LINE_ID_REVERSED_ENABLE (0x00000001) +#define NVCC7E_SET_INFOFRAME_HEADER(b) (0x000005F8 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_HEADER_HB0 7:0 +#define NVCC7E_SET_INFOFRAME_HEADER_HB1 15:8 +#define NVCC7E_SET_INFOFRAME_HEADER_HB2 23:16 +#define NVCC7E_SET_INFOFRAME_HEADER_HB3 31:24 +#define NVCC7E_SET_INFOFRAME_DATA0(b) (0x00000600 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_DATA0_DB0 7:0 +#define NVCC7E_SET_INFOFRAME_DATA0_DB1 15:8 +#define NVCC7E_SET_INFOFRAME_DATA0_DB2 23:16 +#define NVCC7E_SET_INFOFRAME_DATA0_DB3 31:24 +#define NVCC7E_SET_INFOFRAME_DATA1(b) (0x00000608 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_DATA1_DB4 7:0 +#define NVCC7E_SET_INFOFRAME_DATA1_DB5 15:8 +#define NVCC7E_SET_INFOFRAME_DATA1_DB6 23:16 +#define NVCC7E_SET_INFOFRAME_DATA1_DB7 31:24 +#define NVCC7E_SET_INFOFRAME_DATA2(b) (0x00000610 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_DATA2_DB8 7:0 +#define NVCC7E_SET_INFOFRAME_DATA2_DB9 15:8 +#define NVCC7E_SET_INFOFRAME_DATA2_DB10 23:16 +#define NVCC7E_SET_INFOFRAME_DATA2_DB11 31:24 +#define NVCC7E_SET_INFOFRAME_DATA3(b) (0x00000618 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_DATA3_DB12 7:0 +#define NVCC7E_SET_INFOFRAME_DATA3_DB13 15:8 +#define NVCC7E_SET_INFOFRAME_DATA3_DB14 23:16 +#define NVCC7E_SET_INFOFRAME_DATA3_DB15 31:24 +#define NVCC7E_SET_INFOFRAME_DATA4(b) (0x00000620 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_DATA4_DB16 7:0 +#define NVCC7E_SET_INFOFRAME_DATA4_DB17 15:8 +#define NVCC7E_SET_INFOFRAME_DATA4_DB18 23:16 +#define NVCC7E_SET_INFOFRAME_DATA4_DB19 31:24 +#define NVCC7E_SET_INFOFRAME_DATA5(b) (0x00000628 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_DATA5_DB20 7:0 +#define NVCC7E_SET_INFOFRAME_DATA5_DB21 15:8 +#define NVCC7E_SET_INFOFRAME_DATA5_DB22 23:16 +#define NVCC7E_SET_INFOFRAME_DATA5_DB23 31:24 +#define NVCC7E_SET_INFOFRAME_DATA6(b) (0x00000630 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_DATA6_DB24 7:0 +#define NVCC7E_SET_INFOFRAME_DATA6_DB25 15:8 +#define NVCC7E_SET_INFOFRAME_DATA6_DB26 23:16 +#define NVCC7E_SET_INFOFRAME_DATA6_DB27 31:24 +#define NVCC7E_SET_INFOFRAME_DATA7(b) (0x00000638 + (b)*0x00000004) +#define NVCC7E_SET_INFOFRAME_DATA7_DB28 7:0 +#define NVCC7E_SET_INFOFRAME_DATA7_DB29 15:8 +#define NVCC7E_SET_INFOFRAME_DATA7_DB30 23:16 +#define NVCC7E_SET_INFOFRAME_DATA7_DB31 31:24 +#define NVCC7E_SET_SURFACE_ADDRESS_HI_SEMAPHORE (0x00000640) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_SEMAPHORE_ADDRESS_HI 31:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE (0x00000644) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ADDRESS_LO 31:4 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET 3:2 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE 0:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE (0x00000648) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_ACQ_SEMAPHORE_ADDRESS_HI 31:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE (0x0000064C) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ADDRESS_LO 31:4 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET 3:2 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_IOVA (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE 0:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ACQ_SEMAPHORE_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_NOTIFIER (0x00000650) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_NOTIFIER_ADDRESS_HI 31:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER (0x00000654) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ADDRESS_LO 31:4 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET 3:2 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_IOVA (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE 0:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_NOTIFIER_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_ISO(b) (0x00000658 + (b)*0x00000004) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_ISO_ADDRESS_HI 31:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO(b) (0x00000670 + (b)*0x00000004) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_ADDRESS_LO 31:4 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET 3:2 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_IOVA (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_KIND 1:1 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_KIND_PITCH (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_KIND_BLOCKLINEAR (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE 0:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ISO_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_ILUT (0x00000688) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_ILUT_ADDRESS_HI 31:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT (0x0000068C) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT_ADDRESS_LO 31:4 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET 3:2 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_IOVA (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE 0:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_ILUT_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_TMO_LUT (0x00000690) +#define NVCC7E_SET_SURFACE_ADDRESS_HI_TMO_LUT_ADDRESS_HI 31:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT (0x00000694) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ADDRESS_LO 31:4 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET 3:2 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_IOVA (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_NVM (0x00000001) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI (0x00000002) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_TARGET_PHYSICAL_PCI_COHERENT (0x00000003) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE 0:0 +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_DISABLE (0x00000000) +#define NVCC7E_SET_SURFACE_ADDRESS_LO_TMO_LUT_ENABLE_ENABLE (0x00000001) +#define NVCC7E_SET_TELLTALE_CRC_REGION(b) (0x00000698 + (b)*0x00000004) +#define NVCC7E_SET_TELLTALE_CRC_REGION_INDEX0 7:0 +#define NVCC7E_SET_TELLTALE_CRC_REGION_INDEX1 15:8 +#define NVCC7E_SET_TELLTALE_CRC_REGION_INDEX2 23:16 +#define NVCC7E_SET_TELLTALE_CRC_REGION_INDEX3 31:24 +#define NVCC7E_SET_TELLTALE_GOLDEN_CRC_LOWER(b) (0x000006A8 + (b)*0x00000004) +#define NVCC7E_SET_TELLTALE_GOLDEN_CRC_LOWER_CRC 31:0 +#define NVCC7E_SET_TELLTALE_GOLDEN_CRC_UPPER(b) (0x000006E8 + (b)*0x00000004) +#define NVCC7E_SET_TELLTALE_GOLDEN_CRC_UPPER_CRC 31:0 +#define NVCC7E_SET_TELLTALE_CRC_CONTROL (0x00000728) +#define NVCC7E_SET_TELLTALE_CRC_CONTROL_REGION_ENABLE 15:0 + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // _clcc7e_h diff --git a/userspace/sdks/nv570/inc/class/clcd40.h b/userspace/sdks/nv570/inc/class/clcd40.h new file mode 100644 index 0000000..c301740 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcd40.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_clcd40_h__ +#define __gb100_clcd40_h__ + +#define BLACKWELL_INLINE_TO_MEMORY_A 0xCD40 + +#endif // __gb100_clcd40_h__ diff --git a/userspace/sdks/nv570/inc/class/clcd97.h b/userspace/sdks/nv570/inc/class/clcd97.h new file mode 100644 index 0000000..89bf0d8 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcd97.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_clcd97_h__ +#define __gb100_clcd97_h__ + +#define BLACKWELL_A 0xCD97 + +#endif // __gb100_clcd97_h__ diff --git a/userspace/sdks/nv570/inc/class/clcdb0.h b/userspace/sdks/nv570/inc/class/clcdb0.h new file mode 100644 index 0000000..8150cf6 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcdb0.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_clcdb0_h__ +#define __gb100_clcdb0_h__ + +#define NVCDB0_VIDEO_DECODER (0x0000CDB0) + +#endif // __gb100_clcdb0_h__ diff --git a/userspace/sdks/nv570/inc/class/clcdc0.h b/userspace/sdks/nv570/inc/class/clcdc0.h new file mode 100644 index 0000000..dca1a2d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcdc0.h @@ -0,0 +1,777 @@ +/******************************************************************************* + Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. + +*******************************************************************************/ + +#ifndef HWFE_BLACKWELL_COMPUTE_A_SW_H +#define HWFE_BLACKWELL_COMPUTE_A_SW_H + +#include "nvtypes.h" + +#define BLACKWELL_COMPUTE_A 0xCDC0 + +#define NVCDC0_SET_OBJECT 0x0000 +#define NVCDC0_SET_OBJECT_CLASS_ID 15:0 +#define NVCDC0_SET_OBJECT_ENGINE_ID 20:16 + +#define NVCDC0_NO_OPERATION 0x0100 +#define NVCDC0_NO_OPERATION_V 31:0 + +#define NVCDC0_SET_NOTIFY_A 0x0104 +#define NVCDC0_SET_NOTIFY_A_ADDRESS_UPPER 24:0 + +#define NVCDC0_SET_NOTIFY_B 0x0108 +#define NVCDC0_SET_NOTIFY_B_ADDRESS_LOWER 31:0 + +#define NVCDC0_NOTIFY 0x010c +#define NVCDC0_NOTIFY_TYPE 31:0 +#define NVCDC0_NOTIFY_TYPE_WRITE_ONLY 0x00000000 +#define NVCDC0_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001 + +#define NVCDC0_WAIT_FOR_IDLE 0x0110 +#define NVCDC0_WAIT_FOR_IDLE_V 31:0 + +#define NVCDC0_LOAD_MME_INSTRUCTION_RAM_POINTER 0x0114 +#define NVCDC0_LOAD_MME_INSTRUCTION_RAM_POINTER_V 31:0 + +#define NVCDC0_LOAD_MME_INSTRUCTION_RAM 0x0118 +#define NVCDC0_LOAD_MME_INSTRUCTION_RAM_V 31:0 + +#define NVCDC0_LOAD_MME_START_ADDRESS_RAM_POINTER 0x011c +#define NVCDC0_LOAD_MME_START_ADDRESS_RAM_POINTER_V 31:0 + +#define NVCDC0_LOAD_MME_START_ADDRESS_RAM 0x0120 +#define NVCDC0_LOAD_MME_START_ADDRESS_RAM_V 31:0 + +#define NVCDC0_SET_MME_SHADOW_RAM_CONTROL 0x0124 +#define NVCDC0_SET_MME_SHADOW_RAM_CONTROL_MODE 1:0 +#define NVCDC0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK 0x00000000 +#define NVCDC0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_TRACK_WITH_FILTER 0x00000001 +#define NVCDC0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_PASSTHROUGH 0x00000002 +#define NVCDC0_SET_MME_SHADOW_RAM_CONTROL_MODE_METHOD_REPLAY 0x00000003 + +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_A 0x0130 +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_B 0x0134 +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_C 0x0138 +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_C_MODE 2:0 +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVCDC0_SET_GLOBAL_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVCDC0_SEND_GO_IDLE 0x013c +#define NVCDC0_SEND_GO_IDLE_V 31:0 + +#define NVCDC0_PM_TRIGGER 0x0140 +#define NVCDC0_PM_TRIGGER_V 31:0 + +#define NVCDC0_PM_TRIGGER_WFI 0x0144 +#define NVCDC0_PM_TRIGGER_WFI_V 31:0 + +#define NVCDC0_FE_ATOMIC_SEQUENCE_BEGIN 0x0148 +#define NVCDC0_FE_ATOMIC_SEQUENCE_BEGIN_V 31:0 + +#define NVCDC0_FE_ATOMIC_SEQUENCE_END 0x014c +#define NVCDC0_FE_ATOMIC_SEQUENCE_END_V 31:0 + +#define NVCDC0_SET_INSTRUMENTATION_METHOD_HEADER 0x0150 +#define NVCDC0_SET_INSTRUMENTATION_METHOD_HEADER_V 31:0 + +#define NVCDC0_SET_INSTRUMENTATION_METHOD_DATA 0x0154 +#define NVCDC0_SET_INSTRUMENTATION_METHOD_DATA_V 31:0 + +#define NVCDC0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER 0x0158 +#define NVCDC0_SET_REPORT_SEMAPHORE_PAYLOAD_LOWER_PAYLOAD_LOWER 31:0 + +#define NVCDC0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER 0x015c +#define NVCDC0_SET_REPORT_SEMAPHORE_PAYLOAD_UPPER_PAYLOAD_UPPER 31:0 + +#define NVCDC0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER 0x0160 +#define NVCDC0_SET_REPORT_SEMAPHORE_ADDRESS_LOWER_LOWER 31:0 + +#define NVCDC0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER 0x0164 +#define NVCDC0_SET_REPORT_SEMAPHORE_ADDRESS_UPPER_UPPER 24:0 + +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE 0x0168 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_OPERATION 1:0 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_OPERATION_RELEASE 0x00000000 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_OPERATION_ACQUIRE 0x00000001 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_OPERATION_REPORT_ONLY 0x00000002 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_OPERATION_TRAP 0x00000003 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE 2:2 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE 4:3 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_FOUR_WORDS 0x00000000 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_ONE_WORD 0x00000001 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_STRUCTURE_SIZE_SEMAPHORE_TWO_WORDS 0x00000002 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE 5:5 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_FALSE 0x00000000 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_FLUSH_DISABLE_TRUE 0x00000001 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE 6:6 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP 9:7 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_INC 0x00000003 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_AND 0x00000005 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_OR 0x00000006 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT 11:10 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64 12:12 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_FALSE 0x00000000 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_PAYLOAD_SIZE64_TRUE 0x00000001 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE 14:13 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_NONE 0x00000000 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_UNCONDITIONAL 0x00000001 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL 0x00000002 +#define NVCDC0_REPORT_SEMAPHORE_EXECUTE_TRAP_TYPE_TRAP_CONDITIONAL_EXT 0x00000003 + +#define NVCDC0_LINE_LENGTH_IN 0x0180 +#define NVCDC0_LINE_LENGTH_IN_VALUE 31:0 + +#define NVCDC0_LINE_COUNT 0x0184 +#define NVCDC0_LINE_COUNT_VALUE 31:0 + +#define NVCDC0_OFFSET_OUT_UPPER 0x0188 +#define NVCDC0_OFFSET_OUT_UPPER_VALUE 24:0 + +#define NVCDC0_OFFSET_OUT 0x018c +#define NVCDC0_OFFSET_OUT_VALUE 31:0 + +#define NVCDC0_PITCH_OUT 0x0190 +#define NVCDC0_PITCH_OUT_VALUE 31:0 + +#define NVCDC0_LAUNCH_DMA 0x01b0 +#define NVCDC0_LAUNCH_DMA_DST_MEMORY_LAYOUT 0:0 +#define NVCDC0_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000 +#define NVCDC0_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001 +#define NVCDC0_LAUNCH_DMA_COMPLETION_TYPE 5:4 +#define NVCDC0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000 +#define NVCDC0_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001 +#define NVCDC0_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002 +#define NVCDC0_LAUNCH_DMA_INTERRUPT_TYPE 9:8 +#define NVCDC0_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000 +#define NVCDC0_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001 +#define NVCDC0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 12:12 +#define NVCDC0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000 +#define NVCDC0_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001 +#define NVCDC0_LAUNCH_DMA_REDUCTION_ENABLE 1:1 +#define NVCDC0_LAUNCH_DMA_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCDC0_LAUNCH_DMA_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCDC0_LAUNCH_DMA_REDUCTION_OP 15:13 +#define NVCDC0_LAUNCH_DMA_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCDC0_LAUNCH_DMA_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCDC0_LAUNCH_DMA_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCDC0_LAUNCH_DMA_REDUCTION_OP_RED_INC 0x00000003 +#define NVCDC0_LAUNCH_DMA_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCDC0_LAUNCH_DMA_REDUCTION_OP_RED_AND 0x00000005 +#define NVCDC0_LAUNCH_DMA_REDUCTION_OP_RED_OR 0x00000006 +#define NVCDC0_LAUNCH_DMA_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCDC0_LAUNCH_DMA_REDUCTION_FORMAT 3:2 +#define NVCDC0_LAUNCH_DMA_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVCDC0_LAUNCH_DMA_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVCDC0_LAUNCH_DMA_SYSMEMBAR_DISABLE 6:6 +#define NVCDC0_LAUNCH_DMA_SYSMEMBAR_DISABLE_FALSE 0x00000000 +#define NVCDC0_LAUNCH_DMA_SYSMEMBAR_DISABLE_TRUE 0x00000001 + +#define NVCDC0_LOAD_INLINE_DATA 0x01b4 +#define NVCDC0_LOAD_INLINE_DATA_V 31:0 + +#define NVCDC0_SET_I2M_SEMAPHORE_A 0x01dc +#define NVCDC0_SET_I2M_SEMAPHORE_A_OFFSET_UPPER 24:0 + +#define NVCDC0_SET_I2M_SEMAPHORE_B 0x01e0 +#define NVCDC0_SET_I2M_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVCDC0_SET_I2M_SEMAPHORE_C 0x01e4 +#define NVCDC0_SET_I2M_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVCDC0_SET_SM_SCG_CONTROL 0x01e8 +#define NVCDC0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS 0:0 +#define NVCDC0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_FALSE 0x00000000 +#define NVCDC0_SET_SM_SCG_CONTROL_COMPUTE_IN_GRAPHICS_TRUE 0x00000001 + +#define NVCDC0_SET_MME_SWITCH_STATE 0x01ec +#define NVCDC0_SET_MME_SWITCH_STATE_VALID 0:0 +#define NVCDC0_SET_MME_SWITCH_STATE_VALID_FALSE 0x00000000 +#define NVCDC0_SET_MME_SWITCH_STATE_VALID_TRUE 0x00000001 +#define NVCDC0_SET_MME_SWITCH_STATE_SAVE_MACRO 11:4 +#define NVCDC0_SET_MME_SWITCH_STATE_RESTORE_MACRO 19:12 + +#define NVCDC0_SET_I2M_SPARE_NOOP00 0x01f0 +#define NVCDC0_SET_I2M_SPARE_NOOP00_V 31:0 + +#define NVCDC0_SET_I2M_SPARE_NOOP01 0x01f4 +#define NVCDC0_SET_I2M_SPARE_NOOP01_V 31:0 + +#define NVCDC0_SET_I2M_SPARE_NOOP02 0x01f8 +#define NVCDC0_SET_I2M_SPARE_NOOP02_V 31:0 + +#define NVCDC0_SET_I2M_SPARE_NOOP03 0x01fc +#define NVCDC0_SET_I2M_SPARE_NOOP03_V 31:0 + +#define NVCDC0_SET_VALID_SPAN_OVERFLOW_AREA_A 0x0200 +#define NVCDC0_SET_VALID_SPAN_OVERFLOW_AREA_A_ADDRESS_UPPER 7:0 + +#define NVCDC0_SET_VALID_SPAN_OVERFLOW_AREA_B 0x0204 +#define NVCDC0_SET_VALID_SPAN_OVERFLOW_AREA_B_ADDRESS_LOWER 31:0 + +#define NVCDC0_SET_VALID_SPAN_OVERFLOW_AREA_C 0x0208 +#define NVCDC0_SET_VALID_SPAN_OVERFLOW_AREA_C_SIZE 31:0 + +#define NVCDC0_PERFMON_TRANSFER 0x0210 +#define NVCDC0_PERFMON_TRANSFER_V 31:0 + +#define NVCDC0_INVALIDATE_SHADER_CACHES 0x021c +#define NVCDC0_INVALIDATE_SHADER_CACHES_INSTRUCTION 0:0 +#define NVCDC0_INVALIDATE_SHADER_CACHES_INSTRUCTION_FALSE 0x00000000 +#define NVCDC0_INVALIDATE_SHADER_CACHES_INSTRUCTION_TRUE 0x00000001 +#define NVCDC0_INVALIDATE_SHADER_CACHES_DATA 4:4 +#define NVCDC0_INVALIDATE_SHADER_CACHES_DATA_FALSE 0x00000000 +#define NVCDC0_INVALIDATE_SHADER_CACHES_DATA_TRUE 0x00000001 +#define NVCDC0_INVALIDATE_SHADER_CACHES_CONSTANT 12:12 +#define NVCDC0_INVALIDATE_SHADER_CACHES_CONSTANT_FALSE 0x00000000 +#define NVCDC0_INVALIDATE_SHADER_CACHES_CONSTANT_TRUE 0x00000001 +#define NVCDC0_INVALIDATE_SHADER_CACHES_LOCKS 1:1 +#define NVCDC0_INVALIDATE_SHADER_CACHES_LOCKS_FALSE 0x00000000 +#define NVCDC0_INVALIDATE_SHADER_CACHES_LOCKS_TRUE 0x00000001 +#define NVCDC0_INVALIDATE_SHADER_CACHES_FLUSH_DATA 2:2 +#define NVCDC0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_FALSE 0x00000000 +#define NVCDC0_INVALIDATE_SHADER_CACHES_FLUSH_DATA_TRUE 0x00000001 + +#define NVCDC0_SET_RESERVED_SW_METHOD00 0x0220 +#define NVCDC0_SET_RESERVED_SW_METHOD00_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD01 0x0224 +#define NVCDC0_SET_RESERVED_SW_METHOD01_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD02 0x0228 +#define NVCDC0_SET_RESERVED_SW_METHOD02_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD03 0x022c +#define NVCDC0_SET_RESERVED_SW_METHOD03_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD04 0x0230 +#define NVCDC0_SET_RESERVED_SW_METHOD04_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD05 0x0234 +#define NVCDC0_SET_RESERVED_SW_METHOD05_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD06 0x0238 +#define NVCDC0_SET_RESERVED_SW_METHOD06_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD07 0x023c +#define NVCDC0_SET_RESERVED_SW_METHOD07_V 31:0 + +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI 0x0244 +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES 0:0 +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE_NO_WFI_TAG 25:4 + +#define NVCDC0_SET_CWD_REF_COUNTER 0x0248 +#define NVCDC0_SET_CWD_REF_COUNTER_SELECT 5:0 +#define NVCDC0_SET_CWD_REF_COUNTER_VALUE 23:8 + +#define NVCDC0_SET_RESERVED_SW_METHOD08 0x024c +#define NVCDC0_SET_RESERVED_SW_METHOD08_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD09 0x0250 +#define NVCDC0_SET_RESERVED_SW_METHOD09_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD10 0x0254 +#define NVCDC0_SET_RESERVED_SW_METHOD10_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD11 0x0258 +#define NVCDC0_SET_RESERVED_SW_METHOD11_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD12 0x025c +#define NVCDC0_SET_RESERVED_SW_METHOD12_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD13 0x0260 +#define NVCDC0_SET_RESERVED_SW_METHOD13_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD14 0x0264 +#define NVCDC0_SET_RESERVED_SW_METHOD14_V 31:0 + +#define NVCDC0_SET_RESERVED_SW_METHOD15 0x0268 +#define NVCDC0_SET_RESERVED_SW_METHOD15_V 31:0 + +#define NVCDC0_SET_COMPUTE_CLASS_VERSION 0x0280 +#define NVCDC0_SET_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVCDC0_SET_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCDC0_CHECK_COMPUTE_CLASS_VERSION 0x0284 +#define NVCDC0_CHECK_COMPUTE_CLASS_VERSION_CURRENT 15:0 +#define NVCDC0_CHECK_COMPUTE_CLASS_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCDC0_SET_QMD_VERSION 0x0288 +#define NVCDC0_SET_QMD_VERSION_CURRENT 15:0 +#define NVCDC0_SET_QMD_VERSION_OLDEST_SUPPORTED 31:16 + +#define NVCDC0_INVALIDATE_SKED_CACHES 0x0298 +#define NVCDC0_INVALIDATE_SKED_CACHES_FORCE_IGNORE_VEID 0:0 +#define NVCDC0_INVALIDATE_SKED_CACHES_FORCE_IGNORE_VEID_FALSE 0x00000000 +#define NVCDC0_INVALIDATE_SKED_CACHES_FORCE_IGNORE_VEID_TRUE 0x00000001 + +#define NVCDC0_SET_SHADER_SHARED_MEMORY_WINDOW_A 0x02a0 +#define NVCDC0_SET_SHADER_SHARED_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVCDC0_SET_SHADER_SHARED_MEMORY_WINDOW_B 0x02a4 +#define NVCDC0_SET_SHADER_SHARED_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVCDC0_SET_CWD_SLOT_COUNT 0x02b0 +#define NVCDC0_SET_CWD_SLOT_COUNT_V 7:0 + +#define NVCDC0_SEND_PCAS_A 0x02b4 +#define NVCDC0_SEND_PCAS_A_QMD_ADDRESS_SHIFTED8 31:0 + +#define NVCDC0_SEND_PCAS_B 0x02b8 +#define NVCDC0_SEND_PCAS_B_FROM 23:0 +#define NVCDC0_SEND_PCAS_B_DELTA 31:24 + +#define NVCDC0_SEND_SIGNALING_PCAS_B 0x02bc +#define NVCDC0_SEND_SIGNALING_PCAS_B_INVALIDATE 0:0 +#define NVCDC0_SEND_SIGNALING_PCAS_B_INVALIDATE_FALSE 0x00000000 +#define NVCDC0_SEND_SIGNALING_PCAS_B_INVALIDATE_TRUE 0x00000001 +#define NVCDC0_SEND_SIGNALING_PCAS_B_SCHEDULE 1:1 +#define NVCDC0_SEND_SIGNALING_PCAS_B_SCHEDULE_FALSE 0x00000000 +#define NVCDC0_SEND_SIGNALING_PCAS_B_SCHEDULE_TRUE 0x00000001 + +#define NVCDC0_SEND_SIGNALING_PCAS2_B 0x02c0 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION 3:0 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_NOP 0x00000000 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE 0x00000001 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_SCHEDULE 0x00000002 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_COPY_SCHEDULE 0x00000003 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_PUT 0x00000006 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_DECREMENT_DEPENDENCE 0x00000007 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH 0x00000008 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_PREFETCH_SCHEDULE 0x00000009 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_SCHEDULE 0x0000000A +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INVALIDATE_PREFETCH_COPY_FORCE_REQUIRE_SCHEDULING 0x0000000B +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_DEPENDENCE 0x0000000C +#define NVCDC0_SEND_SIGNALING_PCAS2_B_PCAS_ACTION_INCREMENT_CWD_REF_COUNTER 0x0000000D +#define NVCDC0_SEND_SIGNALING_PCAS2_B_SELECT 13:8 +#define NVCDC0_SEND_SIGNALING_PCAS2_B_OFFSET_MINUS_ONE 23:14 + +#define NVCDC0_SET_SKED_CACHE_CONTROL 0x02cc +#define NVCDC0_SET_SKED_CACHE_CONTROL_IGNORE_VEID 0:0 +#define NVCDC0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_FALSE 0x00000000 +#define NVCDC0_SET_SKED_CACHE_CONTROL_IGNORE_VEID_TRUE 0x00000001 + +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A 0x02e4 +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_A_SIZE_UPPER 7:0 + +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B 0x02e8 +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_B_SIZE_LOWER 31:0 + +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C 0x02ec +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SM_COUNT 8:0 +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_PLURAL_TPC_GPC_COUNT 23:16 +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_NON_THROTTLED_C_MAX_SINGLETON_TPC_GPC_COUNT 31:24 + +#define NVCDC0_SET_SPA_VERSION 0x0310 +#define NVCDC0_SET_SPA_VERSION_MINOR 7:0 +#define NVCDC0_SET_SPA_VERSION_MAJOR 15:8 + +#define NVCDC0_SET_INLINE_QMD_ADDRESS_A 0x0318 +#define NVCDC0_SET_INLINE_QMD_ADDRESS_A_QMD_ADDRESS_SHIFTED8_UPPER 8:0 +#define NVCDC0_SET_INLINE_QMD_ADDRESS_A_INLINE_SIZE 30:30 +#define NVCDC0_SET_INLINE_QMD_ADDRESS_A_INLINE_SIZE_INLINE_256 0x00000000 +#define NVCDC0_SET_INLINE_QMD_ADDRESS_A_INLINE_SIZE_INLINE_384 0x00000001 + +#define NVCDC0_SET_INLINE_QMD_ADDRESS_B 0x031c +#define NVCDC0_SET_INLINE_QMD_ADDRESS_B_QMD_ADDRESS_SHIFTED8_LOWER 31:0 + +#define NVCDC0_LOAD_INLINE_QMD_DATA(i) (0x0320+(i)*4) +#define NVCDC0_LOAD_INLINE_QMD_DATA_V 31:0 + +#define NVCDC0_SET_FALCON00 0x0500 +#define NVCDC0_SET_FALCON00_V 31:0 + +#define NVCDC0_SET_FALCON01 0x0504 +#define NVCDC0_SET_FALCON01_V 31:0 + +#define NVCDC0_SET_FALCON02 0x0508 +#define NVCDC0_SET_FALCON02_V 31:0 + +#define NVCDC0_SET_FALCON03 0x050c +#define NVCDC0_SET_FALCON03_V 31:0 + +#define NVCDC0_SET_FALCON04 0x0510 +#define NVCDC0_SET_FALCON04_V 31:0 + +#define NVCDC0_SET_FALCON05 0x0514 +#define NVCDC0_SET_FALCON05_V 31:0 + +#define NVCDC0_SET_FALCON06 0x0518 +#define NVCDC0_SET_FALCON06_V 31:0 + +#define NVCDC0_SET_FALCON07 0x051c +#define NVCDC0_SET_FALCON07_V 31:0 + +#define NVCDC0_SET_FALCON08 0x0520 +#define NVCDC0_SET_FALCON08_V 31:0 + +#define NVCDC0_SET_FALCON09 0x0524 +#define NVCDC0_SET_FALCON09_V 31:0 + +#define NVCDC0_SET_FALCON10 0x0528 +#define NVCDC0_SET_FALCON10_V 31:0 + +#define NVCDC0_SET_FALCON11 0x052c +#define NVCDC0_SET_FALCON11_V 31:0 + +#define NVCDC0_SET_FALCON12 0x0530 +#define NVCDC0_SET_FALCON12_V 31:0 + +#define NVCDC0_SET_FALCON13 0x0534 +#define NVCDC0_SET_FALCON13_V 31:0 + +#define NVCDC0_SET_FALCON14 0x0538 +#define NVCDC0_SET_FALCON14_V 31:0 + +#define NVCDC0_SET_FALCON15 0x053c +#define NVCDC0_SET_FALCON15_V 31:0 + +#define NVCDC0_SET_MME_MEM_ADDRESS_A 0x0550 +#define NVCDC0_SET_MME_MEM_ADDRESS_A_UPPER 24:0 + +#define NVCDC0_SET_MME_MEM_ADDRESS_B 0x0554 +#define NVCDC0_SET_MME_MEM_ADDRESS_B_LOWER 31:0 + +#define NVCDC0_SET_MME_DATA_RAM_ADDRESS 0x0558 +#define NVCDC0_SET_MME_DATA_RAM_ADDRESS_WORD 31:0 + +#define NVCDC0_MME_DMA_READ 0x055c +#define NVCDC0_MME_DMA_READ_LENGTH 31:0 + +#define NVCDC0_MME_DMA_READ_FIFOED 0x0560 +#define NVCDC0_MME_DMA_READ_FIFOED_LENGTH 31:0 + +#define NVCDC0_MME_DMA_WRITE 0x0564 +#define NVCDC0_MME_DMA_WRITE_LENGTH 31:0 + +#define NVCDC0_MME_DMA_REDUCTION 0x0568 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_OP 2:0 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_INC 0x00000003 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_AND 0x00000005 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_OR 0x00000006 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_FORMAT 5:4 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_FORMAT_UNSIGNED 0x00000000 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_FORMAT_SIGNED 0x00000001 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_SIZE 8:8 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_SIZE_FOUR_BYTES 0x00000000 +#define NVCDC0_MME_DMA_REDUCTION_REDUCTION_SIZE_EIGHT_BYTES 0x00000001 + +#define NVCDC0_MME_DMA_SYSMEMBAR 0x056c +#define NVCDC0_MME_DMA_SYSMEMBAR_V 0:0 + +#define NVCDC0_MME_DMA_SYNC 0x0570 +#define NVCDC0_MME_DMA_SYNC_VALUE 31:0 + +#define NVCDC0_EVENT_START_TRIGGER 0x074c +#define NVCDC0_EVENT_START_TRIGGER_V 31:0 + +#define NVCDC0_EVENT_STOP_TRIGGER 0x075c +#define NVCDC0_EVENT_STOP_TRIGGER_V 31:0 + +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_A 0x0790 +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_A_ADDRESS_UPPER 24:0 + +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_B 0x0794 +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_B_ADDRESS_LOWER 31:0 + +#define NVCDC0_SET_TEXTURE_HEADER_VERSION 0x07ac +#define NVCDC0_SET_TEXTURE_HEADER_VERSION_MAJOR 7:0 + +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_WINDOW_A 0x07b0 +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_WINDOW_A_BASE_ADDRESS_UPPER 16:0 + +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_WINDOW_B 0x07b4 +#define NVCDC0_SET_SHADER_LOCAL_MEMORY_WINDOW_B_BASE_ADDRESS 31:0 + +#define NVCDC0_SET_MONITORED_FENCE_SIGNAL_ADDRESS_BASE_A 0x07b8 +#define NVCDC0_SET_MONITORED_FENCE_SIGNAL_ADDRESS_BASE_A_LOWER 31:0 + +#define NVCDC0_SET_MONITORED_FENCE_SIGNAL_ADDRESS_BASE_B 0x07bc +#define NVCDC0_SET_MONITORED_FENCE_SIGNAL_ADDRESS_BASE_B_UPPER 24:0 + +#define NVCDC0_THROTTLE_SM 0x07fc +#define NVCDC0_THROTTLE_SM_MULTIPLY_ADD 0:0 +#define NVCDC0_THROTTLE_SM_MULTIPLY_ADD_FALSE 0x00000000 +#define NVCDC0_THROTTLE_SM_MULTIPLY_ADD_TRUE 0x00000001 + +#define NVCDC0_SET_SHADER_CACHE_CONTROL 0x0d94 +#define NVCDC0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE 0:0 +#define NVCDC0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_FALSE 0x00000000 +#define NVCDC0_SET_SHADER_CACHE_CONTROL_ICACHE_PREFETCH_ENABLE_TRUE 0x00000001 + +#define NVCDC0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS(i) (0x0da0+(i)*4) +#define NVCDC0_SET_SCG_COMPUTE_SCHEDULING_PARAMETERS_V 31:0 + +#define NVCDC0_SET_SM_TIMEOUT_INTERVAL 0x0de4 +#define NVCDC0_SET_SM_TIMEOUT_INTERVAL_COUNTER_BIT 5:0 + +#define NVCDC0_MME_DMA_WRITE_METHOD_BARRIER 0x0dec +#define NVCDC0_MME_DMA_WRITE_METHOD_BARRIER_V 0:0 + +#define NVCDC0_EVENT_STOP_TRIGGER_WFI 0x0ffc +#define NVCDC0_EVENT_STOP_TRIGGER_WFI_V 31:0 + +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI 0x1288 +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES 0:0 +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE_NO_WFI_TAG 25:4 + +#define NVCDC0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT 0x12a8 +#define NVCDC0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL 0:0 +#define NVCDC0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_FALSE 0x00000000 +#define NVCDC0_ACTIVATE_PERF_SETTINGS_FOR_COMPUTE_CONTEXT_ALL_TRUE 0x00000001 + +#define NVCDC0_INVALIDATE_SAMPLER_CACHE 0x1330 +#define NVCDC0_INVALIDATE_SAMPLER_CACHE_LINES 0:0 +#define NVCDC0_INVALIDATE_SAMPLER_CACHE_LINES_ALL 0x00000000 +#define NVCDC0_INVALIDATE_SAMPLER_CACHE_LINES_ONE 0x00000001 +#define NVCDC0_INVALIDATE_SAMPLER_CACHE_TAG 25:4 + +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE 0x1334 +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES 0:0 +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ALL 0x00000000 +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE_LINES_ONE 0x00000001 +#define NVCDC0_INVALIDATE_TEXTURE_HEADER_CACHE_TAG 25:4 + +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE 0x1338 +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE_LINES 0:0 +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ALL 0x00000000 +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE_LINES_ONE 0x00000001 +#define NVCDC0_INVALIDATE_TEXTURE_DATA_CACHE_TAG 25:4 + +#define NVCDC0_INVALIDATE_SAMPLER_CACHE_NO_WFI 0x1424 +#define NVCDC0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES 0:0 +#define NVCDC0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ALL 0x00000000 +#define NVCDC0_INVALIDATE_SAMPLER_CACHE_NO_WFI_LINES_ONE 0x00000001 +#define NVCDC0_INVALIDATE_SAMPLER_CACHE_NO_WFI_TAG 25:4 + +#define NVCDC0_SET_SHADER_EXCEPTIONS 0x1528 +#define NVCDC0_SET_SHADER_EXCEPTIONS_ENABLE 0:0 +#define NVCDC0_SET_SHADER_EXCEPTIONS_ENABLE_FALSE 0x00000000 +#define NVCDC0_SET_SHADER_EXCEPTIONS_ENABLE_TRUE 0x00000001 + +#define NVCDC0_SET_RENDER_ENABLE_A 0x1550 +#define NVCDC0_SET_RENDER_ENABLE_A_OFFSET_UPPER 7:0 + +#define NVCDC0_SET_RENDER_ENABLE_B 0x1554 +#define NVCDC0_SET_RENDER_ENABLE_B_OFFSET_LOWER 31:0 + +#define NVCDC0_SET_RENDER_ENABLE_C 0x1558 +#define NVCDC0_SET_RENDER_ENABLE_C_MODE 2:0 +#define NVCDC0_SET_RENDER_ENABLE_C_MODE_FALSE 0x00000000 +#define NVCDC0_SET_RENDER_ENABLE_C_MODE_TRUE 0x00000001 +#define NVCDC0_SET_RENDER_ENABLE_C_MODE_CONDITIONAL 0x00000002 +#define NVCDC0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_EQUAL 0x00000003 +#define NVCDC0_SET_RENDER_ENABLE_C_MODE_RENDER_IF_NOT_EQUAL 0x00000004 + +#define NVCDC0_SET_TEX_SAMPLER_POOL_A 0x155c +#define NVCDC0_SET_TEX_SAMPLER_POOL_A_OFFSET_UPPER 24:0 + +#define NVCDC0_SET_TEX_SAMPLER_POOL_B 0x1560 +#define NVCDC0_SET_TEX_SAMPLER_POOL_B_OFFSET_LOWER 31:0 + +#define NVCDC0_SET_TEX_SAMPLER_POOL_C 0x1564 +#define NVCDC0_SET_TEX_SAMPLER_POOL_C_MAXIMUM_INDEX 31:0 + +#define NVCDC0_SET_TEX_HEADER_POOL_A 0x1574 +#define NVCDC0_SET_TEX_HEADER_POOL_A_OFFSET_UPPER 24:0 + +#define NVCDC0_SET_TEX_HEADER_POOL_B 0x1578 +#define NVCDC0_SET_TEX_HEADER_POOL_B_OFFSET_LOWER 31:0 + +#define NVCDC0_SET_TEX_HEADER_POOL_C 0x157c +#define NVCDC0_SET_TEX_HEADER_POOL_C_MAXIMUM_INDEX 31:0 + +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI 0x1698 +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION 0:0 +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_FALSE 0x00000000 +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI_INSTRUCTION_TRUE 0x00000001 +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA 4:4 +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_FALSE 0x00000000 +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI_GLOBAL_DATA_TRUE 0x00000001 +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT 12:12 +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_FALSE 0x00000000 +#define NVCDC0_INVALIDATE_SHADER_CACHES_NO_WFI_CONSTANT_TRUE 0x00000001 + +#define NVCDC0_SET_RENDER_ENABLE_OVERRIDE 0x1944 +#define NVCDC0_SET_RENDER_ENABLE_OVERRIDE_MODE 1:0 +#define NVCDC0_SET_RENDER_ENABLE_OVERRIDE_MODE_USE_RENDER_ENABLE 0x00000000 +#define NVCDC0_SET_RENDER_ENABLE_OVERRIDE_MODE_ALWAYS_RENDER 0x00000001 +#define NVCDC0_SET_RENDER_ENABLE_OVERRIDE_MODE_NEVER_RENDER 0x00000002 + +#define NVCDC0_PIPE_NOP 0x1a2c +#define NVCDC0_PIPE_NOP_V 31:0 + +#define NVCDC0_SET_SPARE00 0x1a30 +#define NVCDC0_SET_SPARE00_V 31:0 + +#define NVCDC0_SET_SPARE01 0x1a34 +#define NVCDC0_SET_SPARE01_V 31:0 + +#define NVCDC0_SET_SPARE02 0x1a38 +#define NVCDC0_SET_SPARE02_V 31:0 + +#define NVCDC0_SET_SPARE03 0x1a3c +#define NVCDC0_SET_SPARE03_V 31:0 + +#define NVCDC0_SET_REPORT_SEMAPHORE_A 0x1b00 +#define NVCDC0_SET_REPORT_SEMAPHORE_A_OFFSET_UPPER 24:0 + +#define NVCDC0_SET_REPORT_SEMAPHORE_B 0x1b04 +#define NVCDC0_SET_REPORT_SEMAPHORE_B_OFFSET_LOWER 31:0 + +#define NVCDC0_SET_REPORT_SEMAPHORE_C 0x1b08 +#define NVCDC0_SET_REPORT_SEMAPHORE_C_PAYLOAD 31:0 + +#define NVCDC0_SET_REPORT_SEMAPHORE_D 0x1b0c +#define NVCDC0_SET_REPORT_SEMAPHORE_D_OPERATION 1:0 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_OPERATION_RELEASE 0x00000000 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_OPERATION_TRAP 0x00000003 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE 20:20 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_FALSE 0x00000000 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_AWAKEN_ENABLE_TRUE 0x00000001 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE 28:28 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_FOUR_WORDS 0x00000000 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_STRUCTURE_SIZE_ONE_WORD 0x00000001 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE 2:2 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_FALSE 0x00000000 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_FLUSH_DISABLE_TRUE 0x00000001 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE 3:3 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_FALSE 0x00000000 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_ENABLE_TRUE 0x00000001 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP 11:9 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_ADD 0x00000000 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MIN 0x00000001 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_MAX 0x00000002 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_INC 0x00000003 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_DEC 0x00000004 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_AND 0x00000005 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_OR 0x00000006 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_OP_RED_XOR 0x00000007 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT 18:17 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_UNSIGNED_32 0x00000000 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_REDUCTION_FORMAT_SIGNED_32 0x00000001 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP 19:19 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_FALSE 0x00000000 +#define NVCDC0_SET_REPORT_SEMAPHORE_D_CONDITIONAL_TRAP_TRUE 0x00000001 + +#define NVCDC0_SET_TRAP_HANDLER_A 0x25f8 +#define NVCDC0_SET_TRAP_HANDLER_A_ADDRESS_UPPER 24:0 + +#define NVCDC0_SET_TRAP_HANDLER_B 0x25fc +#define NVCDC0_SET_TRAP_HANDLER_B_ADDRESS_LOWER 31:0 + +#define NVCDC0_SET_BINDLESS_TEXTURE 0x2608 +#define NVCDC0_SET_BINDLESS_TEXTURE_CONSTANT_BUFFER_SLOT_SELECT 2:0 + +#define NVCDC0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE(i) (0x32f4+(i)*4) +#define NVCDC0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_V 31:0 + +#define NVCDC0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER(i) (0x3314+(i)*4) +#define NVCDC0_SET_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_VALUE_UPPER_V 31:0 + +#define NVCDC0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3334 +#define NVCDC0_ENABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVCDC0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER 0x3338 +#define NVCDC0_DISABLE_SHADER_PERFORMANCE_SNAPSHOT_COUNTER_V 0:0 + +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER(i) (0x333c+(i)*4) +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_UPPER_V 31:0 + +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_VALUE(i) (0x335c+(i)*4) +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_VALUE_V 31:0 + +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_EVENT(i) (0x337c+(i)*4) +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_EVENT_EVENT 7:0 + +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A(i) (0x339c+(i)*4) +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT0 1:0 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT0 4:2 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT1 6:5 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT1 9:7 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT2 11:10 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT2 14:12 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT3 16:15 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT3 19:17 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT4 21:20 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT4 24:22 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_EVENT5 26:25 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_BIT_SELECT5 29:27 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_A_SPARE 31:30 + +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B(i) (0x33bc+(i)*4) +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_EDGE 0:0 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_MODE 2:1 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_WINDOWED 3:3 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CONTROL_B_FUNC 19:4 + +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL 0x33dc +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_TRAP_CONTROL_MASK 7:0 + +#define NVCDC0_START_SHADER_PERFORMANCE_COUNTER 0x33e0 +#define NVCDC0_START_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVCDC0_STOP_SHADER_PERFORMANCE_COUNTER 0x33e4 +#define NVCDC0_STOP_SHADER_PERFORMANCE_COUNTER_COUNTER_MASK 7:0 + +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER 0x33e8 +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_SCTL_FILTER_V 31:0 + +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER 0x33ec +#define NVCDC0_SET_SHADER_PERFORMANCE_COUNTER_CORE_MIO_FILTER_V 31:0 + +#define NVCDC0_SET_MME_SHADOW_SCRATCH(i) (0x3400+(i)*4) +#define NVCDC0_SET_MME_SHADOW_SCRATCH_V 31:0 + +#define NVCDC0_CALL_MME_MACRO(j) (0x3800+(j)*8) +#define NVCDC0_CALL_MME_MACRO_V 31:0 + +#define NVCDC0_CALL_MME_DATA(j) (0x3804+(j)*8) +#define NVCDC0_CALL_MME_DATA_V 31:0 + +#endif /* HWFE_BLACKWELL_COMPUTE_A_SW_H */ diff --git a/userspace/sdks/nv570/inc/class/clcdcd.h b/userspace/sdks/nv570/inc/class/clcdcd.h new file mode 100644 index 0000000..63bc42b --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcdcd.h @@ -0,0 +1,47 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#include + +// +// This file was generated with FINN, an NVIDIA coding tool. +// Source file: class/clcdcd.finn +// + +#define TRACE_DEVICE_EVENT (0xcdcdU) /* finn: Evaluated from "NVCDCD_ALLOC_PARAMETERS_MESSAGE_ID" */ + +#define NVCDCD_ALLOC_PARAMETERS_MESSAGE_ID (0xcdcdU) + +typedef struct NVCDCD_ALLOC_PARAMETERS { + // + // capDescriptor is a file descriptor for unix RM clients, but a void + // pointer for windows RM clients. + // + // capDescriptor is transparent to RM clients i.e. RM's user-mode shim + // populates this field on behalf of clients. + // + NV_DECLARE_ALIGNED(NvU64 capDescriptor, 8); +} NVCDCD_ALLOC_PARAMETERS; + diff --git a/userspace/sdks/nv570/inc/class/clcdd1.h b/userspace/sdks/nv570/inc/class/clcdd1.h new file mode 100644 index 0000000..62d99a4 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcdd1.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_clcdd1_h__ +#define __gb100_clcdd1_h__ + +#define NVCDD1_VIDEO_NVJPG (0x0000CDD1) + +#endif // __gb100_clcdd1_h__ diff --git a/userspace/sdks/nv570/inc/class/clcdfa.h b/userspace/sdks/nv570/inc/class/clcdfa.h new file mode 100644 index 0000000..c4bb4e1 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcdfa.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_clcdfa_h__ +#define __gb100_clcdfa_h__ + +#define NVCDFA_VIDEO_OFA (0x0000CDFA) + +#endif // __gb100_clcdfa_h__ diff --git a/userspace/sdks/nv570/inc/class/clce97.h b/userspace/sdks/nv570/inc/class/clce97.h new file mode 100644 index 0000000..bf302f9 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clce97.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clce97_h_ +#define _clce97_h_ + +#define BLACKWELL_B 0xCE97 + +#endif /* _clce97_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/clceb0.h b/userspace/sdks/nv570/inc/class/clceb0.h new file mode 100644 index 0000000..715e81a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clceb0.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef clceb0_h_ +#define clceb0_h_ + +#define NVCEB0_VIDEO_DECODER (0x0000CEB0) + +#endif // clceb0_h + diff --git a/userspace/sdks/nv570/inc/class/clceb7.h b/userspace/sdks/nv570/inc/class/clceb7.h new file mode 100644 index 0000000..df7a3bd --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clceb7.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef clceb7_h_ +#define clceb7_h_ + +#define NVCEB7_VIDEO_ENCODER (0x0000CEB7) + +#endif // clceb7_h + diff --git a/userspace/sdks/nv570/inc/class/clcec0.h b/userspace/sdks/nv570/inc/class/clcec0.h new file mode 100644 index 0000000..f73e705 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcec0.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcec0_h_ +#define _clcec0_h_ + +#define BLACKWELL_COMPUTE_B 0xCEC0 + +#endif /* _clcec0_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/clced0.h b/userspace/sdks/nv570/inc/class/clced0.h new file mode 100644 index 0000000..9f1192a --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clced0.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clced0_h_ +#define _clced0_h_ + +#define NVCED0_VIDEO_NVJPG (0x0000CED0) + +#endif // _clced0_h + diff --git a/userspace/sdks/nv570/inc/class/clcefa.h b/userspace/sdks/nv570/inc/class/clcefa.h new file mode 100644 index 0000000..6157f96 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcefa.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcefa_h_ +#define _clcefa_h_ + +#define NVCEFA_VIDEO_OFA (0x0000CEFA) + +#endif // _clcefa_h + diff --git a/userspace/sdks/nv570/inc/class/clcfb0.h b/userspace/sdks/nv570/inc/class/clcfb0.h new file mode 100644 index 0000000..c3485ac --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcfb0.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcfb0_h_ +#define _clcfb0_h_ + +#define NVCFB0_VIDEO_DECODER (0x0000CFB0) + +#endif /* _clcfb0_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/clcfb7.h b/userspace/sdks/nv570/inc/class/clcfb7.h new file mode 100644 index 0000000..36aa79c --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcfb7.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcfb7_h_ +#define _clcfb7_h_ + +#define NVCFB7_VIDEO_ENCODER (0x0000CFB7) + +#endif /* _clcfb7_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/clcfd1.h b/userspace/sdks/nv570/inc/class/clcfd1.h new file mode 100644 index 0000000..6339df0 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcfd1.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcfd1_h_ +#define _clcfd1_h_ + +#define NVCFD1_VIDEO_NVJPG (0x0000CFD1) + +#endif /* _clcfd1_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/clcffa.h b/userspace/sdks/nv570/inc/class/clcffa.h new file mode 100644 index 0000000..e54be2d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/clcffa.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _clcffa_h_ +#define _clcffa_h_ + +#define NVCFFA_VIDEO_OFA (0x0000CFFAU) + +#endif /* _clcffa_h_ */ + diff --git a/userspace/sdks/nv570/inc/class/cld0b7.h b/userspace/sdks/nv570/inc/class/cld0b7.h new file mode 100644 index 0000000..d7c044d --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cld0b7.h @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + + +#ifndef cld0b7_h +#define cld0b7_h + +#include "nvtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define NVD0B7_VIDEO_ENCODER (0x0000D0B7) + +#ifdef __cplusplus +}; /* extern "C" */ +#endif +#endif // cld0b7_h + diff --git a/userspace/sdks/nv570/inc/class/cld1b0.h b/userspace/sdks/nv570/inc/class/cld1b0.h new file mode 100644 index 0000000..006d0a7 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cld1b0.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef cld1b0_h_ +#define cld1b0_h_ + +#define NVD1B0_VIDEO_DECODER (0x0000D1B0) + +#endif // cld1b0_h diff --git a/userspace/sdks/nv570/inc/class/cld1b7.h b/userspace/sdks/nv570/inc/class/cld1b7.h new file mode 100644 index 0000000..e76867f --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cld1b7.h @@ -0,0 +1,26 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef cld1b7_h_ +#define cld1b7_h_ +#define NVD1B7_VIDEO_ENCODER (0x0000D1B7) +#endif // cld1b7_ diff --git a/userspace/sdks/nv570/inc/class/cld1fa.h b/userspace/sdks/nv570/inc/class/cld1fa.h new file mode 100644 index 0000000..d0f244e --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cld1fa.h @@ -0,0 +1,26 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef cld1fa_h_ +#define cld1fa_h_ +#define NVD1FA_VIDEO_OFA (0x0000D1FA) +#endif // cld1fa_h diff --git a/userspace/sdks/nv570/inc/class/cld2b0.h b/userspace/sdks/nv570/inc/class/cld2b0.h new file mode 100644 index 0000000..a5dd839 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cld2b0.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef cld2b0_h_ +#define cld2b0_h_ + +#define NVD2B0_VIDEO_DECODER (0x0000D2B0) + +#endif // cld2b0_h diff --git a/userspace/sdks/nv570/inc/class/cld2d1.h b/userspace/sdks/nv570/inc/class/cld2d1.h new file mode 100644 index 0000000..fd231fa --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cld2d1.h @@ -0,0 +1,30 @@ + +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef cld2d1_h_ +#define cld2d1_h_ + +#define NVD2D1_VIDEO_NVJPG (0x0000D2D1) + +#endif // cld2d1_h diff --git a/userspace/sdks/nv570/inc/class/cld2fa.h b/userspace/sdks/nv570/inc/class/cld2fa.h new file mode 100644 index 0000000..5b7fd55 --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cld2fa.h @@ -0,0 +1,28 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef cld2fa_h_ +#define cld2fa_h_ + +#define NVD2FA_VIDEO_OFA (0x0000D2FA) + +#endif // cld2fa_h diff --git a/userspace/sdks/nv570/inc/class/cld5b7.h b/userspace/sdks/nv570/inc/class/cld5b7.h new file mode 100644 index 0000000..171c7dd --- /dev/null +++ b/userspace/sdks/nv570/inc/class/cld5b7.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef _cld5b7_h_ +#define _cld5b7_h_ + +#define NVD5B7_VIDEO_ENCODER (0x0000D5B7) + +#endif /* _cld5b7_h_ */ + -- cgit v1.2.3