From a58eb29859c55fc38c30bc9433b5dfd16ae9e4d2 Mon Sep 17 00:00:00 2001 From: Arthur Hanson Rasmusson Date: Wed, 7 Oct 2026 13:28:37 -0400 Subject: vgsp: m95 - program GPC MMU_CTRL from PFB MMU_CTRL (RM grInitGPCMmuPRIRegs copy) The real RM initialises every GPC's NV_PGPC_PRI_MMU_CTRL (0x500880 + gpc*0x8000) from NV_PFB_PRI_MMU_CTRL (0x100C80) using the TU102 hub-to-GPC matching fields (VM_PG_SIZE, COMP_FAULT, MISS_GRAN, CACHE_MODE, USE_PDB_BIG_PAGE_SIZE, ATOMIC_CAPABILITY_MODE, ATOMIC_CAPABILITY_SYS_NCOH; ext-tree gr_gk104.c:3340-3380 + gr_tu102.c:229-238). Our ladder never programmed it (grep-verified). The m93 INST dump shows the server's SC(0) PDB carries USE_VER2_PT_FORMAT + BIG_PAGE_SIZE=1, so a GPC/hub MMU_CTRL mismatch is a candidate for the GPC-side walker refusing the SM I-fetch with MMU_NACK while hub-side reads resolve. Gated by gsp_phys_rmcall_gr_gpc_mmu_init (default 0); sampler now reads GPC0/GPC1_MMU_CTRL (0x500880/0x508880) and PFB_MMU_CTRL (0x100C80). --- tools/gr-regs/reg_sampler.py | 3 +++ 1 file changed, 3 insertions(+) (limited to 'tools/gr-regs') diff --git a/tools/gr-regs/reg_sampler.py b/tools/gr-regs/reg_sampler.py index acd7e00..24c8296 100644 --- a/tools/gr-regs/reg_sampler.py +++ b/tools/gr-regs/reg_sampler.py @@ -47,6 +47,9 @@ REGS = [ (0x504830, "G0T0S2_WARP_ESR"), (0x5048B0, "G0T0S3_WARP_ESR"), (0x500324, "GPC0_GPCMMU_ESR"), + (0x500880, "GPC0_MMU_CTRL"), + (0x508880, "GPC1_MMU_CTRL"), + (0x100C80, "PFB_MMU_CTRL"), (0x50AC90, "GPC1_EXCEPTION"), (0x50C730, "G1T0S0_WARP_ESR"), (0x50C734, "G1T0S0_ESR_MASK"), -- cgit v1.2.3