From 1e73a2e00c76e25e4ce2980e5d04a533b0c6158d Mon Sep 17 00:00:00 2001 From: Arthur Hanson Rasmusson Date: Mon, 21 Sep 2026 20:08:39 -0400 Subject: kernel: Booter-Unload success + SM order table (unload/reload cycle works) - gsp_emu_poll_boot generic SEC2 kick path: clear SEC2_MAILBOX0=0 (success) - Booter Unload during GPU shutdown read a stale 0xff, failing the unload and killing the subsequent re-init ('Booter failed with non-zero error code: 0xff' -> RmInitAdapter 0x40). A SEC2 kick after a completed boot is a GSP shutdown/reload: clear boot state. Driver unload/reload cycle (last close -> RmShutdown, next open -> RmInitAdapter) now works. - STATIC_KGR_GET_GLOBAL_SM_ORDER(0x20800a22): TU104 topology 6 GPC x 4 TPC x 2 SM = 48 SMs/24 TPCs on GR0. kgrStaticInit is init-critical (NV_CHECK_OK_OR_GOTO); zeros left numSm=0 and NVML spun on empty topology. --- kernel/gsp_rm_tu104.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'kernel/gsp_rm_tu104.h') diff --git a/kernel/gsp_rm_tu104.h b/kernel/gsp_rm_tu104.h index c6dfb56..5a5fecd 100644 --- a/kernel/gsp_rm_tu104.h +++ b/kernel/gsp_rm_tu104.h @@ -700,6 +700,33 @@ static const struct tu104_internal_device_info tu104_internal_device_table[] = { #define TU104_CTRL_INTERNAL_DISPLAY_GET_IP_VERSION 0x20800a4b #define TU104_CTRL_I2C_TRANSACTION 0x402c0105 #define TU104_CTRL_CE_GET_FAULT_METHOD_BUFFER_SIZE 0x20802a08 +#define TU104_CTRL_STATIC_KGR_GET_GLOBAL_SM_ORDER 0x20800a22 + +/* TU104 SM topology: 6 GPCs x 4 TPCs x 2 SMs = 48 SMs, 24 TPCs (RTX 2080 SUPER) */ +#define TU104_NUM_GPC 6 +#define TU104_TPC_PER_GPC 4 +#define TU104_SM_PER_TPC 2 +#define TU104_NUM_SM (TU104_NUM_GPC * TU104_TPC_PER_GPC * TU104_SM_PER_TPC) +#define TU104_NUM_TPC (TU104_NUM_GPC * TU104_TPC_PER_GPC) + +/* NV2080_CTRL_INTERNAL_STATIC_GR_GLOBAL_SM_ORDER (ctrl2080internal.h) */ +#define TU104_GR_MAX_SM 240 +#define TU104_GR_MAX_ENGINES 8 + +struct tu104_gr_sm_id { + u16 gpcId; + u16 localTpcId; + u16 localSmId; + u16 globalTpcId; + u16 virtualGpcId; + u16 migratableTpcId; +}; + +struct tu104_gr_global_sm_order { + struct tu104_gr_sm_id globalSmId[TU104_GR_MAX_SM]; + u16 numSm; + u16 numTpc; +}; /* CE fault method buffer size (ceGetFaultMethodBufferSize_GV100 formula, * Turing inherits: 135 * (13*totalCes + 2), page-aligned; TU104 has 5 PCEs) */ -- cgit v1.2.3