From 0af8085561305d4df339bf641e12f6dff429553b Mon Sep 17 00:00:00 2001 From: Arthur Hanson Rasmusson Date: Wed, 7 Oct 2026 10:44:20 -0400 Subject: vgsp: m78 - lane-enable skip mask + best-effort lane tail (#1063 no longer aborts it) gsp_phys_rmcall_gr_lane_skip: bit0 skips #1059 CILP mode, bit1 skips #1061 timeslice, bit2 skips #1063 device-sched. Used to bisect which lane-enable control arms the forwarded QMD enqueue and which one leaves the scheduling state that ends in the dispatch-time context save. Also makes the m76 lane tail independent of #1063 (always refused 0x1f by the server). --- kernel/gsp_phys_gpu.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'kernel/gsp_phys_gpu.h') diff --git a/kernel/gsp_phys_gpu.h b/kernel/gsp_phys_gpu.h index 3a590ea..216c96e 100644 --- a/kernel/gsp_phys_gpu.h +++ b/kernel/gsp_phys_gpu.h @@ -358,6 +358,10 @@ int gsp_phys_rmcall_gr_r1_first_value(void); * enable (TSG preempt bWait, device-sched off, perf boost; default 0). */ int gsp_phys_rmcall_gr_lane_tail_value(void); +/* m78: skip lane-enable controls by bit (1=#1059 CILP, 2=#1061 timeslice, + * 4=#1063 device-sched); default 0 = send all. */ +int gsp_phys_rmcall_gr_lane_skip_value(void); + /* * Ladder VAS ownership selector (gsp_phys_rmcall_vas_shared; default 0). * 0 = FERMI_VASPACE_A is allocated IS_EXTERNALLY_OWNED (historical ladder -- cgit v1.2.3