From 97381a2cc9d3d2cc6d05a4da650e13ac27c5fc25 Mon Sep 17 00:00:00 2001
From: Arthur Hanson Rasmusson <arthur@vgpu.io>
Date: Wed, 30 Sep 2026 23:44:55 -0400
Subject: gsp-phys: boot-layout stage 3b - boot-argument pages, WPR meta and FB
 layout (no device writes)

---
 kernel/gsp_phys_gpu.c | 31 +++++++++++++++++++++++++++----
 1 file changed, 27 insertions(+), 4 deletions(-)

(limited to 'kernel/gsp_phys_gpu.c')

diff --git a/kernel/gsp_phys_gpu.c b/kernel/gsp_phys_gpu.c
index df46c5a..0724cf3 100644
--- a/kernel/gsp_phys_gpu.c
+++ b/kernel/gsp_phys_gpu.c
@@ -18,8 +18,10 @@
 #include <linux/elf.h>
 #include <linux/crc32.h>
 #include <linux/firmware.h>
+#include <linux/string.h>
 
 #include "gsp_phys_gpu.h"
+#include "gsp_phys_boot.h"
 
 #define GSP_PHYS_VENDOR		0x10de
 #define GSP_PHYS_DEVICE		0x1ed3
@@ -65,11 +67,13 @@ struct gsp_phys_gpu {
 	resource_size_t bar3_len;
 	const struct firmware *fw;
 	u32 fw_crc32;
+	u64 fw_image_size;
 	bool fw_loaded;
 	bool enabled;
 	bool regions;
 	bool drv_registered;
 	bool claimed;
+	struct gsp_phys_boot boot;
 };
 
 static struct gsp_phys_gpu phys;
@@ -95,6 +99,7 @@ static void gsp_phys_fw_unload(void)
 	phys.fw = NULL;
 	phys.fw_loaded = false;
 	phys.fw_crc32 = 0;
+	phys.fw_image_size = 0;
 }
 
 static const char *gsp_phys_fw_section_name(const struct firmware *fw,
@@ -165,16 +170,24 @@ static int gsp_phys_fw_load(void)
 			const Elf64_Shdr *sh = (const Elf64_Shdr *)
 				(phys.fw->data + eh->e_shoff +
 				 (u64)i * eh->e_shentsize);
+			const char *name;
 
 			if (sh->sh_offset > phys.fw->size ||
 			    sh->sh_size > phys.fw->size - sh->sh_offset)
 				continue;
+			name = gsp_phys_fw_section_name(phys.fw, sh);
+			if (!strcmp(name, ".fwimage"))
+				phys.fw_image_size = sh->sh_size;
 			pr_info("gsp-phys-fw:   [%02u] %-24s type=%u addr=0x%llx "
-				"off=0x%llx size=0x%llx\n", i,
-				gsp_phys_fw_section_name(phys.fw, sh),
+				"off=0x%llx size=0x%llx\n", i, name,
 				sh->sh_type, (u64)sh->sh_addr,
 				(u64)sh->sh_offset, (u64)sh->sh_size);
 		}
+
+		if (phys.fw_image_size)
+			pr_info("gsp-phys-fw: GSP-RM image section .fwimage "
+				"size=0x%llx (boot-layout input)\n",
+				phys.fw_image_size);
 	}
 
 	return 0;
@@ -374,10 +387,17 @@ int gsp_phys_gpu_claim(void)
 	pci_dev_put(pdev);
 	pr_info("gsp-phys: physical GPU claimed (backend rung 1)\n");
 
-	if (gsp_phys_fw_load())
+	if (gsp_phys_fw_load()) {
 		pr_warn("gsp-phys: firmware load failed; backend stays at rung 1\n");
-	else
+	} else {
 		pr_info("gsp-phys: real GSP firmware staged (backend rung 2)\n");
+
+		if (gsp_phys_layout_enabled() &&
+		    gsp_phys_boot_layout_init(&phys.boot, phys.pdev,
+					      phys.fw_image_size, phys.bar1_len))
+			pr_warn("gsp-phys: boot layout/allocation failed; "
+				"backend stays at rung 2\n");
+	}
 	return 0;
 }
 EXPORT_SYMBOL_GPL(gsp_phys_gpu_claim);
@@ -389,6 +409,9 @@ void gsp_phys_gpu_release(void)
 	if (!phys.drv_registered && !phys.claimed)
 		return;
 
+	if (phys.pdev)
+		gsp_phys_boot_layout_fini(&phys.boot, phys.pdev);
+
 	gsp_phys_fw_unload();
 
 	pdev = pci_get_device(GSP_PHYS_VENDOR, GSP_PHYS_DEVICE, NULL);
-- 
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